WO2019000300A1 - 二维数据匹配方法、装置和逻辑电路 - Google Patents

二维数据匹配方法、装置和逻辑电路 Download PDF

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Publication number
WO2019000300A1
WO2019000300A1 PCT/CN2017/090712 CN2017090712W WO2019000300A1 WO 2019000300 A1 WO2019000300 A1 WO 2019000300A1 CN 2017090712 W CN2017090712 W CN 2017090712W WO 2019000300 A1 WO2019000300 A1 WO 2019000300A1
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queue
operator
data
matching
matrix
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PCT/CN2017/090712
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English (en)
French (fr)
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曹亮
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北京清影机器视觉技术有限公司
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Priority to PCT/CN2017/090712 priority Critical patent/WO2019000300A1/zh
Priority to US16/627,375 priority patent/US11360744B2/en
Priority to CN201780092146.5A priority patent/CN110770722B/zh
Publication of WO2019000300A1 publication Critical patent/WO2019000300A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
    • G06F7/78—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data for changing the order of data flow, e.g. matrix transposition or LIFO buffers; Overflow or underflow handling therefor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F16/00—Information retrieval; Database structures therefor; File system structures therefor
    • G06F16/20—Information retrieval; Database structures therefor; File system structures therefor of structured data, e.g. relational data
    • G06F16/22—Indexing; Data structures therefor; Storage structures
    • G06F16/221—Column-oriented storage; Management thereof
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F16/00—Information retrieval; Database structures therefor; File system structures therefor
    • G06F16/50—Information retrieval; Database structures therefor; File system structures therefor of still image data
    • G06F16/58—Retrieval characterised by using metadata, e.g. metadata not derived from the content or metadata generated manually
    • G06F16/583—Retrieval characterised by using metadata, e.g. metadata not derived from the content or metadata generated manually using metadata automatically derived from the content
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/16—Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30021—Compare instructions, e.g. Greater-Than, Equal-To, MINMAX
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30029—Logical and Boolean instructions, e.g. XOR, NOT
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G06F9/546—Message passing systems or structures, e.g. queues
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Definitions

  • the present invention relates to the field of data processing technologies, and in particular, to a two-dimensional data matching method, apparatus, and logic circuit.
  • Two-dimensional data generally refers to data capable of forming a two-dimensional matrix structure, data representing a planar image, and various types of planar two-dimensional form data.
  • the above operations generally use convolution operations to determine the similarity matching characteristics of the two sets of data by the algorithmic operation between the two sets of image feature blocks in the window range, and finally obtain two sets of two-dimensional data. It is able to achieve matching data address locations and corresponding data values and matching parameters.
  • the existing two-dimensional data matching method has low computational efficiency and large computational complexity, and no effective solution has been proposed yet.
  • an object of the present invention is to provide a two-dimensional data matching method, apparatus, and logic circuit to reduce the amount of data matching operations and improve computational efficiency.
  • an embodiment of the present invention provides a two-dimensional data matching method, where the method includes a first operator, a first queue, a second operator, a first counter, a second queue, and a third operator that are sequentially connected.
  • the second counter, the first comparator, and the first memory are executed;
  • the first queue and the second queue are data storage structures, and the data storage principle of the first queue and the second queue is first in first out;
  • the method includes: (1) The first operator performs a bitwise matching operation on the data of the same data row position in the matching matrix a and the to-be-matched matrix b row by row; (2) input the matching result of the matching operation to the head of the first queue by the row, wherein
  • the element of the first queue is the data after the matching operation, and the number of data storage locations of the elements of the first queue is greater than or equal to the number of columns of the matrix to be matched a or the matrix to be matched b, and the length of the first queue is the set matching window.
  • Each of the first queues of the first queue inputs a matching result, and each of the sub-operators of the second operator performs a cumulative operation on the value of the data corresponding to the matching result of the input, wherein
  • the second operator includes a list of sub-operators, the number of sub-operators being the same as the number of data storage locations in the elements of the first queue, and the position of each sub-operator is the same as the data storage location on the elements of the first queue Corresponding;
  • the first counter is set to zero;
  • the accumulated value of each sub-operator of the second operator is sequentially output to the data position to The head of the second queue, wherein the length of the second queue is the same as the number of columns of the matching window;
  • the head of the second queue is after each input of the cumulative value of the sub-operator in the second operator, and the third The operator performs an accumulation operation on the accumulated value of the input, wherein the third operator is a single operator;
  • the third operator pushes the data in the tail of the second queue in the third operator.
  • the subtraction operation is performed in the value, and the value of the second counter is incremented by 1 after the operation; (12) the steps (8)(9)(10)(11) are repeated until the operation values in all the sub-operators of the second operator are sequentially Enter all the second queues to complete the matrix to be matched a and to be matched All the current data rows in the array b are matched; (13) after completing the above steps, when each data bit in the first queue stores data, and the first queue is re-entered with new data, the first queue The data at the end of the team is launched into the first queue.
  • Each sub-operator in the second operator performs a cumulative operation on the value of the corresponding data position of the new head of the first queue. After the operation is completed, each sub-operator will be launched again.
  • the value at the corresponding data position at the end of the first queue Perform the subtraction operation on the value of the corresponding sub-operator, the first counter is incremented by one; (14) repeat steps (5)(6)(7)(8)(9)(10)(11)(12)(13 ) until all matching operations of all data rows in the matrix to be matched a and the matrix to be matched b are completed.
  • the method further includes: executing, by the first controller, the first controller; the method further comprising: acquiring, according to the set sequence, the matrix to be matched, and waiting for Matching the row data of different positions in the matrix b; the position of the acquired row data in the matrix to be matched a is the same as the position in the matrix to be matched b; and the row data acquired each time is output to the first An arithmetic unit; wherein the order of setting includes at least one of the following: a row-by-row acquisition from top to bottom, or a row-by-row acquisition from bottom to top, or a column-by-column acquisition from left to right, or from right to right Left column by column.
  • the method further includes: the first controller generating the matching layer, specifically comprising the steps of: acquiring, by the first controller, the first matrix and the second matrix; the first controller The second matrix is respectively saved to the first storage area and the second storage area; according to the set matching path, each time the distance is matched according to the set unit, the first controller moves the second matrix to change the first matrix and the second a coincident region of the matrix; wherein the set moving path includes a line warp or surface path; the line includes one or more of a horizontal line path, a vertical line path, and a slant line path; the surface path includes a plurality of the same type
  • the first controller generates a matching layer according to the overlap region generated by each movement; wherein the matching layer includes the matrix to be matched a and the matrix to be matched b and the layer identifier of the matching layer.
  • the first matrix and the second matrix comprise two two-dimensional image data matrices acquired by a binocular parallel camera; the two-dimensional image data matrix comprises a binary image matrix or a Boolean matrix.
  • the first controller generates a matching layer step according to the overlap region generated by each movement, including: the first controller sets the row and column values and rows and columns of the coincident region in the first matrix.
  • the data corresponding to the value is used as the matrix to be matched a; the first controller uses the data corresponding to the row and column values of the coincident region in the second matrix and the row and column values as the matrix to be matched b; the first controller matches the distance moved by the second matrix as a match
  • the layer identifier of the layer; the matrix to be matched a, the matrix to be matched b, and the layer identifier are saved as matching layers.
  • the method further includes: obtaining, by the second controller, the matching result matrix and the matching layer obtained by the matching operation of the to-be-matched matrix a and the to-be-matched matrix b corresponding to each matching layer.
  • the layer identifier; the second controller sets the initial value of all corresponding addresses on the second memory to zero; performs the following operation on each matching result matrix according to the layer identifier of the matching layer: the operation is performed by the second controller sequentially connected a third queue, a fourth operator, a third counter, a fourth queue, a fifth operator, a fourth counter, a second comparator, and a second memory;
  • the third queue and the fourth queue are data storage structures,
  • the data storage principle of the third queue and the fourth queue is first-in first-out; the operations include: (1) the second controller acquires the row data in the matching result matrix of the current matching layer row by row, and inputs the row data into the queue of the third queue.
  • the elements of the third queue are the row data in the matching result matrix, and the number of the data storage locations of the elements of the third queue is greater than or equal to all the matching result matrices, The number of columns of the large matching result matrix, the length of the third queue is the number of rows of the set calculation window; (2) the row data of the matching result matrix of the current matching layer of each row of the leader of the third queue, fourth Each sub-operator in the operator performs a cumulative operation on the value of the corresponding data position in the input row data, wherein the fourth operator includes a column operator, the number of the column operator and the data of the element of the third queue The number of storage locations is the same, and the position of each sub-operator corresponds to the position on the element of the third queue; (3) when each data bit in the third queue stores data, the third counter is set to zero; (4) outputting the cumulative value of each sub-operator in the fourth computing unit to the head of the fourth queue in the order of the data position, wherein the length of the fourth queue
  • the accumulated result in the fifth computing unit is replaced by the second memory.
  • the accumulated result value is stored in the corresponding address in the second memory, and the layer identifier of the matching layer corresponding to the current matching result matrix is replaced by the corresponding address in the original second memory.
  • the layer identifier is stored in the corresponding address of the second memory; (9) when each data bit in the fourth queue stores data, and the queue head of the fourth queue inputs new data, the tail data of the fourth queue is pushed out.
  • the fifth operator performs a cumulative operation on the corresponding value of the newly input fourth operator in the fifth operator.
  • the fifth operator performs the fifth operation on the data pushed out in the fourth queue.
  • the subtraction operation is performed in the value of the device, and the value of the fourth counter is incremented by 1 after the operation; (10) the steps (7) and (8) (9) are repeated until the cumulative values of all the sub-operators of the fourth operator are sequentially Enter the fourth queue to complete the operation of the current row of the current matching result matrix; (11) After completing the above steps, when each data bit in the third queue stores data, the queue of the third queue inputs new data again. When the tail queue data of the third queue is launched into the third queue, each of the sub-operators in the fourth operator is new The value input to the corresponding data position of the third queue is accumulated in the sub-operator.
  • each sub-operator deducts the value of the corresponding data position of the data of the push-out queue in the value of the corresponding sub-operator.
  • the value of the third counter is incremented by one; (12) repeating steps (4)(5)(6)(7)(8)(9)(10)(11) until the matching result matrix of the current matching layer is completed. (13) repeat steps (1)-(12) to complete the operation of the next matching result matrix and matching layer until the matching result matrix corresponding to all matching layers is completed; wherein, the second memory is used
  • each address in the final result matrix stores, after comparing the accumulated results on the corresponding addresses of all matching layers, the obtained maximum cumulative result value and the layer identifier corresponding to the largest cumulative result value. .
  • an embodiment of the present invention provides a two-dimensional data matching apparatus, where the apparatus includes a first operator, a first queue, a second operator, a first counter, a second queue, and a third operator that are sequentially connected.
  • a second counter, a first comparator, and a first memory the first queue and the second queue are data storage structures, and the data storage principle of the first queue and the second queue is first in first out;
  • the first operator is configured to The bitwise matching operation is performed on the data of the same data row position in the matching matrix a and the to-be-matched matrix b, and the matching result of the matching operation is input to the head of the first queue by the row, wherein the elements of the first queue are matching operations After the data, the number of data storage locations of the elements of the first queue is greater than or equal to the number of columns of the matrix to be matched a or the matrix to be matched b, the length of the first queue is the number of rows of the matching matching window;
  • the matching result is input to the first queue leader,
  • the comparison result is the first value; when the cumulative result in the third operator When the matching threshold is less than the matching threshold, the comparison result is the second value; wherein the first value indicates that the comparison result is true, or is 1; the second value indicates that the comparison result is false or 0; the comparison result is input to the first storage And forming a matching result matrix, the abscissa of the matching result matrix in the first memory is the value of the second counter, the ordinate is the value of the first counter, and the second queue is configured to be each data bit in the second queue After storing the data, when the first queue of the second queue inputs new data, the second queue pushes the data of the tail of the team to the second queue; the third operator is configured to perform the sub-operation of the newly input second operator.
  • the corresponding value on the device is accumulated in the third operator.
  • the third operator subtracts the data pushed out from the tail of the second queue in the value of the third operator.
  • the value of the second counter is incremented by one; the second operator is configured to repeatedly trigger the third operator, the first comparator, the second queue, and the third operator to run until the operations in all the child operators of the second operator.
  • the values are all input to the second queue in order to complete all matching of the current data row in the matrix to be matched a and the matrix to be matched b; the first queue is configured to be configured after each data bit in the first queue stores data.
  • each sub-operator of the second operator will newly input the data of the head of the first queue.
  • the value of the position is further accumulated.
  • each sub-operator will deduct the value of the corresponding data position at the end of the first queue and perform the subtraction operation on the value of the corresponding sub-operator.
  • the first counter is incremented by one.
  • the apparatus further includes a first controller connected to the first computing unit, and the first controller is configured to sequentially acquire the matrix to be matched a and the matrix to be matched according to the set order.
  • the order of setting includes at least one of the following: row-by-row acquisition from top to bottom, or row-by-row acquisition from bottom to top, or column by column from left to right, or right to left Get column by column.
  • the first controller is further configured to: generate a matching layer, and specifically include the following steps: acquiring the first matrix and the second matrix; and saving the first matrix and the second matrix to the first Storage area and second storage area; according to settings a matching path, each time matching the distance according to the set unit, moving the second matrix to change the overlapping area of the first matrix and the second matrix; wherein the set moving path includes a line path or a surface path; the line includes a horizontal line One or more of a path, a vertical line path, and a slant line path; the surface path includes a plurality of lines of the same kind; and a matching layer is generated according to the coincident area generated by each movement; wherein the matching layer includes The layer to be matched a and the matrix to be matched b and the layer identification of the matching layer.
  • the first controller is further configured to: the first matrix and the second matrix comprise two two-dimensional image data matrices acquired by a binocular parallel camera; the two-dimensional image data matrix comprises two Value image matrix or Boolean matrix.
  • the first controller is further configured to: use data corresponding to the row and column values of the coincident region in the first matrix as the matrix to be matched a; and the coincident region in the second matrix.
  • the data corresponding to the row and column values and the row and column values are used as the matrix to be matched b; the first controller moves the distance moved by the second matrix as the layer identifier of the matching layer; and the matrix to be matched a, the matrix to be matched b, and the layer identifier are saved as matching layers .
  • the apparatus further includes a second controller, a third queue, a fourth operator, a third counter, a fourth queue, a fifth operator, a fourth counter, and a second connected in sequence.
  • the comparator and the second memory are executed; the third queue and the fourth queue are data storage structures, the data storage principle of the third queue and the fourth queue is first in first out; and the second controller is configured to acquire each matching layer one by one Corresponding to the matching result matrix obtained by the matching matrix a and the to-be-matched matrix b, and the layer identifier of the matching layer; performing the following operations on the matching layer matrix according to the layer identifier of the matching layer: the second memory
  • the initial value of all corresponding addresses is set to zero; the row data in the matching result matrix of the current matching layer is obtained row by row, and the row data is input into the head of the third queue, wherein the elements of the third queue are matching results
  • the row data in the matrix, the number of data storage locations of the elements of the third queue is greater than or equal to
  • the fifth operator After each input of the accumulated value of the sub-operator of the fourth operator, the fifth operator performs the cumulative operation on the accumulated value of the input.
  • the fifth operator is a single operator; the fourth counter is configured to set the fourth counter to zero when each data bit in the fourth queue stores data; the second controller is configured to determine the second Whether the value of the corresponding address on the memory is zero; wherein the abscissa of the corresponding address is the value of the fourth counter, and the ordinate is the value of the third counter; if so, the cumulative result of the fifth operator and the layer of the matching layer Identifying the input to the corresponding address of the second memory; if not, taking the accumulated accumulated result value from the corresponding address of the second memory, inputting to the second comparator, and simultaneously accumulating the current fifth operator
  • the result is input to the second comparator; the second comparator is configured to compare the cumulative result in the fifth operator with the accumulated result taken out on the second memory, when the cumulative result in the fifth operator is greater than
  • the fifth operator is configured to set the corresponding value on the newly input fourth operator.
  • the cumulative operation is performed.
  • the fifth operator subtracts the data pushed out from the fourth queue into the value of the fifth operator.
  • the value of the fourth counter is incremented by one.
  • the fourth operator is configured to repeatedly trigger the second controller, the second comparator, the fourth queue, and the fifth operator to run until the accumulated values of all the sub-operators of the fourth computing unit are all input to the fourth queue in turn.
  • the third queue is configured such that when each data bit in the third queue stores data, and the queue of the third queue inputs new data, the tail of the third queue
  • the fourth operator is configured such that each of the sub-operators in the fourth operator performs a cumulative operation on the value of the corresponding data position of the newly input third queue in the sub-operator, and after completing the operation, each The sub-operator will perform the subtraction operation on the value corresponding to the data position of the data of the push queue in the corresponding sub-operator, and the value of the third counter is incremented by one
  • the second controller is configured to repeatedly trigger the fourth operator, The fifth operator, the fourth counter, the second controller, the second comparator, the fourth queue, the fifth operator, the fourth operator, the third queue, and the fourth operator run until the matching of the current matching layer is completed.
  • an embodiment of the present invention provides a two-dimensional data matching logic circuit, where the logic circuit includes the above two-dimensional data matching Device.
  • the two-dimensional data matching method, device and logic circuit provided by the embodiment of the invention, wherein the method comprises a first operator, a first queue, a second operator, a first counter, a second queue, and a third operation which are sequentially connected
  • the second counter, the first comparator and the first memory are executed;
  • the first queue and the second queue are data storage structures, and the data storage principle of the first queue and the second queue is first in first out;
  • the data of the same data row position in the matching matrix a and the to-be-matched matrix b is processed row by row, and is input to the first queue; the matching result of the input to each sub-operator in the second operator corresponds to the data position.
  • the value is subjected to a cumulative operation; the cumulative value of the input second queue is cumulatively calculated by the third operator; the cumulative result of the third operator is compared with a pre-stored matching threshold by the first comparator, and the comparison result is input.
  • a matching result matrix is formed; the above steps are repeated until all the operation values in the second operator of the second operator are sequentially Into the second queue, and matches the completion of the match matrices have to be a matching matrix and b, all the data lines.
  • FIG. 1 is a flowchart of a two-dimensional data matching method according to an embodiment of the present invention
  • FIG. 2 is a flowchart of performing a operation on a matching result matrix corresponding to each matching layer in a two-dimensional data matching method according to an embodiment of the present invention
  • FIG. 3 is a schematic structural diagram of a first matrix and a second matrix according to an embodiment of the present disclosure
  • FIG. 4 is a schematic structural diagram of a matching layer according to an embodiment of the present invention.
  • FIG. 5 is a schematic flowchart of a layer-by-layer layer matching operation method according to an embodiment of the present disclosure
  • FIG. 6 is a schematic flowchart of a process for performing denoising on a matching result matrix according to an embodiment of the present invention
  • FIG. 7 is a schematic structural diagram of a first two-dimensional data matching apparatus according to an embodiment of the present invention.
  • FIG. 8 is a schematic structural diagram of a second two-dimensional data matching apparatus according to an embodiment of the present disclosure.
  • FIG. 9 is a schematic structural diagram of a two-dimensional data matching logic circuit according to an embodiment of the present invention.
  • the present invention provides a two-dimensional data matching method, apparatus, and logic circuit, which can be applied to two or more problems, in view of the fact that the existing two-dimensional data matching method has low computational efficiency and large computational complexity.
  • the image data similarity matching process obtained by the binocular or multi-view camera device can be applied by related hardware or software, and the following is performed by the embodiment. description.
  • Embodiment 1 is a diagrammatic representation of Embodiment 1:
  • the method is composed of a first operator, a first queue, and a first a second operator, a first counter, a second queue, a third operator, a second counter, a first comparator, and a first memory;
  • the first queue and the second queue are data storage structures, the first queue and the second The data storage principle of the queue is first in, first out;
  • the first operator, the second operator, and the third operator may be data operations processes, methods, and circuits, including: logical operations and numerical operations, including but not limited to addition operations, and combinations of some operations.
  • the object of the present invention is to provide a two-dimensional data matching method for calculating the two matching matrices of the to-be-matched matrix a and the to-be-matched matrix b having the same size and having a certain number of rows and columns in the corresponding data location region.
  • the size of the to-be-matched matrix a and the to-be-matched matrix b set in the embodiment of the present invention is (Wu) ⁇ H
  • the number of columns of the representative matrix is Wu
  • the number of rows is H
  • the size of the rectangular window matching the data is (2s+1).
  • ⁇ (2s+1) represents the distance s of the adjacent data points adjacent to the periphery of the data center matching point.
  • the above method includes the following steps:
  • Step S102 the first operator performs a bitwise matching operation on the data of the same data row position in the matching matrix a and the to-be-matched matrix b row by row;
  • Step S104 the matching result of the matching operation is input to the head of the first queue according to the row, wherein the element of the first queue is the data after the matching operation, and the number of the data storage locations of the elements of the first queue is greater than or equal to the matrix to be matched. a or the number of columns of the matrix to be matched b, the length of the first queue is the number of rows of the matching window;
  • the first operator obtains the row data i from the matrix to be matched a, and obtains the row data i from the matrix to be matched b.
  • the length of the row data i is wu, that is, the row data i includes wu data;
  • the first operation The device matches the data of the first column of the row data i of the matrix to be matched with the data of the first column of the row data i of the matrix to be matched, and the operation result is saved to the corresponding position of the first column of the first operator, and then
  • the data of the second column of the row data i to be matched is matched with the data of the second column of the row data i of the matrix to be matched, and the operation result is saved to the corresponding position of the second column of the first operator, and so on.
  • the operation result is saved to the corresponding wu column of the first operator Position, at this point, the above matching result is generated.
  • the matching result is row data of length wu.
  • the number of the first queue element data is the maximum number of columns of the first matrix and the second matrix, that is, w, the number is greater than the quantity of the row data wu; the maximum number is set to satisfy all possible matching operations, and the row data is The calculation of the quantity less than the amount of element data does not operate on the position of the remaining element data; the length of the first queue is set to the value of the row of the matching window, for example, set to 2s+1; usually, 2s+ The value of 1 is not greater than the row value and the column value of the matrix to be matched a and the matrix to be matched b; preferably, in the 2s+1, the value of s is a natural number between 1 and 30.
  • the above matching operations include, but are not limited to, the following operations: logical AND, logical exclusive OR, addition, subtraction, or multiplication, and an algorithm formed by combining the above algorithms.
  • Step S106 each of the first queues of the first queue inputs a matching result, and each of the second operators performs a cumulative operation on the values of the input matching data positions, wherein the second operator includes a column operation
  • the number of sub-operators is the same as the number of data storage locations in the elements of the first queue, and the location of each sub-operator corresponds to the data storage location on the elements of the first queue;
  • Step S108 when each data bit in the first queue stores data, the first counter is set to zero;
  • each sub-operator in the second operator is an integrated value on the data position of each element in the length direction of the queue, and the value corresponds to the cumulative value on the (2s+1) single column matching the direction of the window column;
  • Step S110 outputting the cumulative value of each sub-operator of the second computing unit to the head of the second queue in the order of the data position, wherein the length of the second queue is the same as the number of columns of the matching window;
  • Step S112 after the head of the second queue inputs the accumulated value of the sub-operator in the second operator, the third operator performs an accumulative operation on the integrated value of the input, wherein the third operator is a single operator. ;
  • Step S114 when each data bit in the second queue stores data, the value of the second counter is set to zero;
  • the value in the third operator is the cumulative value of the accumulated value in the sub-operator in the second operator in the direction of the data position of the queue element, and the value corresponds to (2s+1) rows in the row direction of the matching window, (2s) +1) the cumulative value of the accumulated values on the columns, that is, the total accumulated value of the data at all data positions in the matching window (2s+1) ⁇ (2s+1), which also represents the center position of the window.
  • the degree of matching between the two data points at the position in the matching matrix a and the matrix to be matched b in general, the larger the value, the higher the matching degree of the two points.
  • Step S116 input the cumulative result of the third computing unit to the first comparator
  • Step S118 the first comparator compares the accumulated result in the third operator with a pre-stored matching threshold.
  • the comparison result is the first value
  • the comparison result is the second value
  • the first value indicates that the comparison result is true, or is 1
  • the second value indicates that the comparison result is false or 0;
  • the pre-stored matching threshold represents a threshold that must be met for the matching degree between the two matching points. If the threshold is exceeded, the two points are successfully matched. Below the threshold, the matching condition is not met between the two matching points. Match failed; the threshold can be According to the application environment, the larger the threshold setting, the fewer matching points are successfully matched; the smaller the threshold setting, the more matching points are successfully matched.
  • Step S120 the comparison result is input to the first memory to form a matching result matrix, the abscissa of the matching result matrix in the first memory is the value of the second counter, and the ordinate is the value of the first counter;
  • the matching result saved by the matching result matrix corresponds to the matching result on the data point after the edge of the to-be-matched matrix a and the upper-left corner of the to-be-matched matrix b with the width s removed, if the original matching matrix a and the matrix to be matched are
  • the coordinates of b are the matching results of the points at the (s+1, s+1) position of the matrix to be matched a and the matrix b to be matched.
  • the coordinates of this point in the matching result matrix are (0, 0);
  • Step S122 when each data bit in the second queue stores data, when the new queue receives the new data, the second queue pushes the data of the tail to the second queue, and the third operator will The corresponding value on the sub-operator of the newly input second operator is subjected to a cumulative operation in the third operator. After the operation, the third operator then pushes the data in the tail of the second queue in the third operator. The subtraction operation is performed in the value, and the value of the second counter is incremented by 1 after the operation;
  • the cumulative value of the third operator represents the matching result of the points at the (s+2, s+1) position of the matrix to be matched a and the matrix to be matched b;
  • the operation in this step makes full use of the existing matching operation result, only accumulates the newly added head matching, and then removes the tail data, which greatly reduces the double counting, and at the same time, utilizes the queue structure pole.
  • the storage space of the intermediate data is greatly saved, and the data access operation is facilitated.
  • Step S124 repeating steps S116 to S122 until all the operation values in the sub-operators of the second operator are sequentially input into the second queue to complete all matching of the current data rows in the matrix to be matched a and the matrix to be matched b;
  • the matching result saved by the matching result matrix corresponds to the (s+1)th row in the to-be-matched matrix a and the to-be-matched matrix b. After the data points whose widths are s are removed, all the data points correspond to the data matching window size. (2s+1) ⁇ (2s+1) matching result. For the matching result matrix, that is, the matching result operation of all the data points of the 0th line is completed.
  • Step S126 after the above steps are completed, when data is stored in each data bit in the first queue, when the first queue team first inputs new data, the data of the tail queue of the first queue is pushed out of the first queue, and the second
  • Each sub-operator in the computing unit performs a cumulative operation on the value of the new data position corresponding to the head of the first queue. After the operation is completed, each sub-operator will then launch the corresponding data position at the end of the first queue. The value is subtracted from the value of the corresponding sub-operator, and the first counter is incremented by one;
  • the values in the sub-operators of the second operator are the cumulative values of the data of the elements in the length direction of the queue (2s+2) in the second row of the matrix to be matched and the second row to be matched;
  • the operation in this step also makes full use of the existing matching operation results, only accumulates the newly added head matching, and then removes the tail data, which greatly reduces the double counting, and at the same time, greatly saves the use of the queue structure.
  • the storage space of the intermediate data facilitates data access operations.
  • step S1208 steps S110 to S126 are repeated until all matching operations of all data rows in the matrix to be matched a and the matrix to be matched b are completed.
  • the matching operation of one row of data in the matrix to be matched a and the matrix to be matched b is completed, and the result matrix is matched, and a matching result is added until all the rows are matched.
  • the matching result matrix is reduced by 2s data bits on the row and column, respectively, than the size of the matrix to be matched.
  • a two-dimensional data matching method includes a first operator, a first queue, a second operator, a first counter, a second queue, a third operator, a second counter, and a first
  • a comparator and the first memory are executed; the first queue and the second queue are data storage structures, and the data storage principle of the first queue and the second queue is first in first out; the matching matrix a and the row are processed by the first operator
  • the data of the same data row position in the matching matrix b is subjected to a bitwise matching operation and input to the first queue; each sub-operator in the second operator performs a cumulative operation on the input matching result corresponding to the value at the data position;
  • the third operator performs an accumulation operation on the integrated value of the input second queue; the first comparator compares the accumulated result in the third operator with a pre-stored matching threshold, and inputs the comparison result to the first memory to form a match.
  • Embodiment 2 is a diagrammatic representation of Embodiment 1:
  • the embodiment of the present invention provides a flow chart of a second two-dimensional data matching method, which is implemented on the basis of the two-dimensional data matching method provided in the first embodiment.
  • An operator a first queue, a second operator, a first counter, a second queue, a third operator, a second counter, a first comparator, and a first memory, and a second controller, a third a queue, a fourth operator, a third counter, a fourth queue, a fifth operator, a fourth counter, a second comparator, and a second memory; wherein the third queue and the fourth queue are data storage structures,
  • the data storage principle of the three queues and the fourth queue is first in first out;
  • the fourth operator and the fifth operator are data operation processes, methods and circuits, including: logical operations and numerical operations, including but not limited to addition operations, and include A combination of some operations.
  • the method first includes the step of generating a matching layer by the first controller, which specifically includes the following steps 1-4:
  • Step 1 The first controller acquires the first matrix and the second matrix.
  • Step 2 The first controller saves the first matrix and the second matrix to the first storage area and the second storage area, respectively;
  • Step 3 according to the set matching path, each time the distance is matched according to the set unit, the first controller moves the second matrix to change the overlapping area of the first matrix and the second matrix;
  • the set moving path includes a line path or a path; the line includes one or more of a horizontal line path, a vertical line path, and a slant line path; the surface path includes a plurality of lines of the same type;
  • Step 4 The first controller generates a matching layer according to the overlap region generated by each movement; wherein the matching layer includes a matrix to be matched a and a matrix to be matched b and a layer identifier of the matching layer. Specifically, the first controller uses the data corresponding to the row and column values of the coincident region in the first matrix as the matrix to be matched a; the first controller corresponds the row and column values of the coincident region in the second matrix to the row and column values.
  • the data is used as the to-be-matched matrix b; the first controller moves the distance moved by the second matrix as the layer identifier of the matching layer; and saves the to-be-matched matrix a, the to-be-matched matrix b, and the layer identifier as a matching layer.
  • the first matrix and the second matrix include two two-dimensional image data matrices acquired by a binocular parallel camera; the two-dimensional image data matrix includes a binary image matrix or a Boolean matrix.
  • the two-dimensional data matching method provided by the embodiment of the present invention can be applied to a plurality of two-dimensional data, for example, data of a two-dimensional matrix structure, data representing a planar image, and various types of planar two-dimensional table data; a dimensional image data matrix, for example, a two-dimensional image data matrix acquired by a binocular parallel camera; preferably, the method can also be applied to a binary image matrix or a Boolean matrix; in the embodiment of the present invention, the source of the two-dimensional data And specific forms of expression are not limited.
  • the row and column values in the first storage area occupied by all the data in the first matrix do not coincide with the row and column values in the second storage area occupied by all the data in the second matrix; for example, the second matrix is located at the first The horizontal left side of the matrix, the horizontal right side, the vertical upper side, or the vertical lower side.
  • the horizontal line path may be that the second matrix moves from the left side of the first matrix to the right side of the first matrix, and the vertical line path may move from the upper side of the first matrix to the lower side of the first matrix; the above-mentioned surface path may Include a plurality of horizontal line paths, for example, the second matrix moves horizontally from the upper left corner of the first matrix to the right side of the first matrix, and when moved to the upper right corner of the first matrix, moves down one data point position, continuing to the first Move to the left of the matrix, and so on.
  • the unit moving distance may be set according to an application environment. Preferably, the unit moving distance may be one data point position.
  • a set of the first matrix and the second matrix may generate a plurality of matching layers, and each matching layer includes part or all of the data in the first matrix and the second matrix, which are coincident;
  • the two-dimensional data matching process only performs data that coincides, and does not perform matching processing on non-coincident data. Therefore, by setting a matching layer, the amount of data matching can be reduced, thereby improving the efficiency of data matching.
  • the method further includes: Step 5: For each matching layer, the first controller sequentially acquires the row data of the to-be-matched matrix a and the different positions in the matrix to be matched b according to the set order; the row data acquired each time The position in the matrix to be matched a is the same as the position in the matrix to be matched b; the line data acquired each time is output to the first operator; wherein the order of setting includes at least one of the following: from up to The next line-by-row acquisition, or, from bottom to top, is obtained line by line, or from left to right, column by column, or right to left column by column.
  • the first controller acquires rows in the two to-be-matched matrices row by row from top to bottom, and the first operator obtains row data of the i-th row from the matrix to be matched a, and the same from the matrix to be matched b Get the row data of the i-th row.
  • steps S102 to S123 provided in the first embodiment are performed to obtain a matching result matrix corresponding to each matching layer. Since each matching layer contains two matrixes to be matched, each matching layer corresponds to one matching result matrix; since the size of the matrix to be matched in each matching layer is different, the size of the matching result matrix corresponding to each matching layer is not For example, when the size of two two-dimensional data matrices to be matched is h rows and w columns, and the number of rows of the first queue set is 2s+1, the size of the corresponding matching result matrix is h-2s rows. W-2s column.
  • Step 6 The second controller acquires the matching result matrix obtained by the matching operation of the to-be-matched matrix a and the to-be-matched matrix b corresponding to each matching layer, and the layer identifier of the matching layer.
  • Step 7 the second controller sets an initial value of all corresponding addresses on the second memory to zero;
  • FIG. 2 a two-dimensional data matching method, and a schematic flowchart of the operation process of denoising the matching result matrix shown in FIG. 6, and a flowchart for operating the matching result matrix corresponding to each matching layer;
  • the purpose is to have a certain number of rows in the corresponding data location area according to the matching result matrix of each layer for the same region in the first matrix and the second matrix on different matching layers.
  • calculate and compare the matching effect of each layer remove the matching ambiguity, save the best regional layer matching data, and give the final matching result.
  • the size of the calculation window is (2m + 1) ⁇ (2m + 1), and the layer identifier is u.
  • Different calculation windows can be set for different matching layers, and the calculation window can also be linearly or nonlinearly changed according to the formula.
  • Performing operations on each matching result matrix in the order in which the matching layers are generated includes the following steps:
  • Step S202 obtaining row data in the matching result matrix of the current matching layer row by row, and inputting the row data into the head of the third queue, wherein the elements of the third queue are the row data in the matching result matrix, and the elements of the third queue
  • the number of data storage locations is greater than or equal to the number of columns of the largest matching result matrix in all matching result matrices, and the length of the third queue is the number of rows of the set calculation window;
  • Step S204 the head of the third queue inputs the row data in the matching result matrix of the current matching layer, and each sub-operator in the fourth operator performs the cumulative operation on the value in the corresponding data position in the input row data.
  • the fourth operator includes a column operator, the number of the column operator is the same as the number of data storage locations of the elements of the third queue, and the position of each child operator corresponds to the position on the element of the third queue. ;
  • Step S206 when each data bit in the third queue stores data, the third counter is set to zero;
  • the value in each sub-operator of the fourth operator is an integrated value on the data position of each element in the length direction of the third queue, and the value corresponds to the cumulative value on the (2m+1) single column in the direction of the column of the calculation window;
  • Step S208 outputting the cumulative value of each sub-operator in the fourth computing unit to the head of the fourth queue in the order of the data position, wherein the length of the fourth queue is the same as the number of columns of the set calculation window;
  • Step S210 the head of the fourth queue, after each input of the accumulated value of the sub-operator of the fourth operator, the fifth operator performs the cumulative operation on the integrated value of the input, wherein the fifth operator is a single operation.
  • Step S212 when each data bit in the fourth queue stores data, the fourth counter is set to zero;
  • the value in the fifth operator is the cumulative value of the accumulated value in the sub-operator in the fourth operator in the direction of the data position of the third queue element, and the value corresponds to (2m+1) rows in the row direction of the calculation window.
  • (2m+1) the cumulative value of the accumulated values, that is, the total accumulated value of the data at all data positions in the calculation window (2m + 1) ⁇ (2m + 1), which also represents the center of the window
  • the degree of association between the data point at the position in the u-layer matching result matrix and the data in the surrounding (2m+1) ⁇ (2m+1) range. Generally, the larger the value, the association of the point with the surrounding points. The higher the degree.
  • Step S214 determining whether the value of the corresponding address on the second memory is zero; wherein the abscissa of the corresponding address is the value of the fourth counter, and the ordinate is the value of the third counter; if yes, the cumulative result of the fifth operator And the layer identifier of the matching layer is input to the corresponding address of the second memory; if not, the accumulated accumulated result value is taken out from the corresponding address of the second memory, and input to the second comparator, and at the same time, the current The cumulative result in the fifth operator is input to the second comparator;
  • Step S216 the second comparator compares the accumulated result in the fifth computing unit with the accumulated result value taken out on the second memory, and when the accumulated result in the fifth computing unit is greater than the accumulated result value taken out in the second memory, The accumulated result in the fifth computing unit is stored in the corresponding address in the second memory instead of the accumulated result value in the second memory, and the layer identifier of the matching layer corresponding to the current matching result matrix is replaced by the corresponding corresponding in the original second memory.
  • the layer identifier already stored in the address is stored in the corresponding address of the second memory;
  • Comparing the accumulated value in the current fifth operator with the accumulated value on the other matching layers at the position is to compare the amount of surrounding data in the matching layer corresponding to the two values, and then determine the value at the position and the surrounding data.
  • the corresponding value on the fourth computing unit performs a cumulative operation in the fifth computing unit.
  • the fifth computing unit performs the subtraction operation on the data pushed out in the fourth queue in the value of the fifth computing unit.
  • the value of the fourth counter is incremented by one; that is, step S218 is one step forward in the direction of the column.
  • Step S220 repeating steps S214-S218 until all the cumulative values of all the sub-operators of the fourth computing unit are sequentially input into the fourth queue to complete the operation of the current row of the matching result matrix;
  • Step S222 after completing the above steps, when each data bit in the third queue stores data, and the queue head of the third queue inputs new data, the tail queue data of the third queue is launched into the third queue, and the fourth
  • Each sub-operator in the operator performs a cumulative operation on the value of the corresponding data position of the newly input third queue in the sub-operator. After the operation is completed, each sub-operator will push out the value of the corresponding data position of the data of the queue.
  • the subtraction operation is performed on the value of the corresponding sub-operator, and the value of the third counter is incremented by one; that is, step S222 is further calculated one step forward in the direction of the line.
  • Step S224 repeating steps S208-S222 until all operations of all rows in the matching result matrix of the current matching layer are completed;
  • Step S226, steps S202-S224 are repeated to complete the operation of the next matching result matrix and the matching layer until the operations of the matching result matrix corresponding to all matching layers are completed; wherein the second memory is used to store the final result matrix, and the final result matrix Stored at each address is the maximum accumulated result cumulative value data obtained after the comparison of the accumulated results on the corresponding addresses of all matching layers, and the layer identifier corresponding to the accumulated value of the largest accumulated result value, until all the layers are completed.
  • the operation of the matching result matrix corresponding to the matching layer is the maximum accumulated result cumulative value data obtained after the comparison of the accumulated results on the corresponding addresses of all matching layers, and the layer identifier corresponding to the accumulated value of the largest accumulated result value, until all the layers are completed.
  • a two-dimensional data matching method provided by an embodiment of the present invention, where the method is performed by a first controller, an operator, a first queue, a second queue, a first comparator, and a first memory connected in sequence, and a second connected in sequence
  • the controller, the third queue, the fourth queue, the second comparator, and the second memory are executed.
  • First, multiple matching layers of the first matrix and the second matrix are acquired, and data in the matching layer is matched and processed.
  • the matching result matrices corresponding to the matching layers are compared and selected to obtain the best matching layer of different regions; when the data block matching in the two-dimensional data is performed by this method, only the data changing portion between adjacent data blocks may be used.
  • Embodiment 3 is a diagrammatic representation of Embodiment 3
  • the embodiment of the present invention provides a two-dimensional image matching method.
  • the two-dimensional image is obtained by a binocular camera; when matching two two-dimensional images, it is generally required to calculate depth data of the corresponding image according to the two images, and can perform three-dimensional state description on the object to be viewed.
  • the two-dimensional image matching method will be specifically described below.
  • first matrix and the second matrix are both W*H; for convenience of description
  • the first matrix and the second matrix have the same size as an example.
  • the first matrix and the second matrix size relationship are not specifically defined; the data points in the matrix may be set to a Boolean value, and may also be based on data.
  • the value range or size is set to a value of 8 bits, 16 bits, 32 bits, or 64 bits or other values that can be used for other operations; typically, if the above matrix is a grayscale image, the data size in the image is 8 bits, representing 0. Different image gradations between ⁇ 255.
  • the value can be changed to a Boolean matrix containing only two values of 0 and 1.
  • the Boolean matrix can be used to maximize Save data storage space and increase data transfer speed and efficiency.
  • a matrix formed by a Boolean value is taken as an example for description. It can be understood that the two-dimensional image matching method provided by this embodiment can also be used as a matrix formed with other numerical values.
  • the matching block size that participates in the matching operation is set to (2s+1) ⁇ (2s+1).
  • Judging the similarity of the image locality is to calculate the similarity measure index of the image, also called image matching; the image matching can be based on the gray image or the binary image, and the similarity measure has various algorithms, for example: correlation coefficient, Difference sum, difference absolute sum, least squares, distance function, cost function, and so on.
  • the method provided by the embodiment of the present invention is applicable to two matching block operations, and the algorithm used in the calculation is that the pixels of the corresponding position are operated one by one, and the last value is calculated by summing or other cumulative methods, for example: two Algorithms for grayscale differences in image regions, differences in binary images, correlation coefficients, sum of squared differences, absolute sums of differences, and least squares.
  • the corresponding pixels of the binary image are directly logically summed, and then the entire matching region is counted, and the calculated result is the number of true values (arithmetic value 1), which is compared with a threshold or other calculated value. Similar measure of the two regions.
  • the other algorithms listed above can be based on this method, using other calculators and accumulators to complete the calculation, the operation method, principle and path are exactly the same. In general, most of the arithmetic algorithms can be converted into addition operations, as long as they are addition operations, and the pixels are relatively independent between the operations, and can be completed and implemented by the method provided by the embodiments of the present invention.
  • a matching point on another image corresponding to a feature point on one image is located on a line passing through the feature point and being parallel to the two camera focus lines. That is to say, the ordinates of the corresponding matching points in the image A and the image B are the same, and both are located on the longitudinal coordinate line corresponding to the two sets of data, and the direction and path of the matching operation are horizontal, which may be called horizontal matching or horizontal Matching; similarly, when two cameras are aligned up and down, and the imaging plane is on the same plane, the direction and path of the matching operation are vertical, which can be called Vertical matching or vertical matching;
  • the matching point on the other image corresponding to the feature point on one image forms a plane with the three points of the viewpoint on the object, and the plane and the image plane of the two images The intersection line between them is called the polar line, and the matching point on the other image corresponding to the feature point on one image is located on the pole line.
  • the polar line generally forms an angle with the horizontal line of the image.
  • the position of the object space changes, the angle between the polar line and the horizontal line also changes, and the direction and path of the matching operation are the direction of the polar line, which may be called tilt matching or oblique line matching; for the binocular tilt camera
  • the angle between the polar line corresponding to the matching point group and the horizontal line is an indeterminate range of variation.
  • a full-image search to perform a full-image traversal operation, also called a full-image (full array) matching.
  • the horizontal matching, the vertical matching, and the slash matching can be defined as a one-dimensional line matching; the full picture (full array) matching is a two-dimensional surface matching; the embodiment of the present invention first describes the matching in the one-dimensional dimension, and for the surface matching, After the dimensional operation is completed, the one-dimensional vertical shift is performed, and then the one-dimensional operation is performed, and the one-dimensional operation and the one-dimensional operation are sequentially performed until the full image (full array) operation is completed.
  • One-dimensional line matching takes horizontal matching as an example, and other vertical matching and diagonal matching principles and methods are unchanged.
  • FIG. 4 shows a superimposed state in the horizontal direction of the first matrix A and the second matrix B, and the data block size of the participating matching operation capable of representing the center point image or the data feature is (2s+1) ⁇ (2s+1);
  • the data center is s from the edge of the data block.
  • u represents the code of the horizontal matching layer, which can also be considered as horizontal matching coordinates.
  • the matching result matrix needs to be in the effective matching area, and the effective matching area needs to be subtracted from the edge of the superimposed area, as shown in FIG. Black thick wire frame.
  • the effective matching area of each layer is gradually reduced.
  • the size of the layer matching result matrix is (W-u-2s) ⁇ (H-2s), and the matching matching matrix of the layer matching result matrix and the left side position of the second matrix b are unchanged.
  • the matching superposition position corresponding to the position of the right side of the first matrix a is unchanged, and for each value of u, the right side of the second matrix b is reduced by one column, and the left side of the first matrix a is decreased by one column.
  • the pixels on one image should have at most one final matching result, that is, the matching operation result should be unique, so it is also necessary to define a final matching result matrix.
  • the variables and subscripts of the layer matching result matrix and the final matching result matrix are in one-to-one correspondence according to the matching correspondence relationship with the second matrix B, that is, the row coordinates and the column coordinates are matched by the second matrix B.
  • the relationship prevails.
  • the matching result matrix in the first embodiment or the second embodiment is equivalent to the layer matching result matrix.
  • the different layer numbers u correspond to the parallax between the matching pixels on the two images, and the parallax value u
  • the size is inversely proportional to the distance from the viewpoint on the object to the camera. The smaller the parallax u, the farther the distance.
  • the imaging centerlines of the two cameras are parallel to each other and perpendicular to the image plane, and the field of view of the two images increases as the depth of measurement increases.
  • the superimposed area of the two images also increases with the increase of depth.
  • the two images can be considered to be completely superimposed.
  • the process of u from zero to W-2s layer the superimposed area gradually becomes smaller, which means that the depth of the field of view becomes smaller as the depth of the two cameras becomes smaller.
  • the position coordinate of the image matching point on the left side is always to the right side than the position coordinate of the matching point on the right side. Therefore, in the matching, according to the direction of FIG. 4, the first matrix A on the left side moves to the left side, and it can also be considered that the second matrix B on the right side moves to the right.
  • the so-called horizontal matching layer-by-layer operation is to find the corresponding matching point and the viewed point on the object at different depths.
  • the result of this operation is that the two two-dimensional images are expanded and fitted in three-dimensional space, which is the physical meaning of the method matching by layer.
  • the method of completely horizontal matching operation is described by taking the first matrix A and the second matrix B as an example.
  • the matching method is: assuming that B is fixed, A is superimposed with B from the first column on the right side, and then is pressed every time. The method of moving the distance of one column, the matching operation is performed layer by layer, and after all the superposition, the movement is continued until A completely moves to the right side of B and is separated.
  • the pixel coordinate position of the two images is (W-u) ⁇ H, and the result matrix after the operation is (W-u-2s) ⁇ (H-2s), the pixel coordinate position of the two images.
  • the corresponding relationship is shown in Fig. 4.
  • the result matrix is equal to a rectangle embedded in the superimposed region and separated from the four sides by s. At this time, the pixel coordinate positions of the two images are completely one-to-one correspondence.
  • the purpose of layer matching operation is to match (W-u) ⁇ H in the matching u layer of the two images of A and B, and find the size with similar features (2s+1) ⁇ (2s+1). Match the block.
  • a basic formula and principle of the operation is: in the (2s+1) ⁇ (2s+1) matching block, the pixels at the same position of the two images are directly logically ANDed, and then counted ( 2s+1) ⁇ (2s + 1) in the matching block, the logical AND operation results in the total number of true values (arithmetic value of 1), the total number is compared with the threshold, when greater than the threshold, the two regions If the match is successful, the result matrix value corresponding to the center point is set to 1, otherwise it is set to zero.
  • the operation flow corresponds to the flow of the two-dimensional data matching method provided in the first embodiment; the operation flow includes the following steps:
  • the first queue of size (W-u) ⁇ (2s+1) is set, and the operation result of step (1) is input to the first queue line by line in a first-in-first-out manner.
  • each column is respectively provided with a column accumulator, and the number of the entire row input each time in the column position corresponding to the 2s+1 column direction is sequentially accumulated in the corresponding column accumulator, when the queue When the 2s+1 column is filled, the column accumulator completes an operation, and the corresponding value is the row position coordinate corresponding to the center of the queue at this time, and the corresponding value of all the values on the corresponding 2s+1 column is 1. After the calculation is completed, the calculation is completed. The value is taken out to the next data processing flow.
  • the value of the row of the head of the first queue is subtracted from the current value in the corresponding column accumulator, and the value of the row at the end of the queue Automatically pushed out of the queue, and then a new line from the queue entry queue, the corresponding column accumulator plus the value of the corresponding row position of the new input row, equivalent to the column accumulator recalculated in the 2s + 1 column direction
  • the sum of the data bits is
  • the accumulated value is the matching value of the (2s+1) ⁇ (2s+1) matching block center point at the coordinate position of the value, and is also at (2s+1) ⁇ (2s+1)
  • the total number of A and B image corresponding data in the matching block area is completely superimposed and the logical sum is 1, representing the similarity of the two images in the area. After the calculation is completed, the value is taken out to the next data processing flow.
  • the accumulated value Z obtained in the step (3) is stored in the data result matrix of the corresponding position, and compared with the matching threshold Q when stored, if the accumulated value Z is greater than the matching threshold Q, the value at the position is set to 1 Otherwise, set to 0.
  • the corresponding position is calculated by using the row coordinates of the row accumulator 2s+1 center data as the column coordinates of the data, and the row coordinates of the center data of the 2s+1 rows in the column accumulator as the row coordinates of the data.
  • the size of the matching result matrix is (W-u-2s) ⁇ (H-2s).
  • the final result is stored in the corresponding position of the matching result matrix according to the above row coordinates and column coordinates.
  • the data on one matrix should have at most one final matching result, that is, the matching operation result should be unique. It should not be that the points on one matrix correspond to multiple points on another matrix. Since the matching is calculated by layer, in the layer matching operation, the data in the two matrices is uniquely corresponding on the layer. However, if the layer matching result of the multi-layer matching is combined, since the similarity judgment criterion larger than the matching threshold is adopted, it is inevitable that the matching of the feature points on one matrix in the results of different matching layers will occur, resulting in two One-to-many, many-to-many phenomenon between images.
  • the process of writing the result of the layer-by-layer operation into the result matrix on the dimension is to match the matching result matrix of different layers in the matching dimension, and calculate the matching of the pixel point in different layers based on the pixel points of one of the images. State, then, perform comparison operations between matching result matrices of different layers, retain the matching result of the layer that may match the largest match, remove other ambiguous matches, and realize the uniqueness of the matching result.
  • This process is also called denoising, and the step algorithm It can also be called a denoising algorithm.
  • the method of the denoising algorithm is to count the number of total points that have been matched in the data block around the matching point (2m+1) ⁇ (2m+1) in the matching result matrix corresponding to each matching layer, and match the matching point.
  • the number of points indicates that the neighboring point of the point also satisfies the matching condition, represents the continuity feature of the image data in the spatial position, and removes the noise according to the continuity feature.
  • the range of the above (2m+1) is not larger than the row value and the column value of the matching result matrix.
  • the value of m is a natural number between 1 and 20.
  • FIG. 6 a schematic diagram of an operation flow for denoising a matching result matrix; the operation flow corresponds to a two-dimensional data matching method provided in the second embodiment, and the matching result matrix corresponding to each matching layer is operated.
  • Process includes:
  • a third queue of size (w-2s) ⁇ (2m+1) is set, and the fetched row data is input to the third queue line by line in a first-in-first-out manner.
  • one column accumulator is set for each column, and each column accumulator corresponds to one column position coordinate.
  • the matching result matrix is gradually reduced, and its width is (w-2s-u).
  • the variable and the subscript of the column coordinate position always have a one-to-one correspondence with the matching correspondence of the image b, that is, the column position is aligned to the right and is reduced layer by layer.
  • the number of the entire row input each time in the column position corresponding to the 2m+1 column direction is sequentially accumulated in the corresponding column accumulator, and when the queue is filled with 2m+1 columns, the column accumulator completes an operation, and
  • the corresponding value is the row position coordinate corresponding to the center of the queue row at this time, and the corresponding value of all the values on the corresponding 2m+1 column is 1. After the calculation is completed, the value is taken out to the next data processing flow.
  • the value of the last row of the third queue is subtracted from the current value in the corresponding column accumulator by the value of the row corresponding column position.
  • the new line enters the queue leader.
  • the value of the line at the end of the third queue is automatically pushed out from the queue.
  • the corresponding column accumulator is added with the value of the corresponding column position of the newly input row, which is equivalent to the column accumulator recalculation.
  • the fourth queue of length 2m+1 adopt the first-in-first-out method, and sequentially take out the value of each column cumulative bit from the column accumulator, input the value into the fourth queue, set a line accumulator, and then Each time the input value is accumulated, when the fourth queue is filled with 2m+1 values, the line accumulator completes an operation, and the coordinates of the corresponding calculated value are the position coordinates of the value corresponding to the center position of the fourth queue at this time.
  • the accumulated value is the number of points at which the (2m+1) ⁇ (2m+1) data block achieves matching at the coordinate position of the value, indicating that the matching has been performed. Whether there is good spatial continuity between points. After the calculation is completed, the value is taken out to the next data processing flow.
  • the value of the tail of the fourth queue is first subtracted from the current value in the row accumulator, and the value of the new column accumulator is input to the fourth queue.
  • the value at the end of the team is automatically pushed out from the fourth queue.
  • the value of the newly input column accumulator is added to the line accumulator, which is equivalent to the sum of the values of the 2m+1 column accumulators calculated by the line accumulator.
  • the accumulated value G calculated by each row accumulator in the above step (3) is stored in the final matching result matrix of the corresponding position, and the original value Y in the final matching result matrix of the corresponding position is first taken out and stored this time. If the cumulative value G is greater than the original value Y, the accumulated value G is stored in the final matching result matrix of the corresponding position instead of the original value Y. If the current cumulative value G is smaller than the original value Y, the original corresponding The original value Y of the position remains unchanged.
  • the new matrix needs to record the data of the corresponding layer u, which represents the parallax of the matching point.
  • the calculation of the corresponding position is as shown in Fig. 5.
  • the column coordinates of the row accumulator 2m+1 center data are the column coordinates of the data, and the row coordinates of the center data of the 2m+1 row in the column accumulator are the row coordinates of the data.
  • the data structure of the original image is a W ⁇ H two-dimensional data structure.
  • the structure of the layer matching result matrix is a two-dimensional data structure of (W-u-2s) ⁇ (H-2s), and denoised.
  • the final matching result matrix size is (W-2s-2m) ⁇ (H-2s-2m).
  • the corresponding matching pixels and matching points and the coordinates of the result matrix are all in the b-picture.
  • the row and column coordinates are calculated as a basis, as shown in Figures 5 and 6.
  • the completed result matrix represents that the image b obtained by the binocular parallel camera is matched with the image a, corresponding to the position coordinates of the point at which the image b pixel can achieve the final match with the image a, and the matching point with the corresponding image a
  • the disparity value u between two matching points According to the u value and the correlation calculation formula of binocular matching, the spatial position coordinates of the viewpoint can be obtained.
  • the method provided by the embodiment of the invention can form a set of processing devices to automatically complete processing and calculation of data.
  • the device can be implemented in software, or the algorithm can be formed into a dedicated hardware chip, and the data is processed by using a digital circuit.
  • the method is a method based on basic operations. If the algorithm is transplanted to a large-scale parallel processing dedicated chip GPU, NPU, and FPGA for calculation based on the method, the additional acceleration performance provided by such a chip can also be obtained. . According to this method, a dedicated arithmetic chip can also be developed. Using this method will greatly improve the speed and efficiency of the operation, save the data storage space, improve the data access speed, reduce the consumption of computing resources, and compare the efficiency by 60 times or more than the traditional method.
  • the device includes a first operator 70, a first queue 71, a second operator 72, and a first connected in sequence.
  • the first queue 71 and the second queue 74 are both data storage structures, the first queue 71 And the data storage principle of the second queue 74 is first in, first out;
  • the first operator 70 is configured to perform a bitwise matching operation on the data of the same data row position in the matching matrix a and the to-be-matched matrix b row by row; the matching result of the matching operation is input to the head of the first queue by the row, where
  • the element of the first queue is the data after the matching operation, and the number of data storage locations of the elements of the first queue is greater than or equal to the number of columns of the matrix to be matched a or the matrix to be matched b, and the length of the first queue is the set matching window.
  • the number of rows of the matching operation is input to the first queue head by row, wherein the number of data storage locations of the queue elements of the first queue is greater than or equal to the number of columns of the matrix to be matched a or the matrix to be matched b,
  • the length of a queue is the number of rows of the matching matching window;
  • each of the first queues of the first queue inputs a matching result, and each of the second operators performs a cumulative operation on the input matching result corresponding to the value of the data position, wherein the second operator includes a list of sub-operators, the number of sub-operators being the same as the number of data storage locations in the elements of the first queue, and the position of each sub-operator corresponds to the data storage location on the elements of the first queue;
  • the first counter 72 is configured to set the first counter to be zero when each data bit in the first queue stores data
  • the second operator 72 is configured to output the cumulative value of each sub-operator of the second computing unit to the head of the second queue in the order of the data position, wherein the length of the second queue is the same as the number of columns of the matching window;
  • the third operator 75 is configured such that the head of the second queue is subjected to a cumulative operation of the input integrated value after each input of the accumulated value of the sub-operator in the second operator, wherein the third operation Is a single operator;
  • a second counter 76 configured to set a value of the second counter to zero when each data bit in the second queue stores data
  • a third operator 75 configured to input the cumulative result of the third operator to the first comparator
  • the first comparator 77 is configured to compare the accumulated result in the third operator with a pre-stored matching threshold, and when the accumulated result in the third operator is greater than the matching threshold, the comparison result is the first value; When the cumulative result in the operator is less than the matching threshold, the comparison result is the second value; wherein the first value indicates that the comparison result is true, or is 1; the second value indicates that the comparison result is false. Or 0; input the comparison result to the first memory to form a matching result matrix, the abscissa of the matching result matrix in the first memory is the value of the second counter, and the ordinate is the value of the first counter;
  • the second queue 74 is configured to: when each data bit in the second queue stores data, when the first queue of the second queue inputs new data, the second queue pushes the data of the tail to the second queue;
  • the third operator 75 is configured to perform a cumulative operation on the corresponding value of the sub-operator of the newly input second operator in the third operator, and after the operation, the third operator is in the tail of the second queue.
  • the data that is pushed out is subtracted from the value of the third operator, and after the operation, the value of the second counter is incremented by one;
  • the second operator 72 is configured to repeatedly trigger the third operator, the first comparator, the second queue, and the third operator to run until all the operation values in the second operator of the second operator are sequentially input into the second queue. To complete all matches of the current data row in the matrix to be matched a and the matrix to be matched b;
  • the first queue 71 is configured to: when each data bit in the first queue stores data, when the first queue head re-enters new data, the data of the tail of the first queue is pushed out of the first queue;
  • the second operator 72 is configured such that each sub-operator of the second operator further performs a cumulative operation on the value of the new data position corresponding to the head of the first queue. After the operation is completed, each sub-operator will be launched again.
  • the value of the corresponding data position at the end of a queue is decremented on the value of the corresponding sub-operator, and the first counter is incremented by one; the second operator, the third operator, the second counter, and the third operator are repeatedly triggered.
  • the first comparator, the second queue, the third operator, the second operator, and the first queue run until all matching operations of all the data rows in the matrix to be matched a and the matrix to be matched b are completed.
  • the two-dimensional data matching device includes a first operator, a first queue, a second operator, a first counter, a second queue, a third operator, a second counter, and a first A comparator and the first memory are executed; the first queue and the second queue are data storage structures, and the data storage principle of the first queue and the second queue is first in first out; the matching matrix a and the row are processed by the first operator The data of the same data row position in the matching matrix b is subjected to a bitwise matching operation and input to the first queue; each sub-operator in the second operator performs a cumulative operation on the input matching result corresponding to the value at the data position; The third operator performs an accumulation operation on the integrated value of the input second queue; the first comparator compares the accumulated result in the third operator with a pre-stored matching threshold, and inputs the comparison result to the first memory to form a match.
  • the device includes a first operator 70, a first queue 71, a second operator 72, a first counter 73, and a second queue 74 which are sequentially connected. a third operator 75, a second counter 76, a first comparator 77 and a first memory 78; further comprising a first controller 80 coupled to the first operator 70;
  • the first controller 80 is configured to sequentially acquire the row data of the to-be-matched matrix a and the different positions in the matrix to be matched b according to the set order; the position of the acquired row data in the matrix to be matched a, and The positions in the matrix to be matched b are the same; the line data acquired each time is output to the first operator; wherein the order of setting includes at least one of the following: from top to bottom, line by line, or from below Supreme progressive acquisition, or column-by-column from left to right, or column-by-column from right to left.
  • the first controller is further configured to: generate a matching layer, and specifically include the following steps: acquiring the first matrix and the second matrix; and saving the first matrix and the second matrix to the first storage area and the second storage area respectively; a matching path, each time matching the distance according to the set unit, moving the second matrix to change the overlapping area of the first matrix and the second matrix; wherein the set moving path includes a line path or a surface path; One or more of a horizontal line path, a vertical line path, and a slanted line path; the surface path includes a plurality of lines of the same kind; and a matching layer is generated according to the coincident area generated by each movement; wherein, the matching layer A layer identifier including a matrix to be matched a and a matrix to be matched b and a matching layer is included.
  • the first controller is further configured to: the first matrix and the second matrix comprise two two-dimensional image data matrices acquired by a binocular parallel camera; the two-dimensional image data matrix comprises a binary image matrix or a Boolean matrix.
  • the first controller is further configured to: the first controller is further configured to: use data corresponding to the row and column values of the coincident region in the first matrix and the row and column values as the matrix to be matched a; and rank the coincident regions in the second matrix
  • the data corresponding to the value and the row and column value is used as the matrix to be matched b; the distance that the first controller moves the second matrix is used as the layer identifier of the matching layer; the matrix to be matched a, the matrix to be matched b, and the layer identifier are saved as the matching layer.
  • the apparatus further includes a second controller 89, a third queue 81, a fourth operator 82, a third counter 83, a fourth queue 84, a fifth operator 85, a fourth counter 86, and a second comparator 87 that are sequentially connected.
  • the second controller 89 is configured to obtain the matching result matrix and the layer identifier of the matching layer obtained by matching the matrix to be matched a and the matrix to be matched b corresponding to each matching layer one by one;
  • the layer identifier of the matching layer performs the following operations: setting the initial value of all corresponding addresses on the second memory to zero; acquiring the row data in the matching result matrix of the current matching layer row by row, and inputting the row data into the queue of the third queue First, wherein the element of the third queue is the row data in the matching result matrix, and the number of data storage locations of the elements of the third queue is greater than or equal to the number of columns of the largest matching result matrix in all matching result matrices, and the third The length of the queue is the number of rows of the calculated calculation window;
  • the fourth operator 82 is configured to input the row data in the matching result matrix of the current matching layer for each row of the leader of the third queue, and each sub-operator in the fourth computing unit will input the corresponding data position in the row data.
  • the value is subjected to a cumulative operation, wherein the fourth operator includes a column of sub-operators, the number of which is the same as the number of data storage locations of the elements of the third queue, and the position of each sub-operator and the elements of the third queue Corresponding position
  • a third counter 83 configured to set the third counter to zero when each data bit in the third queue stores data
  • the fourth operator 82 is configured to output the accumulated values of each of the fourth operators in the order of the data positions to the head of the fourth queue, wherein the length of the fourth queue and the set calculation window The number of columns is the same;
  • the fifth operator 85 is configured to be the head of the fourth queue. After each input of the accumulated value of the sub-operator of the fourth operator, the fifth operator performs the cumulative operation on the integrated value of the input, wherein the fifth operation Is a single operator;
  • the fourth counter 86 is configured to set the fourth counter to zero when each data bit in the fourth queue stores data
  • the second controller 89 is configured to determine whether the value of the corresponding address on the second memory is zero; wherein the abscissa of the corresponding address is the value of the fourth counter, and the ordinate is the value of the third counter; if yes, the fifth The cumulative result of the operator and the layer identifier of the matching layer are input to the corresponding address of the second memory; if not, the accumulated accumulated result value is taken out from the corresponding address of the second memory, and input to the second comparator, and simultaneously , inputting the accumulated result in the current fifth operator to the second comparator;
  • the second comparator 87 is configured to compare the cumulative result in the fifth computing unit with the accumulated result taken out on the second memory, and when the cumulative result in the fifth computing unit is greater than the cumulative result taken out on the second memory, The accumulated result in the fifth computing unit is stored in the corresponding address in the second memory instead of the accumulated result value taken out in the second memory, and the layer identifier of the matching layer corresponding to the current matching result matrix is replaced by the corresponding address in the original second memory. The saved layer identifier is stored in the corresponding address of the second memory;
  • the fourth queue 84 is configured to: when each data bit in the fourth queue stores data, when the head of the fourth queue inputs new data, the tail data of the fourth queue is pushed out to the fourth queue;
  • the fifth operator 85 is configured to perform a cumulative operation on the corresponding value of the newly input fourth operator in the fifth operator. After the operation, the fifth operator further extracts the data pushed out in the fourth queue in the fifth operation. The subtraction operation is performed in the value of the device, and the value of the fourth counter is incremented by 1 after the operation;
  • the fourth operator 82 is configured to repeatedly trigger the second controller, the second comparator, the fourth queue, and the fifth operator to run until the accumulated values of all the sub-operators of the fourth computing unit are all input to the fourth queue in turn. To complete the operation of matching the current row of the result matrix;
  • the third queue 84 is configured to: when each data bit in the third queue stores data, when the head of the third queue inputs new data, the tail data of the third queue is pushed out to the third queue;
  • the fourth operator 82 is configured such that each sub-operator of the fourth operator performs a cumulative operation on the value of the corresponding data position of the newly input third queue in the sub-operator, and after the operation is completed, each sub-operator will be pushed out.
  • the data of the queue corresponding to the data position is decremented in the value of the corresponding sub-operator, and the value of the third counter is incremented by one;
  • the second controller 89 is configured to repeatedly trigger the fourth operator, the fifth operator, the fourth counter, the second controller, the second comparator, the fourth queue, the fifth operator, the fourth operator, and the third The queue and the fourth operator run until all operations of all the rows in the matching result matrix of the current matching layer are completed; the second controller to the fourth operator are repeatedly triggered to complete the operation of the next matching result matrix and the matching layer until Completing the operation of the matching result matrix corresponding to all matching layers; wherein, the second memory is used to store the final result matrix, and each address in the final result matrix is stored, and after being compared by the accumulated results on the corresponding addresses of all matching layers, The maximum cumulative result value and the layer ID corresponding to the largest cumulative result value.
  • the two-dimensional data matching logic circuit 90 includes the above two-dimensional data matching device 90a.
  • the first controller the first operator, the first queue, the second operator, the first counter, the second queue, the third operator, the second counter, and the first a comparator and a first memory; a second controller, a third queue, a fourth operator, a third counter, a fourth queue, a fifth operator, a fourth counter, a second comparator, and a second memory, etc.
  • the first queue, the second queue, the third queue, and the fourth The queue, the first memory, and the second memory may be implemented by a high speed memory chip;
  • the first operator, the second operator, the third operator, the fourth operator, or the fifth operator may be an adder, a multiplier, and a cumulative
  • the device may be in various forms;
  • the first controller, the first counter, the second counter, the second controller, the third counter, the fourth counter, and the like may be implemented by a corresponding circuit structure or a chip.
  • the two-dimensional data matching logic circuit can be connected through various corresponding digital chips or circuits to implement the above two-dimensional data matching method; it can be understood that the two-dimensional data matching method can also be implemented by a programmable logic chip such as an FPGA, or The above two-dimensional data matching logic circuit is concentrated on a separate chip through a dedicated integrated chip.
  • the two-dimensional data matching logic circuit provided by the embodiment of the present invention has the same technical features as the two-dimensional data matching method and device provided by the foregoing embodiments, so that the same technical problem can be solved and the same technical effect can be achieved.
  • the functions may be stored in a computer readable storage medium if implemented in the form of a software functional unit and sold or used as a standalone product.
  • the technical solution of the present invention which is essential or contributes to the prior art, or a part of the technical solution, may be embodied in the form of a software product, which is stored in a storage medium, including
  • the instructions are used to cause a computer device (which may be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present invention.
  • the foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, and the like. .

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Abstract

一种二维数据匹配方法、装置和逻辑电路，涉及数据处理技术领域；其中，该方法由由依次连接的第一运算器（70）、第一队列（71）、第二运算器（72）、第一计数器（73）、第二队列（74）、第三运算器（75）、第二计数器（76）、第一比较器（77）和第一存储器（78）执行；该方法包括：第一运算器逐行对矩阵a和矩阵b进行逐位匹配运算，结果输入第一队列（S102，S104）；第二运算器对匹配结果进行累计运算；将累计值输出至第二队列（S110）；第三运算器对累计值进行累计运算；累计结果输入至第一比较器（S116）；第一比较器将累计结果与预先存储的匹配阈值进行比较，比较结果输入至第一存储器，形成匹配结果矩阵（S118，S120）；重复上述步骤直到完成矩阵a和矩阵b中所有数据行的匹配（S128）。该方案降低了数据匹配的运算量，同时提高了运算效率。

Description

二维数据匹配方法、装置和逻辑电路 技术领域
本发明涉及数据处理技术领域，尤其是涉及一种二维数据匹配方法、装置和逻辑电路。
背景技术
二维数据一般是指能够形成二维矩阵结构的数据、表示平面图像的数据和各类平面二维表格数据。在图像的识别运算中，有时需要在两幅或多幅图像中，遍历寻找具有相同图像特征的像素块，有时在机器学习算法上针对特定两组数据或多组数据中，遍历寻找具有相同或相似数据属性或特征的数据及其对应地址位置，有时对图像处理时需要解决视觉分类的问题运算等等。以上的运算，一般采用卷积运算，通过在窗口范围内的两组图像特征块之间的算法运算后的结果，判断两组数据的相似性匹配特征，最后得出两组二维数据中能够实现匹配的数据地址位置及对应的数据值和匹配参数。
上述卷积运算，由于数据块的中心是按数据位逐点取出，中心相邻的两个窗口之间有大量的数据重合部分，而在计算过程中，重合部分都要参与运算，产生大量的重复运算，极大浪费了运算资源。同时，卷积运算需要消耗大量运算资源，包括机器硬件资源，还包括运算时间资源。
现有的二维数据匹配方式运算效率较低，且运算量大的问题，目前尚未提出有效的解决方案。
发明内容
有鉴于此，本发明的目的在于提供一种二维数据匹配方法、装置和逻辑电路，以降低数据匹配的运算量，同时提高运算效率。
为了实现上述目的，本发明实施例采用的技术方案如下：
第一方面，本发明实施例提供了一种二维数据匹配方法，该方法由依次连接的第一运算器、第一队列、第二运算器、第一计数器、第二队列、第三运算器、第二计数器、第一比较器和第一存储器执行；第一队列和第二队列均为数据存储结构，第一队列和第二队列的数据存储原则为先进先出；该方法包括：(1)第一运算器逐行对待匹配矩阵a和待匹配矩阵b中相同数据行位置的数据进行逐位匹配运算；(2)按行将匹配运算的匹配结果输入至第一队列的队首，其中，第一队列的元素为匹配运算后的数据，第一队列的元素的数据存储位置的数量大于或等于待匹配矩阵a或待匹配矩阵b的列数，第一队列的长度为设定的匹配窗口的行数；(3)第一队列的队首每输入一个匹配结果，第二运算器中的每个子运算器对输入的匹配结果对应数据位置上的数值进行累计运算，其中，第二运算器包括一列子运算器，子运算器的数量与第一队列的元素中的数据存储位置的数量相同，且每个子运算器的位置与第一队列的元素上的数据存储位置相对应；(4)当第一队列中每个数据位都存储有数据时，第一计数器设置为零；(5)将第二运算器的每个子运算器的累计值，按数据位置顺序输出至第二队列的队首，其中，第二队列的长度与匹配窗口的列数相同；(6)第二队列的队首在每输入一个第二运算器中子运算器的累计值后，第三运算器对输入的累计值再进行累计运算，其中，第三运算器为单个运算器；(7)当第二队列中每个数据位都存储有数据时，第二计数器的值设置为零；(8)将第三运算器的累计结果输入至第一比较器；(9)第一比较器将第三运算器中的累计结果与预先存储的匹配阈值进行比较，当第三运算器中的累计结果大于匹配阈值时，比较结果为第一值；当第三运算器中的累计结果小于匹配阈值时，比较结果为第二值；其中，第一值表示比较结果为真，或为1；第二值表示比较结果为假，或为0；(10)将比较结果输入至第一存储器，形成匹配结果矩阵，第一存储器中的匹配结果矩阵的横坐标为第二计数器的值，纵坐标为第一计数器的值；(11)当第二队列中每个数据位都存储有数据后，在第二队列的队首再输入新的数据时，第二队列将队尾的数据推出第二队列，第三运算器将新输入的第二运算器的子运算器上对应的数值在第三运算器中做累计运算，运算后，第三运算器再将第二队列的队尾中推出的数据在第三运算器的数值中做减除运算，运算后，第二计数器的值加1；(12)重复步骤(8)(9)(10)(11)直到第二运算器的所有子运算器中的运算值依次全部输入第二队列，以完成待匹配矩阵a和待匹配矩阵b中的当前数据行的全部匹配；(13)完成以上步骤后，当第一队列中每个数据位都存储有数据后，第一队列队首再输入新的数据时，第一队列的队尾的数据推出第一队列，第二运算器中的每个子运算器将新输入第一队列的队首对应数据位置上的数值再进行累计运算，完成运算后，每个子运算器再将推出第一队列队尾的对应数据位置上的数值 在对应子运算器的数值上做减除运算，第一计数器加1；(14)重复步骤(5)(6)(7)(8)(9)(10)(11)(12)(13)直到完成待匹配矩阵a和待匹配矩阵b中所有数据行的全部匹配运算。
在本发明较佳的实施例中，上述方法的执行还包括与第一运算器连接的第一控制器；方法还包括：按照设定的顺序，第一控制器依次获取待匹配矩阵a以及待匹配矩阵b中的不同位置的行数据；每次获取到的行数据在待匹配矩阵a中的位置，与在待匹配矩阵b中的位置相同；将每次获取到的行数据输出至第一运算器；其中，设定的顺序至少包括以下一种：从上至下的逐行获取，或者，从下至上的逐行获取，或者，从左至右的逐列获取，或者，从右至左的逐列获取。
在本发明较佳的实施例中，上述方法还包括：第一控制器生成匹配层，具体包括如下步骤：第一控制器获取第一矩阵和第二矩阵；第一控制器将第一矩阵和第二矩阵分别保存至第一存储区和第二存储区；按照设定的匹配路径，每次按设定的单位匹配距离，第一控制器移动第二矩阵，以改变第一矩阵和第二矩阵的重合区域；其中，设定的移动路径包括线路经或面路径；线路经包括水平线路径、竖直线路径和倾斜线路径中的一种或多种；面路径中包括多个同一种类的线路经；第一控制器根据每移动一次所产生的重合区域，生成一个匹配层；其中，匹配层包括待匹配矩阵a和待匹配矩阵b以及匹配层的层标识。
在本发明较佳的实施例中，上述第一矩阵和第二矩阵包括通过双目平行摄像机获取到的两个二维图像数据矩阵；二维图像数据矩阵包括二值图像矩阵或布尔矩阵。
在本发明较佳的实施例中，上述第一控制器根据每移动一次所产生的重合区域，生成一个匹配层步骤，包括：第一控制器将第一矩阵内的重合区域的行列值和行列值对应的数据作为待匹配矩阵a；第一控制器将第二矩阵内的重合区域的行列值和行列值对应的数据作为待匹配矩阵b；第一控制器将第二矩阵移动的距离作为匹配层的层标识；将待匹配矩阵a、待匹配矩阵b和层标识保存为匹配层。
在本发明较佳的实施例中，上述方法还包括：第二控制器逐一获取每个匹配层对应的由待匹配矩阵a和待匹配矩阵b作匹配运算后，得到的匹配结果矩阵以及匹配层的层标识；第二控制器将第二存储器上的所有对应地址的初始值设置为零；对每个匹配结果矩阵按匹配层的层标识执行下述操作：操作由依次连接的第二控制器、第三队列、第四运算器、第三计数器、第四队列、第五运算器、第四计数器、第二比较器和第二存储器执行；第三队列和第四队列均为数据存储结构，第三队列和第四队列的数据存储原则为先进先出；操作包括：(1)第二控制器逐行获取当前匹配层的匹配结果矩阵中的行数据，将行数据输入第三队列的队首，其中，第三队列的元素为匹配结果矩阵中的行数据，第三队列的元素的数据存储位置的数量大于或等于所有的匹配结果矩阵中，最大的匹配结果矩阵的列数，第三队列的长度为设定的计算窗口的行数；(2)第三队列的队首每输入一行当前匹配层的匹配结果矩阵中的行数据，第四运算器中的每个子运算器将输入的行数据内对应数据位置上的数值进行累计运算，其中，第四运算器包括一列子运算器，该列子运算器的数量与第三队列的元素的数据存储位置的数量相同，且每个子运算器的位置与第三队列的元素上的位置相对应；(3)当第三队列中每个数据位都存储有数据时，第三计数器设置为零；(4)将第四运算器中的每个子运算器的累计值，按数据位置顺序输出至第四队列的队首，其中，第四队列的长度与设定的计算窗口的列数相同；(5)第四队列的队首在每输入一个第四运算器的子运算器的累计值后，第五运算器将输入的累计值再进行累计运算，其中，第五运算器为单个的运算器；(6)当第四队列中每个数据位都存储有数据时，第四计数器设置为零；(7)判断第二存储器上对应地址的值是否为零；其中，对应地址的横坐标为第四计数器的值，纵坐标为第三计数器的值；如果是，将第五运算器的累计结果以及该匹配层的层标识输入至第二存储器的对应地址中；如果否，从第二存储器的对应地址中取出已存入的累计结果值，输入至第二比较器，同时，将当前的第五运算器中的累计结果输入至第二比较器；(8)第二比较器将第五运算器中的累计结果与第二存储器上取出的累计结果值进行比较，当第五运算器中的累计结果大于第二存储器上取出的累计结果值时，将第五运算器中的累计结果代替第二存储器上取出的累计结果值存入第二存储器中对应地址内，同时，将当前匹配结果矩阵对应的匹配层的层标识代替原第二存储器中对应地址上已存入的层标识存入第二存储器对应地址中；(9)当第四队列中每个数据位都存储有数据后，第四队列的队首再输入新的数据时，第四队列的队尾数据推出第四队列，第五运算器将新输入的第四运算器上对应的数值在第五运算器中做累计运算，运算后，第五运算器再将第四队列中推出的数据在第五运算器的数值中做减除运算，运算后，第四计数器的值上加1；(10)重复步骤(7)(8)(9)直到第四运算器的所有子运算器的累计值依次全部输入第四队列，以完成当前匹配结果矩阵当前行的运算；(11)完成以上步骤后，当第三队列中每个数据位都存储有数据后，第三队列的队首再输入新的数据时，第三队列的队尾数据推出第三队列，第四运算器中的每个子运算器对新 输入第三队列的对应数据位置上的数值在子运算器中进行累计运算，完成运算后，每个子运算器将推出队列的数据对应数据位置上的数值在对应子运算器的数值中做减除运算，第三计数器的值上加1；(12)重复步骤(4)(5)(6)(7)(8)(9)(10)(11)直到完成当前匹配层的匹配结果矩阵中所有行的全部运算；(13)重复步骤(1)-(12)以完成下一个匹配结果矩阵和匹配层的运算，直到完成所有匹配层对应的匹配结果矩阵的运算；其中，第二存储器用于存储最终结果矩阵，最终结果矩阵中每个地址上存储的是，经所有匹配层对应地址上的累计结果比较后，获得的最大的累计结果值以及该最大的累计结果值所对应的层标识。
第二方面，本发明实施例提供了一种二维数据匹配装置，该装置包括依次连接的第一运算器、第一队列、第二运算器、第一计数器、第二队列、第三运算器、第二计数器、第一比较器和第一存储器；第一队列和第二队列均为数据存储结构，第一队列和第二队列的数据存储原则为先进先出；第一运算器，配置成逐行对待匹配矩阵a和待匹配矩阵b中相同数据行位置的数据进行逐位匹配运算；按行将匹配运算的匹配结果输入至第一队列的队首，其中，第一队列的元素为匹配运算后的数据，第一队列的元素的数据存储位置的数量大于或等于待匹配矩阵a或待匹配矩阵b的列数，第一队列的长度为设定的匹配窗口的行数；按行将匹配运算的匹配结果输入至第一队列队首，其中，第一队列的队列元素其数据存储位置的数量大于或等于待匹配矩阵a或待匹配矩阵b的列数，第一队列的长度为设定的匹配窗口的行数；第二运算器，配置成第一队列的队首每输入一个匹配结果，第二运算器中的每个子运算器对输入的匹配结果对应数据位置上的数值进行累计运算，其中，第二运算器包括一列子运算器，子运算器的数量与第一队列的元素中的数据存储位置的数量相同，且每个子运算器的位置与第一队列的元素上的数据存储位置相对应；第一队列队首每输入一个匹配结果，第二运算器中的每个子运算器对输入的匹配结果对应数据位置上的数值进行累计运算，其中，第二运算器包括一列子运算器，子运算器的数量与第一队列的数据存储位置的数量相同，且每个子运算器的位置与第一队列元素上的位置相对应；第一计数器，配置成当第一队列中每个数据位都存储有数据时，第一计数器设置为零；第二运算器，配置成将第二运算器的每个子运算器的累计值，按数据位置顺序输出至第二队列的队首，其中，第二队列的长度与匹配窗口的列数相同；第三运算器，配置成第二队列的队首在每输入一个第二运算器中子运算器的累计值后，第三运算器对输入的累计值再进行累计运算，其中，第三运算器为单个运算器；第二计数器，配置成当第二队列中每个数据位都存储有数据时，第二计数器的值设置为零；第三运算器，配置成将第三运算器的累计结果输入至第一比较器；第一比较器，配置成将第三运算器中的累计结果与预先存储的匹配阈值进行比较，当第三运算器中的累计结果大于匹配阈值时，比较结果为第一值；当第三运算器中的累计结果小于匹配阈值时，比较结果为第二值；其中，第一值表示比较结果为真，或为1；第二值表示比较结果为假，或为0；将比较结果输入至第一存储器，形成匹配结果矩阵，第一存储器中的匹配结果矩阵的横坐标为第二计数器的值，纵坐标为第一计数器的值；第二队列，配置成当第二队列中每个数据位都存储有数据后，在第二队列的队首再输入新的数据时，第二队列将队尾的数据推出第二队列；第三运算器，配置成将新输入的第二运算器的子运算器上对应的数值在第三运算器中做累计运算，运算后，第三运算器再将第二队列的队尾中推出的数据在第三运算器的数值中做减除运算，运算后，第二计数器的值加1；第二运算器，配置成重复触发第三运算器、第一比较器、第二队列和第三运算器运行，直到第二运算器的所有子运算器中的运算值依次全部输入第二队列，以完成待匹配矩阵a和待匹配矩阵b中的当前数据行的全部匹配；第一队列，配置成当第一队列中每个数据位都存储有数据后，第一队列队首再输入新的数据时，第一队列的队尾的数据推出第一队列；第二运算器，配置成第二运算器中的每个子运算器将新输入第一队列的队首对应数据位置上的数值再进行累计运算，完成运算后，每个子运算器再将推出第一队列队尾的对应数据位置上的数值在对应子运算器的数值上做减除运算，第一计数器加1；重复触发第二运算器、第三运算器、第二计数器、第三运算器、第一比较器、第二队列、第三运算器、第二运算器、第一队列运行，直到完成待匹配矩阵a和待匹配矩阵b中所有数据行的全部匹配运算。
在本发明较佳的实施例中，上述装置还包括与第一运算器连接的第一控制器；第一控制器，配置成：按照设定的顺序，依次获取待匹配矩阵a以及待匹配矩阵b中的不同位置的行数据；每次获取到的行数据在待匹配矩阵a中的位置，与在待匹配矩阵b中的位置相同；将每次获取到的行数据输出至第一运算器；其中，设定的顺序至少包括以下一种：从上至下的逐行获取，或者，从下至上的逐行获取，或者，从左至右的逐列获取，或者，从右至左的逐列获取。
在本发明较佳的实施例中，上述第一控制器还配置成：生成匹配层，具体包括如下步骤：获取第一矩阵和第二矩阵；将第一矩阵和第二矩阵分别保存至第一存储区和第二存储区；按照设定 的匹配路径，每次按设定的单位匹配距离，移动第二矩阵，以改变第一矩阵和第二矩阵的重合区域；其中，设定的移动路径包括线路经或面路径；线路经包括水平线路径、竖直线路径和倾斜线路径中的一种或多种；面路径中包括多个同一种类的线路经；根据每移动一次所产生的重合区域，生成一个匹配层；其中，匹配层包括待匹配矩阵a和待匹配矩阵b以及匹配层的层标识。
在本发明较佳的实施例中，上述第一控制器还配置成：第一矩阵和第二矩阵包括通过双目平行摄像机获取到的两个二维图像数据矩阵；二维图像数据矩阵包括二值图像矩阵或布尔矩阵。
在本发明较佳的实施例中，上述第一控制器还配置成：将第一矩阵内的重合区域的行列值和行列值对应的数据作为待匹配矩阵a；将第二矩阵内的重合区域的行列值和行列值对应的数据作为待匹配矩阵b；第一控制器将第二矩阵移动的距离作为匹配层的层标识；将待匹配矩阵a、待匹配矩阵b和层标识保存为匹配层。
在本发明较佳的实施例中，上述装置还包括依次连接的第二控制器、第三队列、第四运算器、第三计数器、第四队列、第五运算器、第四计数器、第二比较器和第二存储器执行；第三队列和第四队列均为数据存储结构，第三队列和第四队列的数据存储原则为先进先出；第二控制器，配置成逐一获取每个匹配层对应的由待匹配矩阵a和待匹配矩阵b作匹配运算后，得到的匹配结果矩阵以及匹配层的层标识；对每个匹配结果矩阵按匹配层的层标识执行下述操作：将第二存储器上的所有对应地址的初始值设置为零；逐行获取当前匹配层的匹配结果矩阵中的行数据，将行数据输入所述第三队列的队首，其中，第三队列的元素为匹配结果矩阵中的行数据，第三队列的元素的数据存储位置的数量大于或等于所有的匹配结果矩阵中，最大的匹配结果矩阵的列数，第三队列的长度为设定的计算窗口的行数；第四运算器，配置成第三队列的队首每输入一行当前匹配层的匹配结果矩阵中的行数据，第四运算器中的每个子运算器将输入的行数据内对应数据位置上的数值进行累计运算，其中，第四运算器包括一列子运算器，该列子运算器的数量与第三队列的元素的数据存储位置的数量相同，且每个子运算器的位置与第三队列的元素上的位置相对应；第三计数器，配置成当第三队列中每个数据位都存储有数据时，第三计数器设置为零；第四运算器，配置成将第四运算器中的每个子运算器的累计值，按数据位置顺序输出至第四队列的队首，其中，第四队列的长度与设定的计算窗口的列数相同；第五运算器，配置成第四队列的队首在每输入一个第四运算器的子运算器的累计值后，第五运算器将输入的累计值再进行累计运算，其中，第五运算器为单个的运算器；第四计数器，配置成当第四队列中每个数据位都存储有数据时，第四计数器设置为零；第二控制器，配置成判断第二存储器上对应地址的值是否为零；其中，对应地址的横坐标为第四计数器的值，纵坐标为第三计数器的值；如果是，将第五运算器的累计结果以及该匹配层的层标识输入至第二存储器的对应地址中；如果否，从第二存储器的对应地址中取出已存入的累计结果值，输入至第二比较器，同时，将当前的第五运算器中的累计结果输入至第二比较器；第二比较器，配置成将第五运算器中的累计结果与第二存储器上取出的累计结果进行比较，当第五运算器中的累计结果大于第二存储器上取出的累计结果时，将第五运算器中的累计结果代替第二存储器上取出的累计结果值存入第二存储器中对应地址内，同时，将当前匹配结果矩阵对应的匹配层的层标识代替原第二存储器中对应地址上已存入的层标识存入第二存储器对应地址中；第四队列，配置成当第四队列中每个数据位都存储有数据后，第四队列的队首再输入新的数据时，第四队列的队尾数据推出第四队列；第五运算器，配置成将新输入的第四运算器上对应的数值在第五运算器中做累计运算，运算后，第五运算器再将第四队列中推出的数据在第五运算器的数值中做减除运算，运算后，第四计数器的值上加1；第四运算器，配置成重复触发第二控制器、第二比较器、第四队列、第五运算器运行，直到第四运算器的所有子运算器的累计值依次全部输入第四队列，以完成匹配结果矩阵当前行的运算；第三队列，配置成当第三队列中每个数据位都存储有数据后，第三队列的队首再输入新的数据时，第三队列的队尾数据推出第三队列；第四运算器，配置成第四运算器中的每个子运算器对新输入第三队列的对应数据位置上的数值在子运算器中进行累计运算，完成运算后，每个子运算器将推出队列的数据对应数据位置上的数值在对应子运算器的数值中做减除运算，第三计数器的值上加1；第二控制器，配置成重复触发第四运算器、第五运算器、第四计数器、第二控制器、第二比较器、第四队列、第五运算器、第四运算器、第三队列、第四运算器运行，直到完成当前匹配层的匹配结果矩阵中所有行的全部运算；重复触发第二控制器至第四运算器运行以完成下一个匹配结果矩阵和匹配层的运算，直到完成所有匹配层对应的匹配结果矩阵的运算；其中，第二存储器用于存储最终结果矩阵，最终结果矩阵中每个地址上存储的是，经所有匹配层对应地址上的累计结果比较后，获得的最大的累计结果值以及该最大的累计结果值所对应的层标识。
第三方面，本发明实施例提供了一种二维数据匹配逻辑电路，逻辑电路包括上述二维数据匹配 装置。
本发明实施例提供的二维数据匹配方法、装置和逻辑电路，其中，该方法由依次连接的第一运算器、第一队列、第二运算器、第一计数器、第二队列、第三运算器、第二计数器、第一比较器和第一存储器执行；第一队列和第二队列均为数据存储结构，第一队列和第二队列的数据存储原则为先进先出；通过第一运算器逐行对待匹配矩阵a和待匹配矩阵b中相同数据行位置的数据进行逐位匹配运算并输入至第一队列；通过第二运算器中的每个子运算器对输入的匹配结果对应数据位置上的数值进行累计运算；通过第三运算器对输入第二队列的累计值进行累计运算；通过第一比较器将第三运算器中的累计结果与预先存储的匹配阈值进行比较，将比较结果输入至第一存储器，形成匹配结果矩阵；重复上述步骤直到第二运算器的所有子运算器中的运算值依次全部输入第二队列，并完成待匹配矩阵a和待匹配矩阵b中所有数据行的全部匹配。通过该方式进行二维数据中的数据块匹配时，可以仅对相邻数据块之间数据变化部分进行运算，对数据重合部分不进行运算，减少了大量的重复运算，大大降低了数据匹配的运算量，提高了数据匹配的运算效率，同时，由于采用了队列这种方式存储中间过程数据，极大节省了存储空间，方便了数据的存取操作，极大提高了运算速度。
本发明的其他特征和优点将在随后的说明书中阐述，并且，部分地从说明书中变得显而易见，或者通过实施本发明而了解。本发明的目的和其他优点在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。为使本发明的上述目的、特征和优点能更明显易懂，下文特举较佳实施例，并配合所附附图，作详细说明如下。
附图说明
为了更清楚地说明本发明具体实施方式或现有技术中的技术方案，下面将对具体实施方式或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图是本发明的一些实施方式，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明实施例提供的一种二维数据匹配方法的流程图；
图2为本发明实施例提供的一种二维数据匹配方法中，对每个匹配层对应的匹配结果矩阵进行操作的流程图；
图3为本发明实施例提供的第一矩阵和第二矩阵的结构示意图；
图4为本发明实施例提供的匹配层的结构示意图；
图5为本发明实施例提供的逐层的层匹配运算方法的运算流程示意图；
图6为本发明实施例提供的对匹配结果矩阵进行去噪的运算流程示意图；
图7为本发明实施例提供的第一种二维数据匹配装置的结构示意图；
图8为本发明实施例提供的第二种二维数据匹配装置的结构示意图；
图9为本发明实施例提供的一种二维数据匹配逻辑电路的结构示意图。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合附图对本发明的技术方案进行清楚、完整地描述，显然，所描述的实施例是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
考虑到现有的二维数据匹配方式运算效率较低，且运算量大的问题，本发明实施例提供了一种二维数据匹配方法、装置和逻辑电路；该技术可以应用于两个或多组的二维数据的相似性匹配过程中，尤其可以应用于通过双目或多目摄像装置获取的图像数据相似性匹配过程中，该技术可以通过相关的硬件或软件实现，下面通过实施例进行描述。
实施例一：
参见图1所示的一种二维数据匹配方法的流程图以及图5所示的逐层的层匹配运算方法的运算流程示意图，该方法由依次连接的第一运算器、第一队列、第二运算器、第一计数器、第二队列、第三运算器、第二计数器、第一比较器和第一存储器执行；第一队列和第二队列均为数据存储结构，第一队列和第二队列的数据存储原则为先进先出；
其中，第一运算器、第二运算器、第三运算器可以为数据运算过程、方法和电路，包括：逻辑运算和数值运算，包括但不限于加法运算，还包括一些运算的组合。本发明实施例提供二维数据匹配方法的目的是对于具有相同大小的待匹配矩阵a和待匹配矩阵b中，在对应数据位置区域具有一定行数和列数的矩形匹配窗口范围内，计算两个数据块的匹配值，同时，给出匹配结果判断。本发明实施例设置的待匹配矩阵a和待匹配矩阵b的大小为(W-u)×H，代表矩阵的列数为W-u，行数为H，数据匹配的矩形窗口的大小为(2s+1)×(2s+1)代表数据中心匹配点的周边相邻的相关数据点的距离为s。
上述方法包括如下步骤：
步骤S102，第一运算器逐行对待匹配矩阵a和待匹配矩阵b中相同数据行位置的数据进行逐位匹配运算；
步骤S104，按行将匹配运算的匹配结果输入至第一队列的队首，其中，第一队列的元素为匹配运算后的数据，第一队列的元素的数据存储位置的数量大于或等于待匹配矩阵a或待匹配矩阵b的列数，第一队列的长度为设定的匹配窗口的行数；
例如，第一运算器从待匹配矩阵a中获得行数据i，从待匹配矩阵b中获得行数据i，行数据i的长度均为w-u，即行数据i中均包括w-u个数据；第一运算器将待匹配矩阵a行数据i的第1列的数据与待匹配矩阵b行数据i中的第1列数据进行匹配运算，运算结果保存至第一运算器第1列的相应位置，再将待匹配矩阵a行数据i的第2列的数据与待匹配矩阵b行数据i中的第2列数据进行匹配运算，运算结果保存至第一运算器第2列的相应位置，以此类推，直至第一运算器将待匹配矩阵a行数据i的第w-u列的数据与待匹配矩阵b行数据i中的第w-u列数据进行匹配运算，运算结果保存至第一运算器第w-u列的相应位置，至此，生成上述匹配结果，此时，该匹配结果为长度为w-u的行数据。
上述第一队列元素数据的数量为第一矩阵和第二矩阵的最大列数，即w，该数量大于上述行数据的数量w-u；用最大数量设置是为了满足所有可能的匹配运算，对于行数据数量少于元素数据的数量的计算，对后面空余的元素数据位置不做运算即可；该第一队列的长度设定为匹配窗口的行数值，例如，设置为2s+1；通常，2s+1的值不大于待匹配矩阵a和待匹配矩阵b的行值和列值；优选地，该2s+1中，s的取值为1-30之间的自然数。上述匹配运算包括但不限于下述运算：逻辑与、逻辑异或、加法、减法或乘法及其由以上算法组合形成的算法。
步骤S106，第一队列的队首每输入一个匹配结果，第二运算器中的每个子运算器对输入的匹配结果对应数据位置上的数值进行累计运算，其中，第二运算器包括一列子运算器，子运算器的数量与第一队列的元素中的数据存储位置的数量相同，且每个子运算器的位置与第一队列的元素上的数据存储位置相对应；
步骤S108，当第一队列中每个数据位都存储有数据时，第一计数器设置为零；
上述第二运算器中每个子运算器中的值为队列长度方向上各元素数据位置上的累计值，该数值对应匹配窗口列方向的(2s+1)个单列上的累计值；
步骤S110，将第二运算器的每个子运算器的累计值，按数据位置顺序输出至第二队列的队首，其中，第二队列的长度与匹配窗口的列数相同；
步骤S112，第二队列的队首在每输入一个第二运算器中子运算器的累计值后，第三运算器对输入的累计值再进行累计运算，其中，第三运算器为单个运算器；
步骤S114，当第二队列中每个数据位都存储有数据时，第二计数器的值设置为零；
上述第三运算器中的值为队列元素数据位置方向上第二运算器中的子运算器中的累计值的累计值，该数值对应匹配窗口行方向的(2s+1)个行，(2s+1)个列上的累计值的累计值，也就是匹配窗口(2s+1)×(2s+1)中所有数据位置上数据的总累计值，该值也代表了窗口中心位置上在待匹配矩阵a和待匹配矩阵b中的位置上的两个数据点之间的匹配程度；一般的，该值越大，两个点的匹配程度越高。
步骤S116，将第三运算器的累计结果输入至第一比较器；
步骤S118，第一比较器将第三运算器中的累计结果与预先存储的匹配阈值进行比较，当第三运算器中的累计结果大于匹配阈值时，比较结果为第一值；当第三运算器中的累计结果小于匹配阈值时，比较结果为第二值；其中，第一值表示比较结果为真，或为1；第二值表示比较结果为假，或为0；
上述预先存储的匹配阈值，代表两个匹配点之间的匹配程度必须满足的一个阈值，超出该阈值，两点匹配成功；低于该阈值，则说明两个匹配点之间不满足匹配条件，匹配失败；该阈值可 以根据应用环境进行设置，阈值设定越大，匹配成功的匹配点越少；阈值设定越小，匹配成功的匹配点就越多。
步骤S120，将比较结果输入至第一存储器，形成匹配结果矩阵，第一存储器中的匹配结果矩阵的横坐标为第二计数器的值，纵坐标为第一计数器的值；
上述匹配结果矩阵保存的匹配结果对应于待匹配矩阵a和待匹配矩阵b中左上角两端去掉宽度为s的边缘后的数据点上的匹配结果，如果按原待匹配矩阵a和待匹配矩阵b的坐标来说的话，就是位于待匹配矩阵a和待匹配矩阵b的(s+1,s+1)位置上的点的匹配结果。该点在匹配结果矩阵中的坐标为(0，0)；
步骤S122，当第二队列中每个数据位都存储有数据后，在第二队列的队首再输入新的数据时，第二队列将队尾的数据推出第二队列，第三运算器将新输入的第二运算器的子运算器上对应的数值在第三运算器中做累计运算，运算后，第三运算器再将第二队列的队尾中推出的数据在第三运算器的数值中做减除运算，运算后，第二计数器的值加1；
上述第三运算器的累计值代表待匹配矩阵a和待匹配矩阵b的(s+2,s+1)位置上的点的匹配结果；
可以看出，在本步骤的运算充分利用了既有的匹配运算结果，只对新增的头部匹配做了累计，再去掉尾部的数据，极大减少了重复计算，同时，利用队列结构极大节省了中间数据的存储空间，方便了数据的存取操作。
步骤S124，重复步骤S116至S122直到第二运算器的所有子运算器中的运算值依次全部输入第二队列，以完成待匹配矩阵a和待匹配矩阵b中的当前数据行的全部匹配；
上述匹配结果矩阵保存的匹配结果对应于待匹配矩阵a和待匹配矩阵b中第(s+1)行上，去掉两端宽度为s的数据点后，所有数据点对应于数据匹配窗口大小为(2s+1)×(2s+1)的匹配结果。对于匹配结果矩阵来说，也就是完成了第0行所有数据点的匹配结果运算。
步骤S126，完成以上步骤后，当第一队列中每个数据位都存储有数据后，第一队列队首再输入新的数据时，第一队列的队尾的数据推出第一队列，第二运算器中的每个子运算器将新输入第一队列的队首对应数据位置上的数值再进行累计运算，完成运算后，每个子运算器再将推出第一队列队尾的对应数据位置上的数值在对应子运算器的数值上做减除运算，第一计数器加1；
上述第二运算器各子运算器中的值为待匹配矩阵a和待匹配矩阵b中第二行算起到第(2s+2)行在队列长度方向上各元素数据位置上的累计值；
在本步骤的运算也充分利用了既有的匹配运算结果，只对新增的头部匹配做了累计，再去掉尾部的数据，极大减少了重复计算，同时，利用队列结构极大节省了中间数据的存储空间，方便了数据的存取操作。
步骤S128，重复步骤S110至S126直到完成待匹配矩阵a和待匹配矩阵b中所有数据行的全部匹配运算。
每重复一次上述步骤就完成待匹配矩阵a和待匹配矩阵b中其中一行数据的匹配运算，匹配结果矩阵，就增加一行匹配运算结果，直到完成所有行的匹配，当匹配完成后，可以看出匹配结果矩阵比待匹配矩阵大小在行和列上分别减少了2s个数据位。
本发明实施例提供的二维数据匹配方法，该方法由依次连接的第一运算器、第一队列、第二运算器、第一计数器、第二队列、第三运算器、第二计数器、第一比较器和第一存储器执行；第一队列和第二队列均为数据存储结构，第一队列和第二队列的数据存储原则为先进先出；通过第一运算器逐行对待匹配矩阵a和待匹配矩阵b中相同数据行位置的数据进行逐位匹配运算并输入至第一队列；通过第二运算器中的每个子运算器对输入的匹配结果对应数据位置上的数值进行累计运算；通过第三运算器对输入第二队列的累计值进行累计运算；通过第一比较器将第三运算器中的累计结果与预先存储的匹配阈值进行比较，将比较结果输入至第一存储器，形成匹配结果矩阵；重复上述步骤直到第二运算器的所有子运算器中的运算值依次全部输入第二队列，并完成待匹配矩阵a和待匹配矩阵b中所有数据行的全部匹配。通过该方式进行二维数据中的数据块匹配时，可以仅对相邻数据块之间数据变化部分进行运算，对数据重合部分不进行运算，减少了大量的重复运算，大大降低了数据匹配的运算量，提高了数据匹配的运算效率，同时，由于采用了队列这种方式存储中间过程数据，极大节省了存储空间，方便了数据的存取操作，极大提高了运算速度。
实施例二：
本发明实施例提供了第二种二维数据匹配方法的流程图，该方法在实施例一中提供的二维数据匹配方法的基础上实现，该方法由依次连接的第一控制器、第一运算器、第一队列、第二运算器、第一计数器、第二队列、第三运算器、第二计数器、第一比较器和第一存储器执行，以及依次连接的第二控制器、第三队列、第四运算器、第三计数器、第四队列、第五运算器、第四计数器、第二比较器和第二存储器执行；其中，第三队列和第四队列均为数据存储结构，第三队列和第四队列的数据存储原则为先进先出；第四运算器、第五运算器为数据运算过程、方法和电路，包括：逻辑运算和数值运算，包括但不限于加法运算，还包括一些运算的组合。
该方法首先包括第一控制器生成匹配层步骤，具体包括如下步骤1-4：
步骤1，第一控制器获取第一矩阵和第二矩阵；
步骤2，第一控制器将第一矩阵和第二矩阵分别保存至第一存储区和第二存储区；
步骤3，按照设定的匹配路径，每次按设定的单位匹配距离，第一控制器移动第二矩阵，以改变第一矩阵和第二矩阵的重合区域；其中，设定的移动路径包括线路经或面路径；线路经包括水平线路径、竖直线路径和倾斜线路径中的一种或多种；面路径中包括多个同一种类的线路经；
步骤4，第一控制器根据每移动一次所产生的重合区域，生成一个匹配层；其中，匹配层包括待匹配矩阵a和待匹配矩阵b以及匹配层的层标识。具体地，第一控制器将第一矩阵内的重合区域的行列值和行列值对应的数据作为待匹配矩阵a；第一控制器将第二矩阵内的重合区域的行列值和行列值对应的数据作为待匹配矩阵b；第一控制器将第二矩阵移动的距离作为匹配层的层标识；将待匹配矩阵a、待匹配矩阵b和层标识保存为匹配层。上述第一矩阵和第二矩阵包括通过双目平行摄像机获取到的两个二维图像数据矩阵；该二维图像数据矩阵包括二值图像矩阵或布尔矩阵。
本发明实施例提供的二维数据匹配方法，可以应用于多种二维数据，例如，二维矩阵结构的数据、表示平面图像的数据和各类平面二维表格数据等；尤其可以应用于二维图像数据矩阵，例如，通过双目平行摄像机获取到的二维图像数据矩阵；优选地，该方法还可以应用于二值图像矩阵或布尔矩阵；本发明实施例中，对二维数据的来源和具体表现形式不做限定。
在初始状态下，第一矩阵中所有数据占据的第一存储区内的行列值，与第二矩阵中所有数据占据的第二存储区内的行列值不重合；例如，第二矩阵位于第一矩阵的水平左侧，水平右侧、竖直上侧或竖直下侧等位置。上述水平线路径可以为第二矩阵从第一矩阵的左侧移动至第一矩阵的右侧，竖直线路径可以为从第一矩阵的上侧移动至第一矩阵的下侧；上述面路径可以包括多个水平线路径，例如，第二矩阵从第一矩阵的左上角水平向第一矩阵的右侧移动，当移动至第一矩阵的右上角时，下移一个数据点位置，继续向第一矩阵的左侧移动，以此类推。上述单位移动距离可以根据应用环境进行设置，优选的，该单位移动距离可以为一个数据点位置。
上述步骤1-4中的过程中，一组第一矩阵和第二矩阵可以生成多个匹配层，每个匹配层包括第一矩阵和第二矩阵中，发生重合的部分或全部数据；由于后续的二维数据匹配处理仅对发生重合的数据进行，而对不重合的数据不进行匹配处理，因而，通过设置匹配层，可以降低数据匹配的运算量，进而提高数据匹配的运算效率。
上述方法还包括：步骤5：对每个匹配层，第一控制器按照设定的顺序，依次获取待匹配矩阵a以及待匹配矩阵b中的不同位置的行数据；每次获取到的行数据在待匹配矩阵a中的位置，与在待匹配矩阵b中的位置相同；将每次获取到的行数据输出至第一运算器；其中，设定的顺序至少包括以下一种：从上至下的逐行获取，或者，从下至上的逐行获取，或者，从左至右的逐列获取，或者，从右至左的逐列获取。优选地，第一控制器从上至下逐行获取两个待匹配矩阵中的行，且，第一运算器从待匹配矩阵a中获得第i行的行数据，从待匹配矩阵b中同样获得第i行的行数据。
步骤5之后，再执行实施例一中提供的步骤S102至S123，以获得每个匹配层对应的匹配结果矩阵。由于每个匹配层包含两个待匹配矩阵，因此，每个匹配层对应一个匹配结果矩阵；由于每个匹配层中待匹配矩阵的大小不同，每个匹配层对应的匹配结果矩阵的大小也不相同；例如，当两个待匹配二维数据矩阵的大小均为h行w列，且设置的第一队列的行数为2s+1时，其对应的匹配结果矩阵的大小为h-2s行w-2s列。
步骤6，第二控制器逐一获取每个匹配层对应的由待匹配矩阵a和待匹配矩阵b作匹配运算后，得到的匹配结果矩阵以及匹配层的层标识。
步骤7，第二控制器将第二存储器上的所有对应地址的初始值设置为零；
参见图2所示的一种二维数据匹配方法，以及图6所示对匹配结果矩阵进行去噪的运算流程示意图，对每个匹配层对应的匹配结果矩阵进行操作的流程图；该操作的目的是对于第一矩阵和第二矩阵中相同的区域在不同的匹配层上，根据每层的匹配结果矩阵，在对应数据位置区域具有一定行数和 列数的矩形计算窗口范围内，计算比较每层的匹配效果，去除匹配歧义，保存最佳的区域层匹配数据，给出最后的匹配结果。
在图6的例子中设计算窗口的大小为(2m+1)×(2m+1),层标识为u。对于不同的匹配层可以根据需要设不同的计算窗口，计算窗口也可以根据公式进行线性或非线性变化。
对每个匹配结果矩阵按匹配层的生成顺序执行操作，该操作包括如下步骤：
步骤S202，逐行获取当前匹配层的匹配结果矩阵中的行数据，将行数据输入第三队列的队首，其中，第三队列的元素为匹配结果矩阵中的行数据，第三队列的元素的数据存储位置的数量大于或等于所有的匹配结果矩阵中，最大的匹配结果矩阵的列数，第三队列的长度为设定的计算窗口的行数；
步骤S204，第三队列的队首每输入一行当前匹配层的匹配结果矩阵中的行数据，第四运算器中的每个子运算器将输入的行数据内对应数据位置上的数值进行累计运算，其中，第四运算器包括一列子运算器，该列子运算器的数量与第三队列的元素的数据存储位置的数量相同，且每个子运算器的位置与第三队列的元素上的位置相对应；
步骤S206，当第三队列中每个数据位都存储有数据时，第三计数器设置为零；
上述第四运算器中每个子运算器中的值为第三队列长度方向上各元素数据位置上的累计值，该数值对应计算窗口列方向的(2m+1)个单列上的累计值；
步骤S208，将第四运算器中的每个子运算器的累计值，按数据位置顺序输出至第四队列的队首，其中，第四队列的长度与设定的计算窗口的列数相同；
步骤S210，第四队列的队首在每输入一个第四运算器的子运算器的累计值后，第五运算器将输入的累计值再进行累计运算，其中，第五运算器为单个的运算器；
步骤S212，当第四队列中每个数据位都存储有数据时，第四计数器设置为零；
上述第五运算器中的值为第三队列元素数据位置方向上，第四运算器中的子运算器中的累计值的累计值，该数值对应计算窗口行方向的(2m+1)个行，(2m+1)个列上的累计值的累计值，也就是计算窗口(2m+1)×(2m+1)中所有数据位置上数据的总累计值，该值也代表了窗口中心位置上在u层匹配结果矩阵中的位置上的数据点与周围(2m+1)×(2m+1)范围内数据的关联程度，一般的，该值越大，代表该点与周围点的关联程度越高。
步骤S214，判断第二存储器上对应地址的值是否为零；其中，对应地址的横坐标为第四计数器的值，纵坐标为第三计数器的值；如果是，将第五运算器的累计结果以及该匹配层的层标识输入至第二存储器的对应地址中；如果否，从第二存储器的对应地址中取出已存入的累计结果值，输入至第二比较器，同时，将当前的第五运算器中的累计结果输入至第二比较器；
步骤S216，第二比较器将第五运算器中的累计结果与第二存储器上取出的累计结果值进行比较，当第五运算器中的累计结果大于第二存储器上取出的累计结果值时，将第五运算器中的累计结果代替第二存储器上取出的累计结果值存入第二存储器中对应地址内，同时，将当前匹配结果矩阵对应的匹配层的层标识代替原第二存储器中对应地址上已存入的层标识存入第二存储器对应地址中；
将当前的第五运算器中的累计值与该位置上其它匹配层上的累计值对比，就是比较两个值对应的匹配层中的周围数据的多少，进而判断该位置上的数值与周围数据的关联度，保留大的值，也即保留大的关联度，去除关联小的值，从而达到去噪的目的。
步骤S218，当第四队列中每个数据位都存储有数据后，第四队列的队首再输入新的数据时，第四队列的队尾数据推出第四队列，第五运算器将新输入的第四运算器上对应的数值在第五运算器中做累计运算，运算后，第五运算器再将第四队列中推出的数据在第五运算器的数值中做减除运算，运算后，第四计数器的值上加1；也即，步骤S218是在列的方向又向前计算了一步。
步骤S220，重复步骤S214-S218直到第四运算器的所有子运算器的累计值依次全部输入第四队列，以完成匹配结果矩阵当前行的运算；
步骤S222，完成以上步骤后，当第三队列中每个数据位都存储有数据后，第三队列的队首再输入新的数据时，第三队列的队尾数据推出第三队列，第四运算器中的每个子运算器对新输入第三队列的对应数据位置上的数值在子运算器中进行累计运算，完成运算后，每个子运算器将推出队列的数据对应数据位置上的数值在对应子运算器的数值中做减除运算，第三计数器的值上加1；也即，步骤S222在行的方向又向前计算了一步。
步骤S224，重复步骤S208-S222直到完成当前匹配层的匹配结果矩阵中所有行的全部运算；
步骤S226，重复步骤S202-S224以完成下一个匹配结果矩阵和匹配层的运算，直到完成所有匹配层对应的匹配结果矩阵的运算；其中，第二存储器用于存储最终结果矩阵，最终结果矩阵中 每个地址上存储的是，经所有匹配层对应地址上的累计结果比较后，获得的最大的累计结果累计值数据以及其中的该最大的累计结果值累计值所对应的层标识，直到完成所有匹配层对应的匹配结果矩阵的运算。
本发明实施例提供的二维数据匹配方法，该方法由依次连接的第一控制器、运算器、第一队列、第二队列、第一比较器和第一存储器执行，以及依次连接的第二控制器、第三队列、第四队列、第二比较器和第二存储器执行；首先获取第一矩阵和第二矩阵的多个匹配层，并对匹配层内的数据进行匹配处理，再对多个匹配层对应的匹配结果矩阵进行比较和筛选，以获得不同区域的最佳的匹配层；通过该方式进行二维数据中的数据块匹配时，可以仅对相邻数据块之间数据变化部分进行运算，对数据重合部分不进行运算，减少了大量的重复运算，大大降低了数据匹配的运算量，提高了数据匹配的运算效率，同时，由于采用了队列这种方式存储中间过程数据，极大节省了存储空间，方便了数据的存取操作，极大提高了运算速度。
实施例三：
对应于上述实施例一和实施例二，本发明实施例提供了一种二维图像匹配方法。该二维图像由双目摄像机获得；在对两个二维图像进行匹配时，一般需要根据两个图像计算得出对应图像的深度数据，能够对被视物进行三维状态描述。
下面对该二维图像匹配方法进行具体描述。
首先，设置两个大小完全相同的两个二维数据矩阵；参见图3所示的第一矩阵和第二矩阵的结构示意图，第一矩阵和第二矩阵大小均为W*H；为了便于描述，以第一矩阵和第二矩阵大小相同为例进行说明，在实际实现时，第一矩阵和第二矩阵大小关系不做具体限定；矩阵中的数据点可以设为布尔值，还可以根据数据值范围或大小设为8位、16位、32位或64位的数值或用其它可用于运算的其它值；通常，如果上述矩阵是灰度图像，其图像中数据大小为8位，代表0～255之间不同的图像灰度，如果将灰度图进行二值化处理，得到二值图，可以将其数值变为只包含0、1两个值的布尔矩阵，采用布尔矩阵可以极大节省数据存储空间和提高数据传输速度和效率。本实施例中以布尔值形成的矩阵为例进行说明，可以理解，该实施例提供的二维图像匹配方法也可用与其它数值形成的矩阵。
参见图4所示的匹配层的结构示意图；为了在第一矩阵A和第二矩阵B两个矩阵中寻找具有某种共同特征的大小为(2s+1)×(2s+1)匹配块，首先，设置参与匹配运算的匹配块大小为(2s+1)×(2s+1)。
判断图像局部的相似性，就是计算图像的相似性测度指标，也称为图像匹配；图像匹配可以基于灰度图，也可以基于二值图，相似性测度有多种算法，例如：相关系数、差平方和、差绝对和、最小二乘、距离函数、代价函数等等。
本发明实施例提供的方法，适用于两个匹配块运算时采用的算法为，对应位置的像素之间一一对应进行运算，且最后值采用求和或其它累计方式计算的算法，例如：两个图像区域的灰度差、二值图像的差、相关系数、差平方和、差绝对和、最小二乘等算法。
本实施例中，以二值图像的对应像素直接求逻辑与，然后统计整个匹配区域，计算结果为真值(算术值为1)的数量，与阀值或其它计算值进行比较，以此判断两个区域的相似测度。以上所列举的其它算法，可以基于该方法，采用其它的计算器和累计器完成计算，其运算方法、原理和路径完全相同。通常，大部分的运算算法，都可以转化为加法进行运算，只要是加法运算，且运算时像素之间相对独立，都可以用本发明实施例提供的方法完成和实现。
本发明实施例提供的二维图像匹配方法，其具体的运算步骤如下：
1、确定两个第一矩阵A和第二矩阵B(本实施例中，也可以称为图像A和图像B)进行二维数据匹配的运算；其中，第一矩阵A和第二矩阵B均为图像数据；
为了在A、B两个矩阵中寻找具有某种共同特征的大小为(2s+1)×(2s+1)匹配块，首先需要明确寻找的路径和方向，以图像匹配的应用为例：
对于双目平行相机来说，一个图像上的特征点对应的在另一个图像上的匹配点位于通过该特征点且与两相机焦点连线相互平行的直线上。就是说，图像A和图像B中的对应匹配点的纵坐标都相同，都位于两组数据对应的纵向坐标线上，匹配运算的方向和路径为水平方向，可称为水平匹配或称为横向匹配；同理，当两个相机上下对齐，成像面在同一平面时，其匹配运算的方向和路径为垂直方向，可称为 垂直匹配或称为纵向匹配；
对于双目倾斜相机的匹配来说，一个图像上的特征点对应的另一个图像上的匹配点与被视物上的被视点三点组成一个平面，该平面与两个图像的像平面的之间的交线称为极线，一个图像上的特征点对应的另一个图像上的匹配点位于极线上，当两个相机成角度布置时，极线与图像的水平线一般成一定的夹角，被视物空间位置发生变化，极线与水平线的夹角也发生变化，其匹配运算的方向和路径为极线方向，可称为倾斜匹配或称为斜线匹配；对于双目倾斜相机的匹配来说，当不能确定被视物的空间分布时，其匹配点组对应的极线与水平线的夹角就是一个不确定的变化范围，为了实现自动匹配，当选择一个图像上的特征点后，在另一个图像上寻找匹配点就需要进行全图搜索，进行全图遍历运算，也称为全图(全数组)匹配。
可以定义水平匹配、垂直匹配和斜线匹配为一维线匹配；全图(全数组)匹配为二维面匹配；本发明实施例首先描述一维维度上的匹配，对于面匹配，就是在一维运算完成后，进行一维垂直方向上的移位后，再进行一维运算，依次移位和一维运算，直到完成全图(全数组)运算。一维线匹配以水平匹配为例，其它垂直匹配和斜线匹配原理和方法不变。
2、一维线匹配的逐层运算；
如图4所示，图4表示了第一矩阵A和第二矩阵B水平方向上的叠加状态，设置能够代表中心点图像或数据特征的参与匹配运算的数据块大小为(2s+1)×(2s+1)；图4中，数据中心距数据块的边缘距离为s，图4中，u代表水平匹配层的代码，也可以认为是水平匹配坐标，当u＝0时，两个矩阵完全对应叠加进行匹配运算，此时定义该匹配为0层匹配，当u＝u时，第一矩阵A和第二矩阵B对应叠加的区域如图4最外边的粗黑框所示，叠加区域的高度不变，长度变为W－u，匹配运算只限于在该叠加区域内进行，此时定义该匹配为u层匹配。可以理解，上述实施例一或实施例二中的w＝W-u；
由于设置了数据块，所以匹配结果矩阵需要在有效匹配区域内，该有效匹配区域在上述叠加区域的基础上，还需要减去一个宽度为s的边缘，如图4所示的叠加区域内部的黑色粗线框。随着u的增大，各层的有效匹配区域逐步缩小，当u＝W－2s－1时，达到最小的匹配层，该层匹配后匹配运算即告完成。所以，水平匹配运算需要进行W－2s层的匹配运算。
对应于每个u层，层匹配结果矩阵的大小为(W－u－2s)×(H－2s)，该层匹配结果矩阵与第二矩阵b的左侧位置的匹配叠加位置对应不变，与第一矩阵a右侧位置的匹配叠加位置对应不变，u每增大一个值，第二矩阵b的右侧减少一列，第一矩阵a的左侧减少一列。对于最终匹配结果来说，一个图像上的像素应该最多只有一个最终匹配结果，也就是匹配运算结果应该具有唯一性，所以，还需要定义一个最终匹配结果矩阵。为了计算方便，将层匹配结果矩阵和最终匹配结果矩阵的变量和下标都按照与第二矩阵B的匹配对应关系进行一一对应，也就是行坐标和列坐标都以第二矩阵B的匹配关系为准。上述实施例一或实施例二中的匹配结果矩阵相当于该层匹配结果矩阵。
对于双目平行摄像机获取到的两个图像进行水平逐层匹配来说，具有明确的物理意义，不同的层数u与两幅图像上匹配像素点之间的视差相对应，视差值u的大小与被视物上的被视点距相机的距离成反比，视差u越小，距离越远。通过将不同层上能够实现匹配的匹配点组的位置坐标带入计算公式，可直接得出该匹配点图像对应被视点与相机之间的垂直距离和空间坐标。
对于双目平行摄像机获取到的两个图像数据进行水平逐层匹配来说，两个相机的成像中心线相互平行且垂直于像平面，两个图像的视场范围随着测量深度的增加而增加，同时，两个图像的叠加区域也随着深度的增加而增加，当距离无穷远时可以认为两幅图像完全叠加。逐层运算时，u从零到W－2s层的过程中，叠加区域逐步变小，就是代表两个相机随着深度值的变小，其视场的重合范围相对变小。
对于双目平行摄像机获取到的两个图像数据进行水平逐层匹配来说，在左侧的图像匹配点的位置坐标永远比在右侧匹配点的位置坐标偏右侧。所以匹配时，按照图4的方向，左侧的第一矩阵A向左侧移动，也可以认为是右侧的第二矩阵B向右移动。
对于双目平行摄像机获取到的两个图像数据进行水平逐层匹配来说，所谓的水平匹配逐层运算，就是在不同深度上寻找对应的匹配点和被视物上的被视点。这样的运算结果就是将两幅二维图像在三维空间内进行了展开和拟合，这就是该方法按层匹配的物理意义。
对于不是双目平行摄像机获取到的两个图像数据进行水平逐层匹配的其它类型的匹配运算，没有明 确的匹配左右分布关系的话，还需要在本发明实施例提供的运算方向的反方向，再进行一次匹配运算，也就是说需要进行完全水平匹配运算。完全水平匹配运算的方法，以第一矩阵A和第二矩阵B为例进行说明，其匹配方法是，假设B固定不动，A从右侧第一列开始与B叠加，然后按每次整体移动一列的距离的方法，逐层进行匹配运算，当全部叠加后，还继续移动，直到A完全移动到B的右侧且分开为止。
3、层匹配运算的具体方法和步骤：
设两个图像的某层匹配叠加区域的大小为(W－u)×H，其运算后的结果矩阵为(W－u－2s)×(H－2s)，两个图像的像素点坐标位置的对应关系如图4所示，结果矩阵等于内嵌在叠加区域且与四边距离为s的一个矩形，这时，两个图像的像素点坐标位置完全一一对应。
层匹配运算目的是在A、B两个图像的匹配u层中，其叠加区域为(W－u)×H，在其中寻找具有相似特征的大小为(2s+1)×(2s+1)匹配块。本实施例中，其运算的一种基本公式和原理是：在(2s+1)×(2s+1)匹配块内，两个图像的相同位置上的像素直接进行逻辑与运算，然后统计(2s+1)×(2s+1)匹配块内，逻辑与运算后结果为真值(算术值为1)的总的数量，该总的数量与阈值进行比较，当大于阈值时，两个区域匹配成功，其中心点对应的结果矩阵数值设为1，否则设为零。
参见图5所示的逐层的层匹配运算方法的运算流程示意图；该运算流程对应于实施例一中提供的二维数据匹配方法的流程；该运算流程包括如下步骤：
(1)取出两图像对应行的数据，按行叠加运算；在A、B两个图像第u层对应的两个待匹配矩阵中，按整行依次取出每行的数据，然后在运算器中进行叠加运算，叠加运算可采用多种算法的一种或多种的组合，包括逻辑与、逻辑异或、加法、减法或乘法。本运算示例为逻辑与运算。
(2)计算2s+1行垂直方向数据位的和；
设置大小为(W－u)×(2s+1)的第一队列，采用先进先出的方式，将步骤(1)的运算结果逐行输入第一队列。在第一队列中，每列分别设置一个列累计器，依次将每次输入的整行的数值在2s+1列方向对应的列位置上的数在对应的列累计器中进行累计，当队列充满2s+1列时，列累计器完成一次运算，其对应的值为此时队列中心对应的行位置坐标上，对应的2s+1列上所有数值为1的累计值，计算完成后，该值取出送到下一个数据加工流程。
完成首次列累计计算后，当需要计算下一步的列累计计算时，首先将第一队列的队首的一行的数值从对应的列累计器中当前的值中减掉，同时队尾一行的数值从队列中自动推出，然后新的一行从队首输入队列，在对应的列累计器中加上新输入的行对应列位置上的值，相当于列累计器重新计算了2s+1列方向上数据位的和。
(3)计算列累计器中2s+1个列累计值的行方向数据值的和；
设置一个长度2s+1的第二队列，采用先进先出的方式，从列累计器中，顺序取出每个列累计位的值，将该值输入第二队列，设置一个行累计器，依次将每次输入的数值进行累计，当第二队列充满2s+1个数值时，行累计器完成一次运算，其对应的计算值的坐标为此时队列中心位置对应的值的位置坐标，对应2s+1个列累计器的行方向上的累计值，该累计值是在该值的坐标位置上，(2s+1)×(2s+1)匹配块中心点的匹配值，也是在(2s+1)×(2s+1)匹配块区域内A、B图像对应数据完全叠加且逻辑与值为1的总数量，代表两个图像在该区域的相似度。计算完成后，该值取出送到下一个数据加工流程。
完成一次行累计计算后，计算下一步的行累计计算时，首先将第二队列的队尾一个的数值从行累计器中当前的值中减掉，同时队尾的数值从第二队列中自动推出，然后新的列累计器的数值输入第二队列队首，在行累计器中加上新输入的列累计器的值，相当于行累计器计算了2s+1个列累计器的值的和。
(4)将结果存入匹配结果矩阵
将步骤(3)得到的累计值Z，存入对应位置的数据结果矩阵中，存入时与匹配阈值Q相比较，如果该累计值Z大于匹配阈值Q，将该位置上的值置为1，否则，置为0。对应位置的计算以行累计器2s+1个中心数据的列坐标为数据的列坐标，以列累计器中2s+1行的中心数据的行坐标为数据的行坐标。
对于叠加区域的大小为(W－u)×H的计算区域，其匹配结果矩阵的大小为(W－u－2s)×(H－2s)。每次计算完成后，按照以上的行坐标和列坐标将最后结果存入匹配结果矩阵的对应位置。
重复以上步骤，直到全部叠加区域运算完成。
4、一维线匹配逐层运算的结果写入一维线匹配结果矩阵；
对于最终匹配结果来说，一个矩阵上的数据应该最多只有一个最终匹配结果，也就是匹配运算结果应该具有唯一性，不应该是一个矩阵上的点与另一矩阵上的多个点相对应，由于按层计算匹配，在层匹配运算中，两个矩阵中的数据在该层上是唯一对应。但如果综合多层匹配的层匹配结果来说，由于采用大于匹配阈值的相似性判断标准，必然会出现对于一个矩阵上的特征点在不同的匹配层的结果中都会出现对应的匹配，造成两个图像之间一对多，多对多的现象出现。
将逐层运算的结果写入该维度上的结果矩阵的过程，是将在匹配维度上不同层的匹配结果矩阵，以其中一个图像的像素点为基准，统计计算该像素点在不同层的匹配状态，然后，进行不同层的匹配结果矩阵之间的比较运算，保留最大匹配可能的那层的匹配结果，去除其它歧义匹配，实现匹配结果的唯一，此过程也称为去噪，该步算法也可以称为去噪算法。
去噪算法的方法是在每个匹配层对应的匹配结果矩阵中，以匹配点为中心统计该匹配点四周(2m+1)×(2m+1)数据块内已经匹配的总点数数量，匹配点数量多代表该点的临近点也满足匹配条件，代表了图像数据在空间位置的连续性特征，根据连续性特征去除噪声。通常，上述(2m+1)的取值范围不大于匹配结果矩阵的行值和列值，优选地，m的取值为1-20之间的自然数。
参见图6所示的对匹配结果矩阵进行去噪的运算流程示意图；该运算流程对应于实施例二中提供的一种二维数据匹配方法中，对每个匹配层对应的匹配结果矩阵进行操作的流程；该运算流程包括：
(1)按行取出当前匹配层的匹配结果矩阵中的行数据；
(2)计算2m+1行垂直方向数据位的和；
设置大小为(w－2s)×(2m+1)的第三队列，采用先进先出的方式，将取出的行数据逐行输入第三队列。第三队列中，对应每个列设置一个列累计器，每个列累计器对应一个列位置坐标，随着u值的逐步减少，匹配结果矩阵逐步缩小，其宽度为(w－2s－u)，但其列坐标位置的变量和下标一直与图像b的匹配对应关系进行一一对应，也就是列位置向右对齐，逐层减少。
依次将每次输入的整行的数值在2m+1列方向对应的列位置上的数在对应的列累计器中进行累计，当队列充满2m+1列时，列累计器完成一次运算，其对应的值为此时队列行中心对应的行位置坐标上，对应的2m+1列上所有数值为1的累计值，计算完成后，该值取出送到下一个数据加工流程。
完成列累计计算后，当需要计算下一步的列累计计算时，首先将第三队列的队尾一行的数值从对应的列累计器中当前的值中减掉行对应列位置上的值，同时新的一行输入队列队首，第三队列的队尾一行的数值从队列中自动推出，在对应的列累计器中加上新输入的行对应列位置上的值，相当于列累计器重新计算了2m+1列方向上数据位的和。
(3)计算列累计器中2m+1个列累计值的行方向数据值的和；
设置长度为2m+1的第四队列，采用先进先出的方式，从列累计器中，顺序取出每个列累计位的值，将该值输入第四队列，设置一个行累计器，依次将每次输入的数值进行累计，当第四队列充满2m+1个数值时，行累计器完成一次运算，其对应的计算值的坐标为此时第四队列的中心位置对应的值的位置坐标，对应2m+1个列累计器的行方向上的累计值，该累计值是在该值的坐标位置上，(2m+1)×(2m+1)数据块实现匹配的点的数量，代表已匹配点之间是否具有良好的空间连续性。计算完成后，该值取出送到下一个数据加工流程。
完成一次行累计计算后，计算下一步的行累计计算时，首先将第四队列的队尾的数值从行累计器中当前的值中减掉，同时新的列累计器的数值输入第四队列队首，队尾的数值从第四队列中自动推出，在行累计器中加上新输入的列累计器的值，相当于行累计器计算了2m+1个列累计器的值的和。
(4)将结果存入最终匹配结果矩阵
将上述步骤(3)中每次行累计器计算得到的累计值G，存入对应位置的最终匹配结果矩阵中，存入时首先取出对应位置的最终匹配结果矩阵中的原值Y与本次累计值G相比较，如果本次累计值G大于原值Y，将该累计值G代替原值Y存入对应位置的最终匹配结果矩阵中，如果本次累计值G小于原值Y，原对应位置的原值Y保持不变。
在存入本次计算值的同时，需要另设一个与最终匹配结果矩阵完全相同的矩阵，新矩阵需要记录对应的层u的数据，该数据代表匹配点的视差。当然可以直接设一个三维结果矩阵，除记录计算值外再记 录层数值。对应位置的计算如图5所示，以行累计器2m+1个中心数据的列坐标为数据的列坐标，以列累计器中2m+1行的中心数据的行坐标为数据的行坐标。
原图像的数据结构为W×H的二维数据结构，经层匹配运算后，层匹配结果矩阵的结构为(W－u－2s)×(H－2s)的二维数据结构，经过去噪运算，得到最终匹配结果矩阵大小为(W－2s－2m)×(H－2s－2m)，在以上所有运算过程中，对应的匹配像素和匹配点以及结果矩阵的坐标，都以b图的行坐标和列坐标为基准进行运算，如图5和图6所示。
重复以上步骤，直到全部层匹配结果去噪运算完成。
完成后的结果矩阵代表，通过双目平行相机获取的图像b与图像a进行匹配后，对应于图像b像素点能够与图像a实现最终匹配的点的位置坐标，以及与对应图像a的匹配点两个匹配点之间的视差值u。根据u值以及双目匹配的相关计算公式可得到被视点的空间位置坐标。
5、二维平面匹配的方法和步骤
如果是二维平面匹配，需要先进行水平线匹配，每个水平线匹配的方法和步骤，与2、3、4描述的步骤完全相同，当完成一条线匹配后，得到该条线匹配的匹配结果矩阵，然后，以其中的一个数据矩阵为主，另一个矩阵在垂直方向上向下整体平移一行，然后，对两个数据矩阵的叠加区域在向下的一个水平维度上再进行一次整体匹配，依次完成每个水平维度上的匹配，全部完成后，按照步骤4的方法，将每个维度上的结果矩阵都写入最后的结果矩阵，保留原图上对应像素点的最大匹配值，实现二维平面的全匹配。
本发明实施例提供的方法可以形成一套处理装置，自动完成数据的加工和运算，该装置可以以软件方式实现，也可以将算法形成专用硬件芯片，采用数字电路对数据进行加工。该方法是一种基于基础运算的方法，如果在该方法的基础上，将该算法移植到大规模并行处理专用芯片GPU、NPU、FPGA上进行运算，还可以得到此类芯片提供的额外加速性能。根据该方法还可以研制专用的运算芯片。使用该方法将极大提高运算速度和效率，节省数据存储空间，提高数据的存取速度，减少运算资源的消耗，经比较其效率比传统方法提高60倍以上或更高。
实施例四
对应于上述方法实施例，参见图7所示的第一种二维数据匹配装置的结构示意图；该装置包括依次连接的第一运算器70、第一队列71、第二运算器72、第一计数器73、第二队列74、第三运算器75、第二计数器76、第一比较器77和第一存储器78；该第一队列71和第二队列74均为数据存储结构，第一队列71和第二队列74的数据存储原则为先进先出；
第一运算器70，配置成逐行对待匹配矩阵a和待匹配矩阵b中相同数据行位置的数据进行逐位匹配运算；按行将匹配运算的匹配结果输入至第一队列的队首，其中，第一队列的元素为匹配运算后的数据，第一队列的元素的数据存储位置的数量大于或等于待匹配矩阵a或待匹配矩阵b的列数，第一队列的长度为设定的匹配窗口的行数；按行将匹配运算的匹配结果输入至第一队列队首，其中，第一队列的队列元素其数据存储位置的数量大于或等于待匹配矩阵a或待匹配矩阵b的列数，第一队列的长度为设定的匹配窗口的行数；
第二运算器72，第一队列的队首每输入一个匹配结果，第二运算器中的每个子运算器对输入的匹配结果对应数据位置上的数值进行累计运算，其中，第二运算器包括一列子运算器，子运算器的数量与第一队列的元素中的数据存储位置的数量相同，且每个子运算器的位置与第一队列的元素上的数据存储位置相对应；
第一计数器72，配置成当第一队列中每个数据位都存储有数据时，第一计数器设置为零；
第二运算器72，配置成将第二运算器的每个子运算器的累计值，按数据位置顺序输出至第二队列的队首，其中，第二队列的长度与匹配窗口的列数相同；
第三运算器75，配置成第二队列的队首在每输入一个第二运算器中子运算器的累计值后，第三运算器对输入的累计值再进行累计运算，其中，第三运算器为单个运算器；
第二计数器76，配置成当第二队列中每个数据位都存储有数据时，第二计数器的值设置为零；
第三运算器75，配置成将第三运算器的累计结果输入至第一比较器；
第一比较器77，配置成将第三运算器中的累计结果与预先存储的匹配阈值进行比较，当第三运算器中的累计结果大于匹配阈值时，比较结果为第一值；当第三运算器中的累计结果小于匹配阈值时，比较结果为第二值；其中，第一值表示比较结果为真，或为1；第二值表示比较结果为假， 或为0；将比较结果输入至第一存储器，形成匹配结果矩阵，第一存储器中的匹配结果矩阵的横坐标为第二计数器的值，纵坐标为第一计数器的值；
第二队列74，配置成当第二队列中每个数据位都存储有数据后，在第二队列的队首再输入新的数据时，第二队列将队尾的数据推出第二队列；
第三运算器75，配置成将新输入的第二运算器的子运算器上对应的数值在第三运算器中做累计运算，运算后，第三运算器再将第二队列的队尾中推出的数据在第三运算器的数值中做减除运算，运算后，第二计数器的值加1；
第二运算器72，配置成重复触发第三运算器、第一比较器、第二队列和第三运算器运行，直到第二运算器的所有子运算器中的运算值依次全部输入第二队列，以完成待匹配矩阵a和待匹配矩阵b中的当前数据行的全部匹配；
第一队列71，配置成当第一队列中每个数据位都存储有数据后，第一队列队首再输入新的数据时，第一队列的队尾的数据推出第一队列；
第二运算器72，配置成第二运算器中的每个子运算器将新输入第一队列的队首对应数据位置上的数值再进行累计运算，完成运算后，每个子运算器再将推出第一队列队尾的对应数据位置上的数值在对应子运算器的数值上做减除运算，第一计数器加1；重复触发第二运算器、第三运算器、第二计数器、第三运算器、第一比较器、第二队列、第三运算器、第二运算器、第一队列运行，直到完成待匹配矩阵a和待匹配矩阵b中所有数据行的全部匹配运算。
本发明实施例提供的二维数据匹配装置，该装置包括依次连接的第一运算器、第一队列、第二运算器、第一计数器、第二队列、第三运算器、第二计数器、第一比较器和第一存储器执行；第一队列和第二队列均为数据存储结构，第一队列和第二队列的数据存储原则为先进先出；通过第一运算器逐行对待匹配矩阵a和待匹配矩阵b中相同数据行位置的数据进行逐位匹配运算并输入至第一队列；通过第二运算器中的每个子运算器对输入的匹配结果对应数据位置上的数值进行累计运算；通过第三运算器对输入第二队列的累计值进行累计运算；通过第一比较器将第三运算器中的累计结果与预先存储的匹配阈值进行比较，将比较结果输入至第一存储器，形成匹配结果矩阵；重复上述步骤直到第二运算器的所有子运算器中的运算值依次全部输入第二队列，并完成待匹配矩阵a和待匹配矩阵b中所有数据行的全部匹配。通过该方式进行二维数据中的数据块匹配时，可以仅对相邻数据块之间数据变化部分进行运算，对数据重合部分不进行运算，减少了大量的重复运算，大大降低了数据匹配的运算量，提高了数据匹配的运算效率，同时，由于采用了队列这种方式存储中间过程数据，极大节省了存储空间，方便了数据的存取操作，极大提高了运算速度。
参见图8所示的第二种二维数据匹配装置的结构示意图；该装置包括依次连接的第一运算器70、第一队列71、第二运算器72、第一计数器73、第二队列74、第三运算器75、第二计数器76、第一比较器77和第一存储器78；还包括与第一运算器70连接的第一控制器80；
第一控制器80，配置成按照设定的顺序，依次获取待匹配矩阵a以及待匹配矩阵b中的不同位置的行数据；每次获取到的行数据在待匹配矩阵a中的位置，与在待匹配矩阵b中的位置相同；将每次获取到的行数据输出至第一运算器；其中，设定的顺序至少包括以下一种：从上至下的逐行获取，或者，从下至上的逐行获取，或者，从左至右的逐列获取，或者，从右至左的逐列获取。
上述第一控制器还配置成：生成匹配层，具体包括如下步骤：获取第一矩阵和第二矩阵；将第一矩阵和第二矩阵分别保存至第一存储区和第二存储区；按照设定的匹配路径，每次按设定的单位匹配距离，移动第二矩阵，以改变第一矩阵和第二矩阵的重合区域；其中，设定的移动路径包括线路经或面路径；线路经包括水平线路径、竖直线路径和倾斜线路径中的一种或多种；面路径中包括多个同一种类的线路经；根据每移动一次所产生的重合区域，生成一个匹配层；其中，匹配层包括待匹配矩阵a和待匹配矩阵b以及匹配层的层标识。
上述第一控制器还配置成：第一矩阵和第二矩阵包括通过双目平行摄像机获取到的两个二维图像数据矩阵；二维图像数据矩阵包括二值图像矩阵或布尔矩阵。
上述第一控制器还配置成：第一控制器还配置成：将第一矩阵内的重合区域的行列值和行列值对应的数据作为待匹配矩阵a；将第二矩阵内的重合区域的行列值和行列值对应的数据作为待匹配矩阵b；第一控制器将第二矩阵移动的距离作为匹配层的层标识；将待匹配矩阵a、待匹配矩阵b和层标识保存为匹配层。
上述装置还包括依次连接的第二控制器89、第三队列81、第四运算器82、第三计数器83、第四队列84、第五运算器85、第四计数器86、第二比较器87和第二存储器88执行；第三队列81 和第四队列84均为数据存储结构，第三队列和第四队列的数据存储原则为先进先出；
第二控制器89，配置成逐一获取每个匹配层对应的由待匹配矩阵a和待匹配矩阵b作匹配运算后，得到的匹配结果矩阵以及匹配层的层标识；对每个匹配结果矩阵按匹配层的层标识执行下述操作：将第二存储器上的所有对应地址的初始值设置为零；逐行获取当前匹配层的匹配结果矩阵中的行数据，将行数据输入第三队列的队首，其中，第三队列的元素为匹配结果矩阵中的行数据，第三队列的元素的数据存储位置的数量大于或等于所有的匹配结果矩阵中，最大的匹配结果矩阵的列数，第三队列的长度为设定的计算窗口的行数；
第四运算器82，配置成第三队列的队首每输入一行当前匹配层的匹配结果矩阵中的行数据，第四运算器中的每个子运算器将输入的行数据内对应数据位置上的数值进行累计运算，其中，第四运算器包括一列子运算器，该列子运算器的数量与第三队列的元素的数据存储位置的数量相同，且每个子运算器的位置与第三队列的元素上的位置相对应；
第三计数器83，配置成当第三队列中每个数据位都存储有数据时，第三计数器设置为零；
第四运算器82，配置成将第四运算器中的每个子运算器的累计值，按数据位置顺序输出至第四队列的队首，其中，第四队列的长度与设定的计算窗口的列数相同；
第五运算器85，配置成第四队列的队首在每输入一个第四运算器的子运算器的累计值后，第五运算器将输入的累计值再进行累计运算，其中，第五运算器为单个的运算器；
第四计数器86，配置成当第四队列中每个数据位都存储有数据时，第四计数器设置为零；
第二控制器89，配置成判断第二存储器上对应地址的值是否为零；其中，对应地址的横坐标为第四计数器的值，纵坐标为第三计数器的值；如果是，将第五运算器的累计结果以及该匹配层的层标识输入至第二存储器的对应地址中；如果否，从第二存储器的对应地址中取出已存入的累计结果值，输入至第二比较器，同时，将当前的第五运算器中的累计结果输入至第二比较器；
第二比较器87，配置成将第五运算器中的累计结果与第二存储器上取出的累计结果进行比较，当第五运算器中的累计结果大于第二存储器上取出的累计结果时，将第五运算器中的累计结果代替第二存储器上取出的累计结果值存入第二存储器中对应地址内，同时，将当前匹配结果矩阵对应的匹配层的层标识代替原第二存储器中对应地址上已存入的层标识存入第二存储器对应地址中；
第四队列84，配置成当第四队列中每个数据位都存储有数据后，第四队列的队首再输入新的数据时，第四队列的队尾数据推出第四队列；
第五运算器85，配置成将新输入的第四运算器上对应的数值在第五运算器中做累计运算，运算后，第五运算器再将第四队列中推出的数据在第五运算器的数值中做减除运算，运算后，第四计数器的值上加1；
第四运算器82，配置成重复触发第二控制器、第二比较器、第四队列、第五运算器运行，直到第四运算器的所有子运算器的累计值依次全部输入第四队列，以完成匹配结果矩阵当前行的运算；
第三队列84，配置成当第三队列中每个数据位都存储有数据后，第三队列的队首再输入新的数据时，第三队列的队尾数据推出第三队列；
第四运算器82，配置成第四运算器中的每个子运算器对新输入第三队列的对应数据位置上的数值在子运算器中进行累计运算，完成运算后，每个子运算器将推出队列的数据对应数据位置上的数值在对应子运算器的数值中做减除运算，第三计数器的值上加1；
第二控制器89，配置成重复触发第四运算器、第五运算器、第四计数器、第二控制器、第二比较器、第四队列、第五运算器、第四运算器、第三队列、第四运算器运行，直到完成当前匹配层的匹配结果矩阵中所有行的全部运算；重复触发第二控制器至第四运算器运行以完成下一个匹配结果矩阵和匹配层的运算，直到完成所有匹配层对应的匹配结果矩阵的运算；其中，第二存储器用于存储最终结果矩阵，最终结果矩阵中每个地址上存储的是，经所有匹配层对应地址上的累计结果比较后，获得的最大的累计结果值以及最大的累计结果值所对应的层标识。
实施例五
对应于上述方法实施例和装置实施例，参见图9所示的一种二维数据匹配逻辑电路的结构示意图；该二维数据匹配逻辑电路90包括上述二维数据匹配装置90a。
对于上述方法实施例和装置实施例中的，第一控制器、第一运算器、第一队列、第二运算器、第一计数器、第二队列、第三运算器、第二计数器、第一比较器和第一存储器；第二控制器、第三队列、第四运算器、第三计数器、第四队列、第五运算器、第四计数器、第二比较器和第二存储器等，都可以通过对应的逻辑电路和芯片实现；其中，第一队列、第二队列、第三队列、第四 队列、第一存储器和第二存储器可以通过高速存储器芯片实现；上述第一运算器、第二运算器、第三运算器、第四运算器或第五运算器可以为加法器、乘法器、累计器等多种形式；上述第一控制器、第一计数器、第二计数器、第二控制器、第三计数器、第四计数器等均可以通过对应的电路结构或芯片实现。
上述二维数据匹配逻辑电路可以通过各类对应的数字芯片或电路搭建连接，从而实现上述二维数据匹配方法；可以理解，该二维数据匹配方法也可以通过FPGA等可编程逻辑芯片实现，或通过专用的一体化芯片将上述二维数据匹配逻辑电路集中在一个独立的芯片上完成。
本发明实施例提供的二维数据匹配逻辑电路，与上述实施例提供的二维数据匹配方法和装置具有相同的技术特征，所以也能解决相同的技术问题，达到相同的技术效果。
所述功能如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本发明的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本发明各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(ROM，Read-Only Memory)、随机存取存储器(RAM，Random Access Memory)、磁碟或者光盘等各种可以存储程序代码的介质。
最后应说明的是：以上所述实施例，仅为本发明的具体实施方式，用以说明本发明的技术方案，而非对其限制，本发明的保护范围并不局限于此，尽管参照前述实施例对本发明进行了详细的说明，本领域的普通技术人员应当理解：任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，其依然可以对前述实施例所记载的技术方案进行修改或可轻易想到变化，或者对其中部分技术特征进行等同替换；而这些修改、变化或者替换，并不使相应技术方案的本质脱离本发明实施例技术方案的精神和范围，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应所述以权利要求的保护范围为准。

Claims (13)

  1. 一种二维数据匹配方法，其特征在于，所述方法由依次连接的第一运算器、第一队列、第二运算器、第一计数器、第二队列、第三运算器、第二计数器、第一比较器和第一存储器执行；所述第一队列和所述第二队列均为数据存储结构，所述第一队列和所述第二队列的数据存储原则为先进先出；
    所述方法包括：
    (1)所述第一运算器逐行对待匹配矩阵a和待匹配矩阵b中相同数据行位置的数据进行逐位匹配运算；
    (2)按行将匹配运算的匹配结果输入至所述第一队列的队首，其中，所述第一队列的元素为匹配运算后的数据，所述第一队列的元素的数据存储位置的数量大于或等于待匹配矩阵a或待匹配矩阵b的列数，所述第一队列的长度为设定的匹配窗口的行数；
    (3)所述第一队列的队首每输入一个匹配结果，所述第二运算器中的每个子运算器对输入的匹配结果对应数据位置上的数值进行累计运算，其中，所述第二运算器包括一列子运算器，所述子运算器的数量与所述第一队列的元素中的数据存储位置的数量相同，且每个子运算器的位置与所述第一队列的元素上的数据存储位置相对应；
    (4)当所述第一队列中每个数据位都存储有数据时，所述第一计数器设置为零；
    (5)将所述第二运算器的每个子运算器的累计值，按数据位置顺序输出至所述第二队列的队首，其中，所述第二队列的长度与所述匹配窗口的列数相同；
    (6)所述第二队列的队首在每输入一个第二运算器中子运算器的累计值后，所述第三运算器对输入的累计值再进行累计运算，其中，所述第三运算器为单个运算器；
    (7)当所述第二队列中每个数据位都存储有数据时，所述第二计数器的值设置为零；
    (8)将所述第三运算器的累计结果输入至所述第一比较器；
    (9)所述第一比较器将所述第三运算器中的累计结果与预先存储的匹配阈值进行比较，当所述第三运算器中的累计结果大于所述匹配阈值时，比较结果为第一值；当所述第三运算器中的累计结果小于所述匹配阈值时，比较结果为第二值；其中，所述第一值表示比较结果为真，或为1；所述第二值表示比较结果为假，或为0；
    (10)将所述比较结果输入至所述第一存储器，形成匹配结果矩阵，所述第一存储器中的匹配结果矩阵的横坐标为所述第二计数器的值，纵坐标为所述第一计数器的值；
    (11)当所述第二队列中每个数据位都存储有数据后，在所述第二队列的队首再输入新的数据时，所述第二队列将队尾的数据推出所述第二队列，所述第三运算器将新输入的所述第二运算器的子运算器上对应的数值在所述第三运算器中做累计运算，运算后，所述第三运算器再将所述第二队列的队尾中推出的数据在所述第三运算器的数值中做减除运算，运算后，所述第二计数器的值加1；
    (12)重复步骤(8)(9)(10)(11)直到所述第二运算器的所有子运算器中的运算值依次全部输入所述第二队列，以完成所述待匹配矩阵a和所述待匹配矩阵b中的当前数据行的全部匹配；
    (13)完成以上步骤后，当所述第一队列中每个数据位都存储有数据后，所述第一队列队首再输入新的数据时，所述第一队列的队尾的数据推出所述第一队列，所述第二运算器中的每个子运算器将新输入所述第一队列的队首对应数据位置上的数值再进行累计运算，完成运算后，每个子运算器再将推出所述第一队列队尾的对应数据位置上的数值在对应子运算器的数值上做减除运算，所述第一计数器加1；
    (14)重复步骤(5)(6)(7)(8)(9)(10)(11)(12)(13)直到完成所述待匹配矩阵a和所述待匹配矩阵b中所有数据行的全部匹配运算。
  2. 根据权利要求1所述的方法，其特征在于，所述方法的执行还包括与所述第一运算器连接的第一控制器；
    所述方法还包括：
    按照设定的顺序，所述第一控制器依次获取所述待匹配矩阵a以及所述待匹配矩阵b中的不同位置的行数据；每次获取到的所述行数据在所述待匹配矩阵a中的位置，与在所述待匹配矩阵b中的位置相同；将每次获取到的所述行数据输出至所述第一运算器；其中，设定的顺序至少包括以下一种：从上至下的逐行获取，或者，从下至上的逐行获取，或者，从左至右的逐列获取，或者，从右至左的逐列获取。
  3. 根据权利要求2所述的方法，其特征在于，所述方法还包括：所述第一控制器生成匹配层， 具体包括如下步骤：
    所述第一控制器获取第一矩阵和第二矩阵；
    所述第一控制器将所述第一矩阵和所述第二矩阵分别保存至第一存储区和第二存储区；
    按照设定的匹配路径，每次按设定的单位匹配距离，所述第一控制器移动所述第二矩阵，以改变所述第一矩阵和所述第二矩阵的重合区域；其中，所述设定的移动路径包括线路经或面路径；所述线路经包括水平线路径、竖直线路径和倾斜线路径中的一种或多种；所述面路径中包括多个同一种类的线路经；
    所述第一控制器根据每移动一次所产生的所述重合区域，生成一个匹配层；其中，所述匹配层包括待匹配矩阵a和待匹配矩阵b以及所述匹配层的层标识。
  4. 根据权利要求3所述的方法，其特征在于，所述第一矩阵和所述第二矩阵包括通过双目平行摄像机获取到的两个二维图像数据矩阵；所述二维图像数据矩阵包括二值图像矩阵或布尔矩阵。
  5. 根据权利要求3或4所述的方法，其特征在于，所述第一控制器根据每移动一次所产生的所述重合区域，生成一个匹配层步骤，包括：
    所述第一控制器将所述第一矩阵内的所述重合区域的行列值和所述行列值对应的数据作为所述待匹配矩阵a；
    所述第一控制器将所述第二矩阵内的所述重合区域的行列值和所述行列值对应的数据作为所述待匹配矩阵b；
    所述第一控制器将所述第二矩阵移动的距离作为所述匹配层的层标识；
    将所述待匹配矩阵a、所述待匹配矩阵b和所述层标识保存为匹配层。
  6. 根据权利要求5所述的方法，其特征在于，所述方法还包括：
    第二控制器逐一获取每个匹配层对应的由所述待匹配矩阵a和所述待匹配矩阵b作匹配运算后，得到的所述匹配结果矩阵以及所述匹配层的层标识；
    所述第二控制器将所述第二存储器上的所有对应地址的初始值设置为零；
    对每个所述匹配结果矩阵按匹配层的层标识执行下述操作：所述操作由依次连接的所述第二控制器、第三队列、第四运算器、第三计数器、第四队列、第五运算器、第四计数器、第二比较器和第二存储器执行；所述第三队列和所述第四队列均为数据存储结构，所述第三队列和所述第四队列的数据存储原则为先进先出；
    所述操作包括：
    (1)所述第二控制器逐行获取当前匹配层的所述匹配结果矩阵中的行数据，将所述行数据输入所述第三队列的队首，其中，所述第三队列的元素为所述匹配结果矩阵中的行数据，所述第三队列的元素的数据存储位置的数量大于或等于所有的匹配结果矩阵中，最大的所述匹配结果矩阵的列数，所述第三队列的长度为设定的计算窗口的行数；
    (2)所述第三队列的队首每输入一行当前匹配层的所述匹配结果矩阵中的行数据，所述第四运算器中的每个子运算器将输入的所述行数据内对应数据位置上的数值进行累计运算，其中，所述第四运算器包括一列子运算器，该列子运算器的数量与所述第三队列的元素的数据存储位置的数量相同，且每个子运算器的位置与所述第三队列的元素上的位置相对应；
    (3)当所述第三队列中每个数据位都存储有数据时，所述第三计数器设置为零；
    (4)将所述第四运算器中的每个子运算器的累计值，按数据位置顺序输出至所述第四队列的队首，其中，所述第四队列的长度与设定的计算窗口的列数相同；
    (5)所述第四队列的队首在每输入一个所述第四运算器的子运算器的累计值后，所述第五运算器将输入的所述累计值再进行累计运算，其中，所述第五运算器为单个的运算器；
    (6)当所述第四队列中每个数据位都存储有数据时，所述第四计数器设置为零；
    (7)判断所述第二存储器上对应地址的值是否为零；其中，所述对应地址的横坐标为第四计数器的值，纵坐标为第三计数器的值；如果是，将第五运算器的累计结果以及该匹配层的层标识输入至第二存储器的对应地址中；如果否，从所述第二存储器的对应地址中取出已存入的累计结果值，输入至所述第二比较器，同时，将当前的所述第五运算器中的累计结果输入至所述第二比较器；
    (8)所述第二比较器将所述第五运算器中的累计结果与所述第二存储器上取出的累计结果值进行比较，当所述第五运算器中的累计结果大于所述第二存储器上取出的累计结果值时，将所述第五运算器中的累计结果代替所述第二存储器上取出的累计结果值存入所述第二存储器中对应地址内，同时，将当前匹配结果矩阵对应的匹配层的层标识代替原第二存储器中对应地址上已存入的层标识存入第二存储器对应地址中；
    (9)当所述第四队列中每个数据位都存储有数据后，所述第四队列的队首再输入新的数据时，所述第四队列的队尾数据推出第四队列，所述第五运算器将新输入的第四运算器上对应的数值在第五运算器中做累计运算，运算后，所述第五运算器再将第四队列中推出的数据在第五运算器的数值中做减除运算，运算后，所述第四计数器的值上加1；
    (10)重复步骤(7)(8)(9)直到所述第四运算器的所有子运算器的累计值依次全部输入所述第四队列，以完成所述匹配结果矩阵当前行的运算；
    (11)完成以上步骤后，当所述第三队列中每个数据位都存储有数据后，所述第三队列的队首再输入新的数据时，所述第三队列的队尾数据推出第三队列，所述第四运算器中的每个子运算器对新输入所述第三队列的对应数据位置上的数值在子运算器中进行累计运算，完成运算后，每个子运算器将推出队列的数据对应数据位置上的数值在对应子运算器的数值中做减除运算，所述第三计数器的值上加1；
    (12)重复步骤(4)(5)(6)(7)(8)(9)(10)(11)直到完成当前匹配层的所述匹配结果矩阵中所有行的全部运算；
    (13)重复步骤(1)-(12)以完成下一个匹配结果矩阵和匹配层的运算，直到完成所有匹配层对应的匹配结果矩阵的运算；其中，所述第二存储器用于存储最终结果矩阵，所述最终结果矩阵中每个地址上存储的是，经所有匹配层对应地址上的累计结果比较后，获得的最大的累计结果累计值数据以及其中的该最大的累计结果值累计值所对应的层标识，直到完成所有匹配层对应的匹配结果矩阵的运算。
  7. 一种二维数据匹配装置，其特征在于，所述装置包括依次连接的第一运算器、第一队列、第二运算器、第一计数器、第二队列、第三运算器、第二计数器、第一比较器和第一存储器；所述第一队列和所述第二队列均为数据存储结构，所述第一队列和所述第二队列的数据存储原则为先进先出；
    所述第一运算器，配置成逐行对待匹配矩阵a和待匹配矩阵b中相同数据行位置的数据进行逐位匹配运算；按行将匹配运算的匹配结果输入至所述第一队列的队首，其中，所述第一队列的元素为匹配运算后的数据，所述第一队列的元素的数据存储位置的数量大于或等于待匹配矩阵a或待匹配矩阵b的列数，所述第一队列的长度为设定的匹配窗口的行数；按行将匹配运算的匹配结果输入至所述第一队列队首，其中，所述第一队列的队列元素其数据存储位置的数量大于或等于待匹配矩阵a或待匹配矩阵b的列数，所述第一队列的长度为设定的匹配窗口的行数；
    所述第二运算器，配置成所述第一队列的队首每输入一个匹配结果，所述第二运算器中的每个子运算器对输入的匹配结果对应数据位置上的数值进行累计运算，其中，所述第二运算器包括一列子运算器，所述子运算器的数量与所述第一队列的元素中的数据存储位置的数量相同，且每个子运算器的位置与所述第一队列的元素上的数据存储位置相对应；所述第一队列队首每输入一个匹配结果，所述第二运算器中的每个子运算器对输入的匹配结果对应数据位置上的数值进行累计运算，其中，所述第二运算器包括一列子运算器，所述子运算器的数量与所述第一队列的数据存储位置的数量相同，且每个子运算器的位置与所述第一队列元素上的位置相对应；
    所述第一计数器，配置成当所述第一队列中每个数据位都存储有数据时，所述第一计数器设置为零；
    所述第二运算器，配置成将所述第二运算器的每个子运算器的累计值，按数据位置顺序输出至所述第二队列的队首，其中，所述第二队列的长度与所述匹配窗口的列数相同；
    所述第三运算器，配置成所述第二队列的队首在每输入一个第二运算器中子运算器的累计值后，所述第三运算器对输入的累计值再进行累计运算，其中，所述第三运算器为单个运算器；
    所述第二计数器，配置成当所述第二队列中每个数据位都存储有数据时，所述第二计数器的值设置为零；
    所述第三运算器，配置成将所述第三运算器的累计结果输入至所述第一比较器；
    所述第一比较器，配置成将所述第三运算器中的累计结果与预先存储的匹配阈值进行比较，当所述第三运算器中的累计结果大于所述匹配阈值时，比较结果为第一值；当所述第三运算器中的累计结果小于所述匹配阈值时，比较结果为第二值；其中，所述第一值表示比较结果为真，或为1；所述第二值表示比较结果为假，或为0；将所述比较结果输入至所述第一存储器，形成匹配结果矩阵，所述第一存储器中的匹配结果矩阵的横坐标为所述第二计数器的值，纵坐标为所述第一计数器的值；
    所述第二队列，配置成当所述第二队列中每个数据位都存储有数据后，在所述第二队列的队首再输入新的数据时，所述第二队列将队尾的数据推出所述第二队列；
    所述第三运算器，配置成将新输入的所述第二运算器的子运算器上对应的数值在所述第三运算器中做累计运算，运算后，所述第三运算器再将所述第二队列的队尾中推出的数据在所述第三运算器的数值中做减除运算，运算后，所述第二计数器的值加1；
    所述第二运算器，配置成重复触发所述第三运算器、所述第一比较器、所述第二队列和所述第三运算器运行，直到所述第二运算器的所有子运算器中的运算值依次全部输入所述第二队列，以完成所述待匹配矩阵a和所述待匹配矩阵b中的当前数据行的全部匹配；
    所述第一队列，配置成当所述第一队列中每个数据位都存储有数据后，所述第一队列队首再输入新的数据时，所述第一队列的队尾的数据推出所述第一队列；
    所述第二运算器，配置成所述第二运算器中的每个子运算器将新输入所述第一队列的队首对应数据位置上的数值再进行累计运算，完成运算后，每个子运算器再将推出所述第一队列队尾的对应数据位置上的数值在对应子运算器的数值上做减除运算，所述第一计数器加1；重复触发所述第二运算器、所述第三运算器、所述第二计数器、所述第三运算器、所述第一比较器、所述第二队列、所述第三运算器、所述第二运算器、所述第一队列运行，直到完成所述待匹配矩阵a和所述待匹配矩阵b中所有数据行的全部匹配运算。
  8. 根据权利要求7所述的装置，其特征在于，所述装置还包括与所述第一运算器连接的第一控制器；
    所述第一控制器，配置成：
    按照设定的顺序，依次获取所述待匹配矩阵a以及所述待匹配矩阵b中的不同位置的行数据；每次获取到的所述行数据在所述待匹配矩阵a中的位置，与在所述待匹配矩阵b中的位置相同；将每次获取到的所述行数据输出至所述第一运算器；其中，设定的顺序至少包括以下一种：从上至下的逐行获取，或者，从下至上的逐行获取，或者，从左至右的逐列获取，或者，从右至左的逐列获取。
  9. 根据权利要求8所述的装置，其特征在于，所述第一控制器还配置成：生成匹配层，具体包括如下步骤：获取第一矩阵和第二矩阵；将所述第一矩阵和所述第二矩阵分别保存至第一存储区和第二存储区；按照设定的匹配路径，每次按设定的单位匹配距离，移动所述第二矩阵，以改变所述第一矩阵和所述第二矩阵的重合区域；其中，所述设定的移动路径包括线路经或面路径；所述线路经包括水平线路径、竖直线路径和倾斜线路径中的一种或多种；所述面路径中包括多个同一种类的线路经；根据每移动一次所产生的所述重合区域，生成一个匹配层；其中，所述匹配层包括待匹配矩阵a和待匹配矩阵b以及所述匹配层的层标识。
  10. 根据权利要求9所述的装置，其特征在于，所述第一控制器还配置成：所述第一矩阵和所述第二矩阵包括通过双目平行摄像机获取到的两个二维图像数据矩阵；所述二维图像数据矩阵包括二值图像矩阵或布尔矩阵。
  11. 根据权利要求9或10所述的装置，其特征在于，所述第一控制器还配置成：将所述第一矩阵内的所述重合区域的行列值和所述行列值对应的数据作为所述待匹配矩阵a；将所述第二矩阵内的所述重合区域的行列值和所述行列值对应的数据作为所述待匹配矩阵b；所述第一控制器将所述第二矩阵移动的距离作为所述匹配层的层标识；将所述待匹配矩阵a、所述待匹配矩阵b和所述层标识保存为匹配层。
  12. 根据权利要求10所述的装置，其特征在于，所述装置还包括依次连接的第二控制器、第三队列、第四运算器、第三计数器、第四队列、第五运算器、第四计数器、第二比较器和第二存储器执行；所述第三队列和所述第四队列均为数据存储结构，所述第三队列和所述第四队列的数据存储原则为先进先出；
    所述第二控制器，配置成逐一获取每个匹配层对应的由所述待匹配矩阵a和所述待匹配矩阵b作匹配运算后，得到的所述匹配结果矩阵以及所述匹配层的层标识；对每个所述匹配结果矩阵按匹配层的层标识执行下述操作：将所述第二存储器上的所有对应地址的初始值设置为零；逐行获取当前匹配层的所述匹配结果矩阵中的行数据，将所述行数据输入所述第三队列的队首，其中，所述第三队列的元素为所述匹配结果矩阵中的行数据，所述第三队列的元素的数据存储位置的数量大于或等于所有的匹配结果矩阵中，最大的所述匹配结果矩阵的列数，所述第三队列的长度为设定的计算窗口的行数；
    所述第四运算器，配置成所述第三队列的队首每输入一行当前匹配层的所述匹配结果矩阵中的行数据，所述第四运算器中的每个子运算器将输入的所述行数据内对应数据位置上的数值进行累计运算，其中，所述第四运算器包括一列子运算器，该列子运算器的数量与所述第三队列的元素的数据存储位置的数量相同，且每个子运算器的位置与所述第三队列的元素上的位置相对应；
    所述第三计数器，配置成当所述第三队列中每个数据位都存储有数据时，所述第三计数器设置为零；
    所述第四运算器，配置成将所述第四运算器中的每个子运算器的累计值，按数据位置顺序输出至所述第四队列的队首，其中，所述第四队列的长度与设定的计算窗口的列数相同；
    所述第五运算器，配置成所述第四队列的队首在每输入一个所述第四运算器的子运算器的累计值后，所述第五运算器将输入的所述累计值再进行累计运算，其中，所述第五运算器为单个的运算器；
    所述第四计数器，配置成当所述第四队列中每个数据位都存储有数据时，所述第四计数器设置为零；
    所述第二控制器，配置成判断所述第二存储器上对应地址的值是否为零；其中，所述对应地址的横坐标为第四计数器的值，纵坐标为第三计数器的值；如果是，将第五运算器的累计结果以及该匹配层的层标识输入至第二存储器的对应地址中；如果否，从所述第二存储器的对应地址中取出已存入的累计结果值，输入至所述第二比较器，同时，将当前的所述第五运算器中的累计结果输入至所述第二比较器；
    所述第二比较器，配置成将所述第五运算器中的累计结果与所述第二存储器上取出的累计结果进行比较，当所述第五运算器中的累计结果大于所述第二存储器上取出的累计结果时，将所述第五运算器中的累计结果代替所述第二存储器上取出的累计结果值存入所述第二存储器中对应地址内，同时，将当前匹配结果矩阵对应的匹配层的层标识代替原第二存储器中对应地址上已存入的层标识存入第二存储器对应地址中；
    所述第四队列，配置成当所述第四队列中每个数据位都存储有数据后，所述第四队列的队首再输入新的数据时，所述第四队列的队尾数据推出第四队列；
    所述第五运算器，配置成将新输入的第四运算器上对应的数值在第五运算器中做累计运算，运算后，所述第五运算器再将第四队列中推出的数据在第五运算器的数值中做减除运算，运算后，所述第四计数器的值上加1；
    所述第四运算器，配置成重复触发所述第二控制器、所述第二比较器、所述第四队列、所述第五运算器运行，直到所述第四运算器的所有子运算器的累计值依次全部输入所述第四队列，以完成所述匹配结果矩阵当前行的运算；
    所述第三队列，配置成当所述第三队列中每个数据位都存储有数据后，所述第三队列的队首再输入新的数据时，所述第三队列的队尾数据推出第三队列；
    所述第四运算器，配置成所述第四运算器中的每个子运算器对新输入所述第三队列的对应数据位置上的数值在子运算器中进行累计运算，完成运算后，每个子运算器将推出队列的数据对应数据位置上的数值在对应子运算器的数值中做减除运算，所述第三计数器的值上加1；
    所述第二控制器，配置成重复触发所述第四运算器、所述第五运算器、所述第四计数器、所述第二控制器、所述第二比较器、所述第四队列、所述第五运算器、所述第四运算器、所述第三队列、所述第四运算器运行，直到完成当前匹配层的所述匹配结果矩阵中所有行的全部运算；重复触发所述第二控制器至所述第四运算器运行以完成下一个匹配结果矩阵和匹配层的运算，直到完成所有匹配层对应的匹配结果矩阵的运算；其中，所述第二存储器用于存储最终结果矩阵，所述最终结果矩阵中每个地址上存储的是，经所有匹配层对应地址上的累计结果比较后，获得的最大的累计结果值以及所述最大的累计结果值所对应的层标识。
  13. 一种二维数据匹配逻辑电路，其特征在于，所述逻辑电路包括权利要求7至12任意一项所述的二维数据匹配装置。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112187784A (zh) * 2020-09-25 2021-01-05 绿盟科技集团股份有限公司 一种网络信息匹配方法、装置及可读存储介质

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115952172B (zh) * 2023-03-08 2023-05-26 畅捷通信息技术股份有限公司 一种基于数据库临时表的数据匹配方法及装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120082387A1 (en) * 2010-10-01 2012-04-05 Yong Zhang Optimized fast hessian matrix computation architecture
CN103839259A (zh) * 2014-02-13 2014-06-04 西安交通大学 一种图像搜寻最优匹配块方法及装置
CN104915322A (zh) * 2015-06-09 2015-09-16 中国人民解放军国防科学技术大学 一种卷积神经网络硬件加速方法及其axi总线ip核
CN106126481A (zh) * 2016-06-29 2016-11-16 华为技术有限公司 一种计算引擎和电子设备

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7685212B2 (en) * 2001-10-29 2010-03-23 Intel Corporation Fast full search motion estimation with SIMD merge instruction
US7272622B2 (en) * 2001-10-29 2007-09-18 Intel Corporation Method and apparatus for parallel shift right merge of data
CA2707246C (en) * 2009-07-07 2015-12-29 Certusview Technologies, Llc Automatic assessment of a productivity and/or a competence of a locate technician with respect to a locate and marking operation
CN102065309B (zh) * 2010-12-07 2012-12-05 青岛海信信芯科技有限公司 一种dct实现方法及dct实现电路
CN102033854A (zh) * 2010-12-17 2011-04-27 中国科学院软件研究所 针对稀疏矩阵的数据存储方法及基于该方法的SpMV实现方法
CN102541507B (zh) * 2010-12-31 2015-12-16 联芯科技有限公司 维度可重配的数据处理方法、系统和矩阵乘法处理器
US20170053212A1 (en) * 2014-02-18 2017-02-23 Nec Corporation Data management apparatus, data analysis apparatus, data analysis system, and analysis method
CN105260773B (zh) * 2015-09-18 2018-01-12 华为技术有限公司 一种图像处理装置以及图像处理方法
US10163227B1 (en) * 2016-12-28 2018-12-25 Shutterstock, Inc. Image file compression using dummy data for non-salient portions of images
US10768895B2 (en) * 2018-11-08 2020-09-08 Movidius Limited Dot product calculators and methods of operating the same
US11010954B2 (en) * 2018-12-11 2021-05-18 Samsung Electronics Co., Ltd. Efficient redundant coverage discard mechanism to reduce pixel shader work in a tile-based graphics rendering pipeline
US10904049B1 (en) * 2019-07-11 2021-01-26 Stmicroelectronics (Research & Development) Limited Time domain discrete transform computation

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120082387A1 (en) * 2010-10-01 2012-04-05 Yong Zhang Optimized fast hessian matrix computation architecture
CN103839259A (zh) * 2014-02-13 2014-06-04 西安交通大学 一种图像搜寻最优匹配块方法及装置
CN104915322A (zh) * 2015-06-09 2015-09-16 中国人民解放军国防科学技术大学 一种卷积神经网络硬件加速方法及其axi总线ip核
CN106126481A (zh) * 2016-06-29 2016-11-16 华为技术有限公司 一种计算引擎和电子设备

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112187784A (zh) * 2020-09-25 2021-01-05 绿盟科技集团股份有限公司 一种网络信息匹配方法、装置及可读存储介质
CN112187784B (zh) * 2020-09-25 2022-12-16 绿盟科技集团股份有限公司 一种网络信息匹配方法、装置及可读存储介质

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