WO2018233583A1

WO2018233583A1 - Terminal device and data processing method

Info

Publication number: WO2018233583A1
Application number: PCT/CN2018/091749
Authority: WO
Inventors: 潘时林
Original assignee: 华为技术有限公司
Priority date: 2017-06-19
Filing date: 2018-06-19
Publication date: 2018-12-27
Also published as: CN109150534B; CN109150534A

Abstract

The present application provides a terminal device and a data processing method. The device comprises a secure chip and a first memory, the secure chip comprising a processor, a second memory and a counter. The first memory is used for storing M first data blocks, the first data blocks being obtained by performing an encryption operation on a plaintext data block and a first MAC of the plaintext data block. The counter is used for counting the number of times of updates of the M first data blocks to obtain a count value, and the count value of the counter cannot be rolled back. The processor performs a logic operation on a first count value of the counter and the first MAC corresponding to each first data block, to obtain M first numeric values; and performs an encryption operation on the M first numeric values and a corresponding second MAC to obtain a second data block, and stores the second data block to the first memory. Whether a target data block has been rolled back according to the second block and a second count value of the counter is determined. The terminal device can reduce costs and the complexity of a deployment board.

Description

Terminal device and data processing method

The present application claims the priority of the Chinese Patent Application, filed on Jun.

Technical field

The present application relates to the field of computer technologies, and in particular, to a terminal device and a data processing method.

Background technique

With the continuous development of terminal technologies, users have gradually demanded the security applications of mobile devices such as mobile payment, mobile finance, and car keys that carry millions of assets. Future terminal equipment may have the functions of bank card, bus card, key, and ID card. Implementing these functions cannot rely solely on software applications (Applications, App), but also requires hardware support at the end device's chip.

FIG. 1 is a schematic structural diagram of a chip of a terminal device provided by the prior art. As shown in FIG. 1 , an application processor (AP) integrated system (Secure, SE) chip is integrated in a system on chip (SOC). The SE chip includes One Time Programmable (OTP), Read-Only Memory (ROM), and Random Access Memory (RAM), which are externally embedded for system programs, applications, and application data. The Multi-Media Card (EMMC)/Universal Flash Storage (UFS) Replay Protect Memory Block (RPMB). System programs, application and application data need to be read from the RPMB to run in internal RAM when the system is running. Since RPMB is a partition provided by an external UFS/eMMC storage device manufacturer, although it has anti-backoff capability, due to cost, the anti-rollback capability of the off-chip RPMB does not have any eMMC/UFS storage device. Manufacturers can actually achieve EAL4+ security protection level or above.

There is currently a dedicated Secure Flash device for EAL5+ security protection. The SE chip is connected to a dedicated Secure Flash via a custom interface. However, if the dedicated Secure Flash is added to the terminal device, the cost of the terminal device is inevitably increased, and the layout complexity of the terminal device is high.

Summary of the invention

The application provides a terminal device and a data processing method. Thereby, the cost of the terminal device and the layout complexity can be reduced.

In a first aspect, the application provides a terminal device, including: a security chip and a first memory coupled to the security chip, wherein the security chip includes: a processor, a second memory, and a counter; and the first memory is configured to store M a first data block, wherein each of the first data blocks is obtained by encrypting a plaintext data block and a first message authentication code MAC corresponding to the plaintext data block, where M is an integer greater than or equal to 1; a counter is used for Counting the number of updates of the M first data blocks to obtain a count value, and the counter value of the counter is not backed off; the processor is configured to: use the first count value of the counter and the first MAC corresponding to each first data block respectively The logic operation obtains M first values corresponding to the M first data blocks one by one; wherein, the first count value is a count value corresponding to the M first data blocks when the processor performs a logic operation; And performing a cryptographic operation on the second MAC corresponding to the M first values to obtain a second data block, and storing the second data block in the first memory; And determining, by the second count value of the counter, whether the target data block is rolled back; wherein the target data block is any one of the M first data blocks; and the second count value is when the processor determines whether the target data block is rolled back. The count value corresponding to the M first data blocks.

In summary, when the counter is an OTP, the application has data anti-return capability while maintaining the existing chip architecture. Add dedicated Secure Flash to the prior art. The terminal device provided by the present application can reduce cost and layout complexity. When the counter is an NVM or other counter in the SE chip, it is equivalent to adding a small-capacity (for counting only) counter to the existing SE chip, and therefore, dedicated Secure Flash is added with respect to the prior art. The terminal device provided by the present application can reduce cost and layout complexity.

Optionally, the processor is specifically configured to: calculate, by using the same algorithm as the first value of the calculation target data block, a second value corresponding to the first value of the calculation target data block for the second count value and the first MAC corresponding to the target data block; according to the target data The first value of the block and the second value of the target data block determine whether the target data block has rolled back.

Optionally, the terminal device further includes: a transmitter, where the processor is configured to: when the first value of the target data block and the second value of the target data block are the same, determine that the target data block does not fall back; when the target data When the first value of the block is different from the second value of the target data block, the second count value is updated to obtain a third count value, and the third count value and the first MAC corresponding to the target data block are used to calculate the target data block. The first algorithm having the same first value calculates the third value of the target data block; when the first value of the target data block is different from the third value of the target data block, determining that the target data block is rolled back, and triggering the transmitter to send the prompt Message, the prompt message is used to prompt the target data block to roll back.

In the present application, when the existing chip architecture is kept unchanged, or when a counter of a small capacity (for counting only) is added to the existing SE chip, it is possible to effectively judge whether the target data block is generated back. Retreat.

Optionally, the processor is further configured to: when the first value of the target data block and the third value of the target data block are the same, determine that the security chip is powered down.

That is, the terminal device can determine whether the security chip is powered off according to the first value of the target data block and the third value of the target data block, thereby improving the reliability of the terminal device.

Optionally, the processor is specifically configured to: obtain a first count value according to the first value of the target data block and the first MAC corresponding to the target data block; determine whether the target data block occurs according to the first count value and the second count value. go back.

Optionally, the terminal device further includes: a transmitter, where the processor is configured to: when the first count value and the second count value are the same, determine that the target data block does not roll back; when the first count value and the second count value When the difference is different, the second count value is updated to obtain a third count value; when the first count value and the third count value are not the same, it is determined that the target data block is rolled back, and the transmitter is triggered to send a prompt message, and the prompt message is used for Prompt that the target data block has rolled back.

Optionally, the processor is further configured to: when the first count value and the third count value are the same, determine that the security chip is powered off.

That is, the terminal device can determine whether the security chip is powered off according to the first count value and the third count value, thereby improving the reliability of the terminal device.

Optionally, the processor is further configured to: update the third data block to the new first data block, and update the first count value to obtain a new first count value; wherein the third data block is M first Any one of the data blocks; respectively calculating, for each new first count value and the first MAC corresponding to each first data block corresponding to the second data block, using the same algorithm as calculating the first value a new first value, and updating the first value of each first data block to a new first value; corresponding to the M new first values corresponding to the second data block and the M new first values The new second MAC is encrypted to obtain a new second data block; and the second data block is updated to a new second data block; the counter is further configured to update the first count value to the new first count value.

In the present application, since the first memory adopts the secondary storage mode, after the terminal device updates the third data block, the first value of each first data block corresponding to the second data block needs to be updated to a new one. a value and updating the second data block based on the new first value. Thereby improving the accuracy of the data in the terminal device.

Optionally, the processor is further configured to: read the first value of the fourth data block to the second memory, where the fourth data block is any first data of the new first data block corresponding to the second data block And determining, according to the first value of the fourth data block and the first count value, a first MAC corresponding to the fourth data block, and storing the first MAC corresponding to the fourth data block to the second memory.

The first MAC of the fourth data block can be effectively obtained by this method.

Optionally, the processor is further configured to: when the security chip is powered off, read the fifth value of each first data block corresponding to the fifth data block after the security chip is powered on, where the fifth data block For the actual data block corresponding to the new second data block, the fifth value is the actual value corresponding to the new first value; the fifth value corresponding to the first data block corresponding to the fifth data block corresponds to the fifth data block. Determining, by the first MAC of each first data block, a fourth count value for calculating a fifth value; determining whether a fourth count value of each first data block corresponding to the fifth data block is the same; and determining the fifth data When the fourth count value of each first data block corresponding to the block is not completely the same, the fourth count value of each first data block starting from the sixth data block is updated once to obtain a new first count value, wherein The sixth data block is a first data block corresponding to the fifth data block, and satisfies a condition: a fourth count value of each first data block starting from the sixth data block and each first before the sixth data block The fourth count value of the data block is different; a first count value and a first MAC corresponding to each first data block starting from the sixth data block, and calculating a new one of each first data block starting from the sixth data block by using the same algorithm as calculating the first value a first value, and updating a fourth value of each first data block starting from the sixth data block to a new first value; updating the second MAC corresponding to the fifth data block to a new second MAC; Encrypting the new first MAC corresponding to the M new first value and the M new first value to obtain a new second data block, and updating the fifth data block to a new one The second data block; the counter is further configured to update the first count value to the new first count value.

When the security chip is powered off, after the security chip is powered on, the accuracy of the data can be ensured by the method, thereby improving the reliability of the terminal device.

Optionally, the counter is a one-time programming chip OTP or a non-volatile memory NVM.

In a second aspect, the present application provides a processor that is the processor of the first aspect or the alternative of the first aspect. The corresponding content and effects will not be described here.

In a third aspect, the present application provides a chip comprising the counter of the first aspect or the alternative of the first aspect and the processor of the first aspect or the alternative of the first aspect. The corresponding content and effects will not be described here.

In a fourth aspect, the present application provides a data processing method, where the method is applied to a processor, the processor is included in a security chip, the security chip further includes: a second memory and a counter; the security chip is coupled to the first memory; the first memory For storing the M first data blocks, where each first data block is obtained by encrypting a plaintext data block and a first message authentication code MAC corresponding to the plaintext data block, where M is greater than or equal to 1. The integer is used to count the number of updates of the M first data blocks to obtain a count value, and the counter value cannot be rolled back; the method includes:

Performing a logical operation by using a first count value of the counter and a first MAC corresponding to each first data block, respectively, to obtain M first values corresponding to the M first data blocks; wherein, the first count value is processed The count value corresponding to the M first data blocks when the logic operation is performed; the M first value and the second MAC corresponding to the M first values are encrypted to obtain the second data block, and the second data is obtained The block is stored in the first memory; determining, according to the second data block and the second count value of the counter, whether the target data block is backed off; wherein the target data block is any one of the M first data blocks; the second count value is The processor determines whether the target data block is backed up, and the count value corresponding to the M first data blocks.

The foregoing terminal device can be used to execute the data processing method, and the corresponding content and effect are the same, and details are not described herein again.

In a fifth aspect, the application provides a terminal device, including: a security chip and a first memory coupled to the security chip, wherein the security chip includes: a processor, a second memory, and a non-volatile memory NVM; Counting the number of times of updating the encrypted data block to obtain a count value, and the count value of the NVM is not retractable; the processor is configured to: obtain the first corresponding to the plaintext data block by using the message authentication code MAC of the plaintext data block and the first count value of the NVM a value; the first count value is a count value corresponding to the plaintext data block when the processor calculates the first value; encrypting the first value and the plaintext data block to obtain an encrypted data block, and storing the encrypted data block in the first memory; The processor is further configured to determine, according to the encrypted data block and the second count value of the NVM, whether the encrypted data block is rolled back; wherein the second count value corresponds to the encrypted data block; and the second count value is the processor determines the encrypted data block. Whether the count value corresponding to the encrypted data block is generated when the rollback occurs.

In the present application, it is equivalent to adding a small capacity (for counting only) NVM to an existing SE chip, and therefore, dedicated Secure Flash is added to the prior art. The terminal device provided by the present application can reduce cost and layout complexity.

Optionally, the processor is specifically configured to: calculate, by using the same algorithm as calculating the first value, a second value of the plaintext data block for the second count value and the MAC of the plaintext data block; and determining the plaintext according to the first value and the second value Whether the data block has rolled back.

Optionally, the terminal device further includes: a transmitter, where the processor is configured to: when the first value and the second value are the same, determine that the plaintext data block does not roll back; when the first value and the second value are different Updating the second count value to obtain a third count value, and calculating a third value of the plaintext data block by using the same algorithm as calculating the first value for the third count value and the MAC; when the first value and the third value are not At the same time, it is determined that the plaintext data block is rolled back, and the sender is triggered to send a prompt message, and the prompt message is used to prompt the plaintext data block to roll back.

Optionally, the processor is further configured to: when the first value and the third value are the same, determine that the security chip is powered off.

That is, the terminal device can determine whether the security chip is powered off according to the first value and the third value of the target data block, thereby improving the reliability of the terminal device.

Optionally, the processor is specifically configured to: decrypt the first value, obtain a first count value of the MAC and NVM of the plaintext data block; and determine, according to the first count value and the second count value, whether the plaintext data block is rolled back.

Optionally, the method further includes: a transmitter, and correspondingly, the processor is configured to: when the first count value and the second count value are the same, determine that the plaintext data block does not roll back; when the first count value and the second count When the values are different, the second count value is obtained by the third time; when the first count value and the third count value are different, it is determined that the plaintext data block is rolled back, and the sender is triggered to send the prompt message, and the prompt message is sent. Used to prompt the plaintext data block to roll back.

In a sixth aspect, the present application provides a processor, which is the processor in the fifth aspect or the optional aspect of the fifth aspect. The corresponding content and effects will not be described here.

In a seventh aspect, the present application provides a chip, comprising the non-volatile memory NVM in the fifth aspect or the alternative aspect of the fifth aspect, and the processor in the fifth aspect or the alternative aspect of the fifth aspect. The corresponding content and effects will not be described here.

In an eighth aspect, the present application provides a data processing method, where the method is applied to a processor, where the processor is included in a security chip, the security chip further includes: a second memory and a non-volatile memory NVM; and the security chip is coupled to the first memory NVM is used to count the number of updates of the encrypted data block to obtain a count value, and the count value of the NVM cannot be rolled back; the method includes:

Using the first authentication value of the message authentication code MAC and the NVM of the plaintext data block, the first value corresponding to the plaintext data block is obtained; the first count value is a count value corresponding to the plaintext data block when the processor calculates the first value; Encrypting a block of values and a plaintext block to obtain an encrypted block of data, and storing the block of encrypted data in the first memory; determining whether the block of the encrypted block is rolled back according to the second count value of the encrypted block and the NVM; wherein, the second count The value corresponds to the encrypted data block; the second count value is a count value corresponding to the encrypted data block when the processor determines whether the encrypted data block is rolled back.

The terminal device in the foregoing fifth aspect or the optional mode in the fifth aspect may be used to execute the data processing method, and the corresponding content and effect are the same, and details are not described herein again.

In a ninth aspect, the present application provides a computer storage medium for storing computer software instructions for use in the terminal device, including a program for performing the fourth aspect described above.

In a tenth aspect, the application provides a computer program product comprising instructions which, when executed by a computer, cause the computer to perform the functions performed by the terminal device in the fourth aspect and the optional method described above.

In an eleventh aspect, the embodiment of the present application provides a computer storage medium for storing computer software instructions used by the terminal device, which includes a program designed to execute the foregoing eighth aspect.

In a twelfth aspect, the present application provides a computer program product comprising instructions which, when executed by a computer, cause the computer to perform the functions performed by the terminal device in the eighth aspect and the optional method described above.

The application provides a terminal device and a data processing method. A security chip and a first memory coupled to the security chip, wherein the security chip includes: a processor, a second memory, and a counter. The first memory is configured to store M first data blocks, wherein each first data block is obtained by performing an encryption operation on the plaintext data block and the first MAC corresponding to the plaintext data block. The counter is used to count the number of updates of the M first data blocks to obtain a count value, and the counter value of the counter cannot be rolled back. The processor is configured to: perform a logic operation by using a first count value of the counter and a first MAC corresponding to each first data block, to obtain M first values corresponding to the M first data blocks; wherein, the first The count value is the count value corresponding to the M first data blocks when the processor performs a logical operation. Encrypting the M first values and the second MAC corresponding to the M first values to obtain a second data block, and storing the second data block in the first memory. Determining whether the target data block is backed off according to the second data block and the second count value of the counter; wherein the target data block is any one of the M first data blocks; and the second count value is determining whether the target data block is The count value corresponding to the M first data blocks when the rollback occurs. The counter may be an OTP or a counter such as an NVM in the SE chip. When the counter is an OTP, the application has data anti-return capability while maintaining the existing chip architecture. Add dedicated Secure Flash to the prior art. The terminal device provided by the present application can reduce cost and layout complexity. When the counter is an NVM or other counter in the SE chip, it is equivalent to adding a small-capacity (for counting only) counter to the existing SE chip, and therefore, dedicated Secure Flash is added with respect to the prior art. The terminal device provided by the present application can reduce cost and layout complexity.

DRAWINGS

1 is a schematic structural diagram of a chip of a terminal device provided by the prior art;

FIG. 2 is a schematic structural diagram of a terminal device according to an embodiment of the present disclosure;

3A is a schematic diagram of secondary storage of a first memory according to an embodiment of the present disclosure;

FIG. 3B is a schematic diagram of secondary storage of a first memory according to another embodiment of the present application; FIG.

FIG. 4 is a schematic diagram of a storage area of a first memory according to an embodiment of the present disclosure;

FIG. 5 is a flowchart of a data processing method according to an embodiment of the present application;

FIG. 6 is a schematic diagram of a terminal device according to an embodiment of the present disclosure;

FIG. 7 is a schematic diagram of a primary storage of a first memory according to an embodiment of the present disclosure;

FIG. 8 is a flowchart of a data processing method according to another embodiment of the present application.

Detailed ways

In the prior art, an SE chip is integrated in an AP SOC of a terminal device to implement a mobile payment and multi-service public platform. As shown in FIG. 1, the SE chip includes an OTP, a ROM, and a RAM, and the system program, application, and application data are stored in an EMMB of eMMC/UFS (Non-Volatile Memory (NVM)). System programs, application and application data need to be read from the RPMB to run in internal RAM when the system is running. The security level of SE is very high. For NVM data requirements, there are mainly the following:

Has a confidence in resisting data leakage from non-volatile storage.

It has an anti-interference protection against non-volatile storage.

It has anti-modification ability against non-volatile storage or has anti-return capability (integrity & anti-rollback).

In the prior art, it has been very successful in resisting the protection of data leakage of nonvolatile storage and the protection against the interference of nonvolatile storage. In the prior art, an off-chip RPMB mechanism is used for data anti-backoff.

Since the off-chip RPMB is a partition provided by an external UFS/eMMC storage device manufacturer, its anti-return capability is available, but the security level has not been checked and verified; and because of the cost, the off-chip RPMB anti-return capability does not have any eMMC/ UFS storage device manufacturers can actually achieve EAL4+ security protection level or above; therefore, relying on the anti-return of RPMB area can not achieve EAL4+ security protection level.

Therefore, in order to solve the problem in the prior art that the cost of the terminal device increases and the layout complexity is high due to the addition of the dedicated Secure Flash. The application provides a terminal device and a data processing method.

In one case, the present application can be based on the chip architecture shown in FIG. 1 without adding dedicated Secure Flash, and there is no need for eMMC/UFS storage device manufacturers to increase security protection RPMB to meet EAL5+ certification requirements. That is, based on the current chip architecture shown in Figure 1, the SE chip can meet the security requirements and certification of the EAL5+ in the NVM.

At present, the access basic unit of the NVM is a data block, and the processor in the SE chip needs to obtain an encrypted data block by using an encryption algorithm for the plaintext data block and the MAC corresponding to the plaintext data block. And the encrypted data block is stored in the RPMB. The encryption algorithm may be an Advanced Encryption Standard (AES) 256 or the like in the prior art. The encryption key used by the processor for each plaintext block is different, for example, the encryption key is associated with the storage address of the plaintext block. The processor can calculate the MAC corresponding to the plaintext data block by using a MAC algorithm such as SHA256-hMAC or AES-CMAC.

The implementation principle of the present application is: implementing the data anti-backoff function by using the OTP in the SE chip. The OTP bit is programmed one bit at a time, starting with 0 bits per bit, and can be written as 1 by programming, so the number of bits programmed to 1 will be more and more, and cannot be rolled back. Specifically, if the data anti-backoff function is to be implemented, the count value of the OTP can be logically operated with the MAC corresponding to the plaintext data block. If the plaintext data block 1 is rolled back, the processor reads the MAC address corresponding to the back-off plaintext data block (plaintext data block 2) and the count value of the OTP corresponding to the plaintext data block 2 for logical operation. result. Therefore, when the processor performs a logical operation on the current count value of the OTP and the MAC corresponding to the plaintext data block 2, the logical value of the MAC corresponding to the plaintext data block 2 and the OTP corresponding to the plaintext data block 2 must be logically operated. The results obtained are different. That is, since the result corresponding to the plaintext data block 2 is calculated using the previous OTP count, when the plaintext data block 2 is updated to the plaintext data block 1, the current OTP count value must be increased, based on this. The processor can determine that a data rollback has occurred in plaintext block 1.

Since the total bit size or capacity of the OTP is limited, it is required that a plurality of plaintext data blocks share a single count value. However, when a plurality of plaintext data blocks share a count value, when updating any one of the plaintext data blocks, the count value is updated once, and the updated count value and the MAC corresponding to each plaintext data block are once performed. logic operation. This will inevitably lead to an increase in the amount of computation, resulting in the consumption of hardware resources.

Since the length of the data block is usually much larger than the length of the MAC (the length of the MAC is usually 16 bytes or 32 bytes, and the data block can be set to several hundred bytes or even larger). Therefore, based on the above analysis, the first memory in the present application can adopt the method of secondary storage. A terminal device and a data processing method provided by the present application will be described below in conjunction with the secondary storage.

It should be noted that, in order to meet the service requirements, the above-mentioned OTP counting function can also be replaced by NVM. The NVM is set inside the SE chip. This NVM is only used for counting, so its storage capacity is relatively small. For example, the capacity of the NVM can be 4 bytes, and the 4 bytes can be a count of 4 billion times.

Based on the above content, the present application provides a terminal device. Specifically, FIG. 2 is a schematic structural diagram of a terminal device according to an embodiment of the present application. As shown in FIG. 2, the terminal device includes a security chip 21 and a first memory 22 coupled to the security chip 21, wherein the security chip 21 includes a processor 211, a second memory 212, and a counter 213.

The first memory 22 is configured to store M first data blocks, where each first data block is performed by using a plaintext data block and a first message authentication code (MAC) corresponding to the plaintext data block. Obtained by the encryption operation, M is an integer greater than or equal to 1.

The counter 213 is configured to count the number of updates of the M first data blocks to obtain a count value, and the count value of the counter 213 cannot be rolled back.

The processor 211 is configured to: perform a logical operation by using a first count value of the counter 213 and a first MAC corresponding to each first data block, to obtain M first values that are in one-to-one correspondence with the M first data blocks; The first count value is a count value corresponding to the M first data blocks when the processor 211 performs a logic operation. Encrypting the M first values and the second MAC corresponding to the M first values to obtain a second data block, and storing the second data block in the first memory 22. Determining whether the target data block is backed off according to the second data block and the second count value of the counter 213; wherein the target data block is any one of the M first data blocks; the second count value is the processor 211 determining the target data. The count value corresponding to the M first data blocks when the block is rolled back.

Specifically, the M first data blocks correspond to the second data block. The first memory is configured to store M first data blocks and corresponding second data blocks. That is, the first data block adopts a secondary storage mode. FIG. 3A is a schematic diagram of secondary storage of a first memory according to an embodiment of the present application. As shown in FIG. 3A, the first memory stores M first data blocks. The M first data blocks are a first data block 1, a first data block 2, ... a first data block M, respectively. The first memory further stores a second data block corresponding to the M first data blocks, where the second data block is a first value of the first data block 1 by the processor 211, and a first value of the first data block 2... The first value of the first data block M and the second MAC of the first value are encrypted.

In this application, the processor calculates the first MAC of the plaintext data block, and may adopt a MAC algorithm such as SHA256-hMAC or AES-CMAC in the prior art. This application does not limit this. The second MAC that calculates the M first values in the present application may also adopt a MAC algorithm such as SHA256-hMAC or AES-CMAC in the prior art. The M first value can be regarded as a whole and can be understood as a data block, and an existing MAC algorithm can be used for the data block. This application does not limit this.

Further, in the application, the processor performs encryption operation on the plaintext data block and the first MAC corresponding to the plaintext data block, and the specific encryption algorithm may be an existing AES 256 algorithm. Similarly, in the present application, the processor may also use an existing algorithm such as AES 256 for the second MAC corresponding to the M first value and the M first values. This application does not limit this.

Further, the processor performs a logical operation by using the first count value of the counter 213 and the first MAC corresponding to each first data block to obtain M first values that are in one-to-one correspondence with the M first data blocks. The logical operation may be an addition operation, a subtraction operation, a multiplication operation, a division operation, or an AND operation, an OR operation, an exclusive OR operation, and some advanced algorithms in the computer field. As long as the first count value of the counter 213 can participate in the operation, the present application does not limit this.

It should be noted that the counter 213 is used to count the number of updates of the M first data blocks to obtain a count value. Therefore, after any one of the M first data blocks is updated, the count values corresponding to the M first data blocks are updated, for example, one of the first data blocks of the M first data blocks is updated. Then the corresponding count value is increased by 1. Therefore, the first count value is a count value corresponding to the M first data blocks when the processor 211 performs a logic operation. The first count value here must be the latest first count value obtained when the most recent logical operation is performed. Suppose there are two first data blocks. They are the first data block 1 and the first data block 2, respectively. When the first data block 1 is updated, the first count value corresponding to the first data block 1 is updated once to obtain a new first count value. A new first value is calculated by the new first count value and the updated first MAC of the first data block 1. Likewise, since the first data block 1 of the first data block 2 corresponds to the same count value. Therefore, it is necessary to calculate a new first value corresponding to the first data block 2 by the new first count value and the updated first MAC of the first data block 2. In this case, the previous first count value is updated to the latest first count value.

It is worth mentioning that updating the first data block involved in the present application means storing a new first data block, and deleting the historical first data block corresponding to the new first data block.

Assuming that the target data block A is rolled back, and the data block after the target data block is backed up is the first data block B, the first value read by the processor 211 is actually the first MAC of the first data block B. The first count value corresponding to the first data block B is calculated. Assuming that the other first data block is not updated, the second count value should be the count value obtained after the first count value corresponding to the first data block B is updated once. In this case, the processor 211 calculates the second value by the second count value and the first MAC of the first data block B. Since the first value and the second value are not the same, it indicates that the target data block A may fall back. Considering that it is possible that the SE chip is powered down, the first value and the second value are different. For example, when the SE chip is powered off, the second count value may be the previous first count value. Therefore, even if the target data block A does not fall back, in this case, the first value read by the processor 211 is the first MAC of the target data block A and the first count value corresponding to the target data block A (the The first count value is already the latest first count value) is calculated. The processor 211 calculates the second value by the second count value (previous first count value) and the first MAC of the target data block A. Therefore, in this case, the first value and the second value may also be different, and the reason why the first value and the second value are different is not that the target data block A has been retracted. Instead, the SE chip is powered down.

For the above reasons, further, the processor 211 determines whether the target data block is rolled back.

The processor 211 is specifically configured to: calculate, by using the same algorithm as the first value of the calculation target data block, a second value corresponding to the first value of the calculation target data block for the second count value and the first MAC corresponding to the target data block; according to the target data block A value and a second value of the target data block determine whether the target data block has rolled back. Optionally, the terminal device further includes: a transmitter; and correspondingly, the processor 211 is configured to: when the first value of the target data block and the second value of the target data block are the same, determine that the target data block does not fall back; When the first value of the target data block and the second value of the target data block are different, the second count value is updated to obtain a third count value, and the third count value and the first MAC corresponding to the target data block are used and calculated. An algorithm in which the first value of the target data block is the same calculates a third value of the target data block; when the first value of the target data block is different from the third value of the target data block, determining that the target data block is rolled back and triggering the sending The device sends a prompt message, and the prompt message is used to prompt the target data block to roll back.

Optionally, the processor 211 is further configured to: when the first value of the target data block and the third value of the target data block are the same, determine that the security chip is powered off.

Specifically, when calculating the addition algorithm used by the first value, the addition of the second value also requires the addition algorithm, and the calculation of the third value also requires the addition algorithm. Similarly, when calculating the XOR operation of the first value, the calculation of the second value also requires an exclusive OR operation, and the calculation of the third value also requires an exclusive OR operation.

Further, in consideration of determining whether the target data block is rolled back, it is usually applied in a scenario of "hacker" intrusion. Therefore, before the processor 211 determines whether the target data block has been rolled back, the processor 211 usually acquires the read. Taking the request, the processor 211 reads the target data block according to the read request. Then, the processor 211 determines whether the target data block has rolled back, and the transmitter transmits a read response. When the target data block has not rolled back, the read response is used to indicate that the read was successful. When the target data block is rolled back, the read response is the above-mentioned prompt message, and the prompt message is used to prompt the target data block to roll back.

And based on the above scenario, before the second MAC value corresponding to the first data value of the target data block is calculated by using the same algorithm as the first value of the calculation target data block, the processor 211 targets the first MAC value corresponding to the target data block. Reading the data block to the second memory, and decrypting the target data block, obtaining a plaintext data block of the target data block and a first MAC of the target data block, and verifying whether the first MAC is correct; When the MAC is correct, the second data block corresponding to the target data block is read to the second memory, and the second data block is decrypted, the second MAC of the second data block is obtained, and the second MAC is verified to be correct; When the second MAC is verified to be correct, the processor 211 calculates the second value of the target data block by using the same algorithm as the first value of the calculation target data block for the second count value and the first MAC corresponding to the target data block.

The processor 211 determines whether the target data block has a rollback. Specifically, the method of comparing the count values may be adopted:

Optionally, the processor 211 is configured to: obtain a first count value according to the first value of the target data block and the first MAC corresponding to the target data block; and determine the target data according to the first count value and the second count value. Whether the block has rolled back. Optionally, the terminal device further includes: a transmitter. The processor 211 is specifically configured to: when the first count value and the second count value are the same, determine that the target data block does not fall back; when the first count value and the second count value are not the same, update the second count value to obtain The third count value; when the first count value and the third count value are different, determining that the target data block is rolled back, and triggering the sender to send a prompt message, the prompt message is used to prompt the target data block to roll back.

Optionally, the processor 211 is further configured to: when the first count value and the third count value are the same, determine that the security chip is powered off.

Specifically, if the calculation of the first value is an addition operation, the processor 211 obtains the first count value according to the first value of the target data block and the first MAC corresponding to the target data block, and the algorithm used is the inverse of the addition algorithm. The operation, that is, the subtraction algorithm is used to calculate the first count value. Similarly, if the calculation of the first value is a multiplication operation, the processor 211 obtains the first count value according to the first value of the target data block and the first MAC corresponding to the target data block, and the algorithm used is the inverse of the multiplication operation. The operation, that is, the division operation is used to calculate the first count value.

And based on the foregoing scenario, before the first value corresponding to the target data block and the first MAC corresponding to the target data block, before the first count value is obtained, the processor 211 reads the target data block to the second memory, and decrypts the target. Data block, obtaining a plaintext data block corresponding to the target data block and a first MAC of the target data block, and verifying whether the first MAC is correct; when verifying that the first MAC is correct, corresponding to the target data block Reading the second data block to the second memory, and decrypting the second data block, obtaining a first value corresponding to the second MAC and the target data block of the second data block, and verifying whether the second MAC is correct; When the second MAC is correct, the processor 211 obtains the first count value according to the first value of the target data block and the first MAC corresponding to the target data block.

Optionally, the above counter may be an OTP or an NVM. The bit of the counter can be divided into a plurality of bit segments, and each bit segment constitutes a count value, that is, the counter can include a plurality of count values at the same time. Each count value may correspond to at least one first data block. In other words, the counter value of the counter is in one-to-one correspondence with the second data block. Specifically, FIG. 3B is a schematic diagram of secondary storage of a first memory provided by another embodiment of the present application. As shown in FIG. 3B, the bits of the timer are divided into 3 bit segments, each of which constitutes a calculated value. The first memory stores M1 first data blocks and second data blocks corresponding to M1 first data blocks. The first memory stores M2 first data blocks and second data blocks corresponding to M2 first data blocks. The first memory stores M3 first data blocks and second data blocks corresponding to M3 first data blocks.

It should be noted that the total bits of the counter are limited. The bit segment corresponding to each partition can be set according to the application write times. For example, bit segment 1 is used to store the application, and the update frequency of the application is relatively low, so the number of bits in bit segment 1 can be set less. It is assumed that the bit segment 2 is used to store application data, and the update frequency of the application data is very high. That is, the application data is updated more frequently, so the number of bits of the bit segment 2 can be set more. For example, the bit segment 2 can reach tens of thousands of bits, but the storage space can be smaller. Similarly, the number of bits in bit segment 3 can also be set.

For the multi-bit segment of the counter, the processor may implement application application calls by using a plurality of application programming interfaces (APIs) of the first memory to the multi-bit segment, or may be directly specified.

Through this multi-partition, the storage mode of the multi-bit segment makes the count value between different partitions unaffected, thereby reducing the complexity of the terminal device.

In summary, the present application provides a terminal device, including: a security chip and a first memory coupled to the security chip, wherein the security chip includes: a processor, a second memory, and a counter. The first memory is configured to store M first data blocks, wherein each first data block is obtained by performing an encryption operation on the plaintext data block and the first MAC corresponding to the plaintext data block. The counter is used to count the number of updates of the M first data blocks to obtain a count value, and the counter value of the counter cannot be rolled back. The processor is configured to: perform a logical operation by using a first count value of the counter and a first MAC corresponding to each first data block, to obtain M first values corresponding to the M first data blocks; wherein, the first The count value is the count value corresponding to the M first data blocks when the processor performs a logical operation. Encrypting the M first values and the second MAC corresponding to the M first values to obtain a second data block, and storing the second data block in the first memory. Determining whether the target data block is backed off according to the second data block and the second count value of the counter; wherein the target data block is any one of the M first data blocks; and the second count value is determining whether the target data block is The count value corresponding to the M first data blocks when the rollback occurs. The counter may be an OTP or a counter such as an NVM in the SE chip. When the counter is an OTP, the application has data anti-return capability while maintaining the existing chip architecture. Add dedicated Secure Flash to the prior art. The terminal device provided by the present application can reduce cost and layout complexity. When the counter is an NVM or other counter in the SE chip, it is equivalent to adding a small-capacity (for counting only) counter to the existing SE chip, and therefore, dedicated Secure Flash is added with respect to the prior art. The terminal device provided by the present application can reduce cost and layout complexity.

Optionally, the processor 211 is further configured to: update the third data block to a new first data block, and update the first count value to obtain a new first count value; wherein the third data block is M Any one of the data blocks; respectively calculating, for each new first count value and the first MAC corresponding to each first data block corresponding to the second data block, using the same algorithm as calculating the first value a new first value of the data block, and updating the first value of each first data block to a new first value; the M new first value and the M new first corresponding to the second data block The new second MAC encryption corresponding to the value obtains a new second data block; and updates the second data block to a new second data block; the counter is further configured to update the first count value to the new first count value.

Here, it is assumed here that the third data block is the first updated data block of the first of the M first data blocks. The manner of updating the first data block is similar to that of the foregoing processor 211, and details are not described herein again.

For example, the M first data blocks are the first data block 1, the first data block 2, ... the first data block M, respectively. It is assumed that the first updated first data block is the first data block 1, and the first data block 1 is the third data block. After the processor updates the first data block 1 to the new first data block 1, the first count value needs to be updated once to obtain a new first count value. Since the first count value has changed, the first value of the new first data block 1, the first data block 2, ... the first data block M needs to be updated to the new first value. Of course, the new first value is calculated using the new first count value. Encrypting the M new first value corresponding to the second data block and the new second MAC corresponding to the M new first values to obtain a new second data block; and updating the second data block to a new one The second data block; the counter is further configured to update the first count value to the new first count value.

Further, the processor 211 is further configured to: read the first value of the fourth data block to the second memory 212, where the fourth data block is any one of the new first data blocks corresponding to the second data block a first data block; determining a first MAC corresponding to the fourth data block according to the first value of the fourth data block and the first count value; storing the first MAC corresponding to the fourth data block to the second memory.

That is, before the processor 211 calculates a new first value by using the first MAC of the fourth data block, the first MAC needs to be obtained in the foregoing manner. The processor 211 determines the first MAC corresponding to the fourth data block according to the first value of the fourth data block and the first count value, and the adopted algorithm is an inverse operation for calculating the first value. Assuming that the first value is calculated using an addition operation, the processor 211 can obtain the first MAC using a subtraction operation.

The processor 211 is in the process of calculating a new first value of each first data block corresponding to the second data block, or after updating the second data block to a new second data block, the counter will count the first The SE chip may be powered down before the value is updated to the new first count value. The present application provides a SE chip power down protection strategy.

Optionally, the processor 211 is further configured to: when the SE chip is powered off, read the fifth value of each first data block corresponding to the fifth data block after the SE chip is powered on, where the fifth data is The block is the actual data block corresponding to the new second data block, and the fifth value is the actual value corresponding to the new first value; the fifth value and the fifth data block of each of the first data blocks corresponding to the fifth data block Determining, by the first MAC of each first data block, a fourth count value for calculating a fifth value; determining whether a fourth count value of each first data block corresponding to the fifth data block is the same; When the fourth count value of each first data block corresponding to the data block is not completely the same, the fourth count value of each first data block starting from the sixth data block is updated once to obtain a new first count value, The sixth data block is a first data block corresponding to the fifth data block, and satisfies a condition: a fourth count value of each first data block starting from the sixth data block and each of the sixth data block The fourth count value of a data block is different; for new a first count value and a first MAC corresponding to each first data block starting from the sixth data block, calculating a new one of each first data block starting from the sixth data block by using an algorithm identical to calculating the first value a first value, and updating a fourth value of each first data block starting from the sixth data block to a new first value; updating the second MAC corresponding to the fifth data block to a new second MAC; The M new first value corresponding to the fifth data block and the new second MAC corresponding to the M new first values are encrypted, and a new second data block is obtained, and the fifth data block is updated to a new second. The data block; the counter is further configured to update the first count value to the new first count value.

That is, the terminal device provided by the present application can ensure that the first count value of the first data block, the second data block, and the counter is accurate when the SE chip is powered off.

Further, FIG. 4 is a schematic diagram of a storage area of a first memory according to an embodiment of the present disclosure. As shown in FIG. 4, the storage area of the first memory may include three parts: a common secure storage area, and an authentication secure storage using a count value. Area and program area. The main difference between the normal security storage area and the authentication security storage area that uses the count value is whether the anti-backoff function can achieve EAL5+ authentication. A normal secure storage area can be used to store data blocks that are not critical to data fallback. The authentication secure storage area using the count value is the area for secondary storage provided by the present application, and the area is used for storing the first data block and the second data block described above.

The present application provides different APIs for the three different regions described above.

Option 1: Provide a new API for the authenticated secure storage area that utilizes the count value. Such as Secure_antirollback_NVM_Malloc and Secure_antirollback_NVM_Free; provide common Malloc and Free for normal secure storage areas.

Option 2: Static configuration specifies an authenticated secure storage area that uses a common secure storage area and uses count values.

The present application further provides a processor, which is a processor in the foregoing SE chip, and the function of the processor is as described above, and the details are not described herein again.

The application also provides a chip including the above counter and the processor. The functions of the counter and the functions of the processor are as described above, and the present application will not be repeated here. The chip may be the above-mentioned SE chip, or may be an AP SOC, and the AP SOC includes the SE chip.

FIG. 5 is a flowchart of a data processing method according to an embodiment of the present application. As shown in FIG. 2 and FIG. 5, the method is applied to the processor 211. The processor 211 is included in the security chip 21, and the security chip further includes: a second memory 212 and a counter 213; the security chip 21 and the A memory 22 is coupled to each other; the first memory 22 is configured to store M first data blocks, wherein each first data block is authenticated by a plaintext data block and a first message corresponding to the plaintext data block The code MAC is obtained by performing an encryption operation, and M is an integer greater than or equal to 1. The counter 213 is configured to count the number of updates of the M first data blocks to obtain a count value, and the counter value of the counter 213 is not available. Fallback; the method includes:

Step S501: performing a logical operation on the first count value of the counter and the first MAC corresponding to each first data block, respectively, to obtain M first values corresponding to the M first data blocks one by one; wherein, the first count The value is the count value corresponding to the M first data blocks when the processor performs a logical operation.

Step S502: Perform an encryption operation on the M first values and the second MAC corresponding to the M first values to obtain a second data block, and store the second data block in the first memory.

Step S503: determining, according to the second data block and the second count value of the counter, whether the target data block is rolled back; wherein the target data block is any one of the M first data blocks; and the second count value is the processor determining the target. The count value corresponding to the M first data blocks when the data block is rolled back.

The data processing method provided by the present application is executed by the above processor, and the corresponding content and effect are the same, and details are not described herein again.

When the above counter is NVM, since the storage capacity of the NVM can be larger than the storage capacity of the OTP, the first memory can be stored in a primary storage manner in the case where the counter is the NVM.

Specifically, FIG. 6 is a schematic diagram of a terminal device according to an embodiment of the present disclosure. As shown in FIG. 6, the terminal device includes: a security chip 61 and a first memory 62 coupled to the security chip, where The security chip 61 includes a processor 611, a second memory 612, and a non-volatile memory NVM 613. The NVM 613 is configured to count the number of updates of the encrypted data block to obtain a count value, and the count value of the NVM 613 cannot be returned. The processor 611 is configured to: obtain a first value corresponding to the plaintext data block by using a message authentication code MAC of the plaintext data block and a first count value of the NVM; the first count value is the processor And calculating, by the first value, a count value corresponding to the plaintext data block; encrypting the first value and the plaintext data block to obtain the encrypted data block, and storing the encrypted data block to the a first memory; the processor 611 is further configured to determine, according to the encrypted data block and the second count value of the NVM, whether the encrypted data block is backed off; wherein the second count value is Description Corresponding to the encrypted data block; the second processor determines whether the count value of the encrypted blocks of data back-off occurs, the encrypted data block corresponding to the count value.

FIG. 7 is a schematic diagram of a primary storage of a first memory according to an embodiment of the present application. As shown in FIG. 7, the first memory includes M encrypted data blocks, each of which is obtained by encrypting a plaintext data block and a first value of the plaintext data block, wherein the first value is a plaintext data block. The message authentication code MAC and the first count value of the NVM are obtained. For example, the encrypted data block 1 is obtained by encrypting the plaintext data block 1 and the first value 1 of the plaintext data block 1. The encrypted data block 2 is obtained by encrypting the plaintext data block 2 and the first value 2 of the plaintext data block 2. The encrypted data block M is obtained by encrypting the plaintext data block M and the first value M of the plaintext data block M.

Specifically, the method of calculating the first value may be an addition operation, a subtraction operation, a multiplication operation, a division operation, or an AND operation, an OR operation, an exclusive OR operation, and some advanced algorithms in the computer field. As long as the first count value of the NVM can participate in the operation, the present application does not limit this.

Of course, the first memory may also store a plurality of encrypted data blocks, and the bits of the NVM may be divided into a plurality of bit segments, each of the bit segments constituting a count value, and each of the count values may correspond to at least one encrypted data block.

Further, the method for the processor 611 to determine whether the encrypted data block is rolled back may be:

An optional method is: the processor 611 is configured to: calculate, by using the same algorithm as calculating the first value, a second value of the plaintext data block for the second count value and the MAC of the plaintext data block; according to the first value and the second value The value determines whether the plaintext data block has been rolled back. The terminal device further includes: a transmitter; the processor 611 is specifically configured to: when the first value and the second value are the same, determine that the plaintext data block does not roll back; when the first value and the When the second value is different, updating the second count value to obtain a third count value, and calculating, by using the same algorithm as calculating the first value, the clear text for the third count value and the MAC a third value of the data block; when the first value and the third value are different, determining that the plaintext data block is rolled back, and triggering the sender to send a prompt message, where the prompt message is used for prompting The plaintext data block is rolled back.

Further, the processor 611 is further configured to: when the first value and the third value are the same, determine that the security chip is powered off.

Another optional mode: the processor 611 is specifically configured to: decrypt the first value, obtain a MAC of the plaintext data block, and a first count value of the NVM; according to the first count value and the first The second count value determines whether the plaintext data block has rolled back. The terminal device further includes: a transmitter; the processor 611 is specifically configured to: when the first count value and the second count value are the same, determine that the plaintext data block does not roll back; when the first When the count value and the second count value are different, the second count value obtains a third count value a second time; when the first count value and the third count value are not the same, the clear text is determined The data block is rolled back, and the sender is triggered to send a prompt message, where the prompt message is used to prompt that the plaintext data block is rolled back.

Optionally, the processor 611 is further configured to: when the first count value and the third count value are the same, determine that the security chip is powered off.

The manner in which the primary storage and the second-level storage determine the data fallback is similar, and the application is not described herein again.

In summary, the present application provides a terminal device including: a security chip and a first memory coupled to the security chip, wherein the security chip includes: a processor, a second memory, and a non-volatile memory The NVM is configured to count the number of updates of the encrypted data block to obtain a count value, and the count value of the NVM is not backed off; the processor is configured to: use the message authentication code MAC of the plaintext data block and the NVM a first count value, the first value corresponding to the plaintext data block is obtained; the first count value is a count value corresponding to the plaintext data block when the processor calculates the first value; Encrypting the encrypted data block with the value and the plaintext data block, and storing the encrypted data block to the first memory; the processor is further configured to: according to the encrypted data block and the NVM a second count value, determining whether the encrypted data block has a rollback; wherein the second count value corresponds to the encrypted data block; and the second count value is determined by the processor to determine the encryption According to whether a rollback occurs when the block count value corresponding to the encrypted data block. This is equivalent to adding a small capacity (for counting only) NVM to the existing SE chip, so the dedicated Secure Flash is added relative to the prior art. The terminal device provided by the present application can reduce cost and layout complexity.

The present application further provides a processor, which is the processor shown in FIG. 6. The function of the processor is as described above, and the details are not described herein again.

The application also provides a chip including the above NVM and the processor. The functions of the NVM and the functions of the processor are as described above, and the application will not be repeated herein. The chip may be the above-mentioned SE chip, or may be an AP SOC, and the AP SOC includes the SE chip.

FIG. 8 is a flowchart of a data processing method according to another embodiment of the present application. The method is applied to the processor 611, and the processor 611 is included in the security chip 61. The security chip 61 further includes: a second memory 612 and a non-volatile memory NVM 613; The security chip 61 is coupled to the first memory 62. The NVM 613 is configured to count the number of updates of the encrypted data block to obtain a count value, and the count value of the NVM 613 cannot be rolled back;

The method includes:

Step S801: Using the message authentication code MAC of the plaintext data block and the first count value of the NVM, obtaining a first value corresponding to the plaintext data block; the first count value is corresponding to the plaintext data block when the processor calculates the first value. Count value.

Step S802: encrypting the first value and the plaintext data block, obtaining an encrypted data block, and storing the encrypted data block to the first memory;

Step S803: determining, according to the second count value of the encrypted data block and the NVM, whether the encrypted data block is backed off; wherein the second count value corresponds to the encrypted data block; and the second count value is determining whether the encrypted data block is generated back. When the time is retired, the count value corresponding to the data block is encrypted.

The data processing method provided by the present application is executed by the processor shown in FIG. 6, and the corresponding content and effect are the same, and details are not described herein again.

Claims

A terminal device, comprising: a security chip and a first memory coupled to the security chip, wherein the security chip comprises: a processor, a second memory, and a counter;

The first memory is configured to store M first data blocks, where each first data block is obtained by encrypting a plaintext data block and a first message authentication code MAC corresponding to the plaintext data block. , M is an integer greater than or equal to 1;

The counter is configured to count the number of updates of the M first data blocks to obtain a count value, and the counter value of the counter cannot be rolled back;

The processor is used to:

Performing a logical operation by using a first count value of the counter and a first MAC corresponding to each first data block, respectively, to obtain M first values that are in one-to-one correspondence with the M first data blocks; The first count value is a count value corresponding to the M first data blocks when the processor performs the logic operation;

Performing an encryption operation on the M first values and the second MAC corresponding to the M first values to obtain a second data block, and storing the second data block in the first memory;

Determining, according to the second data block and the second count value of the counter, whether the target data block is backed off; wherein the target data block is any one of the M first data blocks; the second The count value is a count value corresponding to the M first data blocks when the processor determines whether the target data block has a rollback.
The terminal device according to claim 1, wherein the processor is specifically configured to:

And calculating, by the second count value and the first MAC corresponding to the target data block, a second value of the target data block by using an algorithm that is the same as calculating a first value of the target data block;

Determining whether the target data block is backed off according to the first value of the target data block and the second value of the target data block.
The terminal device according to claim 1, further comprising: a transmitter;

The processor is specifically configured to:

Determining that the target data block does not fall back when the first value of the target data block and the second value of the target data block are the same;

Updating the second count value to obtain a third count value, the third count value and the target data, when the first value of the target data block is different from the second value of the target data block a first MAC corresponding to the block, calculating a third value of the target data block by using an algorithm that is the same as calculating a first value of the target data block;

Determining that the target data block is rolled back when the first value of the target data block and the third value of the target data block are different, and triggering the sender to send a prompt message, where the prompt message is used Prompting that the target data block is rolled back.
The terminal device according to claim 3, wherein the processor is further configured to:

When the first value of the target data block and the third value of the target data block are the same, it is determined that the security chip is powered down.
The terminal device according to claim 1, wherein the processor is specifically configured to:

Obtaining the first count value according to the first value of the target data block and the first MAC corresponding to the target data block;

Determining whether the target data block is backed off according to the first count value and the second count value.
The terminal device according to claim 5, further comprising: a transmitter;

The processor is specifically configured to:

Determining that the target data block does not fall back when the first count value and the second count value are the same;

When the first count value and the second count value are not the same, updating the second count value to obtain a third count value;

Determining that the target data block is rolled back when the first count value and the third count value are different, and triggering the sender to send a prompt message, where the prompt message is used to prompt the target data block A rollback occurred.
The terminal device according to claim 6, wherein the processor is further configured to:

When the first count value and the third count value are the same, it is determined that the security chip is powered down.
The terminal device according to any one of claims 1 to 7, wherein the processor is further configured to:

Updating the third data block to a new first data block, and updating the first count value to obtain a new first count value; wherein the third data block is any one of the M first data blocks One;

Calculating each of the first data by using the same algorithm as calculating the first value, respectively, for the new first count value and the first MAC corresponding to each first data block corresponding to the second data block. a new first value of the block, and updating the first value of each of the first data blocks to a new first value;

Encrypting the M new first value corresponding to the second data block and the new second MAC corresponding to the M new first values to obtain a new second data block; and updating the second data block For the new second data block;

The counter is further configured to update the first count value to a new first count value.
The terminal device according to claim 8, wherein the processor is further configured to:

Reading a first value of the fourth data block to the second memory, where the fourth data block is any first data block corresponding to the new first data block corresponding to the second data block;

Determining, according to the first value of the fourth data block and the first count value, a first MAC corresponding to the fourth data block;

And storing the first MAC corresponding to the fourth data block to the second memory.
The terminal device according to claim 8 or 9, wherein the processor is further configured to:

After the security chip is powered off, after the security chip is powered on, reading a fifth value of each first data block corresponding to the fifth data block, where the fifth data block is the new The actual data block corresponding to the second data block, wherein the fifth value is an actual value corresponding to the new first value;

Determining a fourth value for calculating the fifth value according to a fifth value of each first data block corresponding to the fifth data block and a first MAC of each first data block corresponding to the fifth data block Count value

Determining whether the fourth count value of each first data block corresponding to the fifth data block is the same;

When it is determined that the fourth count value of each first data block corresponding to the fifth data block is not completely the same, the fourth count value of each first data block starting from the sixth data block is updated once, and the Describe a new first count value, wherein the sixth data block is a first data block corresponding to the fifth data block, and satisfies a condition: each first data block from the sixth data block The fourth count value is different from the fourth count value of each of the first data blocks preceding the sixth data block;

Calculating from the sixth data block by using the same algorithm as calculating the first value, using the new first count value and the first MAC corresponding to each first data block starting from the sixth data block a new first value of each of the first data blocks that is started, and updating a fourth value of each of the first data blocks from the sixth data block to a new first value;

Updating the second MAC corresponding to the fifth data block to the new second MAC;

Encrypting the new first MAC value corresponding to the fifth data block and the new second MAC address corresponding to the M new first values to obtain the new second data block, and Five data blocks are updated to the new second data block;

The counter is further configured to update the first count value to the new first count value.
The terminal device according to any one of claims 1 to 10, wherein the counter is a one-time programming chip OTP or a non-volatile memory NVM.
A processor, characterized in that the processor is the processor of any one of claims 1-11.
A chip, comprising the counter of any of claims 1-11 and the processor of any of claims 1-11.
A data processing method, the method is applied to a processor, the processor is included in a security chip, the security chip further includes: a second memory and a counter; the security chip is coupled to the first memory The first memory is configured to store M first data blocks, wherein each first data block is obtained by encrypting a plaintext data block and a first message authentication code MAC corresponding to the plaintext data block. And M is an integer greater than or equal to 1; the counter is configured to count the number of updates of the M first data blocks to obtain a count value, and the counter value of the counter cannot be rolled back; the method includes:

Performing a logical operation by using a first count value of the counter and a first MAC corresponding to each first data block, respectively, to obtain M first values that are in one-to-one correspondence with the M first data blocks; The first count value is a count value corresponding to the M first data blocks when the processor performs a logic operation;

Performing an encryption operation on the M first values and the second MAC corresponding to the M first values to obtain a second data block, and storing the second data block in the first memory;

Determining, according to the second data block and the second count value of the counter, whether the target data block is backed off; wherein the target data block is any one of the M first data blocks; the second The count value is a count value corresponding to the M first data blocks when the processor determines whether the target data block has a rollback.
A terminal device, comprising: a security chip and a first memory coupled to the security chip, wherein the security chip comprises: a processor, a second memory, and a non-volatile memory NVM;

The NVM is configured to count the number of updates of the encrypted data block to obtain a count value, and the count value of the NVM cannot be rolled back;

The processor is used to:

Obtaining a first value corresponding to the plaintext data block by using a message authentication code MAC of the plaintext data block and a first count value of the NVM; the first count value is when the processor calculates the first value a count value corresponding to the plaintext data block;

Encrypting the first value and the plaintext data block to obtain the encrypted data block, and storing the encrypted data block to the first memory;

The processor is further configured to determine, according to the encrypted data block and the second count value of the NVM, whether the encrypted data block is backed off; wherein the second count value corresponds to the encrypted data block And the second count value is a count value corresponding to the encrypted data block when the processor determines whether the encrypted data block is backed off.
The terminal device according to claim 15, wherein the processor is specifically configured to:

And calculating, by the second count value and the MAC of the plaintext data block, a second value of the plaintext data block by using an algorithm that is the same as calculating the first value;

Determining, according to the first value and the second value, whether the plaintext data block is rolled back.
The terminal device according to claim 16, further comprising: a transmitter;

The processor is specifically configured to:

Determining that the plaintext data block has not been rolled back when the first value and the second value are the same;

And updating, when the first value and the second value are different, the second count value is updated to obtain a third count value, and the first count value and the MAC are used to calculate the first An algorithm having the same value calculates a third value of the plaintext block;

When the first value and the third value are different, determining that the plaintext data block is rolled back, and triggering the sender to send a prompt message, where the prompt message is used to prompt the plaintext data block to be sent back. Retreat.
The terminal device according to claim 17, wherein the processor is further configured to:

When the first value and the third value are the same, it is determined that the security chip is powered down.
The terminal device according to claim 15, wherein the processor is specifically configured to:

Decrypting the first value to obtain a MAC of the plaintext data block and a first count value of the NVM;

Determining whether the plaintext data block is rolled back according to the first count value and the second count value.
The terminal device according to claim 19, further comprising: a transmitter;

The processor is specifically configured to:

Determining that the plaintext data block has not been rolled back when the first count value and the second count value are the same;

When the first count value and the second count value are not the same, the second count value obtains a third count value;

When the first count value and the third count value are different, determining that the plaintext data block is rolled back, and triggering the sender to send a prompt message, where the prompt message is used to prompt the plaintext data block A rollback occurred.
The terminal device according to claim 20, wherein the processor is further configured to:

When the first count value and the third count value are the same, it is determined that the security chip is powered down.
A processor, characterized in that the processor is the processor of any one of claims 15-21.
A chip, comprising the non-volatile memory NVM of any one of claims 15-21, and the processor of any one of claims 15-21.
A data processing method, the method is applied to a processor, the processor is included in a security chip, the security chip further includes: a second memory and a non-volatile memory NVM; the security chip and a first memory coupled connection; the NVM is configured to count the number of updates of the encrypted data block to obtain a count value, and the count value of the NVM cannot be rolled back;

The method includes:

Obtaining a first value corresponding to the plaintext data block by using a message authentication code MAC of the plaintext data block and a first count value of the NVM; the first count value is when the processor calculates the first value a count value corresponding to the plaintext data block;

Encrypting the first value and the plaintext data block to obtain the encrypted data block, and storing the encrypted data block to the first memory;

Determining, according to the encrypted data block and the second count value of the NVM, whether the encrypted data block is backed off; wherein the second count value corresponds to the encrypted data block; the second count value is And the processor determines, according to whether the encrypted data block is rolled back, a count value corresponding to the encrypted data block.