WO2018219334A1

WO2018219334A1 - Clock synchronization method and device

Info

Publication number: WO2018219334A1
Application number: PCT/CN2018/089374
Authority: WO
Inventors: 于峰; 蔺波; 熊新; 于海凤
Original assignee: 华为技术有限公司
Priority date: 2017-06-02
Filing date: 2018-05-31
Publication date: 2018-12-06
Also published as: CN108988972A; CN108988972B

Abstract

Disclosed by the present application are a clock synchronization method and device, the method comprising: a terminal device sending an uplink clock synchronization signal to a network device, and recording first time information for said sending of the uplink clock synchronization signal; the terminal device receiving a downlink clock synchronization signal sent by the network device and recording second time information for said reception of the downlink clock synchronization signal, wherein the downlink clock synchronization signal carries third time information for the reception of the uplink clock synchronization signal and fourth time information for the sending of the downlink clock synchronization signal by the network device; the terminal device calculating a clock deviation between the network device and the terminal device on the basis of the first time information, the second time information, the third time information and the fourth time information. The method and device used in the present application may reduce the air interface overhead.

Description

Clock synchronization method and device

This application claims the priority of the Chinese Patent Application, filed on Jun. 2, 2017, the application Serial No. In the application.

Technical field

The present application relates to the field of communications technologies, and in particular, to a clock synchronization method and device.

Background technique

With the development of industrial automation, industrial robots are increasingly being used for intelligent manufacturing on production lines, and in many scenarios, multiple robots are required to work together to accomplish a certain task. For example, in a scene where a robot assembles a part, multiple robots are required to perform a predetermined action at an absolute time point to jointly complete an assembly task; further example, the robot 1, the robot 2, and the robot 3 jointly complete one For the task of assembling parts, the robot 1 is responsible for supporting the A side of the part, the robot 2 is responsible for supporting the B side of the part, and the robot 3 is responsible for mounting the nut to the supported part. It is assumed that the robot 1 and the robot 2 need to jointly support the parts at one point, and then the robot 3 needs to install the nuts for the parts that are supported at 1:5, and finally, the robot 1 and the robot 2 put down the parts at 1:10. Then, at this time, it is necessary to ensure that the absolute time between the robot 1, the robot 2, and the robot 3 is consistent. If the absolute times of the three are inconsistent, the advance or lag of the robot motion may occur, resulting in assembly failure of the parts.

At present, for the clock synchronization of industrial robots, the industry's recommended solution is to use the wireless network, specifically: the clock of the base station is used as the main clock, the clock of the terminal such as the robot is used as the slave clock, and then the time information of the base station is sent to Terminals such as robots, and these terminals will adjust their own time information according to the time information of the base station. As shown in Figure 1, the specific synchronization process is:

Step A: At time t0, the base station sends a first downlink clock synchronization signal (for example, Sync) to the terminal, and the terminal records the time t1 when the first downlink clock synchronization signal is received;

Step B: The base station sends a second downlink clock synchronization signal (for example, Follow_up) to the terminal, where the second downlink clock synchronization signal carries information of time t0.

Step C: The terminal receives the second downlink clock synchronization signal, acquires t0 carried therein, and sends an uplink clock synchronization signal (for example, Delay_Req) to the base station at time t2;

Step D: The base station records the time t3 when the uplink clock synchronization signal is received, and sends a third downlink clock synchronization signal (for example, Delay_Resp) to the terminal, where the third downlink clock synchronization signal carries information of time t3.

Step E: The terminal receives the third downlink clock synchronization signal, and acquires t3 carried therein;

Step F: The terminal calculates a deviation from the base station clock according to t0, t1, t2, and t3.

Assume that the uplink and downlink transmission delays (Dealy) of the base station and the terminal are represented by D, and the time deviation (Offest) between the base station clock and the terminal clock is represented by O, and O=base station clock time—terminal clock time; Get the following two equations:

T1=t0+D-O; (1)

T3=t2+D+O; (2)

By combining the above two equations, we can solve for O=(t0-t1+t3-t2)/2.

Step G: The terminal adjusts its own clock according to the deviation to achieve synchronization with the base station clock.

It can be seen from the above analysis that in the prior art, if the clock synchronization between the base station and the terminal is to be performed by using the wireless network, the above steps A-step G, 7 steps are required, and in the 7 steps, step A- In some steps of step D, the air interface is used to transmit the message, so that the overhead of the air interface is large.

Summary of the invention

The application provides a clock synchronization method and device to reduce air interface overhead.

The first aspect provides a clock synchronization method, including: a terminal device sends an uplink clock synchronization signal to a network device, and records first time information for transmitting the uplink clock synchronization signal; and the terminal device receives a downlink clock sent by the network device. a synchronization signal, and recording second time information of the downlink clock synchronization signal; the downlink clock synchronization signal carries a third time information that the network device receives the uplink clock synchronization signal, and sends the downlink clock synchronization The fourth time information of the signal; the terminal device calculates a clock offset of the network device and the terminal device based on the first time information, the second time information, the third time information, and the fourth time information.

In the present application, the clock synchronization between the terminal device and the network device can be realized only by transmitting the signal twice in the air interface, which is an uplink clock synchronization signal and a downlink clock synchronization signal, and is required to be in the air interface in the prior art. Clock synchronization can be achieved by transmitting four signals, which can reduce the air interface overhead.

In a possible design, the downlink clock synchronization signal is a first downlink clock synchronization signal; the terminal device receives a downlink clock synchronization signal sent by the network device, and records a second time of receiving the downlink clock synchronization signal. The information includes: receiving, by the terminal device, a first downlink clock synchronization signal sent by the network device, and recording second time information of the first downlink clock synchronization signal, where the first downlink clock synchronization signal is carried There are the third time information and the fourth time information.

When the downlink clock synchronization signal is the first downlink clock synchronization signal, only the two signals need to be transmitted in the empty product, which are the first downlink clock synchronization signal and the uplink clock synchronization signal, respectively, which can further reduce the air interface overhead.

In a possible design, the uplink clock synchronization signal is a delay request message, and the first downlink clock synchronization signal is a timing signal; or the uplink clock synchronization signal is a random access sequence, where the The downlink clock synchronization signal is a downlink reference signal; or the uplink clock synchronization signal is an uplink reference signal, and the first downlink clock synchronization signal is a downlink reference signal.

By synchronizing the synchronization into the existing communication process, it is no longer necessary to separately design the clock synchronization signal, making the implementation of the present application simple.

In a possible design, the downlink clock synchronization signal includes a first downlink clock synchronization signal and a second downlink clock synchronization signal; the terminal device receives a downlink clock synchronization signal sent by the network device, and records and receives the downlink The second time information of the clock synchronization signal includes: receiving, by the terminal device, a first downlink clock synchronization signal sent by the network device, and recording second time information of receiving the first downlink clock synchronization signal; Receiving, by the network device, a second downlink clock synchronization signal, where the second downlink clock synchronization signal carries the third time information and the fourth time information.

When the downlink clock synchronization signal includes the first downlink clock synchronization signal and the second downlink clock synchronization signal, only three signals need to be transmitted in the air interface, respectively being the first downlink clock synchronization signal, the second downlink clock synchronization signal, and the uplink clock. The synchronization signal can reduce the port overhead.

In a possible design, the uplink clock synchronization signal is a delay request message, the first downlink clock synchronization signal is a timing signal, and the second downlink clock synchronization signal is a delay response message; or The uplink clock synchronization signal is a random access sequence, the first downlink clock synchronization signal is a downlink reference signal, and the second downlink clock synchronization signal is a random access response; or the uplink clock synchronization signal is an uplink reference The signal, the first downlink clock synchronization signal is a downlink reference signal, and the second downlink clock synchronization signal is a delay response.

A second aspect provides a clock synchronization method, including: receiving, by a network device, an uplink clock synchronization signal sent by a terminal device, and recording third time information of receiving the uplink clock synchronization signal; and sending, by the network end device, a downlink clock synchronization signal Go to the terminal device, and record the fourth time information of the downlink clock synchronization signal; the downlink clock synchronization signal carries the third time information and the fourth time information.

In a possible design, the downlink clock synchronization signal is a first downlink clock synchronization signal; the network device sends a downlink clock synchronization signal to the terminal device, and records the fourth time information of the downlink clock synchronization signal. The network device sends the first downlink clock synchronization signal to the terminal device, and records the fourth time information of the first downlink clock synchronization signal, where the first downlink clock synchronization signal is carried. There are the third information and the fourth information.

In a possible design, the downlink clock synchronization signal includes a first downlink clock synchronization signal and a second downlink clock synchronization signal; the network termination device sends a downlink clock synchronization signal to the terminal device, and records the downlink. The fourth time information of the clock synchronization signal includes: the network device sends a first downlink clock synchronization signal to the terminal device, and records fourth time information of sending the first downlink clock synchronization signal; the network device sends The second downlink clock synchronization signal is sent to the terminal device, and the second downlink clock synchronization signal carries the third time information and the fourth time information.

The foregoing two aspects and the possible design of the second aspect of the present application are the implementation methods of the network side device corresponding to the first aspect, and the specific implementation manner and the beneficial effects can be referred to the foregoing first aspect and the first aspect. A possible implementation manner is not described herein.

A third aspect provides a clock synchronization method, including: a terminal device sends a first uplink clock synchronization signal to a network device, and records first time information of the first uplink clock synchronization signal; and the terminal device receives the network device Sending a first downlink clock synchronization signal, and recording second time information of receiving the first downlink clock synchronization signal; the terminal device sends a second uplink clock synchronization signal to the network device, where the second uplink clock is synchronized The signal carries the first time information and the second time information; the terminal device receives a second downlink clock synchronization signal sent by the network device, and the second downlink clock synchronization signal carries clock deviation information, where the clock The deviation information is a clock deviation of the terminal device and the network device determined by the network device based on the first time information, the second time information, the third time information, and the fourth time information, where the third time information is Receiving time information of the first uplink clock synchronization signal, the fourth time information The time information of the network device transmitting the first downlink clock synchronization signal.

In the present application, the clock synchronization process is triggered by the terminal device, and the network device calculates the clock offset of the two. Then, the network device periodically broadcasts the synchronization signal relative to the prior art. In the present application, the terminal that needs clock synchronization is used in this application. The clock synchronization process can be triggered to reduce the air interface overhead. And the network device calculates the clock deviation between the two, which can save power consumption of the terminal device.

In a possible design, the first uplink clock synchronization signal is a delay request message, the second uplink clock synchronization signal is a timing response message, and the first downlink clock synchronization signal is a timing signal, The second downlink clock synchronization signal is a timing response message.

The fourth aspect provides a clock synchronization method, including: receiving, by a network device, a first uplink clock synchronization signal sent by a terminal device, and recording third time information of receiving the first uplink clock synchronization signal; a downlink clock synchronization signal, and recording fourth time information of the first downlink clock synchronization signal; the network device receiving a second uplink clock synchronization signal, where the second uplink clock synchronization signal carries the Transmitting, by the terminal device, first time information of the first uplink clock synchronization signal and second time information of receiving the first downlink clock synchronization signal; the network device is based on the first time information, the second time information, and the third The time information and the fourth time information are used to calculate clock deviation information of the terminal and the network device; the network device sends a second downlink clock synchronization signal, and the second downlink clock synchronization signal carries the clock deviation information.

The fifth aspect provides a clock synchronization device, including: a transceiver, configured to send an uplink clock synchronization signal to a network device, and receive a downlink clock synchronization signal sent by the network device; and a processor, configured to record and send the uplink clock synchronization signal First time information, recording second time information of receiving the downlink clock synchronization signal, and calculating the network device and based on the first time information, the second time information, the third time information, and the fourth time information a clock offset of the terminal device; the downlink clock synchronization signal carries third time information that the network device receives the uplink clock synchronization signal and fourth time information that sends the downlink clock synchronization signal.

In a possible design, the downlink clock synchronization signal is a first downlink clock synchronization signal; when the transceiver receives the downlink clock synchronization signal sent by the network device, the transceiver is specifically configured to: receive the first a downlink clock synchronization signal; when the processor records the second time information of the downlink clock synchronization signal, the processor is specifically configured to: record second time information of the first downlink clock synchronization signal, where The third time information and the fourth time information are carried in a downlink clock synchronization signal.

In a possible design, the downlink clock synchronization signal includes a first downlink clock synchronization signal and a second downlink clock synchronization signal; the second downlink clock synchronization signal carries the third time information and the fourth Time information

When receiving the downlink clock synchronization signal sent by the network device, the transceiver is specifically configured to: receive a first downlink clock synchronization signal sent by the network device, and a second downlink clock synchronization signal; and the processor receives the The second time information of the downlink clock synchronization signal is specifically used to: record second time information of receiving the first downlink clock synchronization signal.

The sixth aspect provides a clock synchronization device, including: a transceiver, configured to receive an uplink clock synchronization signal sent by the terminal device, and send a downlink clock synchronization signal to the terminal device; and a processor, configured to record and receive the uplink clock synchronization signal The third time information records the fourth time information of the downlink clock synchronization signal; the downlink clock synchronization signal carries the third time information and the fourth time information.

In a possible design, the downlink clock synchronization signal is a first downlink clock synchronization signal; when the transceiver sends a downlink clock synchronization signal to the terminal device, the transceiver is specifically configured to: send the first downlink clock a synchronization signal to the terminal device; the processor is configured to: record fourth time information of the first downlink clock synchronization signal, where the fourth time information of the downlink clock synchronization signal is recorded, The third information and the fourth information are carried in a downlink clock synchronization signal.

In a possible design, the downlink clock synchronization signal includes a first downlink clock synchronization signal and a second downlink clock synchronization signal; when the transceiver sends a downlink clock synchronization signal to the terminal device, the transceiver is specifically configured to: send The first downlink clock synchronization signal is sent to the terminal device, and the second downlink clock synchronization signal is sent to the terminal device. When the processor records the fourth time information of the downlink clock synchronization signal, the processor is specifically configured to: record and send the The fourth time information of the first downlink clock synchronization signal; the second downlink clock synchronization signal carries the third time information and the fourth time information.

The seventh aspect provides a clock synchronization device, including: a transceiver, configured to send a first uplink clock synchronization signal to a network device, receive a first downlink clock synchronization signal sent by the network device, and send a second uplink clock synchronization signal to The network device receives the second downlink clock synchronization signal sent by the network device, and the processor is configured to record the first time information of sending the first uplink clock synchronization signal, and record the second signal that receives the first downlink clock synchronization signal Time information; the second uplink clock synchronization signal carries the first time information and the second time information; the second downlink clock synchronization signal carries clock deviation information, where the clock deviation information is the network The device determines, according to the first time information, the second time information, the third time information, and the fourth time information, a clock deviation of the terminal device and the network device, where the third time information is that the network device receives the Time information of the first uplink clock synchronization signal, where the fourth time information is sent by the network device Clock time information of the downlink synchronization signal.

The eighth aspect provides a clock synchronization device, including: a transceiver, configured to receive a first uplink clock synchronization signal sent by the terminal device, send a first downlink clock synchronization signal, receive a second uplink clock synchronization signal, and send a second a downlink clock synchronization signal, wherein the second downlink clock synchronization signal carries the clock deviation information; the processor is configured to record third time information of the first uplink clock synchronization signal, and record and send the first Fourth time information of the line clock synchronization signal; calculating clock deviation information of the terminal and the network device based on the first time information, the second time information, the third time information, and the fourth time information; The clock synchronization signal carries first time information that the terminal device sends the first uplink clock synchronization signal and second time information that receives the first downlink clock synchronization signal.

In a ninth aspect, the present application further provides a computer readable storage medium comprising instructions which, when executed on a computer, cause the computer to perform the first aspect and the method of any of the possible aspects of the first aspect.

In a tenth aspect, the present application further provides a computer readable storage medium comprising instructions which, when run on a computer, cause the computer to perform the method of any of the second aspect and the second aspect.

In an eleventh aspect, the present application further provides a computer readable storage medium comprising instructions which, when executed on a computer, cause the computer to perform the method of any of the third aspect and the third aspect.

In a twelfth aspect, the present application further provides a computer readable storage medium comprising instructions which, when executed on a computer, cause the computer to perform the method of any of the fourth aspect and the fourth aspect.

It can be seen that, in the embodiment of the present application, the terminal device actively initiates a clock synchronization process, and the entire clock synchronization process only needs to transmit data twice in the air interface, which is required to be in the air interface compared with the clock synchronization process in the prior art. Transfer data four times, reducing air interface overhead.

DRAWINGS

1 is a schematic diagram of clock synchronization provided by the present application;

2 is a schematic diagram of a clock synchronization system provided by the present application;

3 is a schematic diagram of clock synchronization provided by the present application;

4 is a schematic diagram of clock synchronization provided by the present application;

FIG. 5 is a schematic diagram of clock synchronization provided by the present application; FIG.

FIG. 6a is a schematic diagram of clock synchronization provided by the present application; FIG.

FIG. 6b is a schematic diagram of clock synchronization provided by the present application; FIG.

FIG. 7 is a schematic diagram of clock synchronization provided by the present application; FIG.

FIG. 8 is a schematic diagram of clock synchronization provided by the present application; FIG.

FIG. 9 is a schematic diagram of clock synchronization provided by the present application; FIG.

FIG. 10a is a schematic diagram of clock synchronization provided by the present application; FIG.

FIG. 10b is a schematic diagram of clock synchronization provided by the present application; FIG.

11 is a schematic diagram of clock synchronization provided by the present application;

12 is a schematic diagram of clock synchronization provided by the present application;

FIG. 13 is a schematic structural diagram of a clock synchronization device provided by the present application.

detailed description

For ease of understanding, the description of the concepts related to the present application is given by way of example, as follows:

A base station (BS) device, also referred to as a base station, is a device deployed in a wireless access network to provide wireless communication functions. For example, a device that provides a base station function in a 2G network includes a base transceiver station (BTS) and a base station controller (BSC), and the device that provides the base station function in the 3G network includes a Node B (English NodeB) and A radio network controller (RNC), which provides a base station function in a 4G network, includes an evolved NodeB (eNB). In the WLAN, a device that provides a base station function is an access point. AP). In future 5G networks, such as New Radio (NR) or LTE+, devices providing base station functions include Node B (gNB), TRP (transmission and reception point), or TP (transmission point). point). Wherein, the TRP or TP may not include the baseband portion, only the radio frequency portion, and may also include the baseband portion and the radio frequency portion.

A user equipment (UE) is a terminal device, which may be a mobile terminal device or a non-mobile terminal device. The device is mainly used to receive or send business data. User equipment can be distributed in the network. User equipments have different names in different networks, such as: terminals, mobile stations, subscriber units, stations, cellular phones, personal digital assistants, wireless modems, wireless communication devices, handheld devices, knees. Upper computer, cordless phone, wireless local loop station, car equipment, etc. The user equipment can communicate with one or more core networks via a radio access network (RAN) (access portion of the wireless communication network), such as exchanging voice and/or data with the radio access network.

A network device is a device located on the network side of the wireless communication network, and may be an access network element, such as a base station or a controller (if any), or may be a core network element or other network element. .

The technical solution of the present application is introduced below with reference to the accompanying drawings:

The present application is applied to a scenario in which a base station and a UE need clock synchronization in LTE (Long Term Evolution) or 5G (5th-Generation).

Figure 2 shows a possible system network diagram of the present application. As shown in FIG. 2, the clock synchronization system 00 includes at least a user equipment UE10 and a base station 11;

The base station 11 and the UE 10 need to perform clock synchronization, and the base station 11 serves as a master clock to provide clock information to the UE 10. The UE 10 functions as a slave clock and maintains synchronization with the base station 11 clock based on the clock information.

For the sake of clarity, only one base station and one UE are shown in FIG. In practical applications, the case where the entire system 00 can include multiple base stations and multiple UEs is also within the scope of protection of the present application.

Some scenarios in the present application are described by taking a scenario of a 4G network in a wireless communication network as an example. It should be noted that the solution in this application can also be applied to other wireless communication networks, and the corresponding names can also be used in other wireless communication networks. The name of the corresponding function is replaced.

It should be noted that the method or apparatus of the present application may be applied between a wireless network device and a user equipment, and may also be applied between a wireless network device and a wireless network device (such as a macro base station and a micro base station), and may also be applied to users. Between the device and the user equipment (such as a D2D scenario), in all the embodiments of the application, the communication between the wireless network device and the UE is taken as an example for description.

It should be noted that the plurality referred to in the present application means two or more. The terms "first", "second", and the like, are used to distinguish the description, and are not intended to indicate or imply relative importance, nor to indicate or imply an order.

FIG. 3 is a flowchart of a clock synchronization method provided by the present application. The network device in the flow corresponds to the base station 11 in FIG. 1, and the terminal device corresponds to the UE 10 in FIG. As shown in FIG. 3, the process may include:

Step S31: The terminal device sends an uplink clock synchronization signal to the network device, and records the first time information t0 for transmitting the uplink clock synchronization signal;

In the embodiment of the present application, the terminal device may obtain the time-frequency resource for sending the uplink clock signal from the system message or the RRC signaling, such as a UE-specific physical channel or a shared physical channel.

Step S32: The network terminal device records the third time information t1 that receives the uplink clock synchronization signal, sends a downlink clock synchronization signal to the terminal device, and records the fourth time information t2 that sends the downlink clock synchronization signal; the downlink clock The synchronization signal carries the third time information t1 and the fourth time information t2;

In this embodiment, the downlink clock synchronization signal may be a broadcast signal, a multicast signal, or a unicast signal.

Step S33: The terminal device records the second time information t3 of the downlink clock synchronization signal, and the terminal device calculates the first time information t0, the second time information t3, the third time information t1, and the fourth time information t2. The clock deviation of the network device and the terminal device is offset.

In the embodiment of the present application, it is assumed that the uplink and downlink transmission delays of the signal are equal, and the time offset of the slave clock of the network device and the slave device of the terminal device is denoted by O, which is denoted as O, then O=UE slave clock is represented by Delay (referred to as D). Time—The base station master clock Time, can get the following equation:

T1=t0+D–O; (1)

T3=t2+D+O; (2)

It can be solved by (2)–(1), O=(t0–t1+t3-t2)/2.

Step S34: The terminal device adjusts the clock of the terminal device according to the clock deviation offset.

In the present application, specifically, the terminal device can adjust the clock of the terminal device to be consistent with the clock of the network device.

{example one}

In an example of the present application, the downlink clock synchronization signal in the foregoing flowchart 3 may be specifically a first downlink clock synchronization signal, where the first downlink clock synchronization signal carries the third time information t1 and the fourth time. Information t2.

Optionally, the uplink clock synchronization signal in the foregoing flowchart 3 may be a delay request message, and the first downlink clock synchronization signal may be a timing signal. The delay request message may be Delay_Req, and the timing signal may be sync.

In the present application, the clock synchronization method may be specifically applied to the 1588 protocol, which is a widely used clock synchronization protocol. When the clock synchronization method of the present application is applied in the 1588 protocol, as shown in FIG. 4, specifically, the terminal device sends a Delay_Req message to the network device, and records the time t0 of sending the Delay_Req message. The network device records the time t1 when the Delay_Req message is received and the time t2 when the sync is sent, and sends a sync to the terminal device, where the sync carries t1 and t2. The terminal device records the time t3 at which the sync is received, and calculates the clock offset offset of the network device and the terminal device according to t0, t1, t2, and t3. Adjust the clock of the terminal device to match the clock of the network device.

Optionally, the uplink clock synchronization signal may be a random access sequence Preamble, the first downlink clock synchronization signal may be a downlink reference signal, and the downlink reference signal may be a cell reference signal (Cell-specific RS, CRS) or demodulation reference signal (DeModulation RS, DMRS);

In the present application, the clock synchronization method may be specifically applied to a random access process, as shown in FIG. 5, specifically: the terminal device sends a Preamble on a physical random access channel (PRACH), and records Sending the time information t0 of the Preamble; the network device records the time information t1 of the receiving Preamble, and simultaneously sends the CRS signal to the terminal device, and records the time t2 of transmitting the CRS; wherein the CRS carries t0 and t2, and the transmission time of the Preamble and the CRS is certain The timing relationship, for example, there is a timing relationship of N+K at the transmission moment of the Preamble and the CRS, the N refers to the moment when the Preamble is transmitted, and the N+K refers to the moment when the CRS is transmitted, and the K may be predefined by the protocol or a system message. Instructions. The terminal device receives the CRS signal according to the timing relationship of N+K, records the time t3 at which the CRS message is received, and calculates the clock offset offset of the network device and the terminal device according to t0, t1, t2, and t3. Adjust the clock of the terminal device to match the clock of the network device. The CRS signal in the embodiment of the present application may also be replaced by a DMRS signal, and the processes are similar, and details are not described herein again.

The uplink clock synchronization signal may be, but not limited to, an uplink reference signal, and the uplink reference signal may be a sounding reference signal (SRS), a DMRS, a PT-RS (Phase Tracking Reference Signal), or a buffer status report. (Buffer Status Reports, BRS), the downlink reference signal may be, but not limited to, CRS, DMRS, SS Block (Synchronization Signal Block), PTRS, or Channel State Information RS (CSI-RS).

It should be noted that in the present application, other signals available for timing in the communication system can be used as clock synchronization signals for clock synchronization, which will not be enumerated here.

As shown in FIG. 6a, when the uplink reference signal is the SR and the downlink reference signal is the CRS, the specific process is as follows: the terminal device sends the SR to the network device, and records the time t0 of sending the SR; the network device records the time t1 and the time of receiving the SR. At time t2 of the CRS, the CRS is sent to the terminal device, where the CRS carries t1 and t2; the terminal device records the time t3 at which the CRS is received, and the terminal device calculates the clock offset of the terminal device and the network device according to t0, t1, t2, and t3. Offset. Adjust the clock of the terminal device to match the clock of the network device.

As shown in FIG. 6b, when the uplink reference signal is a BSR and the downlink reference signal is a CRS, the specific process is as follows: the terminal device sends the BSR to the base station device, and records the time t0 of transmitting the BSR; the network device records the time t1 and the time of receiving the CRS. At time t2 of the CRS, the CRS is sent to the terminal device, where the CRS carries t1 and t2; the terminal device records the time t3 at which the CRS is received, and the terminal device calculates the clock offset of the terminal device and the network device according to t0, t1, t2, and t3. Offset. Adjust the clock of the terminal device to match the clock of the network device.

It can be seen that, in this example, the terminal device and the network device only need to transmit the secondary signal in the air interface, respectively, the uplink clock synchronization signal and the first downlink clock synchronization signal, so that the clock synchronization of the terminal device and the network device can be realized. Compared with the clock synchronization process in the prior art, four times of signals need to be transmitted in the air interface, which can reduce the air interface overhead.

{example two}

In another example of the present application, the downlink clock synchronization signal in the above flowchart 3 includes a first downlink clock synchronization signal and a second downlink clock synchronization signal.

When the downlink clock synchronization signal in the foregoing flowchart 3 includes two downlink clock synchronization signals, the first downlink clock synchronization signal and the second downlink clock synchronization signal, the flow of the clock synchronization method provided by the present application is as shown in FIG. Can include:

Step S71: The terminal device sends an uplink clock synchronization signal to the network device, and records the first time information t0 of transmitting the uplink clock synchronization signal;

Step S72: The network terminal device records the third time information t1 for receiving the uplink clock synchronization signal, and sends a first downlink clock synchronization signal to the terminal device, where the network device records the fourth time information t2 for transmitting the first downlink clock synchronization signal. The terminal device records the second time information t3 that receives the first downlink clock synchronization signal;

Step S73: The network device sends a second downlink clock synchronization signal to the terminal device, where the second downlink clock synchronization signal carries the third time information t1 and the fourth time information t2.

Step S74: The terminal device calculates a clock offset offset of the network device and the terminal device based on t0, t3, t1, and t2;

Step S75: The terminal device adjusts the clock of the terminal device according to the clock deviation offset.

In the present application, the terminal device can adjust the clock of the terminal device to be consistent with the clock of the network device.

It can be seen that, in this example, the terminal device and the network device only need to transmit the signal 3 times in the air interface, which are the uplink clock synchronization signal, the first downlink clock synchronization signal, and the second downlink clock synchronization signal, respectively, to implement the network device. Synchronizing with the clock of the terminal device; compared with the clock synchronization process in the prior art, the signal needs to be transmitted 4 times in the air interface, which can reduce the air interface overhead.

The uplink clock synchronization signal may be, but not limited to, a delay request message, and the first downlink clock synchronization signal may be, but not limited to, a timing signal, and the second downlink clock synchronization signal may be, but is not limited to, a delay. The response message may be, but not limited to, Delay_Req, and the timing signal may be, but not limited to, sync, and the delay response message may be, but not limited to, Delay_Resp.

In the present application, the clock synchronization method may be specifically applied to the 1588 protocol. When the clock synchronization method of the present application is applied in the 1588 protocol, as shown in FIG. 8, specifically, the terminal device sends a Delay_Req message to the network device, and records the time t0 at which the Delay_Req message is sent. The network device records the time t1 when the Delay_Req message is received and the time t2 when the sync is sent, and sends a sync to the terminal device; the terminal device records the time t3 when the sync is received; the network device sends the Delay_Resp to the terminal device, where the Delay_Resp carries t1 and t2. The terminal device receives the Delay_Resp, and calculates the clock offset offset of the network device and the terminal device according to t0, t1, t2, and t3, and adjusts the clock of the terminal device to be consistent with the clock of the network device.

The uplink clock synchronization signal may be, but is not limited to, a downlink reference signal, and the downlink reference signal may be, but not limited to, a CRS or a DMRS. The second downlink clock synchronization signal may be, but is not limited to, a random access response.

In this application, the clock synchronization method may be specifically applied to a random access process, as shown in FIG. 9 , which may be specifically as follows:

The terminal device sends a Preamble on the PRACH, records the time information t0 of the Preamble, and the network device records the time information t1 of the Preamble, and simultaneously sends the CRS signal to the terminal device, and records the time t2 at which the CRS is transmitted; wherein the transmission time of the Preamble and the CRS exists. A certain timing relationship, for example, there is a timing relationship of N+K at the transmission moment of the Preamble and the CRS, the N refers to the moment when the Preamble is transmitted, and the N+K refers to the moment when the CRS is transmitted, and the K may be predefined by the protocol or the system. The message indicates. The terminal device receives the CRS signal according to the timing relationship of N+K, and records the time t3 at which the CRS message is received. The network device schedules a random access response (RAR) on the PDCCH, where the PDCCH carries a time-frequency resource for transmitting the RAR. The network device sends the RAR to the terminal device, where the RAR carries t1 and t2. The terminal device receives the RAR, and calculates a clock offset offset of the network device and the terminal device according to t0, t1, t2, and t3, and adjusts the clock of the terminal device to be consistent with the clock of the network device. The CRS signal in the embodiment of the present application may also be replaced by a DMRS signal, and the processes are similar, and details are not described herein again.

In this example, the terminal device and the network device can perform clock synchronization by using signals and messages in the existing random access process, without introducing a new process, thereby saving air interface overhead.

The uplink clock synchronization signal may be, but is not limited to, a downlink reference signal, and the second downlink clock synchronization signal may be, but not limited to, a delay. response. For the uplink reference signal and the downlink reference signal, refer to the description of the above example, and details are not described herein again.

In this example, the uplink reference signal is the SR, the first downlink reference signal is the CRS, and the second downlink reference signal is the Delay Response. For example, as shown in FIG. 10a, the synchronization of the present application is described in detail. The process is as follows: the terminal device sends the SR to the network device, and records the time t0 of sending the SR; the network device records the time t1 of receiving the SR and the time t2 of sending the CRS, and sends the CRS to the terminal device; the terminal device records the time t3 of receiving the CRS; The network device sends a PDCCH for scheduling a Delay Response, where the PDCCH carries Downlink Control Information (DCI) for transmitting a Delay Response; the network device sends a Delay Response to the terminal device, where the Delay Response carries t1 and T2; the terminal device receives the PDCCH and receives the Delay Response message on the indicated time-frequency resource; finally, the terminal device calculates the clock offset of the terminal device and the network device according to t0, t1, t2, and t3, and calculates the clock of the terminal device. , adjusted to match the clock of the network device.

As shown in FIG. 10b, the above reference signal is a BSR, the first downlink reference signal is a CRS, and the second downlink reference signal is a Delay Response. The process of the present application is described in detail as follows:

The terminal device sends the BSR to the network device, and records the time t0 when the BSR is sent; the network device records the time t1 when the BSR is received and the time t2 when the CRS is sent, and sends the CRS to the terminal device; the terminal device records the time t3 when the CRS is received; a PDCCH that schedules a Delay Response, where the PDCCH carries Downlink Control Information (DCI) for transmitting a Delay Response; the network device sends a Delay Response to the terminal device, where the Delay Response carries t1 and t2; the terminal device Receiving a PDCCH and receiving a Delay Response message on the indicated time-frequency resource; finally, the terminal device calculates a clock offset offset of the terminal device and the network device according to t0, t1, t2, and t3, and adjusts the clock of the terminal device to The clocks of the network devices are consistent.

It should be noted that the CRS signals in FIG. 10a and FIG. 10b can be replaced by DMRS, and the process is similar, and details are not described herein again.

The terminal device and the network device use the signals and messages in the existing SR/BSR reporting process to complete the clock synchronization, and no need to introduce a new process, thereby saving air interface overhead.

FIG. 11 is another flow of the clock synchronization method provided by the present application. The network device in the flow corresponds to the base station 11 in FIG. 1 , and the terminal device corresponds to the UE 10 in FIG. 1 . As shown in Figure 11, the process includes:

Step S111: The terminal device sends a first uplink clock synchronization signal to the network device, and records the first time information t0 of transmitting the first uplink clock synchronization signal;

Step S112: The network device records the third time information t1 of the first uplink clock synchronization signal, the first downlink clock synchronization signal, and records the fourth time information t2 of the first downlink clock synchronization signal.

Step S113: The terminal device records the second time information t3 of the first downlink clock synchronization signal, and sends the second uplink clock synchronization signal to the network device, where the second uplink clock synchronization signal carries the first time information t0. And second time information t3;

Step S114: The terminal device calculates a clock offset offset of the network device and the terminal device based on t0, t1, t2, and t3;

Step S115: The network device sends a second downlink clock synchronization signal, where the second downlink clock synchronization signal carries the clock offset information offset.

Step S116: The terminal device adjusts the clock of the terminal device according to the clock deviation offset.

In the present application, the clock synchronization method may be specifically applied to the 1588 protocol. When the clock synchronization method of the present application is applied in the 1588 protocol, the first uplink clock synchronization signal is a delay request message Delay_req, and the second uplink clock synchronization signal is a timing response message Sync-response, the first downlink The clock synchronization signal is a timing signal Sync, and the second downlink clock synchronization signal is a delay response message Delay-response. As shown in FIG. 12, the method is specifically as follows: the terminal device sends a Delay_req to the network device, and the record sends the Delay_req. Time t0; the network device records the time t1 at which the Delay_req is received, sends the Sync to the terminal device, and records the time t2 at which the Sync is transmitted; the terminal device records the time t3 at which the Sync is received; the terminal device transmits the Sync-response to the network device, the Sync-response The network device carries t0 and t3; the network device calculates a clock offset offset of the network device and the terminal device based on t0, t1, t2, and t3; the network device sends a Delay-response to the terminal device, where the Delay-response carries the offset information. Finally, the clock of the terminal device is adjusted to be consistent with the clock of the network device.

In the present application, the clock offset offset is specifically calculated by the network device, so that the processing procedure of the terminal device can be reduced, and the power consumption of the terminal device can be reduced.

It should be noted that, in the clock synchronization scheme of the present application, the uplink clock synchronization signal is sent by the terminal device, and the clock synchronization process is triggered, and the clock synchronization is performed by the base station periodically broadcasting the downlink clock synchronization signal in the prior art. With the solution of the present application, the terminal that needs the clock synchronization can send the uplink clock synchronization signal to trigger the clock synchronization process, and the base station does not need to periodically broadcast the downlink clock synchronization signal, and the air interface overhead can be further saved.

In the present application, as shown in FIG. 13, a clock synchronization device 130 is provided. The clock synchronization device 130 may correspond to the terminal device in the flowcharts 3 to 10b. The clock synchronization device 130 may include:

The transceiver 131 is configured to send an uplink clock synchronization signal to the network device and receive a downlink clock synchronization signal sent by the network device.

The processor 132 is configured to record first time information for sending the uplink clock synchronization signal, record second time information for receiving the downlink clock synchronization signal, and based on the first time information, the second time information, and the third The time information and the fourth time information are used to calculate a clock offset of the network device and the terminal device; the downlink clock synchronization signal carries a third time information that the network device receives the uplink clock synchronization signal, and sends the downlink The fourth time information of the clock synchronization signal.

In an implementation manner of the present application, the downlink clock synchronization signal is a first downlink clock synchronization signal; when the transceiver receives the downlink clock synchronization signal sent by the network device, the transceiver is specifically configured to: receive, send by the network device The first downlink clock synchronization signal is used by the processor to record the second time information of the first downlink clock synchronization signal when recording the second time information of the downlink clock synchronization signal. The first downlink clock synchronization signal carries the third time information and the fourth time information.

In the present application, the uplink clock synchronization signal is a delay request message, and the first downlink clock synchronization signal is a timing signal; or the uplink clock synchronization signal is a random access sequence, and the first downlink is The clock synchronization signal is a downlink reference signal; or the uplink clock synchronization signal is an uplink reference signal, and the first downlink clock synchronization signal is a downlink reference signal.

In another implementation manner of the present application, the downlink clock synchronization signal includes a first downlink clock synchronization signal and a second downlink clock synchronization signal, and the second downlink clock synchronization signal carries the third time information. And the fourth time information; when receiving the downlink clock synchronization signal sent by the network device, the transceiver is specifically configured to: receive the first downlink clock synchronization signal sent by the network device, and the second downlink clock synchronization signal; When the second time information of the downlink clock synchronization signal is received, the device is specifically configured to record the second time information of the first downlink clock synchronization signal.

In the present application, the uplink clock synchronization signal is a delay request message, the first downlink clock synchronization signal is a timing signal, and the second downlink clock synchronization signal is a delay response message; or the uplink clock The synchronization signal is a random access sequence, the first downlink clock synchronization signal is a downlink reference signal, and the second downlink clock synchronization signal is a random access response; or the uplink clock synchronization signal is an uplink reference signal, The first downlink clock synchronization signal is a downlink reference signal, and the second downlink clock synchronization signal is a delay response.

Regarding the principle of solving the problem by the above-mentioned clock synchronization device 130, it is related to the principle that the terminal device solves the problem in the above-mentioned FIG. 3 to FIG. 10b. For details and benefits of solving the problem of the clock synchronization device 130, refer to the terminal in FIG. 3 to FIG. The introduction of the device will not be described here.

In the present application, as shown in FIG. 13, a clock synchronization device 130 is further provided, and the clock synchronization device 130 may correspond to the network device in FIG. 3 to FIG. 10b, including:

The transceiver 131 is configured to receive an uplink clock synchronization signal sent by the terminal device and send a downlink clock synchronization signal to the terminal device.

The processor 132 is configured to record third time information of the uplink clock synchronization signal, and record fourth time information of the downlink clock synchronization signal; the downlink clock synchronization signal carries the third time information and Fourth time information.

In an embodiment of the present application, the downlink clock synchronization signal is a first downlink clock synchronization signal; when the transceiver sends a downlink clock synchronization signal to the terminal device, the transceiver is specifically configured to: send the first downlink a clock synchronization signal to the terminal device; when the processor records the fourth time information of the downlink clock synchronization signal, the processor is specifically configured to: record the fourth time information of the first downlink clock synchronization signal, The third downlink information and the fourth information are carried in the first downlink clock synchronization signal.

In an embodiment of the present application, the downlink clock synchronization signal includes a first downlink clock synchronization signal and a second downlink clock synchronization signal; when the transceiver sends a downlink clock synchronization signal to the terminal device, specifically, the transceiver is specifically used to: Transmitting a first downlink clock synchronization signal to the terminal device, and transmitting a second downlink clock synchronization signal to the terminal device; when the processor records the fourth time information of the downlink clock synchronization signal, the processor is specifically configured to: record and send The fourth time information of the first downlink clock synchronization signal; the second downlink clock synchronization signal carries the third time information and the fourth time information.

Regarding the principle of solving the problem by the above-mentioned clock synchronization device 130, it is related to the principle that the network device solves the problem in the above-mentioned FIG. 3 to FIG. 10b. For details and benefits of solving the problem of the clock synchronization device 130, refer to the network in FIG. 3 to FIG. The introduction of the device will not be described here.

In the present application, as shown in FIG. 13, a clock synchronization device 130 is also provided. The clock synchronization device 130 can correspond to the terminal device in FIG. 11 or FIG. 12, and includes:

The transceiver 131 is configured to send the first uplink clock synchronization signal to the network device, receive the first downlink clock synchronization signal sent by the network device, send the second uplink clock synchronization signal to the network device, and receive the second downlink clock sent by the network device. Synchronization signal

The processor 132 is configured to record first time information of the first uplink clock synchronization signal, and record second time information of the first downlink clock synchronization signal; the second uplink clock synchronization signal carries The first time information and the second time information; the second downlink clock synchronization signal carries clock deviation information, where the clock deviation information is that the network device is based on the first time information, the second time information, The third time information and the fourth time information, the determined clock offset of the terminal device and the network device, where the third time information is time information of the network device receiving the first uplink clock synchronization signal, the fourth The time information is time information for sending, by the network device, the first downlink clock synchronization signal.

In this application, the first uplink clock synchronization signal is a delay request message, the second uplink clock synchronization signal is a timing response message, the first downlink clock synchronization signal is a timing signal, and the second downlink is The clock synchronization signal is a timing response message.

Regarding the principle of solving the problem by the above-mentioned clock synchronization device 130, it is related to the principle that the terminal device solves the problem in the above-mentioned FIG. 11 to FIG. 12, and the details of the problem solved by the clock synchronization device 130 and the beneficial effects can be referred to the terminal in FIG. 11 to FIG. 12 described above. The introduction of the device will not be described here.

In the present application, as shown in FIG. 13, a clock synchronization device 130 is also provided. The clock synchronization device 130 may correspond to the network device in FIG. 11 or FIG. 12, and includes:

The transceiver 131 is configured to receive a first uplink clock synchronization signal sent by the terminal device, send a first downlink clock synchronization signal, receive a second uplink clock synchronization signal, and send a second downlink clock synchronization signal, where the second downlink clock synchronization The signal carries the clock deviation information;

The processor 132 is configured to record third time information for receiving the first uplink clock synchronization signal, and record fourth time information for transmitting the first downlink clock synchronization signal; based on the first time information and the second time The information, the third time information, and the fourth time information, the clock deviation information of the terminal and the network device is calculated; the second uplink clock synchronization signal carries the first time that the terminal device sends the first uplink clock synchronization signal Information and second time information for receiving the first downlink clock synchronization signal.

Regarding the principle of solving the problem by the above-mentioned clock synchronization device 130, it is related to the principle that the network device solves the problem in the above-mentioned FIG. 11 to FIG. 12, and the details and benefits of solving the problem with the clock synchronization device 130 can be referred to the network in FIG. 11 to FIG. The introduction of the device will not be described here.

The present application also provides a computer readable storage medium comprising instructions for causing a computer to execute a method of a terminal device in the clock synchronization method described above when it is run on a computer.

The present application also provides a computer readable storage medium comprising instructions for causing a computer to execute a method of a network side device in the above clock synchronization method when it is run on a computer.

In the above embodiments, it may be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented in software, it may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the processes or functions described in accordance with embodiments of the present invention are generated in whole or in part. The computer can be a general purpose computer, a special purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer readable storage medium or transferred from one computer readable storage medium to another computer readable storage medium, for example, the computer instructions can be from a website site, computer, server or data center Transfer to another website site, computer, server, or data center by wire (eg, coaxial cable, fiber optic, digital subscriber line (DSL), or wireless (eg, infrared, wireless, microwave, etc.). The computer readable storage medium can be any available media that can be accessed by a computer or a data storage device such as a server, data center, or the like that includes one or more available media. The usable medium may be a magnetic medium (eg, a floppy disk, a hard disk, a magnetic tape), an optical medium (eg, a DVD), or a semiconductor medium (such as a solid state disk (SSD)).

Those skilled in the art will appreciate that embodiments of the present application can be provided as a method, system, or computer program product. Thus, the present application can take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment in combination of software and hardware. Moreover, the application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) including computer usable program code.

The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to the present application. It will be understood that each flow and/or block of the flowchart illustrations and/or FIG. These computer program instructions can be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing device to produce a machine for the execution of instructions for execution by a processor of a computer or other programmable data processing device. Means for implementing the functions specified in one or more of the flow or in a block or blocks of the flow chart.

The computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture comprising the instruction device. The apparatus implements the functions specified in one or more blocks of a flow or a flow and/or block diagram of the flowchart.

These computer program instructions can also be loaded onto a computer or other programmable data processing device such that a series of operational steps are performed on a computer or other programmable device to produce computer-implemented processing for execution on a computer or other programmable device. The instructions provide steps for implementing the functions specified in one or more of the flow or in a block or blocks of a flow diagram.

It will be apparent to those skilled in the art that various modifications and changes can be made in the present application without departing from the spirit and scope of the application. Thus, it is intended that the present invention cover the modifications and variations of the present invention.

Claims

A clock synchronization method, comprising:

The terminal device sends an uplink clock synchronization signal to the network device, and records the first time information of sending the uplink clock synchronization signal;

Receiving, by the terminal device, a downlink clock synchronization signal sent by the network device, and recording second time information of the downlink clock synchronization signal; the downlink clock synchronization signal carrying the network device receiving the uplink clock synchronization signal a third time information and fourth time information for transmitting the downlink clock synchronization signal;

The terminal device calculates a clock offset of the network device and the terminal device based on the first time information, the second time information, the third time information, and the fourth time information.
The method according to claim 1, wherein the downlink clock synchronization signal is a first downlink clock synchronization signal;

The terminal device receives the downlink clock synchronization signal sent by the network device, and records the second time information of the downlink clock synchronization signal, including:

The terminal device receives the first downlink clock synchronization signal sent by the network device, and records the second time information of the first downlink clock synchronization signal, where the first downlink clock synchronization signal carries the Three time information and fourth time information.
The method according to claim 2, wherein the uplink clock synchronization signal is a delay request message, and the first downlink clock synchronization signal is a timing signal;

Or the uplink clock synchronization signal is a random access sequence, and the first downlink clock synchronization signal is a downlink reference signal;

Alternatively, the uplink clock synchronization signal is an uplink reference signal, and the first downlink clock synchronization signal is a downlink reference signal.
The method according to claim 1, wherein the downlink clock synchronization signal comprises a first downlink clock synchronization signal and a second downlink clock synchronization signal;

The terminal device receives the downlink clock synchronization signal sent by the network device, and records the second time information of the downlink clock synchronization signal, including:

Receiving, by the terminal device, a first downlink clock synchronization signal sent by the network device, and recording second time information of receiving the first downlink clock synchronization signal;

The terminal device receives the second downlink clock synchronization signal sent by the network device, where the second downlink clock synchronization signal carries the third time information and the fourth time information.
The method according to claim 4, wherein the uplink clock synchronization signal is a delay request message, the first downlink clock synchronization signal is a timing signal, and the second downlink clock synchronization signal is a delay response. Message

Or the uplink clock synchronization signal is a random access sequence, the first downlink clock synchronization signal is a downlink reference signal, and the second downlink clock synchronization signal is a random access response;

Or the uplink clock synchronization signal is an uplink reference signal, the first downlink clock synchronization signal is a downlink reference signal, and the second downlink clock synchronization signal is a delay response.
A clock synchronization method, comprising:

Receiving, by the network device, an uplink clock synchronization signal sent by the terminal device, and recording third time information for receiving the uplink clock synchronization signal;

The network terminal device sends a downlink clock synchronization signal to the terminal device, and records the fourth time information of the downlink clock synchronization signal; the downlink clock synchronization signal carries the third time information and the fourth time information.
The method according to claim 6, wherein the downlink clock synchronization signal is a first downlink clock synchronization signal;

The network device sends a downlink clock synchronization signal to the terminal device, and records the fourth time information of the downlink clock synchronization signal, including:

Transmitting, by the network device, the first downlink clock synchronization signal to the terminal device, and recording fourth time information of the first downlink clock synchronization signal, where the first downlink clock synchronization signal carries the The third information and the fourth information.
The method according to claim 7, wherein the uplink clock synchronization signal is a delay request message, and the first downlink clock synchronization signal is a timing signal;

Or the uplink clock synchronization signal is a random access sequence, and the first downlink clock synchronization signal is a downlink reference signal;

Alternatively, the uplink clock synchronization signal is an uplink reference signal, and the first downlink clock synchronization signal is a downlink reference signal.
The method according to claim 6, wherein the downlink clock synchronization signal comprises a first downlink clock synchronization signal and a second downlink clock synchronization signal;

The network terminal device sends a downlink clock synchronization signal to the terminal device, and records the fourth time information of the downlink clock synchronization signal, including:

Transmitting, by the network device, a first downlink clock synchronization signal to the terminal device, and recording fourth time information of the first downlink clock synchronization signal;

The network device sends a second downlink clock synchronization signal to the terminal device, where the second downlink clock synchronization signal carries the third time information and the fourth time information.
The method according to claim 9, wherein the uplink clock synchronization signal is a delay request message, the first downlink clock synchronization signal is a timing signal, and the second downlink clock synchronization signal is a delay response. Message

Or the uplink clock synchronization signal is a random access sequence, the first downlink clock synchronization signal is a downlink reference signal, and the second downlink clock synchronization signal is a random access response;

Or the uplink clock synchronization signal is an uplink reference signal, the first downlink clock synchronization signal is a downlink reference signal, and the second downlink clock synchronization signal is a delay response.
A clock synchronization method, comprising:

Transmitting, by the terminal device, the first uplink clock synchronization signal to the network device, and recording the first time information of sending the first uplink clock synchronization signal;

Receiving, by the terminal device, a first downlink clock synchronization signal sent by the network device, and recording second time information of receiving the first downlink clock synchronization signal;

The terminal device sends a second uplink clock synchronization signal to the network device, where the second uplink clock synchronization signal carries the first time information and the second time information;

Receiving, by the terminal device, a second downlink clock synchronization signal sent by the network device, where the second downlink clock synchronization signal carries clock deviation information, where the clock deviation information is that the network device is based on the first time information, The second time information, the third time information, and the fourth time information, the determined clock offset of the terminal device and the network device, where the third time information is time information of the network device receiving the first uplink clock synchronization signal, The fourth time information is time information that the network device sends the first downlink clock synchronization signal.
The method according to claim 11, wherein the first uplink clock synchronization signal is a delay request message, the second uplink clock synchronization signal is a timing response message, and the first downlink clock synchronization signal is The timing signal, the second downlink clock synchronization signal is a timing response message.
A clock synchronization method, comprising:

Receiving, by the network device, a first uplink clock synchronization signal sent by the terminal device, and recording third time information of receiving the first uplink clock synchronization signal;

Transmitting, by the network device, a first downlink clock synchronization signal, and recording fourth time information of the first downlink clock synchronization signal;

The network device receives a second uplink clock synchronization signal, where the second uplink clock synchronization signal carries the first time information that the terminal device sends the first uplink clock synchronization signal and receives the first downlink clock synchronization signal. Second time information;

The network device calculates clock deviation information of the terminal and the network device based on the first time information, the second time information, the third time information, and the fourth time information;

The network device sends a second downlink clock synchronization signal, where the second downlink clock synchronization signal carries the clock offset information.
The method according to claim 13, wherein the first uplink clock synchronization signal is a delay request message, the second uplink clock synchronization signal is a timing response message, and the first downlink clock synchronization signal is The timing signal, the second downlink clock synchronization signal is a timing response message.
A clock synchronization device, comprising:

a transceiver, configured to send an uplink clock synchronization signal to the network device and receive a downlink clock synchronization signal sent by the network device;

a processor, configured to record first time information for sending the uplink clock synchronization signal, record second time information for receiving the downlink clock synchronization signal, and based on the first time information, the second time information, and the third time The information and the fourth time information are used to calculate a clock offset of the network device and the terminal device; the downlink clock synchronization signal carries a third time information that the network device receives the uplink clock synchronization signal, and sends the downlink clock The fourth time information of the synchronization signal.
The device according to claim 15, wherein the downlink clock synchronization signal is a first downlink clock synchronization signal;

When receiving the downlink clock synchronization signal sent by the network device, the transceiver is specifically configured to: receive the first downlink clock synchronization signal sent by the network device;

When the second time information of the downlink clock synchronization signal is received, the processor is specifically configured to: record second time information of the first downlink clock synchronization signal, the first downlink clock synchronization signal The third time information and the fourth time information are carried in the middle time.
The device according to claim 16, wherein the uplink clock synchronization signal is a delay request message, and the first downlink clock synchronization signal is a timing signal; or the uplink clock synchronization signal is random access. The first downlink clock synchronization signal is a downlink reference signal, or the uplink clock synchronization signal is an uplink reference signal, and the first downlink clock synchronization signal is a downlink reference signal.
The device according to claim 15, wherein the downlink clock synchronization signal comprises a first downlink clock synchronization signal and a second downlink clock synchronization signal; and the second downlink clock synchronization signal carries the third Time information and fourth time information;

When receiving the downlink clock synchronization signal sent by the network device, the transceiver is specifically configured to: receive the first downlink clock synchronization signal sent by the network device, and the second downlink clock synchronization signal;

When the processor records the second time information of the downlink clock synchronization signal, the processor is specifically configured to: record second time information of the first downlink clock synchronization signal.
The device according to claim 18, wherein the uplink clock synchronization signal is a delay request message, the first downlink clock synchronization signal is a timing signal, and the second downlink clock synchronization signal is a delay response. Message

Or the uplink clock synchronization signal is a random access sequence, the first downlink clock synchronization signal is a downlink reference signal, and the second downlink clock synchronization signal is a random access response;

Or the uplink clock synchronization signal is an uplink reference signal, the first downlink clock synchronization signal is a downlink reference signal, and the second downlink clock synchronization signal is a delay response.
A clock synchronization device, comprising:

a transceiver, configured to receive an uplink clock synchronization signal sent by the terminal device and send a downlink clock synchronization signal to the terminal device;

a processor, configured to record third time information of the uplink clock synchronization signal, and record fourth time information of the downlink clock synchronization signal; the downlink clock synchronization signal carries the third time information and Four time information.
The device according to claim 20, wherein the downlink clock synchronization signal is a first downlink clock synchronization signal;

When transmitting the downlink clock synchronization signal to the terminal device, the transceiver is specifically configured to: send the first downlink clock synchronization signal to the terminal device;

When the fourth time information of the downlink clock synchronization signal is sent, the processor is specifically configured to: record fourth time information of the first downlink clock synchronization signal, the first downlink clock synchronization signal The third information and the fourth information are carried in the middle.
The device according to claim 21, wherein the uplink clock synchronization signal is a delay request message, and the first downlink clock synchronization signal is a timing signal;

Or the uplink clock synchronization signal is a random access sequence, and the first downlink clock synchronization signal is a downlink reference signal;

Alternatively, the uplink clock synchronization signal is an uplink reference signal, and the first downlink clock synchronization signal is a downlink reference signal.
The device according to claim 20, wherein the downlink clock synchronization signal comprises a first downlink clock synchronization signal and a second downlink clock synchronization signal;

When transmitting the downlink clock synchronization signal to the terminal device, the transceiver is specifically configured to: send the first downlink clock synchronization signal to the terminal device, and send the second downlink clock synchronization signal to the terminal device;

When the fourth time information of the downlink clock synchronization signal is sent, the processor is specifically configured to: record fourth time information of the first downlink clock synchronization signal; and the second downlink clock synchronization signal Carrying the third time information and the fourth time information.
The device according to claim 23, wherein the uplink clock synchronization signal is a delay request message, the first downlink clock synchronization signal is a timing signal, and the second downlink clock synchronization signal is a delay response. Message

Or the uplink clock synchronization signal is a random access sequence, the first downlink clock synchronization signal is a downlink reference signal, and the second downlink clock synchronization signal is a random access response;

Or the uplink clock synchronization signal is an uplink reference signal, the first downlink clock synchronization signal is a downlink reference signal, and the second downlink clock synchronization signal is a delay response.
A clock synchronization device, comprising:

The transceiver is configured to send the first uplink clock synchronization signal to the network device, receive the first downlink clock synchronization signal sent by the network device, send the second uplink clock synchronization signal to the network device, and receive the second downlink clock synchronization sent by the network device. signal;

a processor, configured to record first time information of the first uplink clock synchronization signal, and record second time information of the first downlink clock synchronization signal; the second uplink clock synchronization signal carries The first time information and the second time information; the second downlink clock synchronization signal carries clock deviation information, where the clock deviation information is that the network device is based on the first time information, the second time information, and the The third time information and the fourth time information, the determined clock offset of the terminal device and the network device, wherein the third time information is time information of the network device receiving the first uplink clock synchronization signal, the fourth time The information is time information for transmitting, by the network device, the first downlink clock synchronization signal.
The device according to claim 25, wherein the first uplink clock synchronization signal is a delay request message, the second uplink clock synchronization signal is a timing response message, and the first downlink clock synchronization signal is The timing signal, the second downlink clock synchronization signal is a timing response message.
A clock synchronization device, comprising:

The transceiver is configured to receive a first uplink clock synchronization signal sent by the terminal device, send a first downlink clock synchronization signal, receive a second uplink clock synchronization signal, and send a second downlink clock synchronization signal, where the second downlink clock synchronization signal Carrying the clock deviation information;

a processor, configured to record third time information of the first uplink clock synchronization signal, and record fourth time information of the first downlink clock synchronization signal; based on the first time information and the second time information The third time information and the fourth time information are used to calculate clock deviation information of the terminal and the network device; the second uplink clock synchronization signal carries the first time information that the terminal device sends the first uplink clock synchronization signal And receiving second time information of the first downlink clock synchronization signal.
The device according to claim 27, wherein the first uplink clock synchronization signal is a delay request message, the second uplink clock synchronization signal is a timing response message, and the first downlink clock synchronization signal is The timing signal, the second downlink clock synchronization signal is a timing response message.
A computer readable storage medium, comprising instructions that, when run on a computer, cause the computer to perform the method of any one of claims 1 to 5.
A computer readable storage medium comprising instructions which, when run on a computer, cause the computer to perform the method of any one of claims 6 to 10.
A computer readable storage medium, comprising instructions that, when run on a computer, cause the computer to perform the method of claim 11 or 12.
A computer readable storage medium, comprising instructions that, when run on a computer, cause the computer to perform the method of claim 13 or 14.