WO2018218927A1 - 一种排序网络、排序方法及排序装置 - Google Patents

一种排序网络、排序方法及排序装置 Download PDF

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WO2018218927A1
WO2018218927A1 PCT/CN2017/115459 CN2017115459W WO2018218927A1 WO 2018218927 A1 WO2018218927 A1 WO 2018218927A1 CN 2017115459 W CN2017115459 W CN 2017115459W WO 2018218927 A1 WO2018218927 A1 WO 2018218927A1
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sorting
sequence
comparison result
elements
flip
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PCT/CN2017/115459
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English (en)
French (fr)
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郑征
杜政
郭晗
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华为技术有限公司
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/06Arrangements for sorting, selecting, merging, or comparing data on individual record carriers
    • G06F7/08Sorting, i.e. grouping record carriers in numerical or other ordered sequence according to the classification of at least some of the information they carry

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  • the embodiments of the present invention relate to the field of computing acceleration technologies, and in particular, to a sorting network, a sorting method, and a sorting apparatus.
  • the sorting problem is of great significance in many research fields of computers. For example, in the fields of compilation, operating system, database management system, routing, and replacement network, problems related to sorting are involved.
  • the Bitonic sorting network is a recursive structure.
  • a 16-input 16-output Bitonic sequencing network consists of two 8-input 8-output Bitonic sequencing networks and a 16-input combined network; the 8-input 8-output Bitonic sequencing network can be divided into two 4-input 4-output Bitonic sequencing networks. And an 8-input merged network.
  • Each level of the Bitonic sequencing network is serially compared. Only when the comparator of the previous stage completes the comparison and exchange, the input of the comparator of the next stage can be determined.
  • the embodiment of the present application provides a sorting network, a sorting method, and a sorting apparatus, to provide a new sorting network.
  • a sorting network which effectively saves the number of comparators and reduces the number of comparators by replacing the comparison unit of 2 input and 2 outputs in the conventional sorting network with the comparison unit and the sorting unit of parallel comparison of multiple input and multiple output.
  • the number of stages in the comparator, that is, the sorting delay is reduced.
  • the ranking network includes at least two first sorting devices, a flip half cleaner Flip-HC, and at least one second sorting device, the first sorting device and the second sorting device both Flip the half cleaner connection, wherein: any of the first sorting means is configured to acquire a random input sequence, compare each two elements in the random input sequence, and compare the result in the random input sequence according to the comparison result The elements are sorted to output a first sorting sequence; the flip half cleaner is configured to acquire at least two of the first sorting sequences output by at least two of the first sorting devices, and to sort the at least two of the first sorting The sequence performs a flip sorting process, and outputs a bi-timing sequence; the second sorting means is configured to obtain the bi-level sequence output by the flip-semi-cleaner, and compare each two elements in the bi-timing sequence, The elements in the bi-timing sequence are sorted according to the comparison result, and the second sorting sequence is output.
  • the number of comparators required to compare an input sequence of length n is Effectively reducing the number of comparators, and the first sorting device shortens the calculation delay compared to the conventional sorting network
  • the second sorting device shortens the calculation delay lg(n)-1 compared to the conventional sorting network.
  • the flip half cleaner when the flip half cleaner is performing the flip sorting process on the at least two first sorting sequences, specifically, the first element in the first part and the second part in the second part are selected.
  • the two elements are compared, and when the comparison result of the second element and the first element meets a set size relationship, the second element is exchanged with the position of the first element; wherein, at least two of the first sorting sequences are Forming a sorting total sequence including the first part and the second part in the sorting total sequence; recording and outputting an element position index at which positional switching occurs.
  • the second sorting device is further configured to: obtain an element position index of the occurrence position exchange of the flip half cleaner output, and determine a segment of the bi-level sequence that is divided by the element position index a sub-sequence and a second sub-sequence; the second sorting device sorts the elements in the bi-timing sequence according to the comparison result, and outputs the second sorting sequence, specifically: using the elements in the first sub-column Comparing with the elements in the second subsequence, sorting the elements in the bidirectional sequence according to the comparison result, and outputting the second sorting sequence. In this way, the number of comparators used by the second sorting device can be further reduced.
  • the first sorting device compares each two elements in the random input sequence, sorts the elements in the random input sequence according to the comparison result, and outputs a first sorting sequence, specifically For: the random input sequence is ⁇ x 0 ??x n-1 ⁇ , and the i-th element x i is selected in order to obtain a comparison result of x i and x j , i, j ⁇ [0, n-1 ], i ⁇ j; wherein, when j>i, x i is compared with x j to obtain a comparison result of x i and x j when j>i; when j ⁇ i, according to the already obtained j Comparing the results of x j and x i obtained by the elements, obtaining a comparison result of x i and x j when j ⁇ i; and generating a matrix according to the comparison result, wherein the i-th row vector of the matrix includes: j>i comparison of x i
  • the second sorting device compares each two elements in the bi-timing sequence, sorts the elements in the bi-phasic sequence according to the comparison result, and outputs a second sorting sequence, specifically For: the double-tuning sequence is ⁇ x 0 ??x n-1 ⁇ , and the i-th element x i is selected in order to obtain a comparison result of x i and x j , i, j ⁇ [0, n-1 ], i ⁇ j; wherein, when j>i, x i is compared with x j to obtain a comparison result of x i and x j when j>i; when j ⁇ i, according to the already obtained j Comparing the results of x j and x i obtained by the elements, obtaining a comparison result of x i and x j when j ⁇ i; and generating a matrix according to the comparison result, wherein the i-th row vector of the matrix includes: j
  • the second sorting device compares x i with x j to obtain a comparison result, specifically: if x i >x j , the comparison result is recorded as 1; if x i ⁇ x j , the comparison result is recorded as 0; the second sorting device calculates the number of elements characterizing x i >x j in the ith row vector of the matrix, specifically for: calculating the ith row of the matrix The weight of the vector is heavy.
  • the first sorting device compares x i with x j to obtain a comparison result, specifically: if x i >x j , the comparison result is recorded as 1; if x i ⁇ x j , the comparison result is recorded as 0; the first sorting device calculates the number of elements characterizing x i >x j in the ith row vector of the matrix, specifically for: calculating the ith row of the matrix The weight of the vector is heavy.
  • the first sorting apparatus is further configured to acquire N path metric values of the N candidate paths in the continuous elimination list SCL decoding algorithm, and obtain N path metric values before acquiring the random input sequence. Forming two sequences of length N/2; if the sorting network includes two of the first sorting devices, when any of the first sorting devices acquires a random input sequence, specifically, the method is: acquiring a length of The sequence of N/2.
  • a sorting method is provided, the method being applied to a sorting network, wherein the sorting network includes at least two first sorting devices, a flip half cleaner Flip-HC, and at least one second sorting device, the first a sorting device and the second sorting device are both connected to the flip half cleaner, the method being specifically implemented by: acquiring a random input sequence by any of the first sorting devices, in the random input sequence Comparing each of the two elements, sorting the elements in the random input sequence according to the comparison result, outputting a first sorting sequence; acquiring at least two of the first sorting sequences by the flipping half cleaner, for at least two The first sorting sequence performs a flip sorting process, and outputs a bi-timing sequence; the bi-aligned sequence is acquired by the second sorting device, and each two elements in the bi-timing sequence are compared according to a comparison result. The elements in the bi-timing sequence are sorted, and a second sorting sequence is output.
  • the number of comparators is effectively
  • At least two of the first sorting sequences are subjected to a flip sorting process by the flip half cleaner, specifically: selecting a first element in the first part and a second element in the second part Comparing, when the comparison result of the second element and the first element conforms to the set size relationship, exchanging the position of the second element with the first element; wherein at least two of the first sorting sequences constitute a sorting total a sequence, the first part and the second part are included in the sorting total sequence; an element position index at which a position exchange occurs is recorded and output.
  • an element position index of the occurrence position exchange of the flip half cleaner output is obtained by the second sorting device, and the first subsequence divided by the element position index in the bimodulation sequence is determined.
  • the second sub-sequence sorting the elements in the bi-timing sequence according to the comparison result by the second sorting device, and outputting the second sorting sequence, specifically: the element in the first sub-column and the second The elements in the subsequence are compared, the elements in the bimodulated sequence are sorted according to the comparison result, and the second sorting sequence is output.
  • each of the random input sequences is compared by the first sorting device, and the elements in the random input sequence are sorted according to the comparison result, and the first sorting sequence is output.
  • the random input sequence is ⁇ x 0 ??x n-1 ⁇
  • the i-th element x i is selected in order to obtain a comparison result of x i and x j , i, j ⁇ [0, n-1 ], i ⁇ j; wherein, when j>i, x i is compared with x j to obtain a comparison result of x i and x j when j>i; when j ⁇ i, according to the already obtained j Comparing the results of x j and x i obtained by the elements, obtaining a comparison result of x i and x j when j ⁇ i; and generating a matrix according to the comparison result, wherein the i-th row vector of the matrix includes: j>i comparison of
  • each of the two elements in the bi-timing sequence is compared by the second sorting device, and the elements in the bi-phasic sequence are sorted according to the comparison result, and the second sorting sequence is output.
  • the bi-modulation sequence is ⁇ x 0 ??x n-1 ⁇
  • the i-th element x i is selected in order to obtain a comparison result of x i and x j , i, j ⁇ [0, n-1 ], i ⁇ j; wherein, when j>i, x i is compared with x j to obtain a comparison result of x i and x j when j>i; when j ⁇ i, according to the already obtained j Comparing the results of x j and x i obtained by the elements, obtaining a comparison result of x i and x j when j ⁇ i; and generating a matrix according to the comparison result, wherein the i-th row vector of the
  • comparing the x i with x j by the second sorting device to obtain a comparison result specifically: if x i >x j , the comparison result is recorded as 1; if x i ⁇ x j And comparing the result of the comparison to 0; calculating, by the second sorting device, the number of elements representing x i >x j in the ith row vector of the matrix, specifically: calculating the ith row vector of the matrix The line is heavy.
  • comparing the x i with x j by the first sorting device to obtain a comparison result specifically: if x i >x j , the comparison result is recorded as 1; if x i ⁇ x j , the result of the comparison is recorded as 0; the number of elements representing x i >x j in the ith row vector of the matrix is calculated by the first sorting device, specifically: calculating the ith row vector of the matrix The line is heavy.
  • the N path metrics of the N candidate paths in the continuous elimination list SCL decoding algorithm are obtained by the first sorting device before the random input sequence is obtained, and the N path metric values are composed of two a sequence of length N/2; if the first sorting device is included in the sorting network, when the random input sequence is acquired by any of the first sorting devices, including: by any of the first sorting The device acquires a sequence of length N/2.
  • a sorting apparatus in a third aspect, there is provided a sorting apparatus, the sorting apparatus being the first sorting apparatus in a sorting network as described in the first aspect and any of the possible designs, or the sorting apparatus is The second sorting means in the sorting network described on the one hand and in any of the possible designs.
  • a sorting network comprising at least two first sorting devices, a flip half cleaner Flip-HC, in the sorting network as described in the first aspect and any of the possible designs;
  • the ranking network comprises a flip half cleaner Flip-HC and at least one second sorting device in a sorting network as described in the first aspect and any of the possible designs.
  • a sorting method acquires an input sequence of length n, and n is a positive integer; the sorting device compares each two elements in the input sequence to obtain a comparison result; The device sorts the elements in the input sequence according to the comparison result to obtain an output sequence. This effectively saves the number of comparators and reduces the number of stages of the comparator, ie, reduces the sorting delay.
  • the sorting device compares each two elements in the input sequence to obtain a comparison result, specifically: if the input sequence is ⁇ x 0 ??x n-1 ⁇ , then The sorting device sequentially selects the i-th element x i , and obtains a comparison result of x i and x j , i, j ⁇ [0, n-1], i ⁇ j; wherein, when j>i, the The sorting device compares x i with x j to obtain a comparison result of x i and x j when j>i; when j ⁇ i, the sorting device obtains x j and x obtained for the jth element according to the obtained j element a comparison result of i , obtaining a comparison result of x i and x j when j ⁇ i; the sorting device sorts the elements in the input sequence according to the comparison result to obtain an output sequence, specifically: the sorting device according to the comparison As a
  • the x i is compared with x j to obtain a comparison result, specifically: if x i >x j , the comparison result is recorded as 1; if x i ⁇ x j , the comparison result is recorded Is 0; the sorting device calculates the number of elements characterizing x i >x j in the ith row vector of the matrix, specifically: the sorting device calculates the row weight of the ith row vector of the matrix.
  • the sorting means obtains N path metric values of N alternative paths in the continuous elimination list SCL decoding algorithm before acquiring the input sequence of length n.
  • the sorting device acquires N alternative paths in the continuous elimination list SCL decoding algorithm After the N path metrics of the path, the N path metrics are formed into two sequences of length N/2, and the two sequences of length N/2 are respectively interleaved to obtain two monotonic sequences; The two monotonic sequences are combined and the merged sequence is flipped and semi-cleaned; the input sequence consists of part or all of the inverted half-cleaned sequence.
  • a sorting apparatus having the function of implementing the sorting device behavior of any of the possible aspects of the fourth aspect and the fourth aspect described above.
  • the functions may be implemented by hardware or by corresponding software implemented by hardware.
  • the hardware or software includes one or more modules corresponding to the functions described above.
  • a sorting apparatus comprising a transceiver and a processor, wherein the processor is configured to invoke a set of programs to perform any of the possible designs of the fourth aspect and the fourth aspect described above The method described in the above.
  • a computer storage medium for storing a computer program, the computer program comprising any of the possible implementations or the fourth aspect of the second aspect, the fourth aspect, the second aspect, or the fourth aspect The instructions of the method in a possible implementation.
  • an embodiment of the present application provides a computer program product comprising instructions that, when run on a computer, cause the computer to perform the method described in the above aspects.
  • FIG. 1 is a schematic diagram of a Bitonic sorting network in the prior art
  • FIG. 2 is a schematic structural diagram of a sorting network in an embodiment of the present application.
  • FIG. 3 is a schematic flowchart of a sorting method in an embodiment of the present application.
  • FIG. 4 is a schematic structural diagram of a sorting apparatus in an embodiment of the present application.
  • FIG. 5 is a second schematic structural diagram of a sorting apparatus according to an embodiment of the present application.
  • FIG. 6 is a third schematic structural diagram of a sorting apparatus in an embodiment of the present application.
  • FIG. 7 is a schematic diagram of an application of a sorting network in an embodiment of the present application.
  • FIG. 8 is a second schematic diagram of a sorting network application in an embodiment of the present application.
  • FIG. 9 is a second schematic flowchart of a sorting method in an embodiment of the present application.
  • the embodiment of the present application provides a sorting network and a sorting method, which can be applied to the fields of compiling, operating system, database management system, routing, replacement network, and the like. For example, it can be applied to the Polar code decoding process to sort the PM values of the multiple paths to select a preferred path, and the sorting network may be part of the decoding device for the ordering application part in the decoding process.
  • the sorting device included in the sorting network can sort the elements in the input sequence at a time by comparing each two elements in the input sequence and interleaving the input sequence according to the comparison result, that is, Sorting the input sequence is done using a first-level comparator.
  • the sorting network provided by the embodiment of the present application can effectively reduce the number of stages of the comparator used in the sorting, that is, reduce the time used for sorting.
  • the code domain can further improve coding efficiency and decoding performance.
  • the sorting network 200 includes at least two first sorting devices 201, a Flip Half Cleaner (Flip-HC) 202, and at least one second sorting device 203. Both the first sorting device 201 and the second sorting device 203 are coupled to the flip half cleaner 202. For example, the output of the first sorting device 201 is coupled to the input of the flip half cleaner 202, and the output of the flip half cleaner 202 is coupled to the input of the second sorting device 203. In FIG. 2, two sorting devices 201 and one second sorting device 203 are included in the sorting network 200 as an example.
  • Any first sorting device 201 is configured to obtain a random input sequence, compare each two elements in the random input sequence, sort the elements in the random input sequence according to the comparison result, and output a first sorting sequence;
  • the length of the sequence is n, then the number of comparators required by the first sorting device 201 is
  • the half-cleaner 202 is configured to acquire at least two first sorting sequences output by the at least two first sorting devices 201, perform a flip sorting process on the at least two first sorting sequences, and output a double-tuning sequence;
  • the second sorting device 203 is configured to obtain the bi-timing sequence output by the flip-down cleaner 202, compare each two elements in the bi-timing sequence, sort the elements in the bi-timing sequence according to the comparison result, and output the second sort sequence. If the length of the bi-timing sequence is n, the number of comparators required by the second sorting device 203 is
  • the flip half cleaner 202 is specifically configured to: when performing the flip sort processing on the at least two first sort sequences;
  • a sorted total sequence of length n includes an upper half (ie, a first portion) and a lower half (a second portion), and the flip half cleaner 202 selects the first element of the upper half and the last element of the lower half.
  • the inverted identification sequence For comparison, if it is greater, it is not exchanged, and 0 is recorded in the inverted identification sequence; if it is less, the two element positions are exchanged, and 1 is recorded in the inverted identification sequence. Then select the second element of the upper part and compare it with the second to last element of the lower part. The comparison method is consistent until all elements of the sorted total sequence are compared, and finally the inverted identification sequence is generated.
  • the length of the inverted identification sequence is n/2. .
  • the second sorting device 203 is further configured to:
  • the second sorting means 203 sorts the elements in the double-tone sequence according to the comparison result, and outputs the second sorting sequence, specifically for:
  • the elements in the first sub-column are compared with the elements in the second sub-sequence, and the elements in the bi-directional sequence are sorted according to the comparison result, and the second sorting sequence is output. For example, if the flipping identification sequence is ⁇ 0 0 0 1 1 1 1 1 ⁇ , the positional index of the position where the position swapping occurs is an alternate position of 0 and 1, the 3rd and 4th bits. Then the first 3 bits of the bi-modulation sequence are the first sub-sequence, and the element after the 4th bit is the second sub-sequence.
  • the second sorting means 203 requires that the number of comparators is less than The number of comparators used by the second sorting means 203 can be effectively reduced.
  • the first sorting device 201 compares each two elements in the random input sequence, and randomly converts according to the comparison result.
  • the elements in the sequence are sorted, and the first sorting sequence is output, specifically for:
  • the random input sequence is ⁇ x 0 ??x n-1 ⁇ , and the i-th element x i is selected in order to obtain the comparison result of x i and x j , i, j ⁇ [0, n-1], i ⁇ j
  • x i is compared with x j to obtain a comparison result of x i and x j when j>i;
  • a matrix is generated, wherein the ith row vector of the matrix includes: a comparison result of x i and x j when j>i, and a comparison result of x i and x j when j ⁇ i;
  • the number of elements characterizing x i >x j in the i-th row vector of the matrix is calculated, and the input sequence is interleaved by number, and the first sorted sequence after interleaving is output.
  • the second sorting device 203 compares each two elements in the bi-timing sequence, sorts the elements in the bi-timing sequence according to the comparison result, and outputs a second sorting sequence, specifically for:
  • the bi-tonal sequence is ⁇ x 0 ??x n-1 ⁇ , and the i-th element x i is selected in order to obtain a comparison result of x i and x j , i, j ⁇ [0, n-1], i ⁇ j
  • x i is compared with x j to obtain a comparison result of x i and x j when j>i;
  • a matrix is generated, wherein the ith row vector of the matrix includes: a comparison result of x i and x j when j>i, and a comparison result of x i and x j when j ⁇ i;
  • the number of elements characterizing x i >x j in the i-th row vector of the matrix is calculated, and the input sequence is interleaved by number, and the second sorted sequence after interleaving is output.
  • the second sorting means 203 compares x i with x j to obtain a comparison result, it is specifically used for:
  • the second sorting means 203 calculates the number of elements characterizing x i >x j in the i-th row vector of the matrix, specifically for:
  • the first sorting device 201 compares x i with x j to obtain a comparison result, it is specifically used to:
  • the first sorting means 201 calculates the number of elements characterizing x i >x j in the i-th row vector of the matrix, specifically for:
  • the first sorting device 201 is further configured to obtain N path metric values of N candidate paths in the continuous elimination list SCL decoding algorithm before acquiring the random input sequence, where the N path metric values are composed of two lengths of N/2 the sequence of;
  • the first sorting device 201 includes the two first sorting devices 201, the first sorting device 201 is configured to acquire a sequence of length N/2. That is to say, a sequence of length N consisting of N path metric values is received by two first sorting means 201, wherein a first sorting means 201 receives a sequence of length N/2.
  • another sorting network is further provided in the embodiment of the present application, which may include at least two first sorting devices 201 and Flip-HC202 in the sorting network 200; or provide another sorting
  • the network may include a Flip-HC 202 in the sorting network 200 and at least one second sorting device 203.
  • the sorting means may refer to the first sorting means 201 described above, and may also refer to the second sorting means 203.
  • the ordering method of the first sorting means 201 and the second sorting means 203 is similar.
  • the specific process of the sorting method applied by the first sorting device 201 and the second sorting device 203 is as follows: As described below.
  • Step 301 The sorting device acquires an input sequence.
  • Step 302 The sorting device compares each two elements in the input sequence to obtain a comparison result.
  • Step 303 The sorting device sorts the elements in the input sequence according to the comparison result to obtain an output sequence.
  • the sorting device may implement the foregoing steps 202 and 203 in the following manner.
  • the input sequence can be represented by ⁇ x 0 ??x n-1 ⁇ , and can be represented by ⁇ x 1 ??x n ⁇ .
  • the two representations are only different expression methods of the element number, and the sorting method used is similar.
  • This application introduces an input sequence with ⁇ x 0 ??x n-1 ⁇ as an example.
  • the input sequence includes n elements, denoted by x 0 ... x n-1 , respectively.
  • the sorting device sequentially selects the i-th element x i , i ⁇ [0, n-1] in order, that is, the sorting device traverses each element in the input sequence, and sequentially selects the 0th element x 0 , the first element x 1 ...
  • Each selection element x i, x i and acquiring a comparison result of x j, j ⁇ [0, n-1 ], i ⁇ j, x i is acquired with ⁇ x 0 ?? x n-1 ⁇ except x
  • the comparison result of elements other than i may be a size relationship, for example, whether x i is greater than x j , and if it is greater, the value of the comparison result is 1; otherwise, it is 0.
  • the comparison result of x i and x j is specifically obtained, a part of the values are compared by a comparator, and a part of the values can be obtained by inverting the obtained result.
  • the comparator compares x i with x j to obtain a comparison result of x i and x j when j>i; when j ⁇ i, according to the j-th element x j that has been acquired
  • the comparison is not performed again by the comparator, and the comparison result of x 1 and x 0 is obtained according to the comparison result of x 0 and x 1 when the 0th element x 0 is selected. If the comparison result is expressed by whether x i is greater than x j , then the comparison result of x 0 and x 1 is selected when the 0th element x 0 is selected, and the comparison result of x 1 and x 0 is obtained, x 0 >x 1 is true, the result is recorded as 1, then x 1 >x 0 is false, and the result is recorded as 0.
  • the sorting device generates a matrix according to the comparison result, wherein the i-th row vector of the matrix includes: a comparison result of x i and x j when j>i, and a comparison result of x i and x j when j ⁇ i.
  • the comparison result of x i and x j is recorded in the i-th row of the matrix, and the matrix includes n rows, that is, the 0th to n-1th rows. .
  • the number of elements characterizing x i >x j in the i-th row vector of the matrix is calculated, and the input sequence is interleaved according to the number, and the interleaved sequence is output. If the comparison result is expressed by 1, 0, and x i > x j , the comparison result is 1; x i ⁇ x j , and the comparison result is 0. The elements in the matrix are represented by 1, 0. Then, the number of elements characterizing x i >x j in the i-th row vector of the matrix is calculated, that is, the row weight of the i-th row vector of the matrix is calculated. If the row weight is 2, it means that there are 2 elements 1 in the i-th row, indicating that x i has 2 elements smaller than x i in the input sequence, and the others are larger than x i .
  • d 0 ⁇ x 0 >x 1 ,x 0 >x 2 ,x 0 >x 3 ⁇
  • W(d i ) be the row weight of each row in D
  • the input sequence can be interleaved according to the row weight to obtain the relationship of the output sequence.
  • the matrix is n rows (n-1).
  • the sorting device sorts the input sequence of length n, and the number of comparators is not greater than
  • the embodiment of the present application further provides a sorting device 400 for executing FIG. 3 .
  • the sorting device 400 may be a first sorting device 201 that performs the method performed by the first sorting device 201, and the sorting device 400 may also be a second sorting device 203 that performs the method performed by the second sorting device 203.
  • the sorting device 400 includes:
  • the input unit 401 is configured to acquire an input sequence of length n.
  • the processing unit 402 is configured to compare each two elements in the input sequence to obtain a comparison result.
  • the processing unit 402 is further configured to sort the elements in the input sequence according to the comparison result to obtain an output sequence.
  • the output unit 403 is configured to output the obtained output sequence.
  • the processing unit 402 is configured to:
  • the i-th element x i is selected in order to obtain a comparison result of x i and x j , i, j ⁇ [0, n-1], i ⁇ j; wherein, when j>i, x i is compared with x j to obtain a comparison result of x i and x j when j>i;
  • a matrix is generated, wherein the ith row vector of the matrix includes: a comparison result of x i and x j when j>i, and a comparison result of x i and x j when j ⁇ i;
  • the number of elements characterizing x i >x j in the i-th row vector of the matrix is calculated, and the input sequence is interleaved by number, and the interleaved sequence is output.
  • processing unit 402 is configured to:
  • the matrix is a n-row (n-1) column matrix; or, the matrix is an n-row n-column matrix, wherein the ith row element of the n-row n-column matrix further includes an ith column element, the ith The column element is set to 1.
  • the processing unit 402 is further configured to: acquire N path metric values of the N candidate paths in the continuous elimination list SCL decoding algorithm.
  • the input sequence consists of part or all of the N path metrics.
  • the processing unit 402 is further configured to: acquire N candidate paths in the SCL decoding algorithm of the continuous elimination list. After the N path metrics, the N path metrics are combined into two sequences of length N/2, and two sequences of length N/2 are respectively interleaved to obtain two monotonic sequences; two monotonic sequences are obtained. The merging is performed, and the merged sequence is flipped and semi-cleaned; the input sequence is composed of part or all of the sequence after the half-cleaning process.
  • the sorting device 400 is the first sorting device 201, the input sequence is the random input sequence, and the output sequence is the first sorting sequence; if the sorting device 400 is the second sorting device 203, the input sequence is In the above bi-modulation sequence, the output sequence is a second sorting sequence.
  • the embodiment of the present application further provides a sorting apparatus 500, which can be used to execute the sorting method shown in FIG.
  • the sorting means 500 may be the first sorting means 201, which performs the method performed by the first sorting means 201, and the sorting means 500 may also be the second sorting means 203, which performs the method performed by the second sorting means 203.
  • the sorting device 500 includes a transceiver 501 and a processor 502.
  • the processor 502 is configured to execute a set of codes. When the code is executed, the execution causes the processor 502 to execute the sorting method shown in FIG. 2.
  • the processor 502 can be a central processing unit (CPU), a network processor (NP), or a combination of a CPU and an NP.
  • CPU central processing unit
  • NP network processor
  • Processor 502 can also further include a hardware chip.
  • the hardware chip may be an application-specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof.
  • the PLD may be a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), a general array logic (GAL), or any combination thereof.
  • the sorting device 500 may further include a memory 503 for storing code executed by the processor 502, and the memory 503 may include a volatile memory, such as a random-access memory (RAM); 503 may also include a non-volatile memory, such as a flash memory, a hard disk drive (HDD), or a solid-state drive (SSD); the memory 503 may also include A combination of the above types of memories.
  • a volatile memory such as a random-access memory (RAM)
  • 503 may also include a non-volatile memory, such as a flash memory, a hard disk drive (HDD), or a solid-state drive (SSD); the memory 503 may also include A combination of the above types of memories.
  • HDD hard disk drive
  • SSD solid-state drive
  • Memory 503 can also be integrated with processor 502.
  • Processing unit 402 may be implemented by processor 502, and input unit 401 and output unit 403 may be implemented by transceiver 501.
  • the sorting device 500 can be a chip or an integrated circuit.
  • the sorting device 500 is an integrated circuit, and the sorting device 500 is first.
  • the circuit 601, the second circuit 602, and the third circuit 603 are integrated.
  • the first circuit 601 includes a comparator 6011 and an inverter 6012. For the input sequence ⁇ x 0 ...
  • the comparator 6011 is configured to compare x i with x j when j>i
  • the inverter 6012 is configured to invert the comparison result of the j-th element x j and x i that have been acquired when j ⁇ i, and the first circuit 601 generates a matrix [d 0 , . . . , d n-1 ] Where d 0 , . . .
  • d n-1 is the row vector in the matrix
  • the first circuit 601 outputs the row vector in the matrix to the second circuit 602
  • the second circuit 602 is used to calculate the row weight of each row, and output each row
  • the row weight ⁇ W(d o )...W(d n-1 ) ⁇ specifically accumulates the number of elements 1 in each row of vectors, and obtains the row weight of each row.
  • the number of accumulations is related to the length n of the input sequence, and accumulates
  • the resulting bit width is log(n).
  • the third circuit 603 interleaves the elements of the input sequence by using the row weight ⁇ W(d o )...W(d n-1 ) ⁇ output by the second circuit 602 as a control signal, which may be referred to as an interleaving circuit to obtain an output sequence.
  • the sorting method provided by the embodiment of the present application is further described in detail below in conjunction with a specific application scenario. Take the application scenario of the Polar code decoding as an example.
  • the effective decoding algorithm of the Polar code is the SC algorithm, that is, the estimated value of the next bit can be determined one by one by calculating the transition probability of the channel whose next bit is 0 or 1 according to the received signal and the existing bit estimation sequence.
  • the performance of the SC algorithm is poor.
  • there is a list (LIST) method that is, a plurality of bit sequence paths with better metric values are saved, and the preferred path of the next bit decoding is split and ordered from multiple paths.
  • the sorting module needs to sort the path metrics (Path Metric, PM) values of all the splitting situations of the L paths, and only the preferred path can be used as the path for the next bit decoding; and for each bit translation The code needs to sort the path. Therefore, the sorting module is the key path of the SCL algorithm, and its calculation delay limits the increase of the throughput of the Polar code SCL decoder.
  • the sorting module often uses the Bitonic sorting network shown in FIG. 1.
  • the Bitonic sorting network shown in FIG. 1 is optimized by the sorting method shown in FIG. 2 above.
  • the Bitonic sorting network shown in FIG. 1 is a 16-input 16-output.
  • the number of input and output is only an example, and is not a limitation of the application of the sorting method in the embodiment of the present application.
  • an input sequence of length 16 can be divided into two input subsequences of length 8. A similar sort operation is performed on two input subsequences of length 8.
  • the former part can be regarded as two 8-input 8
  • the sorting network of the output After two 8-input and 8-output sorting networks, a two-tone sequence of length 16 is output.
  • the double-tone sequence of length 16 is flipped by Flip Half Cleaner (Flip HC), the larger value is output in the upper half, and the upper half outputs a double-tone sequence of length 8 with a smaller value. In the lower half output, the lower half outputs a double-tone sequence of length 8, which outputs a flip sequence of length 16.
  • the flipping sequence of length 16 is sorted by two Bitonic sorters. If the number of LISTs is 8, there are 16 branches possible, and only the first 8 results are needed. Therefore, the lower half of the box in Figure 1 is input.
  • the Bitonic sequencer can be omitted.
  • This sorting network is called a partial sorting network.
  • the double-tone sequence of the upper half of the Flip-HC output length of 8 can be output in the sort order after passing through the two-tone sequencer.
  • Each stage of the traditional sorting network is serially compared, and the input sequence of length 16 is completely compared with the number of comparator stages used.
  • the sorting network 200 shown in FIG. 2 can be used to process the input sequence of length 16 and finally output a sorting sequence of length 8.
  • the input sequence of length 16 can be divided into two input subsequences of length 8.
  • the two first sorting means perform similar sorting operations on two input subsequences of length 8 through two 8-input and 8-output sections.
  • two first sorting sequences are output, and the two first sorting sequences are composed of a double-tone sequence of length 16.
  • the double-tone sequence of length 16 is flipped by Flip-HC, and the larger value is output in the upper half.
  • the upper half outputs the double-tone sequence of length 8.
  • the smaller value is output in the lower half, and the lower half is output.
  • a double-tone sequence of length 8 that outputs a flip sequence of length 16. If only the first 8 results are needed, the lower half of the double-tone sequence with an output length of 8 is omitted, and the second sorting device used for the lower half is indicated by a broken line in FIG. 7 and can be omitted.
  • the second sorting device sorts the double-tone sequence of length 8 outputted by the upper half, and outputs a second sorting sequence. It can be seen that, in the sorting network of the embodiment of the present application, the sorting device adopts parallel comparison, and the input sequence with length 16 is completely compared with the comparator level of 3, which can save 7 levels compared with the traditional sorting network, and the delay is reduced by 70%. Reduced transmission delay.
  • two 4-input 4-output second sorting devices may be employed in the sorting network.
  • the sorting device in the sorting network in the embodiment of the present application uses parallel comparison, and the input sequence of length 16 completely compares the comparators used.
  • the number of levels is 4, which can save 6 levels compared with the traditional sorting network, and the delay is reduced by 60%, which effectively reduces the transmission delay.
  • the number of comparators used for sorting can be effectively reduced by the first sorting means and the second sorting means, and the delay used for sorting can be reduced. It is assumed that the input sequence of the first sorting device and the input sequence length of the second sorting device are both n, as compared with the conventional sorting network, as shown in Tables 1 and 2 in the case of the number of comparators and the reduction delay.
  • the input of the second sorting device is half of the output of the Flip-HC.
  • the n-input Flip-HC can always output two sequences of length n/2: one for the cleaning sequence and only 0 or 1; the other for the double-tone sequence, containing 0 and 1.
  • the ordering of the output of the Flip-HC can be utilized to simplify the comparison of the equivalent units of the second sorting device.
  • the two 8-input sequences of the Flip-HC are [50 50 48 41 37 16 9 5] and [80 76 71 58 44 258 3].
  • the first output is 50 and 3.
  • the larger of 50 because of the unexchanged position, records 0 in the inverted identification sequence f; the second requires output is the larger 50 between 50 and 8, and records 0 in the inverted identification sequence f to This type of push.
  • the fourth output that needs to be output is the larger 44 between 44 and 44, the two elements are swapped, and one is recorded in the flip identification sequence f.
  • the resulting inverted flag sequence f [0 0 0 1 1 1 1] will flip the identification sequence and the resulting two two-tone sequences.
  • the resulting double-tone sequence of the upper half output is [50 50 48 44 58 71 76 80], which is a valley-type double-tuned sequence; the lower-half output of the lower half is [3 8 25 41 37 169 5], It is a double-tone sequence of the peak type.
  • the trend change of the corresponding upper half of the output of the double tone sequence is also between the 3rd and the 4th, and the minimum value is the 3rd element or the 4th element;
  • the trend change of the corresponding bi-level sequence of the lower half output is also between the third and fourth, and the maximum value is the third element or the fourth element. Therefore, the position of the step of the f-sequence can be used to determine the position of the minimum or maximum value of the bi-directional sequence.
  • the second sorting device needs to compare the elements in [a 1 ] with the elements in [a 2 a 3 a 4 a 5 a 6 a 7 a 8 ], requiring 7 comparators;
  • the second sorting device needs to compare the elements in [a 1 a 2 ] with the elements in [a 3 a 4 a 5 a 6 a 7 a 8 ], requiring 12 comparators;
  • the second sorting device needs to compare the elements in [a 1 a 2 a 3 ] with the elements in [a 4 a 5 a 6 a 7 a 8 ], requiring 15 comparators;
  • the second sorting device needs to compare the elements in [a 1 a 2 a 3 a 4 ] with the elements in [a 5 a 6 a 7 a 8 ], requiring 16 comparators;
  • the second sorting device needs to compare the elements in [a 1 a 2 a 3 a 4 a 5 ] with the elements in [a 6 a 7 a 8 ], requiring 15 comparators;
  • the second sorting device needs to compare the elements in [a 1 a 2 a 3 a 4 a 5 a 6 ] with the elements in [a 7 a 8 ], requiring 12 comparators;
  • the second sorting device needs to compare the elements in [a 1 a 2 a 3 a 4 a 5 a 6 a 7 ] with the elements in [a 8 ], and it takes 7 comparators to be the same;
  • the Flip-HC output increases the value of the f-sequence, so that the number of comparators can be saved in the second sorting device. Since the values of i are mutually exclusive, the optimized second sorting device only needs 16 A comparator can be compared in all cases, saving 12 comparators compared to the first sorting device.
  • the corresponding embodiment of the present application further provides a sorting method, as described below.
  • Step 901 Acquire a random input sequence by using any first sorting device, compare each two elements in the random input sequence, sort the elements in the random input sequence according to the comparison result, and output a first sorting sequence;
  • Step 902 Obtain at least two first sorting sequences by flipping the semi-cleaner, perform a flip sorting process on the at least two first sorting sequences, and output a double-tuning sequence;
  • Step 903 Acquire a bi-directional sequence by using a second sorting device, compare each two elements in the bi-timing sequence, sort the elements in the bi-timing sequence according to the comparison result, and output a second sorting sequence.
  • the at least two first sorting sequences are flipped and sorted by flipping the semi-cleaner, including:
  • the method further includes:
  • Sorting the elements in the bi-timing sequence according to the comparison result by the second sorting device, and outputting the second sorting sequence including:
  • the elements in the first sub-column are compared with the elements in the second sub-sequence, and the elements in the bi-directional sequence are sorted according to the comparison result, and the second sorting sequence is output.
  • each of the two elements in the random input sequence is compared by the first sorting device, and the elements in the random input sequence are sorted according to the comparison result, and the first sorting sequence is output, including:
  • the random input sequence is ⁇ x 0 ??x n-1 ⁇ , and the i-th element x i is selected in order to obtain the comparison result of x i and x j , i, j ⁇ [0, n-1], i ⁇ j ;
  • a matrix is generated, wherein the ith row vector of the matrix includes: a comparison result of x i and x j when j>i, and a comparison result of x i and x j when j ⁇ i;
  • the number of elements characterizing x i >x j in the i-th row vector of the matrix is calculated, and the input sequence is interleaved by number, and the first sorted sequence after interleaving is output.
  • comparing, by using the second sorting device, each two elements in the bi-timing sequence, sorting the elements in the bi-timing sequence according to the comparison result, and outputting the second sorting sequence including:
  • the bi-tonal sequence is ⁇ x 0 ??x n-1 ⁇ , and the i-th element x i is selected in order to obtain a comparison result of x i and x j , i, j ⁇ [0, n-1], i ⁇ j ;
  • a matrix is generated, wherein the ith row vector of the matrix includes: a comparison result of x i and x j when j>i, and a comparison result of x i and x j when j ⁇ i;
  • the number of elements characterizing x i >x j in the i-th row vector of the matrix is calculated, and the input sequence is interleaved by number, and the second sorted sequence after interleaving is output.
  • comparing the x i with the x j by using the second sorting device to obtain a comparison result including:
  • Comparing x i with x j by the first sorting device to obtain a comparison result including:
  • Calculating the number of elements characterizing x i >x j in the i-th row vector of the matrix by the first sorting means including:
  • the method further includes:
  • N path metric values of N candidate paths in the continuous elimination list SCL decoding algorithm by the first sorting device the N path metric values forming two sequences of length N/2;
  • the random input sequence is obtained by any of the first sorting devices, including: acquiring a sequence of length N/2 by any first sorting device.
  • the embodiment of the present application provides a computer storage medium for storing a computer program, the computer program comprising a sorting method for performing the method shown in FIG.
  • the embodiment of the present application provides a computer program product comprising instructions that, when run on a computer, cause the computer to perform the sorting method shown in FIG.
  • embodiments of the present application can be provided as a method, system, or computer program product.
  • the present application can take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment in combination of software and hardware.
  • the application may employ one or more computers having computer usable program code embodied therein.
  • the form of a computer program product embodied on a storage medium including but not limited to disk storage, CD-ROM, optical storage, and the like.
  • the computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture comprising the instruction device.
  • the apparatus implements the functions specified in one or more blocks of a flow or a flow and/or block diagram of the flowchart.
  • These computer program instructions can also be loaded onto a computer or other programmable data processing device such that a series of operational steps are performed on a computer or other programmable device to produce computer-implemented processing for execution on a computer or other programmable device.
  • the instructions provide steps for implementing the functions specified in one or more of the flow or in a block or blocks of a flow diagram.

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Abstract

一种排序网络、排序方法及排序装置,涉及运算加速领域。该排序网络包括至少两个第一排序装置、翻转半清洁器Flip-HC和至少一个第二排序装置,第一排序装置和第二排序装置均与翻转半清洁器连接,其中:任一第一排序装置,用于获取随机输入序列,对随机输入序列中的每两个元素进行比较,根据比较结果对随机输入序列中的元素进行排序,输出第一排序序列;翻转半清洁器,用于获取至少两个第一排序装置输出的至少两个第一排序序列,对至少两个第一排序序列进行翻转排序处理,输出双调序列;第二排序装置,用于获取翻转半清洁器输出的双调序列,对双调序列中的每两个元素进行比较,根据比较结果对双调序列中的元素进行排序,输出第二排序序列。

Description

一种排序网络、排序方法及排序装置
本申请要求在2017年05月27日提交中国专利局、申请号为201710393761.1、发明名称为“一种排序网络、排序方法及排序装置”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本申请实施例涉及运算加速技术领域,尤其涉及一种排序网络、排序方法及排序装置。
背景技术
排序问题在计算机的诸多研究领域都具有重要的意义,例如在编译、操作系统、数据库管理系统、路由、置换网络等领域均涉及到和排序有关的问题。
一种常见的排序方法为双调(Bitonic)排序网络。如图1所示,Bitonic排序网络是递归式的结构。一个16输入16输出的Bitonic排序网络包括两个8输入8输出的Bitonic排序网络和一个16输入的合并网络;8输入8输出的Bitonic排序网络又可分为两个4输入4输出的Bitonic排序网络和一个8输入的合并网络。Bitonic排序网络的每一级之间是串行比较的,只有当上一级的比较器完成比较和交换后,下一级的比较器的输入才能确定。Bitonic排序网络每一级比较器都可以对n个输入同时进行排序和交换,每级共有n/2个比较器,而一个n输入的Bitonic排序网络的比较器总级数为
Figure PCTCN2017115459-appb-000001
一种可能的情况下,一个n输入的Bitonic排序网络中总的比较器数量为
Figure PCTCN2017115459-appb-000002
例如,当n=8时,完全比较网络比较器级数为10级,即需要做10级串联的比较才能得到最终的排序结果。
可见,由于传统的Bitonic排序网络每一级之间是串行比较的,只有当上一级的比较器完成比较和交换后,下一级的比较器的输入才能确定,由此带来的计算延迟将导致严重的时延问题。
发明内容
本申请实施例提供一种排序网络、排序方法及排序装置,用以提供一种新的排序网络。
本申请实施例提供的具体技术方案如下:
第一方面,提供一种排序网络,通过将传统排序网络中2输入2输出的比较单元替换为多输入多输出的并行比较的比较单元和排序单元,有效节省了比较器的数目,并且减少了比较器的级数,即缩减了排序延时。
在一个可能的设计中,排序网络包括至少两个第一排序装置、翻转半清洁器Flip-HC和至少一个第二排序装置,所述第一排序装置和所述第二排序装置均与所述翻转半清洁器连接,其中:任一所述第一排序装置,用于获取随机输入序列,对所述随机输入序列中的每两个元素进行比较,根据比较结果对所述随机输入序列中的元素进行排序,输出第一排序序列;所述翻转半清洁器,用于获取至少两个所述第一排序装置输出的至少两个所述第一排序序列,对至少两个所述第一排序序列进行翻转排序处理,输出双调序列;所述第二 排序装置,用于获取所述翻转半清洁器输出的所述双调序列,对所述双调序列中的每两个元素进行比较,根据比较结果对所述双调序列中的元素进行排序,输出第二排序序列。这样,对于第一排序装置和第二排序装置来说,对一个长度为n的输入序列进行比较需要的比较器数目为
Figure PCTCN2017115459-appb-000003
有效减少了比较器的数目,且第一排序装置相较于传统排序网络,缩短计算延时
Figure PCTCN2017115459-appb-000004
第二排序装置相较于传统排序网络,缩短计算延时lg(n)-1。
在一个可能的设计中,所述翻转半清洁器在执行对至少两个所述第一排序序列进行翻转排序处理时,具体用于:选择第一部分中的第一元素与第二部分中的第二元素进行比较,在第二元素与第一元素的比较结果符合设定大小关系时,将所述第二元素与所述第一元素的位置交换;其中,至少两个所述第一排序序列组成排序总序列,所述排序总序列中包括所述第一部分和所述第二部分;记录并输出发生位置交换的元素位置索引。
在一个可能的设计中,所述第二排序装置还用于,获取所述翻转半清洁器输出的发生位置交换的元素位置索引,确定所述双调序列中以所述元素位置索引分割的第一子序列和第二子序列;所述第二排序装置在根据比较结果对所述双调序列中的元素进行排序,输出第二排序序列时,具体用于:将第一子列中的元素与所述第二子序列中的元素进行比较,根据比较结果对所述双调序列中的元素进行排序,输出第二排序序列。这样,可以进一步减少第二排序装置所用的比较器数目。
在一个可能的设计中,所述第一排序装置对所述随机输入序列中的每两个元素进行比较,根据比较结果对所述随机输入序列中的元素进行排序,输出第一排序序列,具体用于:所述随机输入序列为{x0……xn-1},按序选择第i个元素xi,获取xi与xj的比较结果,i、j∈[0,n-1],i≠j;其中,当j>i时,将xi与xj进行比较,获得j>i时xi与xj的比较结果;当j<i时,根据已经获取的针对第j个元素得到的xj与xi的比较结果,获得j<i时xi与xj的比较结果;根据比较结果,生成矩阵,其中,所述矩阵的第i行向量包括:j>i时xi与xj的比较结果,与j<i时xi与xj的比较结果;计算所述矩阵的第i行向量中表征xi>xj的元素的数量,并按照所述数量对所述输入序列进行交织,输出交织后的第一排序序列。
在一个可能的设计中,所述第二排序装置对所述双调序列中的每两个元素进行比较,根据比较结果对所述双调序列中的元素进行排序,输出第二排序序列,具体用于:所述双调序列为{x0……xn-1},按序选择第i个元素xi,获取xi与xj的比较结果,i、j∈[0,n-1],i≠j;其中,当j>i时,将xi与xj进行比较,获得j>i时xi与xj的比较结果;当j<i时,根据已经获取的针对第j个元素得到的xj与xi的比较结果,获得j<i时xi与xj的比较结果;根据比较结果,生成矩阵,其中,所述矩阵的第i行向量包括:j>i时xi与xj的比较结果,与j<i时xi与xj的比较结果;计算所述矩阵的第i行向量中表征xi>xj的元素的数量,并按照所述数量对所述输入序列进行交织,输出交织后的第二排序序列。
在一个可能的设计中,所述第二排序装置将xi与xj进行比较获得比较结果时,具体用于:若xi>xj,则将比较结果记为1;若xi<xj,则将比较结果记为0;所述第二排序装置计算所述矩阵的第i行向量中表征xi>xj的元素的数量时,具体用于:计算所述矩阵的第i行向量的行重。
在一个可能的设计中,所述第一排序装置将xi与xj进行比较获得比较结果时,具体用于:若xi>xj,则将比较结果记为1;若xi<xj,则将比较结果记为0;所述第一排序装置 计算所述矩阵的第i行向量中表征xi>xj的元素的数量时,具体用于:计算所述矩阵的第i行向量的行重。
在一个可能的设计中,所述第一排序装置还用于,在获取随机输入序列之前,获取连续消除列表SCL译码算法中N条备选路径的N个路径度量值,N个路径度量值组成两个长度为N/2的序列;若所述排序网络中包括两个所述第一排序装置,则任一所述第一排序装置获取随机输入序列时,具体用于:获取一个长度为N/2的序列。
第二方面,提供一种排序方法,所述方法应用于排序网络,所述排序网络中包括至少两个第一排序装置、翻转半清洁器Flip-HC和至少一个第二排序装置,所述第一排序装置和所述第二排序装置均与所述翻转半清洁器连接,所述方法具体通过以下方式实现:通过任一所述第一排序装置获取随机输入序列,对所述随机输入序列中的每两个元素进行比较,根据比较结果对所述随机输入序列中的元素进行排序,输出第一排序序列;通过所述翻转半清洁器获取至少两个所述第一排序序列,对至少两个所述第一排序序列进行翻转排序处理,输出双调序列;通过所述第二排序装置获取所述双调序列,对所述双调序列中的每两个元素进行比较,根据比较结果对所述双调序列中的元素进行排序,输出第二排序序列。有效节省了比较器的数目,并且减少了比较器的级数,即缩减了排序延时。
在一个可能的设计中,通过所述翻转半清洁器对至少两个所述第一排序序列进行翻转排序处理,具体为:选择第一部分中的第一元素与第二部分中的第二元素进行比较,在第二元素与第一元素的比较结果符合设定大小关系时,将所述第二元素与所述第一元素的位置交换;其中,至少两个所述第一排序序列组成排序总序列,所述排序总序列中包括所述第一部分和所述第二部分;记录并输出发生位置交换的元素位置索引。
在一个可能的设计中,通过所述第二排序装置获取所述翻转半清洁器输出的发生位置交换的元素位置索引,确定所述双调序列中以所述元素位置索引分割的第一子序列和第二子序列;通过所述第二排序装置根据比较结果对所述双调序列中的元素进行排序,输出第二排序序列,具体为:将第一子列中的元素与所述第二子序列中的元素进行比较,根据比较结果对所述双调序列中的元素进行排序,输出第二排序序列。
在一个可能的设计中,通过所述第一排序装置对所述随机输入序列中的每两个元素进行比较,根据比较结果对所述随机输入序列中的元素进行排序,输出第一排序序列,具体为:所述随机输入序列为{x0……xn-1},按序选择第i个元素xi,获取xi与xj的比较结果,i、j∈[0,n-1],i≠j;其中,当j>i时,将xi与xj进行比较,获得j>i时xi与xj的比较结果;当j<i时,根据已经获取的针对第j个元素得到的xj与xi的比较结果,获得j<i时xi与xj的比较结果;根据比较结果,生成矩阵,其中,所述矩阵的第i行向量包括:j>i时xi与xj的比较结果,与j<i时xi与xj的比较结果;计算所述矩阵的第i行向量中表征xi>xj的元素的数量,并按照所述数量对所述输入序列进行交织,输出交织后的第一排序序列。
在一个可能的设计中,通过所述第二排序装置对所述双调序列中的每两个元素进行比较,根据比较结果对所述双调序列中的元素进行排序,输出第二排序序列,具体地:所述双调序列为{x0……xn-1},按序选择第i个元素xi,获取xi与xj的比较结果,i、j∈[0,n-1],i≠j;其中,当j>i时,将xi与xj进行比较,获得j>i时xi与xj的比较结果;当j<i时,根据已经获取的针对第j个元素得到的xj与xi的比较结果,获得j<i时xi与xj的比较结果;根据比较结果,生成矩阵,其中,所述矩阵的第i行向量包括:j>i时xi与xj的比较结果,与j<i时xi与xj的比较结果;计算所述矩阵的第i行向量中表征xi>xj的元素的数量,并 按照所述数量对所述输入序列进行交织,输出交织后的第二排序序列。
在一个可能的设计中,通过所述第二排序装置将xi与xj进行比较获得比较结果,具体为:若xi>xj,则将比较结果记为1;若xi<xj,则将比较结果记为0;通过所述第二排序装置计算所述矩阵的第i行向量中表征xi>xj的元素的数量,具体为:计算所述矩阵的第i行向量的行重。
在一个可能的设计中,通过所述第一排序装置将xi与xj进行比较获得比较结果,具体为:若xi>xj,则将比较结果记为1;若xi<xj,则将比较结果记为0;通过所述第一排序装置计算所述矩阵的第i行向量中表征xi>xj的元素的数量,具体为:计算所述矩阵的第i行向量的行重。
在一个可能的设计中,在获取随机输入序列之前,通过所述第一排序装置获取连续消除列表SCL译码算法中N条备选路径的N个路径度量值,N个路径度量值组成两个长度为N/2的序列;若所述排序网络中包括两个所述第一排序装置,则通过任一所述第一排序装置获取随机输入序列时,包括:通过任一所述第一排序装置获取一个长度为N/2的序列。
第三方面,提供一种排序装置,所述排序装置为如第一方面和任一种可能的设计中所述的排序网络中的所述第一排序装置,或者,所述排序装置为如第一方面和任一种可能的设计中所述的排序网络中的所述第二排序装置。
第四方面,提供一种排序网络,所述排序网络包括如第一方面和任一种可能的设计中所述的排序网络中的至少两个第一排序装置、翻转半清洁器Flip-HC;或者,所述排序网络包括如第一方面和任一种可能的设计中所述的排序网络中翻转半清洁器Flip-HC和至少一个第二排序装置。
第五方面,提供一种排序方法,排序装置获取长度为n的输入序列,n为正整数;所述排序装置对所述输入序列中的每两个元素进行比较,得到比较结果;所述排序装置根据比较结果对所述输入序列中的元素进行排序,得到输出序列。这样有效节省了比较器的数目,并且减少了比较器的级数,即缩减了排序延时。
在一个可能的设计中,所述排序装置对所述输入序列中的每两个元素进行比较,得到比较结果,具体为:若所述输入序列为{x0……xn-1},则所述排序装置按序选择第i个元素xi,获取xi与xj的比较结果,i、j∈[0,n-1],i≠j;其中,当j>i时,所述排序装置将xi与xj进行比较,获得j>i时xi与xj的比较结果;当j<i时,所述排序装置根据已经获取的针对第j个元素得到的xj与xi的比较结果,获得j<i时xi与xj的比较结果;所述排序装置根据比较结果对所述输入序列中的元素进行排序,得到输出序列,具体为:所述排序装置根据比较结果,生成矩阵,其中,所述矩阵的第i行向量包括:j>i时xi与xj的比较结果,与j<i时xi与xj的比较结果;所述排序装置计算所述矩阵的第i行向量中表征xi>xj的元素的数量,并按照所述数量对所述输入序列进行交织,输出交织后的序列。
在一个可能的设计中,所述将xi与xj进行比较,获得比较结果,具体为:若xi>xj,则比较结果记为1;若xi<xj,则比较结果记为0;所述排序装置计算所述矩阵的第i行向量中表征xi>xj的元素的数量,具体为:所述排序装置计算所述矩阵的第i行向量的行重。
在一个可能的设计中,所述排序装置获取长度为n的输入序列之前,获取连续消除列表SCL译码算法中N条备选路径的N个路径度量值。
可选的,n=N,所述输入序列由所述N个路径度量值的部分或者全部组成。
在一个可能的设计中,所述排序装置获取连续消除列表SCL译码算法中N条备选路 径的N个路径度量值之后,将所述N个路径度量值组成两个长度为N/2的序列,将所述两个长度为N/2的序列分别进行交织,获得两个单调序列;将所述两个单调序列进行合并,并对合并序列进行翻转半清洁处理;所述输入序列由所述翻转半清洁处理后序列的部分或者全部组成。
第六方面,提供一种排序装置,该装置具有实现上述第四方面和第四方面的任一种可能的设计中排序装置行为的功能。所述功能可以通过硬件实现,也可以通过硬件执行相应的软件实现。所述硬件或软件包括一个或多个与上述功能相对应的模块。
第七方面,提供一种排序装置,该装置的结构包括收发器和处理器,其中,所述处理器用于调用一组程序以执行如上述第四方面和第四方面的任一种可能的设计中所述的方法。
第八方面,提供了一种计算机存储介质,用于存储计算机程序,该计算机程序包括用于执行第二方面、第四方面、第二方面的任一可能的实施方式或第四方面的任一可能的实施方式中的方法的指令。
第九方面,本申请实施例提供了一种包含指令的计算机程序产品,当其在计算机上运行时,使得计算机执行上述各方面所述的方法。
附图说明
图1为现有技术中Bitonic排序网络示意图;
图2为本申请实施例中排序网络结构示意图;
图3为本申请实施例中排序方法流程示意图之一;
图4为本申请实施例中排序装置结构示意图之一;
图5为本申请实施例中排序装置结构示意图之二;
图6为本申请实施例中排序装置结构示意图之三;
图7为本申请实施例中排序网络应用示意图之一;
图8为本申请实施例中排序网络应用示意图之二;
图9为本申请实施例中排序方法流程示意图之二。
具体实施方式
下面将结合附图,对本申请实施例进行详细描述。
本申请实施例提供一种排序网络和排序方法,可以应用于编译、操作系统、数据库管理系统、路由、置换网络等领域。例如,可以应用于Polar码译码过程对多条路径的PM值进行排序以选取较优路径,排序网络可以是译码设备中的一部分,用于译码中过程中的排序应用部分。
本申请实施例中,排序网络中包括的排序装置通过对输入序列中的每两个元素进行比较,并按照比较结果对输入序列进行交织,能够一次性地将输入序列中的元素进行排序,即采用一级比较器就可以完成对输入序列的排序。相较于传统的采用比较器级数较多的排序网络,采用本申请实施例提供的排序网络,能够有效减少排序所采用的比较器的级数,也就是缩减了排序所用的时间,在译码领域能够进一步提高译码效率和译码性能。
下面将结合附图对本申请实施例提供排序网络和排序方法作详细介绍。
如图2所示,为本申请实施例提供的排序网络200中包括至少两个第一排序装置201、翻转半清洁器(Flip Half Cleaner,Flip-HC)202和至少一个第二排序装置203,第一排序装置201和第二排序装置203均与翻转半清洁器202连接。例如,第一排序装置201的输出端与翻转半清洁器202的输入端相连,翻转半清洁器202的输出端与第二排序装置203的输入端相连。图2中以排序网络200中包括两个第一排序装置201和一个第二排序装置203为例进行示意。
任一第一排序装置201,用于获取随机输入序列,对随机输入序列中的每两个元素进行比较,根据比较结果对随机输入序列中的元素进行排序,输出第一排序序列;若随机输入序列的长度为n,则第一排序装置201需要比较器的数目为
Figure PCTCN2017115459-appb-000005
翻转半清洁器202,用于获取上述至少两个第一排序装置201输出的至少两个第一排序序列,对至少两个第一排序序列进行翻转排序处理,输出双调序列;
第二排序装置203,用于获取翻转半清洁器202输出的双调序列,对双调序列中的每两个元素进行比较,根据比较结果对双调序列中的元素进行排序,输出第二排序序列。若双调序列的长度为n,则第二排序装置203需要比较器的数目为
Figure PCTCN2017115459-appb-000006
下面具体介绍一些可能的实现方式。
翻转半清洁器202在执行对上述至少两个第一排序序列进行翻转排序处理时,具体用于:
选择第一部分中的第一元素与第二部分中的第二元素进行比较,在第二元素与第一元素的比较结果符合设定大小关系时,将所述第二元素与所述第一元素的位置交换;其中,至少两个所述第一排序序列组成排序总序列,排序总序列中包括所述第一部分和所述第二部分;记录并输出发生位置交换的元素位置索引。例如,长度为n的排序总序列包括上半部分(即第一部分)和下半部分(第二部分),翻转半清洁器202选择上半部分的第一个元素与下半部分的最后一个元素进行比较,若大于,则不交换,在翻转标识序列中记录0;若小于,则交换两个元素位置,并在翻转标识序列中记录1。然后选择上半部分的第二个元素与下半部分的倒数第二个元素进行比较,比较方法一致,直到比较完排序总序列所有元素,最终生成翻转标识序列,翻转标识序列长度为n/2。
第二排序装置203还用于:
获取翻转半清洁器202输出的发生位置交换的元素位置索引,确定双调序列中以元素位置索引分割的第一子序列和第二子序列;
第二排序装置203在根据比较结果对双调序列中的元素进行排序,输出第二排序序列时,具体用于:
将第一子列中的元素与第二子序列中的元素进行比较,根据比较结果对双调序列中的元素进行排序,输出第二排序序列。例如,翻转标识序列为{0 0 0 1 1 1 1 1},则发生位置交换的元素位置索引为0和1交替的位置,第3位和第4位。则双调序列中前3位为第一子序列,从第4位开始之后的元素为第二子序列。
这样,若双调序列的长度为n,则第二排序装置203需要比较器的数目小于
Figure PCTCN2017115459-appb-000007
能够有效减少第二排序装置203使用的比较器的数目。
第一排序装置201对随机输入序列中的每两个元素进行比较,根据比较结果对随机输 入序列中的元素进行排序,输出第一排序序列,具体用于:
随机输入序列为{x0……xn-1},按序选择第i个元素xi,获取xi与xj的比较结果,i、j∈[0,n-1],i≠j;其中,当j>i时,将xi与xj进行比较,获得j>i时xi与xj的比较结果;
当j<i时,根据已经获取的针对第j个元素得到的xj与xi的比较结果,获得j<i时xi与xj的比较结果;
根据比较结果,生成矩阵,其中,矩阵的第i行向量包括:j>i时xi与xj的比较结果,与j<i时xi与xj的比较结果;
计算矩阵的第i行向量中表征xi>xj的元素的数量,并按照数量对输入序列进行交织,输出交织后的第一排序序列。
第二排序装置203对双调序列中的每两个元素进行比较,根据比较结果对双调序列中的元素进行排序,输出第二排序序列,具体用于:
双调序列为{x0……xn-1},按序选择第i个元素xi,获取xi与xj的比较结果,i、j∈[0,n-1],i≠j;其中,当j>i时,将xi与xj进行比较,获得j>i时xi与xj的比较结果;
当j<i时,根据已经获取的针对第j个元素得到的xj与xi的比较结果,获得j<i时xi与xj的比较结果;
根据比较结果,生成矩阵,其中,矩阵的第i行向量包括:j>i时xi与xj的比较结果,与j<i时xi与xj的比较结果;
计算矩阵的第i行向量中表征xi>xj的元素的数量,并按照数量对输入序列进行交织,输出交织后的第二排序序列。
第二排序装置203将xi与xj进行比较获得比较结果时,具体用于:
若xi>xj,则将比较结果记为1;若xi<xj,则将比较结果记为0;
第二排序装置203计算矩阵的第i行向量中表征xi>xj的元素的数量时,具体用于:
计算矩阵的第i行向量的行重。
第一排序装置201将xi与xj进行比较获得比较结果时,具体用于:
若xi>xj,则将比较结果记为1;若xi<xj,则将比较结果记为0;
第一排序装置201计算矩阵的第i行向量中表征xi>xj的元素的数量时,具体用于:
计算矩阵的第i行向量的行重。
第一排序装置201还用于,在获取随机输入序列之前,获取连续消除列表SCL译码算法中N条备选路径的N个路径度量值,N个路径度量值组成两个长度为N/2的序列;
若排序网络中包括两个第一排序装置201,则任一第一排序装置201获取随机输入序列时,具体用于:获取一个长度为N/2的序列。也就是说,N个路径度量值组成的长度为N的序列被两个第一排序装置201接收,其中一个第一排序装置201接收长度为N/2的序列。
基于图2所示的排序网络200,本申请实施例中还提供另一种排序网络,可以包括排序网络200中的至少两个第一排序装置201和Flip-HC202;或者,提供另一种排序网络,可以包括排序网络200中Flip-HC202和至少一个第二排序装置203。
下面详细介绍一下第一排序装置201和第二排序装置203如何通过比较序列中任意两个元素来实现序列的排序。以下叙述中,排序装置可以指代上述第一排序装置201,也可以指代第二排序装置203。第一排序装置201和第二排序装置203的排序方法类似。
如图3所示,第一排序装置201和第二排序装置203所应用的排序方法的具体流程如 下所述。
步骤301、排序装置获取输入序列。
步骤302、排序装置对输入序列中的每两个元素进行比较,得到比较结果。
步骤303、排序装置根据比较结果对输入序列中的元素进行排序,得到输出序列。
可选的,排序装置可以通过如下方式实现上述步骤202和步骤203。
例如,输入序列可以用{x0……xn-1}表示,可以用{x1……xn}表示,两种表示方式只是元素序号的表达方法不一样而已,所采用的排序方法类似,本申请以输入序列用{x0……xn-1}表示为例进行介绍。输入序列中包括n个元素,分别用x0……xn-1表示。排序装置按照顺序依次选取第i个元素xi,i∈[0,n-1],即排序装置遍历输入序列中的每一个元素,依次选取第0个元素x0,第1个元素x1……第n-1个元素xn-1。每选择一个元素xi,获取xi与xj的比较结果,j∈[0,n-1],i≠j,也就是获取xi与{x0……xn-1}中除xi之外元素的的比较结果。比较结果可以是大小关系,例如,比较xi是否大于xj,若大于,则比较结果的值取1,否则取0。具体获取xi与xj的比较结果时,一部分值采用比较器进行比较,一部分值可以采用对已获得结果取反操作得到。其中,当j>i时,利用比较器将xi与xj进行比较,获得j>i时xi与xj的比较结果;当j<i时,根据已经获取的第j个元素xj与xi的比较结果,获得j<i时xi与xj的比较结果,例如将已经获取的第j个元素xj与xi的比较结果进行取反操作,获得j<i时xi与xj的比较结果。举例来说,选择第0个元素x0,i=0,j=1、2、……n-1,每一个j元素均大于i,因此排序装置需要将x0依次与x1、…、xn-1进行比较,获得比较结果;然后选择第1个元素x1,i=1,j=0、2、……n-1,当j=2、……n-1时,j>i,排序装置需要将x1依次与x2、…、xn-1进行比较,获得比较结果,但是j=0时,j<i,x1与x0的比较结果在选择第0个元素x0时已经获取,在此不用比较器再一次进行比较,而根据选择第0个元素x0时x0与x1的比较结果即可得出x1与x0的比较结果。若比较结果采用xi是否大于xj表示,则将选择第0个元素x0时x0与x1的比较结果进行取反操作,即可得出x1与x0的比较结果,x0>x1为真,结果记为1,则x1>x0为假,结果记为0。
排序装置根据比较结果生成一个矩阵,其中,该矩阵的第i个行向量中包括:j>i时xi与xj的比较结果,与j<i时xi与xj的比较结果。在选择一个元素xi,获取xi与xj的比较结果后,将xi与xj的比较结果记录在矩阵的第i行,矩阵中共包括n行,即第0~第n-1行。计算矩阵的第i个行向量中表征xi>xj的元素的数量,并按照该数量对输入序列进行交织,输出交织后的序列。若采用上述1、0来表示比较结果,xi>xj,则比较结果记为1;xi<xj,则比较结果记为0。矩阵中的元素用1、0表示。那么,计算矩阵的第i个行向量中表征xi>xj的元素的数量,即计算矩阵的第i个行向量的行重。若行重为2,则表示第i行中有2个元素1,表示xi在输入序列中有2个元素比xi小,其余均比xi大。
举例来说,假设n=4,输入序列用{x0,x1,x2,x3}表示,则令
d0={x0>x1,x0>x2,x0>x3}
Figure PCTCN2017115459-appb-000008
Figure PCTCN2017115459-appb-000009
Figure PCTCN2017115459-appb-000010
其中,
Figure PCTCN2017115459-appb-000011
表示对x0>x1进行取反操作,d0、d1、d2、d3可以作为矩阵D的行向量,则矩阵D可以表示为:
Figure PCTCN2017115459-appb-000012
可见,矩阵D中非取反得到的元素需要采用比较器进行比较,当n=4时,需要6个比较器,该6个比较器并行计算,在一级比较器中实现。
设W(di)为D中每行的行重,输出序列用P={p0,p1,p2,p3}表示,则根据行重对输入序列进行交织得到输出序列的关系可以表示为:
pi=xj|W(dj)=i(i∈[0,3])。
若上述矩阵的第i个行向量中只包括:j>i时xi与xj的比较结果,与j<i时xi与xj的比较结果,则矩阵为n行(n-1)列矩阵;
排序装置对长度为n的输入序列进行排序,需要比较器的数目不大于
Figure PCTCN2017115459-appb-000013
基于图3所示的第一排序装置201和第二排序装置203所应用的排序方法的同一发明构思,如图4所示,本申请实施例还提供一种排序装置400,用于执行图3所示的排序方法。排序装置400可以是第一排序装置201,执行第一排序装置201所执行的方法,排序装置400也可以是第二排序装置203,执行第二排序装置203所执行的方法。排序装置400包括:
输入单元401,用于获取长度为n的输入序列。
处理单元402,用于对输入序列中的每两个元素进行比较,得到比较结果。
处理单元402,还用于根据比较结果对输入序列中的元素进行排序,得到输出序列。
输出单元403,用于输出得到的输出序列。
处理单元402用于:
若输入序列为{x0……xn-1},则按序选择第i个元素xi,获取xi与xj的比较结果,i、j∈[0,n-1],i≠j;其中,当j>i时,将xi与xj进行比较,获得j>i时xi与xj的比较结果;
当j<i时,根据已经获取的针对第j个元素得到的xj与xi的比较结果,获得j<i时xi与xj的比较结果;
根据比较结果,生成矩阵,其中,矩阵的第i行向量包括:j>i时xi与xj的比较结果,与j<i时xi与xj的比较结果;
计算矩阵的第i行向量中表征xi>xj的元素的数量,并按照数量对输入序列进行交织,输出交织后的序列。
可选的,处理单元402用于:
若xi>xj,则将比较结果记为1;若xi<xj,则将比较结果记为0;以及
计算矩阵的第i行向量的行重。
可选的,矩阵为n行(n-1)列矩阵;或者,矩阵为n行n列矩阵,其中,n行n列矩阵的第i行向量中还包括第i个列元素,第i个列元素设置为1。
可选的,排序装置400可以是第一排序装置201时,处理单元402还用于:获取连续消除列表SCL译码算法中N条备选路径的N个路径度量值。
可选的,输入序列由N个路径度量值的部分或者全部组成。
可选的,处理单元402还用于:在获取连续消除列表SCL译码算法中N条备选路径 的N个路径度量值之后,将N个路径度量值组成两个长度为N/2的序列,将两个长度为N/2的序列分别进行交织,获得两个单调序列;将两个单调序列进行合并,并对合并序列进行翻转半清洁处理;输入序列由翻转半清洁处理后序列的部分或者全部组成。
上述描述中,若排序装置400可以是第一排序装置201,则输入序列为上述随机输入序列,输出序列为上述第一排序序列;若排序装置400可以是第二排序装置203,则输入序列为上述双调序列,输出序列为第二排序序列。
基于与图3所示的排序方法的同一发明构思,如图5所示,本申请实施例还提供一种排序装置500,该装置500可用于执行图3所示的排序方法。排序装置500可以是第一排序装置201,执行第一排序装置201所执行的方法,排序装置500也可以是第二排序装置203,执行第二排序装置203所执行的方法。其中,排序装置500包括收发器501、处理器502,处理器502用于执行一组代码,当代码被执行时,该执行使得处理器502执行图2所示的排序方法。
处理器502可以是中央处理器(central processing unit,CPU),网络处理器(network processor,NP)或者CPU和NP的组合。
处理器502还可以进一步包括硬件芯片。上述硬件芯片可以是专用集成电路(application-specific integrated circuit,ASIC),可编程逻辑器件(programmable logic device,PLD)或其组合。上述PLD可以是复杂可编程逻辑器件(complex programmable logic device,CPLD),现场可编程逻辑门阵列(field-programmable gate array,FPGA),通用阵列逻辑(generic array logic,GAL)或其任意组合。
可选的,排序装置500还可以包括存储器503,用于存储处理器502执行的代码,存储器503可以包括易失性存储器(volatile memory),例如随机存取存储器(random-accessmemory,RAM);存储器503也可以包括非易失性存储器(non-volatile memory),例如快闪存储器(flash memory),硬盘(hard disk drive,HDD)或固态硬盘(solid-state drive,SSD);存储器503还可以包括上述种类的存储器的组合。
存储器503也可以和处理器502集成在一起。处理单元402可以由处理器502实现,输入单元401和输出单元403可以由收发器501实现。
可选的,排序装置500可以是芯片或者集成电路。
若如图3所述,将输入序列中第i个元素与其余元素的比较结果生成矩阵中第i个行向量,如图6所示,排序装置500为集成电路,则排序装置500由第一电路601、第二电路602和第三电路603集成。其中,第一电路601中包括比较器6011和反相器6012,针对输入序列{x0……xn-1},比较器6011用于当j>i时将xi与xj进行比较,反相器6012用于当j<i时将已经获取的第j个元素xj与xi的比较结果进行取反操作,第一电路601生成矩阵[d0,……,dn-1],其中d0,……,dn-1为矩阵中的行向量,第一电路601输出矩阵中行向量给第二电路602,第二电路602用于计算每行的行重,输出每行的行重{W(do)……W(dn-1)},具体对每行向量中元素1的个数进行累加,获得每行行重,累加次数与输入序列的长度n有关,累加的结果位宽为log(n)。第三电路603以第二电路602输出的行重{W(do)……W(dn-1)}作为控制信号,对输入序列的元素进行交织,可以称为交织电路,得到输出序列{po……Pn-1}。
下面结合具体的应用场景对本申请实施例提供的排序方法作进一步详细说明。以Polar码译码的应用场景为例。
Polar码的有效译码算法是SC算法,即对下一比特的估计值可以根据接收信号和已有的比特估计序列通过计算下一比特为0或为1的信道的转移概率进行逐个判决。SC算法的性能较差,在此基础上,有列表(LIST)方法,即保存多个度量值较优的比特序列路径,下一比特译码的优选路径从多个路径上基础进行分裂并排序选取较优路径的方法,称为SCL算法。可知,SC算法是SCL算法在LIST=1时的特殊情况。若LIST=L,L为2的幂,每个bit的译码需要在N条备选路径中选择L条PM最优的路径,N=2M*L。SCL算法中,排序模块需对L条路径的所有分裂情形的路径度量(Path Metric,PM)值进行排序,只有经过优选的路径才能作为下一比特译码时的路径;且对每个比特译码都需要对路径进行排序。故排序模块是SCL算法的关键路径,其计算延迟限制了Polar码SCL译码器的吞吐率的提升。
排序模块常采用图1所示的Bitonic排序网络,本申请实施例中,通过上述图2所示的排序方法对图1所示的Bitonic排序网络进行优化。当然图1所示的Bitonic排序网络为16输入16输出,输入输出的数量只是一种举例,并不作为本申请实施例排序方法应用的限制。
如图1所示,长度为16的输入序列可以分成两个长度为8的输入子序列,对两个长度为8的输入子序列进行类似的排序操作,前一部分可以看做两个8输入8输出的排序网络。经过两个8输入8输出的排序网络后,输出长度为16的双调序列。长度为16的双调序列经过翻转半清洁器(Flip Half Cleaner,Flip HC)进行翻转,将较大的值在上半部分输出,上半部分输出长度为8的双调序列,较小的值在下半部分输出,下半部分输出长度为8的双调序列,共输出长度为16的翻转序列。长度为16的翻转序列经过两个Bitonic排序器进行排序,若LIST数量为8,则共有16种分支可能,且最后只需要前8个结果,因此图1中虚线框出的下半部分8输入Bitonic排序器可以略去,这种排序网络称为部分排序网络。Flip-HC上半部分输出长度为8的双调序列经过双调排序器后,可以按照排序顺序输出。传统排序网络的每一级之间是串行比较的,长度为16的输入序列完全比较所采用的比较器级数为10级。
本申请实施例中,如图7所示,可以采用图2所示的排序网络200,对长度为16的输入序列进行处理,最终输出长度为8的排序序列。长度为16的输入序列可以分成两个长度为8的输入子序列,采用两个第一排序装置对两个长度为8的输入子序列进行类似的排序操作,经过两个8输入8输出的第一排序装置后,输出两个第一排序序列,两个第一排序序列组成的长度为16的双调序列。长度为16的双调序列经过Flip-HC进行翻转,将较大的值在上半部分输出,上半部分输出长度为8的双调序列,较小的值在下半部分输出,下半部分输出长度为8的双调序列,共输出长度为16的翻转序列。若只需要前8个结果,则下半部分输出长度为8的双调序列省略,下半部分采用的第二排序装置在图7中用虚线表示可以省略。第二排序装置对上半部分输出的长度为8的双调序列进行排序,输出第二排序序列。可见,本申请实施例排序网络中排序装置采用并行比较,长度为16的输入序列完全比较所采用的比较器级数为3级,较传统排序网络可以节省7级,延时降低70%,有效缩减了传输时延。
另一种可能的实现方式中,如图8所示,排序网络中可以采用两个4输入4输出第二排序装置。同样,若只需要前8个结果,则对下半部分双调序列的排序省略,可见,本申请实施例排序网络中排序装置采用并行比较,长度为16的输入序列完全比较所采用的比较器级数为4级,较传统排序网络可以节省6级,延时降低60%,有效缩减了传输时延。
通过第一排序装置和第二排序装置可以有效减少排序所用的比较器数目,并可以缩减排序所用的时延。假设第一排序装置的输入序列和第二排序装置的输入序列长度均为n,分别与传统的排序网络相比,在比较器数目和缩减延时的情况如表1和表2所示。
表1
Figure PCTCN2017115459-appb-000014
表2
Figure PCTCN2017115459-appb-000015
进一步地,第二排序装置的输入是Flip-HC的一半输出。n输入的Flip-HC总可以输出两个长度为n/2的序列:一个为清洁序列,只含有0或1;另一个为双调序列,含有0和1。可以利用Flip-HC的输出的有序性简化第二排序装置中等价单元的比较。
假设排序网络的比较器始终将较大的值在上方输出,将较小的值在下方输出。在实际比较过程中,无法直接通过Flip-HC的原始输出判断第二排序装置的输入是清洁序列还是双调序列。假设Flip-HC的两个8输入用[1,2,…8]和[9,10,…,16]表示,是两个已排序的序列,即Flip-HC的16输入本身是一个双调序列。则Flip-HC的第一个输出是1和16之间的较大者,第二个输出是2和15之间的较大者。若[1,2,…8]全部元素都比[9,10,…,16]中的对应元素大,那么Flip-HC的输出为[1,2,…8,9,10,…,16];若[1,2,…8]中有元素比[9,10,…,16]中的对应小,则Flip-HC的那一个比较器需要对两个输入进行交换。由于[1,2,…8]和[9,10,…,16]都是排序序列,当有一对输入需要交换时,说明其后的所有输入对都需要交换,否则输出序列就不是两个长度为8的双调序列,需要注意的是,单调序列是双调序列的特殊情形。
举例说明,假设Flip-HC的两个8输入序列为[50 50 48 41 37 16 9 5]和[80 76 71 58 44 258 3],依次进行比较后,第一个需要输出的是50与3之间的较大者50,由于未交换位置,在翻转标识序列f中记录0;第二个需要输出的是50与8之间的较大者50,在翻转标识序列f中记录0,以此类推。可见,第四个需要输出的是41与44之间的较大者44,将两个元素交换位置,在翻转标识序列f中记录1。最终生成的翻转标识序列f=[0 0 0 1 1 1 1 1],将翻转标识序列和最终生成的两个双调序列输出。最终生成的上半部分输出的双调序列为[50 50 48 44 58 71 76 80],为谷型的双调序列;下半部分输出的双调序列为[3 8 25 41 37 169 5],为峰型的双调序列。
由于f序列在第3和第4之间存在台阶,对应的上半部分输出的双调序列的趋势变化也在第3和第4之间,最小值是第3个元素或第4个元素;对应的下半部分输出的双调序列的趋势变化也在第3和第4之间,最大值是第3个元素或第4个元素。因此,可以利用f序列的台阶位置确定双调序列的最小值或最大值的位置。
对于长度为8的双调序列[a1a2a3a4a5a6a7a8],若已知f序列台阶在ai和ai+1之间,则:
当i=1时,第二排序装置需要对[a1]中的元素和[a2a3a4a5a6a7a8]中的元素的比较,需7个比较器;
i=2时,第二排序装置需要对[a1a2]中的元素和[a3a4a5a6a7a8]中的元素的比较,需12个比较器;
i=3时,第二排序装置需要对[a1a2a3]中的元素和[a4a5a6a7a8]中的元素的比较,需15个比较器;
i=4时,第二排序装置需要对[a1a2a3a4]中的元素和[a5a6a7a8]中的元素的比较,需16个比较器;
i=5时,第二排序装置需要对[a1a2a3a4a5]中的元素和[a6a7a8]中的元素的比较,需15个比较器;
i=6时,第二排序装置需要对[a1a2a3a4a5a6]中的元素和[a7a8]中的元素的比较,需12个比较器;
i=7时,第二排序装置需要对[a1a2a3a4a5a6a7]中的元素和[a8]中的元素的比较,需7个比较器同理;
完成上述比较后,根据比较的结果进行相应的交换即可。
可见,基于上述的方案,Flip-HC输出增加f序列的值,即可在第二排序装置中可以节省比较器数量,由于i的值是互斥的,优化后的第二排序装置只需要16个比较器即可完成所有情形下的比较,相比第一排序装置的方式还可以节省12个比较器。
基于如图2所示排序网络同一发明构思,相对应的如图9所示,本申请实施例还提供一种排序方法,具体如下所述。
步骤901、通过任一第一排序装置获取随机输入序列,对随机输入序列中的每两个元素进行比较,根据比较结果对随机输入序列中的元素进行排序,输出第一排序序列;
步骤902、通过翻转半清洁器获取至少两个第一排序序列,对至少两个第一排序序列进行翻转排序处理,输出双调序列;
步骤903、通过第二排序装置获取双调序列,对双调序列中的每两个元素进行比较,根据比较结果对双调序列中的元素进行排序,输出第二排序序列。
可选的,通过翻转半清洁器对至少两个第一排序序列进行翻转排序处理,包括:
选择第一部分中的第一元素与第二部分中的第二元素进行比较,在第二元素与第一元素的比较结果符合设定大小关系时,将第二元素与第一元素的位置交换;其中,至少两个第一排序序列组成排序总序列,排序总序列中包括第一部分和第二部分;
记录并输出发生位置交换的元素位置索引。
可选的,该方法还包括:
通过第二排序装置获取翻转半清洁器输出的发生位置交换的元素位置索引,确定双调序列中以元素位置索引分割的第一子序列和第二子序列;
通过第二排序装置根据比较结果对双调序列中的元素进行排序,输出第二排序序列,包括:
将第一子列中的元素与第二子序列中的元素进行比较,根据比较结果对双调序列中的元素进行排序,输出第二排序序列。
可选的,通过第一排序装置对随机输入序列中的每两个元素进行比较,根据比较结果对随机输入序列中的元素进行排序,输出第一排序序列,包括:
随机输入序列为{x0……xn-1},按序选择第i个元素xi,获取xi与xj的比较结果,i、j∈[0,n-1],i≠j;
其中,当j>i时,将xi与xj进行比较,获得j>i时xi与xj的比较结果;
当j<i时,根据已经获取的针对第j个元素得到的xj与xi的比较结果,获得j<i时xi与xj的比较结果;
根据比较结果,生成矩阵,其中,矩阵的第i行向量包括:j>i时xi与xj的比较结果,与j<i时xi与xj的比较结果;
计算矩阵的第i行向量中表征xi>xj的元素的数量,并按照数量对输入序列进行交织,输出交织后的第一排序序列。
可选的,通过第二排序装置对双调序列中的每两个元素进行比较,根据比较结果对双调序列中的元素进行排序,输出第二排序序列,包括:
双调序列为{x0……xn-1},按序选择第i个元素xi,获取xi与xj的比较结果,i、j∈[0,n-1],i≠j;
其中,当j>i时,将xi与xj进行比较,获得j>i时xi与xj的比较结果;
当j<i时,根据已经获取的针对第j个元素得到的xj与xi的比较结果,获得j<i时xi与xj的比较结果;
根据比较结果,生成矩阵,其中,矩阵的第i行向量包括:j>i时xi与xj的比较结果,与j<i时xi与xj的比较结果;
计算矩阵的第i行向量中表征xi>xj的元素的数量,并按照数量对输入序列进行交织,输出交织后的第二排序序列。
可选的,通过第二排序装置将xi与xj进行比较获得比较结果,包括:
若xi>xj,则将比较结果记为1;若xi<xj,则将比较结果记为0;
通过第二排序装置计算矩阵的第i行向量中表征xi>xj的元素的数量,包括:
计算矩阵的第i行向量的行重。
通过第一排序装置将xi与xj进行比较获得比较结果,包括:
若xi>xj,则将比较结果记为1;若xi<xj,则将比较结果记为0;
通过第一排序装置计算矩阵的第i行向量中表征xi>xj的元素的数量,包括:
计算矩阵的第i行向量的行重。
可选的,方法还包括:
在获取随机输入序列之前,通过第一排序装置获取连续消除列表SCL译码算法中N条备选路径的N个路径度量值,N个路径度量值组成两个长度为N/2的序列;
若排序网络中包括两个第一排序装置,则通过任一第一排序装置获取随机输入序列时,包括:通过任一第一排序装置获取一个长度为N/2的序列。
本申请实施例提供了一种计算机存储介质,用于存储计算机程序,该计算机程序包括用于执行图9所示的排序方法。
本申请实施例提供了一种包含指令的计算机程序产品,当其在计算机上运行时,使得计算机执行图9所示的排序方法。
本领域内的技术人员应明白,本申请的实施例可提供为方法、系统、或计算机程序产品。因此,本申请可采用完全硬件实施例、完全软件实施例、或结合软件和硬件方面的实施例的形式。而且,本申请可采用在一个或多个其中包含有计算机可用程序代码的计算机 可用存储介质(包括但不限于磁盘存储器、CD-ROM、光学存储器等)上实施的计算机程序产品的形式。
本申请是参照根据本申请实施例的方法、设备(系统)、和计算机程序产品的流程图和/或方框图来描述的。应理解可由计算机程序指令实现流程图和/或方框图中的每一流程和/或方框、以及流程图和/或方框图中的流程和/或方框的结合。可提供这些计算机程序指令到通用计算机、专用计算机、嵌入式处理机或其他可编程数据处理设备的处理器以产生一个机器,使得通过计算机或其他可编程数据处理设备的处理器执行的指令产生用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的装置。
这些计算机程序指令也可存储在能引导计算机或其他可编程数据处理设备以特定方式工作的计算机可读存储器中,使得存储在该计算机可读存储器中的指令产生包括指令装置的制造品,该指令装置实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能。
这些计算机程序指令也可装载到计算机或其他可编程数据处理设备上,使得在计算机或其他可编程设备上执行一系列操作步骤以产生计算机实现的处理,从而在计算机或其他可编程设备上执行的指令提供用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的步骤。
尽管已描述了本申请的优选实施例,但本领域内的技术人员一旦得知了基本创造性概念,则可对这些实施例作出另外的变更和修改。所以,所附权利要求意欲解释为包括优选实施例以及落入本申请范围的所有变更和修改。
显然,本领域的技术人员可以对本申请实施例进行各种改动和变型而不脱离本申请实施例的精神和范围。这样,倘若本申请实施例的这些修改和变型属于本申请权利要求及其等同技术的范围之内,则本申请也意图包含这些改动和变型在内。

Claims (14)

  1. 一种排序网络,其特征在于,包括至少两个第一排序装置、翻转半清洁器Flip-HC和至少一个第二排序装置,所述第一排序装置和所述第二排序装置均与所述翻转半清洁器连接,其中:
    任一所述第一排序装置,用于获取随机输入序列,对所述随机输入序列中的每两个元素进行比较,根据比较结果对所述随机输入序列中的元素进行排序,输出第一排序序列;
    所述翻转半清洁器,用于获取至少两个所述第一排序装置输出的至少两个所述第一排序序列,对至少两个所述第一排序序列进行翻转排序处理,输出双调序列;
    所述第二排序装置,用于获取所述翻转半清洁器输出的所述双调序列,对所述双调序列中的每两个元素进行比较,根据比较结果对所述双调序列中的元素进行排序,输出第二排序序列。
  2. 如权利要求1所述的排序网络,其特征在于,所述翻转半清洁器在执行对至少两个所述第一排序序列进行翻转排序处理时,具体用于:
    选择第一部分中的第一元素与第二部分中的第二元素进行比较,在第二元素与第一元素的比较结果符合设定大小关系时,将所述第二元素与所述第一元素的位置交换;其中,至少两个所述第一排序序列组成排序总序列,所述排序总序列中包括所述第一部分和所述第二部分;
    记录并输出发生位置交换的元素位置索引。
  3. 如权利要求2所述的排序网络,其特征在于,所述第二排序装置还用于,获取所述翻转半清洁器输出的发生位置交换的元素位置索引,确定所述双调序列中以所述元素位置索引分割的第一子序列和第二子序列;
    所述第二排序装置在根据比较结果对所述双调序列中的元素进行排序,输出第二排序序列时,具体用于:
    将第一子列中的元素与所述第二子序列中的元素进行比较,根据比较结果对所述双调序列中的元素进行排序,输出第二排序序列。
  4. 如权利要求1~3任一项所述的排序网络,其特征在于,所述第二排序装置对所述双调序列中的每两个元素进行比较,根据比较结果对所述双调序列中的元素进行排序,输出第二排序序列,具体用于:
    所述双调序列为{x0……xn-1},按序选择第i个元素xi,获取xi与xj的比较结果,i、j∈[0,n-1],i≠j;
    其中,当j>i时,将xi与xj进行比较,获得j>i时xi与xj的比较结果;
    当j<i时,根据已经获取的针对第j个元素得到的xj与xi的比较结果,获得j<i时xi与xj的比较结果;
    根据比较结果,生成矩阵,其中,所述矩阵的第i行向量包括:j>i时xi与xj的比较结果,与j<i时xi与xj的比较结果;
    计算所述矩阵的第i行向量中表征xi>xj的元素的数量,并按照所述数量对所述输入序列进行交织,输出交织后的第二排序序列。
  5. 如权利要求4所述的排序网络,其特征在于,所述第二排序装置将xi与xj进行比较获得比较结果时,具体用于:
    若xi>xj,则将比较结果记为1;若xi<xj,则将比较结果记为0;
    所述第二排序装置计算所述矩阵的第i行向量中表征xi>xj的元素的数量时,具体用于:
    计算所述矩阵的第i行向量的行重。
  6. 如权利要求1~5所述的排序网络,其特征在于,所述第一排序装置还用于,在获取随机输入序列之前,获取连续消除列表SCL译码算法中N条备选路径的N个路径度量值,N个路径度量值组成两个长度为N/2的序列;
    若所述排序网络中包括两个所述第一排序装置,则任一所述第一排序装置获取随机输入序列时,具体用于:
    获取一个长度为N/2的序列。
  7. 一种排序方法,其特征在于,所述方法应用于排序网络,所述排序网络中包括至少两个第一排序装置、翻转半清洁器Flip-HC和至少一个第二排序装置,所述第一排序装置和所述第二排序装置均与所述翻转半清洁器连接,所述方法包括:
    通过任一所述第一排序装置获取随机输入序列,对所述随机输入序列中的每两个元素进行比较,根据比较结果对所述随机输入序列中的元素进行排序,输出第一排序序列;
    通过所述翻转半清洁器获取至少两个所述第一排序序列,对至少两个所述第一排序序列进行翻转排序处理,输出双调序列;
    通过所述第二排序装置获取所述双调序列,对所述双调序列中的每两个元素进行比较,根据比较结果对所述双调序列中的元素进行排序,输出第二排序序列。
  8. 如权利要求7所述的方法,其特征在于,通过所述翻转半清洁器对至少两个所述第一排序序列进行翻转排序处理,包括:
    选择第一部分中的第一元素与第二部分中的第二元素进行比较,在第二元素与第一元素的比较结果符合设定大小关系时,将所述第二元素与所述第一元素的位置交换;其中,至少两个所述第一排序序列组成排序总序列,所述排序总序列中包括所述第一部分和所述第二部分;
    记录并输出发生位置交换的元素位置索引。
  9. 如权利要求8所述的方法,其特征在于,所述方法还包括:
    通过所述第二排序装置获取所述翻转半清洁器输出的发生位置交换的元素位置索引,确定所述双调序列中以所述元素位置索引分割的第一子序列和第二子序列;
    通过所述第二排序装置根据比较结果对所述双调序列中的元素进行排序,输出第二排序序列,包括:
    将第一子列中的元素与所述第二子序列中的元素进行比较,根据比较结果对所述双调序列中的元素进行排序,输出第二排序序列。
  10. 如权利要求7~9任一项所述的方法,其特征在于,通过所述第二排序装置对所述双调序列中的每两个元素进行比较,根据比较结果对所述双调序列中的元素进行排序,输出第二排序序列,包括:
    所述双调序列为{x0……xn-1},按序选择第i个元素xi,获取xi与xj的比较结果,i、j∈[0,n-1],i≠j;
    其中,当j>i时,将xi与xj进行比较,获得j>i时xi与xj的比较结果;
    当j<i时,根据已经获取的针对第j个元素得到的xj与xi的比较结果,获得j<i时xi 与xj的比较结果;
    根据比较结果,生成矩阵,其中,所述矩阵的第i行向量包括:j>i时xi与xj的比较结果,与j<i时xi与xj的比较结果;
    计算所述矩阵的第i行向量中表征xi>xj的元素的数量,并按照所述数量对所述输入序列进行交织,输出交织后的第二排序序列。
  11. 如权利要求10所述的方法,其特征在于,通过所述第二排序装置将xi与xj进行比较获得比较结果,包括:
    若xi>xj,则将比较结果记为1;若xi<xj,则将比较结果记为0;
    通过所述第二排序装置计算所述矩阵的第i行向量中表征xi>xj的元素的数量,包括:
    计算所述矩阵的第i行向量的行重。
  12. 如权利要求7~11所述的方法,其特征在于,所述方法还包括:
    在获取随机输入序列之前,通过所述第一排序装置获取连续消除列表SCL译码算法中N条备选路径的N个路径度量值,N个路径度量值组成两个长度为N/2的序列;
    若所述排序网络中包括两个所述第一排序装置,则通过任一所述第一排序装置获取随机输入序列时,包括:通过任一所述第一排序装置获取一个长度为N/2的序列。
  13. 一种排序装置,其特征在于,所述排序装置为如权利要求1~6任一项所述的排序网络中的所述第一排序装置,或者,所述排序装置为如权利要求1~6任一项所述的排序网络中的所述第二排序装置。
  14. 一种排序网络,其特征在于,所述排序网络包括如权利要求1~6任一项所述的排序网络中的至少两个第一排序装置、翻转半清洁器Flip-HC;或者,所述排序网络包括如权利要求1~6任一项所述的排序网络中翻转半清洁器Flip-HC和至少一个第二排序装置。
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