WO2018215647A1 - Efficient wideband phased antenna array using true time delays and interpolation - Google Patents

Efficient wideband phased antenna array using true time delays and interpolation Download PDF

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Publication number
WO2018215647A1
WO2018215647A1 PCT/EP2018/063793 EP2018063793W WO2018215647A1 WO 2018215647 A1 WO2018215647 A1 WO 2018215647A1 EP 2018063793 W EP2018063793 W EP 2018063793W WO 2018215647 A1 WO2018215647 A1 WO 2018215647A1
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time delays
true time
array
variable
weighting
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PCT/EP2018/063793
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French (fr)
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Peter G. M. Baltus
Marion Kornelia KAMMERER
Antonius Marcellus Jozef Koonen
Bindi WANG
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Technische Universiteit Eindhoven
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Publication of WO2018215647A1 publication Critical patent/WO2018215647A1/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B7/00Radio transmission systems, i.e. using radiation field
    • H04B7/02Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
    • H04B7/04Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
    • H04B7/08Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station
    • H04B7/0837Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station using pre-detection combining
    • H04B7/0842Weighted combining
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q3/00Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system
    • H01Q3/26Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the relative phase or relative amplitude of energisation between two or more active radiating elements; varying the distribution of energy across a radiating aperture
    • H01Q3/2682Time delay steered arrays

Definitions

  • the present invention relates generally to wireless communications methods and devices. More specifically, it relates to wideband phased antenna array communication techniques and devices.
  • the invention provides a wireless front-end comprising a phased antenna array, a weighting factor computation circuit, and hybrid time delays including a set of variable true time delays and a set of phase-shifting interpolators that interpolate between the true time delays using weighting factors computed by the weighting factor computation circuit, where the weighting factor computation circuit uses non-orthogonal base vectors to compute the weighting factors.
  • the phase-shifting interpolators may be implemented using signal splitters, variable weighting multipliers, and signal combiners.
  • the weighting multipliers may be implemented using variable gain amplifiers, variable attenuators, or switched resistor networks.
  • the number of variable true time delays is preferably less than half the number of antenna elements in the phased antenna array. In the case where the phased antenna array is a linear array, the number of variable true time delays may be just one. In the case where the phased antenna array is a 2- dimensional array, the number of variable true time delays may be just two, but preferably three.
  • the wireless front-end can be used for receivers, transmitters or transceivers in RF, mm-wave, sub-mm-wave, and THz frequency bands.
  • Applications include wireless data communications, imaging, automotive-radar, and wireless power transfer.
  • FIG. 1 is a schematic diagram of a traditional wideband phased array front-end architecture which applies a true time delay to each antenna element.
  • FIG. 2 is the antenna beam pattern resulting from the circuit shown in FIG. 1.
  • FIGS. 3A-B are vector diagrams illustrating the interpolation of intermediate vectors between non-orthogonal vectors, according to an embodiment of the invention.
  • FIG. 3C is a schematic illustration of the interpolation technique applied to four antennas of a linear array, showing one phase shifting unit with an interpolation factor of four, according to an embodiment of the invention.
  • FIG. 4A is a block diagram for a receiver front-end architecture implementing a hybrid time delay for a four-element antenna array, according to an embodiment of the invention.
  • FIG. 4B is a block diagram for a receiver front-end architecture implementing a hybrid time delay for a nine-element antenna array, according to an embodiment of the invention.
  • FIGS. 5A-B are polar diagrams of array factor when VGA has a finite gain, according to an embodiment of the invention.
  • FIG. 6A is a graph of the array factor for a hybrid interpolation-based architecture according to an embodiment of the invention.
  • FIG. 6B is a graph of the array factor for a conventional true time delay architecture.
  • FIG. 7 is a graph of the relationship of the critical angle of incidence for which there was a first dip in the array pattern and the interpolation factor, according to an embodiment of the invention.
  • a phased antenna array system uses an array of small antenna elements that together can emulate a large antenna with the capability to form and shape a narrow radio beam. By changing the properties of the signals of each of the small constituent antenna elements, the direction and shape of the beam can be altered electronically. This is important in many applications where it would be costly, slow, cumbersome or otherwise impractical to adjust the beam direction of an antenna by mechanically adjusting the orientation of that antenna and/or to adjust the beam's shape by adjusting the mechanical outline of the antenna.
  • Phased arrays that transmit or receive radio signals with a large bandwidth need to adjust the delay of the signal of each antenna element individually in order to steer the beam in the right direction.
  • implementing delays with sufficient precision requires large and expensive electronic components. This is especially true when these delays need to be accommodated in an integrated circuit (IC).
  • a traditional wideband phased array applies a delay to each antenna element, as shown in the diagram.
  • the antenna array 100 has four antenna elements connected to four corresponding amplifiers 102, 104, 106, 108.
  • this traditional phased array front end uses four corresponding variable true time delay elements for beam steering.
  • the antenna signals from the antenna elements 100 enter the receiver through the four amplifiers 102, 104, 106, 108. Each of these signals is then processed through a corresponding variable true time delay 110, 112, 114, 116 and summed by summation element 118 to provide the required output signal.
  • the variable true time delays 110, 112, 114, 116 are traditionally expensive to implement. Blocks 122, 124 produce the proper delays to the intermediate variable delay elements 112, 114, based on the delays 126, 128 provided to the first and last variable delay elements 110, 116.
  • the resulting antenna beam pattern is shown in FIG. 2.
  • hybrid time delays are used.
  • the number of true time delays is less than half the number of antenna elements, or more preferably less than twice the dimensions of the array.
  • the ratio between the number of antenna elements and the number of true time delays is called the interpolation factor.
  • a higher interpolation factor reduces the cost, size and power dissipation of the beamformer at the cost of the critical angle of incidence (for more details, see the text below describing FIG. 6 and FIG. 7).
  • the minimum interpolation factor is 2, resulting in a number of true time delays approximately equal to half the number of antenna elements.
  • the maximum interpolation factor is equal to the number of antenna elements divided by the number of dimensions of the antenna array. For example, for a 2-dimensional array of n x by % antenna elements, the maximum interpolation factor is n x * % / 2. This is achieved by allocating a single true time delay to each of the dimensions of the antenna array. In practice, it is often preferable to have the number of true time delays equal to 2 D -l, where D is the dimension of the array.
  • the interpolators may be inexpensively implemented using variable gain amplifiers, variable attenuators, or switched resistor networks. Using this architecture, some delays are closely approximated by interpolating between true time delays, one larger and one smaller than the desired delay. This interpolation is performed by interpolators that produce phase shifts from arbitrary non-orthogonal phases.
  • a linear (1 -dimensional) array could use true time delays for only the first and last small antennas, and derive the delays for intermediate antennas by interpolating with the appropriate weighting factors between the delays for the first and last antennas. This significantly reduces the number of costly true time delay electronics.
  • 2-dimensional arrays may be implemented using just four true time delays, and interpolating all intermediate delays. Since the absolute delay of the signal is usually not relevant, we can arbitrarily define one delay to be zero, requiring only a single delay for a linear array and three true time delays for a 2-dimensional array.
  • FIG. 3C is a schematic illustration of this principle for a linear array, showing one phase shifting unit with an interpolation factor of four.
  • Four signals 300, 302, 304, 306 from four respective antennas are multiplied by four respective weighting factors WIA, WIA, W A, then the results added phase shifted by ⁇ which represents the phase of one of the non-orthogonal base vectors, A, discussed below in relation to FIG. 3A.
  • the required number of true time delays can be reduced by interpolation, sharing a small number of true time delay circuits between many antenna elements rather than providing each antenna element with its own delay.
  • FIG. 3B illustrates the interpolation of vectors 308, 310, 312 between non-orthogonal vectors 314 and 316.
  • This interpolation technique is also demonstrated by the constellation diagram for FIG. 3A showing the phases of two non-orthogonal signals A and B with arbitrary phase difference ⁇ , as well as the interpolated signal C with phase difference Oc.
  • each sub-unit has (N-l)/f antenna elements.
  • Each sub-unit has a true time delay in the signal path of the first antenna element of the sub-unit. This true time delay corresponds to the vector A in the equations above.
  • the delay of the first antenna element of the next sub-unit corresponds to vector B in the equations above.
  • a and b are typically different for each antenna element in a sub- unit. However, they will repeat in each sub-unit, so the value of a and b will be the same for the k-th antenna element in each sub-unit. Please note that this concept can be extended in a straight-forward way to antenna arrays with 2 or 3 dimensions by adding additional weighting factors for the true time delays in each of the dimensions.
  • N /k+l
  • Wi3 is the weighting factor for ⁇ , where the signal B is phase lag, comparing to the i th path signal.
  • FIG. 4A shows the front-end architecture of a four-element phased antenna array using interpolation, according to an embodiment of the invention. For illustrative purposes, this figure shows a four-element array. In practice, far more than four elements are typically used to yield appropriately narrow beams, and the gains obtainable with the interpolation according to the invention are then accordingly larger.
  • the principles of the invention generalize analogously in a straightforward manner to larger linear arrays, as well as to multi-dimensional arrays.
  • RF signals from a set of four antennas 400 pass through four corresponding low noise amplifiers 402, 404, 406, 408.
  • the four amplified signals are then processed by an interpolation circuit 418, which splits the four signals using four corresponding splitters 410, weight-amplifies the split signals by multipliers 412, using weights W from weight computing circuit 434, and combines the resulting weighted signals with signal combiners 414.
  • the resulting two signals from interpolation circuit 418 pass through two variable true time delays 420, 422 controlled by delay computation circuit 424, and the results are summed at 428 to produce the final signal 430.
  • the circuit implementation appears somewhat more complex than the circuit of FIG. 1 because of the weighting interpolation circuits 418.
  • such circuits are relatively small and inexpensive compared to true time delays 420, 422 because they can be implemented as variable gain amplifiers or other simple components, so the overall implementation of the circuit in FIG. 4A is much smaller, cheaper, and lower power than the circuit in FIG. 1, which has four true time delays instead of just two.
  • the phase shifting interpolators 418 employed here produce phase shifts from arbitrary non-orthogonal phases, i.e., the phase of signal C is determined in terms of signals A and B, which are not necessarily orthogonal (FIG. 3A-B).
  • Cartesian vector modulators which produce a derived phase from two phases with an orthogonal phase difference of 90 degrees.
  • Cartesian vector modulators are limited to phase shifting rather than true time delay and therefore usable only for relatively narrowband systems. They would not be suitable for wideband systems. Since large phased arrays are likely to be used at higher frequencies and systems at higher frequencies typically have larger bandwidths, this is an important aspect that will probably become even more important in the future when arrays become larger, frequencies become higher, and bandwidths increase as well. In general, the bandwidth, frequency and array size are interdependent. A reasonable assumption is that total antenna size will remain constant at higher frequencies, increasing the number of antenna elements proportional to the square of the frequency. The bandwidth is limited by regulations and therefore based on history.
  • Systems around 1 GHz usually have bandwidths less than 1% and array sizes less than 10 elements, at mm-wave e.g. 60 GHz they can have bandwidths up to 10% and array sizes less than 1000 elements, and beyond 300 GHz bandwidths around 50% or higher with array sizes more than 1000 elements are conceivable.
  • FIG. 4B shows another embodiment of the invention, implementing a hybrid time delay for a nine-element antenna array front-end architecture. It has three true time delays and an interpolation factor of four.
  • the signals from the nine antennas 450 are split as shown, and then individually amplified by amplifiers 452, which include variable gain amplifiers to apply the interpolation weighting.
  • the resulting amplified signals are combined as shown by power combiners 454, 456, 458.
  • the resulting three combined signals then pass through true-time delays 460, 462, 464.
  • the resulting three shifted signals pass through respective variable gain amplifiers 468, 470, 472 to compensate imbalances between channels and combined at 466.
  • circuit block 474 is a traditional sliding-IF receiver that converts the beamformed signal to a low frequency quadrature signal consisting of two signal components I and Q.
  • the weights applied to variable gain amplifiers 452 are provided by a weight computing circuit (not shown), which may be implemented, for example, using a DSP or ASIC.
  • a weight computing circuit not shown
  • Embodiments of the present invention enable small, low-cost, low-power but high-performance wideband phased array systems for applications for which such systems are currently out of reach, such as many consumer applications (5G and future mobile smartphones/smartwatches, laptops/tablets, autonomous cars and trucks, small aircrafts, drones, robots, smart buildings, etc.).
  • this dispersion when taking into account the cost, size and power dissipation of the complete system, results in a very attractive cost/performance trade-off.
  • the weighting factor or the VGA gain in theory could be ⁇ , but this is not a realistic solution.
  • the tuning range of VGA is limited in CMOS technology at milli-meter wave region. This impairment is evaluated in FIG. 5A-B, where the tuning range of VGAs is set to 6 dB, the beam steers half of the plane, a phase shifter of the resolution of 5.265° is utilized here. If zoomed in on the angle of 0° to 90°, the signal dispersion is located at the angle of 60° and 75°, the nominal power is 0.98 dB less. This demonstrates that the IPAA works well when VGAs have a limited tuning range of the gain when the array size is larger and the beam width is narrower.
  • the interpolation of C has a special case when A and B are 180° out of phase.
  • the beam width is not as narrow as just one line, on the other hand, it causes the discontinuous steering in the full plane which is not necessary for different applications. If the interpolation factor is 8, then
  • FIG. 6A is a graph of the array factor for the hybrid interpolation-based architecture
  • FIG. 7 is a graph of the relationship of the critical angle of incidence for which there was a first dip in the array pattern and the interpolation factor.

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Abstract

A wireless front-end includes a phased antenna array [400], a weighting factor computation circuit [434], and hybrid time delays including a set of variable true time delays [420,422] and a set of phase-shifting interpolators [418] that interpolate between the true time delays using weighting factors computed by the weighting factor computation circuit [434], where the weighting factor computation circuit uses non-orthogonal base vectors to compute the weighting factors. The phase-shifting interpolators [418] may be implemented using signal splitters [410], weighting multipliers [412], and signal combiners [414]. The weighting multipliers [412] may be implemented using variable gain amplifiers, variable attenuators, or switched resistor networks. The number of variable true time delays [420,422] is preferably less than half the number of antenna elements in the phased antenna array [400]. In the case were the phased antenna array is a linear array, the number of variable true time delays may be just one. In the case where the phased antenna array is a 2-dimensional array, the number of variable true time delays may be just two, but preferably three.

Description

EFFICIENT WIDEBAND PHASED ANTENNA ARRAY USING TRUE TIME DELAYS AND INTERPOLATION
FIELD OF THE INVENTION
The present invention relates generally to wireless communications methods and devices. More specifically, it relates to wideband phased antenna array communication techniques and devices.
BACKGROUND OF THE INVENTION
State-of-the-art wideband phased array antenna systems use large, power consuming and expensive true time delays for each and every antenna element. This is acceptable for some high-end applications such as in radio astronomy or for military (e.g., radar) purposes but is prohibitive for many consumer applications that could benefit from wideband phased arrays with many antenna elements such as car radars for autonomous driving or 5G smartphones. Current products are either high-end professional (e.g., radio astronomy) or military systems with high cost, large size and large power dissipation, or very low-end/low-performance consumer-type systems with a small number of antenna elements, often below 16 elements (e.g., WiFi based on IEEE 802.1 lg and 802.1 lac, or 4G smartphones, or adaptive cruise-control radars in high-end cars) - or completely non-existent since the cost/power/size is currently prohibitive. Because of these shortcomings in existing wideband phased array beamformers, there is a need for improved technologies and novel architectures to provide the needs for future indoor WLAN, 5G/6G etc. networks.
BRIEF SUMMARY OF THE INVENTION
In one aspect, the invention provides a wireless front-end comprising a phased antenna array, a weighting factor computation circuit, and hybrid time delays including a set of variable true time delays and a set of phase-shifting interpolators that interpolate between the true time delays using weighting factors computed by the weighting factor computation circuit, where the weighting factor computation circuit uses non-orthogonal base vectors to compute the weighting factors. The phase-shifting interpolators may be implemented using signal splitters, variable weighting multipliers, and signal combiners. The weighting multipliers may be implemented using variable gain amplifiers, variable attenuators, or switched resistor networks. The number of variable true time delays is preferably less than half the number of antenna elements in the phased antenna array. In the case where the phased antenna array is a linear array, the number of variable true time delays may be just one. In the case where the phased antenna array is a 2- dimensional array, the number of variable true time delays may be just two, but preferably three.
The wireless front-end can be used for receivers, transmitters or transceivers in RF, mm-wave, sub-mm-wave, and THz frequency bands. Applications include wireless data communications, imaging, automotive-radar, and wireless power transfer.
BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS FIG. 1 is a schematic diagram of a traditional wideband phased array front-end architecture which applies a true time delay to each antenna element.
FIG. 2 is the antenna beam pattern resulting from the circuit shown in FIG. 1.
FIGS. 3A-B are vector diagrams illustrating the interpolation of intermediate vectors between non-orthogonal vectors, according to an embodiment of the invention.
FIG. 3C is a schematic illustration of the interpolation technique applied to four antennas of a linear array, showing one phase shifting unit with an interpolation factor of four, according to an embodiment of the invention.
FIG. 4A is a block diagram for a receiver front-end architecture implementing a hybrid time delay for a four-element antenna array, according to an embodiment of the invention.
FIG. 4B is a block diagram for a receiver front-end architecture implementing a hybrid time delay for a nine-element antenna array, according to an embodiment of the invention.
FIGS. 5A-B are polar diagrams of array factor when VGA has a finite gain, according to an embodiment of the invention.
FIG. 6A is a graph of the array factor for a hybrid interpolation-based architecture according to an embodiment of the invention.
FIG. 6B is a graph of the array factor for a conventional true time delay architecture.
FIG. 7 is a graph of the relationship of the critical angle of incidence for which there was a first dip in the array pattern and the interpolation factor, according to an embodiment of the invention. DETAILED DESCRIPTION OF THE INVENTION
A phased antenna array system uses an array of small antenna elements that together can emulate a large antenna with the capability to form and shape a narrow radio beam. By changing the properties of the signals of each of the small constituent antenna elements, the direction and shape of the beam can be altered electronically. This is important in many applications where it would be costly, slow, cumbersome or otherwise impractical to adjust the beam direction of an antenna by mechanically adjusting the orientation of that antenna and/or to adjust the beam's shape by adjusting the mechanical outline of the antenna. Phased arrays that transmit or receive radio signals with a large bandwidth need to adjust the delay of the signal of each antenna element individually in order to steer the beam in the right direction. However, implementing delays with sufficient precision requires large and expensive electronic components. This is especially true when these delays need to be accommodated in an integrated circuit (IC).
As shown in FIG. 1, a traditional wideband phased array applies a delay to each antenna element, as shown in the diagram. In this illustration, the antenna array 100 has four antenna elements connected to four corresponding amplifiers 102, 104, 106, 108. As is customary, this traditional phased array front end uses four corresponding variable true time delay elements for beam steering.
The antenna signals from the antenna elements 100 enter the receiver through the four amplifiers 102, 104, 106, 108. Each of these signals is then processed through a corresponding variable true time delay 110, 112, 114, 116 and summed by summation element 118 to provide the required output signal. The variable true time delays 110, 112, 114, 116 are traditionally expensive to implement. Blocks 122, 124 produce the proper delays to the intermediate variable delay elements 112, 114, based on the delays 126, 128 provided to the first and last variable delay elements 110, 116. The resulting antenna beam pattern is shown in FIG. 2. In embodiments of the present invention, instead of using a variable true time delays for every antenna element, hybrid time delays are used. These include a set of variable true time delays and a set of phase shifting interpolators that interpolate between the true time delays, where the phase shifting interpolators use non-orthogonal base vectors. Preferably, the number of true time delays is less than half the number of antenna elements, or more preferably less than twice the dimensions of the array. The ratio between the number of antenna elements and the number of true time delays is called the interpolation factor. A higher interpolation factor reduces the cost, size and power dissipation of the beamformer at the cost of the critical angle of incidence (for more details, see the text below describing FIG. 6 and FIG. 7). The minimum interpolation factor is 2, resulting in a number of true time delays approximately equal to half the number of antenna elements. The maximum interpolation factor is equal to the number of antenna elements divided by the number of dimensions of the antenna array. For example, for a 2-dimensional array of nx by % antenna elements, the maximum interpolation factor is nx * % / 2. This is achieved by allocating a single true time delay to each of the dimensions of the antenna array. In practice, it is often preferable to have the number of true time delays equal to 2D-l, where D is the dimension of the array.
The interpolators may be inexpensively implemented using variable gain amplifiers, variable attenuators, or switched resistor networks. Using this architecture, some delays are closely approximated by interpolating between true time delays, one larger and one smaller than the desired delay. This interpolation is performed by interpolators that produce phase shifts from arbitrary non-orthogonal phases.
In one implementation, for example, a linear (1 -dimensional) array, could use true time delays for only the first and last small antennas, and derive the delays for intermediate antennas by interpolating with the appropriate weighting factors between the delays for the first and last antennas. This significantly reduces the number of costly true time delay electronics. In a similar way, 2-dimensional arrays may be implemented using just four true time delays, and interpolating all intermediate delays. Since the absolute delay of the signal is usually not relevant, we can arbitrarily define one delay to be zero, requiring only a single delay for a linear array and three true time delays for a 2-dimensional array. Since the number of array elements in many systems is rather large, ranging from tens to thousands of antenna elements, the potential saving in power dissipation, size and cost can be very large as well. FIG. 3C is a schematic illustration of this principle for a linear array, showing one phase shifting unit with an interpolation factor of four. Four signals 300, 302, 304, 306 from four respective antennas are multiplied by four respective weighting factors WIA, WIA, W A, then the results added phase shifted by ΦΑ which represents the phase of one of the non-orthogonal base vectors, A, discussed below in relation to FIG. 3A.
According to the techniques of the present invention, the required number of true time delays can be reduced by interpolation, sharing a small number of true time delay circuits between many antenna elements rather than providing each antenna element with its own delay. For example, FIG. 3B illustrates the interpolation of vectors 308, 310, 312 between non-orthogonal vectors 314 and 316. This interpolation technique is also demonstrated by the constellation diagram for FIG. 3A showing the phases of two non-orthogonal signals A and B with arbitrary phase difference ΦΒ, as well as the interpolated signal C with phase difference Oc.
In order to generate the phase shift Oc required for vector C with the same unity length we decompose signal C into a linear combination of A and B: C=aA +b . For convenience, we define We find a and b by creating two equations for the orthogonal and parallel dimensions relative to A.
cos Oc = a + b cos ΦΒ
sin Oc = b sin ΦΒ
Substituting
Figure imgf000007_0001
Now solving for a, b, a = cos Φβ - sin Φβ / tan ΦΒ
Figure imgf000007_0002
In a 1 -dimensional antenna array with N elements and an interpolation factor the array can be viewed as having k sub-units plus one last single antenna element. Each sub-unit has (N-l)/f antenna elements. Each sub-unit has a true time delay in the signal path of the first antenna element of the sub-unit. This true time delay corresponds to the vector A in the equations above. The delay of the first antenna element of the next sub-unit (or the last, single antenna element in case of the last sub-unit) corresponds to vector B in the equations above.
The variables a and b are the weighting factors that generate the delay for an intermediate antenna element in the sub-unit by interpolating between the delays of true time delays corresponding to vectors A and B (so the first antenna element in this and the next sub-unit). For the antenna element corresponding to vector A, we find a=\ and b=0, and conversely, for the antenna element corresponding to vector B, we find a=0 and b=\ . In these cases, the phase interpolation circuits can be further simplified.
Please note that the values of a and b are typically different for each antenna element in a sub- unit. However, they will repeat in each sub-unit, so the value of a and b will be the same for the k-th antenna element in each sub-unit. Please note that this concept can be extended in a straight-forward way to antenna arrays with 2 or 3 dimensions by adding additional weighting factors for the true time delays in each of the dimensions.
The weighting matrix W in this example is a 3xN matrix with elements Wij for i=l,...N and j=l,2,3. Each element Wij represents the weighting factor applied to the ith path of antenna. The
N-path antenna is classified into k sub-units, where N =/k+l and where /is the interpolation factor. In nth sub-unit (n = 1 , ...k), if the ith path is one of the reference signals (A or B as in FIG.
3A), one has i=(n-l) -l, then Wu=l, Wi2=0, Wi3=0; otherwise, if the ith path is the signal to be interpolated by signal A and B (for example, the signal C in FIG. 3A), then Wn=0, Wi2 is the weighting factor for ΦΑ, where the signal A is phase lead, comparing to the ith path signal, and
Wi3 is the weighting factor for ΦΒ, where the signal B is phase lag, comparing to the ith path signal. We can then write
[Wi2; Wi3] [cos Oc,sin Oc]=[cos ΦΒ, COS ΦΒ; sin ΦΑ, sin ΦΒ],
for a single row (the ith path to be interpolated) in the matrix W. We then have
[a b^ tWa Wa]-1.
Here, ΦΑ is the reference phase (i.e., 0), so cos ΦΑ = 1 , sin ΦΑ = 0. This can be translated into a block diagram for a receiver architecture, as shown in FIG. 4A. This figure shows the front-end architecture of a four-element phased antenna array using interpolation, according to an embodiment of the invention. For illustrative purposes, this figure shows a four-element array. In practice, far more than four elements are typically used to yield appropriately narrow beams, and the gains obtainable with the interpolation according to the invention are then accordingly larger. The principles of the invention generalize analogously in a straightforward manner to larger linear arrays, as well as to multi-dimensional arrays.
In the architecture of FIG. 4A, RF signals from a set of four antennas 400 pass through four corresponding low noise amplifiers 402, 404, 406, 408. The four amplified signals are then processed by an interpolation circuit 418, which splits the four signals using four corresponding splitters 410, weight-amplifies the split signals by multipliers 412, using weights W from weight computing circuit 434, and combines the resulting weighted signals with signal combiners 414. The resulting two signals from interpolation circuit 418 pass through two variable true time delays 420, 422 controlled by delay computation circuit 424, and the results are summed at 428 to produce the final signal 430.
As can be seen from FIG. 4A, the circuit implementation appears somewhat more complex than the circuit of FIG. 1 because of the weighting interpolation circuits 418. However, such circuits are relatively small and inexpensive compared to true time delays 420, 422 because they can be implemented as variable gain amplifiers or other simple components, so the overall implementation of the circuit in FIG. 4A is much smaller, cheaper, and lower power than the circuit in FIG. 1, which has four true time delays instead of just two. It should be emphasized that the phase shifting interpolators 418 employed here produce phase shifts from arbitrary non-orthogonal phases, i.e., the phase of signal C is determined in terms of signals A and B, which are not necessarily orthogonal (FIG. 3A-B). Thus, this approach is distinct from Cartesian vector modulators which produce a derived phase from two phases with an orthogonal phase difference of 90 degrees. Cartesian vector modulators are limited to phase shifting rather than true time delay and therefore usable only for relatively narrowband systems. They would not be suitable for wideband systems. Since large phased arrays are likely to be used at higher frequencies and systems at higher frequencies typically have larger bandwidths, this is an important aspect that will probably become even more important in the future when arrays become larger, frequencies become higher, and bandwidths increase as well. In general, the bandwidth, frequency and array size are interdependent. A reasonable assumption is that total antenna size will remain constant at higher frequencies, increasing the number of antenna elements proportional to the square of the frequency. The bandwidth is limited by regulations and therefore based on history. Systems around 1 GHz usually have bandwidths less than 1% and array sizes less than 10 elements, at mm-wave e.g. 60 GHz they can have bandwidths up to 10% and array sizes less than 1000 elements, and beyond 300 GHz bandwidths around 50% or higher with array sizes more than 1000 elements are conceivable.
FIG. 4B shows another embodiment of the invention, implementing a hybrid time delay for a nine-element antenna array front-end architecture. It has three true time delays and an interpolation factor of four. The signals from the nine antennas 450 are split as shown, and then individually amplified by amplifiers 452, which include variable gain amplifiers to apply the interpolation weighting. The resulting amplified signals are combined as shown by power combiners 454, 456, 458. The resulting three combined signals then pass through true-time delays 460, 462, 464. The resulting three shifted signals pass through respective variable gain amplifiers 468, 470, 472 to compensate imbalances between channels and combined at 466. The resulting signal is then processed by circuit block 474, which is a traditional sliding-IF receiver that converts the beamformed signal to a low frequency quadrature signal consisting of two signal components I and Q. The weights applied to variable gain amplifiers 452 are provided by a weight computing circuit (not shown), which may be implemented, for example, using a DSP or ASIC. Embodiments of the present invention enable small, low-cost, low-power but high-performance wideband phased array systems for applications for which such systems are currently out of reach, such as many consumer applications (5G and future mobile smartphones/smartwatches, laptops/tablets, autonomous cars and trucks, small aircrafts, drones, robots, smart buildings, etc.). In addition, the lower cost, smaller size and lower power dissipation might also be attractive for current professional/military wideband phased array systems. The impact of a finite gain in the interpolation circuit on the performance of the beam former is analyzed in the following discussion of the trade-off between variable gain amplifier (VGA) tuning range and continuously steering range. FIG. 5A-B are polar diagrams of array factor when VGA has a finite gain with a tuning range of 6 dB, the signal dispersion is 0.98 dB at 75°, interpolation factor fipl = 4, and phase shifting cells U = 4. For many applications this dispersion, when taking into account the cost, size and power dissipation of the complete system, results in a very attractive cost/performance trade-off.
Based on the mathematic model of the integrated panel array assembly (IPAA), the weighting factor or the VGA gain in theory could be ±∞, but this is not a realistic solution. The tuning range of VGA is limited in CMOS technology at milli-meter wave region. This impairment is evaluated in FIG. 5A-B, where the tuning range of VGAs is set to 6 dB, the beam steers half of the plane, a phase shifter of the resolution of 5.265° is utilized here. If zoomed in on the angle of 0° to 90°, the signal dispersion is located at the angle of 60° and 75°, the nominal power is 0.98 dB less. This demonstrates that the IPAA works well when VGAs have a limited tuning range of the gain when the array size is larger and the beam width is narrower.
The interpolation of C has a special case when A and B are 180° out of phase. The phase difference between base vectors A and B is given by <^B = fipi ( icos O) , where Θ is the incident angle of the signal to the array, and fipi is the interpolation factor. The relationship of the critical angle of incidence for which there was a first dip in the array pattern and the interpolation factor is shown in FIG. 6A-B and FIG. 7, which means at this angle of incidence that causes the phase difference of A and B to be an integral multiple of 180°, the main lobe of the array factor would fall below 3 dB beam-width, and if ipz = 2k, k = 1,2,3.. the incident angle at which the main lobe of the array cannot achieve the desired value (since the phase difference of the base vectors is an integer multiple of 180 degrees) would occur at the angle of incidence cos _1 ψ- ,k = 1 ,2,3. ... This may be solved by adding a small deviation ΑΘ to θ , since
J ipl
for a certain number of antennas, the beam width is not as narrow as just one line, on the other hand, it causes the discontinuous steering in the full plane which is not necessary for different applications. If the interpolation factor is 8, then
fipi (TCCOS Θ) = 8 * ncosO = π— > 0 = 82
11 1 1 3 7\
φ = I -, - , - , - , - ) π, will show a dip in the Array factor
\8 4 2 4 8/
FIG. 6A is a graph of the array factor for the hybrid interpolation-based architecture, and FIG. 6B is a graph of the array factor for the conventional true time delay architecture, when the phase shifting cells are U = 7, the interpolation factor is fipi = 8, and the number of bits of the phase shifter is ps =5.
FIG. 7 is a graph of the relationship of the critical angle of incidence for which there was a first dip in the array pattern and the interpolation factor.

Claims

1. A wireless front-end comprising a phased antenna array, a weighting factor computation circuit, and hybrid time delays including a set of variable true time delays and a set of phase-shifting interpolators that interpolate between the true time delays using weighting factors computed by the weighting factor computation circuit, wherein the weighting factor computation circuit uses non-orthogonal base vectors to compute the weighting factors.
2. The wireless front-end of claim 1 wherein the phase-shifting interpolators comprise weighting multipliers implemented using variable gain amplifiers, variable attenuators, or switched resistor networks.
3. The wireless front-end of claim 1 wherein the phase-shifting interpolators are
implemented using signal splitters, weighting multipliers, and signal combiners.
4. The wireless front-end of claim 1 wherein the number of variable true time delays is less than half the number of antenna elements in the phased antenna array.
5. The wireless front-end of claim 1 wherein the phased antenna array is a linear array, and the number of variable true time delays is one.
6. The wireless front-end of claim 1 wherein the phased antenna array is a 2-dimensional array, and the number of variable true time delays is three.
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TWI675554B (en) * 2018-12-07 2019-10-21 國家中山科學研究院 Digital control vector signal modulator

Non-Patent Citations (1)

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Title
TSENG R ET AL: "A Four-Channel Beamforming Down-Converter in 90-nm CMOS Utilizing Phase-Oversampling", IEEE JOURNAL OF SOLID-STATE CIRCUITS, IEEE SERVICE CENTER, PISCATAWAY, NJ, USA, vol. 45, no. 11, 1 November 2010 (2010-11-01), pages 2262 - 2272, XP011320135, ISSN: 0018-9200 *

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Publication number Priority date Publication date Assignee Title
TWI675554B (en) * 2018-12-07 2019-10-21 國家中山科學研究院 Digital control vector signal modulator

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