WO2018206085A1 - Procédés et appareil de dispositif de commande destinés à un convertisseur de puissance à canaux de puissance parallèles ayant des bus cc indépendants - Google Patents

Procédés et appareil de dispositif de commande destinés à un convertisseur de puissance à canaux de puissance parallèles ayant des bus cc indépendants Download PDF

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Publication number
WO2018206085A1
WO2018206085A1 PCT/EP2017/061034 EP2017061034W WO2018206085A1 WO 2018206085 A1 WO2018206085 A1 WO 2018206085A1 EP 2017061034 W EP2017061034 W EP 2017061034W WO 2018206085 A1 WO2018206085 A1 WO 2018206085A1
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WIPO (PCT)
Prior art keywords
channel
parallel
signal
converter system
controller
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PCT/EP2017/061034
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English (en)
Inventor
Shyam Sunder Ramamurthy
Brian Babes Venus
Christopher Joseph Lee
Luke Anthony Solomon
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Ge Energy Power Conversion Technology Ltd
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Application filed by Ge Energy Power Conversion Technology Ltd filed Critical Ge Energy Power Conversion Technology Ltd
Priority to EP17722436.7A priority Critical patent/EP3646455A1/fr
Priority to PCT/EP2017/061034 priority patent/WO2018206085A1/fr
Publication of WO2018206085A1 publication Critical patent/WO2018206085A1/fr

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M5/00—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases
    • H02M5/40—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into dc
    • H02M5/42—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into dc by static converters
    • H02M5/44—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into dc by static converters using discharge tubes or semiconductor devices to convert the intermediate dc into ac
    • H02M5/453—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into dc by static converters using discharge tubes or semiconductor devices to convert the intermediate dc into ac using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M5/458—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into dc by static converters using discharge tubes or semiconductor devices to convert the intermediate dc into ac using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/66—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal
    • H02M7/68—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters
    • H02M7/72—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/79—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/81—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal arranged for operation in parallel

Definitions

  • the present disclosure relates to the field of power conversion systems, and particularly to controllers for power converters with parallel power channels having independent direct current (DC) buses.
  • DC direct current
  • IGBT Insulated-gate bipolar transistor
  • MOSFET metal-oxide-semiconductor field-effect transistor
  • Power conversion systems are used to generate desired output alternate current (AC) output to a load or supply generated electricity to a utility grid.
  • Certain power conversion systems include a single channel converter and inverter combo power module.
  • a converter module of the single channel converter and inverter combo power module converts input AC current to DC current, and an inverter module of the single channel converter and inverter combo power module converts the DC current back to AC current for output to the load or the utility grid.
  • Multiple single channel converter and inverter combo power modules can be used to convert multiple phase AC current.
  • Multiple single channel converter and inverter combo power modules can be combined in parallel to form a parallel converter system.
  • the parallel converter system shares the electricity from each individual channel to increase the overall power output of the power conversion system and optimize the power efficiency of the power conversion system.
  • Each individual channel in the parallel converter system has provisions so that it can be turned on or off independently. However, as one of the channels in the parallel converter system is turned on or off when all the channels are sharing the output equally, such action may cause a shock to the parallel converter system as well as the output load. Hence, it is necessary to increase or decrease the participation of a channel in supplying the total output gradually when switching, thereby requiring that a given power channel be capable of supplying a portion of the total output other than what it would be when the parallel channels are sharing exactly equally. Such a capability is also useful when it is necessary to reduce the output of a channel and increase the output of another channel due to reduction in available channel cooling capability.
  • embodiments of the present invention provide a method for controlling operation of a power converter system including multiple parallel power channels, each being coupleable to a controller.
  • the method includes generating, via each of the controllers, a reference signal and transmitting each of the reference signals to a corresponding one of the parallel converters.
  • An output current of each of the parallel channels is adjusted responsive to the corresponding reference signals received, the adjusting controlling a combined output current of the converter system.
  • FIG. 1 is a block diagram of a channel in the power converter in accordance with certain embodiments of the present invention.
  • FIG. 2 is a block diagram illustration of the general topology of a power converter system having a channel individual controller for each channel in accordance with certain embodiments of the present invention.
  • FIG. 3 is a detailed block diagram illustration of the channel one of the parallel converter system with channel individual controllers in which embodiments of the present invention can be practiced.
  • FIG. 4 is a block diagram illustration of the general topology of a parallel converter system having a converter system main controller for the power converter and power sharing controller for each power channel in accordance with certain embodiments of the present invention.
  • FIG. 5 is a detailed block diagram illustration of the channel one of the parallel converter system with the converter system main controller in which embodiments of the present invention can be practiced.
  • FIG. 6 1 illustrates an exemplary usage of channel participation factors to attain partial de- rating of a power channel among two parallel channels according to one embodiment of the present invention.
  • multi-level power conversion is achieved in a manner that provides higher power quality and density than conventional approaches at lower costs.
  • a multi-level (e.g., three levels) inverter is provided to achieve the multiple output voltage levels.
  • switches devices In these multi-level structures, switches devices, DC link capacitors, and other internal components, can be configured to operate in a cascading manner to produce the required multiple output levels.
  • the controller can be configured to control operation of the switch elements - activating (turning on) and deactivating (turning off) power switches within the switch elements, one at a time. Activating and deactivating the power switches enables precise control of the voltage levels output from the converter.
  • Inverters are utilized in applications requiring direct conversion of electrical energy from DC to AC or indirect conversion from AC to AC.
  • DC to AC conversion is useful for many fields, including power conditioning, harmonic compensation, motor drives, and renewable energy grid-integration.
  • the DC to AC power conversion is the result of power switching devices, which are commonly fully controllable semiconductor power switches.
  • Output waveforms produced by semiconductor power switches are made up of discrete values, producing fast transitions rather than smooth ones.
  • the ability to produce near sinusoidal waveforms around the fundamental frequency is dictated by the modulation technique controlling when, and for how long, the power valves are on and off.
  • Common modulation techniques include the carrier-based technique, or pulse width modulation (PWM), space-vector technique, and the selective -harmonic technique.
  • Power conversion system are used to generate desired output AC output to a load or supply generated electricity to a utility grid.
  • Certain power conversion systems include a single channel converter and inverter combo power module.
  • a converter module of the single channel converter and inverter combo power module converts input AC current to DC current
  • an inverter module of the single channel converter and inverter combo power module converts the DC current back to AC current for output to the load or the utility grid.
  • Multiple single channel converter and inverter combo power module can be used to convert multiple phase AC current.
  • Multiple single channel converter and inverter combo power module can be combined in parallel to form a parallel converter system. The parallel converter system shares the electricity from each individual channel to increase the overall power output of the power conversion system and optimize the power efficiency of the power conversion system.
  • Each individual channel in the parallel converter system can be turned on or off independently while it is still carrying its own share of the load current.
  • the voltage at the output of each channel will be different due to loading differences in addition to the already existing difference due to component tolerances.
  • the common voltage output of all the channels needs to be the same to avoid circulation of common mode currents in solidly grounded transformer-less systems.
  • the present invention relates to a parallel converter system.
  • FIG. 1 shows a block diagram of a channel K parallel converter 10 which is channel K of the parallel converter system.
  • the channel K parallel convert 10 includes: a channel K active front end (AFE) converter power module 12, a channel K inverter power module 14, and a channel K modulator 16.
  • AFE active front end
  • the channel K AFE converter power module 12 is configured to receive one or more phases of AC inputs of the channel, and converts the AC inputs to one or more DC outputs of the channel K (conversion process).
  • the AC inputs have three input phases: input phase A, input phase B, and input phase C.
  • the channel K inverter power module 14 receives the one or more DC outputs of the channel K from the channel K AFE converter power module 12 and provides one or more phases of AC outputs of the channel K (inversion process).
  • the three output phases are output phase U, output phase V, and output phase W. In other parallel converter systems, the number of input and output phases can be different.
  • the channel K modulator 16 is designed to control the conversion and the inversion of the channel K parallel converter according to a channel K reference signal VRK received from a channel K power sharing controller 18.
  • the channel K modulator 16 produces a control signal to the channel K AFE converter power module 12 to control the conversion process.
  • the channel K modulator 16 produces another control signal to the channel K inverter power module 14 to control the inversion process.
  • the channel K modulator 16 produces control signals to control both the conversion process and the inversion process. These control signals from the channel K modulator 16 are responsive to the channel K reference signal VRK received.
  • FIG. 2 is a block diagram illustration of the general topology of a parallel converter system 100 in accordance certain embodiments of the present invention.
  • the parallel converter system 100 has: N channel power sharing controllers: a channel 1 power sharing controller 1012, a channel 2 power sharing controller 1022, ... , and a channel N power sharing controller 10N2, and N channel parallel converters: a channel 1 parallel converter 1014, a channel 2 parallel converter 1024, and a channel N parallel converter 10N4.
  • Each of the channel power sharing controllers is coupled to a corresponding channel parallel converter.
  • each of the channel power sharing controllers provides a channel reference signal VRK to the corresponding channel K parallel converter to control the output of the channel K independently such that the sum of the output current of the parallel converter system is precisely controlled, short circuit currents from the channel parallel converters are limited, and shocks on the parallel converter system caused by the fluctuation of the output current are reduced.
  • the parallel converter system 100 has N input filter combo units: a channel 1 input filter combo 1016, a channel 2 input filter combo 1026, and a channel N input filter combo 10N6.
  • Each of the input phase has a filter, where an inductor is coupled in serial and a capacitor is coupled in parallel to stabilize the impedance of the corresponding input phase.
  • the parallel converter system 100 has N output filter combo units: a channel 1 output filter combo 1018, a channel 2 output filter combo 1028, ..., and a channel N output filter combo 10N8.
  • Each of the output phase also has a filter, where an inductor is coupled in serial and a capacitor is coupled in parallel to smooth out the output AC waveform.
  • the parallel converter system 100 has N channel individual controllers: a channel 1 individual controller 1011 , a channel 2 individual controller 1021, ..., and a channel N individual controller 10 1 each receiving the net converter output reference current I re iC iq along the d and q axis representing the reactive and active components respectively and channel participating factors P K dictating the participation of each channel in the net output.
  • the participation of channel J in the output current would be the proportion ] Xl r ef da an d 1 ⁇ J ⁇ N.
  • Each of the channel individual controllers is coupled to each of the channel power sharing controllers.
  • Each of the channel power sharing controllers receives input voltages from each of the channel individual controllers.
  • Each of the input voltages from the channel individual controller is responsive to the current measurement of each of the channel parallel converters.
  • each of the channel individual controllers is connected to the AC input end to provide an input current measurement of each of the channel parallel converters, independently.
  • each of the channel individual controllers is connected to the AC output end to provide an output current measurement of each of the channel parallel converters, independently.
  • FIG. 3 is a detailed block diagram illustration of the channel one of the parallel converter system 101 in which embodiments of the present invention can be practiced.
  • the channel 1 power sharing controller 1012 has an average voltage waveform generator 10122, a common mode waveform generator 10124, and a control signal combiner 10126.
  • the average voltage waveform generator 10122 receives the input voltages from each of the N channel individual controllers and generates a channel average voltage waveform signal in response to the input voltages received.
  • the common mode waveform generator 10124 receives the channel average voltage waveform signal and generates a channel common mode waveform signal Vc according to the channel average voltage waveform signal received.
  • the control signal combiner 10126 receives an input voltage Vn (input voltage 1) from the channel 1 individual controller 101 1, and the channel common mode waveform signal Vc from the common mode waveform generator 10124, and combines the input voltage Vn from the channel 1 individual controller and the channel common mode waveform signal Vc from the common mode waveform generator 10124 to generate the channel 1 reference signal VRI .
  • FIG. 4 is a block diagram illustration of the general topology of another parallel converter system 200 having a converter system main controller 210 for each individual channel parallel converters in accordance certain embodiments of the present invention.
  • the parallel converter system 200 has: N channel power sharing controllers: a channel 1 power sharing controller 2012, a channel 2 power sharing controller 2022, and a channel N power sharing controller 20N2, and N channel parallel converters: a channel 1 parallel converter 2014, a channel 2 parallel converter 2024, and a channel N parallel converter 20N4.
  • Each of the channel power sharing controllers is coupled to a corresponding channel parallel converter.
  • each of the channel power sharing controllers provides a channel reference signal VRK to the corresponding channel K parallel converter to control the output of the channel K independently such that the sum of the output current of the parallel converter system is precisely controlled, short circuit currents from the channel parallel converters are limited, and shocks on the parallel converter system caused by the fluctuation of the output current are reduced.
  • the parallel converter system 200 has N input filter combo units: a channel 1 input filter combo 2016, a channel 2 input filter combo 2026, ... , and a channel N input filter combo 20N6.
  • Each of the input phase has a filter, where an inductor is coupled in serial and a capacitor is coupled in parallel to stabilize the impedance of the corresponding input phase.
  • the parallel converter system 200 has N output filter combo units: a channel 1 output filter combo 2018, a channel 2 output filter combo 2028, ... , and a channel N output filter combo 20N8.
  • Each of the output phase also has a filter, where an inductor is coupled in serial and a capacitor is coupled in parallel to smooth out the output AC waveform of the corresponding output phase.
  • the parallel converter system 200 has a converter system main controller 210.
  • the converter system main controller 210 control signal output forms the main component of each channel's reference voltage.
  • the output of 210 gets further modified by the converter load sharing voltage trimming controller output V TK in the channel's power sharing controllers.
  • Each converter load sharing voltage trimming controller is responsive to the current measurement of the channel it is controlling.
  • the channel power sharing controller receives the net converter output reference current l re f : dq along the d and q axis representing the reactive and active components respectively and channel participating factors P K dictating the participation of the channel in the net output. Note that the participation of channel J in the output current would be the proportion ⁇ J xl r ef,dq an d 1 ⁇ / ⁇ N.
  • FIG. 5 is a detailed block diagram illustration of the channel 1 parallel converter 201 of the parallel converter system 200 with the converter system main controller 210 in which embodiments of the present invention can be practiced.
  • the channel 1 power sharing controller 2012 has a common mode waveform generator 20122, a converter load sharing voltage trimming controller 20124, and a control signal combiner 20126.
  • the converter system main controller 210 output is used to generate the common mode waveform and is modified to form the output reference waveform in each of the channel K power sharing controllers.
  • the control signal combiner 20126 receives the input voltage VTI from the converter load sharing voltage trimming controller 20124, and the channel common mode waveform signal Vc from the common mode waveform generator 20122, and combines the input voltage VTI from the converter load sharing voltage trimming controller 20124 and the channel common mode waveform signal Vc from the common mode waveform generator 20122 to generate the channel 1 reference signal VRI .
  • Other channels of parallel converter system 200 are operated in a similar manner except that the control signal combiner of channel K 20K26 receives the input voltage VTK from the corresponding channel K converter load sharing voltage trimming controller 20K24.
  • the channel K reference signal VRK IS the combination of VTK and Vc.
  • each of the channel reference signals VRK is user programmable via the common mode waveform generator 20122 and the converter load sharing voltage trimming controller 20124.
  • FIG. 6 an exemplary usage of channel participation factors to attain partial de-rating of a power channel among two parallel channels is shown according to one embodiment of the present invention.
  • a drive is enabled with full cooling capability available at both channels: power channel 1 (PCI), and power channel 2 (PC2), as shown in FIG. 6D.
  • PCI power channel 1
  • PC2 power channel 2
  • PCI 6B in thermal resistance of PCI causes the thermal resistance of PCI 612 increases, while the thermal resistance of PC2 614 remain unchanged.
  • the exit air temperature of PCI 602 to increase as shown in FIG. 6A, while the exit air temperature of PC2 remain unchanged as shown as 604 in FIG. 6A.
  • the drive is set to start de -rating of PCI 606 when the exit air temperature of PCI reaches 80 °C, and the channel is set to trip at exit air temperature at 90 °C,
  • the PCI When the exit air temperature of PCI reaches 80 °C, the PCI is de-rated and the participation factor of PCI 622 started to drop after the de -rating of PCI , and the participation factor of PC2 remain unchanged as shown in FIG. 6C.
  • the controller of the parallel converter system makes adjustment such that the output current of PCI 632 is reduced and the output current of PC2 634 is increased the same amount as the decrease of the output current of PCI so that the overall output current 636 remains the same as shown in FIG. 6D. This allows the temperature of PCI to settle below the temperature trip setting and prevents a trip of the parallel converter system.
  • the present invention relates to a method for controlling operation of a parallel converter system.
  • the parallel converter system includes multiple channel parallel converters, and each of the channel parallel converters is coupled to a corresponding channel power sharing controller.
  • the method includes: generating, via each of the channel power sharing controllers, a channel reference signal for each of the corresponding channel parallel converters for controlling the output current of each of the corresponding channel parallel converters, respectively; transmitting, via each of the channel power sharing controllers, the generated channel reference signal to each of the corresponding channel parallel converters; receiving, at each of the channel parallel converters, the channel reference signal from each of the corresponding channel power sharing controllers; and controlling the output current of each of the corresponding channel parallel converters, in response to the channel reference signals received via each of the channel parallel converters such that the sum of the output current of the parallel converter system is precisely controlled, short circuit currents from the channel parallel converters are limited, and shocks on the parallel converter system caused by the fluctuation of the output current are reduced.
  • the operation of generating channel reference signals is accomplished by at least following two methods.
  • a parallel converter system 100 has N channel individual controllers: a channel 1 individual controller 1011 , a channel 2 individual controller 1021 , and a channel N individual controller 10 1.
  • Each of the channel individual controllers is coupled to each of the channel power sharing controllers.
  • Each of the channel power sharing controllers receives input voltages from each of the channel individual controllers.
  • Each of the input voltages from the channel individual controller is responsive to the current measurement of each of the channel parallel converters.
  • Each of the average voltage waveform generator 10K22 receives the input voltages from each of the N channel individual controllers and generates a channel average voltage waveform signal in response to the input voltages received.
  • Each of the common mode waveform generator 10K24 receives the channel average voltage waveform signal and generates a channel common mode waveform signal Vc according to the channel average voltage waveform signal received.
  • Each of the control signal combiners 10K26 receives an input voltage VIK (individual voltage K) from the channel K individual controllers 1 OKI , and the channel common mode waveform signal Vc from each of the common mode waveform generators 10K24, and combines the input voltage VIK from the channel K individual controller and the channel common mode waveform signal Vc from the common mode waveform generator 10K24 to generate the channel K reference signal VRK.
  • the channel K reference signal VRK is the combination of VTK and Vc.
  • a parallel converter system 200 has a converter system main controller 210.
  • the converter system main controller 210 has multiple channel control signal outputs.
  • Each of the channel control signal outputs is coupled a corresponding channel power sharing controllers.
  • Each of the channel power sharing controllers receives a channel control signal from a corresponding channel control signal output, and each of the channel control signal outputs is responsive to the current measurement of each of the channel parallel converters.
  • Each of control signal combiners 20K26 receives the input voltages VTK from the converter load sharing voltage trimming controller 20K24, and the channel common mode waveform signal Vc from the common mode waveform generator 20K22, and combines the input voltage VTK from the converter load sharing voltage trimming controller 20K24 and the channel common mode waveform signal Vc from the common mode waveform generator 20K22 to generate the channel K reference signal VRK.
  • the channel K reference signal VRK is the combination of VTK and VC.
  • the present invention relates to a computer readable media storing computer executable instructions.
  • these computer executable instructions are executed by one or more processors of a parallel converter system, these computer executable instructions are adapted to control operation of the parallel converter system.
  • the parallel converter system has multiple channel parallel converters, and each of the channel parallel converters is coupled to a corresponding channel power sharing controller.
  • the method of controlling the operation of the parallel converter system includes: generating, via each of the channel power sharing controllers, a channel reference signal for each of the corresponding channel parallel converters for controlling the output current of each of the corresponding channel parallel converters, respectively; transmitting, via each of the channel power sharing controllers, the generated channel reference signal to each of the corresponding channel parallel converters; receiving, at each of the channel parallel converters, the channel reference signal from each of the corresponding channel power sharing controllers; and controlling the output current of each of the corresponding channel parallel converters, in response to the channel reference signals received via each of the channel parallel converters such that the sum of the output current of the parallel converter system is precisely controlled, short circuit currents from the channel parallel converters are limited, and shocks on the parallel converter system caused by the fluctuation of the output current are reduced.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)
  • Supply And Distribution Of Alternating Current (AREA)

Abstract

Certains modes de réalisation de la présente invention concernent un procédé de commande du fonctionnement d'un système de convertisseur parallèle (100). Le système de convertisseur parallèle (100) comprend de multiples convertisseurs de puissance parallèles (1014, 10N4), et chacun des convertisseurs de puissance parallèles peut être couplé à un dispositif de commande correspondant (1012, 10N2). Le procédé consiste : à générer, par l'intermédiaire de chacun des dispositifs de commande (1012, 10N2), un signal de référence de canal (VRK), à transmettre chacun des signaux de référence de canal générés (VRK) à un convertisseur de puissance correspondant parmi les convertisseurs de puissance parallèles (1014, 10N4), et à régler un courant de sortie de chacun des convertisseurs parallèles (1014, 10N4) en réponse aux signaux de référence de canal correspondants (VRK) reçus, le réglage commandant un courant de sortie combiné du système de convertisseur parallèle (100). Les signaux de référence de canal desdits convertisseurs de puissance parallèles (1014, 10N4) sont générés en réponse aux facteurs de participation (PK) de chacun des convertisseurs de puissance parallèles (1014, 10N4), et d'un courant de référence de sortie de convertisseur net.
PCT/EP2017/061034 2017-05-09 2017-05-09 Procédés et appareil de dispositif de commande destinés à un convertisseur de puissance à canaux de puissance parallèles ayant des bus cc indépendants WO2018206085A1 (fr)

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EP17722436.7A EP3646455A1 (fr) 2017-05-09 2017-05-09 Procédés et appareil de dispositif de commande destinés à un convertisseur de puissance à canaux de puissance parallèles ayant des bus cc indépendants
PCT/EP2017/061034 WO2018206085A1 (fr) 2017-05-09 2017-05-09 Procédés et appareil de dispositif de commande destinés à un convertisseur de puissance à canaux de puissance parallèles ayant des bus cc indépendants

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109361324A (zh) * 2018-12-24 2019-02-19 中国船舶重工集团公司第七〇九研究所 一种基于零序分量的三相逆变电源并联功率均衡方法
US11888418B2 (en) 2021-02-12 2024-01-30 Hamilton Sundstrand Corporation Control structures for parallel motor drive control architectures

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040136214A1 (en) * 2003-01-10 2004-07-15 Delta Electronics, Inc. Parallel inverter system based on tracking of system power reference
EP2270969A1 (fr) * 2009-07-02 2011-01-05 Converteam Technology Ltd Procédés de commande de convertisseurs d'alimentation reliés en parallèle
US20130279222A1 (en) * 2012-04-18 2013-10-24 Delta Electronics (Shanghai) Co., Ltd. Converter system and control method thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040136214A1 (en) * 2003-01-10 2004-07-15 Delta Electronics, Inc. Parallel inverter system based on tracking of system power reference
EP2270969A1 (fr) * 2009-07-02 2011-01-05 Converteam Technology Ltd Procédés de commande de convertisseurs d'alimentation reliés en parallèle
US20130279222A1 (en) * 2012-04-18 2013-10-24 Delta Electronics (Shanghai) Co., Ltd. Converter system and control method thereof

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
ROSLAN M A ET AL: "Centralize control power sharing scheme of parallel connected inverters for microgrids", 2016 IEEE INTERNATIONAL CONFERENCE ON POWER AND ENERGY (PECON), IEEE, 28 November 2016 (2016-11-28), pages 692 - 696, XP033259876, DOI: 10.1109/PECON.2016.7951648 *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109361324A (zh) * 2018-12-24 2019-02-19 中国船舶重工集团公司第七〇九研究所 一种基于零序分量的三相逆变电源并联功率均衡方法
CN109361324B (zh) * 2018-12-24 2020-10-13 中国船舶重工集团公司第七一九研究所 一种基于零序分量的三相逆变电源并联功率均衡方法
US11888418B2 (en) 2021-02-12 2024-01-30 Hamilton Sundstrand Corporation Control structures for parallel motor drive control architectures

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