WO2018191908A1

WO2018191908A1 - Dynamic frozen bits and error detection for polar codes

Info

Publication number: WO2018191908A1
Application number: PCT/CN2017/081228
Authority: WO
Inventors: Changlong Xu; Jian Li; Chao Wei; Jing Jiang; Jilei Hou
Original assignee: Qualcomm Incorporated
Priority date: 2017-04-20
Filing date: 2017-04-20
Publication date: 2018-10-25

Abstract

Methods, systems, and devices for wireless communication are described for dynamic frozen bits of polar codes for early termination and performance improvement. A wireless device may receive a signal comprising a codeword encoded using a polar code. The wireless device may perform decoding of the codeword including at least: parity check of a first subset of decoding paths for making a decision on early termination of decoding of the codeword based on dynamic frozen bits, and generating path metrics for a second subset of the decoding paths that each pass the parity check based on the dynamic frozen bits, and performing error detection on a bit sequence corresponding to one of the second subset of the decoding paths based at part on error detection bits and the generated path metrics. The wireless device may process the information bits based on a result of the decoding.

Description

DYNAMIC FROZEN BITS AND ERROR DETECTION FOR POLAR CODES

BACKGROUND

The following relates generally to wireless communication， and more specifically to dynamic frozen bits of polar codes for early termination and performance improvement.

Wireless communications systems are widely deployed to provide various types of communication content such as voice， video， packet data， messaging， broadcast， and so on. These systems may be capable of supporting communication with multiple users by sharing the available system resources (e.g.， time， frequency， and power) . Examples of such multiple-access systems include code division multiple access (CDMA) systems， time division multiple access (TDMA) systems， frequency division multiple access (FDMA) systems， and orthogonal frequency division multiple access (OFDMA) systems， (e.g.， a Long Term Evolution (LTE) system， LTE-Advanced (LTE-A) system， or a New Radio (NR) system) . A wireless multiple-access communications system may include a number of base stations or access network nodes， each simultaneously supporting communication for multiple communication devices， which may be otherwise known as user equipment (UE) .

Data transmission， however， often involves sending data over a noisy communication channel. To combat noise， a transmitter may encode code blocks using error correcting codes to introduce redundancy in the code block so that transmission errors may be detected and corrected. Some examples of encoding algorithms with error correcting codes include convolutional codes (CCs) ， low-density parity-check (LDPC) codes， and polar codes. A polar code is an example of a linear block error correcting code and is the first coding technique to provably achieve channel capacity. Even when using error correcting codes， detection rates and false alarms remain issues when transmitting over a noisy communication channel. A false alarm may occur when the result of decoding a received signal indicates that a particular bit sequence was successfully decoded， when a different bit sequence or no bit sequence was actually sent. Existing implementations do not adequately address detection rates and false alarm rates.

SUMMARY

The described techniques relate to improved methods， systems， devices， or apparatuses that support dynamic frozen bits of polar codes for early termination and performance improvement. The examples described herein may enable a decoder to use dynamic frozen bits to simultaneously perform detection and CA-SCL decoding of a codeword encoded using a polar code. During encoding， a number of error detection bits may be increased to improve detection and a false alarm rate， and dynamic frozen bits may be employed to enable early termination and improve performance. Performance may be improved by enabling a decoder to use CA-SCL decoding and early pruning of candidate paths. The proposed algorithm also improves decoder power efficiency by enabling early termination.

A method of wireless communication is described. The method may include identifying a dynamic frozen bit within a code tree during decoding of a codeword encoded using a polar code， extending a set of candidate paths through the code tree for the identified dynamic frozen bit to obtain a first extended set of candidate paths， selecting a first subset of the first extended set of candidate paths according to a first path selection criterion， determining that at least one candidate path in the first subset passes a parity check based on the dynamic frozen bit， and determining respective path metrics for each candidate path in a second subset of the first extended set of candidate paths， the second subset of the extended set of candidate paths selected according to a second path selection criterion.

An apparatus for wireless communication is described. The apparatus may include means for identifying a dynamic frozen bit within a code tree during decoding of a codeword encoded using a polar code， means for extending a set of candidate paths through the code tree for the identified dynamic frozen bit to obtain a first extended set of candidate paths， means for selecting a first subset of the first extended set of candidate paths according to a first path selection criterion， means for determining that at least one candidate path in the first subset passes a parity check based on the dynamic frozen bit， and means for determining respective path metrics for each candidate path in a second subset of the first extended set of candidate paths， the second subset of the extended set of candidate paths selected according to a second path selection criterion.

Another apparatus for wireless communication is described. The apparatus may include a processor， memory in electronic communication with the processor， and instructions stored in the memory. The instructions may be operable to cause the processor to identify a dynamic frozen bit within a code tree during decoding of a codeword encoded using a polar code， extend a set of candidate paths through the code tree for the identified dynamic frozen bit to obtain a first extended set of candidate paths， select a first subset of the first extended set of candidate paths according to a first path selection criterion， determine that at least one candidate path in the first subset passes a parity check based on the dynamic frozen bit， and determine respective path metrics for each candidate path in a second subset of the first extended set of candidate paths， the second subset of the extended set of candidate paths selected according to a second path selection criterion.

A non-transitory computer readable medium for wireless communication is described. The non-transitory computer-readable medium may include instructions operable to cause a processor to identify a dynamic frozen bit within a code tree during decoding of a codeword encoded using a polar code， extend a set of candidate paths through the code tree for the identified dynamic frozen bit to obtain a first extended set of candidate paths， select a first subset of the first extended set of candidate paths according to a first path selection criterion， determine that at least one candidate path in the first subset passes a parity check based on the dynamic frozen bit， and determine respective path metrics for each candidate path in a second subset of the first extended set of candidate paths， the second subset of the extended set of candidate paths selected according to a second path selection criterion.

Some examples of the method， apparatus， and non-transitory computer-readable medium described above may further include processes， features， means， or instructions for identifying a second dynamic frozen bit within the code tree. Some examples of the method， apparatus， and non-transitory computer-readable medium described above may further include processes， features， means， or instructions for extending a second set of candidate paths through the code tree for the identified second dynamic frozen bit to obtain a second extended set of candidate paths. Some examples of the method， apparatus， and non-transitory computer-readable medium described above may further include processes， features， means， or instructions for selecting a first subset of the second extended set of candidate paths according to the first path selection criterion.

Some examples of the method， apparatus， and non-transitory computer-readable medium described above may further include processes， features， means， or instructions for determining that all candidate paths in the first subset of the second extended set of candidate paths fail a parity check. Some examples of the method， apparatus， and non-transitory computer-readable medium described above may further include processes， features， means， or instructions for terminating decoding of the codeword.

Some examples of the method， apparatus， and non-transitory computer-readable medium described above may further include processes， features， means， or instructions for determining that at least one candidate path in the first subset of the second extended set of candidate paths passes a parity check. Some examples of the method， apparatus， and non-transitory computer-readable medium described above may further include processes， features， means， or instructions for determining a second path metric for each candidate path in a second subset of the second extended set of candidate paths， wherein the determined second path metrics may be a function of the determined path metrics.

In some examples of the method， apparatus， and non-transitory computer-readable medium described above， the first path selection criterion may be based on path metrics of the candidate paths of the first extended set of candidate paths， and the second path selection criterion may be based on candidate paths of the first extended set of candidate paths passing the parity check based on the dynamic frozen bit.

Some examples of the method， apparatus， and non-transitory computer-readable medium described above may further include processes， features， means， or instructions for identifying a bit sequence corresponding to a candidate path in the second subset of the extended set of candidate paths. Some examples of the method， apparatus， and non-transitory computer-readable medium described above may further include processes， features， means， or instructions for calculating a first error detection code based at least in part on the bit sequence. Some examples of the method， apparatus， and non-transitory computer-readable medium described above may further include processes， features， means， or instructions for identifying a second error detection code based at least in part on the bit sequence. Some examples of the method， apparatus， and non-transitory computer-readable medium described above may further include processes， features， means， or instructions for comparing the first error detection code to the second error detection code.

Some examples of the method， apparatus， and non-transitory computer-readable medium described above may further include processes， features， means， or instructions for determining that the bit sequence passes error detection based at least in part on the comparison. Some examples of the method， apparatus， and non-transitory computer-readable medium described above may further include processes， features， means， or instructions for outputting the bit sequence.

Some examples of the method， apparatus， and non-transitory computer-readable medium described above may further include processes， features， means， or instructions for determining that the bit sequence may have failed error detection based at least in part on the comparison. Some examples of the method， apparatus， and non-transitory computer-readable medium described above may further include processes， features， means， or instructions for outputting an error based at least in part on the failure.

In some examples of the method， apparatus， and non-transitory computer-readable medium described above， determining that the at least one candidate path in the first subset passes a parity check comprises： calculating a parity check value based at least in part on a plurality of bits of the at least one candidate path occurring prior to the dynamic frozen bit along the at least one candidate path. Some examples of the method， apparatus， and non-transitory computer-readable medium described above may further include processes， features， means， or instructions for comparing the parity check value to a value of the dynamic frozen bit.

Some examples of the method， apparatus， and non-transitory computer-readable medium described above may further include processes， features， means， or instructions for determining that the at least one candidate path passes the parity check based at least in part on the comparison.

In some examples of the method， apparatus， and non-transitory computer-readable medium described above， determining respective path metrics for the each candidate path in the second subset comprises： adding a path metric penalty to a candidate path in the second subset based at least in part on determining that a calculated value of the dynamic frozen bit differs from a determined decision value of the dynamic frozen bit.

A method of wireless communication is described. The method may include allocating sub-channels of a polar code to a plurality of information bits， a plurality of error detection bits， and a plurality of dynamic frozen bits based at least in part on a reliability of each of the sub-channels， wherein a number of the plurality of error detection bits is based at least in part on a defined false alarm rate， and wherein each of the plurality of dynamic frozen bits includes a parity check value， and wherein a number of the plurality of dynamic frozen bits is based at least in part on a target detection rate during parity-directed successive cancellation list (SCL) decoding， generating the plurality of dynamic frozen bits based at least in part on a decoding order of the sub-channels， generating a codeword encoded using the polar code based at least in part on loading the plurality of information bits， the plurality of error detection bits， and the plurality of dynamic frozen bits into the allocated sub-channels， and transmitting the codeword.

An apparatus for wireless communication is described. The apparatus may include means for allocating sub-channels of a polar code to a plurality of information bits， a plurality of error detection bits， and a plurality of dynamic frozen bits based at least in part on a reliability of each of the sub-channels， wherein a number of the plurality of error detection bits is based at least in part on a defined false alarm rate， and wherein each of the plurality of dynamic frozen bits includes a parity check value， and wherein a number of the plurality of dynamic frozen bits is based at least in part on a target detection rate during parity-directed successive cancellation list (SCL) decoding， means for generating the plurality of dynamic frozen bits based at least in part on a decoding order of the sub-channels， means for generating a codeword encoded using the polar code based at least in part on loading the plurality of information bits， the plurality of error detection bits， and the plurality of dynamic frozen bits into the allocated sub-channels， and means for transmitting the codeword.

Another apparatus for wireless communication is described. The apparatus may include a processor， memory in electronic communication with the processor， and instructions stored in the memory. The instructions may be operable to cause the processor to allocate sub-channels of a polar code to a plurality of information bits， a plurality of error detection bits， and a plurality of dynamic frozen bits based at least in part on a reliability of each of the sub-channels， wherein a number of the plurality of error detection bits is based at least in part on a defined false alarm rate， and wherein each of the plurality of dynamic frozen bits includes a parity check value， and wherein a number of the plurality of dynamic frozen bits is based at least in part on a target detection rate during parity-directed successive cancellation list (SCL) decoding， generate the plurality of dynamic frozen bits based at least in part on a decoding order of the sub-channels， generate a codeword encoded using the polar code based at least in part on loading the plurality of information bits， the plurality of error detection bits， and the plurality of dynamic frozen bits into the allocated sub-channels， and transmit the codeword.

A non-transitory computer readable medium for wireless communication is described. The non-transitory computer-readable medium may include instructions operable to cause a processor to allocate sub-channels of a polar code to a plurality of information bits， a plurality of error detection bits， and a plurality of dynamic frozen bits based at least in part on a reliability of each of the sub-channels， wherein a number of the plurality of error detection bits is based at least in part on a defined false alarm rate， and wherein each of the plurality of dynamic frozen bits includes a parity check value， and wherein a number of the plurality of dynamic frozen bits is based at least in part on a target detection rate during parity-directed successive cancellation list (SCL) decoding， generate the plurality of dynamic frozen bits based at least in part on a decoding order of the sub-channels， generate a codeword encoded using the polar code based at least in part on loading the plurality of information bits， the plurality of error detection bits， and the plurality of dynamic frozen bits into the allocated sub-channels， and transmit the codeword.

In some examples of the method， apparatus， and non-transitory computer-readable medium described above， the number of the plurality of dynamic frozen bits may be based at least in part on enabling early termination during the parity-directed successive cancellation list (SCL) decoding.

In some examples of the method， apparatus， and non-transitory computer-readable medium described above， the number of the plurality of error detection bits may be based at least in part on a defined detection rate.

In some examples of the method， apparatus， and non-transitory computer-readable medium described above， allocating the sub-channels of the polar code further comprises： identifying a subset of the sub-channels for frozen bits. Some examples of the method， apparatus， and non-transitory computer-readable medium described above may further include processes， features， means， or instructions for allocating a first subset of sub-channels of the sub-channel subset of the polar code to the dynamic frozen bits having a higher reliability than a second subset of sub-channels of the sub-channel subset.

In some examples of the method， apparatus， and non-transitory computer-readable medium described above， the plurality of information bits and the plurality of error detection bits may be allocated to sub-channels having higher reliability than sub-channels allocated to the dynamic frozen bits.

Some examples of the method， apparatus， and non-transitory computer-readable medium described above may further include processes， features， means， or instructions for applying an error detecting algorithm to the plurality of information bits to generate the plurality of error detection bits.

In some examples of the method， apparatus， and non-transitory computer-readable medium described above， the error detecting algorithm may be a cyclic redundancy check (CRC) algorithm.

In some examples of the method， apparatus， and non-transitory computer-readable medium described above， generating the plurality of dynamic frozen bits comprises： applying a Boolean operation to subsets of the plurality of information bits to respectively generate values for the plurality of dynamic frozen bits.

A method of wireless communication is described. The method may include receiving a signal comprising a codeword encoded using a polar code， the codeword generated based at least in part on a plurality of dynamic frozen bits， a plurality of information bits， and a plurality of error detection bits for joint detection and decoding of the codeword， performing decoding of the codeword including at least： a parity check of a first subset of decoding paths for making a decision on early termination of decoding of the codeword based at least in part on the plurality of dynamic frozen bits， generating path metrics for a second subset of the decoding paths that each pass the parity check based at least in part on the dynamic frozen bits， and performing error detection on a bit sequence corresponding to one of the second subset of the decoding paths based at least in part on a representation of the plurality of error detection bits and the generated path metrics， and processing the information bits based at least in part on a result of the decoding.

An apparatus for wireless communication is described. The apparatus may include means for receiving a signal comprising a codeword encoded using a polar code， the codeword generated based at least in part on a plurality of dynamic frozen bits， a plurality of information bits， and a plurality of error detection bits for joint detection and decoding of the codeword， means for performing decoding of the codeword including at least： a parity check of a first subset of decoding paths for making a decision on early termination of decoding of the codeword based at least in part on the plurality of dynamic frozen bits， generating path metrics for a second subset of the decoding paths that each pass the parity check based at least in part on the dynamic frozen bits， and performing error detection on a bit sequence corresponding to one of the second subset of the decoding paths based at least in part on a representation of the plurality of error detection bits and the generated path metrics， and means for processing the information bits based at least in part on a result of the decoding.

Another apparatus for wireless communication is described. The apparatus may include a processor， memory in electronic communication with the processor， and instructions stored in the memory. The instructions may be operable to cause the processor to receive a signal comprising a codeword encoded using a polar code， the codeword generated based at least in part on a plurality of dynamic frozen bits， a plurality of information bits， and a plurality of error detection bits for joint detection and decoding of the codeword， perform decoding of the codeword including at least： a parity check of a first subset of decoding paths for making a decision on early termination of decoding of the codeword based at least in part on the plurality of dynamic frozen bits， generating path metrics for a second subset of the decoding paths that each pass the parity check based at least in part on the dynamic frozen bits， and performing error detection on a bit sequence corresponding to one of the second subset of the decoding paths based at least in part on a representation of the plurality of error detection bits and the generated path metrics， and process the information bits based at least in part on a result of the decoding.

A non-transitory computer readable medium for wireless communication is described. The non-transitory computer-readable medium may include instructions operable to cause a processor to receive a signal comprising a codeword encoded using a polar code， the codeword generated based at least in part on a plurality of dynamic frozen bits， a plurality of information bits， and a plurality of error detection bits for joint detection and decoding of the codeword， perform decoding of the codeword including at least： a parity check of a first subset of decoding paths for making a decision on early termination of decoding of the codeword based at least in part on the plurality of dynamic frozen bits， generating path metrics for a second subset of the decoding paths that each pass the parity check based at least in part on the dynamic frozen bits， and performing error detection on a bit sequence corresponding to one of the second subset of the decoding paths based at least in part on a representation of the plurality of error detection bits and the generated path metrics， and process the information bits based at least in part on a result of the decoding.

A method of wireless communication is described. The method may include receiving a signal comprising a codeword encoded using a polar code， the codeword generated based at least in part on a plurality of dynamic frozen bits， a plurality of information bits， and a plurality of error detection bits for joint detection and decoding of the codeword， performing decoding of the codeword including at least： parity checking a first subset of decoding paths for making a decision on early termination of decoding of the codeword based at least in part on the plurality of dynamic frozen bits， generating path metrics for a second subset of the decoding paths that each pass the parity check based at least in part on the dynamic frozen bits， and performing error detection on a bit sequence corresponding to one of the second subset of the decoding paths based at least in part on a representation of the plurality of error detection bits and the generated path metrics， and processing the information bits based at least in part on a result of the decoding.

An apparatus for wireless communication is described. The apparatus may include means for receiving a signal comprising a codeword encoded using a polar code， the codeword generated based at least in part on a plurality of dynamic frozen bits， a plurality of information bits， and a plurality of error detection bits for joint detection and decoding of the codeword， means for performing decoding of the codeword including at least： parity checking a first subset of decoding paths for making a decision on early termination of decoding of the codeword based at least in part on the plurality of dynamic frozen bits， generating path metrics for a second subset of the decoding paths that each pass the parity check based at least in part on the dynamic frozen bits， and performing error detection on a bit sequence corresponding to one of the second subset of the decoding paths based at least in part on a representation of the plurality of error detection bits and the generated path metrics， and means for processing the information bits based at least in part on a result of the decoding.

Another apparatus for wireless communication is described. The apparatus may include a processor， memory in electronic communication with the processor， and instructions stored in the memory. The instructions may be operable to cause the processor to receive a signal comprising a codeword encoded using a polar code， the codeword generated based at least in part on a plurality of dynamic frozen bits， a plurality of information bits， and a plurality of error detection bits for joint detection and decoding of the codeword， perform decoding of the codeword including at least： parity checking a first subset of decoding paths for making a decision on early termination of decoding of the codeword based at least in part on the plurality of dynamic frozen bits， generating path metrics for a second subset of the decoding paths that each pass the parity check based at least in part on the dynamic frozen bits， and performing error detection on a bit sequence corresponding to one of the second subset of the decoding paths based at least in part on a representation of the plurality of error detection bits and the generated path metrics， and process the information bits based at least in part on a result of the decoding.

A non-transitory computer readable medium for wireless communication is described. The non-transitory computer-readable medium may include instructions operable to cause a processor to receive a signal comprising a codeword encoded using a polar code， the codeword generated based at least in part on a plurality of dynamic frozen bits， a plurality of information bits， and a plurality of error detection bits for joint detection and decoding of the codeword， perform decoding of the codeword including at least： parity checking a first subset of decoding paths for making a decision on early termination of decoding of the codeword based at least in part on the plurality of dynamic frozen bits， generating path metrics for a second subset of the decoding paths that each pass the parity check based at least in part on the dynamic frozen bits， and performing error detection on a bit sequence corresponding to one of the second subset of the decoding paths based at least in part on a representation of the plurality of error detection bits and the generated path metrics， and process the information bits based at least in part on a result of the decoding.

Some examples of the method， apparatus， and non-transitory computer-readable medium described above may further include processes， features， means， or instructions for extending the decoding paths to obtain extended decoding paths， and selecting a subset of the extended decoding paths according to a path selection criterion. In some examples of the method， apparatus， and non-transitory computer-readable medium described above， the path selection criterion may be based at least in part on path metrics of the extended decoding paths.

Some examples of the method， apparatus， and non-transitory computer-readable medium described above may further include processes， features， means， or instructions for determining that all decoding paths in the subset of the extended decoding paths fail the parity check， and terminating decoding of the codeword. Some examples of the method， apparatus， and non-transitory computer-readable medium described above may further include processes， features， means， or instructions for determining that at least one decoding path in the subset of the extended decoding paths passes the parity check， and generating path metrics for the subset of the extended decoding paths.

Some examples of the method， apparatus， and non-transitory computer-readable medium described above may further include processes， features， means， or instructions for calculating a first error detection code based at least in part on the bit sequence， identifying a second error detection code based at least in part on the bit sequence， and comparing the first error detection code to the second error detection code.

Some examples of the method， apparatus， and non-transitory computer-readable medium described above may further include processes， features， means， or instructions for determining that the bit sequence passes error detection based at least in part on the comparison， and outputting the bit sequence. Some examples of the method， apparatus， and non-transitory computer-readable medium described above may further include processes， features， means， or instructions for determining that the bit sequence has failed error detection based at least in part on the comparison， and outputting an error based at least in part on the failure.

In some examples of the method， apparatus， and non-transitory computer-readable medium described above， performing decoding of the codeword including at least the parity check of the first subset of decoding paths comprises calculating a parity check value based at least in part on a plurality of bits of a first decoding path of the first subset of decoding paths occurring prior to a first dynamic frozen bit of the plurality of dynamic frozen bits along the first decoding path， and comparing the parity check value to a value of the first dynamic frozen bit.

Some examples of the method， apparatus， and non-transitory computer-readable medium described above may further include processes， features， means， or instructions for determining that the first decoding path passes the parity check based at least in part on the comparison. In some examples of the method， apparatus， and non-transitory computer-readable medium described above， performing decoding of the codeword including at least generating path metrics for the second subset of the decoding paths comprises adding a path metric penalty to a first decoding path in the second subset of the decoding paths based at least in part on determining that a calculated value of a first dynamic frozen bit of the plurality of dynamic frozen bits differs from a determined decision value of the dynamic frozen bit.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates an example of a system for wireless communication that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with aspects of the present disclosure.

FIG. 2 illustrates an example of a wireless communication system that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with aspects of the present disclosure.

FIG. 3 illustrates an example representation of sub-channels of a polar code in a decoding order that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with aspects of the present disclosure.

FIG. 4 illustrates an example of sub-channels of a polar code in a decoding order that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with aspects of the present disclosure.

FIG. 5 illustrates an example of sub-channels of a polar code in a decoding order that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with aspects of the present disclosure.

FIG. 6 illustrates an example of a payload that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with aspects of the present disclosure.

FIG. 7 illustrates an example diagram of a decoder that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with aspects of the present disclosure.

FIG. 8 illustrates an example of a flow diagram that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with aspects of the present disclosure.

FIG. 9 illustrates an example of a code tree that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with aspects of the present disclosure.

FIG. 10 illustrates an example of a code tree that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with aspects of the present disclosure.

FIG. 11 illustrates an example of a code tree that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with aspects of the present disclosure.

FIGs. 12 through 14 show block diagrams of a device that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with aspects of the present disclosure.

FIG. 15 illustrates a block diagram of a system including a UE that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with aspects of the present disclosure.

FIG. 16 illustrates a block diagram of a system including a base station that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with aspects of the present disclosure.

FIGs. 17 through 21 illustrate methods for dynamic frozen bits of polar codes for early termination and performance improvement in accordance with aspects of the present disclosure.

DETAILED DESCRIPTION

The described techniques relate to improved methods， systems， devices， or apparatuses that support dynamic frozen bits of polar codes for early termination and improved performance. A polar code is an example of a linear block error correcting code and is the first coding technique to provably achieve channel capacity. An encoder may receive an information vector including information bits for encoding， encode the information bits using a polar code to generate a codeword， and transmit the codeword via a wireless communication channel A decoder may receive the codeword and use a decoding technique attempting to retrieve the information bits from the codeword. In some cases， Successive Cancellation List (SCL) decoding may be used for decoding the codeword. In SCL decoding， a decoder may determine candidate paths through a code tree and， to limit computational complexity， keep only a list size L number of paths through the code tree at each decoding level. A candidate path may also be referred to herein as a decoding path. In an example， during decoding， a candidate path may be extended at each sub-channel of a code tree through hard decision values of ‘0’ or ‘1. ’ Extending L candidate paths by one additional bit results in 2L possible paths. In SCL decoding， a decoder may calculate a path metric for each candidate path and select L paths of the 2L possible paths having the best path metrics. A path metric may be a sum of costs for transitioning from bit value to bit value along a candidate path. Adding a bit having a particular value to a candidate path may be associated with a cost representing a probability of the bit value being correct.

In some cases， cyclic redundancy check (CRC) aided SCL (CA-SCL) decoding may be used to improve a detection rate at the expense of increasing a false alarm rate (FAR) (e.g.， the FAR may increase as the list size L increases) . In CA-SCL， the decoder may obtain a bit sequence corresponding to a candidate path， and extract information bits and CRC bits from the bit sequence. The decoder may apply the same CRC algorithm as applied by an encoder to the information bits to generate calculated CRC bits. The decoder may compare the calculated CRC bits with the extracted CRC bits looking for a match. If a match is found， the decoder determines that the codeword has been properly decoded and outputs the information bits from the bit sequence. If a match is not found， the decoder may check the bit sequence of a next candidate path. If all candidate paths fail CRC， the decoder may output a decoding error.

A polar code may be composed of multiple sub-channels having different levels of reliability. Sub-channel reliability may represent a capacity of the sub-channel to carry information as part of the encoded codeword. Sub-channels of a polar code having higher reliabilities are used to encode information bits and the remaining sub-channels are used to encode frozen bits. For N sub-channels， K information bits may be loaded into the K most reliable sub-channels and N-K frozen bits may be loaded into the N-K least reliable sub- channels， where K ＜ N. A frozen bit is a bit having a known value to a decoder and is generally set as ‘0’ . The value of a frozen bit， however， may be any value as long as the decoder knows or can calculate a value of the frozen bit value from information bits previously received (e.g.， bits decoded earlier based on a decoding order of the codeword) . A frozen bit having a value that is a function of previously received information bits may be referred to as a “dynamic frozen bit. ” In some examples， the dynamic frozen bit may be a parity check bit that has a value determined as a function of a defined number of bits preceding the dynamic frozen bit in a decoding order.

Dynamic frozen bits may improve performance by improving path metric weight distribution. When extending a candidate path through a code tree to include an additional bit that corresponds to the location of a dynamic frozen bit within the code tree， an SCL decoder may use a calculated dynamic frozen bit value to select L paths of 2L possible paths that pass a parity check. For example， the SCL decoder may calculate， for each of the 2L possible paths， a parity value as a function of information bits along a candidate path for comparing with the dynamic frozen bit value， and may select the L paths of the 2L possible paths where the calculated parity value matches the dynamic frozen bit value. The SCL decoder may then calculate a path metric for each of the selected L paths and may assign a penalty to a path metric if， for example， a calculated parity value of a bit differs from a hard decision for that bit. Path metric weight distribution may thus be improved by adding the penalty when a calculated parity value of a bit differs from a hard decision for that bit.

Dynamic frozen bits may be used for early termination of SCL decoding. When extending a candidate path through a code tree to include an additional bit that corresponds to the location of a dynamic frozen bit within the code tree， an SCL decoder may use path metrics to select L paths (e.g.， the best L paths) of the 2L possible paths. Then， the SCL decoder may calculate a parity value as a function of information bits along one of the selected L candidate paths for comparing with the dynamic frozen bit value. If the calculated value does not match the dynamic frozen bit value， the SCL decoder may determine that the candidate path has failed a parity check. If all of the selected L candidate paths fail the parity check， the SCL decoder may declare a decoding error and terminate decoding. Early termination of decoding may save power.

Conventionally， the benefits provided by detection performance improvement and early termination are not achieved simultaneously. To improve performance， parity checking of dynamic frozen bits are used to select paths that always pass the parity check and therefore bypass early termination. In contrast， early termination selects paths based on path metrics and uses the parity check for an early determination that none of the best candidate paths will be a correctly decoded sequence. In addition， using parity checking to select the candidate paths increases the probability of finding a correct codeword at the expense of increasing the false alarm rate.

To address these and other issues， the examples described herein may enable a decoder to simultaneously perform detection and CA-SCL decoding of a codeword encoded using a polar code. During encoding， a number of error detection bits may be increased to improve a false alarm rate， and dynamic frozen bits may be employed to simultaneously enable early termination and performance improvement. Performance may be improved by enabling a decoder to use CA-SCL decoding and early pruning of candidate paths. The proposed algorithm also improves decoder power efficiency by enabling early termination.

Aspects of the disclosure are initially described in the context of a wireless communications system. The wireless communications system may implement a parity-aided list decoding algorithm to that supports early termination and improved performance. Aspects of the disclosure are further illustrated by and described with reference to apparatus diagrams， system diagrams， and flowcharts that relate to dynamic frozen bits of polar codes for early termination and performance improvement.

FIG. 1 illustrates an example of a wireless communications system 100 in accordance with various aspects of the present disclosure. The wireless communications system 100 includes base stations 105， UEs 115， and a core network 130. In some examples， the wireless communications system 100 may be a Long Term Evolution (LTE) ， LTE-Advanced (LTE-A) network， or a New Radio (NR) network. In some cases， wireless communications system 100 may support enhanced broadband communications， ultra-reliable (i.e.， mission critical) communications， low latency communications， and communications with low-cost and low-complexity devices.

Transmitters， such as base stations 105 and UEs 115， may apply an error detection algorithm to information bits to generate bits of an error detection code， may generate dynamic frozen bits based on a decoding order， and may generate a payload that includes the bits of the error detection code， the information bits， and the dynamic frozen bits. A transmitter may perform a polar encoding algorithm on the payload to generate a polar-encoded codeword that is transmitted via a communication channel. Receivers， such as base stations 105 and UEs 115， may receive a signal that includes the polar-encoded codeword， and perform a parity-aided list decoding algorithm that supports early termination and improved performance.

In some instances， the base station 105 may be the transmitter and the UE 115 may be the receiver. In other instances， the UE 115 may be the transmitter and the base station 105 may be the receiver. In further instances， a first base station 105 may be the transmitter and a second base station 105 may be the receiver. In additional instances， a first UE 115 may be the transmitter and a second UE 115 may be the receiver. Devices other than a base station and a receiver may also be one or both of the transmitter and receiver.

Base stations 105 may wirelessly communicate with UEs 115 via one or more base station antennas. Each base station 105 may provide communication coverage for a respective geographic coverage area 110. Communication links 125 shown in wireless communications system 100 may include uplink transmissions from a UE 115 to a base station 105， or downlink transmissions from a base station 105 to a UE 115. Control information and data may be multiplexed on an uplink channel or downlink according to various techniques. Control information and data may be multiplexed on a downlink channel， for example， using time division multiplexing (TDM) techniques， frequency division multiplexing (FDM) techniques， or hybrid TDM-FDM techniques. In some examples， the control information transmitted during a transmission time interval (TTI) of a downlink channel may be distributed between different control regions in a cascaded manner (e.g.， between a common control region and one or more UE-specific control regions) .

UEs 115 may be dispersed throughout the wireless communications system 100， and each UE 115 may be stationary or mobile. A UE 115 may also be referred to as a mobile station， a subscriber station， a mobile unit， a subscriber unit， a wireless unit， a remote unit， a mobile device， a wireless device， a wireless communications device， a remote device， a mobile subscriber station， an access terminal， a mobile terminal， a wireless terminal， a remote terminal， a handset， a user agent， a mobile client， a client， or some other suitable terminology. A UE 115 may also be a cellular phone， a personal digital assistant (PDA) ， a wireless modem， a wireless communication device， a handheld device， a tablet computer， a laptop computer， a cordless phone， a personal electronic device， a handheld device， a personal computer， a wireless local loop (WLL) station， an Internet of Things (IoT) device， an Internet of Everything (IoE) device， a machine type communication (MTC) device， an appliance， an automobile， or the like.

In some cases， a UE 115 may also be able to communicate directly with other UEs (e.g.， using a peer-to-peer (P2P) or device-to-device (D2D) protocol) . One or more of a group of UEs 115 utilizing D2D communications may be within the coverage area 110 of a cell. Other UEs 115 in such a group may be outside the coverage area 110 of a cell， or otherwise unable to receive transmissions from a base station 105. In some cases， groups of UEs 115 communicating via D2D communications may utilize a one-to-many (1： M) system in which each UE 115 transmits to every other UE 115 in the group. In some cases， a base station 105 facilitates the scheduling of resources for D2D communications. In other cases， D2D communications are carried out independent of a base station 105.

Some UEs 115， such as MTC or IoT devices， may be low cost or low complexity devices， and may provide for automated communication between machines， i.e.， Machine-to-Machine (M2M) communication. M2M or MTC may refer to data communication technologies that allow devices to communicate with one another or a base station without human intervention. For example， M2M or MTC may refer to communications from devices that integrate sensors or meters to measure or capture information and relay that information to a central server or application program that can make use of the information or present the information to humans interacting with the program or application. Some UEs 115 may be designed to collect information or enable automated behavior of machines. Examples of applications for MTC devices include smart metering， inventory monitoring， water level monitoring， equipment monitoring， healthcare monitoring， wildlife monitoring， weather and geological event monitoring， fleet management and tracking， remote security sensing， physical access control， and transaction-based business charging.

In some cases， an MTC device may operate using half-duplex (one-way) communications at a reduced peak rate. MTC devices may also be configured to enter a power saving “deep sleep” mode when not engaging in active communications. In some cases， MTC or IoT devices may be designed to support mission critical functions and wireless communications system may be configured to provide ultra-reliable communications for these functions.

Base stations 105 may communicate with the core network 130 and with one another. For example， base stations 105 may interface with the core network 130 through backhaul links 132 (e.g.， S1， etc. ) . Base stations 105 may communicate with one another over backhaul links 134 (e.g.， X2， etc. ) either directly or indirectly (e.g.， through core network 130) . Base stations 105 may perform radio configuration and scheduling for communication with UEs 115， or may operate under the control of a base station controller (not shown) . In some examples， base stations 105 may be macro cells， small cells， hot spots， or the like. Base stations 105 may also be referred to as evolved NodeBs (eNBs) 105.

A base station 105 may be connected by an S1 interface to the core network 130. The core network may be an evolved packet core (EPC) ， which may include at least one mobility management entity (MME) ， at least one serving gateway (S-GW) ， and at least one Packet Data Network (PDN) gateway (P-GW) . The MME may be the control node that processes the signaling between the UE 115 and the EPC. All user Internet Protocol (IP) packets may be transferred through the S-GW， which itself may be connected to the P-GW. The P-GW may provide IP address allocation as well as other functions. The P-GW may be connected to the network operators IP services. The operators IP services may include the Internet， the Intranet， an IP Multimedia Subsystem (IMS) ， and a Packet-Switched (PS) Streaming Service.

The core network 130 may provide user authentication， access authorization， tracking， Internet Protocol (IP) connectivity， and other access， routing， or mobility functions. At least some of the network devices， such as base station 105 may include subcomponents such as an access network entity， which may be an example of an access node controller (ANC) . Each access network entity may communicate with a number of UEs 115 through a number of other access network transmission entities， each of which may be an example of a smart radio head， or a transmission/reception point (TRP) . In some configurations， various functions of each access network entity or base station 105 may be distributed across various network devices (e.g.， radio heads and access network controllers) or consolidated into a single network device (e.g.， a base station 105) .

Wireless communications system 100 may operate in an ultra-high frequency (UHF) region using frequency bands from 300 MHz to 3 GHz. This region may also be known as the decimeter band， since the wavelengths range from approximately one decimeter to one meter in length. UHF waves may propagate mainly by line of sight， and may be blocked by buildings and environmental features. However， the waves may penetrate walls sufficiently to provide service to UEs 115 located indoors. Transmission of UHF waves is characterized by smaller antennas and shorter range (e.g.， less than 100 km) compared to transmission using the smaller frequencies (and longer waves) of the high frequency (HF) or very high frequency (VHF) portion of the spectrum. Wireless communications system 100 may also operate in a super high frequency (SHF) region using frequency bands from 3 GHz to 30 GHz， otherwise known as the centimeter band. In some cases， wireless communication system 100 may also utilize extremely high frequency (EHF) portions of the spectrum (e.g.， from 30 GHz to 300 GHz) ， also known as the millimeter band. Systems that use this region may be referred to as millimeter wave (mmW) systems. Thus， EHF antennas may be even smaller and more closely spaced than UHF antennas. In some cases， this may facilitate use of antenna arrays within a UE 115 (e.g.， for directional beamforming) . However， EHF transmissions may be subject to even greater atmospheric attenuation and shorter range than UHF transmissions. Techniques disclosed herein may be employed across transmissions that use one or more different frequency regions.

Wireless communications system 100 may support millimeter wave (mmW) communications between UEs 115 and base stations 105. Devices operating in mmW， SHF， or EHF bands may have multiple antennas to allow beamforming. That is， a base station 105 may use multiple antennas or antenna arrays to conduct beamforming operations for directional communications with a UE 115. Beamforming (which may also be referred to as spatial filtering or directional transmission) is a signal processing technique that may be used at a transmitter (e.g.， a base station 105) to shape and/or steer an overall antenna beam in the direction of a target receiver (e.g.， a UE 115) . This may be achieved by combining elements in an antenna array in such a way that transmitted signals at particular angles experience constructive interference while others experience destructive interference. For example， base station 105 may have an antenna array with a number of rows and columns of antenna ports that the base station 105 may use for beamforming in its communication with UE 115. Signals may be transmitted multiple times in different directions (e.g.， each transmission may be beamformed differently) . A mmW receiver (e.g.， a UE 115) may try multiple beams (e.g.， antenna subarrays) while receiving the synchronization signals. Multiple-input multiple-output (MIMO) wireless systems use a transmission scheme between a transmitter (e.g.， a base station 105) and a receiver (e.g.， a UE 115) ， where both transmitter and receiver are equipped with multiple antennas.

In some cases， the antennas of a base station 105 or UE 115 may be located within one or more antenna arrays， which may support beamforming or MIMO operation. One or more base station antennas or antenna arrays may be collocated at an antenna assembly， such as an antenna tower. In some cases， antennas or antenna arrays associated with a base station 105 may be located in diverse geographic locations. A base station 105 may use multiple antennas or antenna arrays to conduct beamforming operations for directional communications with a UE 115.

In some cases， wireless communications system 100 may be a packet-based network that operates according to a layered protocol stack. In the user plane， communications at the bearer or Packet Data Convergence Protocol (PDCP) layer may be IP-based. A Radio Link Control (RLC) layer may in some cases perform packet segmentation and reassembly to communicate over logical channels. A Medium Access Control (MAC) layer may perform priority handling and multiplexing of logical channels into transport channels. The MAC layer may also use Hybrid ARQ (HARQ) to provide retransmission at the MAC layer to improve link efficiency. In the control plane， the Radio Resource Control (RRC) protocol layer may provide establishment， configuration， and maintenance of an RRC connection between a UE 115 and a network device， network device， or core network 130 supporting radio bearers for user plane data. At the Physical (PHY) layer， transport channels may be mapped to physical channels.

Time intervals in LTE or NR may be expressed in multiples of a basic time unit (which may be a sampling period of T_s ＝ 1/30,720,000 seconds) . Time resources may be organized according to radio frames of length of 10ms (T_f ＝ 307200T_s) ， which may be identified by a system frame number (SFN) ranging from 0 to 1023. Each frame may include ten 1ms subframes numbered from 0 to 9. A subframe may be further divided into two . 5ms slots， each of which contains 6 or 7 modulation symbol periods (depending on the length of the cyclic prefix prepended to each symbol) . Excluding the cyclic prefix， each symbol contains 2048 sample periods. In some cases the subframe may be the smallest scheduling unit， also known as a TTI. In other cases， a TTI may be shorter than a subframe or may be dynamically selected (e.g.， in short TTI bursts or in selected component carriers using short TTIs) .

A resource element may consist of one symbol period and one subcarrier (e.g.， a 15 KHz frequency range) . A resource block may contain 12 consecutive subcarriers in the frequency domain and， for a normal cyclic prefix in each OFDM symbol， 7 consecutive OFDM symbols in the time domain (1 slot) ， or 84 resource elements. The number of bits carried by each resource element may depend on the modulation scheme (the configuration of symbols that may be selected during each symbol period) . Thus， the more resource blocks that a UE receives and the higher the modulation scheme， the higher the data rate may be.

Wireless communications system 100 may support operation on multiple cells or carriers， a feature which may be referred to as carrier aggregation (CA) or multi-carrier operation. A carrier may also be referred to as a component carrier (CC) ， a layer， a channel， etc. The terms “carrier， ” “component carrier， ” “cell， ” and “channel” may be used interchangeably herein. A UE 115 may be configured with multiple downlink CCs and one or more uplink CCs for carrier aggregation. Carrier aggregation may be used with both FDD and TDD component carriers.

In some cases， wireless communications system 100 may utilize enhanced component carriers (eCCs) . An eCC may be characterized by one or more features including： wider bandwidth， shorter symbol duration， shorter TTIs， and modified control channel configuration. In some cases， an eCC may be associated with a carrier aggregation configuration or a dual connectivity configuration (e.g.， when multiple serving cells have a suboptimal or non-ideal backhaul link) . An eCC may also be configured for use in unlicensed spectrum or shared spectrum (where more than one operator is allowed to use the spectrum) . An eCC characterized by wide bandwidth may include one or more segments that may be utilized by UEs 115 that are not capable of monitoring the whole bandwidth or prefer to use a limited bandwidth (e.g.， to conserve power) .

In some cases， an eCC may utilize a different symbol duration than other CCs， which may include use of a reduced symbol duration as compared with symbol durations of the other CCs. A shorter symbol duration is associated with increased subcarrier spacing. A device， such as a UE 115 or base station 105， utilizing eCCs may transmit wideband signals (e.g.， 20， 40， 60， 80 MHz， etc. ) at reduced symbol durations (e.g.， 16.67 microseconds) . A TTI in eCC may consist of one or multiple symbols. In some cases， the TTI duration (that is， the number of symbols in a TTI) may be variable.

A shared radio frequency spectrum band may be utilized in an NR shared spectrum system. For example， an NR shared spectrum may utilize any combination of licensed， shared， and unlicensed spectrums， among others. The flexibility of eCC symbol duration and subcarrier spacing may allow for the use of eCC across multiple spectrums. In some examples， NR shared spectrum may increase spectrum utilization and spectral efficiency， specifically through dynamic vertical (e.g.， across frequency) and horizontal (e.g.， across time) sharing of resources.

In some cases， wireless communications system 100 may utilize both licensed and unlicensed radio frequency spectrum bands. For example， wireless communications system 100 may employ LTE License Assisted Access (LTE-LAA) or LTE Unlicensed (LTE U) radio access technology or NR technology in an unlicensed band such as the 5Ghz Industrial， Scientific， and Medical (ISM) band. When operating in unlicensed radio frequency spectrum bands， wireless devices such as base stations 105 and UEs 115 may employ listen-before-talk (LBT) procedures to ensure the channel is clear before transmitting data. In some cases， operations in unlicensed bands may be based on a CA configuration in conjunction with CCs operating in a licensed band. Operations in unlicensed spectrum may include downlink transmissions， uplink transmissions， or both. Duplexing in unlicensed spectrum may be based on frequency division duplexing (FDD) ， time division duplexing (TDD) or a combination of both.

The wireless communications system 100 may implement a parity-aided list decoding algorithm to that supports early termination and improved performance. Dynamic frozen bits may be generated， and a length of EDC bits may be selected， to achieve a desired false alarm rate， a desired detection rate， and parity-based early termination of a decoding process.

FIG. 2 illustrates an example of a wireless communications system 200 that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with various aspects of the present disclosure. In some examples， wireless communications system 200 may implement aspects of wireless communications system 100. Wireless communications system 200 may include a base station 105-a and a UE 115-a. Base station 105-a is an example of base station 105 of FIG. 1， and user equipment 115-a is an example of user equipment 115 of FIG. 1.

Base station 105-a may use polar encoding to encode information bits for transmission to UE 115-a via a communication channel 235. In other examples， user equipment 115-a may encode data for transmission to base station 105-a or another UE using these same techniques. In further examples， base station 105-a may encode data for transmission to another base station 105-a using these same techniques. Moreover， devices other than base station 105-a and user equipment 115-a may use the techniques described herein.

In the depicted example， base station 105-a may include a data source 205， an error detecting code (EDC) encoder 210， a dynamic frozen bit generator 215， a polar encoder 220， a rate matcher 225， and a modulator 230. The data source 205 may provide an information vector of k information bits to be encoded and transmitted to the UE 115-a. The data source 205 may be coupled to a network， a storage device， or the like. The data source 205 may output the information vector to the EDC encoder 210.

The EDC encoder 210 may apply an error detecting algorithm to the information vector to generate an EDC value. The EDC value may be a sequence to enable the UE 115-a to detect an error in the information vector due to， for example， corruption caused by noise in a transmission channel 235. In an example， the EDC algorithm may be a cyclic redundancy check (CRC) algorithm and the EDC value may be a CRC. The length of the EDC value in bits may be selected to enable the UE 115-a to identify errors in a received message that includes the information vector and to suppress a false alarm rate. In some examples， the selected number of bits of the EDC value may be based at least in part on a defined false alarm rate， a defined detection rate， or both. Increasing the length of the EDC value in bits improves the ability to identify errors and reduces the false alarm rate. In an example， the EDC value may have a length of m+c bits， where m is the number of bits in the EDC value for error detection and c is the number of bits in the EDC for false alarm suppression. In some instances， the length m may be a fixed number (e.g.， 16 bits) and the length c may be a function of a false alarm rate. In some instances， each of the base station 105-a and the UE 115-a may be aware of length m， and may derive length c from the number of bits in the EDC value and length m. Having a length of m+c bits may serve dual purposes of maintaining an acceptable rate of signal detection and for suppressing the false alarm rate. The EDC encoder 210 may append the EDC value to the information vector to generate a payload having k + m + c bits. The EDC encoder 210 may output the payload to the dynamic frozen bit generator 215.

The dynamic frozen bit generator 215 may generate values for dynamic frozen bits as a function of information bits， EDC bits， or both， that precede each the location of each dynamic frozen bit in a decoding order of the codeword. FIG. 3 illustrates an example of a diagram 300 of sub-channels of a polar code in a decoding order that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with various aspects of the present disclosure. The dynamic frozen bit generator 215 may identify sub-channels of a polar code in a decoding order. The decoding order may be the order in which the decoder 245 decodes sub-channels of a polar code. The dynamic frozen bit generator 215 may determine the decoding order or otherwise be aware of the decoding order (e.g.， access a table in memory that includes the decoding order) . The decoding order may indicate which sub-channels include information bits， EDC bits， dynamic frozen bits， and frozen bits. Sub-channels of a polar code having higher reliabilities are used to encode information bits and the remaining sub-channels are used to encode frozen bits. For N sub-channels， K information bits may be loaded into the K most reliable sub-channels and N-K frozen bits may be loaded into the N-K sub-channels the least reliable sub-channels， where K ＜ N. Diagram 300 depicts N sub-channels in a decoding order with sub-channel 0 on the left， followed by sub-channel 1， and proceeding sequentially to sub-channel N-1. Sub-channels 305 corresponding to frozen bits are depicted using dashed lines， and sub-channels 310 corresponding to information bits or EDC bits are depicted using solid lines. The depicted location of the sub-channels within the decoding order is an example and the location of any particular sub-channel may depend on its reliability relative to other sub-channels of the polar code.

The dynamic frozen bit generator 215 may select a defined number of the best frozen bit sub-channels to be dynamic frozen bit sub-channels. FIG. 4 illustrates an example of diagram 400 of sub-channels of a polar code in a decoding order that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with various aspects of the present disclosure. In an example， the dynamic frozen bit generator 215 may determine or otherwise be aware of the reliability of the frozen bit sub-channels (e.g.， access a table stored in memory indicating a reliability order of the sub-channels) . The number of the dynamic frozen bits may be based at least in part on a target detection rate during parity-directed SCL decoding， on enabling early termination during the parity-directed SCL decoding， or both. In an example， if there are 24 frozen bit sub-channels， the dynamic frozen bit generator 215 may select the j most reliable of the 24 dynamic frozen bit sub-channels as the dynamic frozen bit sub-channels (e.g.， j ＝ 8) . The remaining frozen bit sub-channels may be loaded with a defined value (e.g.， ‘0’ ) . In FIG. 4， frozen bit sub-channels 405-a and 405-b are selected as the dynamic frozen bit sub-channels. In some examples， so that the dynamic frozen bit sub-channels are at least somewhat uniformly dispersed throughout the decoding order， the dynamic frozen bit generator 215 may avoid selecting consecutive frozen bit sub-channels， or sub-channels within a defined number of sub-channels， as dynamic frozen bit sub-channels. When two consecutive (or within a defined number of ) frozen bit sub-channels would be selected based on reliability， the dynamic frozen bit generator 215 may only select one of the two and select a next most less reliable sub-channel that is not consecutive (or not within a defined number of frozen bit sub-channels) to be the next dynamic frozen bit sub-channel.

The dynamic frozen bit generator 215 may then calculate values of the dynamic frozen bits. FIG. 5 illustrates an example of diagram 500 of sub-channels of a polar code in a decoding order that supports dynamic frozen bits of polar codes for early termination and improved detection performance. In some examples， the value of a dynamic frozen bit may be a function of a defined number of information bits， EDC bits， or both， that precede a dynamic frozen bit sub-channel in the decoding order. In the depicted example， the value of dynamic frozen bit at sub-channel 405-a may be a function of the bit values at information bit sub-channel 310-a， EDC bit sub-channel 310-b， and information bit sub-channel 310-c， and the value of dynamic frozen bit at sub-channel 405-b may be a function of the bit values at EDC bit sub-channel 310-d， EDC bit sub-channel 310-e， and information bit sub-channel 310-f. For example， the dynamic frozen bit generator 215 may perform a Boolean operation (e.g.， exclusive-or (XOR) ) on the bit values at sub-channels 310-a， 310-b， and 310-c to calculate the value of the dynamic frozen bit at sub-channel 405-a， and may perform the Boolean operation (e.g.， XOR) on the bit values at sub-channels 310-d， 310-e， and 310-f to calculate the value of the dynamic frozen bit at sub-channel 405-b. In some cases， one or more frozen bit sub-channels may be in a preceding interval 505-a that includes the sub-channels 310-a， 310-b， and 310-c and the bit values of those frozen bit sub-channels 305 may be ignored (e.g.， not counted for the defined number of bits used for determination of the dynamic frozen bit) . Likewise， one or more frozen bit sub-channels may be in a preceding interval 505-b that includes the sub-channels 310-d， 310-e， and 310-f and the bit values of those frozen bit sub-channels may be ignored. In some examples， the dynamic frozen bit generator 215 may perform the Boolean operation using bit values from two or more preceding sub-channels in the decoding order (e.g.， immediately preceding non-frozen bit channels) . In some cases， the number of dynamic frozen bits may be a function of the total number of information and EDC bits (e.g.， a function of k+m+c) . For example， the number of dynamic frozen bits may be determined as j ≈ (k+m+c) /g， where g is the number of information bits or EDC bits used for computation of each dynamic frozen bit.

In some examples， the calculated value of each dynamic frozen bit at each sub-channel 405 may be used as a parity check during decoding. Because locations of the dynamic frozen bit sub-channels are at least somewhat dispersed throughout the decoding order， the parity check may provide information in decoding related to the probability of candidate paths resulting in correct decoding (e.g.， passing the EDC) .

Referring again to FIG. 2， the dynamic frozen bit generator 215 may generate the values of the dynamic frozen bit sub-channels and output a payload to the polar encoder 220 for polar encoding. FIG. 6 illustrates an example of a payload 600 that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with various aspects of the present disclosure. The payload 600 may include information bits 605， false alarm rate (FAR) EDC bits 610， error detection EDC bits 615， dynamic frozen bits 620， and frozen bits 625. The frozen bits 625 may be assigned a defined bit value (e.g.， zero) . In some examples， the FAR EDC bits 610 and error detection EDC bits 615 may be included in a joint EDC value (e.g.， determined by a single EDC function) . The number of FAR EDC bits 610 may be determined based on normalization of FAR for a list decoder. For example， the number of FAR EDC bits 610 may constrain a number of the candidate paths generated by the list decoder that are to be checked using the EDC in order to not exceed a predetermined FAR. A list decoder may flexibly apply decoding techniques (e.g.， list size， candidate path selection， etc. ) ， so long as the predetermined FAR using the number of FAR EDC bits 610 is not exceeded.

Referring again to FIG. 2， the polar encoder 220 may perform polar encoding on the payload 600 to generate a polar-encoded codeword (e.g.， of N bits) . The polar encoder 220 may allocate sub-channels of a polar code to information bits， EDC bits， dynamic frozen bits， and frozen bits based at least in part on a reliability of each of the sub-channels. The polar encoder 220 may allocate the sub-channels based on reliability， with the most reliable sub-channels allocated to information bits， EDC bits， or both， a next most reliable subset of the sub-channels allocated to the dynamic frozen bits， and a remaining subset of the sub-channels allocated to the frozen bits. In some examples， the polar encoder 220 may generate a codeword by multiplying a generator matrix with a constructed bit sequence of the payload 600. The rate matcher 225 may receive the codeword from the polar encoder 220 and perform rate matching. Rate matching may involve selecting some of the coded bits of the codeword for transmission in a particular TTI. The modulator 230 may modulate the polar-encoded codeword for transmission via wireless communication channel 235 which may distort the signal carrying the polar-encoded codeword with noise.

The UE 115-a may receive a signal that includes the polar-encoded codeword. In an example， the UE 115-a may include a demodulator 240， a decoder 245， and a data sink 250. The demodulator 240 may receive the signal including the polar-encoded codeword and input the demodulated signal into decoder 245 for decoding of the polar-encoded codeword. The demodulated signal may be， for example， a sequence of logarithmic-likelihood ratio (LLR) values representing a probability value of a received bit being a ‘0’ or a ‘1’ . The decoder 245 may perform a list decoding algorithm on the LLR values (e.g.， CA-SCL decoding， SCL decoding， ) and may provide an output. If successfully able to decode the polar-encoded codeword， the decoder 245 may output a bit sequence of the information vector (e.g.， the k information bits input to the EDC encoder 210) to a data sink 250 for use， storage， communication to another device (e.g.， transmission via a wired or wireless communication channel) ， communication via a network， or the like. Otherwise， the decoder 245 may indicate that decoding was unsuccessful. As noted above， while the example of FIG. 2 describes the base station 105-a performing the encoding and user equipment 115-a performing the decoding， the roles may be reversed. Moreover， devices other than the base station 105-a and the user equipment 115-a may perform the encoding and decoding.

According to various aspects， the decoder 245 may perform a decoding technique that simultaneously improves performance and supports early termination， as described below. Performing decoding of the codeword may include at least a parity check of a first subset of decoding paths for making a decision on early termination of decoding of the codeword based at least in part on the plurality of dynamic frozen bits， generating path metrics for a second subset of the decoding paths that each pass the parity check based at least in part on the dynamic frozen bits， and performing error detection on a bit sequence corresponding to at least one of the second subset of the decoding paths based at least in part on a representation of the plurality of error detection bits and the generated path metrics.

FIG. 7 illustrates an example diagram 700 of a decoder that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with various aspects of the present disclosure. In some examples， decoder 245-a may implement aspects of decoder 245.

The decoder 245-a may include a list decoder 705， a parity checker 710， and an error detector 715. The list decoder 705 may perform a path search algorithm to search a code tree for decoding a received polar-encoded codeword. As explained below in further detail， the list decoder 705 may identify candidate paths through the code tree. The parity checker 710 may perform parity checking for determining whether to terminate a list decoding process early and may include a feedback path 720 for instructing the list decoder 705 when to terminate decoding. The parity checker 710 may also determine path metrics for candidate paths through the code tree that satisfy a parity check based on the dynamic frozen bits. If the decoding process does not terminate early， the list decoder 705 may determine a list size L of candidate paths and output bit sequences corresponding to the L candidate paths to the error detector 715 for error detection. In some examples， L may be greater than the number of EDC bits c used for false alarm rate suppression. In this case， 2^c paths of the L paths (e.g.， the 2^c paths having the highest path metrics) may be checked by error detector 715， while the other paths may be discarded. The error detector 715 may iteratively perform an error detection algorithm on the bit sequences in an order based on the path metrics. The error detector 715 may stop as soon as one of the bit sequences passes the error detection algorithm， or all of the bit sequences have been checked and none passed the error detection algorithm.

FIG. 8 illustrates an example of a flow diagram 800 that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with various aspects of the present disclosure. Blocks 810 to 830 describe operations for determining whether to terminate the decoding process early， and blocks 835-850 describe techniques for performance improvement. The flow diagram 800 may begin at 805 and proceed to block 810.

At 810， the list decoder 705 of decoder 245-a may perform a list decoding algorithm on a received codeword encoded using a polar code， identify L candidate paths at a particular level in a code tree， and determine that a bit location at a next level of the code tree corresponds to a dynamic frozen bit. The list decoder 705 may be， for example， an SCL decoder， a CA-SCL decoder， or the like.

At 815， the list decoder 705 generate an extended set of candidate paths through a code tree by extending L candidate paths to include an additional bit. FIG. 9 illustrates an example of a code tree 900 that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with various aspects of the present disclosure. Code tree 900 is a graphical representation of how list decoder 705 performs the list decoding process. The code tree 900 includes multiple nodes 905 and a line between pairs of nodes is referred to herein as a branch 950 (e.g.， branch 950-a connects node 905-a to node 905-b， and branch 950-b connects node 905-a to node 905-i) . Each branch 950 is associated with a possible value for a bit， which may be a ‘1’ or a ‘0’ . Branch 950-a is associated with a bit being a ‘0’ ， and branch 950-b is associated with the bit being a ‘1’ . Each branch 950 is also associated with a value for a metric. The metric value may represent a cost for proceeding from one node to the next. The metric may be， for example， a distance metric (e.g.， LLR converted to a distance) or a probability metric (e.g.， LLR， etc. ) . The metric may represent a likelihood of moving from one node to the next based on whether the next bit in the sequence is a 1 or a 0. In some instances， the metric may represent a distance value between nodes.

The list decoder 705 may process demapped symbols output by the demodulator 240 and determine the probability (e.g.， LLR value) of whether bits corresponding to the demapped symbols are ‘0s’ or ‘1s’ . The determination of the probability of whether a particular bit value is a ‘0’ or a ‘1’ may also be a function of prior decoding decisions. This process is reflected in the code tree 900.

The list decoder 705 may initially begin at node 905-a and process the LLR values to determine along which branch to procced. At node 905-a， the list decoder 705 may determine the likelihood of whether a LLR value is a ‘0’ or a ‘1’ ， and hence may proceed to either node 905-b or node 905-i. Node 905-b may be associated with the first bit being a ‘0’ ， and node 905-i may be associated with the first bit being a ‘1’ . Each branch 950-a， 950-b is associated with a value for a metric (e.g.， branch metrics) and the list decoder 705 accumulates the branch metric values as it traverses branches 950 in the code tree 900 to generate a path metric. Accumulation to form the path metric may be performed at each node 905 (e.g.， for each bit-channel of the polar code having an information bit or dynamic frozen bit， etc. ) and may involve， for example， adding the metric value of each branch along a path. A path may refer to a particular route between nodes 905 through the code tree 900. The list decoder 705 selects which of the paths is the best using the accumulated path metrics.

In some instances， the list decoder 705 may maintain a respective path metric for every possible path through code tree 900. Retaining path metrics for all possible paths may be computationally expensive and， in other instances， the list decoder 705 may use the path metrics to prune selected paths. For example， the list decoder 705 may have a list size L that limits the number of paths that are maintained at each level of the code tree. To do so， the list decoder 705 may maintain up to L candidate paths at each level， and discard the remaining candidate paths. In an example， FIG. 9 depicts level 0 to level 3. If L ＝ 4， the list decoder 705 may maintain up to 4 paths at each level， and may discard any additional paths. At level 1， there are two possible paths (e.g.， node 905-a to node 905-b， and node 905-a to node 905-i) ， and hence the list decoder 705 may maintain both paths. At level 2， there are four possible paths (e.g.， node 905-a to node 905-b to node 905-c， node 905-a to node 905-b to node 905-f， node 905-a to node 905-i to node 905-j， and node 905-a to node 905-i to node 905-m) ， and hence the list decoder 705 may maintain all 4 paths. At level three， there are 8 possible paths， and hence the list decoder 705 may maintain 4 of the 8 paths. At each subsequent level the number of possible paths doubles (e.g.， level four has 16 possible paths， level five has 32 possible paths， and so forth) ， and the list decoder 705 may maintain 4 of the paths.

To generate an extended set of candidate paths through a code tree， the list decoder 705 may extend L candidate paths from one level to the next to identify 2L possible candidate paths. FIG. 10 illustrates an example of a code tree 1000 that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with various aspects of the present disclosure. As shown， the list decoder 705 is extending the paths 1010 from the nodes at level 2 to the nodes at level 3. As depicted， path 1010-a includes node 905-a， 905-b， and 905-c， and may be extended to either node 905-d or 905-e. Path 1010-b includes node 905-a， 905-b， and 905-f， and may be extended to either node 905-g or 905-h. Path 1010-c includes node 905-a， 905-i， and 905-j， and may be extended to either node 905-k or 905-l. Path 1010-d includes node 905-a， 905-i， and 905-m， and may be extended to either node 905-n or 905-o.

Referring again to FIG. 8， at block 820， the list decoder 705 may select a first subset of the extended set of candidate paths according to a first path selection criterion. In an example， the path selection criterion may be a path metric， and the list decoder 705 may retain L paths of the 2L possible paths having the best path metrics. The list decoder 705 may use the path metrics， which are accumulated metric values， for determining which paths to keep (e.g.， minimum accumulated distance， highest accumulated probability， etc. ) . For example， with reference to FIG. 10， the list decoder 705 may add a metric value for the branch proceeding from node 905-c to node 905-d to an accumulated value for path 1010-a to determine a path metric to extend path 1010-a to node 905-d. The list decoder 705 may make a similar determination for extending all of the paths 1010 to any of the nodes in level 3. In this example， the list decoder 705 may have 8 possible paths to the nodes in level 3 and determine a path metric for each of the 8 possible paths. Because L ＝ 4， the list decoder 705 may select 4 of the 8 paths that have the best path metric (e.g.， minimum accumulated distance， highest accumulated probability， etc. ) . For example， the list decoder 705 may determine， based on the path metrics， that the 4 best of the extended candidate paths are extending candidate path 1010-a to node 905-d， extending candidate path 1010-b to node 905-g， extending candidate path 1010-c to node 905-l， and extending candidate path 1010-d to node 905-n， and may select a first subset of the extended set of candidate paths accordingly.

Referring again to FIG. 8， at block 825， the parity checker 710 may determine whether all paths in the first subset of the extended set of candidate paths fail a parity check. In an example， the parity checker 710 may perform a parity check of a first subset of decoding paths for making a decision on early termination of decoding of the codeword based at least in part on the dynamic frozen bits used to generate the codeword. In a further example， with reference to FIG. 10， level 3 of the code tree may correspond to a location of a dynamic frozen bit and the parity checker 710 may use the value of the dynamic frozen bit as a parity check on the first subset of the extended set of candidate paths. The parity checker 710 may calculate a parity value of preceding information bits， EDC bits， or both， along a candidate path for comparison with the dynamic frozen bit value along the candidate path. For example， the parity checker 710 may perform a Boolean operation (e.g.， XOR) on values of a defined number of information bits， EDC bits， or both， along extended candidate path 1010-a to node 905-d， to calculate a parity value， and compare the calculated value with the value represented by the branch between nodes 905-c and 905-d. With reference to FIG. 5， the parity checker 710 may also ignore bits along an extended candidate path in the decoding order corresponding to frozen bits when calculating the parity value.

In example， in code tree 1000， candidate path 1010-a corresponds to a bit sequence of [0， 0， 0] ， and let the first bit be an information bit， the second bit be an EDC bit， and the third bit be a dynamic frozen bit. In this example， the value of the dynamic frozen bit may be determined as the exclusive-or of the first and second bits. The parity checker 710 may compare the calculated parity value to a value of the dynamic frozen bit value along the candidate path. In this example， the parity checker 710 may calculate the XOR of the first two bits which results in a value of ‘0’ (e.g.， 0 XOR 0 ＝ 0) . Here， the parity checker 710 determines that the calculated value matches the value of the dynamic frozen bit (e.g.， value represented by the branch between nodes 905-c and 905-d) ， and hence candidate path 1010-a passes the parity check. If， however， the calculated parity value does not match the dynamic frozen bit value， the parity checker 710 may determine that the candidate path has failed a parity check. If all of the L candidate paths 1010 of the first subset of the extended candidate paths fail the parity check， the parity checker 710 may declare a decoding error， and， with reference to FIG. 8， proceed to block 830 and terminate decoding. Early termination of decoding may save power. If the calculated parity value matches the dynamic frozen bit value for at least one of the extended candidate paths， the flow diagram 800 may proceed to block 835.

At block 835， the parity checker 710 may select a second subset of the extended candidate paths according to a second path selection criterion. For example， the parity checker 710 may generate path metrics for a second subset of the decoding paths that each pass the parity check based at least in part on the dynamic frozen bits. In some examples， the second path selection criterion may be to select， from the possible 2L extended candidate paths， the L candidate paths that each pass a parity check based on the dynamic frozen bit. FIG. 11 illustrates an example of a code tree 1100 depicting candidate paths that pass a parity check that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with various aspects of the present disclosure. Continuing the example of FIG. 10， the value of the dynamic frozen bit may be determined as the exclusive- or of the first and second bits. As depicted， the parity checker 710 selects candidate paths 1110-a， 1110-b， 1110-c， and 1110-d as the second subset of the extended candidate paths because the value of the third bit of each candidate path the same as the value of the exclusive-or of the two preceding bits. It is noted that the candidate paths 1110 in the second subset of the extended candidate paths of may be different for some nodes of the code tree than the candidate paths 1010 in the first subset of the extended candidate paths as is shown in FIGs. 10 and 11. For other nodes of the code tree， the candidate paths 1110 in the second subset of the extended candidate paths may be the same as the candidate paths 1010 in the first subset of the extended candidate paths (e.g.， the L best paths may all pass the parity check at a given node of the code tree) .

Referring again to FIG. 8， at block 840， the list decoder 705 may determine a path metric for each extended candidate path in the second subset of the extended set of the candidate paths. For example， the parity checker 710 may instruct the list decoder 705 to determine a path metric for each of candidate paths 1110-a， 1110-b， 1110-c， and 1110-d in the second subset of extended candidate paths similar to the description provided above in FIG. 9. The list decoder 705 may ignore other possible paths through the code tree 1100 and continue the list decoding process. Additionally or alternatively， the list decoder 705 may add a penalty to a path metric for any of the candidate paths where a calculated value of the dynamic frozen bit differs from a determined decision value (e.g.， hard decision value) of the dynamic frozen bit.

At block 845， the list decoder 705 may determine whether there are any additional dynamic frozen bits expected in the decoding order. In an example with reference to FIG. 5， the list decoder 705 may be aware of which bits are placed in which sub-channels， may currently be at the location of the dynamic frozen bit sub-channel 405-a within the decoding order， and may determine that at least one additional dynamic frozen bit sub-channel (e.g.， 405-b) occurs later in the decoding order. If yes， the flow diagram 800 may proceed to block 850 and the list decoder 705 may determine when the next dynamic frozen bit is reached in the decoding order. When reached， the flow diagram 800 may return to block 810 and perform the subsequent blocks as described above. In some cases， in the second and subsequent passes through block 815， the list decoder 705 may generate the extended set of candidate paths by extending the candidate paths of the second subset of the prior set of extended candidate paths selected at the prior instance of block 835. If there are no additional dynamic frozen bits in the decoding order， the flow diagram 800 may proceed to block 855 and may end dynamic frozen bit processing.

Reaching block 855 in the flow diagram may indicate that the list decoding algorithm was not terminated early， and that up to a list size L of candidate paths are available for performing error detection on corresponding bit sequences. With reference to FIG. 7， once the end of the decoding order has been reached， the list decoder 705 may determine a list size L of candidate paths. The list decoder 705 may extract a bit sequence of k + m + c bits from each of the candidate paths (e.g.， k information bits， m error detection EDC bits， c FAR EDC bits) . The list decoder 705 may be aware of the locations of the dynamic frozen bits and the frozen bits within each of the candidate paths and may not include the values of the dynamic frozen bits and the frozen bits in the extracted bit sequences. The list decoder 705 may output each bit sequence to the error detector 715 (directly or via parity checker 710) . The list decoder 705 also may output an order in which to check the bit sequences based on a path metric of corresponding candidate paths， such that a bit sequence corresponding to the best path metric is checked first， followed by a bit sequence corresponding to the next best path metric is checked second， and so forth until a bit sequence corresponding to the worst path metric of the L candidate paths is checked last.

The error detector 715 may perform an error detecting algorithm for determining whether any of the bit sequences passes EDC (e.g.， a CRC algorithm) . As described above， the polar-encoded codeword may be generated by polar encoding a payload 600 that includes an information vector and an EDC. If the bit sequence obtained from a particular candidate path is the same as the bit sequence of the information vector and the EDC， the error detector 715 should be able to parse the bit sequence corresponding to the particular candidate path to recover the information vector and the received EDC. The error detector 715 may then generate a calculated EDC using the parsed information vector by applying the same algorithm to the parsed information vector as applied by the EDC encoder 210. If the calculated EDC is the same as the received EDC， the error detector 715 determines that it was able to successfully able to decode the polar-encoded codeword and outputs the bit sequence of the information vector， with or without the EDC. If not the same， the error detector 715 indicates a decoding failure for that bit sequence. The error detector 715 checks a bit sequence associated with a next highest path metric to see if that bit sequence passes error detection. The error detector 715 thus proceeds from bit sequence to bit sequence until one of the bit sequences passes or all fail. If all paths have been checked， the error detector 715 indicates a decoding failure.

Advantageously， the examples described herein use a defined number dynamic frozen bits to simultaneously support early termination and performance improvement. A size of a single EDC may be selected to beneficially support both detection and decoding with CA-SCL that reduces EDC overhead. In some instances， the benefits described herein may be achieved using a selected number j of dynamic frozen bits (e.g.， j ＝ 8) to provide a target detection rate. That is， the number j of dynamic frozen bits may provide a target detection rate (which may be an enhancement to a detection rate without the dynamic frozen bits) when path selection is aided using the dynamic frozen bits as described with reference to FIG. 8. The sub-channels of a polar code allocated to the dynamic frozen bits may be the most reliable of the sub-channels allocated for transporting frozen bits. Further， the value of each dynamic frozen bit may be calculated using a Boolean operation (e.g.， XOR operation) of a defined number d of information bits， CRC bits， or both (e.g.， d ＝ 3) that precede a dynamic frozen bit in a decoding order.

FIG. 12 shows a block diagram 1200 of a wireless device 1205 that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with aspects of the present disclosure. Wireless device 1205 may be an example of aspects of a user equipment (UE) 115 or base station 105 as described herein. Wireless device 1205 may include receiver 1210， communications manager 1215， and transmitter 1220. Wireless device 1205 may also include a processor. Each of these components may be in communication with one another (e.g.， via one or more buses) .

Receiver 1210 may receive information such as packets， user data， or control information associated with various information channels (e.g.， control channels， data channels， and information related to dynamic frozen bits of polar codes for early termination and performance improvement， etc. ) . Information may be passed on to other components of the device. The receiver 1210 may be an example of aspects of the transceiver 1535 described with reference to FIG. 15. The receiver 1210 may utilize a single antenna or a set of antennas.

Communications manager 1215 may be an example of aspects of the communications manager 1515 described with reference to FIG. 15.

Communications manager 1215 and/or at least some of its various sub-components may be implemented in hardware， software executed by a processor， firmware， or any combination thereof. If implemented in software executed by a processor， the functions of the communications manager 1215 and/or at least some of its various sub-components may be executed by a general-purpose processor， a digital signal processor (DSP) ， an application-specific integrated circuit (ASIC) ， an field-programmable gate array (FPGA) or other programmable logic device， discrete gate or transistor logic， discrete hardware components， or any combination thereof designed to perform the functions described in the present disclosure. The communications manager 1215 and/or at least some of its various sub-components may be physically located at various positions， including being distributed such that portions of functions are implemented at different physical locations by one or more physical devices. In some examples， communications manager 1215 and/or at least some of its various sub-components may be a separate and distinct component in accordance with various aspects of the present disclosure. In other examples， communications manager 1215 and/or at least some of its various sub-components may be combined with one or more other hardware components， including but not limited to an I/O component， a transceiver， a network server， another computing device， one or more other components described in the present disclosure， or a combination thereof in accordance with various aspects of the present disclosure.

Communications manager 1215 may identify a dynamic frozen bit within a code tree during decoding of a codeword encoded using a polar code， extend a set of candidate paths through the code tree for the identified dynamic frozen bit to obtain a first extended set of candidate paths， select a first subset of the first extended set of candidate paths according to a first path selection criterion， determine that at least one candidate path in the first subset passes a parity check based on the dynamic frozen bit， and determine respective path metrics for each candidate path in a second subset of the first extended set of candidate paths， the second subset of the extended set of candidate paths selected according to a second path selection criterion.

The communications manager 1215 may also receive a signal including a codeword encoded using a polar code， the codeword generated based at least in part on a plurality of dynamic frozen bits， a plurality of information bits， and a plurality of error detection bits for joint detection and decoding of the codeword. The communications manager 1215 may perform decoding of the codeword including at least： a parity check of a first subset of decoding paths for making a decision on early termination of decoding of the codeword based at least in part on the plurality of dynamic frozen bits， generating path metrics for a second subset of the decoding paths that each pass the parity check based at least in part on the dynamic frozen bits， and performing error detection on a bit sequence corresponding to one of the second subset of the decoding paths based at least in part on a representation of the plurality of error detection bits and the generated path metrics. In some cases， performing decoding of the codeword including at least the parity check of the first subset of decoding paths includes calculating a parity check value based at least in part on a plurality of bits of a first decoding path of the first subset of decoding paths occurring prior to a first dynamic frozen bit of the plurality of plurality of dynamic frozen bits along the first decoding path， and comparing the parity check value to a value of the first dynamic frozen bit. In some cases， performing decoding of the codeword including at least generating path metrics for the second subset of the decoding paths includes adding a path metric penalty to a first decoding path in the second subset of the decoding paths based at least in part on determining that a calculated value of a first dynamic frozen bit of the plurality of dynamic frozen bits differs from a determined decision value of the dynamic frozen bit. The communications manager 1215 may process the information bits based at least in part on a result of the decoding.

In some cases， the communications manager 1215 may extend the decoding paths to obtain extended decoding paths and select a subset of the extended decoding paths according to a first path selection criterion. In some cases， the path selection criterion is based on path metrics of the extended decoding paths. In some cases， the communications manager 1215 may determine that all decoding paths in the subset of the extended decoding paths fail the parity check and terminating decoding of the codeword. In some cases， the communications manager 1215 may determine that at least one decoding path in the subset of the extended decoding paths passes the parity check and generate path metrics for the subset of the extended set of decoding paths. In some cases， the communications manager 1215 may calculate a first error detection code based at least in part on the bit sequence， identifying a second error detection code based at least in part on the bit sequence， and compare the first error detection code to the second error detection code. In some cases， the communications manager 1215 may determine that the bit sequence passes error detection based at least in part on the comparison， and output the bit sequence. In some cases， the communications manager 1215 may determine that the bit sequence has failed error detection based at least in part on the comparison， and output an error based at least in part on the failure. In some cases， the communications manager 1215 may determine that the first decoding path passes the parity check based at least in part on the comparison.

The communications manager 1215 may also allocate sub-channels of a polar code to a set of information bits， a set of error detection bits， and a set of dynamic frozen bits based on a reliability of each of the sub-channels， where a number of the set of error detection bits is based on a defined false alarm rate， and where each of the set of dynamic frozen bits includes a parity check value， and where a number of the set of dynamic frozen bits is based on a target detection rate during parity-directed successive cancellation list (SCL) decoding， generate the set of dynamic frozen bits based on a decoding order of the sub-channels， generate a codeword encoded using the polar code based on loading the set of information bits， the set of error detection bits， and the set of dynamic frozen bits into the allocated sub-channels， and transmit the codeword.

Transmitter 1220 may transmit signals generated by other components of the device. In some examples， the transmitter 1220 may be collocated with a receiver 1210 in a transceiver module. For example， the transmitter 1220 may be an example of aspects of the transceiver 1535 described with reference to FIG. 15. The transmitter 1220 may utilize a single antenna or a set of antennas.

FIG. 13 shows a block diagram 1300 of a wireless device 1305 that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with aspects of the present disclosure. Wireless device 1305 may be an example of aspects of a wireless device 1205 or a UE 115 or base station 105 as described with reference to FIG. 12. Wireless device 1305 may include receiver 1310， communications manager 1315， and transmitter 1320. Wireless device 1305 may also include a processor. Each of these components may be in communication with one another (e.g.， via one or more buses) .

Receiver 1310 may receive signal that includes a polar-encoded codeword. Receiver 1310 may include components such as amplifiers， filters， downconverters， analog-to-digital converters， and the like， for receiving waveforms via one or more antennas. The receiver 1310 may be an example of aspects of the transceiver 1535 described with reference to FIG. 15. The receiver 1310 may utilize a single antenna or a set of antennas.

Communications manager 1315 may be an example of aspects of the communications manager 1515 described with reference to FIG. 15.

Communications manager 1315 may also include bit locator component 1325， path extender component 1330， path selector component 1335， parity checker component 1340， path metric determiner component 1345， allocator component 1350， bit value generator 1355， and codeword generator 1360. In some examples， the list decoder 705 may include one or more of the bit locator component 1325， the path extender component 1330， the path selector component 1335， and the path metric determiner component 1345. In some examples， the parity checker 710 may include the parity checker component 1340. In some examples， the polar encoder 220 may include the allocator component 1350 and the codeword generator 1360. In some examples， the dynamic frozen bit generator 215 may include the bit value generator 1355.

Bit locator component 1325 may identify a dynamic frozen bit within a code tree during decoding of a codeword encoded using a polar code and identify a second dynamic frozen bit within the code tree.

Path extender component 1330 may extend a set of candidate paths through the code tree for the identified dynamic frozen bit to obtain a first extended set of candidate paths and extend a second set of candidate paths through the code tree for the identified second dynamic frozen bit to obtain a second extended set of candidate paths.

Path selector component 1335 may select a first subset of the first extended set of candidate paths according to a first path selection criterion and select a first subset of the second extended set of candidate paths according to the first path selection criterion. In some cases， the first path selection criterion is based on path metrics of the candidate paths of the first extended set of candidate paths.

Parity checker component 1340 may determine that at least one candidate path in the first subset passes a parity check based on the dynamic frozen bit， determine that all candidate paths in the first subset of the second extended set of candidate paths fail a parity check， terminate decoding of the codeword， determine that at least one candidate path in the first subset of the second extended set of candidate paths passes a parity check， compare the parity check value to a value of the dynamic frozen bit， and determine that the at least one candidate path passes the parity check based on the comparison. In some cases， determining that the at least one candidate path in the first subset passes a parity check includes： calculating a parity check value based on a set of bits of the at least one candidate path occurring prior to the dynamic frozen bit along the at least one candidate path.

Path metric determiner component 1345 may determine respective path metrics for each candidate path in a second subset of the first extended set of candidate paths， the second subset of the extended set of candidate paths selected according to a second path selection criterion. In some cases， the second path selection criterion is based on candidate paths of the first extended set of candidate paths passing the parity check based on the dynamic frozen bit. Path metric determiner component 1345 may determine a second path metric for each candidate path in a second subset of the second extended set of candidate paths， where the determined second path metrics are a function of the determined path metrics. In some cases， determining respective path metrics for the each candidate path in the second subset includes： adding a path metric penalty to a candidate path in the second subset based on determining that a calculated value of the dynamic frozen bit differs from a determined decision value of the dynamic frozen bit.

Allocator component 1350 may allocate sub-channels of a polar code to a set of information bits， a set of error detection bits， and a set of dynamic frozen bits based on a reliability of each of the sub-channels. In some cases， a number of the set of error detection bits is based on a defined false alarm rate. In some cases， each of the set of dynamic frozen bits includes a parity check value. In some cases， a number of the set of dynamic frozen bits is based on a target detection rate during parity-directed successive cancellation list (SCL) decoding. Allocator component 1350 may allocate a first subset of sub-channels of the sub-channel subset of the polar code to the dynamic frozen bits having a higher reliability than a second subset of sub-channels of the sub-channel subset. In some cases， allocating the sub-channels of the polar code further includes： identifying a subset of the sub-channels for frozen bits.

Bit value generator 1355 may generate the set of dynamic frozen bits based on a decoding order of the sub-channels. In some cases， generating the set of dynamic frozen bits includes： applying a Boolean operation to subsets of the set of information bits to respectively generate values for the set of dynamic frozen bits.

Codeword generator 1360 may generate a codeword encoded using the polar code based on loading the set of information bits， the set of error detection bits， and the set of dynamic frozen bits into the allocated sub-channels and transmit the codeword.

Transmitter 1320 may transmit signals generated by other components of the device. In some examples， the transmitter 1320 may be collocated with a receiver 1310 in a transceiver module. For example， the transmitter 1320 may be an example of aspects of the transceiver 1535 described with reference to FIG. 15. The transmitter 1320 may utilize a single antenna or a set of antennas.

FIG. 14 shows a block diagram 1400 of a communications manager 1415 that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with aspects of the present disclosure. The communications manager 1415 may be an example of aspects of a communications manager 1215， a communications manager 1315， or a communications manager 1515 described with reference to FIGs. 12， 13， and 15. The communications manager 1415 may include bit locator component 1420， path extender component 1425， path selector component 1430， parity checker component 1435， path metric determiner component 1440， allocator component 1445， bit value generator 1450， codeword generator 1455， bit sequence component 1460， EDC component 1465， number determiner component 1470， reliability component 1475， and EDC generator 1480. Each of these modules may communicate， directly or indirectly， with one another (e.g.， via one or more buses) .

In some examples， the list decoder 705 may include one or more of bit locator component 1420， path extender component 1425， path selector component 1430， the path metric determiner component 1440， the bit sequence component 1460， and the number determiner component 1470. In some examples， the parity checker 710 may include the parity checker component 1435. In some examples， the polar encoder 220 may include the allocator component 1445， the codeword generator 1455， and the reliability component 1475. In some examples， the dynamic frozen bit generator 215 may include the bit value generator 1450. In some examples， the EDC encoder 210 may include the EDC component 1465 and the EDC generator 1480.

Bit locator component 1420 may identify a dynamic frozen bit within a code tree during decoding of a codeword encoded using a polar code and identify a second dynamic frozen bit within the code tree.

Path extender component 1425 may extend a set of candidate paths through the code tree for the identified dynamic frozen bit to obtain a first extended set of candidate paths and extend a second set of candidate paths through the code tree for the identified second dynamic frozen bit to obtain a second extended set of candidate paths.

Path selector component 1430 may select a first subset of the first extended set of candidate paths according to a first path selection criterion and select a first subset of the second extended set of candidate paths according to the first path selection criterion. In some cases， the first path selection criterion is based on path metrics of the candidate paths of the first extended set of candidate paths.

Parity checker component 1435 may determine that at least one candidate path in the first subset passes a parity check based on the dynamic frozen bit. In some cases， parity checker component 1435 may determine that all candidate paths in the first subset of the second extended set of candidate paths fail a parity check and terminate decoding of the codeword. In some cases， parity checker component 1435 may determine that at least one candidate path in the first subset of the second extended set of candidate paths passes a parity check， compare the parity check value to a value of the dynamic frozen bit， and determine that the at least one candidate path passes the parity check based on the comparison. In some cases， determining that the at least one candidate path in the first subset passes a parity check includes： calculating a parity check value based on a set of bits of the at least one candidate path occurring prior to the dynamic frozen bit along the at least one candidate path.

Path metric determiner component 1440 may determine respective path metrics for each candidate path in a second subset of the first extended set of candidate paths， the second subset of the extended set of candidate paths selected according to a second path selection criterion. In some cases， the second path selection criterion is based on candidate paths of the first extended set of candidate paths passing the parity check based on the dynamic frozen bit. Path metric determiner component 1440 may determine a second path metric for each candidate path in a second subset of the second extended set of candidate paths， where the determined second path metrics are a function of the determined path metrics. In some cases， determining respective path metrics for the each candidate path in the second subset includes： adding a path metric penalty to a candidate path in the second subset based on determining that a calculated value of the dynamic frozen bit differs from a determined decision value of the dynamic frozen bit.

Allocator component 1445 may allocate sub-channels of a polar code to a set of information bits， a set of error detection bits， and a set of dynamic frozen bits based on a reliability of each of the sub-channels. In some cases， a number of the set of error detection bits is based on a defined false alarm rate. In some cases， each of the set of dynamic frozen bits includes a parity check value. In some cases， a number of the set of dynamic frozen bits is based on a target detection rate during parity-directed successive cancellation list (SCL) decoding. Allocator component 1445 may allocate a first subset of sub-channels of the sub-channel subset of the polar code to the dynamic frozen bits having a higher reliability than a second subset of sub-channels of the sub-channel subset. In some cases， allocating the sub-channels of the polar code further includes： identifying a subset of the sub-channels for frozen bits.

Bit value generator 1450 may generate the set of dynamic frozen bits based on a decoding order of the sub-channels. In some cases， generating the set of dynamic frozen bits includes： applying a Boolean operation to subsets of the set of information bits to respectively generate values for the set of dynamic frozen bits.

Codeword generator 1455 may generate a codeword encoded using the polar code based on loading the set of information bits， the set of error detection bits， and the set of dynamic frozen bits into the allocated sub-channels and transmit the codeword.

Bit sequence component 1460 may identify a bit sequence corresponding to a candidate path in the second subset of the extended set of candidate paths.

EDC component 1465 may calculate a first error detection code based on the bit sequence， identify a second error detection code based on the bit sequence， compare the first error detection code to the second error detection code， determine that the bit sequence passes error detection based on the comparison， and output the bit sequence. In some cases， EDC component 1465 may determine that the bit sequence has failed error detection based on the comparison， and output an error based on the failure.

Number determiner component 1470 may select a number of the set of dynamic frozen bits for enabling early termination during parity-directed successive cancellation list (SCL) decoding. In some cases， the number of the set of error detection bits is based on a defined detection rate.

Reliability component 1475 may allocate the set of information bits and the set of error detection bits to sub-channels having higher reliability than sub-channels allocated to the dynamic frozen bits.

EDC generator 1480 may apply an error detecting algorithm to the set of information bits to generate the set of error detection bits. In some cases， the error detecting algorithm is a cyclic redundancy check (CRC) algorithm.

FIG. 15 shows a diagram of a system 1500 including a device 1505 that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with aspects of the present disclosure. Device 1505 may be an example of or include the components of wireless device 1205， wireless device 1305， or a UE 115 as described above， e.g.， with reference to FIGs. 12 and 13. Device 1505 may include components for bi-directional voice and data communications including components for transmitting and receiving communications， including UE communications manager 1515， processor 1520， memory 1525， software 1530， transceiver 1535， antenna 1540， and I/O controller 1545. These components may be in electronic communication via one or more buses (e.g.， bus 1510) . Device 1505 may communicate wirelessly with one or more base stations 105.

Processor 1520 may include an intelligent hardware device， (e.g.， a general-purpose processor， a DSP， a central processing unit (CPU) ， a microcontroller， an ASIC， an FPGA， a programmable logic device， a discrete gate or transistor logic component， a discrete hardware component， or any combination thereof) . In some cases， processor 1520 may be configured to operate a memory array using a memory controller. In other cases， a memory controller may be integrated into processor 1520. Processor 1520 may be configured to execute computer-readable instructions stored in a memory to perform various functions (e.g.， functions or tasks supporting dynamic frozen bits of polar codes for early termination and performance improvement) .

Memory 1525 may include random access memory (RAM) and read only memory (ROM) . The memory 1525 may store computer-readable， computer-executable software 1530 including instructions that， when executed， cause the processor to perform various functions described herein. In some cases， the memory 1525 may contain， among other things， a basic input/output system (BIOS) which may control basic hardware and/or software operation such as the interaction with peripheral components or devices.

Software 1530 may include code to implement aspects of the present disclosure， including code to support dynamic frozen bits of polar codes for early termination and performance improvement. Software 1530 may be stored in a non-transitory computer-readable medium such as system memory or other memory. In some cases， the software 1530 may not be directly executable by the processor but may cause a computer (e.g.， when compiled and executed) to perform functions described herein.

Transceiver 1535 may communicate bi-directionally， via one or more antennas， wired， or wireless links as described above. For example， the transceiver 1535 may represent a wireless transceiver and may communicate bi-directionally with another wireless transceiver. The transceiver 1535 may also include a modem to modulate the packets and provide the modulated packets to the antennas for transmission， and to demodulate packets received from the antennas.

In some cases， the wireless device may include a single antenna 1540. However， in some cases the device may have more than one antenna 1540， which may be capable of concurrently transmitting or receiving multiple wireless transmissions.

I/O controller 1545 may manage input and output signals for device 1505. I/O controller 1545 may also manage peripherals not integrated into device 1505. In some cases， I/O controller 1545 may represent a physical connection or port to an external peripheral. In some cases， I/O controller 1545 may utilize an operating system such as

or another known operating system. In other cases， I/O controller 1545 may represent or interact with a modem， a keyboard， a mouse， a touchscreen， or a similar device. In some cases， I/O controller 1545 may be implemented as part of a processor. In some cases， a user may interact with device 1505 via I/O controller 1545 or via hardware components controlled by I/O controller 1545.

FIG. 16 shows a diagram of a system 1600 including a device 1605 that supports dynamic frozen bits of polar codes for early termination and performance improvement in accordance with aspects of the present disclosure. Device 1605 may be an example of or include the components of wireless device 1305， wireless device 1405， or a base station 105 as described above， e.g.， with reference to FIGs. 13 and 14. Device 1605 may include components for bi-directional voice and data communications including components for transmitting and receiving communications， including base station communications manager 1615， processor 1620， memory 1625， software 1630， transceiver 1635， antenna 1640， network communications manager 1645， and inter-station communications manager 1650. These components may be in electronic communication via one or more buses (e.g.， bus 1610) . Device 1605 may communicate wirelessly with one or more UEs 115.

Processor 1620 may include an intelligent hardware device， (e.g.， a general-purpose processor， a DSP， a CPU， a microcontroller， an ASIC， an FPGA， a programmable logic device， a discrete gate or transistor logic component， a discrete hardware component， or any combination thereof) . In some cases， processor 1620 may be configured to operate a memory array using a memory controller. In other cases， a memory controller may be integrated into processor 1620. Processor 1620 may be configured to execute computer-readable instructions stored in a memory to perform various functions (e.g.， functions or tasks supporting dynamic frozen bits of polar codes for early termination and performance improvement) .

Memory 1625 may include RAM and ROM. The memory 1625 may store computer-readable， computer-executable software 1630 including instructions that， when executed， cause the processor to perform various functions described herein. In some cases， the memory 1625 may contain， among other things， a BIOS which may control basic hardware and/or software operation such as the interaction with peripheral components or devices.

Software 1630 may include code to implement aspects of the present disclosure， including code to support dynamic frozen bits of polar codes for early termination and performance improvement. Software 1630 may be stored in a non-transitory computer-readable medium such as system memory or other memory. In some cases， the software 1630 may not be directly executable by the processor but may cause a computer (e.g.， when compiled and executed) to perform functions described herein.

Transceiver 1635 may communicate bi-directionally， via one or more antennas， wired， or wireless links as described above. For example， the transceiver 1635 may represent a wireless transceiver and may communicate bi-directionally with another wireless transceiver. The transceiver 1635 may also include a modem to modulate the packets and provide the modulated packets to the antennas for transmission， and to demodulate packets received from the antennas.

In some cases， the wireless device may include a single antenna 1640. However， in some cases the device may have more than one antenna 1640， which may be capable of concurrently transmitting or receiving multiple wireless transmissions.

Network communications manager 1645 may manage communications with the core network (e.g.， via one or more wired backhaul links) . For example， the network communications manager 1645 may manage the transfer of data communications for client devices， such as one or more UEs 115.

Inter-station communications manager 1650 may manage communications with other base station 105， and may include a controller or scheduler for controlling communications with UEs 115 in cooperation with other base stations 105. For example， the inter-station communications manager 1650 may coordinate scheduling for transmissions to UEs 115 for various interference mitigation techniques such as beamforming or joint transmission. In some examples， inter-station communications manager 1650 may provide an X2 interface within an Long Term Evolution (LTE) /LTE-A wireless communication network technology to provide communication between base stations 105.

FIG. 17 shows a flowchart illustrating a method 1700 for dynamic frozen bits of polar codes for early termination and performance improvement in accordance with aspects of the present disclosure. The operations of method 1700 may be implemented by a UE 115 or base station 105 or its components as described herein. For example， the operations of method 1700 may be performed by a communications manager as described with reference to FIGs. 12 through 14. In some examples， a UE 115 or base station 105 may execute a set of codes to control the functional elements of the device to perform the functions described below. Additionally or alternatively， the UE 115 or base station 105 may perform aspects of the functions described below using special-purpose hardware.

At block 1705 the UE 115 or base station 105 may identify a dynamic frozen bit within a code tree during decoding of a codeword encoded using a polar code. The operations of block 1705 may be performed according to the methods described herein. In certain examples， aspects of the operations of block 1705 may be performed by a bit locator component as described with reference to FIGs. 12 through 14.

At block 1710 the UE 115 or base station 105 may extend a set of candidate paths through the code tree for the identified dynamic frozen bit to obtain a first extended set of candidate paths. The operations of block 1710 may be performed according to the methods described herein. In certain examples， aspects of the operations of block 1710 may be performed by a path extender component as described with reference to FIGs. 12 through 14.

At block 1715 the UE 115 or base station 105 may select a first subset of the first extended set of candidate paths according to a first path selection criterion. The operations of block 1715 may be performed according to the methods described herein. In certain examples， aspects of the operations of block 1715 may be performed by a path selector component as described with reference to FIGs. 12 through 14.

At block 1720 the UE 115 or base station 105 may determine that at least one candidate path in the first subset passes a parity check based on the dynamic frozen bit. The operations of block 1720 may be performed according to the methods described herein. In certain examples， aspects of the operations of block 1720 may be performed by a parity checker component as described with reference to FIGs. 12 through 14.

At block 1725 the UE 115 or base station 105 may determine respective path metrics for each candidate path in a second subset of the first extended set of candidate paths， the second subset of the extended set of candidate paths selected according to a second path selection criterion. The operations of block 1725 may be performed according to the methods described herein. In certain examples， aspects of the operations of block 1725 may be performed by a path metric determiner component as described with reference to FIGs. 12 through 14.

FIG. 18 shows a flowchart illustrating a method 1800 for dynamic frozen bits of polar codes for early termination and performance improvement in accordance with aspects of the present disclosure. The operations of method 1800 may be implemented by a UE 115 or base station 105 or its components as described herein. For example， the operations of method 1800 may be performed by a communications manager as described with reference to FIGs. 12 through 14. In some examples， a UE 115 or base station 105 may execute a set of codes to control the functional elements of the device to perform the functions described below. Additionally or alternatively， the UE 115 or base station 105 may perform aspects of the functions described below using special-purpose hardware.

At block 1805 the UE 115 or base station 105 may identify a dynamic frozen bit within a code tree during decoding of a codeword encoded using a polar code. The operations of block 1805 may be performed according to the methods described herein. In certain examples， aspects of the operations of block 1805 may be performed by a bit locator component as described with reference to FIGs. 12 through 14.

At block 1810 the UE 115 or base station 105 may extend a set of candidate paths through the code tree for the identified dynamic frozen bit to obtain a first extended set of candidate paths. The operations of block 1810 may be performed according to the methods described herein. In certain examples， aspects of the operations of block 1810 may be performed by a path extender component as described with reference to FIGs. 12 through 14.

At block 1815 the UE 115 or base station 105 may select a first subset of the first extended set of candidate paths according to a first path selection criterion. The operations of block 1815 may be performed according to the methods described herein. In certain examples， aspects of the operations of block 1815 may be performed by a path selector component as described with reference to FIGs. 12 through 14.

At block 1820 the UE 115 or base station 105 may determine that at least one candidate path in the first subset passes a parity check based on the dynamic frozen bit. The operations of block 1820 may be performed according to the methods described herein. In certain examples， aspects of the operations of block 1820 may be performed by a parity checker component as described with reference to FIGs. 12 through 14.

At block 1825 the UE 115 or base station 105 may determine respective path metrics for each candidate path in a second subset of the first extended set of candidate paths， the second subset of the extended set of candidate paths selected according to a second path selection criterion. The operations of block 1825 may be performed according to the methods described herein. In certain examples， aspects of the operations of block 1825 may be performed by a path metric determiner component as described with reference to FIGs. 12 through 14.

At block 1830 the UE 115 or base station 105 may identify a bit sequence corresponding to a candidate path in the second subset of the extended set of candidate paths. The operations of block 1830 may be performed according to the methods described herein. In certain examples， aspects of the operations of block 1830 may be performed by a bit sequence component as described with reference to FIGs. 12 through 14.

At block 1835 the UE 115 or base station 105 may calculate a first error detection code based at least in part on the bit sequence. The operations of block 1835 may be performed according to the methods described herein. In certain examples， aspects of the operations of block 1835 may be performed by a EDC component as described with reference to FIGs. 12 through 14.

At block 1840 the UE 115 or base station 105 may identify a second error detection code based at least in part on the bit sequence. The operations of block 1840 may be performed according to the methods described herein. In certain examples， aspects of the operations of block 1840 may be performed by a EDC component as described with reference to FIGs. 12 through 14.

At block 1845 the UE 115 or base station 105 may compare the first error detection code to the second error detection code. The operations of block 1845 may be performed according to the methods described herein. In certain examples， aspects of the operations of block 1845 may be performed by a EDC component as described with reference to FIGs. 12 through 14.

FIG. 19 shows a flowchart illustrating a method 1900 for dynamic frozen bits of polar codes for early termination and performance improvement in accordance with aspects of the present disclosure. The operations of method 1900 may be implemented by a UE 115 or base station 105 or its components as described herein. For example， the operations of method 1900 may be performed by a communications manager as described with reference to FIGs. 12 through 14. In some examples， a UE 115 or base station 105 may execute a set of codes to control the functional elements of the device to perform the functions described below. Additionally or alternatively， the UE 115 or base station 105 may perform aspects of the functions described below using special-purpose hardware.

At block 1905 the UE 115 or base station 105 may allocate sub-channels of a polar code to a plurality of information bits， a plurality of error detection bits， and a plurality of dynamic frozen bits based at least in part on a reliability of each of the sub-channels， wherein a number of the plurality of error detection bits is based at least in part on a defined false alarm rate， and wherein each of the plurality of dynamic frozen bits includes a parity check value， and wherein a number of the plurality of dynamic frozen bits is based at least in part on a target detection rate during parity-directed successive cancellation list (SCL) decoding. The operations of block 1905 may be performed according to the methods described herein. In certain examples， aspects of the operations of block 1905 may be performed by a allocator component as described with reference to FIGs. 12 through 14.

At block 1910 the UE 115 or base station 105 may generate the plurality of dynamic frozen bits based at least in part on a decoding order of the sub-channels. The operations of block 1910 may be performed according to the methods described herein. In certain examples， aspects of the operations of block 1910 may be performed by a bit value generator as described with reference to FIGs. 12 through 14.

At block 1915 the UE 115 or base station 105 may generate a codeword encoded using the polar code based at least in part on loading the plurality of information bits， the plurality of error detection bits， and the plurality of dynamic frozen bits into the allocated sub-channels. The operations of block 1915 may be performed according to the methods described herein. In certain examples， aspects of the operations of block 1915 may be performed by a codeword generator as described with reference to FIGs. 12 through 14.

At block 1920 the UE 115 or base station 105 may transmit the codeword. The operations of block 1920 may be performed according to the methods described herein. In certain examples， aspects of the operations of block 1920 may be performed by a codeword generator as described with reference to FIGs. 12 through 14.

FIG. 20 shows a flowchart illustrating a method 2000 for dynamic frozen bits of polar codes for early termination and performance improvement in accordance with aspects of the present disclosure. The operations of method 2000 may be implemented by a UE 115 or base station 105 or its components as described herein. For example， the operations of method 2000 may be performed by a communications manager as described with reference to FIGs. 12 through 14. In some examples， a UE 115 or base station 105 may execute a set of codes to control the functional elements of the device to perform the functions described below. Additionally or alternatively， the UE 115 or base station 105 may perform aspects of the functions described below using special-purpose hardware.

At block 2005 the UE 115 or base station 105 may allocate sub-channels of a polar code to a plurality of information bits， a plurality of error detection bits， and a plurality of dynamic frozen bits based at least in part on a reliability of each of the sub-channels， wherein a number of the plurality of error detection bits is based at least in part on a defined false alarm rate， and wherein each of the plurality of dynamic frozen bits includes a parity check value， and wherein a number of the plurality of dynamic frozen bits is based at least in part on a target detection rate during parity-directed successive cancellation list (SCL) decoding. The operations of block 2005 may be performed according to the methods described herein. In certain examples， aspects of the operations of block 2005 may be performed by a allocator component as described with reference to FIGs. 12 through 14.

At block 2010 the UE 115 or base station 105 may allocate a first subset of sub-channels of the sub-channel subset of the polar code to the dynamic frozen bits having a higher reliability than a second subset of sub-channels of the sub-channel subset. In some cases， allocating the sub-channels of the polar code further comprises identifying a subset of the sub-channels for frozen bits. The operations of block 2010 may be performed according to the methods described herein. In certain examples， aspects of the operations of block 2010 may be performed by a allocator component as described with reference to FIGs. 12 through 14.

At block 2015 the UE 115 or base station 105 may generate the plurality of dynamic frozen bits based at least in part on a decoding order of the sub-channels. The operations of block 2015 may be performed according to the methods described herein. In certain examples， aspects of the operations of block 2015 may be performed by a bit value generator as described with reference to FIGs. 12 through 14.

At block 2020 the UE 115 or base station 105 may generate a codeword encoded using the polar code based at least in part on loading the plurality of information bits， the plurality of error detection bits， and the plurality of dynamic frozen bits into the allocated sub-channels. The operations of block 2020 may be performed according to the methods described herein. In certain examples， aspects of the operations of block 2020 may be performed by a codeword generator as described with reference to FIGs. 12 through 14.

At block 2025 the UE 115 or base station 105 may transmit the codeword. The operations of block 2025 may be performed according to the methods described herein. In certain examples， aspects of the operations of block 2025 may be performed by a codeword generator as described with reference to FIGs. 12 through 14.

FIG. 21 shows a flowchart illustrating a method 2100 for dynamic frozen bits of polar codes for early termination and performance Improvement in accordance with aspects of the present disclosure. The operations of method 2100 may be implemented by a UE 115 or its components as described herein. For example， the operations of method 2100 may be performed by a UE communications manager as described with reference to FIG. 15. In some examples， a UE 115 may execute a set of codes to control the functional elements of the device to perform the functions described below. Additionally or alternatively， the UE 115 may perform aspects of the functions described below using special-purpose hardware.

At block 2105 the UE 115 or base station 105 may receive a signal comprising a codeword encoded using a polar code， the codeword generated based at least in part on a plurality of dynamic frozen bits， a plurality of information bits， and a plurality of error detection bits for joint detection and decoding of the codeword. The operations of block 2105 may be performed according to the methods described herein. In certain examples， aspects of the operations of block 2105 may be performed by a transceiver 1535 as described with reference to FIG. 15 or a transceiver 1635 as described with reference to FIG. 15.

At block 2110 the UE 115 or base station 105 may perform decoding of the codeword including at least： a parity check of a first subset of decoding paths for making a decision on early termination of decoding of the codeword based at least in part on the plurality of dynamic frozen bits， generating path metrics for a second subset of the decoding paths that each pass the parity check based at least in part on the dynamic frozen bits， and performing error detection on a bit sequence corresponding to one of the second subset of the decoding paths based at least in part on a representation of the plurality of error detection bits and the generated path metrics； . The operations of block 2110 may be performed according to the methods described herein. In certain examples， aspects of the operations of block 2110 may be performed by a decoder 235-a as described with reference to FIG. 7.

At block 2115 the UE 115 or base station 105 may process the information bits based at least in part on a result of the decoding. The operations of block 2115 may be performed according to the methods described herein. In certain examples， aspects of the operations of block 2115 may be performed by a data sink 250 as described with reference to FIG. 2.

It should be noted that the methods described above describe possible implementations， and that the operations and the steps may be rearranged or otherwise modified and that other implementations are possible. Furthermore， aspects from two or more of the methods may be combined.

Techniques described herein may be used for various wireless communications systems such as code division multiple access (CDMA) ， time division multiple access (TDMA) ， frequency division multiple access (FDMA) ， orthogonal frequency division multiple access (OFDMA) ， single carrier frequency division multiple access (SC-FDMA) ， and other systems. The terms “system” and “network” are often used interchangeably. A code division multiple access (CDMA) system may implement a radio technology such as CDMA2000， Universal Terrestrial Radio Access (UTRA) ， etc. CDMA2000 covers IS-2000， IS-95， and IS-856 standards. IS-2000 Releases may be commonly referred to as CDMA2000 1X， 1X， etc. IS-856 (TIA-856) is commonly referred to as CDMA2000 1xEV-DO， High Rate Packet Data (HRPD) ， etc. UTRA includes Wideband CDMA (WCDMA) and other variants of CDMA. A TDMA system may implement a radio technology such as Global System for Mobile Communications (GSM) .

An OFDMA system may implement a radio technology such as Ultra Mobile Broadband (UMB) ， Evolved UTRA (E-UTRA) ， Institute of Electrical and Electronics Engineers (IEEE) 802.11 (Wi-Fi) ， IEEE 802.16 (WiMAX) ， IEEE 802.20， Flash-OFDM， etc. UTRA and E-UTRA are part of Universal Mobile Telecommunications System (UMTS) . LTE and LTE-A are releases of UMTS that use E-UTRA. UTRA， E-UTRA， UMTS， LTE， LTE-A， NR， and GSM are described in documents from the organization named “3rd Generation Partnership Project” (3GPP) . CDMA2000 and UMB are described in documents from an organization named “3rd Generation Partnership Project 2” (3GPP2) . The techniques described herein may be used for the systems and radio technologies mentioned above as well as other systems and radio technologies. While aspects of an LTE or an NR system may be described for purposes of example， and LTE or NR terminology may be used in much of the description， the techniques described herein are applicable beyond LTE or NR applications.

In LTE/LTE-A networks， including such networks described herein， the term evolved node B (eNB) may be generally used to describe the base stations. The wireless communications system or systems described herein may include a heterogeneous LTE/LTE-A or NR network in which different types of eNBs provide coverage for various geographical regions. For example， each eNB， next generation NodeB (gNB) ， or base station may provide communication coverage for a macro cell， a small cell， or other types of cell. The term “cell” may be used to describe a base station， a carrier or component carrier associated with a base station， or a coverage area (e.g.， sector， etc. ) of a carrier or base station， depending on context.

Base stations may include or may be referred to by those skilled in the art as a base transceiver station， a radio base station， an access point， a radio transceiver， a NodeB， eNodeB (eNB) ， gNB， Home NodeB， a Home eNodeB， or some other suitable terminology. The geographic coverage area for a base station may be divided into sectors making up only a portion of the coverage area. The wireless communications system or systems described herein may include base stations of different types (e.g.， macro or small cell base stations) . The UEs described herein may be able to communicate with various types of base stations and network equipment including macro eNBs， small cell eNBs， gNBs， relay base stations， and the like. There may be overlapping geographic coverage areas for different technologies.

A macro cell generally covers a relatively large geographic area (e.g.， several kilometers in radius) and may allow unrestricted access by UEs with service subscriptions with the network provider. A small cell is a lower-powered base station， as compared with a macro cell， that may operate in the same or different (e.g.， licensed， unlicensed， etc. ) frequency bands as macro cells. Small cells may include pico cells， femto cells， and micro cells according to various examples. A pico cell， for example， may cover a small geographic area and may allow unrestricted access by UEs with service subscriptions with the network provider. A femto cell may also cover a small geographic area (e.g.， a home) and may provide restricted access by UEs having an association with the femto cell (e.g.， UEs in a closed subscriber group (CSG) ， UEs for users in the home， and the like) . An eNB for a macro cell may be referred to as a macro eNB. An eNB for a small cell may be referred to as a small cell eNB， a pico eNB， a femto eNB， or a home eNB. An eNB may support one or multiple (e.g.， two， three， four， and the like) cells (e.g.， component carriers) .

The wireless communications system or systems described herein may support synchronous or asynchronous operation. For synchronous operation， the base stations may have similar frame timing， and transmissions from different base stations may be approximately aligned in time. For asynchronous operation， the base stations may have different frame timing， and transmissions from different base stations may not be aligned in time. The techniques described herein may be used for either synchronous or asynchronous operations.

The downlink transmissions described herein may also be called forward link transmissions while the uplink transmissions may also be called reverse link transmissions. Each communication link described herein-including， for example，

wireless communications system

100 and 200 of FIGs. 1 and 2-may include one or more carriers， where each carrier may be a signal made up of multiple sub-carriers (e.g.， waveform signals of different frequencies) .

The description set forth herein， in connection with the appended drawings， describes example configurations and does not represent all the examples that may be implemented or that are within the scope of the claims. The term “exemplary” used herein means “serving as an example， instance， or illustration， ” and not “preferred” or “advantageous over other examples. ” The detailed description includes specific details for the purpose of providing an understanding of the described techniques. These techniques， however， may be practiced without these specific details. In some instances， well-known structures and devices are shown in block diagram form in order to avoid obscuring the concepts of the described examples.

In the appended figures， similar components or features may have the same reference label. Further， various components of the same type may be distinguished by following the reference label by a dash and a second label that distinguishes among the similar components. If just the first reference label is used in the specification， the description is applicable to any one of the similar components having the same first reference label irrespective of the second reference label.

Information and signals described herein may be represented using any of a variety of different technologies and techniques. For example， data， instructions， commands， information， signals， bits， symbols， and chips that may be referenced throughout the above description may be represented by voltages， currents， electromagnetic waves， magnetic fields or particles， optical fields or particles， or any combination thereof.

The various illustrative blocks and modules described in connection with the disclosure herein may be implemented or performed with a general-purpose processor， a DSP， an ASIC， an FPGA or other programmable logic device， discrete gate or transistor logic， discrete hardware components， or any combination thereof designed to perform the functions described herein. A general-purpose processor may be a microprocessor， but in the alternative， the processor may be any conventional processor， controller， microcontroller， or state machine. A processor may also be implemented as a combination of computing devices (e.g.， a combination of a DSP and a microprocessor， multiple microprocessors， one or more microprocessors in conjunction with a DSP core， or any other such configuration) .

The functions described herein may be implemented in hardware， software executed by a processor， firmware， or any combination thereof. If implemented in software executed by a processor， the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Other examples and implementations are within the scope of the disclosure and appended claims. For example， due to the nature of software， functions described above can be implemented using software executed by a processor， hardware， firmware， hardwiring， or combinations of any of these. Features implementing functions may also be physically located at various positions， including being distributed such that portions of functions are implemented at different physical locations. Also， as used herein， including in the claims， “or” as used in a list of items (for example， a list of items prefaced by a phrase such as “at least one of” or “one or more of” ) indicates an inclusive list such that， for example， a list of at least one of A， B， or C means A or B or C or AB or AC or BC or ABC (i.e.， A and B and C) . Also， as used herein， the phrase “based on” shall not be construed as a reference to a closed set of conditions. For example， an exemplary step that is described as “based on condition A” may be based on both a condition A and a condition B without departing from the scope of the present disclosure. In other words， as used herein， the phrase “based on” shall be construed in the same manner as the phrase “based at least in part on. ”

Computer-readable media includes both non-transitory computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A non-transitory storage medium may be any available medium that can be accessed by a general purpose or special purpose computer. By way of example， and not limitation， non-transitory computer-readable media may comprise RAM， ROM， electrically erasable programmable read only memory (EEPROM) ， compact disk (CD) ROM or other optical disk storage， magnetic disk storage or other magnetic storage devices， or any other non-transitory medium that can be used to carry or store desired program code means in the form of instructions or data structures and that can be accessed by a general-purpose or special-purpose computer， or a general-purpose or special-purpose processor. Also， any connection is properly termed a computer-readable medium. For example， if the software is transmitted from a website， server， or other remote source using a coaxial cable， fiber optic cable， twisted pair， digital subscriber line (DSL) ， or wireless technologies such as infrared， radio， and microwave， then the coaxial cable， fiber optic cable， twisted pair， DSL， or wireless technologies such as infrared， radio， and microwave are included in the definition of medium. Disk and disc， as used herein， include CD， laser disc， optical disc， digital versatile disc (DVD) ， floppy disk and Blu-ray disc where disks usually reproduce data magnetically， while discs reproduce data optically with lasers. Combinations of the above are also included within the scope of computer-readable media.

The description herein is provided to enable a person skilled in the art to make or use the disclosure. Various modifications to the disclosure will be readily apparent to those skilled in the art， and the generic principles defined herein may be applied to other variations without departing from the scope of the disclosure. Thus， the disclosure is not limited to the examples and designs described herein， but is to be accorded the broadest scope consistent with the principles and novel features disclosed herein.

Claims

A method for wireless communication, comprising:

allocating sub-channels of a polar code to a plurality of information bits, a plurality of error detection bits, and a plurality of dynamic frozen bits based at least in part on a reliability of each of the sub-channels, wherein a number of the plurality of error detection bits is based at least in part on a defined false alarm rate, and wherein each of the plurality of dynamic frozen bits includes a parity check value, and wherein a number of the plurality of dynamic frozen bits is based at least in part on a target detection rate during parity-directed successive cancellation list (SCL) decoding；

generating the plurality of dynamic frozen bits based at least in part on a decoding order of the sub-channels；

generating a codeword encoded using the polar code based at least in part on loading the plurality of information bits, the plurality of error detection bits, and the plurality of dynamic frozen bits into the allocated sub-channels； and

transmitting the codeword.
The method of claim 1, wherein:

the number of the plurality of dynamic frozen bits is based at least in part on enabling early termination during the parity-directed successive cancellation list (SCL) decoding.
The method of claim 1, wherein:

the number of the plurality of error detection bits is based at least in part on a defined detection rate.
The method of claim 1, wherein allocating the sub-channels of the polar code further comprises:

identifying a subset of the sub-channels for frozen bits； and

allocating a first subset of sub-channels of the sub-channel subset of the polar code to the dynamic frozen bits having a higher reliability than a second subset of sub-channels of the sub-channel subset.
The method of claim 1, wherein:

the plurality of information bits and the plurality of error detection bits are allocated to sub-channels having higher reliability than sub-channels allocated to the dynamic frozen bits.
The method of claim 1, further comprising:

applying an error detecting algorithm to the plurality of information bits to generate the plurality of error detection bits.
The method of claim 6, wherein:

the error detecting algorithm is a cyclic redundancy check (CRC) algorithm.
The method of claim 1, wherein generating the plurality of dynamic frozen bits comprises:

applying a Boolean operation to subsets of the plurality of information bits to respectively generate values for the plurality of dynamic frozen bits.
Amethod for wireless communication, comprising:

receiving a signal comprising a codeword encoded using a polar code, the codeword generated based at least in part on a plurality of dynamic frozen bits, a plurality of information bits, and a plurality of error detection bits for joint detection and decoding of the codeword；

performing decoding of the codeword including at least:

parity checking a first subset of decoding paths for making a decision on early termination of decoding of the codeword based at least in part on the plurality of dynamic frozen bits,

generating path metrics for a second subset of the decoding paths that each pass the parity check based at least in part on the dynamic frozen bits, and

performing error detection on a bit sequence corresponding to one of the second subset of the decoding paths based at least in part on a representation of the plurality of error detection bits and the generated path metrics； and

processing the information bits based at least in part on a result of the decoding.
The method of claim 9, further comprising:

extending the decoding paths to obtain extended decoding paths； and

selecting a subset of the extended decoding paths according to a path selection criterion.
The method of claim 10, further comprising:

determining that all decoding paths in the subset of the extended decoding paths fail the parity check； and

terminating decoding of the codeword.
The method of claim 10, further comprising:

determining that at least one decoding path in the subset of the extended decoding paths passes the parity check； and

generating path metrics for the subset of the extended decoding paths.
The method of claim 10, wherein:

the path selection criterion is based at least in part on path metrics of the extended decoding paths.
The method of claim 9, further comprising:

calculating a first error detection code based at least in part on the bit sequence；

identifying a second error detection code based at least in part on the bit sequence； and

comparing the first error detection code to the second error detection code.
The method of claim 14, further comprising:

determining that the bit sequence passes error detection based at least in part on the comparison； and

outputting the bit sequence.
The method of claim 14, further comprising:

determining that the bit sequence has failed error detection based at least in part on the comparison； and

outputting an error based at least in part on the failure.
The method of claim 9, wherein performing decoding of the codeword including at least the parity check of the first subset of decoding paths comprises:

calculating a parity check value based at least in part on a plurality of bits of a first decoding path of the first subset of decoding paths occurring prior to a first dynamic frozen bit of the plurality of dynamic frozen bits along the first decoding path； and

comparing the parity check value to a value of the first dynamic frozen bit.
The method of claim 17, further comprising:

determining that the first decoding path passes the parity check based at least in part on the comparison.
The method of claim 9, wherein performing decoding of the codeword including at least generating path metrics for the second subset of the decoding paths comprises:

adding a path metric penalty to a first decoding path in the second subset of the decoding paths based at least in part on determining that a calculated value of a first dynamic frozen bit of the plurality of dynamic frozen bits differs from a determined decision value of the dynamic frozen bit.
An apparatus for wireless communication, comprising:

a processor；

memory in electronic communication with the processor； and

instructions stored in the memory and operable, when executed by the processor, to cause the apparatus to:

allocate sub-channels of a polar code to a plurality of information bits, a plurality of error detection bits, and a plurality of dynamic frozen bits based at least in part on a reliability of each of the sub-channels, wherein a number of the plurality of error detection bits is based at least in part on a defined false alarm rate, and wherein each of the plurality of dynamic frozen bits includes a parity check value, and wherein a number of the plurality of dynamic frozen bits is based at least in part on a target detection rate during parity-directed successive cancellation list (SCL) decoding；

generate the plurality of dynamic frozen bits based at least in part on a decoding order of the sub-channels；

generate a codeword encoded using the polar code based at least in part on loading the plurality of information bits, the plurality of error detection bits, and the plurality of dynamic frozen bits into the allocated sub-channels； and

transmit the codeword.
The apparatus of claim 20, wherein:

the number of the plurality of dynamic frozen bits is based at least in part on enabling early termination during the parity-directed successive cancellation list (SCL) decoding.
The apparatus of claim 20, wherein:

the number of the plurality of error detection bits is based at least in part on a defined detection rate.
The apparatus of claim 20, wherein allocating the sub-channels of the polar code further comprises instructions further executable by the processor to:

identify a subset of the sub-channels for frozen bits； and

allocate a first subset of sub-channels of the sub-channel subset of the polar code to the dynamic frozen bits having a higher reliability than a second subset of sub-channels of the sub-channel subset.
The apparatus of claim 20, wherein:

the plurality of information bits and the plurality of error detection bits are allocated to sub-channels having higher reliability than sub-channels allocated to the dynamic frozen bits.
The apparatus of claim 20, wherein the instructions are further executable by the processor to:

apply an error detecting algorithm to the plurality of information bits to generate the plurality of error detection bits.
The apparatus of claim 25, wherein:

the error detecting algorithm is a cyclic redundancy check (CRC) algorithm.
The apparatus of claim 20, wherein generating the plurality of dynamic frozen bits comprises instructions further executable by the processor to:

apply a Boolean operation to subsets of the plurality of information bits to respectively generate values for the plurality of dynamic frozen bits.
An apparatus for wireless communication, comprising:

a processor；

memory in electronic communication with the processor； and

instructions stored in the memory and operable, when executed by the processor, to cause the apparatus to:

receive a signal comprising a codeword encoded using a polar code, the codeword generated based at least in part on a plurality of dynamic frozen bits, a plurality of information bits, and a plurality of error detection bits for joint detection and decoding of the codeword；

perform decoding of the codeword including at least:

parity checking a first subset of decoding paths for making a decision on early termination of decoding of the codeword based at least in part on the plurality of dynamic frozen bits,

generating path metrics for a second subset of the decoding paths that each pass the parity check based at least in part on the dynamic frozen bits, and

performing error detection on a bit sequence corresponding to one of the second subset of the decoding paths based at least in part on a representation of the plurality of error detection bits and the generated path metrics； and

process the information bits based at least in part on a result of the decoding.
The apparatus of claim 28, wherein the instructions are further executable by the processor to:

extend the decoding paths to obtain extended decoding paths； and

select a subset of the extended decoding paths according to a path selection criterion.
The apparatus of claim 29, wherein the instructions are further executable by the processor to:

determine that all decoding paths in the subset of the extended decoding paths fail the parity check； and

terminate decoding of the codeword.
The apparatus of claim 29, wherein the instructions are further executable by the processor to:

determine that at least one decoding path in the subset of the extended decoding paths passes the parity check； and

generate path metrics for the subset of the extended decoding paths.
The apparatus of claim 29, wherein:

the path selection criterion is based at least in part on path metrics of the extended decoding paths.
The apparatus of claim 28, wherein the instructions are further executable by the processor to:

calculate a first error detection code based at least in part on the bit sequence；

identify a second error detection code based at least in part on the bit sequence； and

compare the first error detection code to the second error detection code.
The apparatus of claim 33, wherein the instructions are further executable by the processor to:

determine that the bit sequence passes error detection based at least in part on the comparison； and

output the bit sequence.
The apparatus of claim 33, wherein the instructions are further executable by the processor to:

determine that the bit sequence has failed error detection based at least in part on the comparison； and

output an error based at least in part on the failure.
The apparatus of claim 28, wherein performing decoding of the codeword including at least the parity check of the first subset of decoding paths comprises instructions further executable by the processor to:

calculate a parity check value based at least in part on a plurality of bits of a first decoding path of the first subset of decoding paths occurring prior to a first dynamic frozen bit of the plurality of plurality of dynamic frozen bits along the first decoding path； and

compare the parity check value to a value of the first dynamic frozen bit.
The apparatus of claim 36, wherein the instructions are further executable by the processor to:

determine that the first decoding path passes the parity check based at least in part on the comparison.
The apparatus of claim 28, wherein performing decoding of the codeword including at least the parity check of the first subset of decoding paths comprises instructions further executable by the processor to:

add a path metric penalty to a first decoding path in the second subset of the decoding paths based at least in part on determining that a calculated value of a first dynamic frozen bit of the plurality of dynamic frozen bits differs from a determined decision value of the dynamic frozen bit.
An apparatus for wireless communication, comprising:

means for allocating sub-channels of a polar code to a plurality of information bits, a plurality of error detection bits, and a plurality of dynamic frozen bits based at least in part on a reliability of each of the sub-channels, wherein a number of the plurality of error detection bits is based at least in part on a defined false alarm rate, and wherein each of the plurality of dynamic frozen bits includes a parity check value, and wherein a number of the plurality of dynamic frozen bits is based at least in part on a target detection rate during parity-directed successive cancellation list (SCL) decoding；

means for generating the plurality of dynamic frozen bits based at least in part on a decoding order of the sub-channels；

means for generating a codeword encoded using the polar code based at least in part on loading the plurality of information bits, the plurality of error detection bits, and the plurality of dynamic frozen bits into the allocated sub-channels； and

means for transmitting the codeword.
An apparatus for wireless communication, comprising:

means for receiving a signal comprising a codeword encoded using a polar code, the codeword generated based at least in part on a plurality of dynamic frozen bits, a plurality of information bits, and a plurality of error detection bits for joint detection and decoding of the codeword；

means for performing decoding of the codeword including at least:

parity checking a first subset of decoding paths for making a decision on early termination of decoding of the codeword based at least in part on the plurality of dynamic frozen bits,

generating path metrics for a second subset of the decoding paths that each pass the parity check based at least in part on the dynamic frozen bits, and

performing error detection on a bit sequence corresponding to one of the second subset of the decoding paths based at least in part on a representation of the plurality of error detection bits and the generated path metrics； and

means for processing the information bits based at least in part on a result of the decoding.
A non-transitory computer readable medium storing code for wireless communication, the code comprising instructions executable by a processor to:

allocate sub-channels of a polar code to a plurality of information bits, a plurality of error detection bits, and a plurality of dynamic frozen bits based at least in part on a reliability of each of the sub-channels, wherein a number of the plurality of error detection bits is based at least in part on a defined false alarm rate, and wherein each of the plurality of dynamic frozen bits includes a parity check value, and wherein a number of the plurality of dynamic frozen bits is based at least in part on a target detection rate during parity-directed successive cancellation list (SCL) decoding；

generate the plurality of dynamic frozen bits based at least in part on a decoding order of the sub-channels；

generate a codeword encoded using the polar code based at least in part on loading the plurality of information bits, the plurality of error detection bits, and the plurality of dynamic frozen bits into the allocated sub-channels； and

transmit the codeword.
A non-transitory computer readable medium storing code for wireless communication, the code comprising instructions executable by a processor to:

receive a signal comprising a codeword encoded using a polar code, the codeword generated based at least in part on a plurality of dynamic frozen bits, a plurality of information bits, and a plurality of error detection bits for joint detection and decoding of the codeword；

perform decoding of the codeword including at least:

parity checking a first subset of decoding paths for making a decision on early termination of decoding of the codeword based at least in part on the plurality of dynamic frozen bits, and

generating path metrics for a second subset of the decoding paths that each pass the parity check based at least in part on the dynamic frozen bits, and

performing error detection on a bit sequence corresponding to one of the second subset of the decoding paths based at least in part on a representation of the plurality of error detection bits and the generated path metrics； and

process the information bits based at least in part on a result of the decoding.