WO2018189831A1

WO2018189831A1 - Waveguide laminate structure

Info

Publication number: WO2018189831A1
Application number: PCT/JP2017/014993
Authority: WO
Inventors: 哲朗田端; 剛羽立
Original assignee: 三菱電機株式会社
Priority date: 2017-04-12
Filing date: 2017-04-12
Publication date: 2018-10-18

Abstract

This waveguide laminate structure is configured by being provided with a first multilayer dielectric substrate, a second multilayer dielectric substrate, and a dielectric insulating film that regulates a space that is formed when the substrates are disposed facing each other. The first multilayer dielectric substrate has: a surface layer conductor having a cutout that is formed at a distance from an end section of an opening; an inner layer conductor; a conductor via; and a choke structure formed outside of the opening. The dielectric insulating film is disposed further toward the outside than the choke structure.

Description

Waveguide bonded structure

The present invention relates to a substrate configuration of an array antenna, and more particularly to a substrate bonding structure when a pair of waveguide structures is realized by facing two dielectric substrates.

In 5G base stations (5th generation mobile communication base stations), a method using an APAA (active phased array antenna) as an antenna used for wireless communication is dominant. In APAA, a large number of antenna elements that transmit and receive radio waves are arranged on a panel in a grid pattern. In APAA, a complicated power supply circuit that electrically or electromagnetically connects an antenna element and a high-frequency integrated circuit is required.

Conventionally, a metal waveguide or a resin waveguide has been used for feeding power from an integrated circuit to an antenna element in order to selectively transmit only a specific frequency. However, when a metal waveguide or a resin waveguide for a feeding circuit is provided separately from the control board and antenna panel of the high-frequency circuit, there is a problem that the device is too large and too thick.

The apparatus can be thinned by forming the control board of the high-frequency circuit, the antenna panel, and the waveguide of the power feeding circuit with an integral dielectric substrate and providing the waveguide structure in the in-plane direction. However, in this case, there is a problem that the area becomes too large.

In addition, the problem is that the dielectric substrate is thick and the layer structure is complicated and cannot be manufactured by PWB, the problem that the dielectric substrate is thick and component mounting is not possible, and the problem that the layer structure is complicated and PWB becomes very expensive. there were.

As a method for solving the above problems, the waveguide of the power feeding circuit is divided into two, and the control board, the antenna panel, and the power feeding circuit of the high frequency circuit are constituted by two dielectric substrates, and the two sheets A structure in which a substrate is bonded with a dielectric adhesive has been proposed (see, for example, Patent Document 1).

JP 2011-40804 A

However, the prior art has the following problems.
The structure in which two substrates are bonded together with a dielectric adhesive cannot be re-bonded. For this reason, there is a problem that this structure is not suitable for connecting a large number of waveguides like an array antenna.

The present invention has been made in order to solve the above-described problems, and to obtain a waveguide bonding structure capable of repeating the bonding / separation of waveguides for the purpose of inspection and replacement. Objective.

The waveguide bonding structure according to the present invention includes a first multilayer dielectric substrate having a first waveguide in which a first opening is formed, and a second multilayer in which a second opening is formed. A second multilayer dielectric substrate having a waveguide and disposed opposite to the first multilayer dielectric substrate such that the first opening and the second opening face each other; and the first multilayer A waveguide laminated structure comprising a dielectric insulating film that regulates a gap in a space formed by disposing a dielectric substrate and a second multilayer dielectric substrate oppositely, The first multilayer dielectric substrate is provided on a surface facing the second multilayer dielectric substrate, and a first opening is formed, and a predetermined distance from the end of the first opening is formed. A first surface layer conductor having a notch portion formed in the direction of the tube axis of the first waveguide. In direction orthogonal, in which is disposed further outside of the notch.

According to the present invention, there is provided a configuration in which an insulating film formed on a substrate is used instead of an adhesive for adjusting a gap when bonding two waveguides. As a result, it is possible to obtain a waveguide bonding structure in which the waveguide bonding / separation can be repeated for inspection and replacement purposes.

It is a longitudinal cross-sectional view which shows the connection structure of the waveguide which concerns on Embodiment 1 of this invention. FIG. 2 is a top view of the multilayer dielectric substrate in FIG. 1 according to Embodiment 1 of the present invention. It is a disassembled perspective view of each conductor layer shown in FIG. 1 in Embodiment 1 of this invention. It is a figure which shows the application | coating process of a liquid photo solder resist among the schematic diagrams which showed the liquid photo solder resist formation in the board | substrate manufacture of Embodiment 1 of this invention in process order. It is a figure which shows a drying (semi-cure) process among the schematic diagrams which showed liquid photo solder resist formation in the board | substrate manufacture of Embodiment 1 of this invention in process order. It is a figure which shows an exposure process among the schematic diagrams which showed the liquid photo solder resist formation in the board | substrate manufacture of Embodiment 1 of this invention in order of the process. It is a figure which shows a image development process among the schematic diagrams which showed liquid photo solder resist formation in the board | substrate manufacture of Embodiment 1 of this invention in process order. It is a figure which shows a post-cure process among the schematic diagrams which showed liquid photo solder resist formation in the board | substrate manufacture of Embodiment 1 of this invention in process order. In Embodiment 1 of this invention, it is board | substrate sectional drawing at the time of applying the waveguide bonding structure concerning this invention to an array antenna. It is the top view which showed an example of the multilayer dielectric substrate in Embodiment 2 of this invention. It is the top view which showed another example of the multilayer dielectric substrate in Embodiment 2 of this invention. It is a longitudinal cross-sectional view which shows the connection structure of the waveguide which concerns on Embodiment 3 of this invention. It is a figure which shows the sticking process of a dry film type photo solder resist among the schematic diagrams which showed the dry film type photo solder resist formation in the board | substrate manufacture of Embodiment 4 of this invention in order of a process. It is a figure which shows an exposure process among the schematic diagrams which showed the dry film type photo solder resist formation in the board | substrate manufacture of Embodiment 4 of this invention in order of a process. It is a figure which shows a image development process among the schematic diagrams which showed dry film type photo solder resist formation in the board | substrate manufacture of Embodiment 4 of this invention in order of a process. It is a figure which shows a post-cure process among the schematic diagrams which showed the dry film type photo solder resist formation in the board | substrate manufacture of Embodiment 4 of this invention in order of the process.

Hereinafter, preferred embodiments of the waveguide bonding structure of the present invention will be described with reference to the drawings.

Embodiment 1 FIG.
FIG. 1 is a longitudinal sectional view showing a waveguide connection structure according to Embodiment 1 of the present invention. FIG. 2 is a top view of multilayer dielectric substrate 100 in FIG. 1 according to Embodiment 1 of the present invention. The waveguide bonding structure in the first embodiment in which the dielectric waveguides formed by the surface layer conductor, the inner layer conductor, and the conductor via are connected mainly in the stacking direction of the multilayer dielectric substrate is shown in FIGS. 2 will be described in detail.

[Overall configuration]
First, the overall configuration will be described. In FIG. 1, the multilayer dielectric substrate 100 and the multilayer dielectric substrate 200 face each other and are arranged close to each other. The surface layer conductor 1101 is disposed on the surface of the multilayer dielectric substrate 100 on the side where the multilayer dielectric substrate 200 is disposed.

On the other hand, the surface layer conductor 1102 is disposed on the surface of the multilayer dielectric substrate 100 opposite to the side on which the multilayer dielectric substrate 200 is disposed. The surface layer conductor 1101 and the surface layer conductor 1201 are not electrically connected.

Each of the inner layer conductor 1111, the inner layer conductor 1112, the conductor via 2101, the conductor via 2102a, and the conductor via 2102b is disposed between the surface layer conductor 1101 and the surface layer conductor 1102.

A part of the surface layer conductor 1101 is deleted, so that an opening 3101 is provided. Moreover, the inner layer conductor 1111 is provided with a conductor extraction portion 3111 by removing a part thereof. Furthermore, a part of the inner layer conductor 1112 is deleted, so that a conductor extraction part 3112 is provided.

A plurality of conductor vias 2101 are disposed so as to surround the opening 3101 and to penetrate the multilayer dielectric substrate 100, the inner layer conductor 1111, and the inner layer conductor 1112 between the surface layer conductor 1101 and the surface layer conductor 1102. ing.

Dielectric waveguide 9101 in the stacking direction of multilayer dielectric substrate 100 from surface layer conductor 1101, surface layer conductor 1102, inner layer conductor 1111, inner layer conductor 1112, conductor via 2101, opening 3101, conductor extraction portion 3111, and conductor extraction portion 3112 Is formed.

Next, the surface layer conductor 1201 is disposed on the surface of the multilayer dielectric substrate 200 on the side where the multilayer dielectric substrate 100 is disposed. On the other hand, the surface layer conductor 1202 is disposed on the surface of the multilayer dielectric substrate 200 opposite to the side on which the multilayer dielectric substrate 100 is disposed.

Each of the inner layer conductor 1211, the inner layer conductor 1212, and the conductor via 2201 is disposed between the surface layer conductor 1201 and the surface layer conductor 1202.

The surface conductor 1201 is provided with an opening 3201 by removing a part thereof. In addition, the inner layer conductor 1211 is partially removed, so that a conductor extraction portion 3211 is provided. Furthermore, a part of the inner layer conductor 1212 is deleted, so that a conductor extraction part 3212 is provided. *

A plurality of conductor vias 2201 surround the opening 3201 and are disposed so as to penetrate the multilayer dielectric substrate 200, the inner layer conductor 1211, and the inner layer conductor 1212 between the surface layer conductor 1201 and the surface layer conductor 1202. ing.

From the surface layer conductor 1201, the surface layer conductor 1202, the inner layer conductor 1211, the inner layer conductor 1212, the conductor via 2201, the opening 3201, the conductor extraction portion 3211, and the conductor extraction portion 3212, the dielectric waveguide 9201 in the stacking direction of the multilayer dielectric substrate 200. Is formed.

The opening 3101 of the dielectric waveguide 9101 and the opening 3201 of the dielectric waveguide 9201 are arranged to face each other. As a result, the dielectric waveguide 9101 and the dielectric waveguide 9201 are electromagnetically connected.

As shown in FIG. 2, the surface layer conductor 1101 has a notch 4101a and a notch 4101b that are partly removed from the end of the long side of the opening 3101 by λ / 4 (λ: free space wavelength). Is provided. Here, the notch 4101a and the notch 4101b are opposed to each other with the opening 3101 interposed therebetween.

As shown in FIG. 1, a plurality of conductor vias 2102a are arranged so as to connect the surface layer conductor 1101 and the inner layer conductor 1111. Here, as shown in FIG. 2, the plurality of conductor vias 2102 a are adjacent to the conductor via 2101 along the edge of the notch 4101 a opposite to the side where the dielectric waveguide 9101 is located. Until it is arranged.

Similarly, a plurality of conductor vias 2102b are arranged so as to connect the surface layer conductor 1101 and the inner layer conductor 1111 as shown in FIG. Here, as shown in FIG. 2, the plurality of conductor vias 2102 b are adjacent to the conductor via 2101 along the edge opposite to the side where the dielectric waveguide 9101 is located among the edges of the notch 4101 b. Until it is arranged.

The gap adjusting insulating film 6101a and the gap adjusting insulating film 6101b are formed on the upper side of the surface layer conductor 1101, that is, on the multilayer dielectric substrate 200 side so as to surround the conductor via 2102a and the conductor via 2102b. The gap adjusting insulating film 6101a and the gap adjusting insulating film 6101b shown in FIG. 1 are illustrated as a single gap adjusting insulating film 6101 in FIG.

As shown in FIG. 2, the insulating film 6101 is formed along the conductor via 2102a and the conductor via 2102b and on the opposite side of the notch 4101a and the notch 4101b with respect to the conductor via 2102a and the conductor via 2102b. Formed in position.

[About choke path function and insulating film for gap adjustment]
The choke path 5101a corresponds to the space from the end of the opening 3101 to the notch 4101a in the space between the surface layer conductor 1101 and the surface layer conductor 1201. Similarly, the choke path 5101b corresponds to a space from the other end of the opening 3101 to the notch 4101b in a space sandwiched between the surface layer conductor 1101 and the surface layer conductor 1201.

Further, the choke path 5102a corresponds to a space surrounded by the conductor via 2102a and the conductor via 2101 in a space sandwiched between the surface layer conductor 1101 and the inner layer conductor 1111. Similarly, the choke path 5102 b corresponds to a space surrounded by the conductor via 2102 b and the conductor via 2101 in a space sandwiched between the surface layer conductor 1101 and the inner layer conductor 1111.

The space between the surface layer conductor 1101 and the surface layer conductor 1201 in the choke path 5101a and the choke path 5101b is regulated by the thicknesses of the insulating film 6101a for adjusting the gap and the insulating film 6101b for adjusting the gap.

The dimensions of the

choke paths

5101a, 5101b, 5102a, and 5102b affect the function of suppressing leakage of high-frequency signals from the gap between the dielectric waveguide 9101 and the dielectric waveguide 9201.

FIG. 3 is an exploded perspective view of each conductor layer shown in FIG. 1 in Embodiment 1 of the present invention. As shown in the exploded perspective view of FIG. 3, the surface layer conductor 1101 and the inner layer conductor 1111 are electrically connected to each other through a plurality of conductor vias 2102a and a plurality of conductor vias 2102b. Further, the surface layer conductor 1101, the inner layer conductor 1111, the inner layer conductor 1112, and the surface layer conductor 1102 are electrically connected to each other through a plurality of conductor vias 2101, thereby constituting the multilayer dielectric substrate 100.

Further, the surface layer conductor 1201, the inner layer conductor 1211, the inner layer conductor 1212, and the surface layer conductor 1202 are electrically connected to each other through a plurality of conductor vias 2201 to constitute the multilayer dielectric substrate 200. As shown in FIG. 1, the dielectric waveguide 9101 formed in the multilayer dielectric substrate 100 and the dielectric waveguide 9201 formed in the multilayer dielectric substrate 200 are used for gap adjustment. Through the insulating film 6101, electromagnetic connection is made with a desired gap.

[Method for forming insulating film for gap adjustment]
An example of the gap adjusting insulating film 6101 applied to the first embodiment is a liquid photo solder resist. Therefore, a method for forming a liquid photo solder resist will be specifically described.

Liquid photo solder resist is a very common technique that is used as a surface protective film of a substrate and can be manufactured in a normal substrate manufacturing process. 4A to 4E are schematic views showing the formation of the liquid photo solder resist in the substrate manufacturing process according to the first embodiment of the present invention in the order of steps. In FIGS. 4A to 4E, elements such as the conductor pattern and the through hole of the substrate are not shown.

FIG. 4A is a diagram showing a coating process of a liquid photo solder resist. A liquid solder resist 6301 is applied to the entire surface of the dielectric substrate 300 that has been stacked up to the previous process and completed to the formation of the conductor pattern using a coating apparatus 7001.

There are several types of coating apparatuses 7001, and the coating apparatus 7001 shown in FIG. 4A is a spray method. Other types of the coating apparatus 7001 include a curtain method and a screen printing method.

FIG. 4B is a diagram showing a drying (semi-cure) process. The liquid solder resist 6302 applied in a planar shape on the surface of the dielectric substrate 300 is dried by hot air 7002 to be semi-cured. In addition, in each process of FIG. 4A and FIG. 4B, it may be performed simultaneously on both surfaces, and may be performed separately for each side.

FIG. 4C is a diagram showing an exposure process. The exposure mask 7003 is previously provided with a portion that transmits light and a portion that blocks light. Then, after aligning and overlapping the exposure mask 7003 on the dielectric substrate 300, light such as ultraviolet rays 7004 is irradiated. As a result, the portion of the solder resist 6303 through which light has passed is cured by a chemical change.

FIG. 4D is a diagram showing a development process. An alkali developer 7005 is sprayed on the substrate 300 after the exposure process. In this case, the portion 6304 cured in the solder resist exposure process is not affected by the alkaline developer 7005. On the other hand, the uncured portion of the solder resist is washed away with an alkali developer 7005. Thereby, it becomes a board | substrate with which the soldering resist remained only in the location which light hits in the exposure process.

FIG. 4E is a diagram showing a post-cure process. When hot air 7006 is applied to the substrate 300 after development, the solder resist 6305 is completely cured and becomes chemically stable.

As shown in FIGS. 1 and 3, the number of conductor layers of each multilayer dielectric substrate exemplified in the first embodiment is four. However, the number of conductor layers is not limited to four, and the number of inner layer conductors may be three or more.

In addition, the dielectric waveguide 9101 and the dielectric waveguide 9201 illustrated in the first embodiment are respectively provided between one surface conductor of the multilayer dielectric substrate 100 and the multilayer dielectric substrate 200 and the opposite surface conductor. Is formed. However, the waveguide structure of the present invention is not limited to this example, and may exist only between the inner layer conductor of the multilayer dielectric substrate 100 and the inner layer conductor of the multilayer dielectric substrate 200.

[Overview of overall picture when used for array antenna]
Next, an example in which the present invention is applied to an array antenna will be described. FIG. 5 is a cross-sectional view of the substrate when the waveguide bonding structure according to the present invention is applied to an array antenna in the first embodiment of the present invention.

In FIG. 5, the multilayer dielectric substrate 101 and the multilayer dielectric substrate 201 face each other and are arranged close to each other. A number of dielectric waveguides 9102 according to the present invention are formed on the multilayer dielectric substrate 101, and a number of dielectric waveguides 9202 according to the present invention are formed on the multilayer dielectric substrate 201.

The surface layer conductor 1121 is disposed on the surface of the multilayer dielectric substrate 101 on the side where the multilayer dielectric substrate 201 is disposed. Further, the surface layer conductor 1121 is provided with an opening of the dielectric waveguide 9102.

On the other hand, the surface layer conductor 1122 is disposed on the surface of the multilayer dielectric substrate 101 opposite to the side on which the multilayer dielectric substrate 201 is disposed. Further, the surface layer conductor 1122 is provided with an antenna element.

The inner layer conductor 1131 is composed of a plurality of layers and is relatively on the surface layer conductor 1121 side of the multilayer dielectric substrate 101. The inner layer conductor 1131 is connected to the surface layer conductor 1121 by a conductor via 2111 to form a dielectric waveguide 9102. Further, a part of the inner layer conductor 1131 is connected to the surface layer conductor 1121 by the conductor via 2112a and the conductor via 2112a to form a choke path 5112a and a choke path 5112b.

The inner layer conductor 1132 is composed of a plurality of layers and is relatively on the surface layer conductor 1122 side of the multilayer dielectric substrate 101. The inner layer conductor 1132 serves to electrically or electromagnetically connect the dielectric waveguide 9102 and the antenna element provided on the surface layer conductor 1122.

The gap adjusting insulating film 6104, which is a feature of the present invention, is formed on the surface conductor 1121 of the multilayer dielectric substrate 101. Further, the insulating film 6104 for adjusting the gap is in contact with the surface conductor 1221 of the multilayer dielectric substrate 201.

The surface layer conductor 1221 is disposed on the surface of the multilayer dielectric substrate 201 on the side where the multilayer dielectric substrate 101 is disposed. Further, the surface layer conductor 1221 is provided with an opening of the dielectric waveguide 9202. In addition, an electronic component 8203 of a control circuit or a power supply circuit is soldered to a portion of the surface layer conductor 1221 that does not face the multilayer dielectric substrate 101.

On the other hand, the surface layer conductor 1222 is disposed on the surface of the multilayer dielectric substrate 201 opposite to the side on which the multilayer dielectric substrate 101 is disposed. Furthermore, the surface layer conductor 1222 is soldered with an electronic component 8201 of a control circuit or a power supply circuit and an electronic component 8202 of a high-frequency circuit.

The inner layer conductor 1231 is composed of a plurality of layers and is relatively on the surface conductor 1221 side of the multilayer dielectric substrate 201. The inner layer conductor 1231 is connected to the surface layer conductor 1221 by the conductor via 2211 to form the dielectric waveguide 9202.

The inner layer conductor 1232 is composed of a plurality of layers, is relatively on the surface layer conductor 1222 side of the multilayer dielectric substrate 201, and is electrically soldered to the dielectric waveguide 9102 and the surface layer conductor 1122. 8201 and the electronic component 8202 of the high frequency circuit serve to electrically connect.

The solder resist 6211 is formed for the purpose of suppressing a solder bridge when the electronic component 8203 of the control circuit or the power supply circuit is soldered. Specifically, the solder resist 6211 is formed on the surface conductor 1221 of the dielectric substrate 201 in a range that does not face the dielectric substrate 101.

On the other hand, the solder resist 6212 is formed for the purpose of suppressing a solder bridge when soldering the electronic component 8201 of the control circuit and the power supply circuit and the electronic component 8202 of the high-frequency circuit. Specifically, the solder resist 6212 is formed on the surface layer conductor 1222 of the dielectric substrate 201.

The fixing screw 8204 is provided through the dielectric substrate 101 and the dielectric substrate 201. The fixing screw 8204 has a function of maintaining the alignment of the two substrates in the planar direction and the close contact in the vertical direction.

Also, since both substrates are fixed with screws, the substrates can be bonded and separated without any special equipment. Therefore, the performance does not change greatly even if the pasting and separation are repeated. For this reason, it is possible to redo the alignment and bonding of the substrates, for example, when a deficiency is found during the inspection. As a result, convenience in handling such as replacement of one of the substrates can be obtained.

Embodiment 2. FIG.
In the first embodiment, as an example of the structure for adjusting the gap when the waveguides are bonded together, an insulating film provided in a continuous solid surface shape outside the choke structure of the dielectric substrate is used. explained. On the other hand, in the second embodiment, a case will be described in which the same effect is obtained by using a gap adjusting insulating film having a different shape.

FIG. 6 is a top view showing an example of the multilayer dielectric substrate 100 according to the second embodiment of the present invention. Specifically, FIG. 6 shows an example in which the gap adjusting insulating film 6102 is divided into a plurality along the outer side of the choke path 5101.

FIG. 7 is a top view showing another example of the multilayer dielectric substrate 100 according to Embodiment 2 of the present invention. Specifically, FIG. 7 shows a plurality of surface layer conductors 1101 by providing a plurality of openings while providing the gap adjusting insulating film 6103 along the outside of the choke path 5101 in a continuous solid surface shape. It is an example exposed at a location. The configuration other than the gap adjusting insulating

films

6102 and 6103 is the same as the configuration shown in FIG.

As described above, even when the gap adjusting insulating

films

6102 and 6103 having the shapes shown in FIGS. 6 and 7 are used, the same effect as the case of using the gap adjusting insulating film 6101 in FIG. Can be obtained.

Furthermore, when the gap adjusting insulating

films

6102 and 6103 illustrated in the second embodiment are used, the degree of freedom in providing the electrical pattern wiring of the dielectric substrate 100 or providing the structural fixing structure or the like. Will improve. As a result, a waveguide connection structure with better performance can be realized.

Embodiment 3 FIG.
In the first embodiment and the second embodiment, the example in which the gap adjusting insulating film is provided on the surface conductor 1101 of the dielectric substrate 100 having the choke path 5102a and the choke path 5102b has been described. On the other hand, in the third embodiment, a case where a similar effect is obtained by providing an insulating film for gap adjustment at different locations will be described.

FIG. 8 is a longitudinal sectional view showing a waveguide connection structure according to Embodiment 3 of the present invention. Compared with the previous FIG. 1, FIG. 8 differs in the formation position of the insulating film 6201 for gap adjustment. Specifically, in FIG. 1, the gap adjusting insulating film 6101 is provided on the surface conductor 1101 of the dielectric substrate 100 having the choke path 5102a and the choke path 5102b.

On the other hand, in FIG. 8, the gap adjusting insulating film 6201 is provided on the surface conductor 1201 of the dielectric substrate 200 having no choke path. Other configurations are the same as those in FIG.

The advantages of the structure of the third embodiment in which the insulating film 6201 for adjusting the gap is provided on the dielectric substrate 200 side having no choke path will be described. In the photo solder resist forming process, as described in FIGS. 4A to 4E, each surface is exposed and developed at once.

Here, when the structure of the present invention is used for the array antenna as shown in FIG. 5, the dielectric substrate 100 having the choke path is formed on the surface of the surface layer conductor 1102 in order to obtain good characteristics as an antenna panel. May adopt a structure without a photo solder resist.

In that case, if an insulating film is not provided on the surface layer conductor 1101, the dielectric substrate 100 does not require any solder resist process. For this reason, the waveguide bonding structure which concerns on this invention can be manufactured more cheaply and easily.

Further, since the dielectric substrate 100 does not have any solder resist, there is no configuration in which heat is applied such as a semi-cure process and a post-cure process. As a result, it is difficult for the dielectric substrate 100 to warp, and the gap space between the dielectric substrate 100 and the dielectric substrate 200 can be stably narrowed.

On the other hand, for the dielectric substrate 200 having no choke path, a solder resist is indispensable for soldering electronic components. For this reason, even if the insulating film 6201 for adjusting the gap is provided, the number of steps for manufacturing the substrate does not increase. As a result, the waveguide bonding structure according to the present invention can be manufactured at a lower cost.

Embodiment 4 FIG.
In the first embodiment, as a solder resist forming method, the case where a liquid photo solder resist is applied as shown in FIG. 4 has been described. On the other hand, in the fourth embodiment, a case where the same effect is realized by using another solder resist forming method will be described.

In the fourth embodiment, a method for forming a dry film type photo solder resist will be described as an example of an insulating film for adjusting a gap.

FIGS. 9A to 9D are schematic views showing the formation of the dry film type photo solder resist in the substrate manufacturing according to the fourth embodiment of the present invention in the order of steps. In FIGS. 9A to 9D, as in FIGS. 4A to 4E, elements such as a conductor pattern and a through hole of the substrate are not shown.

FIG. 9A is a diagram showing a process of attaching a dry film type photo solder resist. A dry film type photo solder resist 6311 is attached to the substrate 310 by using a vacuum laminator 7007 as shown in FIG. 9A.

Unlike the case of the liquid photo solder resist, the drying (semi-cure) process corresponding to FIG. 4B is not necessary. The exposure process in FIG. 9B, the development process in FIG. 9C, and the post-cure process in FIG. 9D are the same as the exposure process in FIG. 4C, the development process in FIG. 4D, and the post-cure process in FIG.

Even with the gap adjusting insulating film manufactured in such a process, the same effect as that obtained when the liquid photo solder resist described in the first embodiment is used can be obtained. Furthermore, as in the fourth embodiment, the following two additional effects can be obtained by using the step of attaching the rye film type photo solder resist.

The dry film type photoresist uses a film formed in advance with a certain film thickness. For this reason, the dry film type photoresist has a smaller variation in the resist film thickness on the substrate and can be kept more constant than the liquid photo solder resist. As a result, the gap variation between the dielectric substrate 100 and the dielectric substrate 200 can be reduced and kept constant, and leakage of high-frequency signals can be further suppressed.

Also, when a dry film type photoresist is employed, a semi-cure process can be eliminated as compared with the case where a liquid photo solder resist is employed. As a result, the number of steps in which heat is applied to the substrate is small, and it is difficult for the substrate to be warped. Therefore, the gap suppressing effect is further improved, and a waveguide connection structure with better performance can be realized.

In the first to fourth embodiments described above, the specific dielectric loss tangent of the gap adjusting insulating film is not mentioned, but as an example, by setting the dielectric loss tangent to 0.02 to 0.04, An array antenna having suitable performance can be realized.

In the first to fourth embodiments described above, the specific dielectric constant of the multilayer dielectric substrate is not mentioned, but as an example, the dielectric constant of the multilayer dielectric substrate having the choke structure is changed to the choke structure. By making it smaller than the relative dielectric constant of the multilayer dielectric substrate having no, an array antenna having suitable performance can be realized.

100, 101, 200, 201, 300, 310 Multilayer dielectric substrate, 1101, 1102, 1201, 1202 Surface conductor, 1111, 1112, 1211, 1212 Inner layer conductor, 2101, 102a, 2102b, 2201, 2202a, 2202b, 2111, 2112, Conductor vias, 3101, 3201, Openings, 3111, 3112, 3211, 3212 Conductor extraction parts, 4101a, 4101b Notches, 5101a, 5101b, 5102a, 5102b Choke paths, 6101a, 6101b Insulation films for gap adjustment, 9101, 9201 Dielectric Body waveguide.

Claims

A first multilayer dielectric substrate having a first waveguide formed with a first opening;
A second waveguide having a second opening formed therein, and disposed opposite to the first multilayer dielectric substrate such that the first opening and the second opening are opposed to each other; A second multilayer dielectric substrate,
Waveguide bonding comprising: a dielectric insulating film that regulates a gap in a space formed by arranging the first multilayer dielectric substrate and the second multilayer dielectric substrate to face each other Structure,
The first multilayer dielectric substrate comprises:
A cut formed on a surface facing the second multilayer dielectric substrate, the first opening is formed, and a predetermined distance is formed from an end of the first opening. A first surface layer conductor having a notch, and
The dielectric insulating film is disposed further outside the notch in a direction orthogonal to the tube axis direction of the first waveguide.
The first multilayer dielectric substrate comprises:
A first inner layer conductor disposed below the first surface layer conductor;
A conductor via that is disposed to surround the first opening and electrically connects the first surface layer conductor and the first inner layer conductor;
A choke structure composed of a first surface layer conductor having the cutout portion, the first inner layer conductor, and the conductor via outside the first opening in a direction perpendicular to the tube axis direction. The waveguide bonding structure according to claim 1, further comprising:
The waveguide bonded structure according to claim 2, wherein the dielectric insulating film is formed integrally with the first multilayer dielectric substrate having the choke structure.
The waveguide bonded structure according to claim 2, wherein the dielectric insulating film is formed integrally with the second multilayer dielectric substrate not having the choke structure.
5. The waveguide bonding structure according to claim 2, wherein the dielectric insulating film is formed so as to surround the choke structure. 6.
5. The waveguide bonding structure according to claim 2, wherein the dielectric insulating film is divided into a plurality of parts so as to surround the choke structure. 6.
The waveguide bonding structure according to any one of claims 2 to 6, wherein an electronic component is mounted on the second multilayer dielectric substrate that does not have the choke structure.
The waveguide according to any one of claims 2 to 7, wherein the first multilayer dielectric substrate having the choke structure has an antenna element formed on a surface opposite to the first surface conductor. Bonding structure.
The waveguide bonding structure according to any one of claims 2 to 8, wherein a relative dielectric constant of the substrate having the choke structure is smaller than that of a substrate not having the choke structure.
The gap between the first multilayer dielectric substrate and the second multilayer dielectric substrate is maintained via a dielectric insulating film and fixed with screws. The waveguide bonded structure as described.
The waveguide bonded structure according to any one of claims 1 to 10, wherein the dielectric insulating film has a dielectric loss tangent of 0.02 to 0.04.