WO2018189752A1 - Solar cell - Google Patents

Solar cell Download PDF

Info

Publication number
WO2018189752A1
WO2018189752A1 PCT/IN2018/050214 IN2018050214W WO2018189752A1 WO 2018189752 A1 WO2018189752 A1 WO 2018189752A1 IN 2018050214 W IN2018050214 W IN 2018050214W WO 2018189752 A1 WO2018189752 A1 WO 2018189752A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
solar cell
fabricated
bottom electrode
electrode layer
Prior art date
Application number
PCT/IN2018/050214
Other languages
French (fr)
Inventor
Saloni CHAURASIA
Sushobhan Avasthi
Srinivasan Raghavan
Navakant BHAT
Original Assignee
Indian Institute Of Science
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Indian Institute Of Science filed Critical Indian Institute Of Science
Publication of WO2018189752A1 publication Critical patent/WO2018189752A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H01L31/0392Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

Definitions

  • the present subject matter relates in general to solar cells, and in particular to solar cells having an electrode layer disposed over a barrier layer.
  • Solar cells are fabricated from semiconductors, such as silicon, germanium, gallium arsenide, copper indium gallium selenide, cadmium telluride, and the like.
  • semiconductors such as silicon, germanium, gallium arsenide, copper indium gallium selenide, cadmium telluride, and the like.
  • the semiconductors are deposited on a substrate in the form of layers to form the solar cell.
  • the substrate may be, for example, other semiconductors, glass, plastics, metals, and metal alloys.
  • Metal substrates, such as steel, titanium, copper, and the like, are generally preferred as substrates as they provide a high temperature tolerance, are cost-effective, and allow the solar cells to be formed in different shapes due to their elasticity.
  • FIG. 1 illustrates a solar cell, in accordance with an implementation of the present subject matter.
  • FIG. 2a illustrates an example intermediate layer, in accordance with an implementation of the present subject matter.
  • FIG. 2b illustrates yet another example intermediate layer, in accordance with an implementation of the present subject matter.
  • FIG. 2c illustrates yet another example intermediate layer, in accordance with an implementation of the present subject matter.
  • Fig. 2d illustrates yet another example intermediate layer, in accordance with an implementation of the present subject matter.
  • Fig. 3 illustrates graphical representation of calculations to estimate the thickness of the TiN barrier layer to prevent Fe diffusion at various temperatures and times, in accordance with an implementation of the present subject matter.
  • Fig. 4 illustrates an I-V curve for n-type germanium with TiN showing ohmic contact, in accordance with an implementation of the present subject matter.
  • Fig. 5 illustrates X-Ray Diffraction (XRD) patterns of TiN/Ge system, in accordance with an implementation of the present subject matter.
  • Fig. 6 illustrates Raman spectra of TiN/Ge system, in accordance with an implementation of the present subject matter.
  • Solar cells are photovoltaic devices that convert sunlight into electricity.
  • Solar cells generally comprise of absorber layers, fabricated from semiconductors, deposited over a substrate. Semiconductors used in the absorber layer maybe crystalline or in the form of thin-films.
  • Solar cells also contain two electrodes for carrying the electric current generated. One of the electrodes, generally referred to as bottom electrode, is disposed below the absorber layers, while the second electrode, also called a transparent electrode, is provided above the absorber layers.
  • Absorber layers are deposited over substrates to form solar cells.
  • metallic substrates such as steel
  • the substrate When metallic substrates are used, the substrate itself may form the bottom electrode.
  • Metallic substrates further provide advantages, such as high temperature tolerance, cost-effectiveness, and malleability which helps in forming different shapes.
  • absorber layers are deposited as thin films, for example, thin films of gallium arsenide (GaAs), Copper indium gallium selenide solar cells (CIGS), cadmium telluride (CdTe) may be deposited on steel to form the solar cell.
  • Thin film based solar cells are associated with low cost of manufacturing and high performance compared to traditional solar cells fabricated using crystalline silicon or GaAs.
  • Minority carrier lifetime measures how long a carrier is likely to stay around before recombining.
  • Diffusion length is the average distance that the excess carriers can cover before they recombine.
  • V oc open circuit voltage
  • the minority carrier diffusion length needs to be more than 100 ⁇ in poly-crystalline silicon grain layer.
  • the Fe contamination in polycrystalline silicon grain layer should be less than 10 12 cm "3 .
  • a barrier layer may be disposed between the substrate and the absorber layers of the solar cell.
  • the barrier layer may prevent the diffusion of metal atoms, thereby, preventing the contamination of the semiconductors and further enabling high performance solar cells.
  • copper indium gallium selenide solar cells (CIGS) thin film solar cells fabricated on steel show very low conversion efficiencies in absence of diffusion barrier and much higher efficiencies in presence of silicon dioxide diffusion barrier.
  • Another example is Gallium Arsenide (GaAs) solar cell fabricated on metal foil while using a layer of aluminium oxide as diffusion barrier.
  • solar cells having steel substrate and a metal nitride layer acting as diffusion barrier are also known.
  • the bottom electrode is fabricated as a metal film disposed between the substrate and the absorber layer, above the barrier layer.
  • an aluminium film may be used as bottom electrode.
  • the bottom electrode is disposed below the absorber layers and above the substrate. Therefore, the bottom electrode is to be deposited before deposition of the absorber layers.
  • Semiconductor deposition is carried out at a high temperature, such as at temperature greater than 200 °C.
  • metallic impurities from the bottom electrode may diffuse into the semiconductor layer, thereby, contaminating the semiconductor of the absorber layers of the solar cell.
  • the metal atoms may cause deep defects to the semiconductor and may act as traps or recombination-generation centres thereby, resulting in poorly performing solar cells.
  • the bottom electrode material may not stay thermally stable at such high temperature, and the bottom electrode may melt or begin to soften as the temperature rises to 600 °C and above.
  • An example solar cell comprises a substrate.
  • An intermediate layer is provided on the substrate.
  • the intermediate layer comprises a barrier layer and a dielectric layer.
  • the barrier layer is fabricated from a first metal nitride.
  • a bottom electrode layer is provided on the intermediate layer.
  • the bottom electrode layer is fabricated from a second metal nitride. The first and the second metal nitride may have different characteristics.
  • the substrate may be fabricated from alloys of steel comprising iron, in an example, stainless steel.
  • Multiple barrier layers and dielectric layers may form the intermediate layer.
  • the dielectric layer is fabricated from a dielectric material selected from the group consisting of silicon nitride, silicon oxide, aluminium oxide, and combinations, thereof.
  • the first and the second metal nitrides are semiconductor metal nitrides.
  • the first metal nitride and the second metal nitride are independently selected from the group consisting of titanium nitride, tantalum nitride, zirconium nitride and alloys, thereof.
  • the solar cell also comprises absorber layers provided on the bottom electrode layer.
  • the absorber layers are fabricated from semiconductors selected from the group consisting of III-V compound semiconductors, germanium, and combinations, thereof.
  • a top transparent electrode layer forming a top electrode may be provided on the absorber layers.
  • the top transparent electrode layer may be fabricated from indium tin oxide, zinc oxide, cadmium oxide, carbon nanotubes, graphene, conductive polymers, and combinations thereof.
  • Metal nitrides provide reduction in penetration of metal atoms into absorber layers compared to conventional barrier layers. Therefore, by using the metal nitride as the barrier layer and the bottom electrode layer, permeability of metal atoms into the absorber layers is reduced, thereby, increasing efficiency of the solar cell. Further, metal nitrides are non-contaminating and non-reactive with the absorber layers and are chemically and mechanically stable within the working temperature range and the temperature range during deposition. Further, as the bottom electrode layer is fabricated from the metal nitride, diffusion of metal atoms from a metallic electrode into the absorber layers is eliminated.
  • the dielectric layer provided in the intermediate layer further reduces diffusion of the metal atoms from the substrate to the absorber layers.
  • the dielectric layer also additionally covers the grain boundaries of the barrier layers.
  • grain boundary is an interface between two grains and are 2D defects. Grain boundaries tend to decrease the electrical and thermal conductivity of the material. By covering the grain boundaries of the barrier layer, the dielectric layer also helps in preventing of shorting of the solar cell.
  • Fig. 1 illustrates an example solar cell 100, in accordance with an implementation of the present subject matter.
  • Fig. 1 depicts cross-sectional view of the example solar cell 100.
  • the solar cell 100 comprises a substrate 102.
  • the substrate 102 forms a base for the solar cell 100.
  • the substrate 102 is fabricated from a metal selected from alloys of steel.
  • the substrate is fabricated from stainless steel.
  • metallic substrates provide high temperature tolerance, cost effectiveness, malleability, and scalability for large- scale production of the solar cell 100.
  • An intermediate layer 104 is provided on the substrate 102.
  • the intermediate layer 104 comprises a barrier layer and a dielectric layer.
  • the barrier layer is fabricated from a first metal nitride.
  • the first metal nitride is a semiconductor metal nitride.
  • the first metal nitride may be selected from the group consisting of titanium nitride, tantalum nitride, zirconium nitride and alloys, thereof.
  • the barrier layer is fabricated from titanium nitride. Diffusion of iron from the substrate 102 into titanium nitride is low as can be seen from Table 2 reproduced from Grigorov, G.I., et al., "Iron diffusion from pure Fe substrate into TiN buffer layers.” Physica C: Superconductivity, 1995. 241(3-4): p. 397-400 provided below.
  • the bottom electrode layer has a resistivity in a range of 10-200 ⁇ cm and a contact resistance in a range of 2-30 ⁇ /cm 2 .
  • the intermediate layer 104 also comprises a dielectric layer.
  • the dielectric layer further reduces diffusion of any metal atoms from the substrate 102.
  • the dielectric layer also additionally covers the grain boundaries of the barrier layer. By covering the grain boundaries of the barrier layer, the dielectric layer also helps in preventing of shorting of the solar cell 100.
  • the dielectric layer is fabricated from a dielectric material selected from the group consisting of silicon nitride, silicon oxide, aluminium oxide, and combinations, thereof.
  • the intermediate layer 104 comprises the dielectric layer provided on the barrier layer. This will be explained later with reference to Fig. 2a.
  • the intermediate layer 104 comprises the barrier layer provided on the dielectric layer. This will be explained later with reference to Fig. 2b.
  • the intermediate layer 104 comprises the dielectric layer sandwiched between at least two dielectric layers. This will be explained later with reference to Fig. 2c.
  • the intermediate layer 104 comprises the barrier layer sandwiched between at least two dielectric layers. This will be explained later with reference to Fig. 2d.
  • a bottom electrode layer 106 is provided on the intermediate layer 104.
  • the bottom electrode layer 106 is fabricated from a second metal nitride.
  • the second metal nitride is a semiconductor metal nitride.
  • the second metal nitride may be selected from the group consisting of titanium nitride, tantalum nitride, zirconium nitride and alloys, thereof.
  • the bottom electrode layer 106 is fabricated from titanium nitride.
  • the bottom electrode layer 106 is in contact with absorber layers 108. Therefore, as the bottom electrode layer 106 is fabricated from the metal nitride, diffusion of metal atoms into the absorber layers 108 is eliminated.
  • the barrier layer within the intermediate layer 104 and the bottom electrode layer 106 differ from each other in terms of morphology, grain structure, film properties, and deposition methods.
  • the barrier layer may be fabricated from an amorphous metal nitride and the bottom electrode layer may be fabricated from a crystalline metal nitride.
  • the bottom electrode layer 106 may have a sheet resistance of less than ⁇ /sq and specific contact resistance of less than 0.1 ⁇ /cm 2 . This can be achieved by using polycrystalline metal nitrides with porous and fibrous grains.
  • metal nitrides used as the barrier layer are dense and can be amorphous and large-grained to reduce metal atom diffusion. Further, the bottom electrode layer 106 must form ohmic contact with the absorber layers 108 for efficient functioning.
  • the absorber layers 108 are provided on the bottom electrode layer 106.
  • the absorber layers 108 may be fabricated from a semiconductor selected from the group consisting of III-V compound semiconductors, germanium, silicon, CIGS, GaAs, CdTe, organic and hybrid perovskites.
  • the absorber layers 108 may be doped or undoped as will be understood.
  • the solar cell 100 further comprises a top transparent electrode layer 110 provided on the absorber layers 108.
  • the top transparent electrode layer 110 may be fabricated from a material selected from the group consisting of indium tin oxide, zinc oxide, cadmium oxide, carbon nanotubes, graphene, conductive polymers, and combinations thereof.
  • FIG. 2a- 2d depict various examples of the solar cell 100, in accordance with an implementation of the present subject matter.
  • Fig. 2a depicts an example of the solar cell 100 where the intermediate layer 104 comprises a single barrier layer 202 and a single dielectric layer 204.
  • the dielectric layer 204 is provided on the barrier layer 202.
  • the bottom electrode layer 106 is provided over the dielectric layer 204.
  • Fig. 2b depicts yet another example of the solar cell 100, in accordance with an implementation of the present subject matter.
  • the barrier layer 202 is provided on the dielectric layer 204.
  • surface properties, morphology, grain structure, film properties of the bottom electrode layer 106 may be different from that of the bottom electrode layer 106.
  • Fig. 2c depicts yet another example of the solar cell 100, in accordance with an implementation of the present subject matter.
  • the intermediate layer 104 multiple dielectric layers are provided, namely dielectric layer 204a and 204b.
  • the barrier layer 202 is sandwiched between dielectric layers 204a and 204b.
  • the bottom electrode layer 106 is provided on the dielectric layer 204b.
  • Fig. 2d depicts yet another example of the solar cell 100, in accordance with an implementation of the present subject matter.
  • multiple barrier layers are provided, namely barrier layers 202a and 202b.
  • the dielectric layer 204 is sandwiched between barrier layers 202a and 202b.
  • the bottom electrode layer 106 is provided on the barrier layer 202b.
  • any number of barrier layers and dielectric layers may be provided in the intermediate layer 104 in any combination and examples as shown in Fig. 2a- 2d should not be construed as limiting.
  • the top transparent electrode layer 110 has a thickness in a 100- 200 nm
  • the absorber layers 108 have a thickness in a range of 1-5 ⁇
  • the bottom electrode layer 106 has a thickness in a range of 150-250 nm
  • the barrier layer 202 has a thickness in a range of 0.1-10 ⁇
  • the dielectric layer 204 has a thickness in a range of 0.1-1 ⁇
  • the substrate 102 has a thickness greater than 100 ⁇ .
  • each barrier layer 202a and 202b has a thickness in a range of 0.1-10 ⁇
  • each dielectric layer 204a and 204b has a thickness in a range of 0.1-1 ⁇ .
  • the metal nitride as the barrier layer 202 and the bottom electrode layer 106, permeability of metal atoms into the absorber layers 108 is reduced, thereby, increasing efficiency of the solar cell 100.
  • the dielectric layer 204 provided in the intermediate layer 104 further reduces diffusion of the metal atoms from the substrate 102 to the absorber layers 108.
  • the dielectric layer 204 also additionally covers the grain boundaries and prevents shorting of the solar cell 100.
  • Metal atoms reduce the minority carrier lifetime and minority carrier diffusion lengths in the multi-crystalline silicon.
  • Voc open circuit voltage
  • minority carrier diffusion length of more than 100 ⁇ is required and to maintain the diffusion length the iron contamination from the substrate 102 should be less than 10 12 cm "3 as shown in Istratov, A. A.
  • Table 1 shows that during deposition of silicon layer at 600°C for 1 hour on steel, iron from steel penetrated to approximately 540 ⁇ into the silicon bulk.
  • the bottom electrode layer 106 must have sufficient electrical conductivity to complete the solar cell 100.
  • the resistivity of bottom electrode layer 106 depends on the thickness of the metal nitride. Sherman, A., "Growth and properties of LPCVD titanium nitride as a diffusion barrier for silicon device technology.” Journal of the Electrochemical Society, 1990. 137(6): p. 1892-1897 depicts variation of resistivity of Low Pressure Chemical Vapor Deposition (LPCVD) deposited titanium nitride at different thickness.
  • LPCVD Low Pressure Chemical Vapor Deposition
  • the bottom electrode layer 106 should have a resistivity of less than 10 ⁇ /sq which is achievable at approximately 100 nm thickness of titanium nitride.
  • Fig. 3 illustrates graphical representation of calculations to estimate the thickness of the TiN barrier layer to prevent Fe diffusion at various temperatures and times, in accordance with an implementation of the present subject matter.
  • the barrier layer 202 of about 1 ⁇ is sufficient.
  • EXAMPLE 3 STUDIES WITH TITANIUM NITRIDE AS BOTTOM ELECTRODE LAYER
  • the bottom electrode layer 106 must form ohmic contact with the absorber layer 108 for efficient functioning. Preliminary contact measurements were conducted with germanium as the absorber layer 108 with titanium nitride as bottom electrode layer 106.
  • Fig. 4 illustrates an I-V curve for n-type germanium with TiN showing ohmic contact, in accordance with an implementation of the present subject matter.
  • the test structure constitutes sputtered TiN film on highly doped Si wafer and Ge thin film deposited on top using LPCVD.
  • the I-V curves show linear characteristic indicating ohmic behaviour in both forward and reverse bias of the TiN and germanium contact.
  • the TiN bottom electrode layer must be non-contaminating to enable solar cells fabrication at high temperature.
  • X-Ray Diffraction (XRD) and Raman analysis were conducted to confirm that TiN is non-contaminating.
  • the test structure included deposited TiN films on Ge substrates as well as films annealed at temperatures of 600 °C and 800 °C to simulate the effect of high temperature processing of solar cell on the interaction of TiN and Solar cell materials (Ge here as an example).
  • Fig. 5 and Fig. 6 show XRD and Raman spectra for as deposited and annealed test structures. As evident from the graphs that there is no additional peak except for TiN and Ge indicating no interaction between TiN and Ge and hence proving TiN to be non-contaminating.

Landscapes

  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photovoltaic Devices (AREA)

Abstract

The present subject matter provides solar cells. An example solar cell (100) comprises a substrate (102). An intermediate layer (104) is provided on the substrate (102). The intermediate layer (104) comprises a barrier layer (202) and a dielectric layer (204). The barrier layer (202) is fabricated from a metal nitride. A bottom electrode layer (106) is provided on the intermediate layer (104). The bottom electrode layer (106) is fabricated from a metal nitride.

Description

SOLAR CELL TECHNICAL FIELD
[0001] The present subject matter relates in general to solar cells, and in particular to solar cells having an electrode layer disposed over a barrier layer.
BACKGROUND
[0002] Solar cells are fabricated from semiconductors, such as silicon, germanium, gallium arsenide, copper indium gallium selenide, cadmium telluride, and the like. Generally, the semiconductors are deposited on a substrate in the form of layers to form the solar cell. The substrate may be, for example, other semiconductors, glass, plastics, metals, and metal alloys. Metal substrates, such as steel, titanium, copper, and the like, are generally preferred as substrates as they provide a high temperature tolerance, are cost-effective, and allow the solar cells to be formed in different shapes due to their elasticity. BRIEF DESCRIPTION OF DRAWINGS
[0003] The detailed description is described with reference to the accompanying figures. In the figures, the left- most digit(s) of a reference number identifies the figure in which the reference number first appears. The same numbers are used throughout the drawings to reference like features and components.
[0004] Fig. 1 illustrates a solar cell, in accordance with an implementation of the present subject matter.
[0005] Fig. 2a illustrates an example intermediate layer, in accordance with an implementation of the present subject matter.
[0006] Fig. 2b illustrates yet another example intermediate layer, in accordance with an implementation of the present subject matter.
[0007] Fig. 2c illustrates yet another example intermediate layer, in accordance with an implementation of the present subject matter.
[0008] Fig. 2d illustrates yet another example intermediate layer, in accordance with an implementation of the present subject matter. [0009] Fig. 3 illustrates graphical representation of calculations to estimate the thickness of the TiN barrier layer to prevent Fe diffusion at various temperatures and times, in accordance with an implementation of the present subject matter.
[00010] Fig. 4 illustrates an I-V curve for n-type germanium with TiN showing ohmic contact, in accordance with an implementation of the present subject matter.
[00011] Fig. 5 illustrates X-Ray Diffraction (XRD) patterns of TiN/Ge system, in accordance with an implementation of the present subject matter.
[00012] Fig. 6 illustrates Raman spectra of TiN/Ge system, in accordance with an implementation of the present subject matter.
DETAILED DESCRIPTION
[00013] Solar cells are photovoltaic devices that convert sunlight into electricity. Solar cells generally comprise of absorber layers, fabricated from semiconductors, deposited over a substrate. Semiconductors used in the absorber layer maybe crystalline or in the form of thin-films. Solar cells also contain two electrodes for carrying the electric current generated. One of the electrodes, generally referred to as bottom electrode, is disposed below the absorber layers, while the second electrode, also called a transparent electrode, is provided above the absorber layers.
[00014] Absorber layers are deposited over substrates to form solar cells. Generally, metallic substrates, such as steel, are used. When metallic substrates are used, the substrate itself may form the bottom electrode. Metallic substrates further provide advantages, such as high temperature tolerance, cost-effectiveness, and malleability which helps in forming different shapes. Further, absorber layers are deposited as thin films, for example, thin films of gallium arsenide (GaAs), Copper indium gallium selenide solar cells (CIGS), cadmium telluride (CdTe) may be deposited on steel to form the solar cell. Thin film based solar cells are associated with low cost of manufacturing and high performance compared to traditional solar cells fabricated using crystalline silicon or GaAs.
[00015] While thin-film solar cells deposited on metallic substrates have the advantages as mentioned above, efficiencies of such cells have been found to be low. Efficiency of thin-film solar cells are further reduced when used for high temperature processing, for example, greater than 600 °C. Typically, this is due to diffusion of metal atoms, such as copper and iron, from the metallic substrate to the absorber layers. Diffusion of metal atoms increases with increase in temperature as shown in Table 1 reproduced from Isobe, T., H. Nakashima, and K. Hashimoto, "Diffusion Coefficient of Interstitial Iron in Silicon." Japanese Journal of Applied Physics, 1989. 28(7R): p. 1282. Such diffusion of metal atoms may cause contamination of the absorber layers leading to lower efficiency of thin-film solar cells.
[00016] Further, metal atoms are known to reduce minority carrier lifetime and minority carrier diffusion lengths in semiconducting materials. Minority carrier lifetime, as will be understood, measures how long a carrier is likely to stay around before recombining. Diffusion length, as will be understood, is the average distance that the excess carriers can cover before they recombine. For example, for Si thin- film solar cells, simulations show that to obtain a high open circuit voltage (Voc) of at least 0.54 V across a solar cell, the minority carrier diffusion length needs to be more than 100 μηι in poly-crystalline silicon grain layer. On the other hand, to maintain the diffusion length more than 100 μιη, the Fe contamination in polycrystalline silicon grain layer should be less than 1012 cm"3.
[00017] However, maintaining such low metal concentrations in absorber layers deposited on metal is very challenging as metals display very high diffusivities in semiconductors at even moderate temperatures of 200-600 °C. For example, the effective diffusivity of Fe atoms (DFe) in silicon at different temperature is given in the Table 1. Table 1 shows diffusivity of Fe atoms (DFe) in silicon, along with the depth to which Fe atoms will penetrate silicon in 1 hour.
Table 1: Diffusion study in silicon
Figure imgf000005_0001
400 lxlO"8 120
200 lxlO"10 12
[00018] It can be observed from Table 1 that during deposition of the silicon layer at 600 °C for 1 hour, Fe atoms from steel will penetrate to approximately 540 μιη into the silicon bulk. Thus, it may be understood that given the silicon growth rate via Chemical Vapor Deposition (CVD) -10 μητ/hour at ~600°C, any silicon-on- steel film will be completely saturated with Fe atoms.
[00019] To prevent such diffusion of metal atoms, a barrier layer may be disposed between the substrate and the absorber layers of the solar cell. The barrier layer may prevent the diffusion of metal atoms, thereby, preventing the contamination of the semiconductors and further enabling high performance solar cells. For example, copper indium gallium selenide solar cells (CIGS) thin film solar cells fabricated on steel show very low conversion efficiencies in absence of diffusion barrier and much higher efficiencies in presence of silicon dioxide diffusion barrier. Another example is Gallium Arsenide (GaAs) solar cell fabricated on metal foil while using a layer of aluminium oxide as diffusion barrier. Further, solar cells having steel substrate and a metal nitride layer acting as diffusion barrier are also known.
[00020] However, presence of the barrier layer reduces electrical conductivity of the solar cell. Therefore, an additional bottom electrode is needed to improve electrical contact. The bottom electrode is fabricated as a metal film disposed between the substrate and the absorber layer, above the barrier layer. For example, for a silicon based thin-film solar cell, an aluminium film may be used as bottom electrode. Typically, the bottom electrode is disposed below the absorber layers and above the substrate. Therefore, the bottom electrode is to be deposited before deposition of the absorber layers.
[00021] Semiconductor deposition is carried out at a high temperature, such as at temperature greater than 200 °C. During semiconductor deposition, metallic impurities from the bottom electrode may diffuse into the semiconductor layer, thereby, contaminating the semiconductor of the absorber layers of the solar cell. The metal atoms may cause deep defects to the semiconductor and may act as traps or recombination-generation centres thereby, resulting in poorly performing solar cells. Further, the bottom electrode material may not stay thermally stable at such high temperature, and the bottom electrode may melt or begin to soften as the temperature rises to 600 °C and above.
[00022] The present subject matter provides solar cells that substantially reduce metal contamination from the substrate and provide other advantages as will be discussed below. An example solar cell comprises a substrate. An intermediate layer is provided on the substrate. The intermediate layer comprises a barrier layer and a dielectric layer. The barrier layer is fabricated from a first metal nitride. A bottom electrode layer is provided on the intermediate layer. The bottom electrode layer is fabricated from a second metal nitride. The first and the second metal nitride may have different characteristics.
[00023] In an example, the substrate may be fabricated from alloys of steel comprising iron, in an example, stainless steel. Multiple barrier layers and dielectric layers may form the intermediate layer. In an example, the dielectric layer is fabricated from a dielectric material selected from the group consisting of silicon nitride, silicon oxide, aluminium oxide, and combinations, thereof. In an example, the first and the second metal nitrides are semiconductor metal nitrides. In an example, the first metal nitride and the second metal nitride are independently selected from the group consisting of titanium nitride, tantalum nitride, zirconium nitride and alloys, thereof. The solar cell also comprises absorber layers provided on the bottom electrode layer. The absorber layers are fabricated from semiconductors selected from the group consisting of III-V compound semiconductors, germanium, and combinations, thereof. A top transparent electrode layer forming a top electrode may be provided on the absorber layers. The top transparent electrode layer may be fabricated from indium tin oxide, zinc oxide, cadmium oxide, carbon nanotubes, graphene, conductive polymers, and combinations thereof.
[00024] Metal nitrides provide reduction in penetration of metal atoms into absorber layers compared to conventional barrier layers. Therefore, by using the metal nitride as the barrier layer and the bottom electrode layer, permeability of metal atoms into the absorber layers is reduced, thereby, increasing efficiency of the solar cell. Further, metal nitrides are non-contaminating and non-reactive with the absorber layers and are chemically and mechanically stable within the working temperature range and the temperature range during deposition. Further, as the bottom electrode layer is fabricated from the metal nitride, diffusion of metal atoms from a metallic electrode into the absorber layers is eliminated.
[00025] Further, the dielectric layer provided in the intermediate layer further reduces diffusion of the metal atoms from the substrate to the absorber layers. The dielectric layer also additionally covers the grain boundaries of the barrier layers. As will be understood, grain boundary is an interface between two grains and are 2D defects. Grain boundaries tend to decrease the electrical and thermal conductivity of the material. By covering the grain boundaries of the barrier layer, the dielectric layer also helps in preventing of shorting of the solar cell.
[00026] The above and other features, aspects, and advantages of the subject matter will be better explained with regard to the following description and accompanying figures. It should be noted that the description and figures merely illustrate the principles of the present subject matter along with examples described herein and, should not be construed as a limitation to the present subject matter. It is thus understood that various arrangements may be devised that, although not explicitly described or shown herein, embody the principles of the present disclosure. Moreover, all statements herein reciting principles, aspects, and examples thereof, are intended to encompass equivalents thereof. Further, for the sake of simplicity, and without limitation, the same numbers are used throughout the drawings to reference like features and components.
[00027] Fig. 1 illustrates an example solar cell 100, in accordance with an implementation of the present subject matter. Fig. 1 depicts cross-sectional view of the example solar cell 100. The solar cell 100 comprises a substrate 102. The substrate 102 forms a base for the solar cell 100. The substrate 102 is fabricated from a metal selected from alloys of steel. In an example, the substrate is fabricated from stainless steel. As previously explained, metallic substrates provide high temperature tolerance, cost effectiveness, malleability, and scalability for large- scale production of the solar cell 100. [00028] An intermediate layer 104 is provided on the substrate 102. The intermediate layer 104 comprises a barrier layer and a dielectric layer. The barrier layer is fabricated from a first metal nitride. In an example, the first metal nitride is a semiconductor metal nitride. The first metal nitride may be selected from the group consisting of titanium nitride, tantalum nitride, zirconium nitride and alloys, thereof. In an example, the barrier layer is fabricated from titanium nitride. Diffusion of iron from the substrate 102 into titanium nitride is low as can be seen from Table 2 reproduced from Grigorov, G.I., et al., "Iron diffusion from pure Fe substrate into TiN buffer layers." Physica C: Superconductivity, 1995. 241(3-4): p. 397-400 provided below. Further, titanium nitride is also stable at high temperatures during deposition of subsequent layers forming the solar cell 100. In an example, the bottom electrode layer has a resistivity in a range of 10-200 μΩ cm and a contact resistance in a range of 2-30 μΩ/cm2.
Table 2: Diffusion studies in titanium nitride
Figure imgf000009_0001
[00029] The intermediate layer 104 also comprises a dielectric layer. The dielectric layer further reduces diffusion of any metal atoms from the substrate 102. The dielectric layer also additionally covers the grain boundaries of the barrier layer. By covering the grain boundaries of the barrier layer, the dielectric layer also helps in preventing of shorting of the solar cell 100. The dielectric layer is fabricated from a dielectric material selected from the group consisting of silicon nitride, silicon oxide, aluminium oxide, and combinations, thereof.
[00030] In an example, the intermediate layer 104 comprises the dielectric layer provided on the barrier layer. This will be explained later with reference to Fig. 2a. In another example, the intermediate layer 104 comprises the barrier layer provided on the dielectric layer. This will be explained later with reference to Fig. 2b. In another example, the intermediate layer 104 comprises the dielectric layer sandwiched between at least two dielectric layers. This will be explained later with reference to Fig. 2c. In another example, the intermediate layer 104 comprises the barrier layer sandwiched between at least two dielectric layers. This will be explained later with reference to Fig. 2d.
[00031] A bottom electrode layer 106 is provided on the intermediate layer 104. The bottom electrode layer 106 is fabricated from a second metal nitride. In an example, the second metal nitride is a semiconductor metal nitride. The second metal nitride may be selected from the group consisting of titanium nitride, tantalum nitride, zirconium nitride and alloys, thereof. In an example, the bottom electrode layer 106 is fabricated from titanium nitride. The bottom electrode layer 106 is in contact with absorber layers 108. Therefore, as the bottom electrode layer 106 is fabricated from the metal nitride, diffusion of metal atoms into the absorber layers 108 is eliminated.
[00032] The barrier layer within the intermediate layer 104 and the bottom electrode layer 106 differ from each other in terms of morphology, grain structure, film properties, and deposition methods. The barrier layer may be fabricated from an amorphous metal nitride and the bottom electrode layer may be fabricated from a crystalline metal nitride. For example, for a 1 Sun solar cell device, the bottom electrode layer 106 may have a sheet resistance of less than ΙΟΩ/sq and specific contact resistance of less than 0.1 Ω/cm2. This can be achieved by using polycrystalline metal nitrides with porous and fibrous grains. In contrast, metal nitrides used as the barrier layer are dense and can be amorphous and large-grained to reduce metal atom diffusion. Further, the bottom electrode layer 106 must form ohmic contact with the absorber layers 108 for efficient functioning.
[00033] The absorber layers 108 are provided on the bottom electrode layer 106. The absorber layers 108 may be fabricated from a semiconductor selected from the group consisting of III-V compound semiconductors, germanium, silicon, CIGS, GaAs, CdTe, organic and hybrid perovskites. The absorber layers 108 may be doped or undoped as will be understood. The solar cell 100 further comprises a top transparent electrode layer 110 provided on the absorber layers 108. The top transparent electrode layer 110 may be fabricated from a material selected from the group consisting of indium tin oxide, zinc oxide, cadmium oxide, carbon nanotubes, graphene, conductive polymers, and combinations thereof.
[00034] Fig. 2a- 2d depict various examples of the solar cell 100, in accordance with an implementation of the present subject matter. Fig. 2a depicts an example of the solar cell 100 where the intermediate layer 104 comprises a single barrier layer 202 and a single dielectric layer 204. The dielectric layer 204 is provided on the barrier layer 202. The bottom electrode layer 106 is provided over the dielectric layer 204.
[00035] Fig. 2b depicts yet another example of the solar cell 100, in accordance with an implementation of the present subject matter. In the example as shown in Fig. 2b, in the intermediate layer 104, the barrier layer 202 is provided on the dielectric layer 204. As explained previously, surface properties, morphology, grain structure, film properties of the bottom electrode layer 106 may be different from that of the bottom electrode layer 106.
[00036] Fig. 2c depicts yet another example of the solar cell 100, in accordance with an implementation of the present subject matter. In the example as shown in Fig. 2c, in the intermediate layer 104, multiple dielectric layers are provided, namely dielectric layer 204a and 204b. The barrier layer 202 is sandwiched between dielectric layers 204a and 204b. The bottom electrode layer 106 is provided on the dielectric layer 204b.
[00037] Fig. 2d depicts yet another example of the solar cell 100, in accordance with an implementation of the present subject matter. In the example as shown in Fig. 2d, in the intermediate layer 104, multiple barrier layers are provided, namely barrier layers 202a and 202b. The dielectric layer 204 is sandwiched between barrier layers 202a and 202b. The bottom electrode layer 106 is provided on the barrier layer 202b. As will be understood, any number of barrier layers and dielectric layers may be provided in the intermediate layer 104 in any combination and examples as shown in Fig. 2a- 2d should not be construed as limiting.
[00038] In an example, the top transparent electrode layer 110 has a thickness in a 100- 200 nm, the absorber layers 108 have a thickness in a range of 1-5 μιη, the bottom electrode layer 106 has a thickness in a range of 150-250 nm, the barrier layer 202 has a thickness in a range of 0.1-10 μιη, the dielectric layer 204 has a thickness in a range of 0.1-1 μιη, and the substrate 102 has a thickness greater than 100 μηι. In an example, each barrier layer 202a and 202b has a thickness in a range of 0.1-10 μηι and each dielectric layer 204a and 204b has a thickness in a range of 0.1-1 μπι.
[00039] By using the metal nitride as the barrier layer 202 and the bottom electrode layer 106, permeability of metal atoms into the absorber layers 108 is reduced, thereby, increasing efficiency of the solar cell 100. Further, the dielectric layer 204 provided in the intermediate layer 104 further reduces diffusion of the metal atoms from the substrate 102 to the absorber layers 108. The dielectric layer 204 also additionally covers the grain boundaries and prevents shorting of the solar cell 100.
[00040] The present subject matter will now be illustrated with working examples, which are intended to illustrate the working of disclosure and not intended to be taken restrictively to imply any limitations on the scope of the present disclosure. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood to one of ordinary skill in the art to which this disclosure belongs. It is to be understood that this disclosure is not limited to the particular methods and experimental conditions described, as such methods and conditions may vary depending on the process and inputs used as will be easily understood by a person skilled in the art.
EXAMPLES
EXAMPLE 1: SIMULATION STUDIES OF IRON PENETRATION IN SILICON
[00041] Simulation studies were carried out to study penetration from iron into silicon thin-film by Istratov, A. A., et al., "Control of metal impurities in "dirty" multicrystalline silicon for solar cells". Materials Science and Engineering: B, 2006. 134(2-3): p. 282-286. Results of the simulation studies illustrated a graphical representation of effect of metal contamination of the diffusion lengths of multi- crystalline silicon. Further, Istratov, A.A., et al also depicts graphical representation of effect of minority carrier diffusion length (Lmono) on Voc of a thin-film silicon solar cells with columnar grains ("g" is the size of silicon grains).
[00042] Metal atoms reduce the minority carrier lifetime and minority carrier diffusion lengths in the multi-crystalline silicon. To obtain an open circuit voltage Voc of 0.54 V, minority carrier diffusion length of more than 100 μιη is required and to maintain the diffusion length the iron contamination from the substrate 102 should be less than 1012 cm"3 as shown in Istratov, A. A. However, as shown in Table 1, during deposition of silicon layer at 600°C for 1 hour on steel, iron from steel penetrated to approximately 540 μιη into the silicon bulk.
EXAMPLE 2: RESISTIVITY OF TITANIUM NITRIDE AT DIFFERENT THICKNESSES
[00043] The bottom electrode layer 106 must have sufficient electrical conductivity to complete the solar cell 100. The resistivity of bottom electrode layer 106 depends on the thickness of the metal nitride. Sherman, A., "Growth and properties of LPCVD titanium nitride as a diffusion barrier for silicon device technology." Journal of the Electrochemical Society, 1990. 137(6): p. 1892-1897 depicts variation of resistivity of Low Pressure Chemical Vapor Deposition (LPCVD) deposited titanium nitride at different thickness. From Sherman, A., it can be observed that to restrict resistance losses to less than 1% of output and to maintain fill factors, the bottom electrode layer 106 should have a resistivity of less than 10 Ω/sq which is achievable at approximately 100 nm thickness of titanium nitride.
[00044] Fig. 3 illustrates graphical representation of calculations to estimate the thickness of the TiN barrier layer to prevent Fe diffusion at various temperatures and times, in accordance with an implementation of the present subject matter. For typical semiconductor deposition processing, the barrier layer 202 of about 1 μιη is sufficient.
EXAMPLE 3: STUDIES WITH TITANIUM NITRIDE AS BOTTOM ELECTRODE LAYER
[00045] The bottom electrode layer 106 must form ohmic contact with the absorber layer 108 for efficient functioning. Preliminary contact measurements were conducted with germanium as the absorber layer 108 with titanium nitride as bottom electrode layer 106. Fig. 4 illustrates an I-V curve for n-type germanium with TiN showing ohmic contact, in accordance with an implementation of the present subject matter. The test structure constitutes sputtered TiN film on highly doped Si wafer and Ge thin film deposited on top using LPCVD. The I-V curves show linear characteristic indicating ohmic behaviour in both forward and reverse bias of the TiN and germanium contact.
[00046] In addition, the TiN bottom electrode layer must be non-contaminating to enable solar cells fabrication at high temperature. X-Ray Diffraction (XRD) and Raman analysis were conducted to confirm that TiN is non-contaminating. The test structure included deposited TiN films on Ge substrates as well as films annealed at temperatures of 600 °C and 800 °C to simulate the effect of high temperature processing of solar cell on the interaction of TiN and Solar cell materials (Ge here as an example). Fig. 5 and Fig. 6 show XRD and Raman spectra for as deposited and annealed test structures. As evident from the graphs that there is no additional peak except for TiN and Ge indicating no interaction between TiN and Ge and hence proving TiN to be non-contaminating.
[00047] Although the subject matter has been described in considerable detail with reference to certain examples and implementations thereof, other implementations are possible. As such, the scope of the present subject matter should not be limited to the description of the preferred examples and implementations contained therein.

Claims

I/We claim:
1. A solar cell (100) comprising:
a substrate (102);
an intermediate layer (104) provided on the substrate (102), wherein the intermediate layer (104) comprises:
a barrier layer (202), wherein the barrier layer (202) is fabricated from a first metal nitride; and
a dielectric layer (204); and
a bottom electrode layer (106) provided on the intermediate layer (104), wherein the bottom electrode layer (106) is fabricated from a second metal nitride.
2. The solar cell (100) as claimed in claim 1, wherein the substrate (102) is fabricated from stainless steel.
3. The solar cell (100) as claimed in claim 1, wherein the intermediate layer (104) comprises the dielectric layer (204) provided on the barrier layer (202).
4. The solar cell (100) as claimed in claim 1, wherein the intermediate layer (104) comprises the barrier layer (202) provided on the dielectric layer (204).
5. The solar cell (100) as claimed in claim 1, wherein the intermediate layer (104) comprises the barrier layer (202) sandwiched between at least two dielectric layers (204a, 204b).
6. The solar cell (100) as claimed in claim 1, wherein the intermediate layer (104) comprises the dielectric layer (204) sandwiched between at least two barrier layers (202a, 202b).
7. The solar cell (100) as claimed in claim 1, wherein the first metal nitride and the second metal nitride are independently selected from the group consisting of titanium nitride, tantalum nitride, zirconium nitride and alloys, thereof.
8. The solar cell (100) as claimed in claim 1, wherein the barrier layer (202) and the bottom electrode layer (106) are fabricated from titanium nitride.
9. The solar cell (100) as claimed in claim 1, wherein the barrier layer (202) is fabricated from an amorphous metal nitride and the bottom electrode layer (106) is fabricated from a crystalline metal nitride.
10. The solar cell (100) as claimed in claim 1, wherein the dielectric layer (204) is fabricated from a dielectric material selected from the group consisting of silicon nitride, silicon oxide, aluminium oxide, and combinations, thereof.
11. The solar cell (100) as claimed in claim 1, wherein the bottom electrode layer (106) has a resistivity in a range of 10-200 μΩ cm and a contact resistance in a range of 2-30 μΩ/cm2.
12. The solar cell (100) as claimed in claim 1, wherein the dielectric layer (204) has a resistivity greater than 1012 Ω cm.
13. The solar cell (100) as claimed in claim 1, wherein absorber layers (108) are provided on the bottom electrode layer (106), wherein the absorber layers (108) are fabricated from semiconductors selected from the group consisting of III- V compound semiconductors, germanium, and combinations, thereof.
14. The solar cell (100) as claimed in claim 13, wherein a top transparent electrode layer (110) is provided on the absorber layers (108) and wherein the top transparent electrode layer (110) is fabricated from indium tin oxide, zinc oxide, cadmium oxide, carbon nanotubes, graphene, conductive polymers, and combinations thereof.
15. The solar cell (100) as claimed in claim 14, wherein the top transparent electrode layer (110) has a thickness in a 100- 200 nm, the absorber layers (108) have a thickness in a range of 1-5 μιη, the bottom electrode layer (106) has a thickness in a range of 150-250 nm, the barrier layer (202) has a thickness in a range of 0.1-10 μιη, the dielectric layer (204) has a thickness in a range of 0.1-1 μιη, and the substrate (102) has a thickness greater than 100 μιη.
PCT/IN2018/050214 2017-04-15 2018-04-13 Solar cell WO2018189752A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
IN201741007845 2017-04-15
IN201741007845 2017-04-15

Publications (1)

Publication Number Publication Date
WO2018189752A1 true WO2018189752A1 (en) 2018-10-18

Family

ID=63792952

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IN2018/050214 WO2018189752A1 (en) 2017-04-15 2018-04-13 Solar cell

Country Status (1)

Country Link
WO (1) WO2018189752A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110098269A (en) * 2019-04-29 2019-08-06 北京铂阳顶荣光伏科技有限公司 Thin-film solar cells and preparation method thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070000537A1 (en) * 2004-09-18 2007-01-04 Craig Leidholm Formation of solar cells with conductive barrier layers and foil substrates
WO2011087878A2 (en) * 2010-01-18 2011-07-21 Applied Materials, Inc. Manufacture of thin film solar cells with high conversion efficiency
KR101340933B1 (en) * 2010-02-08 2013-12-13 후지필름 가부시키가이샤 Metal substrate with insulation layer and manufacturing method thereof, semiconductor device and manufacturing method thereof, solar cell and manufacturing method thereof, electronic circuit and manufacturing method thereof, and light-emitting element and manufacturing method thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070000537A1 (en) * 2004-09-18 2007-01-04 Craig Leidholm Formation of solar cells with conductive barrier layers and foil substrates
WO2011087878A2 (en) * 2010-01-18 2011-07-21 Applied Materials, Inc. Manufacture of thin film solar cells with high conversion efficiency
KR101340933B1 (en) * 2010-02-08 2013-12-13 후지필름 가부시키가이샤 Metal substrate with insulation layer and manufacturing method thereof, semiconductor device and manufacturing method thereof, solar cell and manufacturing method thereof, electronic circuit and manufacturing method thereof, and light-emitting element and manufacturing method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110098269A (en) * 2019-04-29 2019-08-06 北京铂阳顶荣光伏科技有限公司 Thin-film solar cells and preparation method thereof

Similar Documents

Publication Publication Date Title
Yuan et al. Rapid thermal process to fabricate Sb2Se3 thin film for solar cell application
US8143512B2 (en) Junctions in substrate solar cells
KR101197639B1 (en) Graphene structure, method of the same and transparent electrode using the graphene structure
Singh et al. Thin film CdTe-CdS heterojunction solar cells on lightweight metal substrates
US20110027937A1 (en) Methods of forming photovoltaic devices
TW201513380A (en) A high efficiency stacked solar cell
EP2337084A2 (en) Graded Alloy Telluride Layer In Cadmium Telluride Thin Film Photovoltaic Devices And Methods Of Manufacturing The Same
EP2392025A1 (en) Photovoltaic device with improved crystal orientation
JP2009200419A (en) Method for manufacturing solar cell manufacturing method
JP2011205098A (en) Thin film photovoltaic cell
EP2437316A2 (en) Photovoltaic device and method for making the same
KR20130044850A (en) Solar cell and method of fabricating the same
JPWO2016158838A1 (en) Photoelectric conversion device, method for manufacturing photoelectric conversion device, and photoelectric conversion module
CN105324855B (en) Silicon heterogenous solar cell
AU2011202979B8 (en) Apparatus and methods of forming a conductive transparent oxide film layer for use in a cadmium telluride based thin film photovoltaic device
US20120180858A1 (en) Method for making semiconducting film and photovoltaic device
WO2018189752A1 (en) Solar cell
CN104521010A (en) Method for production of a photovoltaic device in substrate configuration
Miyata et al. Homojunction Cu2O solar cells fabricated with various impurity-doped epitaxially grown n-type Cu2O thin film by electrochemical deposition
WO2014074982A2 (en) Methods of annealing a conductive transparent oxide film layer for use in a thin film photovoltaic device
JP5398772B2 (en) Photovoltaic device, manufacturing method thereof, and photovoltaic module
EP2437289A2 (en) Photovoltaic device and method for making
CN103413869A (en) Preparation method of textured ZnO-TCO film and application of textured ZnO-TCO film
Dhere et al. Fabrication and characterization of cd1-xmgxte thin films and their application in solar cells
JP2014053420A (en) Solar cell

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 18783797

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 18783797

Country of ref document: EP

Kind code of ref document: A1