WO2018185257A1

WO2018185257A1 - A multi-layer device and method of making same

Info

Publication number: WO2018185257A1
Application number: PCT/EP2018/058802
Authority: WO
Inventors: Jonathan Coleman; Adam Kelly; Toby Hallam; Georg Duesberg
Original assignee: The Provost, Fellows, Scholars And Other Members Of Board Of Trinity College Dublin
Priority date: 2017-04-05
Filing date: 2018-04-05
Publication date: 2018-10-11

Abstract

The invention provides a multi-layer device structure comprising an active layer of material; and an insulating layer of material, characterised in that the insulating layer is a porous material (e.g. a nanomaterial) and comprises a liquid electrolyte. The insulating layer contains an electrolyte within its porous interior that allows liquid-like ionic mobility in a solid-like structure. The insulating layer can be used to make a number of devices, such as a transistor, a capacitor, or a solar cell. The invention is particularly suited to the field of printed electronics.

Description

Title

A multi-Layer Device and Method of making same Field

A multi-layer device and method of making same is disclosed. Background

The development of printed electronics is becoming increasingly important. Multi-layer devices are routinely used in the electronics/semiconductor industry and recently such structures have been manufactured using printing techniques from materials such as polymers.

In many devices, the critical region consists of an interface between an active material and an electrolyte. For example, the active material might be the channel in an electrochemical transistor, the electrode in a battery (or supercapacitor) or the counter electrode in a solar cell. General examples of such devices are disclosed in a paper published by Wenzhong Bao et al 'aqueous Gating of van der Waals materials on Bilayer Nanopaper'; PCT patent publication number WO2014/191 138 (Solarwell et al) and a paper by Liu et al entitled ' Ion-sensitive field-effect transistor based pH sensors using nano self - assembled polyelectrolyte/nanoparticle multilayer films'.

The role of the electrolyte is to allow ions to be mobile, while not allowing electrons to flow. Using a voltage to drive ions in the electrolyte to and from the interface with the active region is central to the device operation whether that be current switching, energy storage or energy harvesting respectively. Although ions move fastest in liquid electrolytes, the presence of liquids can be problematic for certain device types as it can lead to leakage. This is usually addressed by using solid electrolytes, often polymers containing dissolved ions. However, using solid electrolytes generally leads to reduced ion speed and devices that perform poorly. A further problem is that when a network of nanosheets are printed to make an electronic device the network electrical properties are inferior to those of individual nanosheets. When electricity flows in such a network, it finds it easy to flow through the nanosheets but very hard to get from nanosheet to nanosheet. Thus the overall electrical properties are poor relative to individual nanosheets, leading to quite low currents being observed for thin networks. This problem can be resolved by printing thicker networks - the thicker the network nanosheet the greater the current. However, this introduces a major problem for certain devices such as printed Thin Film Transistors (TFTs). Because transistors tend to be inherently planar, TFTs are usually made from very thin films. For reasons that are well understood, it is very difficult to use the gate voltage to switch the current on and off in thick networks. The current is only switched close to the gate with the regions far from the gate unaffected. This results in nanosheet network transistors that are either so thin as to have currents too low to be useful or when thicker, have currents which are higher but cannot be switched effectively.

It is an object to provide an improved multi-layer device and method of making same.

Summary

According to the invention there is provided, as set out in the appended claims, a multi-layer device structure comprising:

an active layer of material an insulating layer, characterised in that the insulating layer is porous and comprises a liquid electrolyte.

In one embodiment the invention prints combinations of two or more different types of nanosheet to form porous connected networks. The active layer, which can be a switching material in a transistor or an energy storage material in a battery, is combined with a porous network of insulating nanosheets such as Boron Nitride, BN. This porous network of BN can be filled with electrolyte and acts as a reservoir of electrolyte which can then penetrate into the porous structure of the active layer in response to a force, such as a voltage or current. The electrolyte-filled BN network plays the role of the solid electrolyte. However, the ions move through the pores of the BN network just as fast as they do through bulk liquid and much faster than through solid electrolyte. The electrolyte-containing porous material appears from the outside to be completely solid with no indication of liquid contained therein.

In addition to the combination of active layer and insulating layer, additional conducting layers can also be printed to act as electrodes. This allows the production of all-printed devices.

In one embodiment there is provided an all-printed, vertically-stacked transistor with graphene electrodes, a transition metal dichalcogenide channel and a BN separator, all formed from nanosheet networks.

In one embodiment the active layer is a porous material.

In one embodiment the ions in the liquid electrolyte are configured to move between layers in response to an applied voltage.

In one embodiment the electrolyte is configured to penetrate the porous material of said active layer. It will be appreciated that if the active region is porous, the electrolyte will penetrate. If the active region is solid, the electrolyte will stop at the surface of the active region.

In one embodiment the insulating layer of material is a 2-dimensional nanosheet material layer.

In one embodiment the active layer of material is a 2-dimensional nano-sheet material layer.

In one embodiment the insulating layer comprises Boron Nitride. In one embodiment at least one conducting layer is configured to act as an electrode in combination with the active layer and the insulating layer. The electrode layer can be porous. In one embodiment the insulating layer of material is a network of 0-dimensional nanoparticles, a network of 1 -dimensional nano-rods or nano-tubes or a network of 2-dimensional nano-sheets.

In one embodiment the active layer of material is a network of 0-dimensional nanoparticles, a network of 1 -dimensional nano-rods or nano-tubes or a network of 2-dimensional nano-sheets.

In one embodiment the insulating layer comprises at least one of: Boron Nitride nanosheets, talc nanosheets, silicate nanosheets, oxide or hydroxide nanosheets, Boron Nitride nanotubes, ZnO nano-rods, GaN nano-rods or any nano-sheets, nano-tubes, nano-rods or nano-particles made from insulating materials..

In one embodiment at least one conducting layer is configured to act as an electrode in combination with the active layer and the insulating layer.

In one embodiment the electrode comprises at least one of: a conducting 2D nanosheet material or a conducting 1 D nanotube or nanowire material. In one embodiment the electrode is porous and comprises electrolyte.

In on embodiment the pore size of the porous material is selected such that the liquid electrolyte is contained in the insulating layer material. In one embodiment the liquid electrolyte is coupled to the porous material by a surface tension effect.

In one embodiment the multi-layer device structure is a transistor device. In one embodiment the multi-layer device structure is a battery. In one embodiment the multi-layer device structure is a capacitor or super capacitor device.

In one embodiment the multi-layer device structure is a dye sensitised solar cell.

It will be appreciated that the liquid electrolyte can be optimised to improve the on : off ratio and switching speed can be selected. With such improvements, the nanosheet network transistors can perform as well, or better, than their organic and nanotube-based counterparts and be easily fabricated.

In another embodiment there is provided a method of making a multi-layer device structure comprising the steps of

depositing or printing an active layer of material;

depositing or printing an insulating layer of material; and

wherein the insulating layer of material is porous and comprises a liquid electrolyte.

In one embodiment there is provided an insulating layer for use in an electronic device comprising a porous insulating material and a liquid electrolyte.

In one embodiment the liquid electrolyte acts as a reservoir of electrolyte and configured to migrate into a porous structure of an active layer of material in response to a force. In another embodiment there is provided a monolithic insulating layer, or encapsulated insulating layer, for use in an electronic device comprising a porous insulating material and a liquid electrolyte.

Brief Description of the Drawings

The invention will be more clearly understood from the following description of an embodiment thereof, given by way of example only, with reference to the accompanying drawings, in which:- Figures 1 a, 1 b, 1 c and 1 d illustrate a number of embodiments of a multilayer device according to the invention;

Figure 2 illustrates a basic characterisation of nanosheets and nanosheet networks;

Figure 3 illustrates a characterisation of porous nanosheet network thin film transistors (TFTs);

Figure 4 illustrates a characterisation of device switching speed; and Figure 5 illustrates an all-printed, all nanosheet TFT. Detailed Description of the Drawings

The development of printed electronics (PE) is becoming increasingly important, with much research focusing on new materials. The family of 2D materials is very attractive for PE as it includes conducting, semiconducting and insulating members, enabling all-printed devices consisting solely of connected nanosheet networks.

Figure 1 a and 1 b illustrates a multi-layer device structure according to one embodiment of the invention indicated generally by the reference numeral 1 . There is provided an all-printed thin-film-transistors (TFTs) with at least one electrode 2, for example graphene, a WSe2 channel 3 and a boron nitride (BN) separator insulating layer 4, all formed from interconnected nanosheet networks. The BN separator or insulating layer 4 allows the entire porous interior of the network to be filled with an liquid electrolyte (IL) giving a solid-like structure without reductions in switching speed associated with a solid electrolyte. The porous insulating layer 4 fulfils two functions, the first is that it must stop electrons flowing between active region and a gate electrode in a TFT or between electrodes in a battery. Secondly the insulating layer must be able to contain the electrolyte while allowing ions to move in response to a voltage. Nanosheet network channels display on/off ratios of up to 600 and mobilities of >0.1 cm²/Vs and are unique in that the on-current can be modulated via the active-network thickness, leading to a figure of merit which is the product of the mobility and the volumetric capacitance of the network. Because the volumetric capacity can be high, these devices show much higher currents than their relatively low mobility would imply.

A wide variety of nanosheet inks can be used to enable the invention, based on graphene, semiconductors such as transition metal chalcogenides or phosphorene, and insulators such as boron nitride or clays, which can be produced on a large scale by liquid-phase exfoliation.

Conducting and semiconducting nanosheets have high intrinsic mobilities with network mobility limited by junction resistance, a property that can be achieved via junction engineering. Most attractively, nanosheet inks can be used to print both in-plane and stacked hetero-structured nanosheet networks consisting of conducting, semiconducting and insulating regions, corresponding to electrodes, channel and dielectric. A multi-layer device structure is proposed comprising an active layer of material and an insulating layer, where the insulating layer is porous and comprises a liquid electrolyte and can be easily achieved.

The fabrication and characterisation of such structures is discussed in more detail below.

The invention enables the printing of transistors and other devices consisting of networks of semiconducting 2D nanosheets, for example Ws2, MoS2 or Wse2. The first step to solving the aforementioned problems is to avoid the traditional method of switching the current in transistors. Traditionally a gate voltage is applied via a gate electrode through an insulating layer called a gate dielectric. The effect of this voltage is to switch the current on and off but only works on very thin film transistors. Instead of using a gate dielectric, the devices made of the invention use a drop of electrolyte (a liquid containing positive and negative charges), to separate the switching region where the current to be switched flows from the gate electrode. The multi-layer devices of the invention makes use of the fact that the nanosheet networks are porous. Figures 1 a, 1 b, 1 c and 1 d illustrate a number of embodiments of a multi-layer device according to the invention. Figure 1 c illustrates a multi-layer battery or capacitor device indicated generally by th reference numeral 10 where the insulating layer 4 is sandwiched between a first layer and a second layer of active material 3a, 3b. A cathode 5 and anode 6 completes the multi-layer battery or capacitor device. Figure 1 c illustrates a multi-layer solar cell device indicated generally by the reference numeral 20 where the insulating layer 4 is sandwiched between a layer of active material 7, for example ΤΊΟ2 , and a a catalyst layer 8, for example graphene. An electrode current collector 9 and a transparent electrode 10 completes the multi-layer solar cell device.

It will be appreciated that for each of the devices shown in Figure 1 a, 1 b, 1 c and 1 d that the liquid electrolyte can seep into the pores of a porous insulating layer and an active layer, that is preferably porous. This allows the electrolyte to reach every part of the network. The pore size of the porous material can be selected small enough such that the liquid electrolyte can adhere or stick to a surface in the pores by a surface tension effect. This enables the liquid electrolyte to be contained uniformly in the porous insulating layer. There is no part of the network interior far from a pore and so no part far from the electrolyte. This means the whole volume of the network can be switched (i.e. current switched on and off) no matter how thick it is. This allows for an increase in the current flowing in the TFT just by making it thicker, yet retaining the ability to switch it 'on' and 'off.

An important aspect of the invention is how to store the liquid electrolyte in the multi-layer device. Usually in a TFTs network there is an insulating layer between the switching region (here, a 2D nanosheet network) and the gate electrode: the so-called gate dielectric. In one embodiment a porous network of insulating Boron Nitride (BN) nanosheets is printed on top of the switching region, which in one example is a porous network of Wse2 nanosheets. The BN network is necessary to stop the gate electrode touching the WSe2 and creating an electrical short circuit. The BN network is placed in the position the gate dielectric would usually be, with the difference that it is porous where gate dielectrics are always solid. A gate electrode is placed on top of the BN and a liquid drop of electrolyte is placed into this structure. The electrolyte drop is wicked into the porous network of WSe2 and BN nanosheets. Any excess liquid can then be removed. All the electrolyte is contained within the internal porous volume of the network. Because of the small size of the pores, the electrolyte is securely contained within the porous volume due to surface tension effects. It was found that this internal electrolyte was enough to switch the current almost as well as was the case with free electrolyte. In effect, even though a liquid electrolyte is used the device appears to be all-solid. A method is provided to produce all-printed, all-nanosheet TFTs with no excess liquid. Printed electrodes from graphene nanosheet networks and the switching region from WSe2 nanosheets can be used. A boron nitride network can be printed on top and then a gate electrode from a graphene nanosheet network was printed on top of that. The multilayer structure is effectively a large nanosheet network with parts made of graphene and parts of WSe2 and BN. The whole structure should be porous. A drop of electrolyte can be wicked into the porous interior, with excess liquid removed and a working nanosheet transistor is obtained. It will be appreciated that 2D printed electronics involves the deposition of 2D sheets from liquid environments. This is now possible because of a process called liquid phase exfoliation (LPE) which can transform layered crystals into millions of 2D nanosheets in a liquid environment. Other processes can also be used.

The applicant of the present invention has developed a number of proprietary liquid phase exfoliation (LPE) techniques that can be used to make the multilayer device of the invention. LPE can produce 2D materials of many types including graphene, BN, WS₂, MoOs, GaS, Ni(OH)₂, BP etc. LPE provides suspensions of defect-free, few-layer nanosheets at concentrations of up to 1 mg/ml and in batches of >1 00L, with industrial scale ink production a reality.

Table 1 : Potential roles of 2D materials in printed devices.

Thus, the invention can make printable inks containing conducting nanosheets, semiconducting nanosheets and insulating nanosheets. It is possible to print combinations of such nanosheets to form electronic devices.

Method Embodiment and Results

Figure 2 illustrates a basic characterization of nanosheets and nanosheet networks. (A) Photo of dispersions of M0S2, MoSe2, WS2 and WSe2 (C~0.2mg/ml). (B) Typical TEM image of liquid-exfoliated WSe2 nanosheets. (C) Optical absorption spectra (extinction minus scattering) measured on nanosheet dispersions (C-0.005 mg/ml). (D) Plot of nanosheet length, / vs. thickness (layer-number N) for all materials. The horizontal line approximately separates thinner nanosheets with /V-dependent bandgap from thicker ones with bulk-like bandgap. Inset: Typical AFM image. (E) Mean nanosheet thickness vs. mean nanosheet length. (F) Typical scanning electron microscopy (SEM) images of a sprayed network of WSe2 nanosheets. (G) Raman spectra measured on networks of all four materials. (H) Measured network density plotted vs. nanosheet density with the resultant porosity, P, indicated. (I) Conductivity versus inverse temperature for all four materials (no ionic liquid). The invention provides a method to make a multi-layer device structure. Suspensions of nanosheets of M0S2, WS2 and WSe2 by liquid-phase exfoliation LPE in N-methyl pyrrolidone are prepared. The resultant nanosheets are then size-selected to remove the thinnest (variable bandgap) nanosheets and transferred to isopropanol (Figure 2a). TEM analysis showed all dispersions contained 2-dimensional nanosheets (Figure 2b-c) while optical absorption spectra (measured using an integrating sphere to remove scattering) confirmed semiconducting behaviour with optical gaps between 1 .3 and 1 .8 eV (Figure 2d). AFM measurements (Figure 2e-f) showed that typically >85% of nanosheets had N>5 and so bulk-like electronic structure. For all materials, the mean nanosheet thickness was -13-14 layers with mean length of -330-380 nm.

Initially, the nanosheet dispersions were sprayed onto flexible alumina-coated PET substrates to form porous nanosheet networks (PNNs). While such networks appear uniform over long length scales (Figure 2g), they locally consist of disordered arrays of nanosheets with Raman spectroscopy confirmed the nanosheet type (Figure 2h-i). To examine the network morphology, a Brunauer-Emmett-Teller analysis (Figure 2j) was performed which revealed porosities of 35-45% and considerable internal surface areas (inset).

The electrical conductivity of PNNs of all three materials as a function of temperature are measured, and shown in Figure 2k. The conductivity falls with decreasing temperature in all cases in a manner consistent with the thermal activation. Activation energies (0.21 -0.29 eV) are associated with inter- nanosheet hopping.

Figure 3 illustrates a characterization of porous nanosheet network thin film transistors (TFTs). (A) Schematic of a TFT gated using the ionic liquid 1 -ethyl-3- methylimidazolium bis(trifluoromethylsulfonyl)imide (EMIm TFSI). Electrodes were lithographically patterned gold with _=120 μιτι and i /=16 mm. (B) Examples of transfer characteristics for TFTs fabricated from WS2 and MoSe2 with PNN thickness indicated. (C and D) Mean threshold voltage and on:off ratio for all materials. (E) Measured transconductances plotted versus network thickness. The lines are linear fits with the resultant values of _NetC_v given on the panel. (F) Examples of cyclic voltammograms measured for M0S2 PNNs deposited on ITO-coated glass using EMIm TFSI as the electrolyte. (G) Areal capacitance, extracted from curves such as those in (F), plotted versus PNN thickness. The lines are linear fits with the resultant values of C_v given in the panel. (H) Network mobility, μ_Νεί , plotted versus nanosheet mobility, μ_Ν3 (as measured by THz spectroscopy). Inset: Ratio of nanosheet to network mobilities plotted versus nanosheet mobility. (I) Mobility plotted vs. areal capacitance for TFTs from previously reported data and compared to a known thickest PNN. The dashed lines show contours of constant μ ϋ I A (units FV^"1s^"1). "DG" and "EG" are short for "dielectrically gated" and "electrochemically gated".

Although carbon nanotube network transistors are well-known, attempts to produce dielectrically-gated TFTs from nanosheet networks have generally resulted in poor switching. This is because nanosheet networks thick enough to show appreciable currents display enough electrostatic screening to give incomplete switching and hence low on/off ratios. This problem is addressed by exploiting the inherent porosity of nanosheet networks to gate the PNNs electrolytically. In an electrolytically-gated TFT (Figure 3a), the gate dielectric is replaced with a liquid electrolyte (in this case the liquid electrolyte EMIm TFSI). Applying a gate voltage drives ions to the interface of the active material which in turn draws charge in from the external circuit to create a double layer. It is this increase in charge density which results in current switching.

Here, a PNN-based TFTs is demonstrated with a liquid electrolyte penetrating the internal free-volume enabling switching throughout the network, allowing thick networks to be switched as effectively as thin ones. Shown in Figure 3b are example transfer curves for electrolytically side-gated TFTs fabricated from M0S2 and WS2 PNNs (see SI for all electrical data). In each case, clear transistor action can be seen with both p- and n-type behaviour depending on the material, mean threshold voltages ( Vt), between -0.2 and -1 .3 V, large on- currents exceeding 1 mA and mean on/off ratios from -20 for M0S2 to -300 for WS2 (Figure 3c-d). The on/off ratios are limited by high off-currents due to doping associated with the liquid electrolyte, present even with zero gate bias. This is due to a binding-energy-induced imbalance of interfacial anions and cations and could be addressed via choice of liquid electrolyte. In addition, considerable hysteresis is observed as is typical for electrolytically-gated TFTs.

Most interestingly, the transconductance, g_m = di_ds /dv_g , increases linearly with

PNN thickness for all materials (Figure 3e), behaviour not typically observed in TFTs. This can be understood by noting that Ohm's law gives the source-drain current in the PNN as I_ds = QjV_dswt l L where μ is the mobility, Q is the free carrier charge density (C/m³) and i /=16 mm, _=120 μιτι and f are the channel width, length and thickness. Modelling the electrolytically-gated PNN as a supercapacitor electrode gives the induced free charge density as Q = c_v (V_g -V_t) where Cv is the volumetric capacitance of the PNN and the threshold voltage is related to the trap density. Combining these equations gives

I_ds = C_v (V_g -V_t)V_dswt / L (1 ) In a porous supercapacitor electrode, the areal capacitance is related to electrode thickness by C I A = C_vt , meaning equation 1 can be reduced to the standard equation for dielectric TFTs. However, one important difference sets apart electrolytically-gated PNNs: in a dielectric transistor C/A refers to the areal capacitance of the gate dielectric, while in an electrolytically-gated PNN Cy is an intrinsic property of the network, allowing C/A to be increased arbitrarily by increasing t. Thus, the appropriate figure of merit for a PNN is μϋ_ν while network thickness is now an important variable parameter. It is possible to use equation 1 to find the transconductance: g_m = MC_vV_dswt / L (2) predicting the observed f-dependence and allowing us to find / C_y by fitting (Figure 3e).

Cyclic voltammetry measurements (Figure 3f) for PNNs of different thickness show C I A t giving Cv values of ~1 F/cm³ (Figure 3g) as expected. Combining these Cv values with the μC_v όata given in Figure 3e yields mobilities between

0.08 and 0.15 cm²/Vs, with WS2 displaying the highest values (Figure 3h). These network mobilities are well below individual flake values due to intersheet junctions. Nevertheless, these mobilities are orders of magnitude larger than observed for early (undoped) conjugated polymers, are competitive with many of today's organic TFTs (Figure 3i). Mobility increases can be achieved by increasing network connectivity and flake size and reducing the intersheet resistance. Furthermore, by narrowing the nanosheet-thickness distribution, the volumetric capacitance can be increased, improving / C_y .

Because the current in a standard TFT is given byi_ds = μ(01 A)(V_g - V_t)V_dsw I L , it is more appropriate to benchmark the PNN-TFTs by comparing the product /(C / A) in Figure 3i. In this graph, the best performing TFTs are at the top-right with the dashed lines representing constant contours of /(C / A) . By this measure, the thickest PNN-TFTs are clearly competitive with, or superior to, benchmark TFTs since high values of C/A compensate for the relatively low mobilities.

Figure 4 illustrates a characterization of switching speed of WSe2 TFTs (f~400 nm and _=120 μιτι unless otherwise stated). (A-B) Square-wave gate voltage (V_g, f=1 Hz) and resultant source-drain current (Ids) as a function of time for an ionic liquid gate. (C) Time constant (from rise time) vs. square of channel length (liquid IL gate). (D-E) V_g and Ids versus time for an IL/polymer gel gate. (F-G) Photographs showing (F) a PNN spray-deposited under an interdigitated gold electrode array (source and drain labelled as s and d) and (G) a similar device with a spray-deposited boron nitride PNN (white, ~ 2 μιη thick, marked BN) upon which a gold top gate electrode (marked g) was evaporated. The ionic liquid was inserted into the porous volume of the device by drop casting. (H) SEM of the BN network. (I-J) V_g and Ids versus time for BN-contained IL gate. In B, E, and J, the time-constant associated with the current rise is given in the panel. (K) Source-drain current on-off ratio plotted versus the gate voltage on- off switching frequency.

The invention provides a printed, liquid-gated TFTs. However, incorporating a liquid into a solid device is a technical challenge. While solid or gel electrolytes have mitigated this, their low ionic mobilities further reduce the already slow switching speed associated with electrolytic gating. This is illustrated in Figure 4a-b, where using an IL/polymer-based gel significantly slows switching, effectively reducing the on/off ratio. This can be resolved in a completely new way by spraying a PNN of BN nanosheets on top of the active layer, not as a dielectric, but as an electrochemical separator between the active layer and an evaporated gold top-gate (Figure 4c-e).

Drops of liquid electrolyte placed on the resultant heterostructure then fill the entire porous free-volume. This gives a solid-like structure wherein the IL can move through the pores during gating, resulting in fast, liquid-like switching. Comparing the effective on/off ratios measured at different switching frequencies for a pure liquid electrolyte, a liquid electrolyte-gel and an liquid electrolyte contained within the network showed the latter system to perform almost as well as pure IL and considerably better than the IL gel (Figure 4f). Figure 5 illustrates an all-printed, all nanosheet TFT. (A) Schematic showing all- printed TFT structure. The source, drain and gate electrodes are inkjet-printed networks of graphene nanosheets while the channel is an inkjet-printed network of WSe2 nanosheets. The gate electrode is separated from the channel by a spray-cast BN nanosheet network. The entire porous volume of the structure is filled with an ionic liquid to facilitate electrolytic gating. (B) Photographs showing the printing steps from left to right: graphene source (s) and drain (d) electrode, (f~400 nm); the WSe2 channel (M μιτι, L=200 μιτι and i /=16 mm); the BN separator (f~8 μιτι) and finally, the graphene gate (g, f~400 nm). (C) A flexible array of printed TFTs. (D) Cross sectional SEM image showing WSe2 channel and BN separator. (E) Magnified image of BN network showing porosity (P=60%). (F) Transfer curves for a printed TFT with a WSe2 active channel after cycling the gate voltage 1 , 10, 25, and 50 times.

It is this BN separator that allows the development of a solid, vertical, all-printed, all-nanosheet, electrolytically-gated TFT (schematically shown in Figure 5a). This device is produced by inkjet-printing interdigitated graphene electrodes with a printed WSe2 active channel (M μιτι, L=200 μιτι and i /=15.6 mm). A boron nitride PNN (~2 μιτι thick) was sprayed on top of the channel, followed by an inkjet-printed graphene top-gate (figure 5b-c). The IL was then drop-cast onto the network and wicked into the porous volume. As shown in Figure 5f, this all-printed PNN-TFT performed reasonably well with on/off ratios of 10-25 and ϋ_νμ values of -0.3 F/mVs.

It will be appreciated that the invention provides an electrolytically gated TFTs that can be fabricated from inkjet-printed networks of nanosheets. Separating the channel from the gate using a printed BN network allows the porous interior of the network to be filled with liquid electrolyte giving a solid-like device without the associated reduction in switching speed. In such devices, the entire network volume can be switched with the on-current scaling with active-network thickness.

It will be further appreciated that the invention provides a number of advantages over current state of the art:

1 . The first nanosheet network transistor with good performance.

2. The scaling of the on-currents with network thickness (behaviour not found in typical TFTs)

3. Using BN networks as porous separators, allowing containment of the liquid electrolyte within the device

4. Successful printing of stacked layers of Wse2, BN and graphene to give a vertical hetero-structure 5. First all printed, all nanosheet network transistor

In the specification the terms "comprise, comprises, comprised and comprising" or any variation thereof and the terms "include, includes, included and including" or any variation thereof are considered to be totally interchangeable and they should all be afforded the widest possible interpretation and vice versa.

The invention is not limited to the embodiments hereinbefore described but may be varied in both construction and detail.

Claims

1 . A multi-layer device structure comprising

an active layer of material; and

an insulating layer of material, characterised in that the insulating layer is a porous material and comprises a liquid electrolyte.

2. The multi-layer device structure of claim 1 wherein the active layer is a porous material.

3. The multi-layer device structure of claim 1 or 2 wherein the active layer is a porous network of one or more nano-materials.

4. The multi-layer device structure as claimed in any preceding claim wherein ions within the liquid electrolyte are configured to move between the insulating layer and the active layer in response to an applied voltage.

5. The multi-layer device structure as claimed in any of claims 2 to 4 wherein the electrolyte is configured to penetrate the porous material of said active layer.

6. The multi-layer device structure as claimed in any preceding claim wherein the insulating layer of material is a network of 0-dimensional nanoparticles, a network of 1 -dimensional nano-rods or nano-tubes or a network of 2- dimensional nano-sheets.

7. The multi-layer device structure as claimed in any preceding claim wherein the active layer of material is a network of 0-dimensional nanoparticles, a network of 1 -dimensional nano-rods or nano-tubes or a network of 2- dimensional nano-sheets.

8. The multi-layer device structure as claimed in any preceding claim wherein the insulating layer comprises at least one of: Boron Nitride nanosheets, talc nanosheets, silicate nanosheets, oxide or hydroxide nanosheets, Boron Nitride nanotubes, ZnO nano-rods, GaN nano-rods or any nano-sheets, nano-tubes, nano-rods or nano-particles made from insulating materials.

9. The multi-layer device structure as claimed in any preceding claim comprising at least one conducting layer configured to act as an electrode in communication with the active layer and the insulating layer.

10. The multi-layer device structure as claimed in claim 9 wherein the electrode comprises at least one of: a conducting 2D nanosheet material or a conducting 1 D nanotube or nanowire material.

1 1 . The multi-layer device structure as claimed in claims 9 or 10 wherein the conducting layer is porous and comprises electrolyte.

12. The multi-layer device structure as claimed in any preceding claim wherein the pore size of the porous material of the insulating layer is selected such that the liquid electrolyte is contained in the insulating layer material.

13. The multi-layer device structure as claimed in claim 12 wherein the liquid electrolyte is coupled to the porous material of the insulating layer using a surface tension effect.

14. The multi-layer device structure as claimed in any preceding claim wherein the multi-layer device structure is a transistor device; or a battery; or a supercapacitor; or a dye sensitised solar cell; or a printed thin film transistor (TFT) network.

15. The multi-layer device structure as claimed in any preceding claim wherein the active layer is adapted to act as a switching material and the multi-layer device structure is a transistor.

16. The multi-layer device structure as claimed in any preceding claim wherein the active layer is adapted to act as an energy storage material and the multilayer device structure is a battery.

17. An insulating layer for use in an electronic device comprising a porous insulating material and a liquid electrolyte.

18. The insulating layer as claimed in claim 17 wherein the liquid electrolyte acts as a reservoir of electrolyte and configured to migrate into a porous structure of an active layer of material in response to a force.

19. A method of making a multi-layer device structure comprising the steps of depositing or printing an active layer of material;

depositing or printing an insulating layer of material; and