WO2018167835A1 - Organic electroluminescence display device - Google Patents

Organic electroluminescence display device Download PDF

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Publication number
WO2018167835A1
WO2018167835A1 PCT/JP2017/010116 JP2017010116W WO2018167835A1 WO 2018167835 A1 WO2018167835 A1 WO 2018167835A1 JP 2017010116 W JP2017010116 W JP 2017010116W WO 2018167835 A1 WO2018167835 A1 WO 2018167835A1
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WIPO (PCT)
Prior art keywords
power supply
organic electroluminescence
organic
voltage
transistor
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PCT/JP2017/010116
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French (fr)
Japanese (ja)
Inventor
将紀 小原
野口　登
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シャープ株式会社
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Priority to PCT/JP2017/010116 priority Critical patent/WO2018167835A1/en
Publication of WO2018167835A1 publication Critical patent/WO2018167835A1/en

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00—Electroluminescent light sources
    • H05B33/02—Details

Definitions

  • the present invention relates to a display device, and more particularly to an organic electroluminescence display device.
  • an organic EL display device including a pixel circuit including an organic electroluminescence (Electro-Luminescence: hereinafter referred to as EL) element has been put into practical use. Also, one frame period is divided into a plurality of subframe periods, and in each subframe period, a red subframe based on a red video signal, a green subframe based on a green video signal, a blue subframe based on a blue video signal, etc. 2. Description of the Related Art Field sequential display devices that display in order are known. By combining these technologies, a field sequential organic EL display device can be configured. For the organic EL element, for example, an organic light emitting diode (OLED) is used.
  • OLED organic light emitting diode
  • FIG. 17 is a circuit diagram of a pixel circuit of an organic EL display device described in Patent Document 1.
  • the transistor T1 When the voltage of the scanning line Si becomes low level in the first subframe period, the transistor T1 is turned on, and the voltage of the data line Dj (voltage corresponding to the red video signal) is written between the gate terminal and the source terminal of the transistor T2. It is. After the transistor T1 is turned off, the voltage of the light emission control line ERi becomes low level for about one subframe period. At this time, the transistor T3r is turned on, and the organic EL element Lr emits red light with a luminance corresponding to the gate-source voltage of the transistor T2. As a result, the red subframe is displayed in the first subframe period. In the same manner, a green subframe is displayed in the second subframe period, and a blue subframe is displayed in the third subframe period.
  • FIG. 18 is a circuit diagram of a pixel circuit of an organic EL display device described in Patent Document 2.
  • the transistor T1 When the voltage of the scanning line Si becomes low level in the first subframe period, the transistor T1 is turned on, and the voltage of the data line Dj (voltage corresponding to the red video signal) is the gate terminal and the source terminal of the transistors T2r, T2g, T2b Written between.
  • the power supply voltage ELVDD_Ri becomes a high level for about one subframe period, and the organic EL element Lr emits red light with a luminance corresponding to the gate-source voltage of the transistor T2r.
  • the power supply voltages ELVDD_Gi and ELVDD_Bi are at a low level.
  • the red subframe is displayed in the first subframe period.
  • a green subframe is displayed in the second subframe period
  • a blue subframe is displayed in the third subframe period.
  • the organic EL display device including the pixel circuit shown in FIG. 17 in order to control the transistors T3r, T3g, and T3b in the pixel circuits in each row to the ON state at different timings, light emission control provided for each row of the pixel circuits.
  • a light emission control circuit that controls the voltages of the lines ERi, EGi, and EBi is required.
  • the circuit scale of the drive circuit becomes large.
  • the pixel circuit illustrated in FIG. 17 includes five transistors, it is preferable that the number of transistors in the pixel circuit is smaller.
  • an object of the present invention is to provide a field sequential type organic EL display device having a small circuit scale.
  • a first aspect of the present invention is a field sequential organic electroluminescence display device, A plurality of scan lines; Multiple data lines, A plurality of pixel circuits arranged corresponding to the intersections of the scanning lines and the data lines; A scanning line driving circuit for driving the scanning lines; A data line driving circuit for driving the data line; A power supply circuit for controlling a plurality of power supply voltages corresponding to a plurality of colors,
  • the pixel circuit includes: A plurality of organic electroluminescence elements corresponding to the plurality of colors; A plurality of drive transistors each connected in series to a corresponding organic electroluminescent element; A write control transistor having a gate terminal connected to the scan line, a first conduction terminal connected to the data line, and a second conduction terminal connected to gate terminals of the plurality of drive transistors;
  • the organic electroluminescence element has an anode terminal to which a fixed high-level power supply voltage is applied, and a cathode terminal connected to a drain terminal of a corresponding driving transistor, A power
  • a display off period is provided for each subframe period,
  • the scanning line driving circuit applies an on-voltage for turning on the write control transistor to all the scanning lines in a display off period,
  • the data line driving circuit applies a display off voltage for stopping light emission of the organic electroluminescence element to all the data lines in a display off period.
  • a correction process is performed on the input video signal to compensate for a difference in luminance due to a difference in the length of the light emission period of the organic electroluminescence element, and the corrected video signal is sent to the data line driving circuit.
  • a correction unit for outputting is further provided.
  • a characteristic data storage unit for storing the characteristic data of the organic electroluminescence element for each color;
  • the correction unit performs the correction process using characteristic data stored in the characteristic data storage unit.
  • the difference between the high level power supply voltage and the first level voltage is greater than the light emission threshold voltage of the organic electroluminescence element
  • a difference between the high level power supply voltage and the second level voltage is smaller than a light emission threshold voltage of the organic electroluminescence element.
  • a sixth aspect of the present invention is the fifth aspect of the present invention,
  • the second level voltage is the high level power supply voltage.
  • the scanning line driving circuit applies the ON voltage to all the scanning lines according to a first control signal, and sets the OFF voltage at which the write control transistor is turned off to all the scanning lines according to a second control signal. It is characterized by applying.
  • the scanning line driving circuit has a configuration in which unit circuits are connected in multiple stages,
  • the unit circuit is An output terminal connected to the scanning line; A first transistor that applies the on-voltage to the output terminal according to the first control signal; And a second transistor for applying the off voltage to the output terminal in accordance with the second control signal.
  • a blanket electrode for applying the high-level power supply voltage to the anode terminal of the organic electroluminescence element is further provided.
  • the power supply circuit controls first to third power supply voltages;
  • the pixel circuit includes: First to third organic electroluminescence elements each having an anode terminal to which the high-level power supply voltage is applied and emitting light in red, green, and blue, respectively; Connected to the drain terminal connected to the cathode terminal of each of the first to third organic electroluminescence elements, the source terminal to which the first to third power supply voltages are applied, and the other conduction terminal of the write control transistor And first to third driving transistors each having a gate terminal formed thereon.
  • the scanning line driving circuit is formed on the same panel as the pixel circuit.
  • a twelfth aspect of the present invention is the eleventh aspect of the present invention,
  • the driving transistor is configured using an oxide semiconductor,
  • the write control transistor and the transistor included in the scan line driver circuit are formed using low-temperature polysilicon.
  • a plurality of white data lines includes: A white organic electroluminescence device corresponding to white, A white driving transistor connected in series to the white organic electroluminescence element; A white write control transistor having a gate terminal connected to the scanning line, a first conduction terminal connected to the white data line, and a second conduction terminal connected to the gate terminal of the white drive transistor.
  • the white organic electroluminescence element has an anode terminal to which the high-level power supply voltage is applied, and a cathode terminal connected to a drain terminal of the white driving transistor, A white power supply voltage is applied to a source terminal of the white driving transistor.
  • a fourteenth aspect of the present invention is the thirteenth aspect of the present invention.
  • the power supply circuit controls the white power supply voltage to a level at which the white organic electroluminescence element can emit light in each subframe period.
  • the white power supply voltage is a fixed low-level power supply voltage.
  • the white organic electroluminescence element emits light in a period in which any of the plurality of organic electroluminescence elements emits light in each subframe period.
  • a seventeenth aspect of the present invention is the sixteenth aspect of the present invention.
  • the white organic electroluminescence element emits light with the same luminance in each subframe period.
  • An eighteenth aspect of the present invention is the sixteenth aspect of the present invention.
  • the white organic electroluminescent element emits light at the same luminance ratio as the plurality of organic electroluminescent elements in each subframe period.
  • a nineteenth aspect of the present invention is a field sequential organic electroluminescence display device, A plurality of scan lines; Multiple data lines, A plurality of pixel circuits arranged corresponding to the intersections of the scanning lines and the data lines; A scanning line driving circuit for driving the scanning lines; A data line driving circuit for driving the data line; A power supply circuit for controlling a plurality of power supply voltages corresponding to a plurality of colors,
  • the pixel circuit includes: A plurality of organic electroluminescence elements corresponding to the plurality of colors; A plurality of drive transistors each connected in series to a corresponding organic electroluminescent element; A write control transistor having a gate terminal connected to the scan line, a first conduction terminal connected to the data line, and a second conduction terminal connected to gate terminals of the plurality of drive transistors;
  • the organic electroluminescence element has an anode terminal to which a fixed high-level power supply voltage is applied, and a cathode terminal connected to a drain terminal of a corresponding driving transistor, A power
  • the light emission of the organic EL element can be controlled by controlling a plurality of power supply voltages corresponding to a plurality of colors using the power supply circuit, the light emission control transistor in the pixel circuit and the drive circuit The light emission control circuit is not required. Further, the configuration of the power supply circuit is simplified as compared with the case where the power supply voltage supplied to the pixel circuits in each row is controlled. Therefore, it is possible to provide a field sequential type organic EL display device having a small circuit scale.
  • the second aspect by stopping the light emission of the organic EL element and performing black insertion during the display off period, color breakup can be reduced and display quality can be improved.
  • an image can be obtained without using the light emission control transistor and the light emission control circuit. Display with correct brightness.
  • the fourth aspect it is possible to perform a suitable correction process on the input video signal in consideration of the fact that the characteristics of the organic EL element differ for each color.
  • the light emission of the organic EL element can be controlled without using the light emission control transistor and the light emission control circuit.
  • the type of power supply voltage can be reduced and the configuration of the power supply circuit can be simplified.
  • the on-voltage and the off-voltage can be selectively applied to all the scanning lines using the first and second control signals.
  • the scan line driving circuit that selectively applies the on-voltage and the off-voltage to all the scan lines by connecting the unit circuits including the first and second transistors in multiple stages is configured. can do.
  • a high-level power supply voltage can be easily applied to the anode terminal of the organic EL element included in the pixel circuit using the blanket electrode.
  • a field sequential organic EL display device with a small circuit scale that displays a red subframe, a green subframe, and a blue subframe.
  • the organic EL display device can be miniaturized by forming the pixel circuit and the scanning line driving circuit on the same panel.
  • the driving transistor, the write control transistor, and the transistor in the scanning line driving circuit are all configured by using an oxide semiconductor, or when these transistors are all configured by low-temperature polysilicon. Compared with, the layout area of the transistor can be reduced.
  • the luminance of the organic EL element in each subframe period can be adjusted. Since the brightness of the organic EL element can be lowered by the amount of light emitted from the white organic EL element, the life of the organic EL element can be extended. Further, by causing the organic EL element and the white organic EL element to emit light in the same period, it is possible to suppress color breakup that occurs on the display screen. Since no white subframe period is provided, these effects can be obtained while maintaining the length of the subframe period.
  • the effect of the thirteenth aspect can be obtained while performing the same light emission control as that of the organic EL element on the white organic EL element.
  • the configuration of the power supply circuit can be simplified by fixing the white power supply voltage to the low level power supply voltage.
  • the effect of the thirteenth aspect can be obtained while causing the white organic EL element to emit light for the same period as the other organic EL elements in each subframe period.
  • the luminance of the white organic electroluminescence element in each subframe period can be easily obtained.
  • the white organic electroluminescent element emits light at the same luminance ratio as the plurality of organic electroluminescent elements in each subframe period, color breakup can be further reduced.
  • the light emission of the organic EL element can be controlled by controlling a plurality of power supply voltages corresponding to a plurality of colors using the power supply circuit, the light emission control transistor in the pixel circuit and the drive circuit The light emission control circuit is not required. Further, the configuration of the power supply circuit is simplified as compared with the case where the power supply voltage supplied to the pixel circuits in each row is controlled. Further, by determining the first and second levels as described above, it is possible to control the light emission of the organic EL element without using the light emission control transistor and the light emission control circuit. Therefore, it is possible to provide a field sequential type organic EL display device having a small circuit scale.
  • FIG. 1 is a block diagram illustrating a configuration of an organic EL display device according to a first embodiment of the present invention.
  • FIG. 2 is a circuit diagram of a pixel circuit of the organic EL display device shown in FIG. 1. It is a timing chart of the organic electroluminescence display shown in FIG. It is a block diagram which shows the structure of the scanning line drive circuit of the organic electroluminescence display shown in FIG.
  • FIG. 5 is a circuit diagram of a unit circuit of the scanning line driving circuit shown in FIG. 4. 5 is a timing chart of the scanning line driving circuit shown in FIG.
  • FIG. 3 is a diagram showing voltage-luminance characteristics of the organic EL element of the pixel circuit shown in FIG.
  • FIG. 3 is a diagram showing voltage distribution in the pixel circuit shown in FIG. 2.
  • FIG. 3 is a diagram schematically showing the layout of the pixel circuit shown in FIG. 2. It is a figure which shows typically the layout of the pixel circuit which concerns on a comparative example. It is a figure which shows a mode that metal wiring is formed with a metal vapor deposition method. It is a block diagram which shows the structure of the organic electroluminescence display which concerns on the 3rd Embodiment of this invention.
  • FIG. 14 is a circuit diagram of a pixel circuit of the organic EL display device shown in FIG. 13. 14 is a timing chart of the organic EL display device shown in FIG.
  • FIG. 1 It is a figure which shows the brightness
  • FIG. 1 is a block diagram showing a configuration of an organic EL display device according to the first embodiment of the present invention.
  • An organic EL display device 10 shown in FIG. 1 includes an organic EL panel 11, a display control circuit 12, a scanning line driving circuit 13, a data line driving circuit 14, a power supply circuit 15, a correction unit 16, and a characteristic data storage unit 17. This is a field sequential type organic EL display device.
  • one frame period is divided into first to third subframe periods.
  • the organic EL display device 10 displays a red subframe based on the red video signal in the first subframe period, displays a green subframe based on the green video signal in the second subframe period, and blue in the third subframe period.
  • a blue subframe is displayed based on the video signal.
  • the organic EL display device 10 performs color display.
  • m and n are integers of 2 or more
  • i is an integer of 1 to n
  • j is an integer of 1 to m.
  • the organic EL panel 11 includes n scanning lines S1 to Sn, m data lines D1 to Dm, (m ⁇ n) pixel circuits 21, and a blanket electrode 22.
  • the scanning lines S1 to Sn are arranged in parallel to each other.
  • the data lines D1 to Dm are arranged in parallel to each other so as to be orthogonal to the scanning lines S1 to Sn.
  • the scanning lines S1 to Sn and the data lines D1 to Dm intersect at (m ⁇ n) locations.
  • the (m ⁇ n) pixel circuits 21 are arranged corresponding to the intersections of the scanning lines S1 to Sn and the data lines D1 to Dm.
  • the pixel circuit 21 includes an organic EL element that emits red light, an organic EL element that emits green light, and an organic EL element that emits blue light, and functions as a pixel that displays red, green, and blue in a time-sharing manner. .
  • the blanket electrode 22 is provided corresponding to the entire arrangement region of the pixel circuit 21.
  • the display control circuit 12 outputs control signals C1 to C3 to the scanning line driving circuit 13, the data line driving circuit 14, and the power supply circuit 15, respectively. Further, the display control circuit 12 outputs the video signal X1 supplied from the outside of the organic EL display device 10 to the correction unit 16.
  • the characteristic data storage unit 17 stores characteristic data required for the correction process in the correction unit 16.
  • the correction unit 16 performs correction processing (details will be described later) on the video signal X1 output from the display control circuit 12 using the characteristic data stored in the characteristic data storage unit 17, and the corrected video signal X2 Is output to the data line driving circuit 14.
  • the scanning line driving circuit 13 drives the scanning lines S1 to Sn based on the control signal C1.
  • the data line driving circuit 14 drives the data lines D1 to Dm based on the control signal C2 and the corrected video signal X2.
  • the power supply circuit 15 outputs a fixed high-level power supply voltage ELVDD to the blanket electrode 22, and controls three types of power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B supplied to the pixel circuit 21 based on the control signal C3 ( Details will be described later).
  • the level when the power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B are at the high level is equal to the level of the high level power supply voltage ELVDD.
  • the scanning line driving circuit 13 is formed on the same organic EL panel 11 as the pixel circuit 21 (gate driver monolithic configuration).
  • FIG. 2 is a circuit diagram of the pixel circuit 21 in the i-th row and j-th column.
  • the pixel circuit 21 includes transistors T1, T2r, T2g, T2b, capacitors Cr, Cg, Cb, and organic EL elements Lr, Lg, Lb.
  • the organic EL elements Lr, Lg, and Lb are realized by organic light emitting layers that emit red, green, and blue, respectively.
  • the transistors T1, T2r, T2g, and T2b are N-channel thin film transistors (Thin-Film-Transistors: TFTs).
  • the transistors T1, T2r, T2g, and T2b are configured using, for example, an oxide semiconductor such as indium gallium zinc oxide (IGZO), amorphous silicon, microcrystalline silicon, low-temperature polysilicon, single crystal silicon, or the like. Is done.
  • IGZO indium gallium zinc oxide
  • amorphous silicon microcrystalline silicon
  • low-temperature polysilicon single crystal silicon, or the like. Is done.
  • the anode terminals of the organic EL elements Lr, Lg, and Lb are connected to the blanket electrode 22.
  • a fixed high-level power supply voltage ELVDD is applied to the anode terminals of the organic EL elements Lr, Lg, and Lb.
  • the cathode terminals of the organic EL elements Lr, Lg, and Lb are connected to the drain terminals of the transistors T2r, T2g, and T2b, respectively.
  • Variable power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B output from the power supply circuit 15 are applied to the source terminals of the transistors T2r, T2g, and T2b, respectively.
  • Capacitors Cr, Cg, and Cb are provided between the gate terminals and the source terminals of the transistors T2r, T2g, and T2b, respectively.
  • the gate terminal of the transistor T1 is connected to the scanning line Si.
  • One conduction terminal (the left terminal in FIG. 2) of the transistor T1 is connected to the data line Dj.
  • the other conduction terminal of the transistor T1 is connected to the gate terminals of the transistors T2r, T2g, and T2b.
  • a node to which a gate terminal such as the transistor T2r is connected is referred to as Na.
  • the transistor T1 While the voltage of the scanning line Si is at a high level, the transistor T1 is turned on, and the voltage of the data line Dj is applied to the node Na. When the voltage of the scanning line Si becomes low level, the transistor T1 is turned off. After the transistor T1 is turned off, the node Na enters a floating state, and the gate-source voltages of the transistors T2r, T2g, and T2b are held in the capacitors Cr, Cg, and Cb, respectively.
  • the drive current flowing through the transistor T2r and the organic EL element Lr changes according to the gate-source voltage of the transistor T2r.
  • the organic EL element Lr emits light with a luminance corresponding to the drive current. The same applies to the organic EL elements Lg and Lb.
  • the transistor T1 functions as a write control transistor, and the transistors T2r, T2g, and T2b function as drive transistors.
  • FIG. 3 is a timing chart of the organic EL display device 10.
  • EMR1 to EMRn indicate the light emission periods of the organic EL elements Lr in the pixel circuits 21 in the 1st to nth rows, respectively.
  • EMG1 to EMGn indicate light emission periods of the organic EL elements Lg in the pixel circuits 21 in the 1st to nth rows, respectively.
  • EMB1 to EMBn indicate light emission periods of the organic EL elements Lb in the pixel circuits 21 in the 1st to nth rows, respectively.
  • a black display period is provided at the beginning of each subframe period.
  • the black display period corresponds to the display off period.
  • the voltages of the scanning lines S1 to Sn and the power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B are controlled to a high level, and the voltage VZ for black display is applied to the data lines D1 to Dm. Therefore, in all the pixel circuits 21, the transistor T1 is turned on, and the voltage VZ is applied to the node Na via the transistor T1.
  • the organic EL elements Lr, Lg, and Lb do not emit light. Therefore, a black screen is displayed during the black display period.
  • the organic EL elements Lr, Lg, and Lb in the i-th pixel circuit 21 do not emit light until the i-th line period of the first to third subframe periods, respectively.
  • the power supply circuit 15 controls the power supply voltage ELVSS_R to a low level and controls the power supply voltages ELVSS_G and ELVSS_B to a high level.
  • the power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B are controlled so as to satisfy the following expressions (1) to (3).
  • ELVDD ⁇ ELVSS_R >> Vth_R (1) ELVDD ⁇ ELVSS_G ⁇ Vth_G (2) ELVDD ⁇ ELVSS_B ⁇ Vth_B (3)
  • Vth_R, Vth_G, and Vth_B are emission threshold voltages of the organic EL elements Lr, Lg, and Lb, respectively, where the symbol >> indicates that it is sufficiently large and the symbol ⁇ indicates that it is sufficiently small.
  • the pixel circuit 21 in the i-th row is selected, and writing to the pixel circuit 21 in the i-th row is performed. More specifically, when the voltage of the scanning line Si changes to a high level at the start of the i-th line period, the transistor T1 is turned on, and the voltage of the data line Dj (according to the red video signal is applied to the node Na via the transistor T1). Voltage) is applied. When the voltage of the scanning line Si changes to low level at the end of the i-th line period, the transistor T1 is turned off.
  • the power supply circuit 15 controls the power supply voltage ELVSS_G to a low level and controls the power supply voltages ELVSS_R and ELVSS_B to a high level.
  • the power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B are controlled so as to satisfy the following expressions (4) to (6).
  • ELVDD ⁇ ELVSS_R ⁇ Vth_R (4)
  • the pixel circuit 21 in the i-th row is selected, and writing to the pixel circuit 21 in the i-th row is performed.
  • the voltage of the data line Dj is a voltage corresponding to the green video signal. Since Expressions (4) to (6) are established in the second subframe period, a drive current corresponding to the gate-source voltage of the transistor T2g and the threshold voltage flows through the transistor T2g and the organic EL element Lg.
  • the organic EL element Lg emits green light at a luminance corresponding to the drive current until the power supply voltage ELVSS_G changes to high level at the end of the second subframe period after writing is performed (EMG1 to EMGn in FIG. 3). See).
  • the organic EL elements Lr and Lb do not emit light in the second subframe period.
  • the power supply circuit 15 controls the power supply voltage ELVSS_B to a low level and controls the power supply voltages ELVSS_R and ELVSS_G to a high level.
  • the power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B are controlled so as to satisfy the following expressions (7) to (9).
  • ELVDD ⁇ ELVSS_G ⁇ Vth_G ELVDD ⁇ ELVSS_B >> Vth_B (9)
  • the pixel circuit 21 in the i-th row is selected, and writing to the pixel circuit 21 in the i-th row is performed.
  • the voltage of the data line Dj is a voltage corresponding to the blue video signal. Since Expressions (7) to (9) are established in the third subframe period, a driving current corresponding to the gate-source voltage of the transistor T2b and the threshold voltage flows through the transistor T2b and the organic EL element Lb.
  • the organic EL element Lb emits blue light with a luminance corresponding to the drive current until the power supply voltage ELVSS_B changes to high level at the end of the third subframe period after writing is performed (EMB1 to EMBn in FIG. 3). See).
  • the organic EL elements Lr and Lg do not emit light in the third subframe period.
  • FIG. 4 is a block diagram showing the configuration of the scanning line driving circuit 13.
  • the scanning line driving circuit 13 has a configuration in which n unit circuits 31 are connected in multiple stages.
  • the i-th unit circuit 31 is referred to as SRi.
  • the unit circuit 31 has a clock terminal CK, an all-on control terminal AON, a clear terminal CLR, a set terminal S, a reset terminal R, and an output terminal Q.
  • the control signal C1 output from the display control circuit 12 to the scanning line driving circuit 13 includes two-phase clock signals CK1 and CK2, an all-on control signal ALL_ON, a clear signal CLEAR, a gate start pulse GSP, and a gate end pulse GEP. Is included.
  • the scanning line driving circuit 13 outputs n output signals Q1 to Qn based on these signals.
  • the output signals Q1 to Qn of the scanning line driving circuit 13 are applied to the scanning lines S1 to Sn, respectively.
  • the all-on control signal ALL_ON and the clear signal CLEAR are respectively supplied to the all-on control terminal AON and the clear terminal CLR of the unit circuit 31 in each stage.
  • the clock signal CK1 is supplied to the clock terminal CK of the odd-numbered unit circuit 31.
  • the clock signal CK2 is supplied to the clock terminal CK of the even-numbered unit circuit 31.
  • the gate start pulse GSP is supplied to the set terminal S of the first stage unit circuit SR1.
  • the output signal of the previous unit circuit 31 is supplied to the set terminals S of the second to nth unit circuits 31.
  • the gate end pulse GEP is supplied to the reset terminal R of the n-th unit circuit SRn.
  • the output signal of the next stage unit circuit 31 is supplied to the reset terminal R of the 1st to (n ⁇ 1) th stage unit circuit 31.
  • FIG. 5 is a circuit diagram of the unit circuit 31.
  • the unit circuit 31 includes transistors T11 to T16.
  • the transistors T11 to T16 are N-channel TFTs. Similar to the transistors in the pixel circuit 21, the transistors T11 to T16 are configured using, for example, an oxide semiconductor such as IGZO, amorphous silicon, microcrystalline silicon, low-temperature polysilicon, single crystal silicon, or the like.
  • an oxide semiconductor such as IGZO, amorphous silicon, microcrystalline silicon, low-temperature polysilicon, single crystal silicon, or the like.
  • the drain terminal and the gate terminal of the transistor T11 are connected to the set terminal S.
  • the source terminal of the transistor T11 and the drain terminal of the transistor T15 are connected to the gate terminal of the transistor T12 (hereinafter, the node to which the gate terminal of the transistor T12 is connected is referred to as Nb).
  • the drain terminal of the transistor T12 is connected to the clock terminal CK.
  • a high level power supply voltage DC is applied to the drain terminal of the transistor T13.
  • the source terminals of the transistors T12 and T13 and the drain terminals of the transistors T14 and T16 are connected to the output terminal Q.
  • a low level power supply voltage VSS is applied to the source terminals of the transistors T14 to T16.
  • the gate terminal of the transistor T13 is connected to the all-on control terminal AON.
  • the gate terminals of the transistors T14 and T15 are connected to the reset terminal R.
  • the gate terminal of the transistor T16 is connected to the clear terminal CLR.
  • a parasitic capacitance Cgd exists between the gate terminal and the drain terminal of the transistor T12, and a parasitic capacitance Cgs exists between the gate terminal and the source terminal of the transistor T12.
  • the high level power supply voltage DC and the low level power supply voltage VSS supplied to the scanning line driving circuit 13 are the high level power supply voltage ELVDD supplied to the organic EL panel 11 and the power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B. Is generally different.
  • FIG. 6 is a timing chart of the scanning line driving circuit 13.
  • the clock signal CK1 is a signal that becomes high level and low level for a predetermined time.
  • the clock signal CK2 is an inverted signal of the clock signal CK1.
  • the all-on control signal ALL_ON becomes high level during the black display period.
  • the gate start pulse GSP and the clear signal CLEAR are at a high level for a half cycle of the clock signal CK1 after the black display period.
  • the gate end pulse GEP becomes high level for a half cycle of the clock signal CK1 before the black display period.
  • the all-on control signal ALL_ON changes to high level.
  • the transistor T13 is turned on in all the unit circuits 31, and the output signals Q1 to Qn become high level.
  • the all-on control signal ALL_ON changes to a low level, and the clear signal CLEAR changes to a high level. Accordingly, in all the unit circuits 31, the transistor T13 is turned off, the transistor T16 is turned on, and the output signals Q1 to Qn become low level.
  • the gate start pulse GSP changes to high level. Accordingly, in the unit circuit SR1 at the first stage, the transistor T11 is turned on, the voltage of the node Nb is changed to a high level, and the transistor T12 is turned on. At this time, since the clock signal CK1 is at a low level, the output signal Q1 is at a low level.
  • the gate start pulse GSP changes to a low level at the start of the first line period. Accordingly, in the unit circuit SR1 at the first stage, the transistor T11 is turned off and the node Nb is in a floating state. At the start of the first line period, the clock signal CK1 changes to a high level. As a result, the output signal Q1 of the first stage unit circuit SR1 becomes high level. At this time, the voltage of the node Nb becomes higher than the normal high level by the action of the parasitic capacitances Cgd and Cgs (see SR1_Nb in FIG. 6). Accordingly, the high level of the output signal Q1 is the same level as the high level of the clock signal CK1 without being lowered by the threshold voltage of the transistor T12.
  • the clock signal CK1 changes to low level at the end of the first line period. Accordingly, the output signal Q1 of the unit circuit SR1 at the first stage becomes low level. In the second line period, the output signal Q2 of the second stage unit circuit SR2 is at a high level.
  • the output signal Q2 of the second stage unit circuit 31 is input to the reset terminal R of the first stage unit circuit 31. Therefore, when the output signal Q2 of the second stage unit circuit 31 becomes high level, the transistors T14 and T15 are turned on in the first stage unit circuit 31. When the transistor T15 is turned on, the voltage of the node Nb changes to a low level. When the transistor T14 is turned on, the output signal Q1 quickly changes to a low level.
  • the output signal Q1 of the unit circuit SR1 at the first stage becomes high level.
  • the output signals Q2 to Qn of the 2nd to nth stage unit circuits 31 are at a high level, respectively.
  • the gate end pulse GEP changes to high level. Accordingly, in the unit circuit SRn at the n-th stage, the transistors T14 and T15 are turned on, the voltage at the node Nb changes to the low level, and the output signal Qn quickly changes to the low level.
  • the gate end pulse GEP changes to a low level at the start of the black display period. Accordingly, the transistors T14 and T15 are turned off in the n-th unit circuit SRn.
  • the scanning line driving circuit 13 is supplied with the clock signals CK1 and CK2, the all-on control signal ALL_ON, the clear signal CLEAR, the gate start pulse GSP, and the gate end pulse GEP shown in FIG.
  • the lines S1 to Sn can be driven at the timing shown in FIG.
  • the correction unit 16 will be described.
  • the length of the light emission period of the organic EL elements Lr, Lg, and Lb is different for each row of the pixel circuits 21.
  • the luminance of the organic EL elements Lr, Lg, and Lb is proportional to the length of the light emission period.
  • the correction unit 16 performs a correction process on the video signal X1 to compensate for the difference in luminance due to the difference in the length of the light emission periods of the organic EL elements Lr, Lg, and Lb.
  • the video signal X2 is obtained.
  • the voltage-luminance characteristics of the organic EL elements Lr, Lg, and Lb are obtained by the following method.
  • the voltage applied to the organic EL element Lr is switched stepwise from the minimum value to the maximum value, and the organic EL panel 11 when each voltage is applied. Measure the brightness.
  • the voltage-luminance characteristic when the organic EL element Lr emits light continuously in one subframe period in one frame period is obtained.
  • the voltage-luminance characteristics shown in FIG. 7 are obtained for the organic EL element Lr.
  • the voltage-luminance characteristics when the organic EL elements Lg and Lb emit light continuously in one subframe period in one frame period are obtained.
  • the characteristic data storage unit 17 stores the obtained three types of voltage-luminance characteristics.
  • the correcting unit 16 obtains a corrected red component Xr ′ based on the red component Xr by the following method. First, the correction unit 16 obtains a voltage Vr corresponding to the red component Xr. Next, the correction unit 16 obtains the luminance Yr corresponding to the voltage Vr using the voltage-luminance characteristics of the organic EL element Lr stored in the characteristic data storage unit 17.
  • the correction unit 16 obtains a corrected luminance (Ki ⁇ Yr) by multiplying the luminance Yr by a coefficient Ki shown in the following equation (10).
  • Ki Len_F / Len_EMRi (10)
  • Len_F represents the length of one subframe period
  • Len_EMRi represents the length of the light emission period of the organic EL element Lr in the pixel circuit 21 in the i-th row.
  • the correction unit 16 obtains a corrected voltage Vr ′ corresponding to the corrected luminance (Ki ⁇ Yr) using the voltage-luminance characteristics of the organic EL element Lr stored in the characteristic data storage unit 17. (See FIG. 7). Next, the correcting unit 16 obtains a corrected red component Xr ′ corresponding to the corrected voltage Vr ′.
  • the correction unit 16 obtains the corrected green component Xg ′ based on the green component Xg and the corrected blue component Xb ′ based on the blue component Xb by the same method.
  • the voltage-luminance characteristic of the organic EL element Lg stored in the characteristic data storage unit 17 is used.
  • the characteristic data storage unit 17 stores the corrected green component Xg ′. The stored voltage-luminance characteristics of the organic EL element Lb are used.
  • the correction unit 16 corrects the corrected video signal including the corrected red component Xr ′, the corrected green component Xg ′, and the corrected blue component Xb ′ as the gradation data of the pixel in the i-th row and j-th column. X2 is output.
  • the correction unit 16 performs a correction process that compensates for the difference in luminance caused by the difference in the length of the light emission periods of the organic EL elements Lr, Lg, and Lb, so that the light emission control transistor and the light emission control circuit are not used.
  • the image can be displayed with the correct brightness.
  • the organic EL element Lc is any one of the organic EL elements Lr, Lg, and Lb
  • the transistor T2c is a transistor connected to the anode terminal of the organic EL element Lc (any one of the transistors T2r, T2g, and T2b).
  • the power supply voltage ELVSS_C is a power supply voltage (any one of the power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B) applied to the source terminal of the transistor T2c.
  • Equation (12) ELVDD ⁇ ELVSS_C ⁇ Vth_C + VDS (12)
  • the high level power supply voltage ELVDD is a fixed voltage. If the voltage VDS is a parameter determined by the device characteristics of the transistor T2c, the power supply voltage ELVSS_C when the organic EL element Lc does not emit light can be adjusted using (VDS + ⁇ V) on the right side of the equation (12). The light emission threshold voltage Vth_C and the voltage VDS can be obtained based on the current-voltage characteristics of the organic EL element Lc and the transistor T2c.
  • ELVSS_off ⁇ ELVSS_on + VDS + ⁇ V (13)
  • the voltage ELVSS_off is set higher than the voltage ELVSS_on by (VDS + ⁇ V) or more.
  • the upper limit of the voltage ⁇ V is the threshold voltage Vth_C.
  • the power supply circuit 15 applies the voltage ELVSS_on to the source terminal of the transistor T2c during the subframe period in which the organic EL element Lc emits light, and applies the voltage ELVSS_off to the source terminal of the transistor T2c in the subframe period during which the organic EL element Lc does not emit light. .
  • the organic EL elements Lr, Lg, and Lb can emit light at a desired timing.
  • the organic EL display device having the pixel circuit shown in FIG. 17 is the first conventional organic EL display device
  • the organic EL display device having the pixel circuit shown in FIG. 18 is the second conventional organic EL. It is called a display device.
  • the organic EL display device 10 has an effect that the circuit scale can be reduced as compared with the conventional organic EL display device.
  • the first conventional organic EL display device requires a light emission control circuit that controls the voltages of the light emission control lines ERi, EGi, and EBi.
  • the total number of transistors in the light emission control circuit is 18n.
  • the organic EL display device 10 does not require a light emission control circuit. Therefore, according to the organic EL display device 10, the frame of the organic EL panel 11 (periphery of the arrangement area of the pixel circuit 21) can be narrowed by the light emission control circuit.
  • the pixel circuit shown in FIG. 17 includes five transistors, whereas the pixel circuit 21 of the organic EL display device 10 includes only four transistors. Therefore, according to the organic EL display device 10, the area of the transistor in the pixel circuit can be reduced by 20% as compared with the first conventional organic EL display device. In addition, since the number of transistors is small, wirings and contacts connected to the transistors are also reduced. Therefore, according to the organic EL display device 10, the area of the wiring and the contact can be reduced as compared with the first conventional organic EL display device.
  • the second conventional organic EL display device in order to control the power supply voltages ELVDD_Ri, ELVDD_Gi, and ELVDD_Bi supplied to the pixel circuits in each row, a power supply circuit having a complicated configuration is required.
  • the light emission of the organic EL elements Lr, Lg, and Lb can be controlled by controlling the three types of power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B by using the power supply circuit 15. Therefore, the configuration of the power supply circuit is simple. Become. Therefore, according to the organic EL display device 10, the circuit scale of the power supply circuit can be reduced as compared with the second conventional organic EL display device.
  • the low-level power supply voltage ELVSS is applied to the source terminal of the drive transistor.
  • the organic EL display device 10 also has an effect of high display quality.
  • the N-channel driving transistor T2c a pixel circuit having the configuration shown in FIG. In the circuit configuration shown in FIG. 9A, the high-level power supply voltage ELVDD is applied to the drain terminal of the drive transistor T2c, the source terminal of the drive transistor T2c is connected to the anode terminal of the organic EL element Lc, and A low level power supply voltage ELVSS is applied to the cathode terminal.
  • the drive current Ids flowing through the transistor T2c and the organic EL element Lc changes according to the gate-source voltage Vgs of the transistor T2c (generally proportional to the square of the voltage Vgs).
  • the source terminal of the transistor T2c is connected to the anode terminal of the organic EL element Lc.
  • the source voltage of the transistor T2c also varies.
  • variations occur in the gate-source voltage Vgs of the transistor T2c and also in the drive current Ids flowing through the organic EL element Lc.
  • the display screen may vary in luminance.
  • the pixel circuit 21 of the organic EL display device 10 has a configuration shown in FIG.
  • the high-level power supply voltage ELVDD is applied to the anode terminal of the organic EL element Lc
  • the cathode terminal of the organic EL element Lc is connected to the drain terminal of the drive transistor T2c
  • a low level power supply voltage ELVSS is applied to the source terminal.
  • the source voltage of the transistor T2c does not vary.
  • the organic EL display device 10 also has an effect that power supply lines for supplying power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B can be easily formed.
  • FIG. 10 is a diagram schematically showing the layout of the pixel circuit 21 of the organic EL display device 10.
  • FIG. 11 is a diagram schematically illustrating a layout of a pixel circuit according to a comparative example.
  • the transistors T1 and T2 in the pixel circuit illustrated in FIG. 17 are N-channel type, the transistors T3r, T3g, and T3b are deleted, and the cathode terminals of the organic EL elements Lr, Lg, and Lb are respectively connected.
  • the power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B are applied.
  • an organic layer forming process is provided after the TFT forming process, and then a metal layer forming process is provided.
  • the power supply wiring for supplying the power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B is formed in the metal layer forming process.
  • a metal vapor deposition method is performed in the metal layer forming step, fine processing cannot be performed by the metal vapor deposition method.
  • FIG. 12 is a diagram showing a state in which metal wiring is formed using a metal vapor deposition method.
  • the metal of the wiring material is heated and vaporized.
  • the vaporized metal is ejected from the nozzle 41 and passes through the opening 43 formed in the metal mask 42 and collides with the panel substrate 44.
  • metal wiring 45 is formed on the panel substrate 44.
  • the minimum width of the pattern of the opening 43 that can be formed in the metal mask 42 is, for example, about 10 ⁇ m. Since a space having the same width is required between the openings 43, the minimum interval between the wirings 45 that can be formed is 20 ⁇ m.
  • the power supply wiring for supplying the power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B is formed in the TFT forming process.
  • wiring can be formed at intervals of about 2 to 10 ⁇ m using photolithography and etching. Therefore, even when the high-definition organic EL panel 11 is manufactured, the power supply wiring for supplying the power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B can be easily formed.
  • the sheet resistance of the metal wiring formed in the TFT forming process is smaller than the sheet resistance of the metal wiring formed in the metal layer forming process. Therefore, according to the organic EL display device 10, it is possible to reduce the resistance of the power supply wiring that supplies the power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B.
  • the organic EL display device 10 includes the plurality of scanning lines S1 to Sn, the plurality of data lines D1 to Dm, the plurality of pixel circuits 21, the scanning line driving circuit 13, A data line driving circuit 14 and a power supply circuit 15 that controls a plurality of power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B corresponding to a plurality of colors (red, green, and blue) are provided.
  • the pixel circuit 21 includes a plurality of organic EL elements Lr, Lg, Lb corresponding to a plurality of colors, a plurality of driving transistors T2r, T2g, T2b connected in series to the corresponding organic EL elements, and a scanning line Si.
  • a first conduction terminal (left conduction terminal in FIG. 2) connected to the data line Dj, and a second conduction terminal connected to the gate terminals of the plurality of drive transistors T2r, T2g, and T2b.
  • a write control transistor T1 The organic EL element has an anode terminal to which a fixed high-level power supply voltage ELVDD is applied, and a cathode terminal connected to the drain terminal of the corresponding drive transistor, and the source terminal of the drive transistor has a plurality of power supply voltages. Among these, the power supply voltage corresponding to the color of the corresponding organic EL element is applied.
  • the power supply circuit 15 sets the power supply voltage corresponding to the color of the subframe period to a first level at which the organic EL element can emit light (a level satisfying the formula (1), (5), or (9)).
  • the other power supply voltage is controlled to a second level at which the organic EL element does not emit light (a level satisfying equations (2) to (4) or (6) to (8)).
  • the light emission of the organic EL elements Lr, Lg, and Lb can be controlled by controlling a plurality of power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B corresponding to a plurality of colors using the power supply circuit 15.
  • the light emission control transistor 21 and the light emission control circuit in the drive circuit are not necessary.
  • the configuration of the power supply circuit 15 is simplified as compared with the case of controlling the power supply voltage supplied to the pixel circuits in each row. Therefore, according to the organic EL display device 10 according to the present embodiment, it is possible to provide a field sequential type organic EL display device with a small circuit scale.
  • a display off period black display period
  • the scanning line driving circuit 13 applies an on-voltage (high level power supply voltage DC) that turns on the write control transistor T1 to all the scanning lines S1 to Sn in the display off period, and the data line driving circuit 14 displays the display.
  • a display off voltage (voltage VZ for black display) for stopping the light emission of the organic EL elements Lr, Lg, and Lb is applied to all the data lines D1 to Dm.
  • the organic EL display device 10 corrects the input video signal (video signal X1) to compensate for the difference in luminance caused by the difference in the length of the light emission periods of the organic EL elements Lr, Lg, and Lb. And a correction unit 16 that outputs the corrected video signal X2 to the data line driving circuit 14 is provided. By performing such correction processing, an image can be displayed with correct luminance without providing the light emission control transistor in the pixel circuit 21.
  • the organic EL display device 10 includes a characteristic data storage unit 17 that stores the characteristic data of the organic EL elements Lr, Lg, and Lb for each color.
  • the correction unit 16 stores the characteristic data stored in the characteristic data storage unit 17. Is used to perform correction processing. Therefore, it is possible to perform a suitable correction process on the input video signal in consideration of the fact that the characteristics of the organic EL elements Lr, Lg, and Lb differ for each color.
  • the difference between the high level power supply voltage ELVDD and the first level voltage is larger than the light emission threshold voltage of the organic EL element, and the difference between the high level power supply voltage ELVDD and the second level voltage is the light emission threshold voltage of the organic EL element. (Equations (1) to (9)).
  • the second level voltage is a high level power supply voltage (a high level such as ELVSS_R is equal to ELVDD).
  • the scanning line driving circuit 13 applies an ON voltage to all the scanning lines S1 to Sn according to the first control signal (all-on control signal AON), and performs all scanning according to the second control signal (clear signal CLR).
  • An off voltage (low level power supply voltage VSS) that turns off the write control transistor T1 is applied to the lines S1 to Sn. Therefore, the on-voltage and the off-voltage can be selectively applied to all the scanning lines S1 to Sn using the first and second control signals.
  • the scanning line driving circuit 13 has a configuration in which unit circuits 31 are connected in multiple stages. The unit circuit 31 applies an ON voltage to the output terminal Q connected to the scanning line Si and the output terminal Q according to the first control signal.
  • a first transistor T13 to be applied and a second transistor T16 to apply an off voltage to the output terminal Q in accordance with the second control signal are included.
  • the scanning line driving circuit 13 for selectively applying the on voltage and the off voltage to all the scanning lines S1 to Sn is configured. be able to.
  • the organic EL display device 10 further includes a blanket electrode 22 that applies a high-level power supply voltage ELVDD to the first terminals of the organic EL elements Lr, Lg, and Lb. Therefore, the high level power supply voltage ELVDD can be easily applied to the anode terminals of the organic EL elements Lr, Lg, Lb included in the pixel circuit 21 using the blanket electrode 22.
  • the power supply circuit 15 controls the first to third power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B, and the pixel circuit 21 has an anode terminal to which the high-level power supply voltage ELVDD is applied, and includes red, green, and blue First to third organic EL elements Lr, Lg, and Lb that respectively emit light, drain terminals connected to cathode terminals of the first to third organic EL elements Lr, Lg, and Lb, and first to third power supplies, respectively.
  • first to third driving transistors T2r, T2g, and T2b each having a source terminal to which voltages ELVSS_R, ELVSS_G, and ELVSS_B are applied and a gate terminal connected to the other conduction terminal of the write control transistor T1. Accordingly, it is possible to provide a field sequential type organic EL display device that displays a red subframe, a green subframe, and a blue subframe and has a small circuit scale.
  • the scanning line driving circuit 13 is formed on the same panel (organic EL panel 11) as the pixel circuit 21. Therefore, the organic EL display device 10 can be reduced in size.
  • the drive transistor in the pixel circuit 21 is configured using an oxide semiconductor.
  • the write control transistor in the scanning line and the transistor in the scanning line driving circuit 13 are formed using low-temperature polysilicon.
  • the transistors T2r, T2g, and T2b (drive transistors) in the pixel circuit 21 are oxide semiconductor transistors.
  • oxide semiconductor transistor for example, an N-channel IGZO transistor in which a semiconductor layer is formed using IGZO is used.
  • the mobility of IGZO is 5 to 20 (au), and the N-channel IGZO transistor has a medium driving capability.
  • the transistor T1 (input transistor) in the pixel circuit 21 and the transistors T11 to T16 in the scanning line driving circuit 13 are low-temperature polysilicon transistors.
  • Low temperature polysilicon has high mobility, and low temperature polysilicon transistors have high driving capability.
  • the low temperature polysilicon transistor may be a P channel type or an N channel type.
  • the mobility of P-channel type low-temperature polysilicon is about 50 (au), and the mobility of N-channel type low-temperature polysilicon is about 100 (au).
  • the gate voltage of the drive transistors T2r, T2g, T2b in the pixel circuit 21 is in a preferable range (for example, 2 to 5V). Range).
  • a preferable gate voltage range is low and narrow (for example, a range of 0 to 1 V). Since the resolution of the output voltage of the data line driver circuit is limited, if a low and narrow range of gate voltage is used, the display image may be crushed (a phenomenon in which the luminance corresponding to different gradations becomes the same).
  • the layout area of the drive transistor increases.
  • the gate length of the former drive transistor needs to be 10 times the gate length of the latter drive transistor.
  • the write control transistor and the transistor in the scanning line driving circuit 13 must always operate at high speed. For this reason, it is preferable to configure these transistors using low-temperature polysilicon.
  • these transistors are formed using IGZO, the layout area of the transistors increases. For example, when the mobility of low-temperature polysilicon is 10 times the mobility of IGZO, in order to make the gate length and the driving capability the same between a transistor using low-temperature polysilicon and a transistor using IGZO, The channel width of the latter transistor needs to be 10 times the channel width of the former transistor.
  • the scanning line driving circuit 13 and the pixel circuit 21 are all made of low-temperature polysilicon, the layout area of the driving transistors increases. On the other hand, when these transistors are all made of low-temperature polysilicon, the layout area of the write control transistor and the transistors in the scanning line driving circuit 13 increases.
  • the scanning line driving circuit 13 and the pixel circuit 21 are configured by two types of transistors in consideration of the driving capability of the transistors.
  • the driving transistor is configured using an oxide semiconductor
  • the writing control transistor and the transistor included in the scanning line driving circuit 13 are configured using low-temperature polysilicon. Therefore, the overall layout area of the transistors can be reduced as compared with the case where all of these transistors are formed using an oxide semiconductor and the case where all of these transistors are formed using low-temperature polysilicon.
  • FIG. 13 is a block diagram showing a configuration of an organic EL display device according to the third embodiment of the present invention.
  • the organic EL display device 50 shown in FIG. 13 is the same as the organic EL display device 10 according to the first embodiment, except that the organic EL panel 11, the data line driving circuit 14, the power supply circuit 15, the correction unit 16, and the characteristic data storage unit. 17 is replaced with an organic EL panel 51, a data line driving circuit 54, a power supply circuit 55, a correction unit 56, and a characteristic data storage unit 57, respectively.
  • the organic EL display device 50 displays a red subframe, a green subframe, and a blue subframe in the first to third subframe periods, respectively.
  • the same reference numerals are given to the same components of the present embodiment as those of the first embodiment, and the description thereof will be omitted.
  • the organic EL panel 51 includes n scanning lines S1 to Sn, m data lines D1 to Dm, m white data lines DW1 to DWm, (m ⁇ n) pixel circuits 61, and blanket electrodes. 22 is included.
  • the white data lines DW1 to DWm are arranged in parallel with the data lines D1 to Dm.
  • the (m ⁇ n) pixel circuits 61 are arranged corresponding to the intersections of the scanning lines S1 to Sn and the data lines D1 to Dm.
  • the pixel circuit 61 includes an organic EL element Lw that emits white light in addition to the organic EL elements Lr, Lg, and Lb.
  • the characteristic data storage unit 57 stores characteristic data required for the correction process in the correction unit 56.
  • the characteristic data storage unit 57 stores the voltage-luminance characteristics of the organic EL element Lw in addition to the voltage-luminance characteristics of the organic EL elements Lr, Lg, Lb.
  • the correction unit 56 performs correction processing on the video signal X1 output from the display control circuit 12 using the characteristic data stored in the characteristic data storage unit 57, and outputs the corrected video signal X3 to the data line driving circuit. 54 is output.
  • the corrected video signal X3 includes data used for driving the white data lines DW1 to DWn.
  • the data line driving circuit 54 drives the data lines D1 to Dm and the white data lines DW1 to DWm based on the control signal C2 and the corrected video signal X3.
  • the power supply circuit 55 outputs a fixed high-level power supply voltage ELVDD to the blanket electrode 22 and controls four power supply voltages ELVSS_R, ELVSS_G, ELVSS_B, and ELVSS_W supplied to the pixel circuit 61 based on the control signal C3. To do.
  • FIG. 14 is a circuit diagram of the pixel circuit 61 in the i-th row and j-th column.
  • the pixel circuit 61 is obtained by adding transistors T2w and T3, a capacitor Cw, and an organic EL element Lw to the pixel circuit 21.
  • the organic EL element Lw is realized by an organic light emitting layer that emits white light.
  • the transistors T2w and T3 are N-channel TFTs.
  • the anode terminal of the organic EL element Lw is connected to the blanket electrode 22 together with the anode terminals of the organic EL elements Lr, Lg, and Lb.
  • a fixed high level power supply voltage ELVDD is applied to the anode terminal of the organic EL element Lw.
  • the cathode terminal of the organic EL element Lw is connected to the drain terminal of the transistor T2w.
  • a variable power supply voltage ELVSS_W output from the power supply circuit 55 is applied to the source terminal of the transistor T2w.
  • the capacitor Cw is provided between the gate terminal and the source terminal of the transistor T2w.
  • the gate terminal of the transistor T3 is connected to the scanning line Si together with the gate terminal of the transistor T1.
  • the node to which the gate terminal of the transistor T2w is connected is referred to as Nc.
  • Transistors T1, T2r, T2g, T2b, capacitors Cr, Cg, Cb, and organic EL elements Lr, Lg, Lb operate in the same manner as in the first embodiment in accordance with the change in voltage of the scanning line Si. While the voltage of the scanning line Si is at the high level, the transistor T3 is turned on, and the voltage of the white data line DWj is applied to the node Nc. When the voltage of the scanning line Si becomes low level, the transistor T3 is turned off. After the transistor T3 is turned off, the node Nc enters a floating state, and the gate-source voltage of the transistor T2w is held in the capacitor Cw.
  • the drive current flowing through the transistor T2w and the organic EL element Lw changes according to the gate-source voltage of the transistor T2w.
  • the organic EL element Lw emits light with luminance according to the drive current.
  • the organic EL element Lw functions as a white organic EL element, and the transistor T3 functions as a white write control transistor.
  • FIG. 15 is a timing chart of the organic EL display device 50.
  • EMW1 to EMWn indicate light emission periods of the organic EL elements Lw in the pixel circuits 61 in the 1st to nth rows, respectively.
  • a black display period is provided at the head of each subframe period.
  • the transistors T1, T2r, T2g, T2b and the organic EL elements Lr, Lg, Lb are driven in the same manner as in the first embodiment.
  • operations of the transistors T2w and T3 and the organic EL element Lw will be described.
  • the power supply voltage ELVSS_W is controlled to a low level when any of the power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B is at a low level, and is controlled to a high level at other times. For this reason, the organic EL element Lw emits light during a period in which any one of the organic EL elements Lr, Lg, and Lb emits light during the first to third subframe periods.
  • the voltage VZ for black display is also applied to the white data lines DW1 to DWm. Therefore, in all the pixel circuits 61, the transistor T3 is turned on, and the voltage VZ is applied to the node Nc via the transistor T3. At this time, since the driving current does not flow through the transistor T2w, the organic EL element Lw does not emit light. Therefore, a black screen is displayed during the black display period.
  • the voltages VW1i, VW2i, and VW3i are applied to the white data lines DW1 to DWm in the i-th line period within the first to third subframe periods, respectively.
  • the transistor T3 is turned on, and the voltage VW1i, VW2i, or VW3i is applied to the node Nc via the transistor T3.
  • the gate-source voltage of the transistor T2w changes.
  • a drive current according to the gate-source voltage (voltage after change) of the transistor T2w and the threshold voltage flows through the transistor T2w and the organic EL element Lw. Therefore, after the start of the i-th line period, the i-th organic EL element Lw emits white light with a luminance according to the voltages VW1i, VW2i, or VW3i written in the i-th line period.
  • FIG. 16 is a diagram showing the luminance of the organic EL element Lw in the pixel circuit 61 in the i-th row and j-th column.
  • Pi represents the time from the start of the i-th line period until the power supply voltage ELVSS_W changes to the high level.
  • the organic EL element Lw emits light for the time Pi with the brightness BR1i corresponding to the voltage VW1i.
  • the organic EL element Lw emits light for a time Pi at a brightness BR2i corresponding to the voltage VW2i.
  • the organic EL element Lw emits light for a time Pi at a brightness BR3i corresponding to the voltage VW3i.
  • the correction unit 56 first converts the three color components Xr, Xg, and Xb into four color components Er, Eg, Eb, and Ew including the white component Ew according to the following equations (14) to (17). .
  • the correction unit 56 converts the three color components Xr, Xg, and Xb into the four color components Er, Eg, Eb, and Ew, for example, Japanese Patent Laid-Open No. 2001-147666 and International Publication No. 2012/137553. The method described in the issue may be used.
  • the correcting unit 56 is a method similar to the first embodiment, and the corrected red component Xr based on the converted red component Er, the converted green component Eg, and the converted blue component Eb. ', The corrected green component Xg' and the corrected blue component Xb 'are obtained respectively.
  • the correcting unit 56 obtains white components Ew1 to Ew3 that satisfy the following expression (18).
  • Ew Ew1 + Ew2 + Ew3 (18)
  • the correction unit 56 obtains the white components Ew1 to Ew3 using, for example, the following method.
  • the correcting unit 56 may obtain the white components Ew1 to Ew3 according to the equation (19) (first method).
  • the correction unit 56 may obtain the white components Ew1 to Ew3 according to the equations (20) to (22) (second method).
  • Ew1 Ew ⁇ Er / (Er + Eg + Eb) (20)
  • Ew2 Ew ⁇ Eg / (Er + Eg + Eb) (21)
  • Ew3 Ew ⁇ Eb / (Er + Eg + Eb) (22)
  • the luminance of the organic EL element Lw in the first to third subframe periods is equal. According to the first method, the white components Ew1 to Ew3 can be easily obtained.
  • the organic EL element Lw emits light at the same luminance ratio as the organic EL elements Lr, Lg, and Lb in the first to third subframe periods. According to the second method, color breakup can be further reduced.
  • the correction unit 56 obtains corrected white components Xw1 'to Xw3' based on the white components Ew1 to Ew3 in the same manner as in the first embodiment.
  • the voltage-luminance characteristics of the organic EL element Lw stored in the characteristic data storage unit 57 are used.
  • the correction unit 56 uses the corrected red component Xr ′, the corrected green component Xg ′, the corrected blue component Xb ′, and the corrected white component Xw1 as the gradation data of the pixel in the i-th row and j-th column.
  • the corrected video signal X3 including “ ⁇ Xw3” is output.
  • the data line driving circuit 54 applies a voltage corresponding to the corrected red component Xr ′ to the data line Dj, and corrects the white component Xw1 ′ to the white data line DWj. Apply a voltage according to.
  • the data line driving circuit 54 applies a voltage corresponding to the corrected green component Xg ′ to the data line Dj, and corrects the white component Xw2 ′ to the white data line DWj. Apply a voltage according to.
  • the data line driving circuit 54 applies a voltage corresponding to the corrected blue component Xb ′ to the data line Dj, and corrects the white component Xw3 ′ after correction to the white data line DWj. Apply a voltage according to.
  • the correction unit 56 performs the correction process for compensating for the difference in luminance caused by the difference in the length of the light emission periods of the organic EL elements Lr, Lg, Lb, and Lw, thereby using the light emission control transistor and the light emission control circuit.
  • the image can be displayed with the correct brightness.
  • the organic EL display device 50 includes m white data lines DW1 to DWm.
  • the pixel circuit 61 includes a white organic EL element Lw corresponding to white, a white driving transistor (transistor T2w) connected in series to the white organic EL element Lw, a gate terminal connected to the scanning line Gi, and white A white write control transistor (transistor T3) having a first conduction terminal (left terminal in FIG. 14) connected to the data line and a second conduction terminal connected to the gate terminal of the second drive transistor; It is out.
  • the white organic EL element has an anode terminal to which a high-level power supply voltage ELVDD is applied and a cathode terminal connected to the drain terminal of the white drive transistor, and the white power supply voltage ELVSS_W is connected to the source terminal of the drive transistor. Is applied.
  • the luminance of the organic EL element in each subframe period can be adjusted by providing the white organic EL element Lw. Since the luminance of the organic EL elements Lr, Lg, and Lb can be lowered by the amount of light emitted from the white organic EL element Lw, the lifetime of the organic EL elements Lr, Lg, and Lb can be extended. Further, by causing the organic EL elements Lr, Lg, and Lb and the white organic EL element Lw to emit light in the same period, it is possible to suppress color breakup that occurs on the display screen. Since no white subframe period is provided, these effects can be obtained while maintaining the length of the subframe period.
  • the power supply circuit 55 controls the white power supply voltage ELVSS_W to a level at which the white organic EL element Lw can emit light in each subframe period. Therefore, the above effect can be obtained while performing the same light emission control as that of the organic EL elements Lr, Lg, and Lb on the white organic EL element Lw.
  • the organic EL element Lw emits light during a period in which any one of the plurality of organic EL elements Lr, Lg, and Lb emits light in each subframe period. Therefore, the above-described effects can be obtained while the organic EL element Lw emits light for the same period as the other organic EL elements Lr, Lg, and Lb in each subframe period.
  • the organic EL element Lw may emit light with the same luminance in each subframe period (first method). According to the first method, the luminance of the organic EL element Lw in each subframe period can be easily obtained. Alternatively, the organic EL element Lw may emit light at the same luminance ratio as the plurality of organic EL elements Lr, Lg, and Lb in each subframe period (second method). According to the second method, color breakup can be further reduced.
  • the white power supply voltage ELVSS_W is controlled as shown in FIG. 15, but the white power supply voltage ELVSS_W may be a fixed low level power supply voltage.
  • the configuration of the power supply circuit 55 can be simplified.
  • the organic EL display device according to the modification may display three subframes in an order other than the above in the first to third subframe periods.
  • the organic EL display device according to the modification may display three subframes in the order of a red subframe, a blue subframe, and a green subframe in the first to third subframe periods.
  • the organic EL display device may divide one frame period into four or more subframe periods and display four or more subframes in one frame period.
  • the organic EL display device according to the modified example includes the pixel circuit 21, and two or three of the organic EL elements Lr, Lg, and Lb in the sub-frame period of colors other than red, green, and blue.
  • the organic EL element may emit light.
  • the organic EL display device according to the modification includes a pixel circuit including four or more organic EL elements, the same number of drive transistors, and a write control transistor, and one organic EL in each subframe period. The element may emit light.
  • the organic electroluminescence display device of the present invention has a feature that the circuit scale is small, it can be used as a single display device or a display unit of various electronic devices.

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Abstract

A pixel circuit 21 is configured to apply a fixed voltage ELVDD to the anode terminals of organic EL elements Lr, Lg, Lb and connect the cathode terminals to the drain terminals of transistors T2r, T2g, T2b, respectively. The pixel circuit applies three types of voltages to the source terminals of the transistors T2r, T2g, T2b, respectively, and connects the gate terminals to one conductor of a transistor T1. The pixel circuit sets a voltage ELVSS_R to low level and voltages ELVSS_G and ELVSS_B to high level, thereby allowing the organic EL elements Lr alone to emit light in a first subframe. The pixel circuit displays a black screen at the beginning of a subframe and performs a correction process for compensating for differences in the luminance due to the differences in the light-emission period of an organic EL element to correct an input video signal.

Description

有機エレクトロルミネッセンス表示装置Organic electroluminescence display device
　本発明は、表示装置に関し、特に、有機エレクトロルミネッセンス表示装置に関する。 The present invention relates to a display device, and more particularly to an organic electroluminescence display device.
　近年、有機エレクトロルミネッセンス（Electro Luminescence：以下、ＥＬという）素子を含む画素回路を備えた有機ＥＬ表示装置が実用化されている。また、１フレーム期間を複数のサブフレーム期間に分割し、各サブフレーム期間において赤映像信号に基づく赤サブフレーム、緑映像信号に基づく緑サブフレーム、および、青映像信号に基づく青サブフレームなどを順に表示するフィールドシーケンシャル方式の表示装置が知られている。これらの技術を組み合わせることにより、フィールドシーケンシャル方式の有機ＥＬ表示装置を構成することができる。有機ＥＬ素子には、例えば、有機発光ダイオード（Organic Light Emitting Diode：ＯＬＥＤ）が使用される。 In recent years, an organic EL display device including a pixel circuit including an organic electroluminescence (Electro-Luminescence: hereinafter referred to as EL) element has been put into practical use. Also, one frame period is divided into a plurality of subframe periods, and in each subframe period, a red subframe based on a red video signal, a green subframe based on a green video signal, a blue subframe based on a blue video signal, etc. 2. Description of the Related Art Field sequential display devices that display in order are known. By combining these technologies, a field sequential organic EL display device can be configured. For the organic EL element, for example, an organic light emitting diode (OLED) is used.
　フィールドシーケンシャル方式の有機ＥＬ表示装置については、従来から各種の画素回路が知られている。図１７は、特許文献１に記載された有機ＥＬ表示装置の画素回路の回路図である。第１サブフレーム期間において走査線Ｓｉの電圧がローレベルになると、トランジスタＴ１がオンし、データ線Ｄｊの電圧（赤映像信号に応じた電圧）がトランジスタＴ２のゲート端子とソース端子の間に書き込まれる。トランジスタＴ１がオフした後、発光制御線ＥＲｉの電圧が約１サブフレーム期間に亘ってローレベルになる。このとき、トランジスタＴ３ｒがオンし、有機ＥＬ素子ＬｒがトランジスタＴ２のゲート－ソース間電圧に応じた輝度で赤色に発光する。これにより、第１サブフレーム期間では赤サブフレームが表示される。同様の方法で、第２サブフレーム期間では緑サブフレームが表示され、第３サブフレーム期間では青サブフレームが表示される。 Various pixel circuits have been known for field sequential organic EL display devices. FIG. 17 is a circuit diagram of a pixel circuit of an organic EL display device described in Patent Document 1. When the voltage of the scanning line Si becomes low level in the first subframe period, the transistor T1 is turned on, and the voltage of the data line Dj (voltage corresponding to the red video signal) is written between the gate terminal and the source terminal of the transistor T2. It is. After the transistor T1 is turned off, the voltage of the light emission control line ERi becomes low level for about one subframe period. At this time, the transistor T3r is turned on, and the organic EL element Lr emits red light with a luminance corresponding to the gate-source voltage of the transistor T2. As a result, the red subframe is displayed in the first subframe period. In the same manner, a green subframe is displayed in the second subframe period, and a blue subframe is displayed in the third subframe period.
　図１８は、特許文献２に記載された有機ＥＬ表示装置の画素回路の回路図である。第１サブフレーム期間において走査線Ｓｉの電圧がローレベルになると、トランジスタＴ１がオンし、データ線Ｄｊの電圧（赤映像信号に応じた電圧）がトランジスタＴ２ｒ、Ｔ２ｇ、Ｔ２ｂのゲート端子とソース端子の間に書き込まれる。トランジスタＴ１がオフした後、約１サブフレーム期間に亘って電源電圧ＥＬＶＤＤ＿Ｒｉがハイレベルになり、有機ＥＬ素子ＬｒがトランジスタＴ２ｒのゲート－ソース間電圧に応じた輝度で赤色に発光する。このとき、電源電圧ＥＬＶＤＤ＿Ｇｉ、ＥＬＶＤＤ＿Ｂｉはローレベルである。これにより、第１サブフレーム期間では赤サブフレームが表示される。同様の方法で、第２サブフレーム期間では緑サブフレームが表示され、第３サブフレーム期間では青サブフレームが表示される。 FIG. 18 is a circuit diagram of a pixel circuit of an organic EL display device described in Patent Document 2. When the voltage of the scanning line Si becomes low level in the first subframe period, the transistor T1 is turned on, and the voltage of the data line Dj (voltage corresponding to the red video signal) is the gate terminal and the source terminal of the transistors T2r, T2g, T2b Written between. After the transistor T1 is turned off, the power supply voltage ELVDD_Ri becomes a high level for about one subframe period, and the organic EL element Lr emits red light with a luminance corresponding to the gate-source voltage of the transistor T2r. At this time, the power supply voltages ELVDD_Gi and ELVDD_Bi are at a low level. As a result, the red subframe is displayed in the first subframe period. In the same manner, a green subframe is displayed in the second subframe period, and a blue subframe is displayed in the third subframe period.
日本国特開２００５－１４８７４９号公報Japanese Unexamined Patent Publication No. 2005-148749 日本国特開２００５－１４８７５１号公報Japanese Laid-Open Patent Publication No. 2005-148751
　図１７に示す画素回路を備えた有機ＥＬ表示装置では、各行の画素回路内のトランジスタＴ３ｒ、Ｔ３ｇ、Ｔ３ｂを異なるタイミングでオン状態に制御するために、画素回路の行ごとに設けられた発光制御線ＥＲｉ、ＥＧｉ、ＥＢｉの電圧を制御する発光制御回路が必要とされる。このため、図１７に示す画素回路を備えた有機ＥＬ表示装置では、駆動回路の回路規模が大きくなる。また、図１７に示す画素回路は５個のトランジスタを含むが、画素回路内のトランジスタはより少ないことが好ましい。 In the organic EL display device including the pixel circuit shown in FIG. 17, in order to control the transistors T3r, T3g, and T3b in the pixel circuits in each row to the ON state at different timings, light emission control provided for each row of the pixel circuits. A light emission control circuit that controls the voltages of the lines ERi, EGi, and EBi is required. For this reason, in the organic EL display device having the pixel circuit shown in FIG. 17, the circuit scale of the drive circuit becomes large. In addition, although the pixel circuit illustrated in FIG. 17 includes five transistors, it is preferable that the number of transistors in the pixel circuit is smaller.
　図１８に示す画素回路を備えた有機ＥＬ表示装置では、各行の画素回路に供給される電源電圧ＥＬＶＤＤ＿Ｒｉ、ＥＬＶＤＤ＿Ｇｉ、ＥＬＶＤＤ＿Ｂｉを異なるタイミングでハイレベルに制御する必要がある。このため、図１８に示す画素回路を備えた有機ＥＬ表示装置では、電源回路の回路規模が大きくなる。 In the organic EL display device having the pixel circuit shown in FIG. 18, it is necessary to control the power supply voltages ELVDD_Ri, ELVDD_Gi, and ELVDD_Bi supplied to the pixel circuits in each row to a high level at different timings. For this reason, in the organic EL display device including the pixel circuit shown in FIG. 18, the circuit scale of the power supply circuit becomes large.
　それ故に、本発明は、回路規模が小さいフィールドシーケンシャル方式の有機ＥＬ表示装置を提供することを目的とする。 Therefore, an object of the present invention is to provide a field sequential type organic EL display device having a small circuit scale.
　本発明の第１の局面は、フィールドシーケンシャル方式の有機エレクトロルミネッセンス表示装置であって、
　複数の走査線と、
　複数のデータ線と、
　前記走査線と前記データ線の交点に対応して配置された複数の画素回路と、
　前記走査線を駆動する走査線駆動回路と、
　前記データ線を駆動するデータ線駆動回路と、
　複数の色に対応する複数の電源電圧を制御する電源回路とを備え、
　前記画素回路は、
　　前記複数の色に対応する複数の有機エレクトロルミネッセンス素子と、
　　それぞれが対応する有機エレクトロルミネッセンス素子に直列に接続された複数の駆動トランジスタと、
　　前記走査線に接続されたゲート端子と、前記データ線に接続された第１導通端子と、前記複数の駆動トランジスタのゲート端子に接続された第２導通端子とを有する書き込み制御トランジスタとを含み、
　前記有機エレクトロルミネッセンス素子は、固定のハイレベル電源電圧が印加されたアノード端子と、対応する駆動トランジスタのドレイン端子に接続されたカソード端子とを有し、
　前記駆動トランジスタのソース端子には、前記複数の電源電圧のうち、対応する有機エレクトロルミネッセンス素子の色に対応する電源電圧が印加され、
　前記電源回路は、各サブフレーム期間において、サブフレーム期間の色に対応する電源電圧を前記有機エレクトロルミネッセンス素子が発光し得る第１レベルに制御し、他の電源電圧を前記有機エレクトロルミネッセンス素子が発光しない第２レベルに制御することを特徴とする。 A first aspect of the present invention is a field sequential organic electroluminescence display device,
A plurality of scan lines;
Multiple data lines,
A plurality of pixel circuits arranged corresponding to the intersections of the scanning lines and the data lines;
A scanning line driving circuit for driving the scanning lines;
A data line driving circuit for driving the data line;
A power supply circuit for controlling a plurality of power supply voltages corresponding to a plurality of colors,
The pixel circuit includes:
A plurality of organic electroluminescence elements corresponding to the plurality of colors;
A plurality of drive transistors each connected in series to a corresponding organic electroluminescent element;
A write control transistor having a gate terminal connected to the scan line, a first conduction terminal connected to the data line, and a second conduction terminal connected to gate terminals of the plurality of drive transistors;
The organic electroluminescence element has an anode terminal to which a fixed high-level power supply voltage is applied, and a cathode terminal connected to a drain terminal of a corresponding driving transistor,
A power supply voltage corresponding to the color of the corresponding organic electroluminescence element among the plurality of power supply voltages is applied to the source terminal of the drive transistor,
In each subframe period, the power supply circuit controls a power supply voltage corresponding to a color of the subframe period to a first level at which the organic electroluminescence element can emit light, and the organic electroluminescence element emits another power supply voltage. The second level is not controlled.
　本発明の第２の局面は、本発明の第１の局面において、
　サブフレーム期間ごとに表示オフ期間が設けられ、
　前記走査線駆動回路は、表示オフ期間ではすべての前記走査線に対して、前記書き込み制御トランジスタがオンするオン電圧を印加し、
　前記データ線駆動回路は、表示オフ期間ではすべての前記データ線に対して、前記有機エレクトロルミネッセンス素子の発光を停止させる表示オフ電圧を印加することを特徴とする。 According to a second aspect of the present invention, in the first aspect of the present invention,
A display off period is provided for each subframe period,
The scanning line driving circuit applies an on-voltage for turning on the write control transistor to all the scanning lines in a display off period,
The data line driving circuit applies a display off voltage for stopping light emission of the organic electroluminescence element to all the data lines in a display off period.
　本発明の第３の局面は、本発明の第２の局面において、
　入力映像信号に対して、前記有機エレクトロルミネッセンス素子の発光期間の長さの差に起因する輝度の差を補償するための補正処理を行い、補正後の映像信号を前記データ線駆動回路に対して出力する補正部をさらに備える。 According to a third aspect of the present invention, in the second aspect of the present invention,
A correction process is performed on the input video signal to compensate for a difference in luminance due to a difference in the length of the light emission period of the organic electroluminescence element, and the corrected video signal is sent to the data line driving circuit. A correction unit for outputting is further provided.
　本発明の第４の局面は、本発明の第３の局面において、
　前記有機エレクトロルミネッセンス素子の特性データを色ごとに記憶する特性データ記憶部をさらに備え、
　前記補正部は、前記特性データ記憶部に記憶された特性データを用いて前記補正処理を行うことを特徴とする。 According to a fourth aspect of the present invention, in the third aspect of the present invention,
A characteristic data storage unit for storing the characteristic data of the organic electroluminescence element for each color;
The correction unit performs the correction process using characteristic data stored in the characteristic data storage unit.
　本発明の第５の局面は、本発明の第１の局面において、
　前記ハイレベル電源電圧と前記第１レベルの電圧との差は前記有機エレクトロルミネッセンス素子の発光閾値電圧よりも大きく、
　前記ハイレベル電源電圧と前記第２レベルの電圧との差は前記有機エレクトロルミネッセンス素子の発光閾値電圧よりも小さいことを特徴とする。 According to a fifth aspect of the present invention, in the first aspect of the present invention,
The difference between the high level power supply voltage and the first level voltage is greater than the light emission threshold voltage of the organic electroluminescence element,
A difference between the high level power supply voltage and the second level voltage is smaller than a light emission threshold voltage of the organic electroluminescence element.
　本発明の第６の局面は、本発明の第５の局面において、
　前記第２レベルの電圧は、前記ハイレベル電源電圧であることを特徴とする。 A sixth aspect of the present invention is the fifth aspect of the present invention,
The second level voltage is the high level power supply voltage.
　本発明の第７の局面は、本発明の第２の局面において、
　前記走査線駆動回路は、第１制御信号に従いすべての前記走査線に対して前記オン電圧を印加し、第２制御信号に従いすべての前記走査線に対して前記書き込み制御トランジスタがオフするオフ電圧を印加することを特徴とする。 According to a seventh aspect of the present invention, in the second aspect of the present invention,
The scanning line driving circuit applies the ON voltage to all the scanning lines according to a first control signal, and sets the OFF voltage at which the write control transistor is turned off to all the scanning lines according to a second control signal. It is characterized by applying.
　本発明の第８の局面は、本発明の第６の局面において、
　前記走査線駆動回路は、単位回路を多段接続した構成を有し、
　前記単位回路は、
　　前記走査線に接続された出力端子と、
　　前記第１制御信号に従い前記出力端子に前記オン電圧を印加する第１トランジスタと、
　　前記第２制御信号に従い前記出力端子に前記オフ電圧を印加する第２トランジスタとを含むことを特徴とする。 According to an eighth aspect of the present invention, in the sixth aspect of the present invention,
The scanning line driving circuit has a configuration in which unit circuits are connected in multiple stages,
The unit circuit is
An output terminal connected to the scanning line;
A first transistor that applies the on-voltage to the output terminal according to the first control signal;
And a second transistor for applying the off voltage to the output terminal in accordance with the second control signal.
　本発明の第９の局面は、本発明の第１の局面において、
　前記有機エレクトロルミネッセンス素子のアノード端子に前記ハイレベル電源電圧を印加するブランケット電極をさらに備える。 According to a ninth aspect of the present invention, in the first aspect of the present invention,
A blanket electrode for applying the high-level power supply voltage to the anode terminal of the organic electroluminescence element is further provided.
　本発明の第１０の局面は、本発明の第１の局面において、
　前記電源回路は、第１～第３電源電圧を制御し、
　前記画素回路は、
　　前記ハイレベル電源電圧が印加されたアノード端子を有し、赤、緑、および、青にそれぞれ発光する第１～第３有機エレクトロルミネッセンス素子と、
　　前記第１～第３有機エレクトロルミネッセンス素子のカソード端子にそれぞれ接続されたドレイン端子と、前記第１～第３電源電圧がそれぞれ印加されたソース端子と、前記書き込み制御トランジスタの他方の導通端子に接続されたゲート端子とを有する第１～第３駆動トランジスタとを含むことを特徴とする。 According to a tenth aspect of the present invention, in the first aspect of the present invention,
The power supply circuit controls first to third power supply voltages;
The pixel circuit includes:
First to third organic electroluminescence elements each having an anode terminal to which the high-level power supply voltage is applied and emitting light in red, green, and blue, respectively;
Connected to the drain terminal connected to the cathode terminal of each of the first to third organic electroluminescence elements, the source terminal to which the first to third power supply voltages are applied, and the other conduction terminal of the write control transistor And first to third driving transistors each having a gate terminal formed thereon.
　本発明の第１１の局面は、本発明の第１の局面において、
　前記走査線駆動回路は、前記画素回路と同じパネル上に形成されていることを特徴とする。 According to an eleventh aspect of the present invention, in the first aspect of the present invention,
The scanning line driving circuit is formed on the same panel as the pixel circuit.
　本発明の第１２の局面は、本発明の第１１の局面において、
　前記駆動トランジスタは酸化物半導体を用いて構成され、
　前記書き込み制御トランジスタ、および、前記走査線駆動回路に含まれるトランジスタは低温ポリシリコンを用いて構成されていることを特徴とする。 A twelfth aspect of the present invention is the eleventh aspect of the present invention,
The driving transistor is configured using an oxide semiconductor,
The write control transistor and the transistor included in the scan line driver circuit are formed using low-temperature polysilicon.
　本発明の第１３の局面は、本発明の第１の局面において、
　複数の白用データ線をさらに備え、
　前記画素回路は、
　　白色に対応する白色有機エレクトロルミネッセンス素子と、
　　前記白色有機エレクトロルミネッセンス素子に直列に接続された白用駆動トランジスタと、
　　前記走査線に接続されたゲート端子と、前記白用データ線に接続された第１導通端子と、前記白用駆動トランジスタのゲート端子に接続された第２導通端子とを有する白用書き込み制御トランジスタとを含み、
　前記白色有機エレクトロルミネッセンス素子は、前記ハイレベル電源電圧が印加されたアノード端子と、前記白用駆動トランジスタのドレイン端子に接続されたカソード端子とを有し、
　前記白用駆動トランジスタのソース端子には、白用電源電圧が印加されていることを特徴とする。 According to a thirteenth aspect of the present invention, in the first aspect of the present invention,
A plurality of white data lines;
The pixel circuit includes:
A white organic electroluminescence device corresponding to white,
A white driving transistor connected in series to the white organic electroluminescence element;
A white write control transistor having a gate terminal connected to the scanning line, a first conduction terminal connected to the white data line, and a second conduction terminal connected to the gate terminal of the white drive transistor. Including
The white organic electroluminescence element has an anode terminal to which the high-level power supply voltage is applied, and a cathode terminal connected to a drain terminal of the white driving transistor,
A white power supply voltage is applied to a source terminal of the white driving transistor.
　本発明の第１４の局面は、本発明の第１３の局面において、
　前記電源回路は、各サブフレーム期間において、前記白用電源電圧を前記白色有機エレクトロルミネッセンス素子が発光し得るレベルに制御することを特徴とする。 A fourteenth aspect of the present invention is the thirteenth aspect of the present invention,
The power supply circuit controls the white power supply voltage to a level at which the white organic electroluminescence element can emit light in each subframe period.
　本発明の第１５の局面は、本発明の第１３の局面において、
　前記白用電源電圧は、固定のローレベル電源電圧であることを特徴とする。 According to a fifteenth aspect of the present invention, in the thirteenth aspect of the present invention,
The white power supply voltage is a fixed low-level power supply voltage.
　本発明の第１６の局面は、本発明の第１３の局面において、
　前記白色有機エレクトロルミネッセンス素子は、各サブフレーム期間において、前記複数の有機エレクトロルミネッセンス素子のいずれかが発光する期間に発光することを特徴とする。 According to a sixteenth aspect of the present invention, in the thirteenth aspect of the present invention,
The white organic electroluminescence element emits light in a period in which any of the plurality of organic electroluminescence elements emits light in each subframe period.
　本発明の第１７の局面は、本発明の第１６の局面において、
　前記白色有機エレクトロルミネッセンス素子は、各サブフレーム期間において同じ輝度で発光する。 A seventeenth aspect of the present invention is the sixteenth aspect of the present invention,
The white organic electroluminescence element emits light with the same luminance in each subframe period.
　本発明の第１８の局面は、本発明の第１６の局面において、
　前記白色有機エレクトロルミネッセンス素子は、各サブフレーム期間において、前記複数の有機エレクトロルミネッセンス素子と同じ輝度の比率で発光する。 An eighteenth aspect of the present invention is the sixteenth aspect of the present invention,
The white organic electroluminescent element emits light at the same luminance ratio as the plurality of organic electroluminescent elements in each subframe period.
　本発明の第１９の局面は、フィールドシーケンシャル方式の有機エレクトロルミネッセンス表示装置であって、
　複数の走査線と、
　複数のデータ線と、
　前記走査線と前記データ線の交点に対応して配置された複数の画素回路と、
　前記走査線を駆動する走査線駆動回路と、
　前記データ線を駆動するデータ線駆動回路と、
　複数の色に対応する複数の電源電圧を制御する電源回路とを備え、
　前記画素回路は、
　　前記複数の色に対応する複数の有機エレクトロルミネッセンス素子と、
　　それぞれが対応する有機エレクトロルミネッセンス素子に直列に接続された複数の駆動トランジスタと、
　　前記走査線に接続されたゲート端子と、前記データ線に接続された第１導通端子と、前記複数の駆動トランジスタのゲート端子に接続された第２導通端子とを有する書き込み制御トランジスタとを含み、
　前記有機エレクトロルミネッセンス素子は、固定のハイレベル電源電圧が印加されたアノード端子と、対応する駆動トランジスタのドレイン端子に接続されたカソード端子とを有し、
　前記駆動トランジスタのソース端子には、前記複数の電源電圧のうち、対応する有機エレクトロルミネッセンス素子の色に対応する電源電圧が印加され、
　前記電源回路は、各サブフレーム期間において、サブフレーム期間の色に対応する電源電圧を第１レベルに制御し、他の電源電圧を第２レベルに制御し、
　前記ハイレベル電源電圧と前記第１レベルの電圧との差は前記有機エレクトロルミネッセンス素子の発光閾値電圧よりも大きく、
　前記ハイレベル電源電圧と前記第２レベルの電圧との差は前記有機エレクトロルミネッセンス素子の発光閾値電圧よりも小さいことを特徴とする。 A nineteenth aspect of the present invention is a field sequential organic electroluminescence display device,
A plurality of scan lines;
Multiple data lines,
A plurality of pixel circuits arranged corresponding to the intersections of the scanning lines and the data lines;
A scanning line driving circuit for driving the scanning lines;
A data line driving circuit for driving the data line;
A power supply circuit for controlling a plurality of power supply voltages corresponding to a plurality of colors,
The pixel circuit includes:
A plurality of organic electroluminescence elements corresponding to the plurality of colors;
A plurality of drive transistors each connected in series to a corresponding organic electroluminescent element;
A write control transistor having a gate terminal connected to the scan line, a first conduction terminal connected to the data line, and a second conduction terminal connected to gate terminals of the plurality of drive transistors;
The organic electroluminescence element has an anode terminal to which a fixed high-level power supply voltage is applied, and a cathode terminal connected to a drain terminal of a corresponding driving transistor,
A power supply voltage corresponding to the color of the corresponding organic electroluminescence element among the plurality of power supply voltages is applied to the source terminal of the drive transistor,
The power supply circuit controls the power supply voltage corresponding to the color of the subframe period to the first level and the other power supply voltage to the second level in each subframe period,
The difference between the high level power supply voltage and the first level voltage is greater than the light emission threshold voltage of the organic electroluminescence element,
A difference between the high level power supply voltage and the second level voltage is smaller than a light emission threshold voltage of the organic electroluminescence element.
　上記第１の局面によれば、複数の色に対応した複数の電源電圧を電源回路を用いて制御することにより有機ＥＬ素子の発光を制御できるので、画素回路内の発光制御トランジスタや駆動回路内の発光制御回路は不要となる。また、各行の画素回路に供給される電源電圧を制御する場合と比べて、電源回路の構成が簡単になる。したがって、回路規模が小さいフィールドシーケンシャル方式の有機ＥＬ表示装置を提供することができる。 According to the first aspect, since the light emission of the organic EL element can be controlled by controlling a plurality of power supply voltages corresponding to a plurality of colors using the power supply circuit, the light emission control transistor in the pixel circuit and the drive circuit The light emission control circuit is not required. Further, the configuration of the power supply circuit is simplified as compared with the case where the power supply voltage supplied to the pixel circuits in each row is controlled. Therefore, it is possible to provide a field sequential type organic EL display device having a small circuit scale.
　上記第２の局面によれば、表示オフ期間において有機ＥＬ素子の発光を停止させて黒挿入を行うことにより、色割れを低減し、表示品位を高くすることができる。 According to the second aspect, by stopping the light emission of the organic EL element and performing black insertion during the display off period, color breakup can be reduced and display quality can be improved.
　上記第３の局面によれば、有機ＥＬ素子の発光期間の長さの差に起因する輝度の差を補償する補正処理を行うことにより、発光制御トランジスタと発光制御回路を用いることなく、画像を正しい輝度で表示することができる。 According to the third aspect, by performing a correction process that compensates for the difference in luminance due to the difference in the length of the light emission period of the organic EL element, an image can be obtained without using the light emission control transistor and the light emission control circuit. Display with correct brightness.
　上記第４の局面によれば、有機ＥＬ素子の特性が色ごとに異なる点を考慮して、入力映像信号に対して好適な補正処理を行うことができる。 According to the fourth aspect, it is possible to perform a suitable correction process on the input video signal in consideration of the fact that the characteristics of the organic EL element differ for each color.
　上記第５の局面によれば、第１および第２レベルを上記のように決定することにより、発光制御トランジスタと発光制御回路を用いることなく、有機ＥＬ素子の発光を制御することができる。 According to the fifth aspect, by determining the first and second levels as described above, the light emission of the organic EL element can be controlled without using the light emission control transistor and the light emission control circuit.
　上記第６の局面によれば、第２レベルの電圧としてハイレベル電源電圧を用いることにより、電源電圧の種類を減らし、電源回路の構成を簡単にすることができる。 According to the sixth aspect, by using the high level power supply voltage as the second level voltage, the type of power supply voltage can be reduced and the configuration of the power supply circuit can be simplified.
　上記第７の局面によれば、第１および第２制御信号を用いて、すべての走査線に対してオン電圧およびオフ電圧を選択的に印加することができる。 According to the seventh aspect, the on-voltage and the off-voltage can be selectively applied to all the scanning lines using the first and second control signals.
　上記第８の局面によれば、第１および第２トランジスタを含む単位回路を多段接続することにより、すべての走査線に対してオン電圧およびオフ電圧を選択的に印加する走査線駆動回路を構成することができる。 According to the eighth aspect, the scan line driving circuit that selectively applies the on-voltage and the off-voltage to all the scan lines by connecting the unit circuits including the first and second transistors in multiple stages is configured. can do.
　上記第９の局面によれば、ブランケット電極を用いて、画素回路に含まれる有機ＥＬ素子のアノード端子にハイレベル電源電圧を容易に印加することができる。 According to the ninth aspect, a high-level power supply voltage can be easily applied to the anode terminal of the organic EL element included in the pixel circuit using the blanket electrode.
　上記第１０の局面によれば、赤サブフレーム、緑サブフレーム、および、青サブフレームを表示する、回路規模が小さいフィールドシーケンシャル方式の有機ＥＬ表示装置を提供することができる。 According to the tenth aspect, it is possible to provide a field sequential organic EL display device with a small circuit scale that displays a red subframe, a green subframe, and a blue subframe.
　上記第１１の局面によれば、画素回路と走査線駆動回路を同じパネル上に形成することにより、有機ＥＬ表示装置を小型化することができる。 According to the eleventh aspect, the organic EL display device can be miniaturized by forming the pixel circuit and the scanning line driving circuit on the same panel.
　上記第１２の局面によれば、駆動トランジスタ、書き込み制御トランジスタ、および、走査線駆動回路内のトランジスタをすべて酸化物半導体を用いて構成した場合や、これらのトランジスタをすべて低温ポリシリコンで構成した場合と比べて、トランジスタのレイアウト面積を削減することができる。 According to the twelfth aspect, when the driving transistor, the write control transistor, and the transistor in the scanning line driving circuit are all configured by using an oxide semiconductor, or when these transistors are all configured by low-temperature polysilicon. Compared with, the layout area of the transistor can be reduced.
　上記第１３の局面によれば、白色有機ＥＬ素子を設けることにより、各サブフレーム期間における有機ＥＬ素子の輝度を調整することができる。白色有機ＥＬ素子が発光する分だけ有機ＥＬ素子の輝度を低くできるので、有機ＥＬ素子の寿命を延ばすことができる。また、有機ＥＬ素子と白色有機ＥＬ素子を同じ期間で発光させることにより、表示画面に発生する色割れを抑制することができる。白サブフレーム期間を設けないので、サブフレーム期間の長さを保ちながら、これらの効果を得ることができる。 According to the thirteenth aspect, by providing the white organic EL element, the luminance of the organic EL element in each subframe period can be adjusted. Since the brightness of the organic EL element can be lowered by the amount of light emitted from the white organic EL element, the life of the organic EL element can be extended. Further, by causing the organic EL element and the white organic EL element to emit light in the same period, it is possible to suppress color breakup that occurs on the display screen. Since no white subframe period is provided, these effects can be obtained while maintaining the length of the subframe period.
　上記第１４の局面によれば、有機ＥＬ素子と同じ発光制御を白色有機ＥＬ素子について行いながら、第１３の局面の効果を得ることができる。 According to the fourteenth aspect, the effect of the thirteenth aspect can be obtained while performing the same light emission control as that of the organic EL element on the white organic EL element.
　上記第１５の局面によれば、白用電源電圧をローレベル電源電圧に固定することにより、電源回路の構成を簡単にすることができる。 According to the fifteenth aspect, the configuration of the power supply circuit can be simplified by fixing the white power supply voltage to the low level power supply voltage.
　上記第１６の局面によれば、各サブフレーム期間において白色有機ＥＬ素子を他の有機ＥＬ素子と同じ期間だけ発光させながら、第１３の局面の効果を得ることができる。 According to the sixteenth aspect, the effect of the thirteenth aspect can be obtained while causing the white organic EL element to emit light for the same period as the other organic EL elements in each subframe period.
　上記第１７の局面によれば、各サブフレーム期間における白色有機エレクトロルミネッセンス素子の輝度を容易に求めることができる。 According to the seventeenth aspect, the luminance of the white organic electroluminescence element in each subframe period can be easily obtained.
　上記第１８の局面によれば、白色有機エレクトロルミネッセンス素子は、各サブフレーム期間において複数の有機エレクトロルミネッセンス素子と同じ輝度の比率で発光するので、色割れをさらに低減することができる。 According to the eighteenth aspect, since the white organic electroluminescent element emits light at the same luminance ratio as the plurality of organic electroluminescent elements in each subframe period, color breakup can be further reduced.
　上記第１９の局面によれば、複数の色に対応した複数の電源電圧を電源回路を用いて制御することにより有機ＥＬ素子の発光を制御できるので、画素回路内の発光制御トランジスタや駆動回路内の発光制御回路は不要となる。また、各行の画素回路に供給される電源電圧を制御する場合と比べて、電源回路の構成が簡単になる。また、第１および第２レベルを上記のように決定することにより、発光制御トランジスタと発光制御回路を用いることなく、有機ＥＬ素子の発光を制御することができる。したがって、回路規模が小さいフィールドシーケンシャル方式の有機ＥＬ表示装置を提供することができる。 According to the nineteenth aspect, since the light emission of the organic EL element can be controlled by controlling a plurality of power supply voltages corresponding to a plurality of colors using the power supply circuit, the light emission control transistor in the pixel circuit and the drive circuit The light emission control circuit is not required. Further, the configuration of the power supply circuit is simplified as compared with the case where the power supply voltage supplied to the pixel circuits in each row is controlled. Further, by determining the first and second levels as described above, it is possible to control the light emission of the organic EL element without using the light emission control transistor and the light emission control circuit. Therefore, it is possible to provide a field sequential type organic EL display device having a small circuit scale.
本発明の第１の実施形態に係る有機ＥＬ表示装置の構成を示すブロック図である。1 is a block diagram illustrating a configuration of an organic EL display device according to a first embodiment of the present invention. 図１に示す有機ＥＬ表示装置の画素回路の回路図である。FIG. 2 is a circuit diagram of a pixel circuit of the organic EL display device shown in FIG. 1. 図１に示す有機ＥＬ表示装置のタイミングチャートである。It is a timing chart of the organic electroluminescence display shown in FIG. 図１に示す有機ＥＬ表示装置の走査線駆動回路の構成を示すブロック図である。It is a block diagram which shows the structure of the scanning line drive circuit of the organic electroluminescence display shown in FIG. 図４に示す走査線駆動回路の単位回路の回路図である。FIG. 5 is a circuit diagram of a unit circuit of the scanning line driving circuit shown in FIG. 4. 図４に示す走査線駆動回路のタイミングチャートである。5 is a timing chart of the scanning line driving circuit shown in FIG. 図２に示す画素回路の有機ＥＬ素子の電圧－輝度特性を示す図である。FIG. 3 is a diagram showing voltage-luminance characteristics of the organic EL element of the pixel circuit shown in FIG. 図２に示す画素回路における電圧の分配を示す図である。FIG. 3 is a diagram showing voltage distribution in the pixel circuit shown in FIG. 2. 図１に示す有機ＥＬ表示装置の効果を説明するための図である。It is a figure for demonstrating the effect of the organic electroluminescent display apparatus shown in FIG. 図２に示す画素回路のレイアウトを模式的に示す図である。FIG. 3 is a diagram schematically showing the layout of the pixel circuit shown in FIG. 2. 比較例に係る画素回路のレイアウトを示す模式的に示す図である。It is a figure which shows typically the layout of the pixel circuit which concerns on a comparative example. 金属蒸着法で金属配線を形成する様子を示す図である。It is a figure which shows a mode that metal wiring is formed with a metal vapor deposition method. 本発明の第３の実施形態に係る有機ＥＬ表示装置の構成を示すブロック図である。It is a block diagram which shows the structure of the organic electroluminescence display which concerns on the 3rd Embodiment of this invention. 図１３に示す有機ＥＬ表示装置の画素回路の回路図である。FIG. 14 is a circuit diagram of a pixel circuit of the organic EL display device shown in FIG. 13. 図１３に示す有機ＥＬ表示装置のタイミングチャートである。14 is a timing chart of the organic EL display device shown in FIG. 図１３に示す有機ＥＬ表示装置における白色有機ＥＬ素子の輝度を示す図である。It is a figure which shows the brightness | luminance of the white organic EL element in the organic EL display apparatus shown in FIG. 従来の有機ＥＬ表示装置の画素回路の回路図である。It is a circuit diagram of a pixel circuit of a conventional organic EL display device. 従来の有機ＥＬ表示装置の画素回路の回路図である。It is a circuit diagram of a pixel circuit of a conventional organic EL display device.
　（第１の実施形態）
　図１は、本発明の第１の実施形態に係る有機ＥＬ表示装置の構成を示すブロック図である。図１に示す有機ＥＬ表示装置１０は、有機ＥＬパネル１１、表示制御回路１２、走査線駆動回路１３、データ線駆動回路１４、電源回路１５、補正部１６、および、特性データ記憶部１７を備えたフィールドシーケンシャル方式の有機ＥＬ表示装置である。有機ＥＬ表示装置１０では、１フレーム期間は、第１～第３サブフレーム期間に分割される。有機ＥＬ表示装置１０は、第１サブフレーム期間では赤映像信号に基づき赤サブフレームを表示し、第２サブフレーム期間では緑映像信号に基づき緑サブフレームを表示し、第３サブフレーム期間では青映像信号に基づき青サブフレームを表示する。これにより、有機ＥＬ表示装置１０は、カラー表示を行う。以下、ｍおよびｎは２以上の整数、ｉは１以上ｎ以下の整数、ｊは１以上ｍ以下の整数であるとする。 (First embodiment)
FIG. 1 is a block diagram showing a configuration of an organic EL display device according to the first embodiment of the present invention. An organic EL display device 10 shown in FIG. 1 includes an organic EL panel 11, a display control circuit 12, a scanning line driving circuit 13, a data line driving circuit 14, a power supply circuit 15, a correction unit 16, and a characteristic data storage unit 17. This is a field sequential type organic EL display device. In the organic EL display device 10, one frame period is divided into first to third subframe periods. The organic EL display device 10 displays a red subframe based on the red video signal in the first subframe period, displays a green subframe based on the green video signal in the second subframe period, and blue in the third subframe period. A blue subframe is displayed based on the video signal. Thereby, the organic EL display device 10 performs color display. Hereinafter, m and n are integers of 2 or more, i is an integer of 1 to n, and j is an integer of 1 to m.
　有機ＥＬパネル１１は、ｎ本の走査線Ｓ１～Ｓｎ、ｍ本のデータ線Ｄ１～Ｄｍ、（ｍ×ｎ）個の画素回路２１、および、ブランケット電極２２を含んでいる。走査線Ｓ１～Ｓｎは、互いに平行に配置される。データ線Ｄ１～Ｄｍは、走査線Ｓ１～Ｓｎと直交するように互いに平行に配置される。走査線Ｓ１～Ｓｎとデータ線Ｄ１～Ｄｍは、（ｍ×ｎ）箇所で交差する。（ｍ×ｎ）個の画素回路２１は、走査線Ｓ１～Ｓｎとデータ線Ｄ１～Ｄｍの交点に対応して配置される。画素回路２１は、赤色に発光する有機ＥＬ素子、緑色に発光する有機ＥＬ素子、および、青色に発光する有機ＥＬ素子を含み、赤色、緑色、および、青色を時分割で表示する画素として機能する。ブランケット電極２２は、画素回路２１の配置領域の全体に対応して設けられる。 The organic EL panel 11 includes n scanning lines S1 to Sn, m data lines D1 to Dm, (m × n) pixel circuits 21, and a blanket electrode 22. The scanning lines S1 to Sn are arranged in parallel to each other. The data lines D1 to Dm are arranged in parallel to each other so as to be orthogonal to the scanning lines S1 to Sn. The scanning lines S1 to Sn and the data lines D1 to Dm intersect at (m × n) locations. The (m × n) pixel circuits 21 are arranged corresponding to the intersections of the scanning lines S1 to Sn and the data lines D1 to Dm. The pixel circuit 21 includes an organic EL element that emits red light, an organic EL element that emits green light, and an organic EL element that emits blue light, and functions as a pixel that displays red, green, and blue in a time-sharing manner. . The blanket electrode 22 is provided corresponding to the entire arrangement region of the pixel circuit 21.
　表示制御回路１２は、走査線駆動回路１３、データ線駆動回路１４、および、電源回路１５に対して、それぞれ、制御信号Ｃ１～Ｃ３を出力する。また、表示制御回路１２は、有機ＥＬ表示装置１０の外部から供給された映像信号Ｘ１を補正部１６に対して出力する。特性データ記憶部１７は、補正部１６における補正処理で必要とされる特性データを記憶している。補正部１６は、特性データ記憶部１７に記憶された特性データを用いて、表示制御回路１２から出力された映像信号Ｘ１に対して補正処理（詳細は後述）を行い、補正後の映像信号Ｘ２をデータ線駆動回路１４に対して出力する。 The display control circuit 12 outputs control signals C1 to C3 to the scanning line driving circuit 13, the data line driving circuit 14, and the power supply circuit 15, respectively. Further, the display control circuit 12 outputs the video signal X1 supplied from the outside of the organic EL display device 10 to the correction unit 16. The characteristic data storage unit 17 stores characteristic data required for the correction process in the correction unit 16. The correction unit 16 performs correction processing (details will be described later) on the video signal X1 output from the display control circuit 12 using the characteristic data stored in the characteristic data storage unit 17, and the corrected video signal X2 Is output to the data line driving circuit 14.
　走査線駆動回路１３は、制御信号Ｃ１に基づき走査線Ｓ１～Ｓｎを駆動する。データ線駆動回路１４は、制御信号Ｃ２と補正後の映像信号Ｘ２に基づきデータ線Ｄ１～Ｄｍを駆動する。電源回路１５は、ブランケット電極２２に対して固定のハイレベル電源電圧ＥＬＶＤＤを出力すると共に、制御信号Ｃ３に基づき、画素回路２１に供給される３種類の電源電圧ＥＬＶＳＳ＿Ｒ、ＥＬＶＳＳ＿Ｇ、ＥＬＶＳＳ＿Ｂを制御する（詳細は後述）。電源電圧ＥＬＶＳＳ＿Ｒ、ＥＬＶＳＳ＿Ｇ、ＥＬＶＳＳ＿Ｂがハイレベルのときのレベルは、ハイレベル電源電圧ＥＬＶＤＤのレベルに等しい。走査線駆動回路１３は、画素回路２１と同じ有機ＥＬパネル１１上に形成される（ゲートドライバモノリシック構成）。 The scanning line driving circuit 13 drives the scanning lines S1 to Sn based on the control signal C1. The data line driving circuit 14 drives the data lines D1 to Dm based on the control signal C2 and the corrected video signal X2. The power supply circuit 15 outputs a fixed high-level power supply voltage ELVDD to the blanket electrode 22, and controls three types of power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B supplied to the pixel circuit 21 based on the control signal C3 ( Details will be described later). The level when the power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B are at the high level is equal to the level of the high level power supply voltage ELVDD. The scanning line driving circuit 13 is formed on the same organic EL panel 11 as the pixel circuit 21 (gate driver monolithic configuration).
　図２は、ｉ行ｊ列目の画素回路２１の回路図である。画素回路２１は、トランジスタＴ１、Ｔ２ｒ、Ｔ２ｇ、Ｔ２ｂ、容量Ｃｒ、Ｃｇ、Ｃｂ、および、有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂを含んでいる。有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂは、それぞれ、赤、緑、および、青に発光する有機発光層によって実現される。トランジスタＴ１、Ｔ２ｒ、Ｔ２ｇ、Ｔ２ｂは、Ｎチャネル型の薄膜トランジスタ（Thin Film Transistor：ＴＦＴ）である。トランジスタＴ１、Ｔ２ｒ、Ｔ２ｇ、Ｔ２ｂは、例えば、インジウムガリウム亜鉛酸化物（Indium Gallium Zinc Oxide ：ＩＧＺＯ）などの酸化物半導体、アモルファスシリコン、微結晶シリコン、低温ポリシリコン、単結晶シリコンなどを用いて構成される。 FIG. 2 is a circuit diagram of the pixel circuit 21 in the i-th row and j-th column. The pixel circuit 21 includes transistors T1, T2r, T2g, T2b, capacitors Cr, Cg, Cb, and organic EL elements Lr, Lg, Lb. The organic EL elements Lr, Lg, and Lb are realized by organic light emitting layers that emit red, green, and blue, respectively. The transistors T1, T2r, T2g, and T2b are N-channel thin film transistors (Thin-Film-Transistors: TFTs). The transistors T1, T2r, T2g, and T2b are configured using, for example, an oxide semiconductor such as indium gallium zinc oxide (IGZO), amorphous silicon, microcrystalline silicon, low-temperature polysilicon, single crystal silicon, or the like. Is done.
　有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂのアノード端子は、ブランケット電極２２に接続される。有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂのアノード端子には、固定のハイレベル電源電圧ＥＬＶＤＤが印加される。有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂのカソード端子は、それぞれ、トランジスタＴ２ｒ、Ｔ２ｇ、Ｔ２ｂのドレイン端子に接続される。トランジスタＴ２ｒ、Ｔ２ｇ、Ｔ２ｂのソース端子には、それぞれ、電源回路１５から出力された可変の電源電圧ＥＬＶＳＳ＿Ｒ、ＥＬＶＳＳ＿Ｇ、ＥＬＶＳＳ＿Ｂが印加される。容量Ｃｒ、Ｃｇ、Ｃｂは、それぞれ、トランジスタＴ２ｒ、Ｔ２ｇ、Ｔ２ｂのゲート端子とソース端子の間に設けられる。トランジスタＴ１のゲート端子は、走査線Ｓｉに接続される。トランジスタＴ１の一方の導通端子（図２では左側の端子）は、データ線Ｄｊに接続される。トランジスタＴ１の他方の導通端子は、トランジスタＴ２ｒ、Ｔ２ｇ、Ｔ２ｂのゲート端子に接続される。以下、トランジスタＴ２ｒなどのゲート端子が接続されたノードをＮａという。 The anode terminals of the organic EL elements Lr, Lg, and Lb are connected to the blanket electrode 22. A fixed high-level power supply voltage ELVDD is applied to the anode terminals of the organic EL elements Lr, Lg, and Lb. The cathode terminals of the organic EL elements Lr, Lg, and Lb are connected to the drain terminals of the transistors T2r, T2g, and T2b, respectively. Variable power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B output from the power supply circuit 15 are applied to the source terminals of the transistors T2r, T2g, and T2b, respectively. Capacitors Cr, Cg, and Cb are provided between the gate terminals and the source terminals of the transistors T2r, T2g, and T2b, respectively. The gate terminal of the transistor T1 is connected to the scanning line Si. One conduction terminal (the left terminal in FIG. 2) of the transistor T1 is connected to the data line Dj. The other conduction terminal of the transistor T1 is connected to the gate terminals of the transistors T2r, T2g, and T2b. Hereinafter, a node to which a gate terminal such as the transistor T2r is connected is referred to as Na.
　走査線Ｓｉの電圧がハイレベルである間、トランジスタＴ１はオンし、ノードＮａにはデータ線Ｄｊの電圧が印加される。走査線Ｓｉの電圧がローレベルになると、トランジスタＴ１はオフする。トランジスタＴ１がオフした後、ノードＮａはフローティング状態になり、容量Ｃｒ、Ｃｇ、ＣｂにはそれぞれトランジスタＴ２ｒ、Ｔ２ｇ、Ｔ２ｂのゲート－ソース間電圧が保持される。トランジスタＴ２ｒと有機ＥＬ素子Ｌｒを流れる駆動電流は、トランジスタＴ２ｒのゲート－ソース間電圧に応じて変化する。有機ＥＬ素子Ｌｒは、駆動電流に応じた輝度で発光する。有機ＥＬ素子Ｌｇ、Ｌｂについても、これと同様である。トランジスタＴ１は書き込み制御トランジスタとして機能し、トランジスタＴ２ｒ、Ｔ２ｇ、Ｔ２ｂは駆動トランジスタとして機能する。 While the voltage of the scanning line Si is at a high level, the transistor T1 is turned on, and the voltage of the data line Dj is applied to the node Na. When the voltage of the scanning line Si becomes low level, the transistor T1 is turned off. After the transistor T1 is turned off, the node Na enters a floating state, and the gate-source voltages of the transistors T2r, T2g, and T2b are held in the capacitors Cr, Cg, and Cb, respectively. The drive current flowing through the transistor T2r and the organic EL element Lr changes according to the gate-source voltage of the transistor T2r. The organic EL element Lr emits light with a luminance corresponding to the drive current. The same applies to the organic EL elements Lg and Lb. The transistor T1 functions as a write control transistor, and the transistors T2r, T2g, and T2b function as drive transistors.
　図３は、有機ＥＬ表示装置１０のタイミングチャートである。図３において、ＥＭＲ１～ＥＭＲｎは、それぞれ、１～ｎ行目の画素回路２１内の有機ＥＬ素子Ｌｒの発光期間を示す。ＥＭＧ１～ＥＭＧｎは、それぞれ、１～ｎ行目の画素回路２１内の有機ＥＬ素子Ｌｇの発光期間を示す。ＥＭＢ１～ＥＭＢｎは、それぞれ、１～ｎ行目の画素回路２１内の有機ＥＬ素子Ｌｂの発光期間を示す。 FIG. 3 is a timing chart of the organic EL display device 10. In FIG. 3, EMR1 to EMRn indicate the light emission periods of the organic EL elements Lr in the pixel circuits 21 in the 1st to nth rows, respectively. EMG1 to EMGn indicate light emission periods of the organic EL elements Lg in the pixel circuits 21 in the 1st to nth rows, respectively. EMB1 to EMBn indicate light emission periods of the organic EL elements Lb in the pixel circuits 21 in the 1st to nth rows, respectively.
　各サブフレーム期間の先頭には、黒表示期間が設けられる。黒表示期間は、表示オフ期間に該当する。黒表示期間では、走査線Ｓ１～Ｓｎの電圧、および、電源電圧ＥＬＶＳＳ＿Ｒ、ＥＬＶＳＳ＿Ｇ、ＥＬＶＳＳ＿Ｂはハイレベルに制御され、データ線Ｄ１～Ｄｍには黒表示のための電圧ＶＺが印加される。このため、すべての画素回路２１において、トランジスタＴ１がオンし、ノードＮａにはトランジスタＴ１を介して電圧ＶＺが印加される。このとき、駆動電流はトランジスタＴ２ｒ、Ｔ２ｇ、Ｔ２ｂを流れないので、有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂは発光しない。したがって、黒表示期間では黒画面が表示される。ｉ行目の画素回路２１内の有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂは、それぞれ、第１～第３サブフレーム期間の第ｉライン期間まで発光しない。 A black display period is provided at the beginning of each subframe period. The black display period corresponds to the display off period. In the black display period, the voltages of the scanning lines S1 to Sn and the power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B are controlled to a high level, and the voltage VZ for black display is applied to the data lines D1 to Dm. Therefore, in all the pixel circuits 21, the transistor T1 is turned on, and the voltage VZ is applied to the node Na via the transistor T1. At this time, since the drive current does not flow through the transistors T2r, T2g, and T2b, the organic EL elements Lr, Lg, and Lb do not emit light. Therefore, a black screen is displayed during the black display period. The organic EL elements Lr, Lg, and Lb in the i-th pixel circuit 21 do not emit light until the i-th line period of the first to third subframe periods, respectively.
　第１サブフレーム期間では、電源回路１５は、電源電圧ＥＬＶＳＳ＿Ｒをローレベルに制御し、電源電圧ＥＬＶＳＳ＿Ｇ、ＥＬＶＳＳ＿Ｂをハイレベルに制御する。第１サブフレーム期間では、電源電圧ＥＬＶＳＳ＿Ｒ、ＥＬＶＳＳ＿Ｇ、ＥＬＶＳＳ＿Ｂは、次式（１）～（３）を満たすように制御される。
　　ＥＬＶＤＤ－ＥＬＶＳＳ＿Ｒ≫Ｖｔｈ＿Ｒ　…（１）
　　ＥＬＶＤＤ－ＥＬＶＳＳ＿Ｇ≪Ｖｔｈ＿Ｇ　…（２）
　　ＥＬＶＤＤ－ＥＬＶＳＳ＿Ｂ≪Ｖｔｈ＿Ｂ　…（３）
　ただし、Ｖｔｈ＿Ｒ、Ｖｔｈ＿Ｇ、Ｖｔｈ＿Ｂは、それぞれ、有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂの発光閾値電圧であり、記号≫は十分に大きいことを示し、記号≪は十分に小さいことを示す。 In the first subframe period, the power supply circuit 15 controls the power supply voltage ELVSS_R to a low level and controls the power supply voltages ELVSS_G and ELVSS_B to a high level. In the first subframe period, the power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B are controlled so as to satisfy the following expressions (1) to (3).
ELVDD−ELVSS_R >> Vth_R (1)
ELVDD−ELVSS_G << Vth_G (2)
ELVDD−ELVSS_B << Vth_B (3)
However, Vth_R, Vth_G, and Vth_B are emission threshold voltages of the organic EL elements Lr, Lg, and Lb, respectively, where the symbol >> indicates that it is sufficiently large and the symbol << indicates that it is sufficiently small.
　第１サブフレーム期間の第ｉライン期間では、ｉ行目の画素回路２１が選択され、ｉ行目の画素回路２１に対する書き込みが行われる。より詳細には、第ｉライン期間の開始時に走査線Ｓｉの電圧がハイレベルに変化すると、トランジスタＴ１がオンし、ノードＮａにはトランジスタＴ１を介してデータ線Ｄｊの電圧（赤映像信号に応じた電圧）が印加される。第ｉライン期間の終了時に走査線Ｓｉの電圧がローレベルに変化すると、トランジスタＴ１はオフする。これ以降、容量Ｃｒ、Ｃｇ、Ｃｂには、それぞれ、トランジスタＴ２ｒ、Ｔ２ｇ、Ｔ２ｂのゲート－ソース間電圧が保持される。第１サブフレーム期間では式（１）～（３）が成立するので、トランジスタＴ２ｒと有機ＥＬ素子ＬｒにはトランジスタＴ２ｒのゲート－ソース間電圧と閾値電圧に応じた駆動電流が流れる。有機ＥＬ素子Ｌｒは、書き込みが行われた後、第１サブフレーム期間の終了時に電源電圧ＥＬＶＳＳ＿Ｒがハイレベルに変化するまで、駆動電流に応じた輝度で赤色に発光する（図３のＥＭＲ１～ＥＭＲｎを参照）。有機ＥＬ素子Ｌｇ、Ｌｂは、第１サブフレーム期間では発光しない。 In the i-th line period of the first subframe period, the pixel circuit 21 in the i-th row is selected, and writing to the pixel circuit 21 in the i-th row is performed. More specifically, when the voltage of the scanning line Si changes to a high level at the start of the i-th line period, the transistor T1 is turned on, and the voltage of the data line Dj (according to the red video signal is applied to the node Na via the transistor T1). Voltage) is applied. When the voltage of the scanning line Si changes to low level at the end of the i-th line period, the transistor T1 is turned off. Thereafter, the gate-source voltages of the transistors T2r, T2g, and T2b are held in the capacitors Cr, Cg, and Cb, respectively. Since Expressions (1) to (3) are established in the first subframe period, a drive current corresponding to the gate-source voltage of the transistor T2r and the threshold voltage flows through the transistor T2r and the organic EL element Lr. The organic EL element Lr emits red light at a luminance corresponding to the drive current until the power supply voltage ELVSS_R changes to high level at the end of the first subframe period after writing is performed (EMR1 to EMRn in FIG. 3). See). The organic EL elements Lg and Lb do not emit light in the first subframe period.
　第２サブフレーム期間では、電源回路１５は、電源電圧ＥＬＶＳＳ＿Ｇをローレベルに制御し、電源電圧ＥＬＶＳＳ＿Ｒ、ＥＬＶＳＳ＿Ｂをハイレベルに制御する。第２サブフレーム期間では、電源電圧ＥＬＶＳＳ＿Ｒ、ＥＬＶＳＳ＿Ｇ、ＥＬＶＳＳ＿Ｂは、次式（４）～（６）を満たすように制御される。
　　ＥＬＶＤＤ－ＥＬＶＳＳ＿Ｒ≪Ｖｔｈ＿Ｒ　…（４）
　　ＥＬＶＤＤ－ＥＬＶＳＳ＿Ｇ≫Ｖｔｈ＿Ｇ　…（５）
　　ＥＬＶＤＤ－ＥＬＶＳＳ＿Ｂ≪Ｖｔｈ＿Ｂ　…（６） In the second subframe period, the power supply circuit 15 controls the power supply voltage ELVSS_G to a low level and controls the power supply voltages ELVSS_R and ELVSS_B to a high level. In the second subframe period, the power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B are controlled so as to satisfy the following expressions (4) to (6).
ELVDD−ELVSS_R << Vth_R (4)
ELVDD−ELVSS_G >> Vth_G (5)
ELVDD−ELVSS_B << Vth_B (6)
　第２サブフレーム期間の第ｉライン期間では、ｉ行目の画素回路２１が選択され、ｉ行目の画素回路２１に対する書き込みが行われる。ただし、データ線Ｄｊの電圧は、緑映像信号に応じた電圧である。第２サブフレーム期間では式（４）～（６）が成立するので、トランジスタＴ２ｇと有機ＥＬ素子ＬｇにはトランジスタＴ２ｇのゲート－ソース間電圧と閾値電圧に応じた駆動電流が流れる。有機ＥＬ素子Ｌｇは、書き込みが行われた後、第２サブフレーム期間の終了時に電源電圧ＥＬＶＳＳ＿Ｇがハイレベルに変化するまで、駆動電流に応じた輝度で緑色に発光する（図３のＥＭＧ１～ＥＭＧｎを参照）。有機ＥＬ素子Ｌｒ、Ｌｂは、第２サブフレーム期間では発光しない。 In the i-th line period of the second subframe period, the pixel circuit 21 in the i-th row is selected, and writing to the pixel circuit 21 in the i-th row is performed. However, the voltage of the data line Dj is a voltage corresponding to the green video signal. Since Expressions (4) to (6) are established in the second subframe period, a drive current corresponding to the gate-source voltage of the transistor T2g and the threshold voltage flows through the transistor T2g and the organic EL element Lg. The organic EL element Lg emits green light at a luminance corresponding to the drive current until the power supply voltage ELVSS_G changes to high level at the end of the second subframe period after writing is performed (EMG1 to EMGn in FIG. 3). See). The organic EL elements Lr and Lb do not emit light in the second subframe period.
　第３サブフレーム期間では、電源回路１５は、電源電圧ＥＬＶＳＳ＿Ｂをローレベルに制御し、電源電圧ＥＬＶＳＳ＿Ｒ、ＥＬＶＳＳ＿Ｇをハイレベルに制御する。第３サブフレーム期間では、電源電圧ＥＬＶＳＳ＿Ｒ、ＥＬＶＳＳ＿Ｇ、ＥＬＶＳＳ＿Ｂは、次式（７）～（９）を満たすように制御される。
　　ＥＬＶＤＤ－ＥＬＶＳＳ＿Ｒ≪Ｖｔｈ＿Ｒ　…（７）
　　ＥＬＶＤＤ－ＥＬＶＳＳ＿Ｇ≪Ｖｔｈ＿Ｇ　…（８）
　　ＥＬＶＤＤ－ＥＬＶＳＳ＿Ｂ≫Ｖｔｈ＿Ｂ　…（９） In the third subframe period, the power supply circuit 15 controls the power supply voltage ELVSS_B to a low level and controls the power supply voltages ELVSS_R and ELVSS_G to a high level. In the third subframe period, the power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B are controlled so as to satisfy the following expressions (7) to (9).
ELVDD−ELVSS_R << Vth_R (7)
ELVDD−ELVSS_G << Vth_G (8)
ELVDD−ELVSS_B >> Vth_B (9)
　第３サブフレーム期間の第ｉライン期間では、ｉ行目の画素回路２１が選択され、ｉ行目の画素回路２１に対する書き込みが行われる。ただし、データ線Ｄｊの電圧は、青映像信号に応じた電圧である。第３サブフレーム期間では式（７）～（９）が成立するので、トランジスタＴ２ｂと有機ＥＬ素子ＬｂにはトランジスタＴ２ｂのゲート－ソース間電圧と閾値電圧に応じた駆動電流が流れる。有機ＥＬ素子Ｌｂは、書き込みが行われた後、第３サブフレーム期間の終了時に電源電圧ＥＬＶＳＳ＿Ｂがハイレベルに変化するまで、駆動電流に応じた輝度で青色に発光する（図３のＥＭＢ１～ＥＭＢｎを参照）。有機ＥＬ素子Ｌｒ、Ｌｇは、第３サブフレーム期間では発光しない。 In the i-th line period of the third subframe period, the pixel circuit 21 in the i-th row is selected, and writing to the pixel circuit 21 in the i-th row is performed. However, the voltage of the data line Dj is a voltage corresponding to the blue video signal. Since Expressions (7) to (9) are established in the third subframe period, a driving current corresponding to the gate-source voltage of the transistor T2b and the threshold voltage flows through the transistor T2b and the organic EL element Lb. The organic EL element Lb emits blue light with a luminance corresponding to the drive current until the power supply voltage ELVSS_B changes to high level at the end of the third subframe period after writing is performed (EMB1 to EMBn in FIG. 3). See). The organic EL elements Lr and Lg do not emit light in the third subframe period.
　図４は、走査線駆動回路１３の構成を示すブロック図である。走査線駆動回路１３は、ｎ個の単位回路３１を多段接続した構成を有する。以下、ｉ段目の単位回路３１をＳＲｉという。単位回路３１は、クロック端子ＣＫ、全オン制御端子ＡＯＮ、クリア端子ＣＬＲ、セット端子Ｓ、リセット端子Ｒ、および、出力端子Ｑを有する。表示制御回路１２から走査線駆動回路１３に出力される制御信号Ｃ１には、２相のクロック信号ＣＫ１、ＣＫ２、全オン制御信号ＡＬＬ＿ＯＮ、クリア信号ＣＬＥＡＲ、ゲートスタートパルスＧＳＰ、および、ゲートエンドパルスＧＥＰが含まれる。走査線駆動回路１３は、これらの信号に基づき、ｎ個の出力信号Ｑ１～Ｑｎを出力する。走査線駆動回路１３の出力信号Ｑ１～Ｑｎは、それぞれ、走査線Ｓ１～Ｓｎに印加される。 FIG. 4 is a block diagram showing the configuration of the scanning line driving circuit 13. The scanning line driving circuit 13 has a configuration in which n unit circuits 31 are connected in multiple stages. Hereinafter, the i-th unit circuit 31 is referred to as SRi. The unit circuit 31 has a clock terminal CK, an all-on control terminal AON, a clear terminal CLR, a set terminal S, a reset terminal R, and an output terminal Q. The control signal C1 output from the display control circuit 12 to the scanning line driving circuit 13 includes two-phase clock signals CK1 and CK2, an all-on control signal ALL_ON, a clear signal CLEAR, a gate start pulse GSP, and a gate end pulse GEP. Is included. The scanning line driving circuit 13 outputs n output signals Q1 to Qn based on these signals. The output signals Q1 to Qn of the scanning line driving circuit 13 are applied to the scanning lines S1 to Sn, respectively.
　全オン制御信号ＡＬＬ＿ＯＮとクリア信号ＣＬＥＡＲは、それぞれ、各段の単位回路３１の全オン制御端子ＡＯＮとクリア端子ＣＬＲに供給される。クロック信号ＣＫ１は、奇数段目の単位回路３１のクロック端子ＣＫに供給される。クロック信号ＣＫ２は、偶数段目の単位回路３１のクロック端子ＣＫに供給される。ゲートスタートパルスＧＳＰは、１段目の単位回路ＳＲ１のセット端子Ｓに供給される。２～ｎ段目の単位回路３１のセット端子Ｓには、前段の単位回路３１の出力信号が供給される。ゲートエンドパルスＧＥＰは、ｎ段目の単位回路ＳＲｎのリセット端子Ｒに供給される。１～（ｎ－１）段目の単位回路３１のリセット端子Ｒには、次段の単位回路３１の出力信号が供給される。 The all-on control signal ALL_ON and the clear signal CLEAR are respectively supplied to the all-on control terminal AON and the clear terminal CLR of the unit circuit 31 in each stage. The clock signal CK1 is supplied to the clock terminal CK of the odd-numbered unit circuit 31. The clock signal CK2 is supplied to the clock terminal CK of the even-numbered unit circuit 31. The gate start pulse GSP is supplied to the set terminal S of the first stage unit circuit SR1. The output signal of the previous unit circuit 31 is supplied to the set terminals S of the second to nth unit circuits 31. The gate end pulse GEP is supplied to the reset terminal R of the n-th unit circuit SRn. The output signal of the next stage unit circuit 31 is supplied to the reset terminal R of the 1st to (n−1) th stage unit circuit 31.
　図５は、単位回路３１の回路図である。単位回路３１は、トランジスタＴ１１～Ｔ１６を含んでいる。トランジスタＴ１１～Ｔ１６は、Ｎチャネル型のＴＦＴである。トランジスタＴ１１～Ｔ１６は、画素回路２１内のトランジスタと同様に、例えば、ＩＧＺＯなどの酸化物半導体、アモルファスシリコン、微結晶シリコン、低温ポリシリコン、単結晶シリコンなどを用いて構成される。 FIG. 5 is a circuit diagram of the unit circuit 31. The unit circuit 31 includes transistors T11 to T16. The transistors T11 to T16 are N-channel TFTs. Similar to the transistors in the pixel circuit 21, the transistors T11 to T16 are configured using, for example, an oxide semiconductor such as IGZO, amorphous silicon, microcrystalline silicon, low-temperature polysilicon, single crystal silicon, or the like.
　トランジスタＴ１１のドレイン端子とゲート端子は、セット端子Ｓに接続される。トランジスタＴ１１のソース端子とトランジスタＴ１５のドレイン端子は、トランジスタＴ１２のゲート端子に接続される（以下、トランジスタＴ１２のゲート端子が接続されたノードをＮｂという）。トランジスタＴ１２のドレイン端子は、クロック端子ＣＫに接続される。トランジスタＴ１３のドレイン端子には、ハイレベル電源電圧ＤＣが印加される。トランジスタＴ１２、Ｔ１３のソース端子、および、トランジスタＴ１４、Ｔ１６のドレイン端子は、出力端子Ｑに接続される。トランジスタＴ１４～Ｔ１６のソース端子には、ローレベル電源電圧ＶＳＳが印加される。トランジスタＴ１３のゲート端子は、全オン制御端子ＡＯＮに接続される。トランジスタＴ１４、Ｔ１５のゲート端子は、リセット端子Ｒに接続される。トランジスタＴ１６のゲート端子は、クリア端子ＣＬＲに接続される。トランジスタＴ１２のゲート端子とドレイン端子の間には寄生容量Ｃｇｄが存在し、トランジスタＴ１２のゲート端子とソース端子の間には寄生容量Ｃｇｓが存在する。なお、走査線駆動回路１３に供給されるハイレベル電源電圧ＤＣ、および、ローレベル電源電圧ＶＳＳは、有機ＥＬパネル１１に供給されるハイレベル電源電圧ＥＬＶＤＤ、および、電源電圧ＥＬＶＳＳ＿Ｒ、ＥＬＶＳＳ＿Ｇ、ＥＬＶＳＳ＿Ｂとは一般的には異なる。 The drain terminal and the gate terminal of the transistor T11 are connected to the set terminal S. The source terminal of the transistor T11 and the drain terminal of the transistor T15 are connected to the gate terminal of the transistor T12 (hereinafter, the node to which the gate terminal of the transistor T12 is connected is referred to as Nb). The drain terminal of the transistor T12 is connected to the clock terminal CK. A high level power supply voltage DC is applied to the drain terminal of the transistor T13. The source terminals of the transistors T12 and T13 and the drain terminals of the transistors T14 and T16 are connected to the output terminal Q. A low level power supply voltage VSS is applied to the source terminals of the transistors T14 to T16. The gate terminal of the transistor T13 is connected to the all-on control terminal AON. The gate terminals of the transistors T14 and T15 are connected to the reset terminal R. The gate terminal of the transistor T16 is connected to the clear terminal CLR. A parasitic capacitance Cgd exists between the gate terminal and the drain terminal of the transistor T12, and a parasitic capacitance Cgs exists between the gate terminal and the source terminal of the transistor T12. Note that the high level power supply voltage DC and the low level power supply voltage VSS supplied to the scanning line driving circuit 13 are the high level power supply voltage ELVDD supplied to the organic EL panel 11 and the power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B. Is generally different.
　図６は、走査線駆動回路１３のタイミングチャートである。クロック信号ＣＫ１は、所定の時間ずつハイレベルとローレベルになる信号である。クロック信号ＣＫ２は、クロック信号ＣＫ１の反転信号である。全オン制御信号ＡＬＬ＿ＯＮは、黒表示期間においてハイレベルになる。ゲートスタートパルスＧＳＰとクリア信号ＣＬＥＡＲは、黒表示期間の後にクロック信号ＣＫ１の半周期だけハイレベルになる。ゲートエンドパルスＧＥＰは、黒表示期間の前にクロック信号ＣＫ１の半周期だけハイレベルになる。 FIG. 6 is a timing chart of the scanning line driving circuit 13. The clock signal CK1 is a signal that becomes high level and low level for a predetermined time. The clock signal CK2 is an inverted signal of the clock signal CK1. The all-on control signal ALL_ON becomes high level during the black display period. The gate start pulse GSP and the clear signal CLEAR are at a high level for a half cycle of the clock signal CK1 after the black display period. The gate end pulse GEP becomes high level for a half cycle of the clock signal CK1 before the black display period.
　黒表示期間の開始時に、全オン制御信号ＡＬＬ＿ＯＮがハイレベルに変化する。これに伴い、すべての単位回路３１においてトランジスタＴ１３がオンし、出力信号Ｑ１～Ｑｎはハイレベルになる。黒表示期間の終了時に、全オン制御信号ＡＬＬ＿ＯＮはローレベルに変化し、クリア信号ＣＬＥＡＲがハイレベルに変化する。これに伴い、すべての単位回路３１においてトランジスタＴ１３がオフし、トランジスタＴ１６がオンし、出力信号Ｑ１～Ｑｎはローレベルになる。 全 At the start of the black display period, the all-on control signal ALL_ON changes to high level. As a result, the transistor T13 is turned on in all the unit circuits 31, and the output signals Q1 to Qn become high level. At the end of the black display period, the all-on control signal ALL_ON changes to a low level, and the clear signal CLEAR changes to a high level. Accordingly, in all the unit circuits 31, the transistor T13 is turned off, the transistor T16 is turned on, and the output signals Q1 to Qn become low level.
　また、黒表示期間の終了時に、ゲートスタートパルスＧＳＰがハイレベルに変化する。これに伴い、１段目の単位回路ＳＲ１では、トランジスタＴ１１がオンし、ノードＮｂの電圧がハイレベルに変化し、トランジスタＴ１２がオンする。このとき、クロック信号ＣＫ１はローレベルであるので、出力信号Ｑ１はローレベルである。 Also, at the end of the black display period, the gate start pulse GSP changes to high level. Accordingly, in the unit circuit SR1 at the first stage, the transistor T11 is turned on, the voltage of the node Nb is changed to a high level, and the transistor T12 is turned on. At this time, since the clock signal CK1 is at a low level, the output signal Q1 is at a low level.
　ゲートスタートパルスＧＳＰは、第１ライン期間の開始時にローレベルに変化する。これに伴い、１段目の単位回路ＳＲ１では、トランジスタＴ１１はオフし、ノードＮｂはフローティング状態になる。また、第１ライン期間の開始時に、クロック信号ＣＫ１がハイレベルに変化する。これに伴い、１段目の単位回路ＳＲ１の出力信号Ｑ１はハイレベルになる。このとき寄生容量Ｃｇｄ、Ｃｇｓの作用によって、ノードＮｂの電圧は通常のハイレベルよりも高いハイレベルになる（図６のＳＲ１＿Ｎｂを参照）。したがって、出力信号Ｑ１のハイレベルは、トランジスタＴ１２の閾値電圧分だけ低下することなく、クロック信号ＣＫ１のハイレベルと同じレベルになる。 The gate start pulse GSP changes to a low level at the start of the first line period. Accordingly, in the unit circuit SR1 at the first stage, the transistor T11 is turned off and the node Nb is in a floating state. At the start of the first line period, the clock signal CK1 changes to a high level. As a result, the output signal Q1 of the first stage unit circuit SR1 becomes high level. At this time, the voltage of the node Nb becomes higher than the normal high level by the action of the parasitic capacitances Cgd and Cgs (see SR1_Nb in FIG. 6). Accordingly, the high level of the output signal Q1 is the same level as the high level of the clock signal CK1 without being lowered by the threshold voltage of the transistor T12.
　クロック信号ＣＫ１は、第１ライン期間の終了時にローレベルに変化する。これに伴い、１段目の単位回路ＳＲ１の出力信号Ｑ１はローレベルになる。第２ライン期間では、２段目の単位回路ＳＲ２の出力信号Ｑ２がハイレベルになる。２段目の単位回路３１の出力信号Ｑ２は、１段目の単位回路３１のリセット端子Ｒに入力される。このため、２段目の単位回路３１の出力信号Ｑ２がハイレベルになると、１段目の単位回路３１では、トランジスタＴ１４、Ｔ１５がオンする。トランジスタＴ１５がオンすることにより、ノードＮｂの電圧はローレベルに変化する。トランジスタＴ１４がオンすることにより、出力信号Ｑ１は速やかにローレベルに変化する。このように第１ライン期間では、１段目の単位回路ＳＲ１の出力信号Ｑ１がハイレベルになる。同様に、第２～第ｎライン期間では、それぞれ、２～ｎ段目の単位回路３１の出力信号Ｑ２～Ｑｎがハイレベルになる。 The clock signal CK1 changes to low level at the end of the first line period. Accordingly, the output signal Q1 of the unit circuit SR1 at the first stage becomes low level. In the second line period, the output signal Q2 of the second stage unit circuit SR2 is at a high level. The output signal Q2 of the second stage unit circuit 31 is input to the reset terminal R of the first stage unit circuit 31. Therefore, when the output signal Q2 of the second stage unit circuit 31 becomes high level, the transistors T14 and T15 are turned on in the first stage unit circuit 31. When the transistor T15 is turned on, the voltage of the node Nb changes to a low level. When the transistor T14 is turned on, the output signal Q1 quickly changes to a low level. Thus, in the first line period, the output signal Q1 of the unit circuit SR1 at the first stage becomes high level. Similarly, in the 2nd to nth line periods, the output signals Q2 to Qn of the 2nd to nth stage unit circuits 31 are at a high level, respectively.
　第ｎライン期間の終了時に、ゲートエンドパルスＧＥＰがハイレベルに変化する。これに伴い、ｎ段目の単位回路ＳＲｎでは、トランジスタＴ１４、Ｔ１５がオンし、ノードＮｂの電圧はローレベルに変化し、出力信号Ｑｎは速やかにローレベルに変化する。ゲートエンドパルスＧＥＰは、黒表示期間の開始時にローレベルに変化する。これに伴い、ｎ段目の単位回路ＳＲｎでは、トランジスタＴ１４、Ｔ１５はオフする。 At the end of the nth line period, the gate end pulse GEP changes to high level. Accordingly, in the unit circuit SRn at the n-th stage, the transistors T14 and T15 are turned on, the voltage at the node Nb changes to the low level, and the output signal Qn quickly changes to the low level. The gate end pulse GEP changes to a low level at the start of the black display period. Accordingly, the transistors T14 and T15 are turned off in the n-th unit circuit SRn.
　このように走査線駆動回路１３に対して、図６に示すクロック信号ＣＫ１、ＣＫ２、全オン制御信号ＡＬＬ＿ＯＮ、クリア信号ＣＬＥＡＲ、ゲートスタートパルスＧＳＰ、および、ゲートエンドパルスＧＥＰを供給することにより、走査線Ｓ１～Ｓｎを図６に示すタイミングで駆動することができる。 In this manner, the scanning line driving circuit 13 is supplied with the clock signals CK1 and CK2, the all-on control signal ALL_ON, the clear signal CLEAR, the gate start pulse GSP, and the gate end pulse GEP shown in FIG. The lines S1 to Sn can be driven at the timing shown in FIG.
　以下、補正部１６について説明する。図３に示すように、有機ＥＬ表示装置１０では、有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂの発光期間の長さは、画素回路２１の行ごとに異なる。有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂの輝度は、発光期間の長さに比例する。このため、外部から供給された映像信号Ｘ１を用いてデータ線Ｄ１～Ｄｍを駆動した場合、表示画面の輝度は先に選択される走査線に対応する部分（図面では表示画面の上部）では明るくなり、後で選択される走査線に対応する部分では暗くなる。そこで、補正部１６は、映像信号Ｘ１に対して、有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂの発光期間の長さの差に起因する輝度の差を補償するための補正処理を行うことにより、補正後の映像信号Ｘ２を求める。 Hereinafter, the correction unit 16 will be described. As shown in FIG. 3, in the organic EL display device 10, the length of the light emission period of the organic EL elements Lr, Lg, and Lb is different for each row of the pixel circuits 21. The luminance of the organic EL elements Lr, Lg, and Lb is proportional to the length of the light emission period. For this reason, when the data lines D1 to Dm are driven using the video signal X1 supplied from the outside, the brightness of the display screen is bright at the portion corresponding to the previously selected scanning line (upper part of the display screen in the drawing). Therefore, the portion corresponding to the scanning line selected later becomes dark. Accordingly, the correction unit 16 performs a correction process on the video signal X1 to compensate for the difference in luminance due to the difference in the length of the light emission periods of the organic EL elements Lr, Lg, and Lb. The video signal X2 is obtained.
　補正処理を行う前に有機ＥＬ表示装置１０の検査工程において、以下の方法で有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂの電圧－輝度特性を求める。まず、有機ＥＬ素子Ｌｇ、Ｌｂを非発光状態に制御した上で、有機ＥＬ素子Ｌｒに印加する電圧を最小値から最大値まで段階的に切り替えて、各電圧を印加したときの有機ＥＬパネル１１の輝度を測定する。輝度の測定結果に基づき、有機ＥＬ素子Ｌｒが１フレーム期間のうち１サブフレーム期間で連続的に発光したときの電圧－輝度特性を求める。これにより、有機ＥＬ素子Ｌｒについて、例えば、図７に示す電圧－輝度特性が得られる。同様の方法で、有機ＥＬ素子Ｌｇ、Ｌｂが１フレーム期間のうち１サブフレーム期間で連続的に発光したときの電圧－輝度特性をそれぞれ求める。特性データ記憶部１７は、得られた３種類の電圧－輝度特性を記憶する。 Before performing the correction process, in the inspection process of the organic EL display device 10, the voltage-luminance characteristics of the organic EL elements Lr, Lg, and Lb are obtained by the following method. First, after controlling the organic EL elements Lg and Lb to a non-light emitting state, the voltage applied to the organic EL element Lr is switched stepwise from the minimum value to the maximum value, and the organic EL panel 11 when each voltage is applied. Measure the brightness. Based on the measurement result of the luminance, the voltage-luminance characteristic when the organic EL element Lr emits light continuously in one subframe period in one frame period is obtained. Thereby, for example, the voltage-luminance characteristics shown in FIG. 7 are obtained for the organic EL element Lr. In the same manner, the voltage-luminance characteristics when the organic EL elements Lg and Lb emit light continuously in one subframe period in one frame period are obtained. The characteristic data storage unit 17 stores the obtained three types of voltage-luminance characteristics.
　映像信号Ｘ１に含まれるｉ行ｊ列目の画素の階調データの赤色成分がＸｒ、緑色成分がＸｇ、青色成分がＸｂであるとする。補正部１６は、以下の方法で、赤色成分Ｘｒに基づき補正後の赤色成分Ｘｒ’を求める。まず、補正部１６は、赤色成分Ｘｒに対応した電圧Ｖｒを求める。次に、補正部１６は、特性データ記憶部１７に記憶された有機ＥＬ素子Ｌｒの電圧－輝度特性を用いて、電圧Ｖｒに対応した輝度Ｙｒを求める。次に、補正部１６は、輝度Ｙｒに対して次式（１０）に示す係数Ｋｉを乗算することにより、補正後の輝度（Ｋｉ×Ｙｒ）を求める。
　　Ｋｉ＝Ｌｅｎ＿Ｆ／Ｌｅｎ＿ＥＭＲｉ　…（１０）
　ただし、式（１０）において、Ｌｅｎ＿Ｆは１サブフレーム期間の長さ、Ｌｅｎ＿ＥＭＲｉはｉ行目の画素回路２１内の有機ＥＬ素子Ｌｒの発光期間の長さを表す。 Assume that the red component of the gradation data of the pixel in the i-th row and j-th column included in the video signal X1 is Xr, the green component is Xg, and the blue component is Xb. The correcting unit 16 obtains a corrected red component Xr ′ based on the red component Xr by the following method. First, the correction unit 16 obtains a voltage Vr corresponding to the red component Xr. Next, the correction unit 16 obtains the luminance Yr corresponding to the voltage Vr using the voltage-luminance characteristics of the organic EL element Lr stored in the characteristic data storage unit 17. Next, the correction unit 16 obtains a corrected luminance (Ki × Yr) by multiplying the luminance Yr by a coefficient Ki shown in the following equation (10).
Ki = Len_F / Len_EMRi (10)
However, in Expression (10), Len_F represents the length of one subframe period, and Len_EMRi represents the length of the light emission period of the organic EL element Lr in the pixel circuit 21 in the i-th row.
　次に、補正部１６は、特性データ記憶部１７に記憶された有機ＥＬ素子Ｌｒの電圧－輝度特性を用いて、補正後の輝度（Ｋｉ×Ｙｒ）に対応した補正後の電圧Ｖｒ’を求める（図７を参照）。次に、補正部１６は、補正後の電圧Ｖｒ’に対応した補正後の赤色成分Ｘｒ’を求める。 Next, the correction unit 16 obtains a corrected voltage Vr ′ corresponding to the corrected luminance (Ki × Yr) using the voltage-luminance characteristics of the organic EL element Lr stored in the characteristic data storage unit 17. (See FIG. 7). Next, the correcting unit 16 obtains a corrected red component Xr ′ corresponding to the corrected voltage Vr ′.
　補正部１６は、同様の方法で、緑色成分Ｘｇに基づき補正後の緑色成分Ｘｇ’を求め、青色成分Ｘｂに基づき補正後の青色成分Ｘｂ’を求める。補正後の緑色成分Ｘｇ’を求めるときには、特性データ記憶部１７に記憶された有機ＥＬ素子Ｌｇの電圧－輝度特性が用いられ、補正後の青色成分Ｘｂ’を求めるときには、特性データ記憶部１７に記憶された有機ＥＬ素子Ｌｂの電圧－輝度特性が用いられる。補正部１６は、ｉ行ｊ列目の画素の階調データとして、補正後の赤色成分Ｘｒ’、補正後の緑色成分Ｘｇ’、および、補正後の青色成分Ｘｂ’を含む補正後の映像信号Ｘ２を出力する。 The correction unit 16 obtains the corrected green component Xg ′ based on the green component Xg and the corrected blue component Xb ′ based on the blue component Xb by the same method. When obtaining the corrected green component Xg ′, the voltage-luminance characteristic of the organic EL element Lg stored in the characteristic data storage unit 17 is used. When obtaining the corrected blue component Xb ′, the characteristic data storage unit 17 stores the corrected green component Xg ′. The stored voltage-luminance characteristics of the organic EL element Lb are used. The correction unit 16 corrects the corrected video signal including the corrected red component Xr ′, the corrected green component Xg ′, and the corrected blue component Xb ′ as the gradation data of the pixel in the i-th row and j-th column. X2 is output.
　このように補正部１６が有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂの発光期間の長さの差に起因する輝度の差を補償する補正処理を行うことにより、発光制御トランジスタと発光制御回路を用いることなく、画像を正しい輝度で表示することができる。 In this way, the correction unit 16 performs a correction process that compensates for the difference in luminance caused by the difference in the length of the light emission periods of the organic EL elements Lr, Lg, and Lb, so that the light emission control transistor and the light emission control circuit are not used. The image can be displayed with the correct brightness.
　以下、図８を参照して、電源電圧ＥＬＶＳＳ＿Ｒ、ＥＬＶＳＳ＿Ｇ、ＥＬＶＳＳ＿Ｂの設定方法の詳細を説明する。以下の説明では、有機ＥＬ素子Ｌｃは有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂのいずれかであり、トランジスタＴ２ｃは有機ＥＬ素子Ｌｃのアノード端子に接続されたトランジスタ（トランジスタＴ２ｒ、Ｔ２ｇ、Ｔ２ｂのいずれか）であり、電源電圧ＥＬＶＳＳ＿ＣはトランジスタＴ２ｃのソース端子に印加される電源電圧（電源電圧ＥＬＶＳＳ＿Ｒ、ＥＬＶＳＳ＿Ｇ、ＥＬＶＳＳ＿Ｂのいずれか）であるとする。 Hereinafter, the setting method of the power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B will be described in detail with reference to FIG. In the following description, the organic EL element Lc is any one of the organic EL elements Lr, Lg, and Lb, and the transistor T2c is a transistor connected to the anode terminal of the organic EL element Lc (any one of the transistors T2r, T2g, and T2b). The power supply voltage ELVSS_C is a power supply voltage (any one of the power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B) applied to the source terminal of the transistor T2c.
　有機ＥＬ素子Ｌｃが発光するための条件は、次式（１１）で与えられる。
　　ＥＬＶＤＤ－ＥＬＶＳＳ＿Ｃ≧Ｖｔｈ＿Ｃ＋ＶＤＳ　…（１１）
　ただし、式（１１）において、Ｖｔｈ＿Ｃは有機ＥＬ素子Ｌｃの発光閾値電圧、ＶＤＳはトランジスタＴ２ｃが飽和領域で動作するときのドレイン－ソース間電圧を表す。式（１１）より、次式（１２）が導かれる。式（１２）は、有機ＥＬ素子Ｌｃが発光するときに電源電圧ＥＬＶＳＳ＿Ｃが満たすべき条件を表す。
　　ＥＬＶＳＳ＿Ｃ≦ＥＬＶＤＤ－（Ｖｔｈ＿Ｃ＋ＶＤＳ）　…（１２） The condition for the organic EL element Lc to emit light is given by the following formula (11).
ELVDD−ELVSS_C ≧ Vth_C + VDS (11)
In Equation (11), Vth_C represents the light emission threshold voltage of the organic EL element Lc, and VDS represents the drain-source voltage when the transistor T2c operates in the saturation region. From the equation (11), the following equation (12) is derived. Expression (12) represents a condition that the power supply voltage ELVSS_C should satisfy when the organic EL element Lc emits light.
ELVSS_C ≦ ELVDD− (Vth_C + VDS) (12)
　ハイレベル電源電圧ＥＬＶＤＤは、固定の電圧である。電圧ＶＤＳがトランジスタＴ２ｃのデバイス特性で決まるパラメータであるとすると、有機ＥＬ素子Ｌｃを発光しないときの電源電圧ＥＬＶＳＳ＿Ｃは、式（１２）の右辺において（ＶＤＳ＋ΔＶ）を用いて調整することができる。発光閾値電圧Ｖｔｈ＿Ｃと電圧ＶＤＳは、有機ＥＬ素子ＬｃとトランジスタＴ２ｃの電流－電圧特性に基づき求めることができる。 The high level power supply voltage ELVDD is a fixed voltage. If the voltage VDS is a parameter determined by the device characteristics of the transistor T2c, the power supply voltage ELVSS_C when the organic EL element Lc does not emit light can be adjusted using (VDS + ΔV) on the right side of the equation (12). The light emission threshold voltage Vth_C and the voltage VDS can be obtained based on the current-voltage characteristics of the organic EL element Lc and the transistor T2c.
　有機ＥＬ素子Ｌｒが発光しないときの電源電圧ＥＬＶＳＳ＿ＣをＥＬＶＳＳ＿ｏｆｆ、有機ＥＬ素子Ｌｒが発光するときの電源電圧ＥＬＶＳＳ＿ＣをＥＬＶＳＳ＿ｏｎとすると、次式（１３）が成立する。
　　ＥＬＶＳＳ＿ｏｆｆ≧ＥＬＶＳＳ＿ｏｎ＋ＶＤＳ＋ΔＶ　…（１３）
　１サブフレーム期間内で有機ＥＬ素子Ｌｃを選択的に非発光状態にするためには、電圧ＥＬＶＳＳ＿ｏｆｆを電圧ＥＬＶＳＳ＿ｏｎよりも（ＶＤＳ＋ΔＶ）以上高く設定する。ただし、電圧ΔＶの上限は閾値電圧Ｖｔｈ＿Ｃである。電源回路１５は、有機ＥＬ素子Ｌｃが発光するサブフレーム期間ではトランジスタＴ２ｃのソース端子に電圧ＥＬＶＳＳ＿ｏｎを印加し、有機ＥＬ素子Ｌｃが発光しないサブフレーム期間ではトランジスタＴ２ｃのソース端子に電圧ＥＬＶＳＳ＿ｏｆｆを印加する。これにより、有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂを所望のタイミングで発光させることができる。 When the power supply voltage ELVSS_C when the organic EL element Lr does not emit light is ELVSS_off and the power supply voltage ELVSS_C when the organic EL element Lr emits light is ELVSS_on, the following expression (13) is established.
ELVSS_off ≧ ELVSS_on + VDS + ΔV (13)
In order to selectively bring the organic EL element Lc into a non-light emitting state within one subframe period, the voltage ELVSS_off is set higher than the voltage ELVSS_on by (VDS + ΔV) or more. However, the upper limit of the voltage ΔV is the threshold voltage Vth_C. The power supply circuit 15 applies the voltage ELVSS_on to the source terminal of the transistor T2c during the subframe period in which the organic EL element Lc emits light, and applies the voltage ELVSS_off to the source terminal of the transistor T2c in the subframe period during which the organic EL element Lc does not emit light. . Thereby, the organic EL elements Lr, Lg, and Lb can emit light at a desired timing.
　以下、本実施形態に係る有機ＥＬ表示装置１０の効果を説明する。以下の説明では、図１７に示す画素回路を備えた有機ＥＬ表示装置を第１の従来の有機ＥＬ表示装置、図１８に示す画素回路を備えた有機ＥＬ表示装置を第２の従来の有機ＥＬ表示装置という。 Hereinafter, effects of the organic EL display device 10 according to the present embodiment will be described. In the following description, the organic EL display device having the pixel circuit shown in FIG. 17 is the first conventional organic EL display device, and the organic EL display device having the pixel circuit shown in FIG. 18 is the second conventional organic EL. It is called a display device.
　有機ＥＬ表示装置１０には、従来の有機ＥＬ表示装置よりも回路規模を削減できるという効果がある。上述したように、第１の従来の有機ＥＬ表示装置には、発光制御線ＥＲｉ、ＥＧｉ、ＥＢｉの電圧を制御する発光制御回路が必要とされる。例えば、１本の発光制御線を制御する発光制御回路の各段を６個のトランジスタで構成した場合、発光制御回路内のトランジスタの総数は１８ｎ個になる。有機ＥＬ表示装置１０は、発光制御回路を必要としない。したがって、有機ＥＬ表示装置１０によれば、発光制御回路の分だけ有機ＥＬパネル１１の額縁（画素回路２１の配置領域の周辺部）を狭くすることができる。 The organic EL display device 10 has an effect that the circuit scale can be reduced as compared with the conventional organic EL display device. As described above, the first conventional organic EL display device requires a light emission control circuit that controls the voltages of the light emission control lines ERi, EGi, and EBi. For example, when each stage of the light emission control circuit that controls one light emission control line is configured by six transistors, the total number of transistors in the light emission control circuit is 18n. The organic EL display device 10 does not require a light emission control circuit. Therefore, according to the organic EL display device 10, the frame of the organic EL panel 11 (periphery of the arrangement area of the pixel circuit 21) can be narrowed by the light emission control circuit.
　また、図１７に示す画素回路は５個のトランジスタを含むのに対して、有機ＥＬ表示装置１０の画素回路２１は４個のトランジスタしか含まない。したがって、有機ＥＬ表示装置１０によれば、第１の従来の有機ＥＬ表示装置よりも画素回路内のトランジスタの面積を２０％削減することができる。また、トランジスタの個数が少ないので、トランジスタに接続される配線やコンタクトも少なくなる。したがって、有機ＥＬ表示装置１０によれば、第１の従来の有機ＥＬ表示装置よりも配線やコンタクトの面積を削減することもできる。 Further, the pixel circuit shown in FIG. 17 includes five transistors, whereas the pixel circuit 21 of the organic EL display device 10 includes only four transistors. Therefore, according to the organic EL display device 10, the area of the transistor in the pixel circuit can be reduced by 20% as compared with the first conventional organic EL display device. In addition, since the number of transistors is small, wirings and contacts connected to the transistors are also reduced. Therefore, according to the organic EL display device 10, the area of the wiring and the contact can be reduced as compared with the first conventional organic EL display device.
　第２の従来の有機ＥＬ表示装置では、各行の画素回路に供給される電源電圧ＥＬＶＤＤ＿Ｒｉ、ＥＬＶＤＤ＿Ｇｉ、ＥＬＶＤＤ＿Ｂｉを制御するために、複雑な構成の電源回路が必要とされる。有機ＥＬ表示装置１０では、３種類の電源電圧ＥＬＶＳＳ＿Ｒ、ＥＬＶＳＳ＿Ｇ、ＥＬＶＳＳ＿Ｂを電源回路１５を用いて制御することにより有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂの発光を制御できるので、電源回路の構成が簡単になる。したがって、有機ＥＬ表示装置１０によれば、第２の従来の有機ＥＬ表示装置よりも、電源回路の回路規模を削減することができる。 In the second conventional organic EL display device, in order to control the power supply voltages ELVDD_Ri, ELVDD_Gi, and ELVDD_Bi supplied to the pixel circuits in each row, a power supply circuit having a complicated configuration is required. In the organic EL display device 10, the light emission of the organic EL elements Lr, Lg, and Lb can be controlled by controlling the three types of power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B by using the power supply circuit 15. Therefore, the configuration of the power supply circuit is simple. Become. Therefore, according to the organic EL display device 10, the circuit scale of the power supply circuit can be reduced as compared with the second conventional organic EL display device.
　有機ＥＬ表示装置１０の画素回路２１では、駆動トランジスタのソース端子にはローレベル電源電圧ＥＬＶＳＳが印加されている。このため有機ＥＬ表示装置１０には、表示品位が高いという効果もある。Ｎチャネル型の駆動トランジスタＴ２ｃを用いた場合、図９（ａ）に示す構成を有する画素回路が考えられる。図９（ａ）に示す回路構成では、駆動トランジスタＴ２ｃのドレイン端子にハイレベル電源電圧ＥＬＶＤＤが印加され、駆動トランジスタＴ２ｃのソース端子は有機ＥＬ素子Ｌｃのアノード端子に接続され、有機ＥＬ素子Ｌｃのカソード端子にローレベル電源電圧ＥＬＶＳＳが印加されている。 In the pixel circuit 21 of the organic EL display device 10, the low-level power supply voltage ELVSS is applied to the source terminal of the drive transistor. For this reason, the organic EL display device 10 also has an effect of high display quality. When the N-channel driving transistor T2c is used, a pixel circuit having the configuration shown in FIG. In the circuit configuration shown in FIG. 9A, the high-level power supply voltage ELVDD is applied to the drain terminal of the drive transistor T2c, the source terminal of the drive transistor T2c is connected to the anode terminal of the organic EL element Lc, and A low level power supply voltage ELVSS is applied to the cathode terminal.
　トランジスタＴ２ｃと有機ＥＬ素子Ｌｃを流れる駆動電流Ｉｄｓは、トランジスタＴ２ｃのゲート－ソース間電圧Ｖｇｓに応じて変化する（電圧Ｖｇｓの２乗に概ね比例する）。図９（ａ）に示す回路構成では、トランジスタＴ２ｃのソース端子は有機ＥＬ素子Ｌｃのアノード端子に接続されている。このため、有機ＥＬ素子Ｌｃの特性にばらつきが発生すると、トランジスタＴ２ｃのソース電圧にもばらつきが発生する。これに伴い、トランジスタＴ２ｃのゲート－ソース間電圧Ｖｇｓにも、有機ＥＬ素子Ｌｃを流れる駆動電流Ｉｄｓにもばらつきが発生する。このため、図９（ａ）に示す構成を採用した有機ＥＬ表示装置では、表示画面に輝度のばらつきが発生することがある。 The drive current Ids flowing through the transistor T2c and the organic EL element Lc changes according to the gate-source voltage Vgs of the transistor T2c (generally proportional to the square of the voltage Vgs). In the circuit configuration shown in FIG. 9A, the source terminal of the transistor T2c is connected to the anode terminal of the organic EL element Lc. For this reason, when the characteristics of the organic EL element Lc vary, the source voltage of the transistor T2c also varies. As a result, variations occur in the gate-source voltage Vgs of the transistor T2c and also in the drive current Ids flowing through the organic EL element Lc. For this reason, in the organic EL display device adopting the configuration shown in FIG. 9A, the display screen may vary in luminance.
　有機ＥＬ表示装置１０の画素回路２１は、図９（ｂ）に示す構成を有する。図９（ｂ）に示す回路構成では、有機ＥＬ素子Ｌｃのアノード端子にハイレベル電源電圧ＥＬＶＤＤが印加され、有機ＥＬ素子Ｌｃのカソード端子は駆動トランジスタＴ２ｃのドレイン端子に接続され、駆動トランジスタＴ２ｃのソース端子にローレベル電源電圧ＥＬＶＳＳが印加されている。このため、有機ＥＬ素子Ｌｃの特性にばらつきが発生しても、トランジスタＴ２ｃのソース電圧にはばらつきは発生しない。トランジスタＴ２ｃのゲート－ソース間電圧Ｖｇｓにも、有機ＥＬ素子Ｌｃを流れる駆動電流Ｉｄｓにもばらつきが発生しない。したがって、図９（ｂ）に示す構成を採用した有機ＥＬ表示装置１０によれば、表示画面内の輝度のばらつきを抑制し、表示品位を高くすることができる。 The pixel circuit 21 of the organic EL display device 10 has a configuration shown in FIG. In the circuit configuration shown in FIG. 9B, the high-level power supply voltage ELVDD is applied to the anode terminal of the organic EL element Lc, the cathode terminal of the organic EL element Lc is connected to the drain terminal of the drive transistor T2c, A low level power supply voltage ELVSS is applied to the source terminal. For this reason, even if the characteristics of the organic EL element Lc vary, the source voltage of the transistor T2c does not vary. There is no variation in the gate-source voltage Vgs of the transistor T2c and the drive current Ids flowing through the organic EL element Lc. Therefore, according to the organic EL display device 10 adopting the configuration shown in FIG. 9B, it is possible to suppress variations in luminance in the display screen and to improve display quality.
　有機ＥＬ表示装置１０には、電源電圧ＥＬＶＳＳ＿Ｒ、ＥＬＶＳＳ＿Ｇ、ＥＬＶＳＳ＿Ｂを供給する電源配線を容易に形成できるという効果もある。図１０は、有機ＥＬ表示装置１０の画素回路２１のレイアウトを模式的に示す図である。図１１は、比較例に係る画素回路のレイアウトを模式的に示す図である。比較例に係る画素回路は、図１７に示す画素回路においてトランジスタＴ１、Ｔ２をＮチャネル型とし、トランジスタＴ３ｒ、Ｔ３ｇ、Ｔ３ｂを削除し、有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂのカソード端子に、それぞれ、電源電圧ＥＬＶＳＳ＿Ｒ、ＥＬＶＳＳ＿Ｇ、ＥＬＶＳＳ＿Ｂを印加したものである。 The organic EL display device 10 also has an effect that power supply lines for supplying power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B can be easily formed. FIG. 10 is a diagram schematically showing the layout of the pixel circuit 21 of the organic EL display device 10. FIG. 11 is a diagram schematically illustrating a layout of a pixel circuit according to a comparative example. In the pixel circuit according to the comparative example, the transistors T1 and T2 in the pixel circuit illustrated in FIG. 17 are N-channel type, the transistors T3r, T3g, and T3b are deleted, and the cathode terminals of the organic EL elements Lr, Lg, and Lb are respectively connected. The power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B are applied.
　有機ＥＬパネルの一般的な製造工程では、ＴＦＴ形成工程の後に有機層形成工程が設けられ、その後に金属層形成工程が設けられる。電源電圧ＥＬＶＳＳ＿Ｒ、ＥＬＶＳＳ＿Ｇ、ＥＬＶＳＳ＿Ｂを供給する電源配線は、金属層形成工程で形成される。金属層形成工程では金属蒸着法が行われるが、金属蒸着法では微細加工を行うことができない。 In a general manufacturing process of an organic EL panel, an organic layer forming process is provided after the TFT forming process, and then a metal layer forming process is provided. The power supply wiring for supplying the power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B is formed in the metal layer forming process. Although a metal vapor deposition method is performed in the metal layer forming step, fine processing cannot be performed by the metal vapor deposition method.
　図１２は、金属蒸着法を用いて金属配線を形成する様子を示す図である。金属蒸着法では、配線材料の金属を加熱して気化させる。気化した金属は、ノズル４１から発射され、金属製のマスク４２に形成された開口部４３を通過してパネル基板４４に衝突する。これにより、パネル基板４４上に金属製の配線４５が形成される。金属製のマスク４２に形成できる開口部４３のパターンの最小幅は、例えば、約１０μｍである。開口部４３間にも同程度の幅を有するスペースが必要であるので、形成可能な配線４５の最小間隔は２０μｍとなる。 FIG. 12 is a diagram showing a state in which metal wiring is formed using a metal vapor deposition method. In the metal vapor deposition method, the metal of the wiring material is heated and vaporized. The vaporized metal is ejected from the nozzle 41 and passes through the opening 43 formed in the metal mask 42 and collides with the panel substrate 44. As a result, metal wiring 45 is formed on the panel substrate 44. The minimum width of the pattern of the opening 43 that can be formed in the metal mask 42 is, for example, about 10 μm. Since a space having the same width is required between the openings 43, the minimum interval between the wirings 45 that can be formed is 20 μm.
　有機ＥＬ表示装置１０の有機ＥＬパネル１１の製造工程では、電源電圧ＥＬＶＳＳ＿Ｒ、ＥＬＶＳＳ＿Ｇ、ＥＬＶＳＳ＿Ｂを供給する電源配線は、ＴＦＴ形成工程で形成される。ＴＦＴ形成工程では、フォトリソグラフィとエッチングを用いて、２～１０μｍ程度の間隔で配線を形成することができる。したがって、高精細の有機ＥＬパネル１１を製造するときでも、電源電圧ＥＬＶＳＳ＿Ｒ、ＥＬＶＳＳ＿Ｇ、ＥＬＶＳＳ＿Ｂを供給する電源配線を容易に形成することができる。また、ＴＦＴ形成工程で形成された金属配線のシート抵抗は、金属層形成工程で形成された金属配線のシート抵抗よりも小さい。したがって、有機ＥＬ表示装置１０によれば、電源電圧ＥＬＶＳＳ＿Ｒ、ＥＬＶＳＳ＿Ｇ、ＥＬＶＳＳ＿Ｂを供給する電源配線の抵抗を小さくすることができる。 In the manufacturing process of the organic EL panel 11 of the organic EL display device 10, the power supply wiring for supplying the power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B is formed in the TFT forming process. In the TFT formation step, wiring can be formed at intervals of about 2 to 10 μm using photolithography and etching. Therefore, even when the high-definition organic EL panel 11 is manufactured, the power supply wiring for supplying the power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B can be easily formed. Further, the sheet resistance of the metal wiring formed in the TFT forming process is smaller than the sheet resistance of the metal wiring formed in the metal layer forming process. Therefore, according to the organic EL display device 10, it is possible to reduce the resistance of the power supply wiring that supplies the power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B.
　以上に示すように、本実施形態に係る有機ＥＬ表示装置１０は、複数の走査線Ｓ１～Ｓｎと、複数のデータ線Ｄ１～Ｄｍと、複数の画素回路２１と、走査線駆動回路１３と、データ線駆動回路１４と、複数の色（赤、緑、および、青）に対応する複数の電源電圧ＥＬＶＳＳ＿Ｒ、ＥＬＶＳＳ＿Ｇ、ＥＬＶＳＳ＿Ｂを制御する電源回路１５とを備えている。画素回路２１は、複数の色に対応する複数の有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂと、それぞれが対応する有機ＥＬ素子に直列に接続された複数の駆動トランジスタＴ２ｒ、Ｔ２ｇ、Ｔ２ｂと、走査線Ｓｉに接続されたゲート端子と、データ線Ｄｊに接続された第１導通端子（図２では左側の導通端子）と、複数の駆動トランジスタＴ２ｒ、Ｔ２ｇ、Ｔ２ｂのゲート端子に接続された第２導通端子とを有する書き込み制御トランジスタＴ１とを含んでいる。有機ＥＬ素子は、固定のハイレベル電源電圧ＥＬＶＤＤが印加されたアノード端子と、対応する駆動トランジスタのドレイン端子に接続されたカソード端子とを有し、駆動トランジスタのソース端子には、複数の電源電圧のうち、対応する有機ＥＬ素子の色に対応する電源電圧が印加される。電源回路１５は、各サブフレーム期間において、サブフレーム期間の色に対応する電源電圧を有機ＥＬ素子が発光し得る第１レベル（式（１）、（５）または（９）を満たすレベル）に制御し、他の電源電圧を有機ＥＬ素子が発光しない第２レベル（式（２）～（４）、または、（６）～（８）を満たすレベル）に制御する。 As described above, the organic EL display device 10 according to this embodiment includes the plurality of scanning lines S1 to Sn, the plurality of data lines D1 to Dm, the plurality of pixel circuits 21, the scanning line driving circuit 13, A data line driving circuit 14 and a power supply circuit 15 that controls a plurality of power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B corresponding to a plurality of colors (red, green, and blue) are provided. The pixel circuit 21 includes a plurality of organic EL elements Lr, Lg, Lb corresponding to a plurality of colors, a plurality of driving transistors T2r, T2g, T2b connected in series to the corresponding organic EL elements, and a scanning line Si. , A first conduction terminal (left conduction terminal in FIG. 2) connected to the data line Dj, and a second conduction terminal connected to the gate terminals of the plurality of drive transistors T2r, T2g, and T2b. And a write control transistor T1. The organic EL element has an anode terminal to which a fixed high-level power supply voltage ELVDD is applied, and a cathode terminal connected to the drain terminal of the corresponding drive transistor, and the source terminal of the drive transistor has a plurality of power supply voltages. Among these, the power supply voltage corresponding to the color of the corresponding organic EL element is applied. In each subframe period, the power supply circuit 15 sets the power supply voltage corresponding to the color of the subframe period to a first level at which the organic EL element can emit light (a level satisfying the formula (1), (5), or (9)). The other power supply voltage is controlled to a second level at which the organic EL element does not emit light (a level satisfying equations (2) to (4) or (6) to (8)).
　有機ＥＬ表示装置１０では、複数の色に対応した複数の電源電圧ＥＬＶＳＳ＿Ｒ、ＥＬＶＳＳ＿Ｇ、ＥＬＶＳＳ＿Ｂを電源回路１５を用いて制御することにより有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂの発光を制御できるので、画素回路２１内の発光制御トランジスタと駆動回路内の発光制御回路は不要となる。また、各行の画素回路に供給される電源電圧を制御する場合と比べて、電源回路１５の構成が簡単になる。したがって、本実施形態に係る有機ＥＬ表示装置１０によれば、回路規模が小さいフィールドシーケンシャル方式の有機ＥＬ表示装置を提供することができる。 In the organic EL display device 10, the light emission of the organic EL elements Lr, Lg, and Lb can be controlled by controlling a plurality of power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B corresponding to a plurality of colors using the power supply circuit 15. The light emission control transistor 21 and the light emission control circuit in the drive circuit are not necessary. Further, the configuration of the power supply circuit 15 is simplified as compared with the case of controlling the power supply voltage supplied to the pixel circuits in each row. Therefore, according to the organic EL display device 10 according to the present embodiment, it is possible to provide a field sequential type organic EL display device with a small circuit scale.
　また、有機ＥＬ表示装置１０では、サブフレーム期間ごとに表示オフ期間（黒表示期間）が設けられる。走査線駆動回路１３は、表示オフ期間ではすべての走査線Ｓ１～Ｓｎに対して、書き込み制御トランジスタＴ１がオンするオン電圧（ハイレベル電源電圧ＤＣ）を印加し、データ線駆動回路１４は、表示オフ期間ではすべてのデータ線Ｄ１～Ｄｍに対して、有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂの発光を停止させる表示オフ電圧（黒表示のための電圧ＶＺ）を印加する。このように表示オフ期間において有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂの発光を停止させて黒挿入を行うことにより、色割れを低減し、表示品位を高くすることができる。 In the organic EL display device 10, a display off period (black display period) is provided for each subframe period. The scanning line driving circuit 13 applies an on-voltage (high level power supply voltage DC) that turns on the write control transistor T1 to all the scanning lines S1 to Sn in the display off period, and the data line driving circuit 14 displays the display. In the off period, a display off voltage (voltage VZ for black display) for stopping the light emission of the organic EL elements Lr, Lg, and Lb is applied to all the data lines D1 to Dm. Thus, by stopping the light emission of the organic EL elements Lr, Lg, and Lb during the display off period and performing black insertion, color breakup can be reduced and display quality can be improved.
　また、有機ＥＬ表示装置１０は、入力映像信号（映像信号Ｘ１）に対して、有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂの発光期間の長さの差に起因する輝度の差を補償するための補正処理を行い、補正後の映像信号Ｘ２をデータ線駆動回路１４に対して出力する補正部１６を備えている。このような補正処理を行うことにより、画素回路２１に発光制御トランジスタを設けることなく、画像を正しい輝度で表示することができる。また、有機ＥＬ表示装置１０は、有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂの特性データを色ごとに記憶する特性データ記憶部１７を備え、補正部１６は、特性データ記憶部１７に記憶された特性データを用いて補正処理を行う。したがって、有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂの特性が色ごとに異なる点を考慮して、入力映像信号に対して好適な補正処理を行うことができる。 Further, the organic EL display device 10 corrects the input video signal (video signal X1) to compensate for the difference in luminance caused by the difference in the length of the light emission periods of the organic EL elements Lr, Lg, and Lb. And a correction unit 16 that outputs the corrected video signal X2 to the data line driving circuit 14 is provided. By performing such correction processing, an image can be displayed with correct luminance without providing the light emission control transistor in the pixel circuit 21. The organic EL display device 10 includes a characteristic data storage unit 17 that stores the characteristic data of the organic EL elements Lr, Lg, and Lb for each color. The correction unit 16 stores the characteristic data stored in the characteristic data storage unit 17. Is used to perform correction processing. Therefore, it is possible to perform a suitable correction process on the input video signal in consideration of the fact that the characteristics of the organic EL elements Lr, Lg, and Lb differ for each color.
　また、ハイレベル電源電圧ＥＬＶＤＤと第１レベルの電圧との差は有機ＥＬ素子の発光閾値電圧よりも大きく、ハイレベル電源電圧ＥＬＶＤＤと第２レベルの電圧との差は有機ＥＬ素子の発光閾値電圧よりも小さい（式（１）～（９））。このように第１および第２レベルを決定することにより、発光制御トランジスタと発光制御回路を用いることなく、有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂの発光を制御することができる。また、第２レベルの電圧は、ハイレベル電源電圧である（ＥＬＶＳＳ＿ＲなどのハイレベルはＥＬＶＤＤに等しい）。これにより、電源電圧の種類を減らし、電源回路１５の構成を簡単にすることができる。 The difference between the high level power supply voltage ELVDD and the first level voltage is larger than the light emission threshold voltage of the organic EL element, and the difference between the high level power supply voltage ELVDD and the second level voltage is the light emission threshold voltage of the organic EL element. (Equations (1) to (9)). By determining the first and second levels in this way, the light emission of the organic EL elements Lr, Lg, and Lb can be controlled without using the light emission control transistor and the light emission control circuit. The second level voltage is a high level power supply voltage (a high level such as ELVSS_R is equal to ELVDD). Thereby, the kind of power supply voltage can be reduced and the structure of the power supply circuit 15 can be simplified.
　また、走査線駆動回路１３は、第１制御信号（全オン制御信号ＡＯＮ）に従いすべての走査線Ｓ１～Ｓｎに対してオン電圧を印加し、第２制御信号（クリア信号ＣＬＲ）に従いすべての走査線Ｓ１～Ｓｎに対して書き込み制御トランジスタＴ１がオフするオフ電圧（ローレベル電源電圧ＶＳＳ）を印加する。したがって、第１および第２制御信号を用いて、すべての走査線Ｓ１～Ｓｎに対してオン電圧およびオフ電圧を選択的に印加することができる。また、走査線駆動回路１３は、単位回路３１を多段接続した構成を有し、単位回路３１は、走査線Ｓｉに接続された出力端子Ｑと、第１制御信号に従い出力端子Ｑにオン電圧を印加する第１トランジスタＴ１３と、第２制御信号に従い出力端子Ｑにオフ電圧を印加する第２トランジスタＴ１６とを含んでいる。第１および第２トランジスタＴ１３、Ｔ１６を含む単位回路３１を多段接続することにより、すべての走査線Ｓ１～Ｓｎに対してオン電圧およびオフ電圧を選択的に印加する走査線駆動回路１３を構成することができる。また、有機ＥＬ表示装置１０は、有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂの第１端子にハイレベル電源電圧ＥＬＶＤＤを印加するブランケット電極２２を備えている。したがって、ブランケット電極２２を用いて、画素回路２１に含まれる有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂのアノード端子にハイレベル電源電圧ＥＬＶＤＤを容易に印加することができる。 Further, the scanning line driving circuit 13 applies an ON voltage to all the scanning lines S1 to Sn according to the first control signal (all-on control signal AON), and performs all scanning according to the second control signal (clear signal CLR). An off voltage (low level power supply voltage VSS) that turns off the write control transistor T1 is applied to the lines S1 to Sn. Therefore, the on-voltage and the off-voltage can be selectively applied to all the scanning lines S1 to Sn using the first and second control signals. The scanning line driving circuit 13 has a configuration in which unit circuits 31 are connected in multiple stages. The unit circuit 31 applies an ON voltage to the output terminal Q connected to the scanning line Si and the output terminal Q according to the first control signal. A first transistor T13 to be applied and a second transistor T16 to apply an off voltage to the output terminal Q in accordance with the second control signal are included. By connecting the unit circuits 31 including the first and second transistors T13 and T16 in multiple stages, the scanning line driving circuit 13 for selectively applying the on voltage and the off voltage to all the scanning lines S1 to Sn is configured. be able to. The organic EL display device 10 further includes a blanket electrode 22 that applies a high-level power supply voltage ELVDD to the first terminals of the organic EL elements Lr, Lg, and Lb. Therefore, the high level power supply voltage ELVDD can be easily applied to the anode terminals of the organic EL elements Lr, Lg, Lb included in the pixel circuit 21 using the blanket electrode 22.
　また、電源回路１５は、第１～第３電源電圧ＥＬＶＳＳ＿Ｒ、ＥＬＶＳＳ＿Ｇ、ＥＬＶＳＳ＿Ｂを制御し、画素回路２１は、ハイレベル電源電圧ＥＬＶＤＤが印加されたアノード端子を有し、赤、緑、および、青にそれぞれ発光する第１～第３有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂと、第１～第３有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂのカソード端子にそれぞれ接続されたドレイン端子と、第１～第３電源電圧ＥＬＶＳＳ＿Ｒ、ＥＬＶＳＳ＿Ｇ、ＥＬＶＳＳ＿Ｂがそれぞれ印加されたソース端子と、書き込み制御トランジスタＴ１の他方の導通端子に接続されたゲート端子を有する第１～第３駆動トランジスタＴ２ｒ、Ｔ２ｇ、Ｔ２ｂとを含んでいる。したがって、赤サブフレーム、緑サブフレーム、および、青サブフレームを表示する、回路規模が小さいフィールドシーケンシャル方式の有機ＥＬ表示装置を提供することができる。また、走査線駆動回路１３は、画素回路２１と同じパネル（有機ＥＬパネル１１）上に形成されている。したがって、有機ＥＬ表示装置１０を小型化することができる。 The power supply circuit 15 controls the first to third power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B, and the pixel circuit 21 has an anode terminal to which the high-level power supply voltage ELVDD is applied, and includes red, green, and blue First to third organic EL elements Lr, Lg, and Lb that respectively emit light, drain terminals connected to cathode terminals of the first to third organic EL elements Lr, Lg, and Lb, and first to third power supplies, respectively. It includes first to third driving transistors T2r, T2g, and T2b each having a source terminal to which voltages ELVSS_R, ELVSS_G, and ELVSS_B are applied and a gate terminal connected to the other conduction terminal of the write control transistor T1. Accordingly, it is possible to provide a field sequential type organic EL display device that displays a red subframe, a green subframe, and a blue subframe and has a small circuit scale. The scanning line driving circuit 13 is formed on the same panel (organic EL panel 11) as the pixel circuit 21. Therefore, the organic EL display device 10 can be reduced in size.
　（第２の実施形態）
　本発明の第２の実施形態に係る有機ＥＬ表示装置は、第１の実施形態に係る有機ＥＬ表示装置１０において、画素回路２１内の駆動トランジスタを酸化物半導体を用いて構成し、画素回路２１内の書き込み制御トランジスタと走査線駆動回路１３内のトランジスタとを低温ポリシリコンを用いて構成したものである。 (Second Embodiment)
In the organic EL display device according to the second embodiment of the present invention, in the organic EL display device 10 according to the first embodiment, the drive transistor in the pixel circuit 21 is configured using an oxide semiconductor. The write control transistor in the scanning line and the transistor in the scanning line driving circuit 13 are formed using low-temperature polysilicon.
　画素回路２１内のトランジスタＴ２ｒ、Ｔ２ｇ、Ｔ２ｂ（駆動トランジスタ）は、酸化物半導体トランジスタである。酸化物半導体トランジスタとしては、例えば、半導体層をＩＧＺＯを用いて形成したＮチャネル型のＩＧＺＯトランジスタが使用される。ＩＧＺＯの移動度は５～２０（ａ．ｕ．）であり、Ｎチャネル型のＩＧＺＯトランジスタは中程度の駆動能力を有する。 The transistors T2r, T2g, and T2b (drive transistors) in the pixel circuit 21 are oxide semiconductor transistors. As the oxide semiconductor transistor, for example, an N-channel IGZO transistor in which a semiconductor layer is formed using IGZO is used. The mobility of IGZO is 5 to 20 (au), and the N-channel IGZO transistor has a medium driving capability.
　画素回路２１内のトランジスタＴ１（入力トランジスタ）と走査線駆動回路１３内のトランジスタＴ１１～Ｔ１６とは、低温ポリシリコントランジスタである。低温ポリシリコンは高い移動度を有し、低温ポリシリコントランジスタは高い駆動能力を有する。低温ポリシリコントランジスタは、Ｐチャネル型でもＮチャネル型でもよい。Ｐチャネル型の低温ポリシリコンの移動度は約５０（ａ．ｕ．）であり、Ｎチャネル型の低温ポリシリコンの移動度は約１００（ａ．ｕ．）である。 The transistor T1 (input transistor) in the pixel circuit 21 and the transistors T11 to T16 in the scanning line driving circuit 13 are low-temperature polysilicon transistors. Low temperature polysilicon has high mobility, and low temperature polysilicon transistors have high driving capability. The low temperature polysilicon transistor may be a P channel type or an N channel type. The mobility of P-channel type low-temperature polysilicon is about 50 (au), and the mobility of N-channel type low-temperature polysilicon is about 100 (au).
　以下、本実施形態に係る有機ＥＬ表示装置の効果を説明する。映像信号の階調に応じて有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂの駆動電流を制御するために、画素回路２１内の駆動トランジスタＴ２ｒ、Ｔ２ｇ、Ｔ２ｂのゲート電圧には好ましい範囲（例えば、２～５Ｖの範囲）がある。しかし、低温ポリシリコンのように移動度が高い材料を用いて駆動トランジスタを構成した場合、好ましいゲート電圧の範囲が低く、かつ、狭くなる（例えば、０～１Ｖの範囲になる）。データ線駆動回路の出力電圧の分解能には限界があるので、低く狭い範囲のゲート電圧を用いると、表示画像では階調潰れ（異なる階調に対応した輝度が同じになる現象）が発生する。 Hereinafter, effects of the organic EL display device according to the present embodiment will be described. In order to control the drive current of the organic EL elements Lr, Lg, Lb according to the gradation of the video signal, the gate voltage of the drive transistors T2r, T2g, T2b in the pixel circuit 21 is in a preferable range (for example, 2 to 5V). Range). However, when a driving transistor is formed using a material having high mobility such as low-temperature polysilicon, a preferable gate voltage range is low and narrow (for example, a range of 0 to 1 V). Since the resolution of the output voltage of the data line driver circuit is limited, if a low and narrow range of gate voltage is used, the display image may be crushed (a phenomenon in which the luminance corresponding to different gradations becomes the same).
　階調潰れを防止する方法として、駆動トランジスタのゲート長を長くして、駆動トランジスタの駆動能力を低くする方法が考えられる。しかし、この方法を採用すると、駆動トランジスタのレイアウト面積が増加する。例えば、低温ポリシリコンの移動度がＩＧＺＯの移動度の１０倍である場合に、低温ポリシリコンを用いた駆動トランジスタとＩＧＺＯを用いた駆動トランジスタの間でチャネル幅と好ましいゲート電圧の範囲とを同じにするためには、前者の駆動トランジスタのゲート長を後者の駆動トランジスタのゲート長の１０倍にする必要がある。 As a method of preventing gradation collapse, a method of increasing the gate length of the drive transistor and reducing the drive capability of the drive transistor is conceivable. However, when this method is employed, the layout area of the drive transistor increases. For example, when the mobility of low-temperature polysilicon is 10 times the mobility of IGZO, the channel width and the preferable gate voltage range are the same between the drive transistor using low-temperature polysilicon and the drive transistor using IGZO. In order to achieve this, the gate length of the former drive transistor needs to be 10 times the gate length of the latter drive transistor.
　一方、書き込み制御トランジスタや走査線駆動回路１３内のトランジスタは、常に高速で動作する必要がある。このため、これらのトランジスタを低温ポリシリコンを用いて構成することが好ましい。これらのトランジスタをＩＧＺＯを用いて構成すると、トランジスタのレイアウト面積が増加する。例えば、低温ポリシリコンの移動度がＩＧＺＯの移動度の１０倍である場合に、低温ポリシリコンを用いたトランジスタとＩＧＺＯを用いたトランジスタの間でゲート長と駆動能力を同じにするためには、後者のトランジスタのチャネル幅を前者のトランジスタのチャネル幅の１０倍にする必要がある。 On the other hand, the write control transistor and the transistor in the scanning line driving circuit 13 must always operate at high speed. For this reason, it is preferable to configure these transistors using low-temperature polysilicon. When these transistors are formed using IGZO, the layout area of the transistors increases. For example, when the mobility of low-temperature polysilicon is 10 times the mobility of IGZO, in order to make the gate length and the driving capability the same between a transistor using low-temperature polysilicon and a transistor using IGZO, The channel width of the latter transistor needs to be 10 times the channel width of the former transistor.
　走査線駆動回路１３と画素回路２１内のトランジスタをすべて低温ポリシリコンを用いて構成した場合、駆動トランジスタのレイアウト面積が増加する。一方、これらのトランジスタをすべて低温ポリシリコンを用いて構成した場合、書き込み制御トランジスタと走査線駆動回路１３内のトランジスタのレイアウト面積が増加する。本実施形態に係る有機ＥＬ表示装置では、トランジスタの駆動能力を考慮して、走査線駆動回路１３と画素回路２１を２種類のトランジスタで構成する。 When the transistors in the scanning line driving circuit 13 and the pixel circuit 21 are all made of low-temperature polysilicon, the layout area of the driving transistors increases. On the other hand, when these transistors are all made of low-temperature polysilicon, the layout area of the write control transistor and the transistors in the scanning line driving circuit 13 increases. In the organic EL display device according to the present embodiment, the scanning line driving circuit 13 and the pixel circuit 21 are configured by two types of transistors in consideration of the driving capability of the transistors.
　本実施形態に係る有機ＥＬ表示装置では、駆動トランジスタは酸化物半導体を用いて構成され、書き込み制御トランジスタ、および、走査線駆動回路１３に含まれるトランジスタは低温ポリシリコンを用いて構成されている。したがって、これらのトランジスタをすべて酸化物半導体を用いて構成した場合や、これらのトランジスタをすべて低温ポリシリコンを用いて構成した場合と比べて、トランジスタのレイアウト面積を全体として削減することができる。 In the organic EL display device according to the present embodiment, the driving transistor is configured using an oxide semiconductor, and the writing control transistor and the transistor included in the scanning line driving circuit 13 are configured using low-temperature polysilicon. Therefore, the overall layout area of the transistors can be reduced as compared with the case where all of these transistors are formed using an oxide semiconductor and the case where all of these transistors are formed using low-temperature polysilicon.
　（第３の実施形態）
　図１３は、本発明の第３の実施形態に係る有機ＥＬ表示装置の構成を示すブロック図である。図１３に示す有機ＥＬ表示装置５０は、第１の実施形態に係る有機ＥＬ表示装置１０において、有機ＥＬパネル１１、データ線駆動回路１４、電源回路１５、補正部１６、および、特性データ記憶部１７を、それぞれ、有機ＥＬパネル５１、データ線駆動回路５４、電源回路５５、補正部５６、および、特性データ記憶部５７に置換したものである。有機ＥＬ表示装置５０は、有機ＥＬ表示装置１０と同様に、第１～第３サブフレーム期間では赤サブフレーム、緑サブフレーム、および、青サブフレームをそれぞれ表示する。以下、本実施形態の構成要素のうち第１の実施形態の構成要素と同一のものには、同一の参照符号を付して説明を省略する。 (Third embodiment)
FIG. 13 is a block diagram showing a configuration of an organic EL display device according to the third embodiment of the present invention. The organic EL display device 50 shown in FIG. 13 is the same as the organic EL display device 10 according to the first embodiment, except that the organic EL panel 11, the data line driving circuit 14, the power supply circuit 15, the correction unit 16, and the characteristic data storage unit. 17 is replaced with an organic EL panel 51, a data line driving circuit 54, a power supply circuit 55, a correction unit 56, and a characteristic data storage unit 57, respectively. Similar to the organic EL display device 10, the organic EL display device 50 displays a red subframe, a green subframe, and a blue subframe in the first to third subframe periods, respectively. Hereinafter, the same reference numerals are given to the same components of the present embodiment as those of the first embodiment, and the description thereof will be omitted.
　有機ＥＬパネル５１は、ｎ本の走査線Ｓ１～Ｓｎ、ｍ本のデータ線Ｄ１～Ｄｍ、ｍ本の白用データ線ＤＷ１～ＤＷｍ、（ｍ×ｎ）個の画素回路６１、および、ブランケット電極２２を含んでいる。白用データ線ＤＷ１～ＤＷｍは、データ線Ｄ１～Ｄｍと平行に配置される。（ｍ×ｎ）個の画素回路６１は、走査線Ｓ１～Ｓｎとデータ線Ｄ１～Ｄｍの交点に対応して配置される。画素回路６１は、有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂに加えて、白色に発光する有機ＥＬ素子Ｌｗを含んでいる。 The organic EL panel 51 includes n scanning lines S1 to Sn, m data lines D1 to Dm, m white data lines DW1 to DWm, (m × n) pixel circuits 61, and blanket electrodes. 22 is included. The white data lines DW1 to DWm are arranged in parallel with the data lines D1 to Dm. The (m × n) pixel circuits 61 are arranged corresponding to the intersections of the scanning lines S1 to Sn and the data lines D1 to Dm. The pixel circuit 61 includes an organic EL element Lw that emits white light in addition to the organic EL elements Lr, Lg, and Lb.
　特性データ記憶部５７は、補正部５６における補正処理で必要とされる特性データを記憶している。特性データ記憶部５７は、有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂの電圧－輝度特性に加えて、有機ＥＬ素子Ｌｗの電圧－輝度特性を記憶する。補正部５６は、特性データ記憶部５７に記憶された特性データを用いて、表示制御回路１２から出力された映像信号Ｘ１に対して補正処理を行い、補正後の映像信号Ｘ３をデータ線駆動回路５４に対して出力する。補正後の映像信号Ｘ３は、白用データ線ＤＷ１～ＤＷｎの駆動に使用されるデータを含んでいる。 The characteristic data storage unit 57 stores characteristic data required for the correction process in the correction unit 56. The characteristic data storage unit 57 stores the voltage-luminance characteristics of the organic EL element Lw in addition to the voltage-luminance characteristics of the organic EL elements Lr, Lg, Lb. The correction unit 56 performs correction processing on the video signal X1 output from the display control circuit 12 using the characteristic data stored in the characteristic data storage unit 57, and outputs the corrected video signal X3 to the data line driving circuit. 54 is output. The corrected video signal X3 includes data used for driving the white data lines DW1 to DWn.
　データ線駆動回路５４は、制御信号Ｃ２と補正後の映像信号Ｘ３に基づき、データ線Ｄ１～Ｄｍと白用データ線ＤＷ１～ＤＷｍを駆動する。電源回路５５は、ブランケット電極２２に対して固定のハイレベル電源電圧ＥＬＶＤＤを出力すると共に、制御信号Ｃ３に基づき、画素回路６１に供給される４種類の電源電圧ＥＬＶＳＳ＿Ｒ、ＥＬＶＳＳ＿Ｇ、ＥＬＶＳＳ＿Ｂ、ＥＬＶＳＳ＿Ｗを制御する。 The data line driving circuit 54 drives the data lines D1 to Dm and the white data lines DW1 to DWm based on the control signal C2 and the corrected video signal X3. The power supply circuit 55 outputs a fixed high-level power supply voltage ELVDD to the blanket electrode 22 and controls four power supply voltages ELVSS_R, ELVSS_G, ELVSS_B, and ELVSS_W supplied to the pixel circuit 61 based on the control signal C3. To do.
　図１４は、ｉ行ｊ列目の画素回路６１の回路図である。画素回路６１は、画素回路２１に対してトランジスタＴ２ｗ、Ｔ３、容量Ｃｗ、および、有機ＥＬ素子Ｌｗを追加したものである。有機ＥＬ素子Ｌｗは、白に発光する有機発光層によって実現される。トランジスタＴ２ｗ、Ｔ３は、Ｎチャネル型のＴＦＴである。 FIG. 14 is a circuit diagram of the pixel circuit 61 in the i-th row and j-th column. The pixel circuit 61 is obtained by adding transistors T2w and T3, a capacitor Cw, and an organic EL element Lw to the pixel circuit 21. The organic EL element Lw is realized by an organic light emitting layer that emits white light. The transistors T2w and T3 are N-channel TFTs.
　有機ＥＬ素子Ｌｗのアノード端子は、有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂのアノード端子と共に、ブランケット電極２２に接続される。有機ＥＬ素子Ｌｗのアノード端子には、固定のハイレベル電源電圧ＥＬＶＤＤが印加される。有機ＥＬ素子Ｌｗのカソード端子は、トランジスタＴ２ｗのドレイン端子に接続される。トランジスタＴ２ｗのソース端子には、電源回路５５から出力された可変の電源電圧ＥＬＶＳＳ＿Ｗが印加される。容量Ｃｗは、トランジスタＴ２ｗのゲート端子とソース端子の間に設けられる。トランジスタＴ３のゲート端子は、トランジスタＴ１のゲート端子と共に走査線Ｓｉに接続される。トランジスタＴ３の一方の導通端子（図１４では左側の端子）は、白用データ線ＤＷｊに接続される。トランジスタＴ３の他方の導通端子は、トランジスタＴ２ｗのゲート端子に接続される。以下、トランジスタＴ２ｗのゲート端子が接続されたノードをＮｃという。 The anode terminal of the organic EL element Lw is connected to the blanket electrode 22 together with the anode terminals of the organic EL elements Lr, Lg, and Lb. A fixed high level power supply voltage ELVDD is applied to the anode terminal of the organic EL element Lw. The cathode terminal of the organic EL element Lw is connected to the drain terminal of the transistor T2w. A variable power supply voltage ELVSS_W output from the power supply circuit 55 is applied to the source terminal of the transistor T2w. The capacitor Cw is provided between the gate terminal and the source terminal of the transistor T2w. The gate terminal of the transistor T3 is connected to the scanning line Si together with the gate terminal of the transistor T1. One conduction terminal (left terminal in FIG. 14) of the transistor T3 is connected to the white data line DWj. The other conduction terminal of the transistor T3 is connected to the gate terminal of the transistor T2w. Hereinafter, the node to which the gate terminal of the transistor T2w is connected is referred to as Nc.
　トランジスタＴ１、Ｔ２ｒ、Ｔ２ｇ、Ｔ２ｂ、容量Ｃｒ、Ｃｇ、Ｃｂ、および、有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂは、走査線Ｓｉの電圧の変化に応じて、第１の実施形態と同様に動作する。走査線Ｓｉの電圧がハイレベルである間、トランジスタＴ３はオンし、ノードＮｃには白用データ線ＤＷｊの電圧が印加される。走査線Ｓｉの電圧がローレベルになると、トランジスタＴ３はオフする。トランジスタＴ３がオフした後、ノードＮｃはフローティング状態になり、容量ＣｗにはトランジスタＴ２ｗのゲート－ソース間電圧が保持される。トランジスタＴ２ｗと有機ＥＬ素子Ｌｗを流れる駆動電流は、トランジスタＴ２ｗのゲート－ソース間電圧に応じて変化する。有機ＥＬ素子Ｌｗは、駆動電流に応じた輝度で発光する。有機ＥＬ素子Ｌｗは白色有機ＥＬ素子として機能し、トランジスタＴ３は白用書き込み制御トランジスタとして機能する。 Transistors T1, T2r, T2g, T2b, capacitors Cr, Cg, Cb, and organic EL elements Lr, Lg, Lb operate in the same manner as in the first embodiment in accordance with the change in voltage of the scanning line Si. While the voltage of the scanning line Si is at the high level, the transistor T3 is turned on, and the voltage of the white data line DWj is applied to the node Nc. When the voltage of the scanning line Si becomes low level, the transistor T3 is turned off. After the transistor T3 is turned off, the node Nc enters a floating state, and the gate-source voltage of the transistor T2w is held in the capacitor Cw. The drive current flowing through the transistor T2w and the organic EL element Lw changes according to the gate-source voltage of the transistor T2w. The organic EL element Lw emits light with luminance according to the drive current. The organic EL element Lw functions as a white organic EL element, and the transistor T3 functions as a white write control transistor.
　図１５は、有機ＥＬ表示装置５０のタイミングチャートである。図１５において、ＥＭＷ１～ＥＭＷｎは、それぞれ、１～ｎ行目の画素回路６１内の有機ＥＬ素子Ｌｗの発光期間を示す。各サブフレーム期間の先頭には、黒表示期間が設けられる。トランジスタＴ１、Ｔ２ｒ、Ｔ２ｇ、Ｔ２ｂ、および、有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂは、第１の実施形態と同様に駆動される。以下、トランジスタＴ２ｗ、Ｔ３、および、有機ＥＬ素子Ｌｗの動作について説明する。 FIG. 15 is a timing chart of the organic EL display device 50. In FIG. 15, EMW1 to EMWn indicate light emission periods of the organic EL elements Lw in the pixel circuits 61 in the 1st to nth rows, respectively. A black display period is provided at the head of each subframe period. The transistors T1, T2r, T2g, T2b and the organic EL elements Lr, Lg, Lb are driven in the same manner as in the first embodiment. Hereinafter, operations of the transistors T2w and T3 and the organic EL element Lw will be described.
　電源電圧ＥＬＶＳＳ＿Ｗは、電源電圧ＥＬＶＳＳ＿Ｒ、ＥＬＶＳＳ＿Ｇ、ＥＬＶＳＳ＿Ｂのいずれかがローレベルのときにはローレベルに制御され、それ以外のときにはハイレベルに制御される。このため、有機ＥＬ素子Ｌｗは、第１～第３サブフレーム期間において有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂのいずれかが発光する期間に発光する。黒表示期間では、白用データ線ＤＷ１～ＤＷｍにも、黒表示のための電圧ＶＺが印加される。このため、すべての画素回路６１において、トランジスタＴ３がオンし、ノードＮｃにはトランジスタＴ３を介して電圧ＶＺが印加される。このとき、駆動電流はトランジスタＴ２ｗを流れないので、有機ＥＬ素子Ｌｗは発光しない。したがって、黒表示期間では黒画面が表示される。 The power supply voltage ELVSS_W is controlled to a low level when any of the power supply voltages ELVSS_R, ELVSS_G, and ELVSS_B is at a low level, and is controlled to a high level at other times. For this reason, the organic EL element Lw emits light during a period in which any one of the organic EL elements Lr, Lg, and Lb emits light during the first to third subframe periods. In the black display period, the voltage VZ for black display is also applied to the white data lines DW1 to DWm. Therefore, in all the pixel circuits 61, the transistor T3 is turned on, and the voltage VZ is applied to the node Nc via the transistor T3. At this time, since the driving current does not flow through the transistor T2w, the organic EL element Lw does not emit light. Therefore, a black screen is displayed during the black display period.
　白用データ線ＤＷ１～ＤＷｍには、第１～第３サブフレーム期間内の第ｉライン期間では、それぞれ、電圧ＶＷ１ｉ、ＶＷ２ｉ、ＶＷ３ｉが印加される。第ｉライン期間では、ｉ行目の画素回路６１において、トランジスタＴ３がオンし、ノードＮｃにはトランジスタＴ３を介して電圧ＶＷ１ｉ、ＶＷ２ｉ、または、ＶＷ３ｉが印加される。これに伴い、トランジスタＴ２ｗのゲート－ソース間電圧は変化する。トランジスタＴ２ｗと有機ＥＬ素子Ｌｗには、トランジスタＴ２ｗのゲート－ソース間電圧（変化後の電圧）と閾値電圧に応じた駆動電流が流れる。したがって、ｉ行目の有機ＥＬ素子Ｌｗは、第ｉライン期間の開始後は、第ｉライン期間で書き込まれた電圧ＶＷ１ｉ、ＶＷ２ｉ、または、ＶＷ３ｉに応じた輝度で白色に発光する。 The voltages VW1i, VW2i, and VW3i are applied to the white data lines DW1 to DWm in the i-th line period within the first to third subframe periods, respectively. In the i-th line period, in the pixel circuit 61 in the i-th row, the transistor T3 is turned on, and the voltage VW1i, VW2i, or VW3i is applied to the node Nc via the transistor T3. Along with this, the gate-source voltage of the transistor T2w changes. A drive current according to the gate-source voltage (voltage after change) of the transistor T2w and the threshold voltage flows through the transistor T2w and the organic EL element Lw. Therefore, after the start of the i-th line period, the i-th organic EL element Lw emits white light with a luminance according to the voltages VW1i, VW2i, or VW3i written in the i-th line period.
　図１６は、ｉ行ｊ列目の画素回路６１内の有機ＥＬ素子Ｌｗの輝度を示す図である。図１６において、Ｐｉは、第ｉライン期間の開始から電源電圧ＥＬＶＳＳ＿Ｗがハイレベルに変化するまでの時間を表す。第１サブフレーム期間では、有機ＥＬ素子Ｌｗは、電圧ＶＷ１ｉに応じた輝度ＢＲ１ｉで時間Ｐｉだけ発光する。第２サブフレーム期間では、有機ＥＬ素子Ｌｗは、電圧ＶＷ２ｉに応じた輝度ＢＲ２ｉで時間Ｐｉだけ発光する。第３サブフレーム期間では、有機ＥＬ素子Ｌｗは、電圧ＶＷ３ｉに応じた輝度ＢＲ３ｉで時間Ｐｉだけ発光する。 FIG. 16 is a diagram showing the luminance of the organic EL element Lw in the pixel circuit 61 in the i-th row and j-th column. In FIG. 16, Pi represents the time from the start of the i-th line period until the power supply voltage ELVSS_W changes to the high level. In the first sub-frame period, the organic EL element Lw emits light for the time Pi with the brightness BR1i corresponding to the voltage VW1i. In the second subframe period, the organic EL element Lw emits light for a time Pi at a brightness BR2i corresponding to the voltage VW2i. In the third subframe period, the organic EL element Lw emits light for a time Pi at a brightness BR3i corresponding to the voltage VW3i.
　以下、補正部５６について説明する。映像信号Ｘ１に含まれるｉ行ｊ列目の画素の階調データの赤色成分がＸｒ、緑色成分がＸｇ、青色成分がＸｂであるとする。補正部５６は、まず、次式（１４）～（１７）に従い、３個の色成分Ｘｒ、Ｘｇ、Ｘｂを、白色成分Ｅｗを含む４個の色成分Ｅｒ、Ｅｇ、Ｅｂ、Ｅｗに変換する。
　　Ｅｗ＝ｋ×ｍｉｎ（Ｘｒ，Ｘｇ，Ｘｂ）　…（１４）
　　Ｅｒ＝Ｘｒ－Ｅｗ　…（１５）
　　Ｅｇ＝Ｘｇ－Ｅｗ　…（１６）
　　Ｅｂ＝Ｘｂ－Ｅｗ　…（１７）
　ただし、式（１４）において、ｋは０以上１以下の定数である。補正部５６は、３個の色成分Ｘｒ、Ｘｇ、Ｘｂを４個の色成分Ｅｒ、Ｅｇ、Ｅｂ、Ｅｗに変換するときに、例えば、特開２００１－１４７６６６号公報や国際公開第２０１２／１３７７５３号に記載された方法を用いてもよい。 Hereinafter, the correction unit 56 will be described. It is assumed that the red component of the gradation data of the pixel in the i-th row and j-th column included in the video signal X1 is Xr, the green component is Xg, and the blue component is Xb. The correction unit 56 first converts the three color components Xr, Xg, and Xb into four color components Er, Eg, Eb, and Ew including the white component Ew according to the following equations (14) to (17). .
Ew = k × min (Xr, Xg, Xb) (14)
Er = Xr−Ew (15)
Eg = Xg−Ew (16)
Eb = Xb−Ew (17)
However, in Formula (14), k is a constant of 0 or more and 1 or less. When the correction unit 56 converts the three color components Xr, Xg, and Xb into the four color components Er, Eg, Eb, and Ew, for example, Japanese Patent Laid-Open No. 2001-147666 and International Publication No. 2012/137553. The method described in the issue may be used.
　次に、補正部５６は、第１の実施形態と同様の方法で、変換後の赤色成分Ｅｒ、変換後の緑色成分Ｅｇ、および、変換後の青色成分Ｅｂに基づき、補正後の赤色成分Ｘｒ’、補正後の緑色成分Ｘｇ’、および、補正後の青色成分Ｘｂ’をそれぞれ求める。次に、補正部５６は、次式（１８）を満たす白色成分Ｅｗ１～Ｅｗ３を求める。
　　Ｅｗ＝Ｅｗ１＋Ｅｗ２＋Ｅｗ３　…（１８） Next, the correcting unit 56 is a method similar to the first embodiment, and the corrected red component Xr based on the converted red component Er, the converted green component Eg, and the converted blue component Eb. ', The corrected green component Xg' and the corrected blue component Xb 'are obtained respectively. Next, the correcting unit 56 obtains white components Ew1 to Ew3 that satisfy the following expression (18).
Ew = Ew1 + Ew2 + Ew3 (18)
　補正部５６は、例えば以下の方法を用いてい、白色成分Ｅｗ１～Ｅｗ３を求める。補正部５６は、式（１９）に従い、白色成分Ｅｗ１～Ｅｗ３を求めてもよい（第１の方法）。
　　Ｅｗ１＝Ｅｗ２＝Ｅｗ３＝Ｅｗ／３　…（１９）
　あるいは、補正部５６は、式（２０）～（２２）に従い、白色成分Ｅｗ１～Ｅｗ３を求めてもよい（第２の方法）。
　　Ｅｗ１＝Ｅｗ×Ｅｒ／（Ｅｒ＋Ｅｇ＋Ｅｂ）　…（２０）
　　Ｅｗ２＝Ｅｗ×Ｅｇ／（Ｅｒ＋Ｅｇ＋Ｅｂ）　…（２１）
　　Ｅｗ３＝Ｅｗ×Ｅｂ／（Ｅｒ＋Ｅｇ＋Ｅｂ）　…（２２）
　第１の方法では、第１～第３サブフレーム期間における有機ＥＬ素子Ｌｗの輝度は、等しくなる。第１の方法によれば、白色成分Ｅｗ１～Ｅｗ３を容易に求めることができる。第２の方法では、有機ＥＬ素子Ｌｗは、第１～第３サブフレーム期間において、有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂと同じ輝度の比率で発光する。第２の方法によれば、色割れをさらに低減することができる。 The correction unit 56 obtains the white components Ew1 to Ew3 using, for example, the following method. The correcting unit 56 may obtain the white components Ew1 to Ew3 according to the equation (19) (first method).
Ew1 = Ew2 = Ew3 = Ew / 3 (19)
Alternatively, the correction unit 56 may obtain the white components Ew1 to Ew3 according to the equations (20) to (22) (second method).
Ew1 = Ew × Er / (Er + Eg + Eb) (20)
Ew2 = Ew × Eg / (Er + Eg + Eb) (21)
Ew3 = Ew × Eb / (Er + Eg + Eb) (22)
In the first method, the luminance of the organic EL element Lw in the first to third subframe periods is equal. According to the first method, the white components Ew1 to Ew3 can be easily obtained. In the second method, the organic EL element Lw emits light at the same luminance ratio as the organic EL elements Lr, Lg, and Lb in the first to third subframe periods. According to the second method, color breakup can be further reduced.
　次に、補正部５６は、第１の実施形態と同様の方法で、白色成分Ｅｗ１～Ｅｗ３に基づき、補正後の白色成分Ｘｗ１’～Ｘｗ３’を求める。補正後の白色成分Ｘｗ１’～Ｘｗ３’を求めるときには、特性データ記憶部５７に記憶された有機ＥＬ素子Ｌｗの電圧－輝度特性が用いられる。補正部５６は、ｉ行ｊ列目の画素の階調データとして、補正後の赤色成分Ｘｒ’、補正後の緑色成分Ｘｇ’、補正後の青色成分Ｘｂ’、および、補正後の白色成分Ｘｗ１’～Ｘｗ３’を含む補正後の映像信号Ｘ３を出力する。 Next, the correction unit 56 obtains corrected white components Xw1 'to Xw3' based on the white components Ew1 to Ew3 in the same manner as in the first embodiment. When obtaining the corrected white components Xw1 'to Xw3', the voltage-luminance characteristics of the organic EL element Lw stored in the characteristic data storage unit 57 are used. The correction unit 56 uses the corrected red component Xr ′, the corrected green component Xg ′, the corrected blue component Xb ′, and the corrected white component Xw1 as the gradation data of the pixel in the i-th row and j-th column. The corrected video signal X3 including “˜Xw3” is output.
　データ線駆動回路５４は、第１サブフレーム期間では、データ線Ｄｊに対して補正後の赤色成分Ｘｒ’に応じた電圧を印加し、白用データ線ＤＷｊに対して補正後の白色成分Ｘｗ１’に応じた電圧を印加する。データ線駆動回路５４は、第２サブフレーム期間では、データ線Ｄｊに対して補正後の緑色成分Ｘｇ’に応じた電圧を印加し、白用データ線ＤＷｊに対して補正後の白色成分Ｘｗ２’に応じた電圧を印加する。データ線駆動回路５４は、第３サブフレーム期間では、データ線Ｄｊに対して補正後の青色成分Ｘｂ’に応じた電圧を印加し、白用データ線ＤＷｊに対して補正後の白色成分Ｘｗ３’に応じた電圧を印加する。 In the first subframe period, the data line driving circuit 54 applies a voltage corresponding to the corrected red component Xr ′ to the data line Dj, and corrects the white component Xw1 ′ to the white data line DWj. Apply a voltage according to. In the second subframe period, the data line driving circuit 54 applies a voltage corresponding to the corrected green component Xg ′ to the data line Dj, and corrects the white component Xw2 ′ to the white data line DWj. Apply a voltage according to. In the third subframe period, the data line driving circuit 54 applies a voltage corresponding to the corrected blue component Xb ′ to the data line Dj, and corrects the white component Xw3 ′ after correction to the white data line DWj. Apply a voltage according to.
　このように補正部５６が有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂ、Ｌｗの発光期間の長さの差に起因する輝度の差を補償する補正処理を行うことにより、発光制御トランジスタと発光制御回路を用いることなく、画像を正しい輝度で表示することができる。 As described above, the correction unit 56 performs the correction process for compensating for the difference in luminance caused by the difference in the length of the light emission periods of the organic EL elements Lr, Lg, Lb, and Lw, thereby using the light emission control transistor and the light emission control circuit. The image can be displayed with the correct brightness.
　以上に示すように、本実施形態に係る有機ＥＬ表示装置５０は、ｍ本の白用データ線ＤＷ１～ＤＷｍを備えている。画素回路６１は、白色に対応する白色有機ＥＬ素子Ｌｗと、白色有機ＥＬ素子Ｌｗに直列に接続された白用駆動トランジスタ（トランジスタＴ２ｗ）と、走査線Ｇｉに接続されたゲート端子と、白用データ線に接続された第１導通端子（図１４では左側の端子）と、第２駆動トランジスタのゲート端子に接続された第２導通端子とを有する白用書き込み制御トランジスタ（トランジスタＴ３）とを含んでいる。白色有機ＥＬ素子は、ハイレベル電源電圧ＥＬＶＤＤが印加されたアノード端子と、白用駆動トランジスタのドレイン端子に接続されたカソード端子とを有し、駆動トランジスタのソース端子には、白用電源電圧ＥＬＶＳＳ＿Ｗが印加されている。 As described above, the organic EL display device 50 according to the present embodiment includes m white data lines DW1 to DWm. The pixel circuit 61 includes a white organic EL element Lw corresponding to white, a white driving transistor (transistor T2w) connected in series to the white organic EL element Lw, a gate terminal connected to the scanning line Gi, and white A white write control transistor (transistor T3) having a first conduction terminal (left terminal in FIG. 14) connected to the data line and a second conduction terminal connected to the gate terminal of the second drive transistor; It is out. The white organic EL element has an anode terminal to which a high-level power supply voltage ELVDD is applied and a cathode terminal connected to the drain terminal of the white drive transistor, and the white power supply voltage ELVSS_W is connected to the source terminal of the drive transistor. Is applied.
　有機ＥＬ表示装置５０によれば、白色有機ＥＬ素子Ｌｗを設けることにより、各サブフレーム期間における有機ＥＬ素子の輝度を調整することができる。白色有機ＥＬ素子Ｌｗが発光する分だけ有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂの輝度を低くできるので、有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂの寿命を延ばすことができる。また、有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂと白色有機ＥＬ素子Ｌｗを同じ期間で発光させることにより、表示画面に発生する色割れを抑制することができる。白サブフレーム期間を設けないので、サブフレーム期間の長さを保ちながら、これらの効果を得ることができる。 According to the organic EL display device 50, the luminance of the organic EL element in each subframe period can be adjusted by providing the white organic EL element Lw. Since the luminance of the organic EL elements Lr, Lg, and Lb can be lowered by the amount of light emitted from the white organic EL element Lw, the lifetime of the organic EL elements Lr, Lg, and Lb can be extended. Further, by causing the organic EL elements Lr, Lg, and Lb and the white organic EL element Lw to emit light in the same period, it is possible to suppress color breakup that occurs on the display screen. Since no white subframe period is provided, these effects can be obtained while maintaining the length of the subframe period.
　また、電源回路５５は、各サブフレーム期間において、白用電源電圧ＥＬＶＳＳ＿Ｗを白色有機ＥＬ素子Ｌｗが発光し得るレベルに制御する。したがって、有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂと同じ発光制御を白色有機ＥＬ素子Ｌｗについて行いながら、上記の効果を得ることができる。 The power supply circuit 55 controls the white power supply voltage ELVSS_W to a level at which the white organic EL element Lw can emit light in each subframe period. Therefore, the above effect can be obtained while performing the same light emission control as that of the organic EL elements Lr, Lg, and Lb on the white organic EL element Lw.
　また、有機ＥＬ素子Ｌｗは、各サブフレーム期間において複数の有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂのいずれかが発光する期間に発光する。したがって、各サブフレーム期間においれ有機ＥＬ素子Ｌｗを他の有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂと同じ期間だけ発光させながら、上記の効果を得ることができる。 Further, the organic EL element Lw emits light during a period in which any one of the plurality of organic EL elements Lr, Lg, and Lb emits light in each subframe period. Therefore, the above-described effects can be obtained while the organic EL element Lw emits light for the same period as the other organic EL elements Lr, Lg, and Lb in each subframe period.
　有機ＥＬ素子Ｌｗは、各サブフレーム期間において同じ輝度で発光してもよい（第１の方法）。第１の方法によれば、各サブフレーム期間における有機ＥＬ素子Ｌｗの輝度を容易に求めることができる。あるいは、有機ＥＬ素子Ｌｗは、各サブフレーム期間において、複数の有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂと同じ輝度の比率で発光してもよい（第２の方法）。第２の方法によれば、色割れをさらに低減することができる。 The organic EL element Lw may emit light with the same luminance in each subframe period (first method). According to the first method, the luminance of the organic EL element Lw in each subframe period can be easily obtained. Alternatively, the organic EL element Lw may emit light at the same luminance ratio as the plurality of organic EL elements Lr, Lg, and Lb in each subframe period (second method). According to the second method, color breakup can be further reduced.
　有機ＥＬ表示装置５０では、白用電源電圧ＥＬＶＳＳ＿Ｗは図１５に示すように制御されることしたが、白用電源電圧ＥＬＶＳＳ＿Ｗは固定のローレベル電源電圧であってもよい。このように白用電源電圧をローレベル電源電圧に固定することにより、電源回路５５の構成を簡単にすることができる。 In the organic EL display device 50, the white power supply voltage ELVSS_W is controlled as shown in FIG. 15, but the white power supply voltage ELVSS_W may be a fixed low level power supply voltage. Thus, by fixing the white power supply voltage to the low level power supply voltage, the configuration of the power supply circuit 55 can be simplified.
　本発明の実施形態に係る有機ＥＬ表示装置については、以下の変形例を構成することができる。例えば、変形例に係る有機ＥＬ表示装置は、第１～第３サブフレーム期間において、３枚のサブフレームを上記以外の順序で表示してもよい。例えば、変形例に係る有機ＥＬ表示装置は、第１～第３サブフレーム期間において３枚のサブフレームを赤サブフレーム、青サブフレーム、および、緑サブフレームの順に表示してもよい。 The following modifications can be configured for the organic EL display device according to the embodiment of the present invention. For example, the organic EL display device according to the modification may display three subframes in an order other than the above in the first to third subframe periods. For example, the organic EL display device according to the modification may display three subframes in the order of a red subframe, a blue subframe, and a green subframe in the first to third subframe periods.
　また、変形例に係る有機ＥＬ表示装置は、１フレーム期間を４個以上のサブフレーム期間に分割し、１フレーム期間に４枚以上のサブフレームを表示してもよい。この場合、変形例に係る有機ＥＬ表示装置は、画素回路２１を備え、赤、緑、および、青以外の色のサブフレーム期間では有機ＥＬ素子Ｌｒ、Ｌｇ、Ｌｂのうち２個または３個の有機ＥＬ素子を発光させてもよい。あるいは、変形例に係る有機ＥＬ表示装置は、４個以上の有機ＥＬ素子と、これと同数の駆動トランジスタと、書き込み制御トランジスタとを含む画素回路を備え、各サブフレーム期間では１個の有機ＥＬ素子を発光させてもよい。 Further, the organic EL display device according to the modification may divide one frame period into four or more subframe periods and display four or more subframes in one frame period. In this case, the organic EL display device according to the modified example includes the pixel circuit 21, and two or three of the organic EL elements Lr, Lg, and Lb in the sub-frame period of colors other than red, green, and blue. The organic EL element may emit light. Alternatively, the organic EL display device according to the modification includes a pixel circuit including four or more organic EL elements, the same number of drive transistors, and a write control transistor, and one organic EL in each subframe period. The element may emit light.
　本発明の有機エレクトロルミネッセンス表示装置は、回路規模が小さいという特徴を有するので、単体の表示装置、あるいは、各種電子機器の表示部として利用することができる。 Since the organic electroluminescence display device of the present invention has a feature that the circuit scale is small, it can be used as a single display device or a display unit of various electronic devices.
　１０、５０…有機ＥＬ表示装置
　１１、５１…有機ＥＬパネル
　１２…表示制御回路
　１３…走査線駆動回路
　１４、５４…データ線駆動回路
　１５、５５…電源回路
　１６、５６…補正部
　１７、５７…特性データ記憶部
　２１、６１…画素回路
　２２…ブランケット電極
　３１…単位回路 DESCRIPTION OF SYMBOLS 10, 50 ... Organic EL display device 11, 51 ... Organic EL panel 12 ... Display control circuit 13 ... Scanning line drive circuit 14, 54 ... Data line drive circuit 15, 55 ... Power supply circuit 16, 56 ... Correction part 17, 57 ... Characteristic data storage unit 21, 61 ... Pixel circuit 22 ... Blanket electrode 31 ... Unit circuit

Claims (19)

  1. 　フィールドシーケンシャル方式の有機エレクトロルミネッセンス表示装置であって、
    　複数の走査線と、
    　複数のデータ線と、
    　前記走査線と前記データ線の交点に対応して配置された複数の画素回路と、
    　前記走査線を駆動する走査線駆動回路と、
    　前記データ線を駆動するデータ線駆動回路と、
    　複数の色に対応する複数の電源電圧を制御する電源回路とを備え、
    　前記画素回路は、
    　　前記複数の色に対応する複数の有機エレクトロルミネッセンス素子と、
    　　それぞれが対応する有機エレクトロルミネッセンス素子に直列に接続された複数の駆動トランジスタと、
    　　前記走査線に接続されたゲート端子と、前記データ線に接続された第１導通端子と、前記複数の駆動トランジスタのゲート端子に接続された第２導通端子とを有する書き込み制御トランジスタとを含み、
    　前記有機エレクトロルミネッセンス素子は、固定のハイレベル電源電圧が印加されたアノード端子と、対応する駆動トランジスタのドレイン端子に接続されたカソード端子とを有し、
    　前記駆動トランジスタのソース端子には、前記複数の電源電圧のうち、対応する有機エレクトロルミネッセンス素子の色に対応する電源電圧が印加され、
    　前記電源回路は、各サブフレーム期間において、サブフレーム期間の色に対応する電源電圧を前記有機エレクトロルミネッセンス素子が発光し得る第１レベルに制御し、他の電源電圧を前記有機エレクトロルミネッセンス素子が発光しない第２レベルに制御することを特徴とする、有機エレクトロルミネッセンス表示装置。     A field sequential type organic electroluminescence display device,
    A plurality of scan lines;
    Multiple data lines,
    A plurality of pixel circuits arranged corresponding to the intersections of the scanning lines and the data lines;
    A scanning line driving circuit for driving the scanning lines;
    A data line driving circuit for driving the data line;
    A power supply circuit for controlling a plurality of power supply voltages corresponding to a plurality of colors,
    The pixel circuit includes:
    A plurality of organic electroluminescence elements corresponding to the plurality of colors;
    A plurality of drive transistors each connected in series to a corresponding organic electroluminescent element;
    A write control transistor having a gate terminal connected to the scan line, a first conduction terminal connected to the data line, and a second conduction terminal connected to gate terminals of the plurality of drive transistors;
    The organic electroluminescence element has an anode terminal to which a fixed high-level power supply voltage is applied, and a cathode terminal connected to a drain terminal of a corresponding driving transistor,
    A power supply voltage corresponding to the color of the corresponding organic electroluminescence element among the plurality of power supply voltages is applied to the source terminal of the drive transistor,
    In each subframe period, the power supply circuit controls a power supply voltage corresponding to a color of the subframe period to a first level at which the organic electroluminescence element can emit light, and the organic electroluminescence element emits another power supply voltage. The organic electroluminescence display device is controlled to a second level.
  2. 　サブフレーム期間ごとに表示オフ期間が設けられ、
    　前記走査線駆動回路は、表示オフ期間ではすべての前記走査線に対して、前記書き込み制御トランジスタがオンするオン電圧を印加し、
    　前記データ線駆動回路は、表示オフ期間ではすべての前記データ線に対して、前記有機エレクトロルミネッセンス素子の発光を停止させる表示オフ電圧を印加することを特徴とする、請求項１に記載の有機エレクトロルミネッセンス表示装置。     A display off period is provided for each subframe period,
    The scanning line driving circuit applies an on-voltage for turning on the write control transistor to all the scanning lines in a display off period,
    2. The organic electro luminescence device according to claim 1, wherein the data line driving circuit applies a display off voltage for stopping light emission of the organic electroluminescence element to all the data lines during a display off period. Luminescence display device.
  3. 　入力映像信号に対して、前記有機エレクトロルミネッセンス素子の発光期間の長さの差に起因する輝度の差を補償するための補正処理を行い、補正後の映像信号を前記データ線駆動回路に対して出力する補正部をさらに備えた、請求項２に記載の有機エレクトロルミネッセンス表示装置。 A correction process is performed on the input video signal to compensate for a difference in luminance due to a difference in the length of the light emission period of the organic electroluminescence element, and the corrected video signal is sent to the data line driving circuit. The organic electroluminescence display device according to claim 2, further comprising a correction unit for outputting.
  4. 　前記有機エレクトロルミネッセンス素子の特性データを色ごとに記憶する特性データ記憶部をさらに備え、
    　前記補正部は、前記特性データ記憶部に記憶された特性データを用いて前記補正処理を行うことを特徴とする、請求項３に記載の有機エレクトロルミネッセンス表示装置。     A characteristic data storage unit for storing the characteristic data of the organic electroluminescence element for each color;
    The organic electroluminescence display device according to claim 3, wherein the correction unit performs the correction process using characteristic data stored in the characteristic data storage unit.
  5. 　前記ハイレベル電源電圧と前記第１レベルの電圧との差は前記有機エレクトロルミネッセンス素子の発光閾値電圧よりも大きく、
    　前記ハイレベル電源電圧と前記第２レベルの電圧との差は前記有機エレクトロルミネッセンス素子の発光閾値電圧よりも小さいことを特徴とする、請求項１に記載の有機エレクトロルミネッセンス表示装置。     The difference between the high level power supply voltage and the first level voltage is greater than the light emission threshold voltage of the organic electroluminescence element,
    2. The organic electroluminescence display device according to claim 1, wherein a difference between the high level power supply voltage and the second level voltage is smaller than a light emission threshold voltage of the organic electroluminescence element.
  6. 　前記第２レベルの電圧は、前記ハイレベル電源電圧であることを特徴とする、請求項５に記載の有機エレクトロルミネッセンス表示装置。 The organic electroluminescence display device according to claim 5, wherein the second level voltage is the high level power supply voltage.
  7. 　前記走査線駆動回路は、第１制御信号に従いすべての前記走査線に対して前記オン電圧を印加し、第２制御信号に従いすべての前記走査線に対して前記書き込み制御トランジスタがオフするオフ電圧を印加することを特徴とする、請求項２に記載の有機エレクトロルミネッセンス表示装置。 The scanning line driving circuit applies the ON voltage to all the scanning lines according to a first control signal, and sets the OFF voltage at which the write control transistor is turned off to all the scanning lines according to a second control signal. The organic electroluminescence display device according to claim 2, wherein the organic electroluminescence display device is applied.
  8. 　前記走査線駆動回路は、単位回路を多段接続した構成を有し、
    　前記単位回路は、
    　　前記走査線に接続された出力端子と、
    　　前記第１制御信号に従い前記出力端子に前記オン電圧を印加する第１トランジスタと、
    　　前記第２制御信号に従い前記出力端子に前記オフ電圧を印加する第２トランジスタとを含むことを特徴とする、請求項６に記載の有機エレクトロルミネッセンス表示装置。     The scanning line driving circuit has a configuration in which unit circuits are connected in multiple stages,
    The unit circuit is
    An output terminal connected to the scanning line;
    A first transistor that applies the on-voltage to the output terminal according to the first control signal;
    The organic electroluminescence display device according to claim 6, further comprising: a second transistor that applies the off voltage to the output terminal according to the second control signal.
  9. 　前記有機エレクトロルミネッセンス素子のアノード端子に前記ハイレベル電源電圧を印加するブランケット電極をさらに備えた、請求項１に記載の有機エレクトロルミネッセンス表示装置。 The organic electroluminescence display device according to claim 1, further comprising a blanket electrode that applies the high-level power supply voltage to an anode terminal of the organic electroluminescence element.
  10. 　前記電源回路は、第１～第３電源電圧を制御し、
    　前記画素回路は、
    　　前記ハイレベル電源電圧が印加されたアノード端子を有し、赤、緑、および、青にそれぞれ発光する第１～第３有機エレクトロルミネッセンス素子と、
    　　前記第１～第３有機エレクトロルミネッセンス素子のカソード端子にそれぞれ接続されたドレイン端子と、前記第１～第３電源電圧がそれぞれ印加されたソース端子と、前記書き込み制御トランジスタの他方の導通端子に接続されたゲート端子とを有する第１～第３駆動トランジスタとを含むことを特徴とする、請求項１に記載の有機エレクトロルミネッセンス表示装置。     The power supply circuit controls first to third power supply voltages;
    The pixel circuit includes:
    First to third organic electroluminescence elements each having an anode terminal to which the high-level power supply voltage is applied and emitting light in red, green, and blue, respectively;
    Connected to the drain terminal connected to the cathode terminal of each of the first to third organic electroluminescence elements, the source terminal to which the first to third power supply voltages are applied, and the other conduction terminal of the write control transistor 2. The organic electroluminescence display device according to claim 1, further comprising first to third driving transistors each having a gate terminal.
  11. 　前記走査線駆動回路は、前記画素回路と同じパネル上に形成されていることを特徴とする、請求項１に記載の有機エレクトロルミネッセンス表示装置。 The organic electroluminescence display device according to claim 1, wherein the scanning line driving circuit is formed on the same panel as the pixel circuit.
  12. 　前記駆動トランジスタは酸化物半導体を用いて構成され、
    　前記書き込み制御トランジスタ、および、前記走査線駆動回路に含まれるトランジスタは低温ポリシリコンを用いて構成されていることを特徴とする、請求項１１に記載の有機エレクトロルミネッセンス表示装置。     The driving transistor is configured using an oxide semiconductor,
    The organic electroluminescence display device according to claim 11, wherein the write control transistor and the transistor included in the scanning line driving circuit are configured using low-temperature polysilicon.
  13. 　複数の白用データ線をさらに備え、
    　前記画素回路は、
    　　白色に対応する白色有機エレクトロルミネッセンス素子と、
    　　前記白色有機エレクトロルミネッセンス素子に直列に接続された白用駆動トランジスタと、
    　　前記走査線に接続されたゲート端子と、前記白用データ線に接続された第１導通端子と、前記白用駆動トランジスタのゲート端子に接続された第２導通端子とを有する白用書き込み制御トランジスタとを含み、
    　前記白色有機エレクトロルミネッセンス素子は、前記ハイレベル電源電圧が印加されたアノード端子と、前記白用駆動トランジスタのドレイン端子に接続されたカソード端子とを有し、
    　前記白用駆動トランジスタのソース端子には、白用電源電圧が印加されていることを特徴とする、請求項１に記載の有機エレクトロルミネッセンス表示装置。     A plurality of white data lines;
    The pixel circuit includes:
    A white organic electroluminescence device corresponding to white,
    A white driving transistor connected in series to the white organic electroluminescence element;
    A white write control transistor having a gate terminal connected to the scanning line, a first conduction terminal connected to the white data line, and a second conduction terminal connected to the gate terminal of the white drive transistor. Including
    The white organic electroluminescence element has an anode terminal to which the high-level power supply voltage is applied, and a cathode terminal connected to a drain terminal of the white driving transistor,
    2. The organic electroluminescence display device according to claim 1, wherein a white power supply voltage is applied to a source terminal of the white driving transistor.
  14. 　前記電源回路は、各サブフレーム期間において、前記白用電源電圧を前記白色有機エレクトロルミネッセンス素子が発光し得るレベルに制御することを特徴とする、請求項１３に記載の有機エレクトロルミネッセンス表示装置。 14. The organic electroluminescence display device according to claim 13, wherein the power supply circuit controls the power supply voltage for white to a level at which the white organic electroluminescence element can emit light in each subframe period.
  15. 　前記白用電源電圧は、固定のローレベル電源電圧であることを特徴とする、請求項１３に記載の有機エレクトロルミネッセンス表示装置。 The organic electroluminescence display device according to claim 13, wherein the white power supply voltage is a fixed low-level power supply voltage.
  16. 　前記白色有機エレクトロルミネッセンス素子は、各サブフレーム期間において、前記複数の有機エレクトロルミネッセンス素子のいずれかが発光する期間に発光することを特徴とする、請求項１３に記載の有機エレクトロルミネッセンス表示装置。 The organic electroluminescence display device according to claim 13, wherein the white organic electroluminescence element emits light in a period in which any of the plurality of organic electroluminescence elements emits light in each subframe period.
  17. 　前記白色有機エレクトロルミネッセンス素子は、各サブフレーム期間において同じ輝度で発光することを特徴とする、請求項１６に記載の有機エレクトロルミネッセンス表示装置。 The organic electroluminescence display device according to claim 16, wherein the white organic electroluminescence element emits light with the same luminance in each subframe period.
  18. 　前記白色有機エレクトロルミネッセンス素子は、各サブフレーム期間において、前記複数の有機エレクトロルミネッセンス素子と同じ輝度の比率で発光することを特徴とする、請求項１６に記載の有機エレクトロルミネッセンス表示装置。 The organic electroluminescence display device according to claim 16, wherein the white organic electroluminescence element emits light at the same luminance ratio as the plurality of organic electroluminescence elements in each sub-frame period.
  19. 　フィールドシーケンシャル方式の有機エレクトロルミネッセンス表示装置であって、
    　複数の走査線と、
    　複数のデータ線と、
    　前記走査線と前記データ線の交点に対応して配置された複数の画素回路と、
    　前記走査線を駆動する走査線駆動回路と、
    　前記データ線を駆動するデータ線駆動回路と、
    　複数の色に対応する複数の電源電圧を制御する電源回路とを備え、
    　前記画素回路は、
    　　前記複数の色に対応する複数の有機エレクトロルミネッセンス素子と、
    　　それぞれが対応する有機エレクトロルミネッセンス素子に直列に接続された複数の駆動トランジスタと、
    　　前記走査線に接続されたゲート端子と、前記データ線に接続された第１導通端子と、前記複数の駆動トランジスタのゲート端子に接続された第２導通端子とを有する書き込み制御トランジスタとを含み、
    　前記有機エレクトロルミネッセンス素子は、固定のハイレベル電源電圧が印加されたアノード端子と、対応する駆動トランジスタのドレイン端子に接続されたカソード端子とを有し、
    　前記駆動トランジスタのソース端子には、前記複数の電源電圧のうち、対応する有機エレクトロルミネッセンス素子の色に対応する電源電圧が印加され、
    　前記電源回路は、各サブフレーム期間において、サブフレーム期間の色に対応する電源電圧を第１レベルに制御し、他の電源電圧を第２レベルに制御し、
    　前記ハイレベル電源電圧と前記第１レベルの電圧との差は前記有機エレクトロルミネッセンス素子の発光閾値電圧よりも大きく、
    　前記ハイレベル電源電圧と前記第２レベルの電圧との差は前記有機エレクトロルミネッセンス素子の発光閾値電圧よりも小さいことを特徴とする、有機エレクトロルミネッセンス表示装置。     A field sequential type organic electroluminescence display device,
    A plurality of scan lines;
    Multiple data lines,
    A plurality of pixel circuits arranged corresponding to the intersections of the scanning lines and the data lines;
    A scanning line driving circuit for driving the scanning lines;
    A data line driving circuit for driving the data line;
    A power supply circuit for controlling a plurality of power supply voltages corresponding to a plurality of colors,
    The pixel circuit includes:
    A plurality of organic electroluminescence elements corresponding to the plurality of colors;
    A plurality of drive transistors each connected in series to a corresponding organic electroluminescent element;
    A write control transistor having a gate terminal connected to the scan line, a first conduction terminal connected to the data line, and a second conduction terminal connected to gate terminals of the plurality of drive transistors;
    The organic electroluminescence element has an anode terminal to which a fixed high-level power supply voltage is applied, and a cathode terminal connected to a drain terminal of a corresponding driving transistor,
    A power supply voltage corresponding to the color of the corresponding organic electroluminescence element among the plurality of power supply voltages is applied to the source terminal of the drive transistor,
    The power supply circuit controls the power supply voltage corresponding to the color of the subframe period to the first level and the other power supply voltage to the second level in each subframe period,
    The difference between the high level power supply voltage and the first level voltage is greater than the light emission threshold voltage of the organic electroluminescence element,
    2. The organic electroluminescence display device according to claim 1, wherein a difference between the high level power supply voltage and the second level voltage is smaller than a light emission threshold voltage of the organic electroluminescence element.
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