WO2018120355A1 - 以太网芯片低延时模式下提取数据流信息的方法及装置 - Google Patents

以太网芯片低延时模式下提取数据流信息的方法及装置 Download PDF

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WO2018120355A1
WO2018120355A1 PCT/CN2017/073156 CN2017073156W WO2018120355A1 WO 2018120355 A1 WO2018120355 A1 WO 2018120355A1 CN 2017073156 W CN2017073156 W CN 2017073156W WO 2018120355 A1 WO2018120355 A1 WO 2018120355A1
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information
data stream
feature
data
stream information
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PCT/CN2017/073156
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English (en)
French (fr)
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耿磊
朱彬
贺伟
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盛科网络（苏州）有限公司
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Priority to US16/300,317 priority Critical patent/US10659394B2/en
Publication of WO2018120355A1 publication Critical patent/WO2018120355A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/35—Switches specially adapted for specific applications
    • H04L49/351—Switches specially adapted for specific applications for local area network [LAN], e.g. Ethernet switches
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/10—Flow control; Congestion control
    • H04L47/31—Flow control; Congestion control by tagging of packets, e.g. using discard eligibility [DE] bits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00—Arrangements for monitoring or testing data switching networks
    • H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00—Arrangements for monitoring or testing data switching networks
    • H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
    • H04L43/0852—Delays
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00—Arrangements for monitoring or testing data switching networks
    • H04L43/16—Threshold monitoring
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/10—Flow control; Congestion control
    • H04L47/32—Flow control; Congestion control by discarding or delaying data units, e.g. packets or frames
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/20—Support for services
    • H04L49/205—Quality of Service based
    • H04L49/206—Real Time traffic
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/22—Parsing or analysis of headers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/50—Queue scheduling

Definitions

  • the present invention relates to the field of Ethernet chip processing network data stream technology, and particularly relates to a method and device for extracting data stream information in a low-latency mode of an Ethernet chip.
  • Ethernet chips need to work in low-latency mode, that is, they do not need to wait until they receive a complete packet, and only need to receive a small amount of data to start sending the data out.
  • the prior art proposes an implementation method for extracting data stream information, as shown in FIG. 1 , which includes the following steps: an Ethernet chip receives data, and the data packet format conforms to an Ethernet packet composition protocol, and can be parsed in the data feature parsing module.
  • the feature information corresponding to the data packet; the data stream feature information to be extracted is preset in the chip, and the feature information may include multiple pieces of information; the data stream feature comparison module receives the feature information corresponding to the data and the preset The feature information is compared. If the matching is successful, it is proved that the data packet belongs to the desired data stream; the data information with the matching of the feature information is sent to the data stream information statistics module, and the module sends the data information that satisfies the requirement to the CPU.
  • the information reported to the CPU by the data stream information statistics module will lack the packet length information, which is one of the important information that the network administrator needs.
  • the main purpose of the present invention is: in the low-latency mode, the information reported to the CPU in the Ethernet chip can include the length information of the data packet, and a low-latency mode of the Ethernet chip is proposed for this purpose.
  • a method and apparatus for extracting data stream information is: in the low-latency mode, the information reported to the CPU in the Ethernet chip can include the length information of the data packet, and a low-latency mode of the Ethernet chip is proposed for this purpose.
  • the present invention discloses a method for extracting data stream information in a low-latency mode of an Ethernet chip, which specifically includes:
  • the data feature extraction module parses the feature information corresponding to the data packet, sets a start information including the feature information, and an end information including a packet length, and sends the start information and the end information to the data stream feature comparison module;
  • the data stream feature comparison module After the data stream feature comparison module receives the start information, the feature information is compared with the preset feature information. If the match is matched, the start information is sent to the data flow information statistics module, and the send flag bit is set. Effective
  • the data stream feature comparison module After the data stream feature comparison module receives the end information, it is determined whether the sending flag bit is valid. If valid, the end information is sent to the data stream information statistics module, and the sending flag bit is cleared; otherwise, Do not send and discard the end information;
  • the data flow information statistics module receives and stores the start information, and after receiving the end information, reads out the start information, and combines the feature information in the start information with the length information in the end information into one
  • the data stream information is sent to the CPU.
  • the feature information includes a destination physical address, a source physical address, and a virtual local area network number.
  • the data packet length is calculated based on a start identifier and an end identifier of the received data.
  • the sending flag bit is set to 1.
  • the method further includes:
  • the data stream information statistics module temporarily stores the data stream information, and accumulates the data packet length information received each time, and sends the temporarily stored data stream information to the time when the sum of the packet lengths is added to be greater than or equal to the threshold value.
  • the present invention also provides an apparatus for extracting data stream information in a low-latency mode of an Ethernet chip, which specifically includes:
  • a data feature extraction module configured to parse feature information corresponding to the data packet, and set a start information including the feature information and an end information including a data packet length;
  • the data stream feature comparison module is configured to match the feature information, send the start information of the successfully matched data to the data stream information statistics module, and set the sending flag bit to be valid;
  • the data stream information statistics module is configured to receive the start information and the end information, combine the feature information and the length information into one data stream information, and send the data stream information to the CPU.
  • the present invention has the advantages that the method and the device for extracting data stream information in the low-latency mode of the Ethernet chip disclosed in the present invention are for real-time extraction and designation for the Ethernet working in the low-latency mode.
  • the data stream information not only meets the requirements of low latency, but also can completely extract the data stream information and report it to the CPU, which is beneficial to network management.
  • FIG. 1 is a schematic diagram of a method for extracting data stream information in the prior art
  • FIG. 2 is a flowchart of a method for extracting data stream information in a low delay mode by an Ethernet chip according to an embodiment of the present invention
  • FIG. 3 is a schematic diagram of an apparatus for extracting data stream information in a low delay mode by an Ethernet chip according to an embodiment of the present invention.
  • FIG. 2 is a flowchart of a method for extracting data stream information in a low-latency mode according to an embodiment of the present invention. As shown in FIG. 2, the method includes the following steps:
  • Step 201 The data feature extraction module receives the data, parses the feature information, and sets the start information.
  • the data feature extraction module parses the feature information corresponding to the data packet according to the initial identifier of the received data, follows the Ethernet packet composition protocol, and sets a start information, where the information includes the parsed feature information, but does not include the data. Packet length information.
  • Step 202 Calculate the length of the received data packet, and set the end information
  • the above steps start the counting of the length of the data packet at the same time as setting the start information.
  • the complete length of the received data packet can be calculated, and an end information is set, the information including the packet length.
  • Step 203 The data stream feature comparison module receives the start information, and performs feature information matching.
  • the data stream feature comparison module After receiving the start information, the data stream feature comparison module compares the feature information corresponding to the data received by the chip with the preset feature information. If the matching succeeds, the data packet belongs to the desired data stream, and then the data packet belongs to the desired data stream.
  • the start information of the data is sent to the data flow information statistics module, and the sending flag bit is set to be valid; if the matching is unsuccessful, step 204 is directly executed.
  • the sending flag is a preset identifier, which is used to indicate whether the feature information is successfully matched.
  • the default value is an invalid value of 0.
  • the valid bit is 1.
  • Step 204 After receiving the end information, the data stream feature comparison module determines whether the sending flag bit is 0.
  • the transmission flag bit is first checked. If the flag bit is valid, step 205 is performed; otherwise, the current start information and the end information are discarded, and the process returns to step 201 to process the new data packet.
  • Step 205 Send the end information to the data stream information statistics module, and clear the send flag bit.
  • Step 206 The data flow information statistics module generates data flow information and sends the data flow information to the CPU.
  • the data stream information statistics module After receiving the start information, the data stream information statistics module temporarily stores the information. After receiving the end information, the stored start information is read out, and the data lengths in the end information are merged together into a complete data stream information. If the report request is met after processing, the data stream information is submitted to the CPU.
  • the data stream information can be temporarily stored, and the data length information received each time is accumulated.
  • the information to be sent to the CPU is reported to the CPU when the length of the received data meets certain requirements, such as the total length of data received and the threshold is greater than or equal to the threshold.
  • the technical solution of the invention works in the low delay mode for the Ethernet, and extracts the specified data stream information in real time by setting two information channels of the start information and the end information, which not only meets the requirements of low delay, but also can completely extract the data stream information. , reported to the CPU, is very conducive to network management.
  • the embodiment of the present invention provides a device for extracting data stream information in a low-latency mode, and the schematic diagram is as shown in FIG. 3, which specifically includes:
  • a data feature extraction module configured to parse feature information corresponding to the data packet, and set a start information including the feature information and an end information including a data packet length;
  • the data stream feature comparison module is configured to match the feature information, send the start information of the successfully matched data to the data stream information statistics module, and set the sending flag bit to be valid;
  • the data stream information statistics module is configured to receive the start information and the end information, combine the feature information and the length information into one data stream information, and send the data stream information to the CPU.

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  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
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Abstract

本发明公开了一种以太网芯片低延时模式下提取数据流信息的方法及装置，包括：数据特征提取模块设置一个包含所述特征信息的开始信息和一个包含数据包长度的结束信息；数据流特征比对模块对所述特征信息进行匹配，若匹配，将所述开始信息和结束信息发送给数据流信息统计模块；数据流信息统计模块将所述开始信息中的特征信息与所述结束信息中的长度信息合并成一个数据流信息并发送给CPU。采用本发明公开的方法及装置，既满足低延时的要求，又能够将数据流信息完整提取出来并上报给CPU，利于网络管理。

Description

以太网芯片低延时模式下提取数据流信息的方法及装置 技术领域
本发明涉及以太网芯片处理网络数据流技术领域，具体涉及一种以太网芯片低延时模式下提取数据流信息的方法及装置。
背景技术
随着网络往大数据、智能化方向发展，网络管理员需要更多手段来对网络行为进行监管。传统以太网芯片会将期望的数据流信息，如目的物理地址、包长等信息上报给CPU。在大数据时代，网络延时成为非常重要的指标，以太网芯片需要工作在低延时模式下，即不需要等到接收完整数据包，只需要接收少量数据就开始将数据发送出去。
现有技术提出了一种提取数据流信息的实现方法，如图1所示，包含以下步骤：以太网芯片接收数据，数据包格式遵循以太网报文组成协议，在数据特征解析模块可以解析出数据包对应的特征信息；将需要提取的数据流特征信息预先在芯片内设置好，这些特征信息可能包含多个信息；数据流特征比对模块将芯片接收到数据对应的特征信息与预设的特征信息进行比对，若匹配成功，则证明这个数据包属于期望的数据流；将特征信息匹配成功的数据信息发送给数据流信息统计模块，这个模块将满足要求的数据信息发送给CPU。
但是，使用以上方法在以太网工作在低延时模式下，数据流信息统计模块上报给CPU的信息就会缺少数据包的长度信息，而这是网络管理员需要的重要信息之一。
发明内容
针对现有技术的不足，本发明的主要目的在于：以太网芯片在低延时模式下，上报给CPU的信息可包含数据包的长度信息，为此提出了一种以太网芯片低延时模式下提取数据流信息的方法及装置。
为实现前述目的，本发明公开了一种以太网芯片低延时模式下提取数据流信息的方法，具体包括：
数据特征提取模块解析数据包对应的特征信息，设置一个包含所述特征信息的开始信息和一个包含数据包长度的结束信息，并将所述开始信息和结束信息发送至数据流特征比对模块；
数据流特征比对模块接收所述开始信息后，将所述特征信息与预设的特征信息进行比对，若匹配，将所述开始信息发送给数据流信息统计模块，并将发送标志位设置为有效；
数据流特征比对模块接收所述结束信息后，判断所述发送标志位是否有效，若有效，将所述结束信息发送给数据流信息统计模块，并将所述发送标志位清零；否则，不发送并丢弃所述结束信息；
数据流信息统计模块接收并存储所述开始信息，待接收到所述结束信息后，读出所述开始信息，将所述开始信息中的特征信息与所述结束信息中的长度信息合并成一个数据流信息并发送给CPU。
优选地，所述特征信息包括目的物理地址、源物理地址和虚拟局域网编号。
优选地，所述数据包长度根据接收数据的起始标识符和结束标识符计算而得。
优选地，所述特征信息匹配成功时，发送标志位设置为1。
优选地，所述数据流信息统计模块将数据流信息发送给CPU之前还包括：
所述数据流信息统计模块将数据流信息暂存，并对每次接收的数据包长度信息进行累加，待数据包长度之和累加至大于或等于阈值时，将暂存的数据流信息发送给CPU。
相应地，本发明还提出一种以太网芯片低延时模式下提取数据流信息的装置，具体包括：
数据特征提取模块，用于解析数据包对应的特征信息，设置一个包含所述特征信息的开始信息和一个包含数据包长度的结束信息；
数据流特征比对模块，用于匹配特征信息，将匹配成功的数据的开始信息发送给数据流信息统计模块，并将发送标志位设置为有效；
数据流信息统计模块，用于接收开始信息和结束信息，将其中的特征信息和长度信息合并成一个数据流信息，并发送给CPU。
与现有技术相比，本发明的优点在于：本发明公开的一种以太网芯片低延时模式下提取数据流信息的方法及装置，针对以太网工作在低延时模式下，实时提取指定数据流信息，既满足低延时的要求，又能够将数据流信息完整提取出来并上报给CPU，利于网络管理。
附图说明
图1是现有技术中提取数据流信息的方法示意图；
图2是本发明一实施例提供的以太网芯片在低延时模式下提取数据流信息的方法流程图；
图3是本发明一实施例提供的以太网芯片在低延时模式下提取数据流信息的装置示意图。
具体实施方式
鉴于现有技术中的不足，本案发明人经长期研究和大量实践，得以提出本发明的技术方案。如下将对该技术方案、其实施过程及原理等作进一步的解释说明。
为了使本发明的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本发明进行进一步详细说明。应当理解，此处所描述的具体实施例仅用以解释本发明，并不用于限定本发明。
图2是本发明一实施例提供的以太网芯片在低延时模式下提取数据流信息的方法流程图，如图2所示，具体包括以下步骤：
步骤201，数据特征提取模块接收数据，解析出特征信息并设置开始信息；
数据特征提取模块根据接收数据的起始标识符，遵循以太网报文组成协议，解析出数据包对应的特征信息，设置一个开始信息，该信息包含所述解析出的特征信息，但不包含数据包长度信息。
步骤202，计算接收数据包的长度，并设置结束信息；
上述步骤设置开始信息的同时开始数据包的长度计数，根据接收数据的结束标识符，可以计算出接收数据包的完整长度，设置一个结束信息，该信息包含数据包长度。
步骤203，数据流特征比对模块接收开始信息，进行特征信息匹配；
数据流特征比对模块接收到开始信息后，将芯片接收到的数据对应的特征信息，与预设的特征信息进行比对，若匹配成功，则说明该数据包属于期望的数据流，那么将数据的开始信息发送至数据流信息统计模块，同时将发送标志位设置为有效；若匹配不成功则直接执行步骤204。
发送标志位为预设标识，用于表示特征信息是否匹配成功，默认为无效值0，本实施例中有效位为1。
步骤204，数据流特征比对模块接收到结束信息后，判断发送标志位是否为0；
接收到结束信息后，首先查看发送标志位，若标志位有效，则执行步骤205；否则丢弃当前开始信息和结束信息，返回至步骤201处理新数据包。
步骤205，发送结束信息至数据流信息统计模块，并将发送标志位清零。
步骤206，数据流信息统计模块生成数据流信息并发送给CPU。
数据流信息统计模块接收到开始信息后，将信息暂存，待接收到结束信息后，将存储的开始信息读出来，再将结束信息里面的数据长度一起合并成一个完整的数据流信息，经处理后若满足上报要求，则将该数据流信息提交给CPU。
一般在实际使用时为了减轻CPU的负担，无需将每个数据流信息都发送给CPU，可以将数据流信息暂时存储起来，并将每次收到的数据长度信息进行累加。待长度信息满足一定要求，如接收的总的数据长度和大于或等于阈值时，再将信息上报给CPU。
本发明技术方案针对以太网工作在低延时模式下，通过设置开始信息、结束信息两个信息通道实时提取指定数据流信息，既满足低延时的要求，又能够将数据流信息完整提取出来，上报给CPU，极为利于网络管理。
相应地，本发明实施例提供了一种以太网芯片在低延时模式下提取数据流信息的装置，其示意图如图3所示，具体包括：
数据特征提取模块，用于解析数据包对应的特征信息，设置一个包含所述特征信息的开始信息和一个包含数据包长度的结束信息；
数据流特征比对模块，用于匹配特征信息，将匹配成功的数据的开始信息发送给数据流信息统计模块，并将发送标志位设置为有效；
数据流信息统计模块，用于接收开始信息和结束信息，将其中的特征信息和长度信息合并成一个数据流信息，并发送给CPU。
由于所述装置的具体工作过程采用了本发明所提供的低延时模式下提取数据流信息的方法，因而在此不复赘述。
应当理解，上述实施例仅为说明本发明的技术构思及特点，其目的在于让熟悉此项技术的人士能够了解本发明的内容并据以实施，并不能以此限制本发明的保护范围。凡根据本发明精神实质所作的等效变化或修饰，都应涵盖在本发明的保护范围之内。

Claims (6)

  1. 一种以太网芯片低延时模式下提取数据流信息的方法，其特征在于包括：
    数据特征提取模块解析数据包对应的特征信息，设置一个包含所述特征信息的开始信息和一个包含数据包长度的结束信息，并将所述开始信息和结束信息发送至数据流特征比对模块；
    数据流特征比对模块接收所述开始信息后，将所述特征信息与预设的特征信息进行比对，若匹配，将所述开始信息发送给数据流信息统计模块，并将发送标志位设置为有效；
    数据流特征比对模块接收所述结束信息后，判断所述发送标志位是否有效，若有效，将所述结束信息发送给数据流信息统计模块，并将所述发送标志位清零；否则，不发送并丢弃所述结束信息；
    数据流信息统计模块接收并存储所述开始信息，待接收到所述结束信息后，读出所述开始信息，将所述开始信息中的特征信息与所述结束信息中的长度信息合并成一个数据流信息并发送给CPU。
  2. 根据权利要求1所述的以太网芯片低延时模式下提取数据流信息的方法，其特征在于：所述特征信息包括目的物理地址、源物理地址和虚拟局域网编号。
  3. 根据权利要求1所述的以太网芯片低延时模式下提取数据流信息的方法，其特征在于：所述数据包长度根据接收数据的起始标识符和结束标识符计算而得。
  4. 根据权利要求1所述的以太网芯片低延时模式下提取数据流信息的方法，其特征在于：所述特征信息匹配成功时，发送标志位设置为1。
  5. 根据权利要求1所述的以太网芯片低延时模式下提取数据流信息的方法，其特征在于，所述数据流信息统计模块将数据流信息发送给CPU之前还包括：
    所述数据流信息统计模块将数据流信息暂存，并对每次接收的数据包长度信息进行累加，待数据包长度之和累加至大于或等于阈值时，将暂存的数据流信息发送给CPU。
  6. 一种以太网芯片低延时模式下提取数据流信息的装置，其特征在于所述装置包括：
    数据特征提取模块，用于解析数据包对应的特征信息，设置一个包含所述特征信息的开始信息和一个包含数据包长度的结束信息；
    数据流特征比对模块，用于匹配特征信息，将匹配成功的数据的开始信息发送给数据流信息统计模块，并将发送标志位设置为有效；
    数据流信息统计模块，用于接收开始信息和结束信息，将其中的特征信息和长度信息合并成一个数据流信息，并发送给CPU。
PCT/CN2017/073156 2016-12-27 2017-02-09 以太网芯片低延时模式下提取数据流信息的方法及装置 WO2018120355A1 (zh)

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