WO2018086313A1 - 一种函数地址的获取方法以及电子设备 - Google Patents

一种函数地址的获取方法以及电子设备 Download PDF

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Publication number
WO2018086313A1
WO2018086313A1 PCT/CN2017/081547 CN2017081547W WO2018086313A1 WO 2018086313 A1 WO2018086313 A1 WO 2018086313A1 CN 2017081547 W CN2017081547 W CN 2017081547W WO 2018086313 A1 WO2018086313 A1 WO 2018086313A1
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Prior art keywords
target
jump table
function
slot
address
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PCT/CN2017/081547
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English (en)
French (fr)
Inventor
吉辛⋅维克多
周智
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华为技术有限公司
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Publication of WO2018086313A1 publication Critical patent/WO2018086313A1/zh

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • G06F12/1009Address translation using page tables, e.g. page table structures
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7807System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
    • G06F15/7821Tightly coupled to memory, e.g. computational memory, smart memory, processor in memory

Definitions

  • the present invention relates to the field of computers, and in particular, to a method for acquiring a function address and an electronic device.
  • Modern chips mostly use programmable solutions. In the process of programming, data is analyzed and forwarded by firmware on the chip. This programmable network chip solution requires running firmware code with smaller memory and requires very high performance.
  • a function jump scheme of the function jump table may be used, and a function pointer of the program may be provided with a function pointer capable of indexing the function, thereby implementing a function jump,
  • each pointer in the function jump table needs to occupy 4 bytes of memory. If a function jump table containing 256 function pointers is used, it takes 1024 bytes of memory, but the embedded software in the chip can generally be used. The memory is small, and the memory available for storing function jump tables is generally only tens to hundreds of bytes.
  • the embodiment of the invention provides a method for acquiring a function address and an electronic device, thereby reducing the memory consumption in the function jump process, effectively guaranteeing the high performance requirement of the chip firmware, and effectively solving the balanced chip firmware in the reduced manner. Conflicts between high performance requirements and small running memory.
  • a first aspect of the embodiments of the present invention provides a method for obtaining a function address, including:
  • Step A Obtain a target slot number of the target function.
  • the target slot number of the target function is determined according to the created jump table and the jump table segment.
  • the jump table shown in this embodiment is used to index the jump table segment.
  • the jump table segment includes a plurality of functions, and the jump table segment shown in this embodiment is used to serve the multiple functions, and more specifically, the multiple functions are integrated to form the jump. Table segment.
  • the target function is any one of the plurality of functions
  • the jump table segment further includes a plurality of slots and a slot number corresponding to any one of the plurality of slots.
  • the target slot number is a slot number corresponding to the target slot, where the target slot is a slot where the first address of the target function is located.
  • Step B Obtain an target function address according to the target slot number.
  • the target slot number of the target function can be obtained in step A.
  • the target function address can be obtained according to the obtained target slot number.
  • the target function address is a first address in which the target function is located in the jump table segment.
  • the target function address shown in this embodiment is the physical address of the objective function.
  • the created jump table can set the jump table segment with the target function according to the target slot number, thereby reducing the memory occupied by the jump table segment, thereby making the embodiment
  • the method shown in the figure can effectively reduce the overhead occupied by the memory when the function address is quickly obtained, thereby effectively improving the performance and operating efficiency of the system.
  • the method further includes the steps A01 to A02, specifically, the steps shown in this embodiment.
  • A01 to step A02 are used to perform a process of creating a jump table segment.
  • Step A01 Create the jump table segment.
  • the jump table segment is created in the program segment of the system, so that the jump table segment includes M slots of the same size.
  • the specific value of the M is not limited, as long as it is greater than a certain threshold.
  • a positive integer is fine.
  • the electronic device shown in this embodiment is capable of receiving a configuration parameter input by a user, and the configuration parameter may include a preset bit value, where the preset bit value is a slot input by the user to the electronic device by using the configuration parameter.
  • the size of the slot table may be divided according to the size of the slot that has been input by the user, so that the size of each slot that is divided is the preset bit that the user has input. value.
  • the preset bit value is greater than or equal to an alignment granularity of any one of the plurality of functions.
  • step A02 each slot is labeled.
  • the specific method for labeling the slot is not limited in this embodiment, as long as any slot of the M slots included in the jump table segment has a slot number, and any two slot numbers The slots are not the same, so that the slot number corresponding to any one of the multiple slots of the same size included in the jump table segment can be obtained.
  • the jump table segment can be divided, and the size of the divided slot is set by the user, and the user can set according to the system applied by the method shown in this embodiment.
  • the size of the different slots is determined, so that the method shown in this embodiment can be applied to various systems with high performance, and the jump table segment is divided as shown in this embodiment, so that the first address of the target function can be determined.
  • the target slot is located, and the slot number of the target slot is obtained. It can be seen that the method shown in this embodiment can accurately and quickly locate the target function, thereby improving the target address acquisition process of the target function. Efficiency and accuracy.
  • Step A11 in the second implementation manner of the first aspect of the embodiments of the present invention, before the step A, Step A11, specifically, step A11 shown in this embodiment is used to perform a process of creating a jump table.
  • Step A11 Create the jump table according to the jump table segment.
  • the jump table shown in this embodiment includes a plurality of sub-tables and a plurality of parameters.
  • the target parameter corresponding to the target function is included in the plurality of parameters shown in this embodiment, and the target child entry corresponding to the target parameter may be determined, and the target function is set in the target child entry. Corresponding to the target slot number.
  • the method shown in this embodiment can create a jump table according to the created jump table segment, so that the jump table implements indexing of the jump table segment by using the slot number in the jump table.
  • the slot number shown in this embodiment is hop-hopping.
  • the technical solution of indexing a function by using a function pointer is compared with the prior art.
  • the method shown in this embodiment can save the memory occupied by the jump table when the function address is quickly obtained. Effectively reduce the overhead of memory.
  • the step A specifically includes:
  • Step A21 Read the first address of the jump table.
  • the jump table in the process of performing the acquisition function address, the jump table may be read, so that the first address of the jump table is read.
  • Step A22 Obtain a target number of bits of the target sub-event.
  • the target sub-table item shown in this embodiment is a sub-table corresponding to the target parameter, and the target parameter is any parameter corresponding to the function.
  • the target sub-entry item shown in this embodiment is a sub-entry item for setting a target slot number.
  • the target number of bits is the number of bits required to create the target sub-table.
  • Step A23 Calculate the target slot number.
  • the target slot number is calculated according to the first formula, where the first formula is:
  • the target slot number the first address of the jump table + the target parameter * the target number of bits.
  • the target slot number can be obtained, and the target is obtained.
  • the slot number can be indexed to the target function located in the jump table entry, thereby enabling acquisition of the target address of the target function.
  • the step A22 specifically includes the step A221;
  • Step A221 Calculate the target number of bits according to the second formula.
  • Q is the target number of bits
  • roundup is an up-rounding function
  • N is the number of functions included in the jump table segment
  • handler-size i is the size of the objective function
  • the objective function is N
  • the i-th function of the functions, i is a positive integer less than or equal to N
  • size-of-slot is the size of the slot.
  • the target number of bits is confirmed in combination with a specific application scenario.
  • the target bit number can only be valued in 8, 16, and 32.
  • the target number of bits calculated by the second formula takes a value of 8, and if the target number of bits calculated by the second formula is greater than 8, If the value is less than 16, the target number of bits is 16, and if the target number of bits calculated by the second formula is greater than 16 bits, the target number of bits is 32.
  • the specific number of the target bit numbers required is not limited.
  • the size of the memory used by the jump table segment is affected by the size-of-slot, that is, the larger the size-of-slot is, between the two adjacent functions set in the jump table segment.
  • the step B specifically includes:
  • Step B11 Read the first address of the jump table segment.
  • the jump table segment needs to be read, so that the first address of the jump table segment is read.
  • Step B12 Calculate the target function address.
  • the target function address is calculated according to a third formula, wherein the third formula is:
  • the target function address the first address of the jump table segment + the target slot number * the size of the slot.
  • the address of the objective function shown in this embodiment refers to the first address where the target function is located in the jump table segment.
  • a second aspect of the embodiments of the present invention provides an electronic device, including:
  • the first obtaining unit specifically, the first obtaining unit shown in this embodiment is used to perform step A shown in the first aspect of the embodiment of the present invention.
  • step A For the specific implementation process of step A, please refer to the first embodiment of the present invention.
  • the aspects are not described in detail in the second aspect of the embodiment;
  • the first obtaining unit is configured to obtain a target slot number of the target function according to the jump table, where the jump table is used to index the jump table segment, and the jump table segment includes multiple functions,
  • the target function is any one of the plurality of functions
  • the jump table segment further includes a plurality of slots and a slot number corresponding to any one of the plurality of slots, the target The slot number is a slot number corresponding to the target slot, where the target slot is a slot where the first address of the target function is located;
  • the second obtaining unit specifically, the second obtaining unit shown in this embodiment is used to perform the step B shown in the first aspect of the embodiment of the present invention.
  • the specific implementation process of the step B please refer to the first embodiment of the present invention.
  • the aspects are not described in detail in the second aspect of the embodiment;
  • the second acquiring unit is configured to obtain an target function address according to the target slot number, where the target function address is a first address in which the target function is located in the jump table segment.
  • the electronic device further includes:
  • the first creation unit specifically, the first creation unit shown in this embodiment is used to perform the step A01 shown in the first implementation manner of the first aspect of the embodiment of the present invention, and the specific execution process of the step A01 is detailed in the present invention.
  • Example The first implementation manner of the first aspect is not described in detail in the second aspect of the embodiment;
  • the first creating unit is configured to create the jump table segment, where the jump table segment includes a plurality of slots of equal size, and the size of each slot is a preset bit value.
  • the preset bit value is greater than or equal to an alignment granularity of any one of the plurality of functions;
  • the third obtaining unit specifically, the third obtaining unit shown in this embodiment is used to perform step A02 shown in the first implementation manner of the first aspect of the embodiment of the present invention, and the specific execution process of step A02 is detailed in the present invention.
  • the first implementation of the first aspect of the embodiment is not described in detail in the second aspect of the embodiment;
  • the third acquiring unit is configured to label each slot to obtain any slot corresponding to the multiple slots of the same size included in the jump table segment. Slot number.
  • the electronic device further includes:
  • the second creation unit specifically, the second creation unit shown in this embodiment is used to perform the step A11 shown in the second implementation manner of the first aspect of the embodiment of the present invention.
  • the specific implementation process of the step A11 is detailed in the present invention.
  • the first aspect of the embodiment is shown in the second implementation manner, and is not specifically described in the second aspect of the embodiment;
  • the second creating unit is configured to create the jump table according to the jump table segment, where the jump table includes multiple sub-list items and multiple parameters, and the plurality of parameters include The target parameter corresponding to the target function, and the target sub-entry corresponding to the target parameter is used to set the target slot number.
  • the first implementation unit of the first aspect of the embodiment of the present invention includes:
  • the first reading module specifically, the first reading module shown in this embodiment is used to perform the step A21 shown in the third implementation manner of the first aspect of the embodiment of the present invention.
  • the third implementation manner of the first aspect of the embodiment of the present invention is specifically described in the second aspect of the embodiment;
  • the first reading module is configured to read the first address of the jump table.
  • the obtaining module specifically, the obtaining module shown in this embodiment is used to perform the step A22 shown in the third implementation manner of the first aspect of the embodiment of the present invention.
  • the specific implementation process of the step A22 please refer to the embodiment of the present invention.
  • the third implementation manner is not described in detail in the second aspect of the embodiment;
  • the number of target bits used to acquire the target sub-list is the number of bits required to create the target sub-table
  • the first calculation module specifically, the first calculation module shown in this embodiment is used to perform the step A23 shown in the third implementation manner of the first aspect of the embodiment of the present invention, and the specific execution process of the step A23 is detailed in the present invention.
  • the third implementation manner of the first aspect of the embodiment is not described in detail in the second aspect of the embodiment;
  • the first calculating module is configured to calculate the target slot number according to the first formula, where the first formula is:
  • the target slot number the first address of the jump table + the target parameter * the target number of bits.
  • the first obtaining module may further perform the fourth implementation manner of the first aspect of the embodiment of the present invention.
  • the specific implementation process of step A221 and step A221 is shown in the fourth implementation manner of the first aspect of the embodiment of the present invention, and is not described in the second aspect of the embodiment.
  • the first obtaining module is further configured to calculate the target bit number according to the second formula, where The second formula is:
  • Q is the target number of bits
  • roundup is an up-rounding function
  • N is the number of functions included in the jump table segment
  • handler-size i is the size of the objective function
  • the objective function is N
  • the i-th function of the functions, i is a positive integer less than or equal to N
  • size-of-slot is the size of the slot.
  • the second obtaining unit includes:
  • the second reading module specifically, the second reading module shown in this embodiment is used to perform the step B11 shown in the fourth implementation manner of the first aspect of the embodiment of the present invention.
  • the fourth implementation manner of the first aspect of the embodiment of the present invention is specifically described in the second aspect of the embodiment;
  • the second reading module is configured to read a first address of the jump table segment
  • the second calculation module specifically, the second calculation module shown in this embodiment is used to perform the step B12 shown in the fourth implementation manner of the first aspect of the embodiment of the present invention, and the specific execution process of the step B12 is detailed in the present invention.
  • the fourth implementation manner of the first aspect of the embodiment is not described in detail in the second aspect of the embodiment;
  • the second calculating module is configured to calculate the target function address according to a third formula, wherein the third formula is:
  • the target function address the first address of the jump table segment + the target slot number * the size of the slot.
  • the target slot number of the target function can be obtained according to the jump table, where the target function is any function included in the jump table segment, and the jump table is used to index the jump table segment, the target slot
  • the slot number is a slot number corresponding to the target slot
  • the target slot is a slot in which the first address of the target function is located
  • the target function address is obtained according to the target slot number.
  • the created jump table is configured by the target slot number index to set the jump table segment of the target function.
  • the method for indexing the function is implemented by the function pointer, and the method shown in this embodiment can In the case of quickly obtaining the function address, the memory occupied by the jump table is saved, which effectively reduces the overhead occupied by the memory.
  • FIG. 1 is a schematic structural view of an embodiment of an electronic device provided by the present invention.
  • FIG. 2 is a flow chart of steps of an embodiment of a method for acquiring a function address according to the present invention
  • FIG. 3 is a schematic structural diagram of an embodiment of a jump table segment provided by the present invention.
  • FIG. 4 is a schematic structural diagram of another embodiment of a jump table segment provided by the present invention.
  • FIG. 5 is a schematic structural diagram of an embodiment of a jump table provided by the present invention.
  • FIG. 6 is a schematic structural diagram of an embodiment of an electronic device according to the present invention.
  • FIG. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.
  • the electronic device 100 may have a large difference due to different configurations or performances, and may include one or more central processing units (CPUs) 122. (eg, one or more processors) and memory 132, one or more storage media 130 that store application 142 or data 144 (eg, one or one storage device in Shanghai).
  • the memory 132 and the storage medium 130 may be short-term storage or persistent storage.
  • the program stored on storage medium 130 may include one or more modules (not shown), each of which may include a series of instruction operations in the electronic device.
  • central processor 122 may be arranged to communicate with storage medium 130 to perform a series of instruction operations in storage medium 130 on electronic device 100.
  • the electronic device 100 may also include one or more power sources 126, one or more wired or wireless network interfaces 150, one or more input and output interfaces 158, and/or one or more operating systems 141, such as Windows ServerTM, Mac OS XTM, UnixTM, LinuxTM, FreeBSDTM and more.
  • operating systems 141 such as Windows ServerTM, Mac OS XTM, UnixTM, LinuxTM, FreeBSDTM and more.
  • the steps performed by the electronic device in the above embodiments may be based on the electronic device structure shown in FIG.
  • Step 201 Create a jump table segment.
  • the jump table segment is created on the memory of the electronic device.
  • the jump table segment described in this embodiment is used to service N functions. Specifically, the jump table segment shown in this embodiment is used to set N functions.
  • the jump table segment is an example of N functions in the program segment.
  • a jump table segment with a signature name of "text” can be set on the memory, and N functions can be placed in a jump table segment signed with "text”.
  • This embodiment does not limit the specific name of the jump table segment in the program segment.
  • the jump table segment needs to be divided, so that the divided jump table 300 includes M slots of equal size.
  • the electronic device shown in this embodiment is capable of receiving a configuration parameter input by a user, where the configuration parameter may include a preset bit value, where the preset bit value is input by the user to the electronic device by using the configuration parameter.
  • the size of each slot the electronic device can divide the jump table segment according to the size of the slot that has been input by the user, so that the size of each slot that is divided is the user-entered Preset bit value.
  • this embodiment does not limit the size of M.
  • the M slots that are divided in this embodiment are continuous, that is, any two adjacent ones of the M slots are connected to each other.
  • the preset bit value of each slot shown in this embodiment is greater than or equal to the alignment granularity of any one of the N functions.
  • each of the slots is numbered to obtain a slot number corresponding to any one of the plurality of slots of the same size included in the jump table segment.
  • slot number 0 corresponding to the first slot 301
  • slot number 1 corresponding to the second slot 302
  • slot number M corresponding to the Nth slot 303.
  • the slots included in the jump table segment may be consecutively labeled.
  • the slots included in the jump table segment may be discontinuous.
  • the label of the slot number can be established by the one-to-one correspondence between the slot number and the slot.
  • the slot number corresponding to any one of the N slots of the same size included in the jump table segment can be obtained.
  • the embodiment is described in the following.
  • the specific number of functions that the jump table segment can serve is not limited.
  • the first address of the function 1 is located in the slot of the slot number 0, and the function 1 occupies three slots, that is, the slot number of slot 0, the slot of slot number 1, and the slot.
  • the slot of slot 2 is located in the slot of the slot number 0, and the function 1 occupies three slots, that is, the slot number of slot 0, the slot of slot number 1, and the slot.
  • the first address of the function 2 is located in the slot of the slot number 3, and the function 2 occupies one slot, that is, the slot number of the slot number 3.
  • the first address of the function 3 is located in the slot of the slot number 4, and the function 1 occupies 4 slots, that is, the slot number of slot 4, the slot of slot number 5, and the slot of slot number 6. Bit and slot number of slot number 7.
  • the first address of the function 4 is located in the slot number of the slot number 8, and the function 4 occupies one slot, that is, the slot number of the slot number 8.
  • the slot occupied by function 5 in this example is not limited.
  • the memory is equal to the product of the number of slots allocated by the jump table segment and the size of each slot.
  • Step 202 Create a jump table according to the jump table segment.
  • the jump table shown in this embodiment is used to index the jump table segment.
  • the jump table 500 includes a plurality of sub-tables and a plurality of parameters.
  • the jump table 500 further includes an area 501 for configuring the parameter, and a plurality of parameters may be configured in the area 501, and a correspondence between the parameter and the child entry is established.
  • the specific configuration manner of the multiple parameters is not limited in this embodiment, that is, the multiple parameters may be configured continuously or non-continuously.
  • the parameters configured in this embodiment can be continuously configured from the value 0 until the value X is configured, and the parameter 1 corresponds to the first sub-item, and the parameter 2 Corresponding to the second sub-entry, it can be seen that after the configuration is completed, the jump table includes a total of X+1 sub-lists.
  • one parameter may be subtracted, so that the parameter is continuously configured from 0.
  • the multiple parameters shown in this embodiment also establish a correspondence relationship with a function included in the jump table segment.
  • multiple parameters may correspond to the function one-to-one, optionally, multiple parameters.
  • a part of the function may be in one-to-one correspondence with the function, and the embodiment is not limited in detail.
  • the jump table segment includes five functions as an example.
  • the parameter 1 may correspond to the function 1
  • the parameter 3 can correspond to function 2
  • parameter 5 can correspond to function 3
  • parameter 7 can correspond to function 4
  • parameter 8 can correspond to function 5.
  • the entry shown in this embodiment is used to set the slot number of the slot where the first address of the function corresponding to the entry is located.
  • the target function is set by using the jump table segment as an example, and the target function shown in this embodiment is any one of a plurality of functions included in the jump table segment.
  • the plurality of parameters included in the jump table shown in this embodiment include a target parameter corresponding to the target function, and the child entry corresponding to the target parameter is a target child entry, and the target child entry is The target slot number of the target function is set in the middle.
  • the objective function is the function 1 shown in FIG. 4, the first address of the function 1 is located in the slot number of the target slot number 0, and the function corresponding to the function 1 is the target parameter.
  • the target slot number 0 of function 1 is set in the target sub-item corresponding to the target parameter 1.
  • the objective function is the function 2 shown in FIG. 4, the first address of the function 2 is located in the slot number 3, and the parameter corresponding to the function 2 is the target parameter 3, and the target corresponding to the target parameter 3 Set the target slot number 3 of function 2 in the entry.
  • the sub-item corresponding to the parameter 2 is invalid.
  • the objective function is the function 3 shown in FIG. 4, the first address of the function 3 is located in the slot number 4, and the parameter corresponding to the function 3 is the target parameter 5, and the target corresponding to the target parameter 5 Set the target slot number 4 of function 3 in the entry.
  • the objective function is the function 4 shown in FIG. 4, the first address of the function 4 is located in the slot number 8 and the parameter corresponding to the function 4 is the target parameter 7, and the target corresponding to the target parameter 7 Set the target slot number 8 of function 4 in the entry.
  • the sub-table corresponding to the valid parameter in the parameter set by the jump table can be configured with the slot number corresponding to the function, and the valid parameter means that the valid parameter is established.
  • the parameter corresponding to the function can be configured with the slot number corresponding to the function, and the valid parameter means that the valid parameter is established.
  • step 201 and the step 202 are performed, the following describes the method for obtaining the target slot number of the target function according to the embodiment, and the step 201 to the step shown in this embodiment are clear.
  • 202 is an optional step. If the jump table and the jump table segment are configured to be completed during the process of acquiring the function address shown in this embodiment, step 201 to step 202 need not be performed.
  • Step 203 Read the first address of the jump table.
  • the jump table in the process of performing the acquisition function address, the jump table may be read, so that the first address of the jump table is read.
  • Step 204 Obtain a target number of bits of the target sub-event.
  • the target sub-table item shown in this embodiment is a sub-table corresponding to the target parameter, and the target parameter is any parameter corresponding to the function.
  • the target sub-entry item shown in this embodiment is a sub-entry item for setting a target slot number.
  • the target number of bits is the number of bits required to create the target sub-table.
  • the target bit number is calculated according to the second formula.
  • the second formula is:
  • Q is the target number of bits
  • roundup is an up-rounding function
  • N is the number of functions included in the jump table segment
  • handler-size i is the size of the objective function
  • the objective function is N
  • the i-th function of the functions, i is a positive integer less than or equal to N
  • size-of-slot is the size of the slot.
  • the target number of bits is confirmed in combination with a specific application scenario.
  • the target bit number can only be valued in 8, 16, and 32.
  • the target number of bits calculated by the second formula takes a value of 8, and if the target number of bits calculated by the second formula is greater than 8, If the value is less than 16, the target number of bits is 16, and if the target number of bits calculated by the second formula is greater than 16 bits, the target number of bits is 32.
  • the specific number of the target bit numbers required is not limited.
  • the size of the memory used by the jump table segment is affected by the size-of-slot, that is, the larger the size-of-slot is, between the two adjacent functions set in the jump table segment.
  • Step 205 Calculate the target slot number.
  • the target slot number is calculated according to the first formula, where the first formula is:
  • the target slot number the first address of the jump table + the target parameter * the target number of bits.
  • the target parameter shown in this embodiment is a parameter corresponding to the target function. Taking the example shown in FIG. 5, when calculating the target slot number, the target parameters 1, 3, 5, and 7 can be substituted into the first formula, respectively.
  • the target slot number set in the target sub-item corresponding to the target parameter 1 and the target slot number set in the target sub-entry corresponding to the target parameter 3 are respectively calculated when the target parameter is 1,
  • the target slot number where the first address of the target function is located can be calculated through steps 203 to 205, thereby realizing rapid positioning of the objective function.
  • the following describes how to obtain the specific address of the target function in combination with the steps 206 to 207. It is to be clarified that the physical address of the target function obtained by the step 206 to the step 207 is the target. The absolute address of the function.
  • Step 206 Read the first address of the jump table segment.
  • the jump table segment needs to be read, so that the first address of the jump table segment is read.
  • Step 207 Calculate the target function address.
  • the target function address is calculated according to a third formula, wherein the third formula is:
  • the target function address the first address of the jump table segment + the target slot number * the size of the slot.
  • the target slot number is the slot number calculated in step 205, and the size of the slot is preset in the process of configuring the jump table segment.
  • the address of the objective function can be calculated by the step 207 shown in this embodiment.
  • the address of the objective function shown in this embodiment refers to the first address where the target function is located in the jump table segment.
  • jump_table[idx_Y] (handler_Y-jump_table_section_address)>>LOG_2(size-of-slot);
  • the jump table created by the embodiment of the present invention implements indexing of the jump table segment by using the slot number set by the sub-list entry, so that the size of the jump table is only the size of the jump table of the traditional function pointer array method. One quarter. And by analyzing the assembly result, it can be found that the jump table provided by this embodiment only has two more assembly instructions than the traditional function pointer array method, and has almost no effect on performance, but the method shown in this embodiment can quickly acquire the function. In the case of an address, the memory occupied by the jump table is saved, which effectively reduces the overhead occupied by the memory.
  • the embodiment of the present invention further provides an electronic device capable of implementing the above method.
  • FIG. 6 shows the specific structure of the electronic device from the perspective of a functional module.
  • the electronic device includes:
  • a first creating unit 601 configured to create the jump table segment, where the jump table segment includes a plurality of slots of equal size, and the size of each slot is a preset bit value, and the preset bit The value is greater than or equal to the alignment granularity of any of the plurality of functions;
  • the third obtaining unit 602 is configured to label each slot to obtain a slot number corresponding to any one of the plurality of slots of the same size included in the jump table segment.
  • a second creating unit 603 configured to create the jump table according to the jump table segment, where the jump table includes multiple And a plurality of parameters, where the plurality of parameters include a target parameter corresponding to the target function, and the target sub-entry corresponding to the target parameter is used to set the target slot number.
  • a first obtaining unit 604 configured to acquire a target slot number of the target function according to the jump table, where the jump table is used to index a jump table segment, the jump table segment includes a plurality of functions, and the target function is And the one of the plurality of functions, the jump table segment further includes a plurality of slots and a slot number corresponding to any one of the multiple slots, where the target slot number is a slot number corresponding to the target slot, where the target slot is a slot where the first address of the target function is located;
  • the first obtaining unit 604 includes:
  • the first reading module 6041 is configured to read a first address of the jump table
  • the obtaining module 6042 is configured to acquire a target number of bits of the target sub-list, where the target number of bits is a number of bits required to create the target sub-list;
  • the first calculating module 6043 is configured to calculate the target slot number according to the first formula, where the first formula is:
  • the target slot number the first address of the jump table + the target parameter * the target number of bits.
  • the first obtaining module is further configured to calculate the target number of bits according to the second formula, where the second formula is:
  • Q is the target number of bits
  • roundup is an up-rounding function
  • N is the number of functions included in the jump table segment
  • handler-size i is the size of the objective function
  • the objective function is N
  • the i-th function of the functions, i is a positive integer less than or equal to N
  • size-of-slot is the size of the slot.
  • the second obtaining unit 605 is configured to obtain an target function address according to the target slot number, where the target function address is a first address in which the target function is located in the jump table segment.
  • the second obtaining unit 605 includes:
  • the second reading module 6051 is configured to read a first address of the jump table segment
  • the second calculating module 6052 is configured to calculate the target function address according to the third formula, wherein the third formula is:
  • the target function address the first address of the jump table segment + the target slot number * the size of the slot.
  • the disclosed system, apparatus, and method may be implemented in other manners.
  • the device embodiments described above are merely illustrative.
  • the division of the unit is only a logical function division.
  • there may be another division manner for example, multiple units or components may be combined or Can be integrated into another system, or some features can be ignored or not executed.
  • Another The coupling or direct coupling or communication connection between the points shown or discussed may be an indirect coupling or communication connection through some interface, device or unit, and may be in electrical, mechanical or other form.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of the embodiment.
  • each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.
  • the above integrated unit can be implemented in the form of hardware or in the form of a software functional unit.
  • the integrated unit if implemented in the form of a software functional unit and sold or used as a standalone product, may be stored in a computer readable storage medium.
  • the technical solution of the present invention which is essential or contributes to the prior art, or all or part of the technical solution, may be embodied in the form of a software product stored in a storage medium.
  • a number of instructions are included to cause a computer device (which may be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present invention.
  • the foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, and the like. .

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Abstract

一种函数地址的获取方法以及电子设备,所述方法包括根据跳转表获取目标函数的目标槽位号,所述跳转表段包括多个函数,所述目标函数为所述多个函数中的任一函数,所述跳转表段还包括多个槽位以及与所述多个槽位中的任一槽位对应的槽位号,所述目标槽位号为与目标槽位对应的槽位号,所述目标槽位为所述目标函数的首地址所位于的槽位,根据所述目标槽位号获取目标函数地址,所述目标函数地址为所述目标函数位于所述跳转表段中的首地址。该方法能够在快速获取函数地址的情况下,节省跳转表所占用的内存,有效的减少了内存所占用的开销。

Description

一种函数地址的获取方法以及电子设备
本申请要求于2016年11月10日提交中国专利局、申请号为201610991507.7、发明名称为“一种函数地址的获取方法以及电子设备”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本发明涉及计算机领域,尤其涉及的是一种函数地址的获取方法以及电子设备。
背景技术
现代芯片大多采用可编程方案,在编程的过程中,需要通过芯片上的固件进行数据的分析和转发。这种可编程的网络芯片方案,要求使用较小的内存运行固件代码,并且要求非常高的性能。
为实现芯片上数据的分析和转发,则可使用函数跳转表的函数跳转方案,该方案的函数跳转表中设置有能够对函数进行索引的函数指针,从而实现函数的跳转,该方案中,函数跳转表中每个指针需要占用4个字节内存,如果使用包含256个函数指针的函数跳转表则需要占用1024个字节内存,然而芯片中的嵌入式软件一般能够使用的内存较小,可用于存储函数跳转表的内存一般只有几十个到几百个字节。
可见,现有技术在实现函数跳转的过程中,占用了较大的内存,从而使得内存的开销大,从而无法保障芯片固件的高性能要求。
发明内容
本发明实施例提供了一种函数地址的获取方法以及电子设备,从而降低了函数跳转过程中内存的消耗,有效的保障了芯片固件的高性能要求,能够有效的解决在降低的平衡芯片固件高性能要求和较小的运行内存之间的冲突问题。
本发明实施例的第一方面提供了一种函数地址的获取方法,包括:
步骤A、获取目标函数的目标槽位号。
具体的,根据已创建的跳转表和跳转表段确定目标函数的目标槽位号。
本实施例所示的跳转表用于索引所述跳转表段。
所述跳转表段包括多个函数,本实施例所示的跳转表段用于对所述多个函数进行服务,更具体的,将所述多个函数整合在一起形成所述跳转表段。
所述目标函数为所述多个函数中的任一函数,所述跳转表段还包括多个槽位以及与所述多个槽位中的任一槽位对应的槽位号。
所述目标槽位号为与目标槽位对应的槽位号,所述目标槽位为所述目标函数的首地址所位于的槽位。
步骤B、根据所述目标槽位号获取目标函数地址。
在步骤A中可获取到目标函数的目标槽位号,本步骤中,能够根据已获取到的所述目标槽位号获取目标函数地址。
具体的,所述目标函数地址为所述目标函数位于所述跳转表段中的首地址。
更具体的,本实施例所示的目标函数地址为所述目标函数的物理地址。
采用本实施例所示的方法,已创建的跳转表能够根据目标槽位号对设置有目标函数的的跳转表段,从而减少跳转表段所占用的内存,进而使得本实施例所示的方法在保障快速获取函数地址的情况下,能够有效的减少内存所占用的开销,有效的提升了系统的性能和运行效率。
结合本发明实施例的第一方面,本发明实施例第一方面的第一种实现方式中,在所述步骤A之前,还包括步骤A01至步骤A02,具体的,本实施例所示的步骤A01至步骤A02用于执行对跳转表段的创建过程。
步骤A01、创建所述跳转表段。
在系统的程序段中实现跳转表段的创建,以使所述跳转表段包括M个大小相等的槽位,本实施例对所述M的具体数值不作限定,只要为大于一定阈值的正整数即可。
本实施例所示的电子设备能够接收用户输入的配置参数,所述配置参数可包括预设比特值,所述预设比特值为用户通过所述配置参数向所述电子设备输入的各槽位的大小,则电子设备即可根据用户已输入的所述槽位的大小对所述跳转表段进行划分,从而使得划分完成的各槽位的大小均为用户已输入的所述预设比特值。
具体的,所述预设比特值大于或等于所述多个函数中任一函数的对齐粒度。
步骤A02、对各所述槽位进行标号。
本实施例对所述槽位进行标号的具体方法不作限定,只要所述跳转表段所包含的M个槽位中任一槽位均对应有槽位号,且任意两个槽位号之间均不相同,从而使得能够获取到与所述跳转表段所包括的所述多个大小相等的槽位中的任一槽位对应的槽位号。
本实施例所示的方法,能够对跳转表段进行划分,且划分而成的槽位的大小由用户设定,则用户可根据本实施例所示的方法所应用的系统的不同而设定不同的槽位的大小,从而使得本实施例所示的方法能够以高性能应用于各种系统,而且本实施例所示对跳转表段进行划分,从而能够确定出目标函数的首地址所位于的目标槽位,进而获取目标槽位的槽位号,可见,采用本实施例所示的方法能够实现对目标函数的准确,快速的定位,从而提升了对目标函数的目标地址获取过程中的效率以及准确性。
结合本发明实施例的第一方面以及本发明实施例的第一方面的第一种实现方式,本发明实施例的第一方面的第二种实现方式中,在所述步骤A之前,还包括步骤A11,具体的,本实施例所示的步骤A11用于执行对跳转表的创建过程。
步骤A11、根据所述跳转表段创建所述跳转表。
本实施例所示的所述跳转表包括多个子表项和多个参数。
本实施例所示的跳转表建立了如下的对应关系:
一个,建立了参数和子表项之间的对应关系,另一个,建立了参数和所述跳转表段所包含的函数之间的对应关系。
本实施例所示的所述多个参数中包括与所述目标函数对应的目标参数,即可确定与目标参数对应的目标子表项,在所述目标子表项中设置与所述目标函数对应的所述目标槽位号。
本实施例所示的方法,能够根据已创建的所述跳转表段创建跳转表,从而使得跳转表通过所述跳转表中的槽位号实现对跳转表段的索引,采用本实施例所示的槽位号对跳 转表段进行索引,相对于现有技术通过函数指针实现对函数的索引的技术方案,本实施例所示的方法能够在快速获取函数地址的情况下,节省跳转表所占用的内存,即有效的减少了内存所占用的开销。
结合本发明实施例的第一方面的第二种实现方式,本发明实施例的第一方面的第三种实现方式中,
所述步骤A具体包括:
步骤A21、读取跳转表的首地址。
本实施例中,在执行获取函数地址的过程中,可对跳转表进行读取,从而读取出跳转表的首地址。
步骤A22、获取所述目标子表项的目标比特数。
本实施例所示的目标子表项为与目标参数对应的子表项,所述目标参数为与函数对应的任一参数。
可见,本实施例所示的目标子表项为用于设置目标槽位号的子表项。
所述目标比特数为创建所述目标子表项所需的比特数。
步骤A23、计算所述目标槽位号。
具体的,本实施例根据第一公式计算所述目标槽位号,其中,所述第一公式为:
所述目标槽位号=所述跳转表的首地址+目标参数*所述目标比特数。
可见,将步骤A21所获取到的跳转表的首地址和步骤A22所获取到的所述目标比特数代入所述第一公式中,即可获取到所述目标槽位号,通过所述目标槽位号即可索引到位于所述跳转表项中的所述目标函数,从而能够实现对目标函数的目标地址的获取。
结合本发明实施例的第一方面的第三种实现方式,本发明实施例的第一方面的第四种实现方式中,所述步骤A22具体包括步骤A221;
步骤A221、根据第二公式计算所述目标比特数。
其中,所述第二公式为:
Figure PCTCN2017081547-appb-000001
其中,Q为所述目标比特数,roundup为向上取整函数,N为所述跳转表段所包括的函数的数目,handler-sizei为所述目标函数的大小,所述目标函数为N个所述函数中的第i个函数,i为小于或等于N的正整数,size-of-slot为所述槽位的大小。
本实施例中,所述目标比特数会结合具体的应用场景进行确认。
具体的,在软件的解决方案中,因需要计算机系统为8为,16位或36位,则所述目标比特数只能在8、16以及32中进行取值。
更具体的,通过所述第二公式计算出的所述目标比特数小于8比特,则所述目标比特数取值为8,若通过所述第二公式计算出的所述目标比特数大于8小于16,则所述目标比特数的取值为16,若通过所述第二公式计算出的所述目标比特数大于16比特,则所述目标比特数为32。
在硬件解决方案中,所需要的所述目标比特数的具体数目不作限定。
通过所述第二公式可知,当handler-sizei等于size-of-slot时,所需的所述目标比特数达到最小值roundup(log2N)。
因跳转表段使用的内存的大小受到size-of-slot的影响,即size-of-slot越大,则代表所述跳转表段中所设置的任意相邻的两个函数之间的间隙就越大,可见,在创建跳转表段的过程中,需要在跳转表段所使用的内存和所述目标比特数之间进行协调,从而通过对size-of-slot的调节,实现对内存使用效率的提升,减少在对函数地址进行获取的过程中所占用的内存。
还可见,因若所述size-of-slot越大,则所述跳转表段所设置的槽位的数目就越少,则减少了跳转表设置槽位号所需要的所述目标比特数的数目,从而进一步的减少了跳转表所占用的内存。
结合本发明实施例的第一方面的第三种实现方式或本发明实施例的第一方面的第四种实现方式,本发明实施例的第一方面的第五种实现方式中,
所述步骤B具体包括:
步骤B11、读取跳转表段的首地址。
本实施例中,需要对所述跳转表段进行读取,从而读取出所述跳转表段的首地址。
步骤B12、计算所述目标函数地址。
具体的,根据第三公式计算所述目标函数地址,其中,所述第三公式为:
所述目标函数地址=所述跳转表段的首地址+所述目标槽位号*所述槽位的大小。
具体的,本实施例所示的目标函数的地址是指所述目标函数位于所述跳转表段中的首地址。
本发明实施例第二方面提供了一种电子设备,包括:
第一获取单元,具体的,本实施例所示的第一获取单元用于执行本发明实施例第一方面所示的步骤A,步骤A的具体执行过程请详见本发明实施例的第一方面所示,具体在本实施例第二方面中不作赘述;
更具体的,所述第一获取单元用于根据跳转表获取目标函数的目标槽位号,所述跳转表用于索引跳转表段,所述跳转表段包括多个函数,所述目标函数为所述多个函数中的任一函数,所述跳转表段还包括多个槽位以及与所述多个槽位中的任一槽位对应的槽位号,所述目标槽位号为与目标槽位对应的槽位号,所述目标槽位为所述目标函数的首地址所位于的槽位;
第二获取单元,具体的,本实施例所示的第二获取单元用于执行本发明实施例第一方面所示的步骤B,步骤B的具体执行过程请详见本发明实施例的第一方面所示,具体在本实施例第二方面中不作赘述;
更具体的,所述第二获取单元用于根据所述目标槽位号获取目标函数地址,所述目标函数地址为所述目标函数位于所述跳转表段中的首地址。
结合本发明实施例第二方面,发明实施例第二方面的第一种实现方式中,所述电子设备还包括:
第一创建单元,具体的,本实施例所示的第一创建单元用于执行本发明实施例第一方面第一种实现方式所示的步骤A01,步骤A01的具体执行过程请详见本发明实施例的 第一方面第一种实现方式所示,具体在本实施例第二方面中不作赘述;
更具体的,所述第一创建单元用于创建所述跳转表段,所述跳转表段包括多个大小相等的槽位,且各所述槽位的大小为预设比特值,所述预设比特值大于或等于所述多个函数中任一函数的对齐粒度;
第三获取单元,具体的,本实施例所示的第三获取单元用于执行本发明实施例第一方面第一种实现方式所示的步骤A02,步骤A02的具体执行过程请详见本发明实施例的第一方面第一种实现方式所示,具体在本实施例第二方面中不作赘述;
更具体的,所述第三获取单元用于对各所述槽位进行标号,以获取与所述跳转表段所包括的所述多个大小相等的槽位中的任一槽位对应的槽位号。
结合本发明实施例第一方面或本发明实施例第一方面第一种实现方式,本发明实施例第一方面第二种实现方式中,所述电子设备还包括:
第二创建单元,具体的,本实施例所示的第二创建单元用于执行本发明实施例第一方面第二种实现方式所示的步骤A11,步骤A11的具体执行过程请详见本发明实施例的第一方面第二种实现方式所示,具体在本实施例第二方面中不作赘述;
更具体的,所述第二创建单元用于根据所述跳转表段创建所述跳转表,所述跳转表包括多个子表项和多个参数,所述多个参数中包括与所述目标函数对应的目标参数,与所述目标参数对应的目标子表项用于设置所述目标槽位号。
结合本发明实施例第一方面第二种实现方式,本发明实施例第一方面第三种实现方式,所述第一获取单元包括:
第一读取模块,具体的,本实施例所示的第一读取模块用于执行本发明实施例第一方面第三种实现方式所示的步骤A21,步骤A21的具体执行过程请详见本发明实施例的第一方面第三种实现方式所示,具体在本实施例第二方面中不作赘述;
更具体的,所述第一读取模块用于读取跳转表的首地址。
获取模块,具体的,本实施例所示的获取模块用于执行本发明实施例第一方面第三种实现方式所示的步骤A22,步骤A22的具体执行过程请详见本发明实施例的第一方面第三种实现方式所示,具体在本实施例第二方面中不作赘述;
更具体的,用于获取所述目标子表项的目标比特数,所述目标比特数为创建所述目标子表项所需的比特数;
第一计算模块,具体的,本实施例所示的第一计算模块用于执行本发明实施例第一方面第三种实现方式所示的步骤A23,步骤A23的具体执行过程请详见本发明实施例的第一方面第三种实现方式所示,具体在本实施例第二方面中不作赘述;
更具体的,所述第一计算模块用于根据第一公式计算所述目标槽位号,其中,所述第一公式为:
所述目标槽位号=所述跳转表的首地址+目标参数*所述目标比特数。
结合本发明实施例第一方面第三种实现方式,本发明实施例第一方面第四种实现方式中,所述第一获取模块还可执行本发明实施例第一方面第四种实现方式所示的步骤A221,步骤A221的具体执行过程请详见本发明实施例的第一方面第四种实现方式所示,具体在本实施例第二方面中不作赘述
更具体的,所述第一获取模块还用于,根据第二公式计算所述目标比特数,其中, 所述第二公式为:
Figure PCTCN2017081547-appb-000002
其中,Q为所述目标比特数,roundup为向上取整函数,N为所述跳转表段所包括的函数的数目,handler-sizei为所述目标函数的大小,所述目标函数为N个所述函数中的第i个函数,i为小于或等于N的正整数,size-of-slot为所述槽位的大小。
结合本发明实施例第一方面第三种实现方式或本发明实施例第一方面第四种实现方式,本发明实施例第一方面第五种实现方式中,所述第二获取单元包括:
第二读取模块,具体的,本实施例所示的第二读取模块用于执行本发明实施例第一方面第四种实现方式所示的步骤B11,步骤B11的具体执行过程请详见本发明实施例的第一方面第四种实现方式所示,具体在本实施例第二方面中不作赘述;
更具体的,所述第二读取模块用于读取跳转表段的首地址;
第二计算模块,具体的,本实施例所示的第二计算模块用于执行本发明实施例第一方面第四种实现方式所示的步骤B12,步骤B12的具体执行过程请详见本发明实施例的第一方面第四种实现方式所示,具体在本实施例第二方面中不作赘述;
更具体的,所述第二计算模块用于根据第三公式计算所述目标函数地址,其中,所述第三公式为:
所述目标函数地址=所述跳转表段的首地址+所述目标槽位号*所述槽位的大小。
从以上技术方案可以看出,本发明实施例具体以下优点:
能够根据跳转表获取到目标函数的目标槽位号,所述目标函数为跳转表段所包含的任一函数,所述跳转表用于索引所述跳转表段,所述目标槽位号为与目标槽位对应的槽位号,所述目标槽位为所述目标函数的首地址所位于的槽位,根据所述目标槽位号获取目标函数地址,可见,本发明实施例所创建的跳转表通过目标槽位号索引设置有所述目标函数的跳转表段,相对于现有技术通过函数指针实现对函数的索引的技术方案,本实施例所示的方法能够在快速获取函数地址的情况下,节省跳转表所占用的内存,即有效的减少了内存所占用的开销。
附图说明
图1为本发明提供的电子设备的一种实施例结构示意图;
图2为本发明所提供的函数地址的获取方法的一种实施例步骤流程图;
图3为本发明所提供的跳转表段的一种实施例结构示意图;
图4为本发明所提供的跳转表段的另一种实施例结构示意图;
图5为本发明所提供的跳转表的一种实施例结构示意图;
图6为本发明所提供的电子设备的一种实施例结构示意图。
具体实施方式
首先结合图1所示对能够实现本发明实施例所示的函数地址的获取方法的电子设备的具体结构进行说明。
图1是本发明实施例提供的一种电子设备结构示意图,该电子设备100可因配置或性能不同而产生比较大的差异,可以包括一个或一个以上中央处理器(central processing units,CPU)122(例如,一个或一个以上处理器)和存储器132,一个或一个以上存储应用程序142或数据144的存储介质130(例如一个或一个以上海量存储设备)。其中,存储器132和存储介质130可以是短暂存储或持久存储。存储在存储介质130的程序可以包括一个或一个以上模块(图示没标出),每个模块可以包括对电子设备中的一系列指令操作。更进一步地,中央处理器122可以设置为与存储介质130通信,在电子设备100上执行存储介质130中的一系列指令操作。
电子设备100还可以包括一个或一个以上电源126,一个或一个以上有线或无线网络接口150,一个或一个以上输入输出接口158,和/或,一个或一个以上操作系统141,例如Windows ServerTM,Mac OS XTM,UnixTM,LinuxTM,FreeBSDTM等等。
上述实施例中由电子设备所执行的步骤可以基于该图1所示的电子设备结构。
基于图1所示的电子设备,以下结合图2所示对本实施例所提供的函数地址的获取方法的具体执行流程进行说明。
步骤201、创建跳转表段。
本实施例中,在所述电子设备的所述存储器上创建所述跳转表段。
本实施例所述的跳转表段用于对N个函数进行服务,具体的,本实施例所示的跳转表段用于设置N个函数。
本实施例对N的具体数值不作限定。
更具体的,将N个函数整合在一起就是所述跳转表段,即所述跳转表段是N个函数在程序段中的示例。
在具体应用中,可在所述存储器上设置署名名字为“text”段的跳转表段,即可将N个函数放到署名为“text”段的跳转表段里。
本实施例对跳转表段在程序段中的具体名称不作限定。
在本实施例中,如图3所示,需要对跳转表段进行划分,以使划分后的所述跳转表300包括M个大小相等的槽位。
具体的,本实施例所示的电子设备能够接收用户输入的配置参数,所述配置参数可包括预设比特值,所述预设比特值为用户通过所述配置参数向所述电子设备输入的各槽位的大小,则电子设备即可根据用户已输入的所述槽位的大小对所述跳转表段进行划分,从而使得划分完成的各槽位的大小均为用户已输入的所述预设比特值。
具体的,本实施例对M的大小的不作限定。
可选的,本实施例所划分的M个槽位为连续的,即M个槽位中任意相邻的两个为彼此相互连接的。
需明确的是,本实施例所示的各槽位的所述预设比特值大于或等于所述N个函数中任一函数的对齐粒度。
继续如图3所示,对各所述槽位进行标号,以获取与所述跳转表段所包括的所述多个大小相等的槽位中的任一槽位对应的槽位号。
例如,与第一槽位301对应的为槽位号0,与第二槽位302对应的为槽位号1,以此类推,直至与第N槽位303对应的为槽位号M。
以图3所示为例,可所述跳转表段所包含的槽位进行连续的标号,当然,在其他实施例中,也可对所述跳转表段所包含的槽位进行非连续的标号,只要通过所述跳转表段能够建立槽位号与槽位的一一对应的关系即可。
可见,通过本实施例所划分的所述跳转表段能够获取到与所述跳转表段所包括的N个大小相等的槽位中的任一槽位对应的槽位号。
具体的,以下对本实施例所述的所述跳转表段具体是如何设置函数的进行说明。
以下结合图4所示为例进行示例性说明,本示例中,以所述跳转表段设置有N=5个函数为例,需明确的是,在具体应用中,本实施例对所述跳转表段所能够服务的函数的具体数目不作限定。
在本示例中,函数1的首地址位于槽位号0的槽位中,且所述函数1共占用3个槽位,即槽位号0的槽位,槽位号1的槽位以及槽位号2的槽位。
函数2的首地址位于槽位号3的槽位中,且所述函数2共占用1个槽位,即槽位号3的槽位。
函数3的首地址位于槽位号4的槽位中,且所述函数1共占用4个槽位,即槽位号4的槽位,槽位号5的槽位,槽位号6的槽位以及槽位号7的槽位。
函数4的首地址位于槽位号8的槽位中,且所述函数4共占用1个槽位,即槽位号8的槽位。
本示例中函数5所占用的槽位不作限定。
本实施例中,内存等于跳转表段所划分出的槽位的个数与各槽位大小的乘积。
可见,采用本实施例所示的对跳转表段的划分方法,能够快速的确定在跳转表段中各函数的首地址所位于的槽位,以及各函数所占用的槽位数目,从而能够准确的将函数的具体位置在内存中进行定位。
步骤202、根据所述跳转表段创建跳转表。
具体的,本实施例所示的跳转表用于索引所述跳转表段。
本实施例所示的跳转表的具体结构请参见图5所示进行示例性说明。
所述跳转表500包括多个子表项和多个参数。
本示例中,所述跳转表500还设置用于配置所述参数的区域501,在区域501内可配置有多个参数,且建立参数与子表项的对应关系。
需明确的是,本实施例对所述多个参数的具体配置方式不作限定,即所述多个参数可连续进行配置,也可非连续进行配置。
为更好的体现参数与子表项的对应关系,则本实施例所配置的参数可从数值0开始进行连续配置,直至配置到数值X,且参数1对应第一个子表项,参数2对应第二个子表项,可见,配置完成后,所述跳转表一共包括有X+1个子表项。
在具体配置中,若所述参数的开始数值不为0,则可减去一个参数,从而使得参数从0开始进行连续配置。
具体的,本实施例所示的多个参数还建立了与跳转表段所包含的函数的对应关系,可选的,多个参数可与函数一一对应,可选的,多个参数中的一部分可与函数一一对应,本实施例具体不作限定。
还以所述跳转表段包括5个函数为例,则本实施例中,参数1可对应函数1,参数 3可对应函数2,参数5可对应函数3,参数7可对应函数4,参数8可对应函数5。
更具体的,本实施例所示的表项用于设置与表项对应的函数的首地址所位于的槽位的槽位号。
具体的,本实施例以所述跳转表段设置有目标函数为例,本实施例所示的目标函数为所述跳转表段所包含的多个函数中的任一个函数。
本实施例所示的跳转表所包括的多个参数中包括与所述目标函数对应的目标参数,与所述目标参数对应的子表项为目标子表项,在所述目标子表项中设置有所述目标函数的目标槽位号。
例如,结合图4和图5所示,若目标函数为图4所示的函数1为例,函数1的首地址所位于槽位号为目标槽位号0,与函数1对应的为目标参数为参数1,与目标参数1对应的目标子表项中设置函数1的目标槽位号0。
若目标函数为图4所示的函数2为例,函数2的首地址所位于槽位号为目标槽位号3,与函数2对应的参数为目标参数3,与目标参数3对应的目标子表项中设置函数2的目标槽位号3。
本实施例中,因参数2并没有设置有对应的函数,则参数2所对应的子表项为无效的。
可见,本实施例所示中,若参数没有建立与函数的对应关系,则该参数对应的子表项为无效的。
若目标函数为图4所示的函数3为例,函数3的首地址所位于槽位号为目标槽位号4,与函数3对应的参数为目标参数5,与目标参数5对应的目标子表项中设置函数3的目标槽位号4。
若目标函数为图4所示的函数4为例,函数4的首地址所位于槽位号为目标槽位号8,与函数4对应的参数为目标参数7,与目标参数7对应的目标子表项中设置函数4的目标槽位号8。
可见,采用本实施例所示的跳转表,可使得跳转表所设置的参数中与有效的参数对应的子表项能够配置有与函数对应的槽位号,有效的参数是指建立了与函数对应关系的参数。
在执行步骤201和步骤202后,以下结合步骤203至步骤205具体说明本实施例所示是如何获取目标函数的目标槽位号的,需明确的是,本实施例所示的步骤201至步骤202为可选的步骤,若在执行本实施例所示的函数地址的获取过程中,所述跳转表以及所述跳转表段已配置完成,则无需执行步骤201至步骤202。
步骤203、读取跳转表的首地址。
本实施例中,在执行获取函数地址的过程中,可对跳转表进行读取,从而读取出跳转表的首地址。
步骤204、获取所述目标子表项的目标比特数。
本实施例所示的目标子表项为与目标参数对应的子表项,所述目标参数为与函数对应的任一参数。
可见,本实施例所示的目标子表项为用于设置目标槽位号的子表项。
所述目标比特数为创建所述目标子表项所需的比特数。
具体的,本实施例中根据第二公式计算所述目标比特数。
所述第二公式为:
Figure PCTCN2017081547-appb-000003
其中,Q为所述目标比特数,roundup为向上取整函数,N为所述跳转表段所包括的函数的数目,handler-sizei为所述目标函数的大小,所述目标函数为N个所述函数中的第i个函数,i为小于或等于N的正整数,size-of-slot为所述槽位的大小。
本实施例中,所述目标比特数会结合具体的应用场景进行确认。
具体的,在软件的解决方案中,因需要计算机系统为8为,16位或36位,则所述目标比特数只能在8、16以及32中进行取值。
更具体的,通过所述第二公式计算出的所述目标比特数小于8比特,则所述目标比特数取值为8,若通过所述第二公式计算出的所述目标比特数大于8小于16,则所述目标比特数的取值为16,若通过所述第二公式计算出的所述目标比特数大于16比特,则所述目标比特数为32。
在硬件解决方案中,所需要的所述目标比特数的具体数目不作限定。
通过所述第二公式可知,当handler-sizei等于size-of-slot时,所需的所述目标比特数达到最小值roundup(log2N)。
因跳转表段使用的内存的大小受到size-of-slot的影响,即size-of-slot越大,则代表所述跳转表段中所设置的任意相邻的两个函数之间的间隙就越大,可见,在创建跳转表段的过程中,需要在跳转表段所使用的内存和所述目标比特数之间进行协调,从而通过对size-of-slot的调节,实现对内存使用效率的提升,减少在对函数地址进行获取的过程中所占用的内存。
还可见,因若所述size-of-slot越大,则所述跳转表段所设置的槽位的数目就越少,则减少了跳转表设置槽位号所需要的所述目标比特数的数目,从而进一步的减少了跳转表所占用的内存。
步骤205、计算所述目标槽位号。
具体的,根据第一公式计算所述目标槽位号,其中,所述第一公式为:
所述目标槽位号=所述跳转表的首地址+目标参数*所述目标比特数。
本实施例所示的目标参数为与目标函数对应的参数,以图5所示为例,在计算目标槽位号时,可分别将目标参数1、3、5以及7代入所述第一公式中,从而分别算出当目标参数为1时,与目标参数1对应的目标子表项内所设置的目标槽位号,与目标参数3对应的目标子表项内所设置的目标槽位号,与目标参数5对应的目标子表项内所设置的目标槽位号以及与目标参数7对应的目标子表项内所设置的目标槽位号。
可见,通过步骤203至步骤205能够计算出目标函数的首地址所位于的目标槽位号,从而实现对目标函数的迅速定位。
以下结合步骤206至步骤207所示对如何获取所述目标函数的具体地址进行说明,需明确的是,通过步骤206至步骤207所获取到的为目标函数的物理地址,即所述目标 函数的绝对地址。
步骤206、读取跳转表段的首地址。
本实施例中,需要对所述跳转表段进行读取,从而读取出所述跳转表段的首地址。
步骤207、计算所述目标函数地址。
具体的,根据第三公式计算所述目标函数地址,其中,所述第三公式为:
所述目标函数地址=所述跳转表段的首地址+所述目标槽位号*所述槽位的大小。
本实施例中,所述目标槽位号为在步骤205所计算出的槽位号,所述槽位的大小为在对所述跳转表段进行配置的过程中所预先设置的。
可见,通过本实施例所示的步骤207能够计算出所述目标函数的地址。
具体的,本实施例所示的目标函数的地址是指所述目标函数位于所述跳转表段中的首地址。
为更好的理解本发明实施例所示的方法,以下对在C语言的环境下如何实现本发明实施例所示的方法进行说明。
声明跳转表:unsigned char jump_table[ARRAY_SIZE];——unsigned char用于子表项需要8bit的情况
声明函数:RC_type handler_Y(…)__attribute__((section("jump_table_section")aligned(size-of-slot)))
初始化:jump_table[idx_Y]=(handler_Y-jump_table_section_address)>>LOG_2(size-of-slot);
第1步:slot-number=jump_table[idx_Y];
第2步:address_of_handler=jump_table_section_address+slot-number<<LOG_2(size-of-slot)。
采用本实施例所示的方法的有益效果在于:
本发明实施例所创建的跳转表通过子表项所设置的槽位号实现对跳转表段的索引,从而使得跳转表的大小也只是传统的函数指针数组方法的跳转表大小的四分之一。并且通过分析汇编结果可以发现本实施例所提供的跳转表仅仅比传统的函数指针数组的方法多2条汇编指令,对性能几乎没有影响,但是本实施例所示的方法能够在快速获取函数地址的情况下,节省跳转表所占用的内存,即有效的减少了内存所占用的开销。
为实现本发明实施例所示的函数地址的获取方法,则本发明实施例还提供了一种能够实现上述方法的电子设备,所述电子设备的实体结构请参见图1所示,以下结合图6所示从功能模块角度对所述电子设备的具体结构进行说明。
如图6所示,所述电子设备包括:
第一创建单元601,用于创建所述跳转表段,所述跳转表段包括多个大小相等的槽位,且各所述槽位的大小为预设比特值,所述预设比特值大于或等于所述多个函数中任一函数的对齐粒度;
第三获取单元602,用于对各所述槽位进行标号,以获取与所述跳转表段所包括的所述多个大小相等的槽位中的任一槽位对应的槽位号。
第二创建单元603,用于根据所述跳转表段创建所述跳转表,所述跳转表包括多个 子表项和多个参数,所述多个参数中包括与所述目标函数对应的目标参数,与所述目标参数对应的目标子表项用于设置所述目标槽位号。
第一获取单元604,用于根据跳转表获取目标函数的目标槽位号,所述跳转表用于索引跳转表段,所述跳转表段包括多个函数,所述目标函数为所述多个函数中的任一函数,所述跳转表段还包括多个槽位以及与所述多个槽位中的任一槽位对应的槽位号,所述目标槽位号为与目标槽位对应的槽位号,所述目标槽位为所述目标函数的首地址所位于的槽位;
具体的,所述第一获取单元604包括:
第一读取模块6041,用于读取跳转表的首地址;
获取模块6042,用于获取所述目标子表项的目标比特数,所述目标比特数为创建所述目标子表项所需的比特数;
第一计算模块6043,用于根据第一公式计算所述目标槽位号,其中,所述第一公式为:
所述目标槽位号=所述跳转表的首地址+目标参数*所述目标比特数。
其中,所述第一获取模块还用于,根据第二公式计算所述目标比特数,其中,所述第二公式为:
Figure PCTCN2017081547-appb-000004
其中,Q为所述目标比特数,roundup为向上取整函数,N为所述跳转表段所包括的函数的数目,handler-sizei为所述目标函数的大小,所述目标函数为N个所述函数中的第i个函数,i为小于或等于N的正整数,size-of-slot为所述槽位的大小。
第二获取单元605,用于根据所述目标槽位号获取目标函数地址,所述目标函数地址为所述目标函数位于所述跳转表段中的首地址。
具体的,所述第二获取单元605包括:
第二读取模块6051,用于读取跳转表段的首地址;
第二计算模块6052,用于根据第三公式计算所述目标函数地址,其中,所述第三公式为:
所述目标函数地址=所述跳转表段的首地址+所述目标槽位号*所述槽位的大小。
本实施例所示的电子设备执行函数地址的获取的具体执行流程,请详见上述流程所示,具体在本实施例中不作限定,且本实施例所示的电子设备在执行上述实施例所示的方法所取得的有益效果请详见上述实施例所示,具体在本实施例中不作赘述。
所属领域的技术人员可以清楚地了解到,为描述的方便和简洁,上述描述的系统,装置和单元的具体工作过程,可以参考前述方法实施例中的对应过程,在此不再赘述。
在本申请所提供的几个实施例中,应该理解到,所揭露的系统,装置和方法,可以通过其它的方式实现。例如,以上所描述的装置实施例仅仅是示意性的,例如,所述单元的划分,仅仅为一种逻辑功能划分,实际实现时可以有另外的划分方式,例如多个单元或组件可以结合或者可以集成到另一个系统,或一些特征可以忽略,或不执行。另一 点,所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口,装置或单元的间接耦合或通信连接,可以是电性,机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的,作为单元显示的部件可以是或者也可以不是物理单元,即可以位于一个地方,或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外,在本发明各个实施例中的各功能单元可以集成在一个处理单元中,也可以是各个单元单独物理存在,也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现,也可以采用软件功能单元的形式实现。
所述集成的单元如果以软件功能单元的形式实现并作为独立的产品销售或使用时,可以存储在一个计算机可读取存储介质中。基于这样的理解,本发明的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的全部或部分可以以软件产品的形式体现出来,该计算机软件产品存储在一个存储介质中,包括若干指令用以使得一台计算机设备(可以是个人计算机,服务器,或者网络设备等)执行本发明各个实施例所述方法的全部或部分步骤。而前述的存储介质包括:U盘、移动硬盘、只读存储器(ROM,Read-Only Memory)、随机存取存储器(RAM,Random Access Memory)、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述,以上实施例仅用以说明本发明的技术方案,而非对其限制;尽管参照前述实施例对本发明进行了详细的说明,本领域的普通技术人员应当理解:其依然可以对前述各实施例所记载的技术方案进行修改,或者对其中部分技术特征进行等同替换;而这些修改或者替换,并不使相应技术方案的本质脱离本发明各实施例技术方案的精神和范围。

Claims (12)

  1. 一种函数地址的获取方法,其特征在于,包括:
    根据跳转表获取目标函数的目标槽位号,所述跳转表用于索引跳转表段,所述跳转表段包括多个函数,所述目标函数为所述多个函数中的任一函数,所述跳转表段还包括多个槽位以及与所述多个槽位中的任一槽位对应的槽位号,所述目标槽位号为与目标槽位对应的槽位号,所述目标槽位为所述目标函数的首地址所位于的槽位;
    根据所述目标槽位号获取目标函数地址,所述目标函数地址为所述目标函数位于所述跳转表段中的首地址。
  2. 根据权利要求1所述的方法,其特征在于,所述根据跳转表获取目标函数的目标槽位号之前,所述方法还包括:
    创建所述跳转表段,所述跳转表段包括多个大小相等的槽位,且各所述槽位的大小为预设比特值,所述预设比特值大于或等于所述多个函数中任一函数的对齐粒度;
    对各所述槽位进行标号,以获取与所述跳转表段所包括的所述多个大小相等的槽位中的任一槽位对应的槽位号。
  3. 根据权利要求1或2所述方法,其特征在于,所述根据跳转表获取目标函数的目标槽位号之前,所述方法还包括:
    根据所述跳转表段创建所述跳转表,所述跳转表包括多个子表项和多个参数,所述多个参数中包括与所述目标函数对应的目标参数,与所述目标参数对应的目标子表项用于设置所述目标槽位号。
  4. 根据权利要求3所述方法,其特征在于,所述根据跳转表获取目标函数的目标槽位号包括:
    读取跳转表的首地址;
    获取所述目标子表项的目标比特数,所述目标比特数为创建所述目标子表项所需的比特数;
    根据第一公式计算所述目标槽位号,其中,所述第一公式为:
    所述目标槽位号=所述跳转表的首地址+目标参数*所述目标比特数。
  5. 根据权利要求4所述的方法,其特征在于,所述获取所述目标子表项的目标比特数包括:
    根据第二公式计算所述目标比特数,其中,所述第二公式为:
    Figure PCTCN2017081547-appb-100001
    其中,Q为所述目标比特数,roundup为向上取整函数,N为所述跳转表段所包括的函数的数目,handler-sizei为所述目标函数的大小,所述目标函数为N个所述函数中的第i个函数,i为小于或等于N的正整数,size-of-slot为所述槽位的大小。
  6. 根据权利要求4或5所述的方法,其特征在于,所述跳转表段包括多个大小相等的槽位,所述根据所述目标槽位号获取目标函数地址包括:
    读取跳转表段的首地址;
    根据第三公式计算所述目标函数地址,其中,所述第三公式为:
    所述目标函数地址=所述跳转表段的首地址+所述目标槽位号*所述槽位的大小。
  7. 一种电子设备,其特征在于,包括:
    第一获取单元,用于根据跳转表获取目标函数的目标槽位号,所述跳转表用于索引跳转表段,所述跳转表段包括多个函数,所述目标函数为所述多个函数中的任一函数,所述跳转表段还包括多个槽位以及与所述多个槽位中的任一槽位对应的槽位号,所述目标槽位号为与目标槽位对应的槽位号,所述目标槽位为所述目标函数的首地址所位于的槽位;
    第二获取单元,用于根据所述目标槽位号获取目标函数地址,所述目标函数地址为所述目标函数位于所述跳转表段中的首地址。
  8. 根据权利要求7所述的电子设备,其特征在于,所述电子设备还包括:
    第一创建单元,用于创建所述跳转表段,所述跳转表段包括多个大小相等的槽位,且各所述槽位的大小为预设比特值,所述预设比特值大于或等于所述多个函数中任一函数的对齐粒度;
    第三获取单元,用于对各所述槽位进行标号,以获取与所述跳转表段所包括的所述多个大小相等的槽位中的任一槽位对应的槽位号。
  9. 根据权利要求7或8所述的电子设备,其特征在于,所述电子设备还包括:
    第二创建单元,用于根据所述跳转表段创建所述跳转表,所述跳转表包括多个子表项和多个参数,所述多个参数中包括与所述目标函数对应的目标参数,与所述目标参数对应的目标子表项用于设置所述目标槽位号。
  10. 根据权利要求9所述的电子设备,其特征在于,所述第一获取单元包括:
    第一读取模块,用于读取跳转表的首地址;
    获取模块,用于获取所述目标子表项的目标比特数,所述目标比特数为创建所述目标子表项所需的比特数;
    第一计算模块,用于根据第一公式计算所述目标槽位号,其中,所述第一公式为:
    所述目标槽位号=所述跳转表的首地址+目标参数*所述目标比特数。
  11. 根据权利要求10所述的电子设备,其特征在于,所述第一获取模块还用于,根据第二公式计算所述目标比特数,其中,所述第二公式为:
    Figure PCTCN2017081547-appb-100002
    其中,Q为所述目标比特数,roundup为向上取整函数,N为所述跳转表段所包括的函数的数目,handler-sizei为所述目标函数的大小,所述目标函数为N个所述函数中的第i个函数,i为小于或等于N的正整数,size-of-slot为所述槽位的大小。
  12. 根据权利要求10或11所述的电子设备,其特征在于,所述第二获取单元包括:
    第二读取模块,用于读取跳转表段的首地址;
    第二计算模块,用于根据第三公式计算所述目标函数地址,其中,所述第三公式为:
    所述目标函数地址=所述跳转表段的首地址+所述目标槽位号*所述槽位的大小。
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5860156A (en) * 1996-07-26 1999-01-12 Western Digital Corporation Method for implementing an indexed jump table
CN103218428A (zh) * 2013-04-09 2013-07-24 深圳市九洲电器有限公司 一种动态链接方法及系统
CN103530184A (zh) * 2013-10-24 2014-01-22 华为技术有限公司 一种在线补丁激活的方法及装置
CN105224346A (zh) * 2014-05-28 2016-01-06 腾讯科技(深圳)有限公司 目标函数定位方法及装置
CN105786613A (zh) * 2014-12-25 2016-07-20 联芯科技有限公司 提高内存利用效率的方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102023843B (zh) * 2010-11-24 2014-04-23 北京握奇数据系统有限公司 函数的调用方法、装置及智能卡
CN102682116B (zh) * 2012-05-14 2014-06-11 中兴通讯股份有限公司 基于哈希表的表项处理方法及其装置
CN104572024A (zh) * 2014-12-30 2015-04-29 杭州中天微系统有限公司 一种用于函数返回地址预测的装置及方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5860156A (en) * 1996-07-26 1999-01-12 Western Digital Corporation Method for implementing an indexed jump table
CN103218428A (zh) * 2013-04-09 2013-07-24 深圳市九洲电器有限公司 一种动态链接方法及系统
CN103530184A (zh) * 2013-10-24 2014-01-22 华为技术有限公司 一种在线补丁激活的方法及装置
CN105224346A (zh) * 2014-05-28 2016-01-06 腾讯科技(深圳)有限公司 目标函数定位方法及装置
CN105786613A (zh) * 2014-12-25 2016-07-20 联芯科技有限公司 提高内存利用效率的方法

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