WO2018074818A1 - Quantum circuit and method for implementing logical bell quantum state encoded by two different quantum error correction codes - Google Patents

Abstract

The present invention relates to a quantum circuit for implementing a logical Bell quantum state encoded by two different quantum error correction codes. A quantum circuit of the present invention may comprise: a Hadamard gating circuit for performing Hadamard conversions for CAT quantum states; a CNOT gating circuit for performing CNOT operations for conversion results of the Hadamard gating circuit and first and second logical qubits; a measuring circuit for measuring operation results of the CNOT gating circuit; and a logical bit converter for converting a bit of a second logical qubit on the basis of measurement result of the measuring circuit.

Description

Quantum circuitry and method for implementing logical bell quantum states encoded with two different quantum error correction codes

TECHNICAL FIELD The present invention relates to quantum computing, and more particularly, to quantum circuits and methods for implementing logical bell quantum states encoded with two different quantum error correction codes.

Using the principle of quantum mechanics, quantum computers based on qubits represented by superpositions of '0' and '1' perform much faster operations than digital computers that handle bits that can only represent '0' or '1'. It is known. Representative examples of excellent performance of quantum computers include prime factorization and quantum mechanical simulation. Therefore, there have been many attempts to implement quantum computers using quantum mechanics, but there are many difficulties in actually implementing quantum computers. As a representative example, there is a quantum noise problem. Quantum information can easily lose the original state of quantum information even by fine quantum noise. Therefore, fault-tolerant quantum error correction using quantum error correction code is used to protect quantum information.

Fault-tolerant quantum information processing refers to an operation of encoding quantum information using a quantum error correction code and then manipulating the quantum information using a quantum operator operating in a fault tolerant manner. The defect-tolerant means that even if a noise of a certain level or less occurs during the information processing process, it does not affect the final information processing result. By using defect-tolerant quantum information processing based on quantum error correcting codes, it is possible to protect quantum information from noise.

On the other hand, the quantum computer may be composed of a plurality of components for performing various functions. For example, there is a CPU that processes quantum information, a memory that stores quantum information, and a bus that transfers information between the CPU and the memory. As known to date, various quantum technologies have different characteristics, and various quantum computer components have different functions and characteristics, and thus, a complex use of various quantum technologies is required to implement a quantum computer.

In addition, the quantum error correction codes proposed so far have different characteristics. Thus, for processing quantum information for various purposes in a quantum computer, it may be more effective to use multiple quantum error correction codes in combination than to use a single quantum error correction code. In order to use various quantum error correction codes, a method of interconversion between different quantum error correction codes is necessary. The representative method is code teleportation technology. By using a code transmission technique, quantum information encoded with different quantum error correction codes can be converted to each other.

Many quantum information processing protocols using code transmission techniques have been proposed. In order to use the code transmission technique, a heterogeneously encoded logical bell state encoded with two different quantum error correction codes to be transformed is required. However, very few discussions have been made on the specific ways to implement heterogeneous logical bell quantum states. Therefore, in order to use the code transmission technique practically, it is very important to implement heterogeneous logical bell quantum states.

An object of the present invention is to provide a quantum circuit and a method for implementing a logical bell quantum state, which enables mutual conversion between quantum information encoded by different quantum error correction codes.

A quantum circuit according to an embodiment of the present invention includes a Hadamard gating circuit for performing Hadamard transforms on a CAT quantum state, first and second logical qubits encoded by first and second quantum error correction codes, respectively; A CNOT gating circuit for performing Controlled-NOT operations on the conversion results of the Hadamard gating circuit, a measuring circuit for measuring the result of the calculation results of the CNOT gating circuit, and the second based on the measurement result of the measuring circuit. It may include a logical bit converter for converting the bits of the logical qubit.

According to an embodiment of the present invention, a method of operating a quantum circuit configured to implement a logical bell quantum state encoded by different quantum error correction codes includes: performing Hadamard transform on a CAT quantum state; And performing a CNOT (Controlled-NOT) operation on the first and second logical qubits encoded by second quantum error correction codes and the Hadamard transform result, and measuring the CNOT operation result. And converting the bits of the second logical qubit based on the measurement result.

A quantum circuit according to an embodiment of the present invention may include first to third quantum circuits. Each quantum circuit comprises a Hadamard gating circuit that performs Hadamard transforms on a CAT quantum state, the Hadamard gating with the first and second logical qubits encoded by first and second quantum error correction codes, respectively. A CNOT gating circuit for performing CNOT (Controlled-NOT) operations on the conversion results of the circuit, and a measurement circuit for measuring the operation result of the CNOT gating circuit. The quantum circuit receives a measurement result of the measurement circuit of each quantum circuit and selects a target quantum state, and the second logic qubit output from the third quantum circuit based on the selection result of the selection circuit. It may include a logic bit converter for converting the bits of.

According to an embodiment of the present invention, it is possible to provide a quantum circuit and a method for implementing a logical bell quantum state, which enables mutual conversion between quantum information encoded by different quantum error correction codes.

1 is a block diagram schematically illustrating a quantum circuit according to an exemplary embodiment of the present invention.

FIG. 2 is a diagram illustrating the configuration of the quantum circuit shown in FIG. 1 in more detail.

3 is a block diagram illustrating a quantum circuit according to an embodiment of the present invention.

4 is a diagram schematically illustrating a code transmission cycle using an EPR pair generated by a quantum circuit according to an exemplary embodiment of the present invention.

5 is a schematic view showing a state injection circuit.

6 is a block diagram illustrating a quantum circuit according to an embodiment of the present invention.

Figure 1 shows the best mode for carrying out the invention.

In the following, embodiments of the present invention will be described clearly and in detail, such that those skilled in the art can easily implement the present invention.

1 is a block diagram schematically illustrating a quantum circuit according to an exemplary embodiment of the present invention. Referring to FIG. 1, the quantum circuit 100 includes a Hadamard gating circuit 110, a Controlled-NOT gating circuit 120, a measurement unit 130, a parity detector 140, and Logical bit converter 150.

The quantum circuit 100 may generate a logical bell quantum state that is essential for code teleportation, which enables interconversion between quantum information encoded by different quantum error correction codes. For example, the physical bell quantum state may mean a quantum state in which two qubits are maximally entangled with each other, and the logical bell quantum state quantums each of the two qubits of the physical bell quantum state. It may mean a quantum state encoded with an error correction code. The heterogeneous logical bell quantum state proposed by the present invention may mean a logical bell quantum state in which two qubits of the physical bell quantum state are encoded using different quantum error correction codes. For example, the quantum circuit 100 may generate an EPR pair (Einstein-Podolsky-Rose pair) as a logical bell quantum state.

The quantum circuit 100 may receive a CAT quantum state having a length of nA + nB. For example, the CAT quantum state input to the quantum circuit 100 may be defined as in Equation 1 below.

Here, nA is the size of the block of quantum error correction code A, and nB is the size of the block of quantum error correction code B.

The Hadamard gating circuit 110 may be configured to perform Hadamard transformation on the input CAT quantum state. For example, the Hadamard gating circuit 110 may have individual qubits in the CAT quantum state.

or

of,

or

Can be configured to convert to an overlapping state of (base states). For example, the Hadamard gating circuit 110 may be configured to perform operations such as Equations 2 and 3 below. In equations (2) and (3), the subscript 'H' above the arrow indicates a Hadamard transform.

The quantum circuit 100 may receive quantum error correction codes encoded by different error correction codes. For example, quantum circuit 100 may have a logical qubit (or positive quantum state) encoded by quantum error correction code A.

And a logical qubit (or positive quantum state) encoded by the quantum error correction code B

Can be input.

The CNOT gating circuit 120 outputs the output of the Hadamard gating circuit 110 and the logical qubits.

You can perform CNOT operations on. The CNOT gating circuit 120 may receive two qubits and output two output qubits, and may perform an operation of converting the other one according to the state of one of the input qubits. For example, the first qubit of the input qubits may be a condition qubit (C), and the second qubit may be a target qubit (T). For example, when the condition qubit is '0', the CNOT gating circuit 120 may maintain the input of the target qubit as it is. Conversely, when the condition qubit is '1', the CNOT gating circuit 120 may convert the input of the target qubit. Table 1 below shows the truth table of the CNOT gating circuit.

input		Print
C	T	C		T
0	0	0	0
0	One	0	One
One	0	One	One
One	One	One	0

For example, by the CNOT gating circuit 120, a logical qubit

And CAT quantum states

For some qubits corresponding to the sign A of CNOT operation can be performed in units of qubits, and logical qubits

And CAT quantum states

The CNOT operation may be performed in units of qubits with respect to the remaining qubits corresponding to the sign B.

The measurement unit 130 may measure an operation result of the CNOT gating circuit 120, and output a classical bit (ie, 0 or 1) according to the measured result. Signals output from the measurement unit 130 in the figure may represent a classical bit, each arrow is represented by two lines. This is to distinguish it from an arrow composed of one line representing the flow of qubits. For example, since the CNOT gating circuit 120 is executed in qubits, the output of the CNOT gating circuit 120 is

,

,

, And

It can be composed of a combination of.

For example, the measurement unit 130 may measure the bit value '0' or '1' of the qubit output from the CNOT gating circuit 120.

The parity detector 140 may calculate the parity by receiving the output result by the measuring unit 130. For example, if the parity detector 140 determines that the number of '1's of the classical bits received from the measurement unit 130 is odd, then the logical qubits

Additional operations by the logical bit converter 150 will be performed for. On the other hand, if it is determined by the parity detector 140 that the number of '1's of the classical bits received from the measurement unit 130 is an even number, the additional operation by the logic bit converter 150 will not be executed.

Logical bit converter 150 is logical qubits

Bit can be converted. For example, if the number of '1' of the classical bits received from the measuring unit 130 is odd, the logical bit converter 150 may be logical qubits.

You can invert the bits of. Equation

Physical bit converter

Physics cubit

Pauli Procession

This indicates that an operation (eg, bit-flip) is performed, which may mean the same as executing an X operation.

Once the conversion process by logic bit translator 150 is complete, the heterogeneous logical bell quantum state in the entangled state (ie, the entangled EPR pair)

Can be generated.

FIG. 2 is a diagram illustrating the configuration of the quantum circuit 100 shown in FIG. 1 in more detail.

The Hadamard gating circuit 110 may include a plurality of Hadamard gates. For example, the Hadamard gating circuit 110 may include the respective qubits and logical qubits that make up the CAT quantum state.

,

May include an appropriate number of Hadamard gates to perform a CNOT operation on.

The CNOT gating circuit 120 may include a plurality of CNOT gates. Similarly, the CNOT gating circuit 120 each qubit and logical qubits that make up the CAT quantum state.

,

An appropriate number of CNOT gates may be included such that a CNOT operation is performed on.

The measurement unit 130 may measure the result of the output of each CNOT gate constituting the CNOT gating circuit 120. To this end, the measuring unit 130 may comprise measuring elements configured to measure the result of the output of each CNOT gate. For example, each measurement element constituting the measurement unit 130 may measure the calculation result of the CNOT gate and output the result as a classical bit '0' or '1'.

Parity detector 140 is a qubit

It can be determined whether additional operation is required for. For example, when the number of '1's of the classical bits received from the measuring unit 130 is odd, the parity detector 140 may be logical qubits.

Logic bit converter 150 may be controlled such that additional operations are performed on the.

The logical bit converter 150 based on the determination result of the parity detector 140, the logical qubits

You can invert the bits of. For example, the logical bit converter 150 may be composed of a combination of a plurality of physical bit converters, which combination may vary depending on the quantum error correction code used. Equation

Physical bit converter

Physics cubit

Pauli Procession

This indicates that an operation (eg, bit-flip) is performed, which may mean the same as executing an X operation. Only logical qubits

Is encoded logically by the quantum error correction code 'B', so that the logical bit converter 150

Has been shown.

However, the quantum circuit described above in FIGS. 1 and 2 is not fault tolerant. That is, the EPR pair output from the quantum circuit 100 always

I can't be sure. The fault tolerant quantum circuit will be described in more detail with reference to FIG. 3.

3 is a block diagram illustrating a quantum circuit 200 according to an embodiment of the present invention. The quantum circuit 200 may be fault tolerant unlike the quantum circuit 100 described with reference to FIGS. 1 and 2. For example, logical qubits input to the quantum circuit 100 of FIG. 1.

,

, The CAT quantum state, and the EPR pair itself are known quantum states. However, logical qubits input to the quantum circuit 100

,

If there is an error in the and quantum states of CAT and the quantum state of the EPR pair output from the quantum circuit 100 is not the desired state, it means that there is an error. Thus, in this case logical qubits input to the quantum circuit

,

By correcting the error of or providing a new CAT quantum state input to the quantum circuit, an error-free EPR pair can be generated.

The quantum circuit 200 may be generally similar to the configuration of the quantum circuit 100 described with reference to FIGS. 1 and 2. However, the quantum circuit 200 is composed of a multi-stage. For example, the quantum circuit 200 may include a plurality of quantum circuits 210, 220, and 230. Quantum circuit 200 may include quantum error correction circuits (QEC) 212, 214, 222, 224, 232, 234, 252. The quantum circuit 200 receives parity from the quantum circuits 210, 220, and 230, respectively, and logical qubits are received according to the received parity.

It may include a selection circuit 240 for determining whether to perform an additional operation for. The quantum circuit 200 has a logical qubit in accordance with the determination result of the selection circuit 240.

And bit converter 250 to perform additional operations on the.

Each of the quantum circuits 210, 220, 230 includes the Hadamard gating circuit 110, the CNOT gating circuit 120, the measurement unit 130, and the parity detector 140 described above with reference to FIGS. 1 or 2. It may include. However, each of the quantum circuits 210, 220, and 230 may not include the logic bit converter 150 illustrated in FIG. 1 or 2.

The first quantum circuit 210 is logical qubits

,

And receiving the CAT quantum state to perform a series of operations such as Hadamard transform, CNOT gating operation, measurement, parity calculation. This has been described above with reference to FIGS. 1 and 2, and thus a detailed description thereof will be omitted.

Parity 1 output from the first quantum circuit 210 may be transferred to the selection circuit 240. Although parity 1 is shown as being conveyed to the second quantum circuit 220 in the figure, this is for clarity / simplification of the figure. Logical qubits (indicated by a and b in the drawing) output from the first quantum circuit 210 may be error free or error free. Accordingly, the quantum error correction circuits 212 and 214 may perform quantum error correction on logical qubits (indicated by a and b in the drawing) output from the first quantum circuit 210. The quantum state of the logical qubits can be stabilized by the quantum error correction operation.

The second quantum circuit 220 receives logical qubits (indicated by c and d in the figure) and CAT quantum state from the quantum error correction circuits 212 and 214 to perform Hadamard transform, CNOT gating operation, measurement, parity You can perform a series of operations such as calculations.

Parity 2 output from the second quantum circuit 220 may be transferred to the selection circuit 240. Although parity 2 is shown in the figure as being conveyed to the third quantum circuit 230, this is for clarity / simplification of the figure. The logical qubits (indicated by e and f in the drawing) output from the second quantum circuit 220 may be error free or error free. Accordingly, the quantum error correction circuits 222 and 224 may perform quantum error correction on logical qubits (indicated by e and f in the drawing) output from the second quantum circuit 220. The quantum state of the logical qubits can be stabilized by the quantum error correction operation.

The third quantum circuit 230 receives logical qubits (indicated by g and h in the figure) and CAT quantum state from the quantum error correction circuits 222 and 224 to perform Hadamard transform, CNOT gating operation, measurement, parity You can perform a series of operations such as calculations.

Parity 3 output from the third quantum circuit 230 may be transferred to the selection circuit 240. Logical qubits (indicated by i and j in the drawing) output from the third quantum circuit 230 may be error free or error free. Accordingly, the quantum error correction circuits 232 and 234 may perform quantum error correction on the logical qubits (indicated by i and j in the drawing) output from the third quantum circuit 230. The quantum state of the logical qubits can be stabilized by the quantum error correction operation.

The selection circuit 240 may select a desired state (ie, a target quantum state) having an error-free quantum state with reference to parity 1, parity 2, and parity 3 received from the quantum circuits 210, 220, 230, respectively. have. For example, if parity 1, parity 2, and parity 3 coincide with each other, this may mean that there is no error in the operation result by each of the quantum circuits 210, 220, and 230. On the other hand, if two of the parity 1, parity 2, and parity 3 match, and the other one is different, it means that there is no error in the operation operation by the two quantum circuits that output two parities having the same value. can do. That is, an appropriate parity value may be selected by such a majority voting principle.

Once the appropriate parity value is selected by the selection circuit 240, the logical bit converter 250 may perform additional operations. However, whether to perform the additional operation may depend on the selected parity value, which has been described in detail with reference to FIGS. 1 and 2, and thus will be omitted.

The logic bit converter 250 may invert the bits of the logical qubits (indicated by i in the drawing) output from the quantum error correction circuit 234. The logically inverted logical qubits (indicated by m in the figure) may be passed to quantum error correction circuit 252.

The quantum error correction circuit 252 may perform quantum error correction on a logical qubit (indicated by m in the drawing) output from the logic bit converter 250, and as a result, the quantum state of the logical qubit may be stabilized. .

As a result, the logical qubits output from the quantum error correction circuits 232 and 252 are fault tolerant logical bell quantum states (ie, entangled EPR pairs).

Can be.

4 is a diagram schematically illustrating a code transmission cycle using an EPR pair generated by a quantum circuit according to an exemplary embodiment of the present invention. The code transmission circuit 300 includes a CNOT gate 310, a Hadamard gate 320, a first measurement unit 330, a second measurement unit 340, a first logic bit converter 350, and a second logic bit. It may include a transducer 360.

The code transmission circuit 300 is a quantum error correction code A encoded quantum information

Quantum error correction coded B coded quantum information

Can be converted to

First, the code transmission circuit 300 outputs an EPR pair output from FIGS.

And quantum information

You can perform CNOT operations on.

Hadamard gate 320 receives the received quantum information

Hadamard transform can be performed on. The Hadamard transform will be performed according to Equations 2 and 3 described above.

The first measurement unit 330 may measure the output result of the Hadamard gate 320. For example, when the number of the classical bits '1' is odd among the output results of the Hadamard gate 320, the first measurement unit 330 may output the logical qubit '1'. On the other hand, when the number of classical bits '1' is an even number among the output results of the Hadamard gate 320, the first measurement unit 330 will output a logical qubit '0'.

The second measurement unit 340 may measure the output result of the CNOT gate 310. For example, when the number of the classical bits '1' is odd in the output result of the CNOT gate 310, the second measurement unit 340 may output the logical qubit '1'. On the other hand, when the number of the classical bits '1' is an even number among the output results of the CNOT gate 310, the second measurement unit 340 will output the logical qubit '0'.

The first logical bit converter 350 may perform an additional operation depending on the output result from the second measurement unit 340. For example, when the logical qubit output from the second measurement unit 340 is '1', the first logical bit converter 350 is an EPR pair.

A logical bit transform operation may be performed on the logical qubit corresponding to the sign B of λ. This may be similar to the operation of the logical bit converter 150 described with reference to FIGS. 1 and 2, or the operation of the logical bit converter 250 described with reference to FIG. 3.

The second logical bit converter 360 may perform an additional operation depending on the output result from the first measurement unit 330. For example, when the logical qubit output from the first measurement unit 330 is '1', the second logical bit converter 360 performs a logical bit conversion operation on the output result of the first logical bit converter 350. Can be done.

As a result, quantum information encoded with an error correction code B from the second logical bit converter 360

May be output.

5 is quantum information encoded in a recursive L step.

Quantum information of the recursive L + 1 level (concatenation level L + 1)

Is a schematic diagram of a state injection circuit that converts the circuits to a < RTI ID = 0.0 >

The state injection circuit 400 includes a first CNOT gate 410, a decoder 420, a second CNOT gate 430, a Hadamard gate 440, a first measurement unit 450, and a second measurement unit 460. , A first logical bit converter 470, and a second logical bit converter 480.

The first CNOT gate 410 is logical qubits

And

You can perform CNOT operations on. Decoder 420 is logical qubits

Decode the logical qubit of the recursive L

Can be generated. The second CNOT gate 430 is a quantum information

And logical qubits

You can perform CNOT operations on. Hadamard gate 440 is a quantum information

Hadamard transform can be performed on.

The first measurement unit 450 can measure the logical bit value of the output of the Hadamard gate 440. For example, when the number of the classical bits '1' is odd among the output results of the Hadamard gate 440, the first measurement unit 450 may output the logical qubit '1'. The second measurement unit 460 can measure the logical bit value of the output of the second CNOT gate 430. For example, when the number of the classical bits '1' is odd among the output results of the second CNOT gate 430, the second measuring unit 460 may output the logical qubit '1'.

The first logical bit converter 470 may perform additional operations depending on the output result from the first measurement unit 450. For example, when the logical qubit output from the first measurement unit 450 is '1', the first logical bit converter 470 may perform logical bit conversion on the third logical qubit of the drawing. This may be similar to the operation of the logical bit converter 150 described with reference to FIGS. 1 and 2, or the operation of the logical bit converter 250 described with reference to FIG. 3.

The second logical bit converter 480 may perform additional computations depending on the output result from the second measurement unit 460. For example, when the logical qubit output from the second measurement unit 460 is '1', the second logical bit converter 480 performs logical bit conversion on the output result of the first logical bit converter 470. can do.

As a result, quantum information in the recursive L + 1 phase

Can be generated.

6 is a block diagram illustrating a quantum circuit according to an embodiment of the present invention. Quantum circuit 500 may implement heterogeneous logical bell quantum states, encoded in any recursive step (ie, n steps).

The quantum circuit 500 may include a plurality of state injection circuits 511 to 51m and 521 to 52m. The operation of each of the state injection circuits 511 to 51m and 521 to 52m is substantially the same as described above with reference to 5. Therefore, duplicate descriptions will be omitted.

State injection circuits 511-51m are recursive one-step quantum information encoded with quantum error correction code A.

Quantum information of recursive n steps

It can be configured to convert to. Similarly, state injection circuits 521-52m are recursive one-step quantum information encoded with quantum error correction code B.

Quantum information of recursive n steps

It can be configured to convert to.

According to the embodiments described above, it is possible to freely convert quantum information encoded with different quantum error correction codes. Since a general purpose quantum information processing device (eg, a quantum computer, etc.) performs various functions, it will consist of a plurality of components. Therefore, by using the quantum code conversion technology according to an embodiment of the present invention, it will be easier to implement a general-purpose quantum information processing device.

The above description is specific examples for practicing the present invention. The present invention will include not only the embodiments described above but also embodiments that can be easily changed or simply changed in design. In addition, the present invention will also include techniques that can be easily modified and implemented using the embodiments described above.

The present invention can be used for quantum circuits.

Claims (16)

1. A Hadamard gating circuit for performing Hadamard transforms on the CAT quantum state;

   A CNOT gating circuit for performing CNOT (Controlled-NOT) operations on the first and second logical qubits encoded by the first and second quantum error correction codes and the conversion results of the Hadamard gating circuit, respectively;

   A measurement circuit for measuring a calculation result of the CNOT gating circuit; And

   And a logic bit converter for converting the bits of the second logical qubit based on a measurement result of the measurement circuit.
2. The method of claim 1,

   And the length of the CAT quantum state is equal to the sum of the length of the first logical qubit and the length of the second logical qubit.
3. The method of claim 1,

   The CNOT gating circuit performs CNOT operations on the first logical qubit and a quantum state corresponding to the first logical qubit of the CAT quantum state,

   And the CNOT gating circuit performs CNOT operations on the second logical qubit and a quantum state of the CAT quantum state corresponding to the second logical qubit.
4. The method of claim 1,

   The first and second logical qubits are

   

   Quantum circuit encoded in quantum states.
5. The method of claim 1,

   And the logical bit converter consists of a Pauli X matrix or a combination of Pauli X matrices to invert the bits of the second logical qubit.
6. The method of claim 5, wherein

   The measuring circuit outputs the classical bits corresponding to the operation results of the CNOT gating circuit,

   And the logical bit converter inverts the bits of the second logical qubit when the number of '1' of the classical bits is odd.
7. The method of claim 6,

   And a parity detector that determines whether to invert the bits of the second logical qubit based on the classical bits.
8. A method of operating a quantum circuit configured to implement a logical bell quantum state encoded by different quantum error correction codes:

   Performing a Hadamard transform on the CAT quantum state;

   Performing a CNOT (Controlled-NOT) operation on the first and second logical qubits encoded by the first and second quantum error correction codes and the Hadamard transform result, respectively;

   Measuring a result of the CNOT operation; And

   Based on the measurement result, converting the bits of the second logical qubit.
9. The method of claim 8,

   Converting the logical bits comprises inverting the bits of the second logical qubit using a Pauli X matrix or a combination of Pauli X matrices.
10. The method of claim 8,

    The measuring may include measuring the operation result and outputting the classical bits,

    And if the number of '1' of the classical bits is odd, the bits of the second logical qubit are inverted.
11. A transform of the Hadamard gating circuit with the Hadamard gating circuit, each performing Hadamard transforms for the CAT quantum state, the first and second logical qubits encoded by the first and second quantum error correction codes, respectively First to third quantum circuits, including a CNOT gating circuit for performing CNOT (Controlled-NOT) operations on the results, and a measurement circuit for measuring the operation result of the CNOT gating circuit;

    A selection circuit that receives a measurement result of the measurement circuit of each quantum circuit and selects a target quantum state; And

    And a logic bit converter for converting bits of the second logical qubit output from the third quantum circuit based on a selection result of the selection circuit.
12. The method of claim 11,

    The CNOT gating circuit of each quantum circuit performs CNOT operations on the first logical qubit and a quantum state corresponding to the first logical qubit of the CAT quantum state,

    And the CNOT gating circuit of each quantum circuit performs CNOT operations on the second logical qubit and a quantum state corresponding to the second logical qubit of the CAT quantum state.
13. The method of claim 11,

    The selection circuit selects the target quantum state according to a majority voting principle.
14. The method of claim 11,

    And a plurality of quantum error correction circuits for performing a quantum error correction operation on the first and second quantum error correction codes output from the respective quantum circuits.
15. The method of claim 11,

    The first and second logical qubits input to the respective quantum circuits are

    

    Quantum circuit encoded in quantum state.
16. The method of claim 11,

    And the bit converter inverts the bits of the second logical qubit output from the third quantum circuit using a combination of Pauli X matrix or Pauli X matrix.

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