WO2018035759A1 - 电容判读电路及指纹辨识系统 - Google Patents

电容判读电路及指纹辨识系统 Download PDF

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Publication number
WO2018035759A1
WO2018035759A1 PCT/CN2016/096587 CN2016096587W WO2018035759A1 WO 2018035759 A1 WO2018035759 A1 WO 2018035759A1 CN 2016096587 W CN2016096587 W CN 2016096587W WO 2018035759 A1 WO2018035759 A1 WO 2018035759A1
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WIPO (PCT)
Prior art keywords
capacitance
contact layer
circuit
layer
contact
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PCT/CN2016/096587
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English (en)
French (fr)
Inventor
赵国豪
杨孟达
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深圳市汇顶科技股份有限公司
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Application filed by 深圳市汇顶科技股份有限公司 filed Critical 深圳市汇顶科技股份有限公司
Priority to CN201680000903.7A priority Critical patent/CN107077610B/zh
Priority to KR1020177030745A priority patent/KR102009260B1/ko
Priority to EP16894802.4A priority patent/EP3506147B1/en
Priority to PCT/CN2016/096587 priority patent/WO2018035759A1/zh
Priority to US15/705,265 priority patent/US10346667B2/en
Publication of WO2018035759A1 publication Critical patent/WO2018035759A1/zh

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06VIMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V40/00Recognition of biometric, human-related or animal-related patterns in image or video data
    • G06V40/10Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
    • G06V40/12Fingerprints or palmprints
    • G06V40/13Sensors therefor
    • G06V40/1329Protecting the fingerprint sensor against damage caused by the finger
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416Control or interface arrangements specially adapted for digitisers
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06VIMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V40/00Recognition of biometric, human-related or animal-related patterns in image or video data
    • G06V40/10Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
    • G06V40/12Fingerprints or palmprints
    • G06V40/13Sensors therefor
    • G06V40/1306Sensors therefor non-optical, e.g. ultrasonic or capacitive sensing
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/94Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the way in which the control signals are generated
    • H03K17/96Touch switches
    • H03K17/962Capacitive touch switches
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04107Shielding in digitiser, i.e. guard or shielding arrangements, mostly for capacitive touchscreens, e.g. driven shields, driven grounds

Definitions

  • the invention relates to a capacitance interpretation circuit and a fingerprint identification system, in particular to a capacitance interpretation circuit and a fingerprint identification system capable of reducing the influence of parasitic capacitance.
  • a capacitive fingerprint identification system is a popular fingerprint identification method, which uses a contact layer to receive finger contact from a user and senses a change in capacitance of the contact layer to determine a fingerprint of the user. Finger Ridge or Finger Valley.
  • conventional techniques usually place a shielding layer under the contact layer during circuit layout to create a shielding effect to avoid interference of the contact layer under the shielding layer.
  • a parasitic capacitance is generated between the contact layer and the shielding layer, and the capacitance value of the parasitic capacitance is often greater than the capacitance value of the contact capacitance generated by the contact, which affects the capacitance value of the contact capacitance circuit or the capacitive fingerprint identification system to determine the contact capacitance. So that the accuracy of fingerprint recognition is reduced.
  • the present invention provides a capacitance interpretation circuit including a contact layer for receiving a finger contact; a shielding layer disposed under the contact layer, the shielding layer and the contact layer Forming a parasitic capacitance; a driving circuit coupled to the contact layer and the shielding layer for providing a first voltage to the contact layer and the shielding layer at a first time; a sensing circuit, Electrically connected to the contact layer for sensing the contact capacitance at a second time; and a first switch having one end electrically connected to the shielding layer and the other end electrically connected to the driving circuit Or the contact layer.
  • the capacitor interpretation circuit and the fingerprint identification system provided by the invention can eliminate the effect of parasitic capacitance and improve the accuracy and performance of the capacitance sensing or fingerprint identification.
  • the second end of the first switch is electrically connected to the driving circuit.
  • the first switch disconnects the connection between the driving circuit and the shielding layer at the second time.
  • the driving circuit includes a driving switch for controlling the contact layer to receive the first voltage; wherein the driving switch is turned on at the first time.
  • the second end of the first switch is electrically connected to the contact layer.
  • the first switch turns on the connection between the contact layer and the shielding layer at the second time.
  • the driving circuit comprises two driving switches for respectively controlling the contact layer and the shielding layer to receive the first voltage; wherein the two driving switches are turned on at the first time .
  • the sensing circuit includes an amplifier; an integrating capacitor coupled to an input end and an output end of the amplifier.
  • the present invention also provides a fingerprint identification system system, including a sensing circuit is provided; a plurality of pixel circuits are coupled to the sensing circuit, each pixel circuit includes a contact layer for receiving a finger contact, and the contact layer forms a contact capacitance with the finger; a shielding layer disposed under the contact layer, the shielding layer and the contact layer form a parasitic capacitance; a driving circuit electrically connected to the contact layer and the shielding layer for Providing a first voltage to the contact layer and the shielding layer at a time; and a first switch comprising a first end electrically connected to the shielding layer; and a second end electrically connected to the The driving circuit or the contact layer; wherein the sensing circuit senses the contact capacitance of the plurality of pixel circuits at a second time.
  • the present invention also provides a method for eliminating parasitic capacitance, including providing the first voltage to the contact layer and the shielding layer at the first time; The second time, the shielding layer is floated.
  • the step of floating the shielding layer at the second time is included in the second time, disconnecting the first switch.
  • the sensing circuit capacitively senses the contact capacitance to generate an output voltage.
  • the present invention also provides a method for eliminating parasitic capacitance, including providing the first voltage to the contact layer and the shielding layer at the first time; The second time, the contact layer and the shielding layer are connected to each other through the first switch.
  • connecting the contact layer and the shielding layer to each other through the first switch at the second time is included in the second time to turn on the first switch.
  • the sensing circuit capacitively senses the contact capacitance to generate an output voltage.
  • the capacitor interpretation circuit and the fingerprint identification system utilize a switch connected between the shielding layer and the driving circuit, so that the shielding layer is in a floating state in the sensing phase, or is connected to the shielding layer and the contact layer.
  • the switching between the shielding layer and the contact layer has the same potential in the sensing phase, thereby eliminating the effect of parasitic capacitance, thereby improving the accuracy and performance of capacitive sensing or fingerprint identification.
  • FIG. 1 is a schematic diagram of a capacitance interpretation circuit according to an embodiment of the present invention.
  • FIG. 2 is a schematic diagram of a capacitance interpretation circuit according to an embodiment of the present invention.
  • FIG. 3 is a schematic diagram of a fingerprint identification system according to an embodiment of the present invention.
  • FIG. 4 is a schematic diagram of a fingerprint identification system according to an embodiment of the present invention.
  • FIG. 5 is a schematic diagram of a driving circuit according to an embodiment of the present invention.
  • FIG. 6 is a schematic diagram of a driving circuit according to an embodiment of the present invention.
  • FIG. 7 is a schematic diagram of a sensing circuit according to an embodiment of the present invention.
  • FIG. 8 is a schematic diagram of a parasitic capacitance elimination process according to an embodiment of the present invention.
  • FIG. 1 is a schematic diagram of a capacitance interpretation circuit 10 according to an embodiment of the present invention.
  • the capacitance interpretation circuit 10 can be applied to a fingerprint identification system for reading the capacitance of a contact capacitor, and includes a contact layer 100, a shielding layer 102, a driving circuit 104, a sensing circuit 106, and a switch SW1 (corresponding to The first switch of the claims).
  • the contact layer 100 can be a top metal layer of an integrated circuit layout for receiving contact of a finger FG, and the contact layer 100 forms a contact capacitance Cf with the finger FG.
  • the shielding layer 102 can be another metal layer (Metal) of the integrated circuit layout, which is disposed directly under the contact layer 100 and forms a parasitic capacitance Cp with the contact layer 100.
  • the shielding layer 102 is used to create a shielding effect on the circuitry below the shielding layer 102 to avoid interference with the contact layer 100 by circuitry below the shielding layer 102.
  • the driving circuit 104 and the sensing circuit 106 are electrically connected to the contact layer 100. In a driving phase (the first time according to the claim), the driving circuit 104 provides a first voltage V1 to the contact layer 100.
  • the shielding layer 102 is configured to charge (ie, store charge) the contact capacitance Cf and the parasitic capacitance Cp, that is, the contact layer 100 and the shielding layer 102 are driven to the first voltage V1, wherein the first voltage V1 can be a fixed voltage or a positive voltage. Voltage V DD ;
  • the sensing circuit 106 capacitively senses the contact capacitance Cf to generate an output voltage Vo.
  • the capacitance interpretation circuit 10 can transmit the output voltage Vo to a back-end circuit (not shown in FIG. 1) to determine that the position of the capacitance interpretation circuit 10 is a Finger Ridge or a valley corresponding to the finger FG. (Finger Valley).
  • one end of the switch SW1 is electrically connected to the shielding layer 102, and the other end is electrically connected to the driving circuit 104.
  • the switch SW1 turns on the link between the driving circuit 104 and the shielding layer 102.
  • the driving circuit 104 supplies the first voltage V1 to the contact layer 100 and the shielding layer 102, that is, the driving circuit 104 simultaneously contacts the contact layer 100 and The shield layer 102 is driven to a first voltage V1.
  • the switch SW1 disconnects the connection between the driving circuit 104 and the shield layer 102, so that the shield layer 102 assumes a floating state. It should be noted that in the sensing phase, because the shielding layer 102 is in a floating state, the parasitic capacitance Cp does not affect the circuit of the sensing circuit 106, thereby reducing noise and improving the accuracy of capacitive sensing or fingerprint identification.
  • FIG. 2 is a schematic diagram of a capacitance interpretation circuit 20 according to an embodiment of the present invention.
  • the capacitance interpretation circuit 20 is similar to the capacitance interpretation circuit 10, so the same components follow the same symbols.
  • the capacitance interpretation circuit 20 includes a driving circuit 204 and a switch SW2 (corresponding to the first switch according to the claims), and the switch SW2 is electrically connected between the contact layer 100 and the shielding layer 102 ( That is, one end of the switch SW2 is electrically connected to the shielding layer 102, and the other end is electrically connected to the contact layer 100), and one output end of the driving circuit 204 is electrically connected to the contact layer 100, and the other output end is electrically connected to the shielding layer.
  • the driving circuit 204 simultaneously supplies the first voltage V1 to the contact layer 100 and the shielding layer 102, that is, the driving circuit 204 simultaneously drives the contact layer 100 and the shielding layer 102 to the first voltage V1.
  • the switch SW2 conducts the connection between the contact layer 100 and the shielding layer 102, so that the contact layer 100 and the shielding layer 102 have the same potential, and the charge in the parasitic capacitance Cp is cleared.
  • the parasitic capacitance Cp is equal to 0, and the parasitic capacitance Cp does not affect the circuit of the sensing circuit, thereby reducing noise and improving the accuracy of capacitance sensing or fingerprint identification.
  • the shielding layer is usually grounded or electrically connected to a fixed voltage, and the parasitic capacitance formed by the shielding layer and the contact layer may affect the sensing capacitance of the sensing circuit, thereby reducing the accuracy of fingerprint recognition.
  • the present invention utilizes the switch SW1 such that the shield layer 102 assumes a floating state in the sensing phase, or utilizes the switch SW2 such that the shield layer 102 and the contact layer 100 have the same potential in the sensing phase, thereby Eliminate the influence of parasitic capacitance Cp on the sensing circuit during the sensing phase to improve the accuracy of capacitive sensing or fingerprint recognition.
  • FIG. 1 and FIG. 2 are diagrams for explaining a single capacitance interpretation circuit for detecting a contact capacitance Cf at a specific position. Therefore, if a plurality of capacitance interpretation circuits are properly arranged and integrated, the finger can be further judged. FG streak or grain valley.
  • FIG. 3 and FIG. 4 are schematic diagrams of a fingerprint identification system 30 and a fingerprint identification system 40 according to an embodiment of the present invention.
  • the fingerprint identification system 30 includes a plurality of pixel circuits PX3, a multiplexer MUX, and a sensing circuit 306.
  • the fingerprint identification system 40 includes a plurality of pixel circuits PX4, a multiplexer MUX, and a sensing circuit 306.
  • the pixel circuit PX3 and the pixel circuit PX4 are similar to the fingerprint identification circuit 10 and the fingerprint recognition circuit 20, respectively, so the same components follow the same symbols.
  • the sensing circuit 306 is coupled to the contact layer 100 of the plurality of pixel circuits PX3 (or the contact layer 100 coupled to the plurality of pixel circuits PX4) through the multiplexer MUX to sense the plurality of pixel circuits PX3 at different times.
  • the contact capacitance Cf formed by the contact layer 100 of the different pixel circuits PX3 (or the contact capacitance Cf formed by the contact layer 100 of the different pixel circuits PX4 in the plurality of pixel circuits PX4 at different times).
  • Both the fingerprint identification system 30 and the fingerprint identification system 40 can eliminate the influence of the parasitic capacitance Cp on the capacitance value of the read contact capacitance Cf, so as to improve the accuracy of the capacitive sensing or fingerprint identification.
  • FIG. 5 and FIG. 6 are schematic diagrams of a driving circuit 504 and a driving circuit 604 according to an embodiment of the present invention.
  • FIG. 7 is a schematic diagram of a sensing circuit 706 according to an embodiment of the present invention.
  • Drive circuit 504 can be used to implement the driving circuit 104, which comprises a driving switch SD1, the driving switch SD1 receives the first voltage V1, in the driving phase, the driving switch SD1 is turned on (ON); in the sensing phase, the driving switch SD1 is turned off ( OFF).
  • the driving circuit 604 can be used to implement the driving circuit 204, which can include the driving switches SD1, SD2, one end of the driving switch SD1 receives the first voltage V1, the other end is electrically connected to the contact layer 100, and one end of the driving switch SD2 receives the first The voltage V1 is electrically connected to the shielding layer 102.
  • the switches SD1 and SD2 are turned on (ON); in the sensing phase, the switches SD1 and SD2 are turned OFF.
  • the sensing circuit 706 can be used to implement the sensing circuit 106, 306, which can include a sensing switch SS, an amplifier Amp, and an integrating capacitor Cint.
  • the integrating capacitor Cint is coupled between an input terminal and an output terminal of the amplifier Amp.
  • the amplifier Amp and the integrating capacitor Cint form an integrator.
  • the sensing switch SS is coupled between the input end of the amplifier Amp and the contact layer 100. In the driving phase, the sensing switch SS is turned off; in the sensing phase, the sensing switch SS is turned on, and the charge in the contact capacitor Cf flows to the integrating capacitor Cint and is stored in the integrating capacitor Cint.
  • the integrator can generate the output voltage Vo according to this, and transmit the output voltage Vo to the back end circuit to sense the contact capacitance Cf, thereby determining the bee or grain of the finger FG.
  • the parasitic capacitance Cp affects the feedback circuit in the integrator, making the noise of the amplifier Amp larger, and reducing the performance of capacitive sensing or fingerprint recognition.
  • the present invention can eliminate the effect of the parasitic capacitance Cp, reduce the noise of the amplifier Amp, and thereby improve the performance of capacitive sensing or fingerprint recognition.
  • FIG. 8 is a schematic diagram of a parasitic capacitance elimination process 80 according to an embodiment of the present invention.
  • the parasitic capacitance cancellation process 80 can be performed by the capacitance interpretation circuits 10, 20 or the pixel circuits PX3, PX4. As shown in FIG. 8, the parasitic capacitance elimination process 80 includes the following steps:
  • Step 800 Driving the contact layer 100 and the shielding layer 102 to the first voltage V1.
  • Step 802 Floating the shielding layer 102 or connecting the contact layer 100 and the shielding layer 102 to each other.
  • Step 800 in the parasitic capacitance cancellation process 80 may represent the operation performed by the capacitance interpretation circuit 10, 20 or the pixel circuits PX3, PX4 in the drive phase, and the step 802 may represent the capacitance interpretation circuit 10, 20 or in the sensing phase.
  • the capacitance interpretation circuit 10 or the pixel circuit PX3 uses the open switch SW1 to cause the shield layer 102 to assume a floating state; and the capacitance interpretation circuit 20 or the pixel circuit PX4 utilizes the conduction switch SW2 to make the contact layer 100 is interconnected with shield layer 102 and has the same potential.
  • the remaining parasitic capacitance elimination process 80 please refer to the relevant paragraphs mentioned above, and details are not described herein again.
  • the present invention utilizes a switch connected between the shielding layer and the driving circuit such that the shielding layer assumes a floating state in the sensing phase, or uses a switch connected between the shielding layer and the contact layer to cause shielding.
  • the layer and the contact layer have the same potential in the sensing phase, thereby eliminating the effect of parasitic capacitance to improve the accuracy and performance of capacitive sensing or fingerprint recognition.

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
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  • General Engineering & Computer Science (AREA)
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Abstract

一种电容判读电路(10,20)及指纹辨识系统,该电容判读电路(10,20)包含有一接触层(100),用来接受一手指(FG)之接触;一屏蔽层(102),设置于接触层(100)的下方,该屏蔽层(102)与接触层(100)形成一寄生电容(Cp);一驱动电路(104,204),耦接于接触层(100)及屏蔽层(102);一感测电路(106),电性连接于接触层(100),用来于一第二时间感测接触电容(Cf);以及一第一开关(SW1,SW2),其一端电性连接于屏蔽层(102),另一端电性连接于驱动电路(104,204)或接触层(100)。该电容判读电路(10,20)及指纹辨识系统可消除寄生电容(Cp)的效应,提升电容感测或指纹辨识的精准度及效能。

Description

电容判读电路及指纹辨识系统 技术领域
本发明涉及一种电容判读电路及指纹辨识系统,尤其涉及一种可降低寄生电容影响的电容判读电路及指纹辨识系统。
背景技术
随着科技日新月异,移动电话、数字相机、平板计算机、笔记本电脑等越来越多携带型电子装置已经成为了人们生活中必备的工具。由于携带型电子装置通常供个人使用,而具有一定的隐私性,因此其内部储存的数据,例如电话簿、相片、个人信息等等为私人所有。一旦电子装置丢失,则这些数据可能被他人所利用,而造成不必要的损失。虽然目前已有利用密码保护的方式来避免电子装置为他人所使用,但密码容易泄露或遭到破解,具有较低的安全性。并且,用户需记住密码才能使用电子装置,若忘记密码,则会带给使用者许多不便。因此,目前发展出利用个人指纹辨识系统的方式来达到身份认证的目的,以提升数据安全性。
在习知技术中,电容式指纹辨识系统是相当受欢迎的一种指纹辨识方法,其系利用接触层接受来自使用者的手指接触,并感测接触层的电容变化,以判断使用者指纹的纹蜂(Finger Ridge)或纹谷(Finger Valley)。为了避免接触层受到来自其他电路的干扰,习知技术通常会在电路布局时在接触层下方布局一屏蔽层,以产生屏蔽效应,避免屏蔽层以下的电路对接触层产生干扰。然而,接触层与屏蔽层的间会产生寄生电容,而寄生电容的电容值往往大于因接触而产生的接触电容的电容值,影响电容判读电路或电容式指纹辨识系统判断接触电容的电容值,以致于降低了指纹辨识的精准度。
发明内容
因此,本发明的主要目的即在于提供一种可降低寄生电容影响的电容判读电路及指纹辨识系统。
为了解决上述技术问题,本发明提供了一电容判读电路,包含有一接触层,用来接受一手指之接触;一屏蔽层,设置于所述接触层的下方,所述屏蔽层与所述接触层形成一寄生电容;一驱动电路,耦接于所述接触层及所述屏蔽层,用来于一第一时间提供一第一电压至所述接触层及所述屏蔽层;一感测电路,电性连接于所述接触层,用来于一第二时间感测所述接触电容;以及一第一开关,其一端电性连接于所述屏蔽层,另一端电性连接于所述驱动电路或所述接触层。本发明提供的电容判读电路及指纹辨识系统可消除寄生电容的效应,提升电容感测或指纹辨识的精准度及效能。
优选地,所述第一开关的所述第二端电性连接于所述驱动电路。
优选地,所述第一开关于所述第二时间断开所述驱动电路与所述屏蔽层之间的连结。
优选地,所述驱动电路包含有一驱动开关,用来控制所述接触层接收所述第一电压;其中,所述驱动开关于所述第一时间导通。
优选地,所述第一开关的所述第二端电性连接于所述接触层。
优选地,所述第一开关于所述第二时间导通所述接触层与所述屏蔽层之间的连结。
优选地,所述驱动电路包含有两个驱动开关,分别用来控制所述接触层和所述屏蔽层接收所述第一电压;其中,所述两个驱动开关于所述第一时间导通。
优选地,所述感测电路包含有一放大器;一积分电容,耦接于所述放大器的一输入端及一输出端。
为了更好解决上述技术问题,本发明还提供了一指纹辨识系统系统,包 含一感测电路;复数个像素电路,耦接于所述感测电路,每一像素电路包含有一接触层,用来接受一手指之接触,所述接触层与所述手指形成一接触电容;一屏蔽层,设置于所述接触层的下方,所述屏蔽层与所述接触层形成一寄生电容;一驱动电路,电性连接于所述接触层及所述屏蔽层,用来于一第一时间提供一第一电压至所述接触层及所述屏蔽层;以及一第一开关,包含有一第一端,电性连接于所述屏蔽层;以及一第二端,电性连接于所述驱动电路或所述接触层;其中,所述感测电路于一第二时间感测所述复数个像素电路的所述接触电容。
为了更好解决上述技术问题,本发明还提供了一种消除寄生电容的方法,包含于所述第一时间,提供所述第一电压至所述接触层及所述屏蔽层;以及于所述第二时间,将所述屏蔽层浮接。
优选地,于所述第二时间将所述屏蔽层浮接的步骤包含于所述第二时间,断开所述第一开关。
优选地,于所述第二时间,所述感测电路对接触电容进行电容感测,以产生一输出电压。
为了更好解决上述技术问题,本发明还提供了一种消除寄生电容的方法,包含于所述第一时间,提供所述第一电压至所述接触层及所述屏蔽层;以及于所述第二时间,将所述接触层与所述屏蔽层透过所述第一开关相互连接。
优选地,于所述第二时间将所述接触层与所述屏蔽层透过所述第一开关相互连接包含于所述第二时间,导通所述第一开关。
优选地,于所述第二时间,所述感测电路对接触电容进行电容感测,以产生一输出电压。
本发明提供的电容判读电路及指纹辨识系统,其利用连接于屏蔽层与驱动电路之间的开关,使得屏蔽层于感测阶段中呈现浮接的状态,或利用连接于屏蔽层与接触层之间的开关,使得屏蔽层与接触层于感测阶段中具有相同的电位,进而消除寄生电容的效应,以提升电容感测或指纹辨识的精准度及效能。
附图说明
图1为本发明实施例一电容判读电路的示意图。
图2为本发明实施例一电容判读电路的示意图。
图3为本发明实施例一指纹辨识系统的示意图。
图4为本发明实施例一指纹辨识系统的示意图。
图5为本发明实施例一驱动电路的示意图。
图6为本发明实施例一驱动电路的示意图。
图7为本发明实施例一感测电路的示意图。
图8为本发明实施例一寄生电容消除流程的示意图。
具体实施方式
为了使本发明的目的、技术方案及优点更加清楚明白,以下结合附图及实施例,对本发明进行进一步详细说明。应当理解,此处所描述的具体实施例仅仅用以解释本发明,并不用于限定本发明。
请参考图1,图1为本发明实施例一电容判读电路10的示意图。电容判读电路10可应用于一指纹辨识系统,用来判读一接触电容的电容大小,其包含有一接触层100、一屏蔽层102、一驱动电路104、一感测电路106以及一开关SW1(对应权利要求所述的第一开关)。接触层100可为集成电路布局的一顶层金属层(Top Metal),用来接受一手指FG的接触,接触层100与手指FG形成一接触电容Cf。屏蔽层102可为集成电路布局的另一金属层(Metal),其布局于接触层100的正下方,并与接触层100形成一寄生电容Cp。屏蔽层102用来对屏蔽层102以下的电路产生屏蔽效应,以避免屏蔽层102以下的电路对接触层100产生干扰。驱动电路104与感测电路106皆电性连接于接触层100,于一驱动阶段中(Driving Phase,对应权利要求所述的第一时间),驱动电路104提供一第一电压V1至接触层100及屏蔽层102,以对接触电容Cf及寄生电 容Cp充电(即储存电荷),即将接触层100及屏蔽层102驱动至第一电压V1,其中第一电压V1可为一固定电压或是一正电压VDD;于一感测阶段中(Sensing Phase,对应权利要求所述的第二时间),感测电路106对接触电容Cf进行电容感测,以产生一输出电压Vo。电容判读电路10可将输出电压Vo传递至一后端电路(未绘示于图1),以判断电容判读电路10所在的位置为对应至手指FG的一纹蜂(Finger Ridge)或一纹谷(Finger Valley)。
为了降低/消除寄生电容Cp对判读接触电容Cf电容值的影响,开关SW1的一端电性连接于屏蔽层102,另一端电性连接于驱动电路104。于驱动阶段中,开关SW1导通驱动电路104与屏蔽层102之间之链接,此时驱动电路104提供第一电压V1至接触层100以及屏蔽层102,即驱动电路104同时将接触层100以及屏蔽层102驱动至第一电压V1。另外,于感测阶段中,开关SW1断开驱动电路104与屏蔽层102之间之连结,而使得屏蔽层102呈现浮接(Floating)的状态。需注意的是,于感测阶段中,因屏蔽层102为浮接状态,寄生电容Cp对感测电路106的回路不会造成影响,进而降低噪声,提升电容感测或指纹辨识的精准度。
请参考图2,图2为本发明实施例一电容判读电路20的示意图。电容判读电路20与电容判读电路10相似,故相同组件沿用相同符号。与电容判读电路10不同的是,电容判读电路20包含一驱动电路204及一开关SW2(对应权利要求所述的第一开关),开关SW2电性连接于接触层100与屏蔽层102之间(即开关SW2的一端电性连接于屏蔽层102,另一端电性连接于接触层100),而驱动电路204的一输出端电性连接于接触层100,另一输出端电性连接于屏蔽层102。于驱动阶段中,驱动电路204同时提供第一电压V1至接触层100以及屏蔽层102,即驱动电路204同时将接触层100以及屏蔽层102驱动至第一电压V1。另外,于感测阶段中,开关SW2导通接触层100与屏蔽层102之间之连结,而使得接触层100与屏蔽层102具有相同的电位,此时寄生电容Cp中的电荷会被清空,于感测阶段中,因为接触层100与屏蔽层102具有相同的电位, 因此寄生电容Cp等于0,寄生电容Cp对感测电路的回路不会造成影响,进而降低噪声,提升电容感测或指纹辨识的精准度。
习知技术中,屏蔽层通常为接地或电性连接于一固定电压,屏蔽层与接触层所形成的寄生电容会对感测电路判读接触电容的造成影响,而降低指纹辨识的精准度。相较之下,本发明利用开关SW1,使得屏蔽层102于感测阶段中呈现浮接的状态,或利用开关SW2,使得屏蔽层102与接触层100于感测阶段中具有相同的电位,进而消除寄生电容Cp于感测阶段对感测电路造成的影响,以提升电容感测或指纹辨识的精准度。
此外,图1及图2为用来说明单一电容判读电路之实施例,其系用以侦测特定位置之接触电容Cf,因此若将多个电容判读电路适当排列及整合,则可进一步判断手指FG之纹蜂或纹谷。
举例来说,请参考图3及图4,图3及图4分别为本发明实施例一指纹辨识系统30及一指纹辨识系统40的示意图。指纹辨识系统30包含复数个像素电路PX3、一复用器MUX以及一感测电路306,而指纹辨识系统40包含复数个像素电路PX4、一复用器MUX以及一感测电路306。像素电路PX3及像素电路PX4分别类似于指纹辨识电路10及指纹辨识电路20,故相同组件沿用相同符号。感测电路306透过复用器MUX耦接于复数个像素电路PX3的接触层100(或是耦接于复数个像素电路PX4的接触层100),以于不同时间感测复数个像素电路PX3中不同像素电路PX3的接触层100所形成的接触电容Cf(或是于不同时间感测复数个像素电路PX4中不同像素电路PX4的接触层100所形成的接触电容Cf)。关于像素电路PX3、PX4的详细操作可参考前述实施例之相关段落,在此不赘述。指纹辨识系统30及指纹辨识系统40皆可消除寄生电容Cp对判读接触电容Cf电容值的影响,以提升电容感测或指纹辨识的精准度。
另外,关于驱动电路及感测电路的电路结构为公知,故简述如下。请参考图5至图7,图5及图6分别为本发明实施例一驱动电路504及一驱动电路604的示意图,图7分别为本发明实施例一感测电路706的示意图。驱动电路 504可用来实现驱动电路104,其包含一驱动开关SD1,驱动开关SD1接收第一电压V1,于驱动阶段中,驱动开关SD1导通(ON);于感测阶段中,驱动开关SD1断开(OFF)。另外,驱动电路604可用来实现驱动电路204,其可包含驱动开关SD1、SD2,驱动开关SD1的一端接收第一电压V1,另一端电性连接于接触层100,驱动开关SD2的一端接收第一电压V1,另一端电性连接于屏蔽层102,于驱动阶段中,驱动开关SD1,SD2导通(ON);于感测阶段中,驱动开关SD1,SD2断开(OFF)。
另外,感测电路706可用来实现感测电路106、306,其可包含一感测开关SS、一放大器Amp以及一积分电容Cint。积分电容Cint耦接于放大器Amp的一输入端及一输出端之间,放大器Amp及积分电容Cint形成一积分器,感测开关SS耦接于放大器Amp的输入端与接触层100之间。于驱动阶段中,感测开关SS断开;于感测阶段中,感测开关SS导通,接触电容Cf中的电荷会流至积分电容Cint而储存于积分电容Cint中。积分器可据此产生输出电压Vo,并将输出电压Vo传递至后端电路,以感测接触电容Cf,进而判断手指FG的纹蜂或纹谷。
另外,一般来说,寄生电容Cp会影响积分器里的回授电路,而使放大器Amp的噪声较大,而降低电容感测或指纹辨识的效能。相较之下,本发明可消除寄生电容Cp的效应,降低放大器Amp的噪声,进而提升电容感测或指纹辨识的效能。
关于本发明电容判读电路/像素电路的运作,可进一步归纳为一寄生电容消除流程,请参考图8,图8为本发明实施例一寄生电容消除流程80的示意图。寄生电容消除流程80可由电容判读电路10、20或像素电路PX3、PX4来执行。如图8所示,寄生电容消除流程80包含以下步骤:
步骤800:将接触层100及屏蔽层102驱动至第一电压V1。
步骤802:将屏蔽层102浮接,或是将接触层100与屏蔽层102相互连接。
寄生电容消除流程80中的步骤800可代表于驱动阶段中,电容判读电路10、20或像素电路PX3、PX4所执行的运作,步骤802可代表于感测阶段中,电容判读电路10、20或像素电路PX3、PX4所执行的运作。于步骤802中,电容判读电路10或像素电路PX3利用断开开关SW1,使得屏蔽层102呈现浮接(Floating)的状态;而电容判读电路20或像素电路PX4利用导通开关SW2,使得接触层100与屏蔽层102相互连接且具有相同的电位。其余寄生电容消除流程80的操作细节,请参考前述相关段落,于此不再赘述。
综上所述,本发明利用连接于屏蔽层与驱动电路之间的开关,使得屏蔽层于感测阶段中呈现浮接的状态,或利用连接于屏蔽层与接触层之间的开关,使得屏蔽层与接触层于感测阶段中具有相同的电位,进而消除寄生电容的效应,以提升电容感测或指纹辨识的精准度及效能。
以上所述仅为本发明的较佳实施例而已,并不用以限制本发明,凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等,均应包含在本发明的保护范围之内。

Claims (23)

  1. 一种电容判读电路,其特征在于,所述电容判读电路包含有:
    一接触层,用来接受一手指之接触,所述接触层与所述手指形成一接触电容;
    一屏蔽层,设置于所述接触层的下方,所述屏蔽层与所述接触层形成一寄生电容;
    一驱动电路,耦接于所述接触层及所述屏蔽层,用来于一第一时间提供一第一电压至所述接触层及所述屏蔽层;
    一感测电路,电性连接于所述接触层,用来于一第二时间感测所述接触电容;以及
    一第一开关,包含有
    一第一端,电性连接于所述屏蔽层;以及
    一第二端,电性连接于所述驱动电路或所述接触层。
  2. 如权利要求1所述的电容判读电路,其特征在于,所述第一开关的所述第二端电性连接于所述驱动电路。
  3. 如权利要求2所述的电容判读电路,其特征在于,所述第一开关于所述第二时间断开所述驱动电路与所述屏蔽层之间的连结。
  4. 如权利要求2或3所述的电容判读电路,其特征在于,所述驱动电路包含有:
    一驱动开关,用来控制所述接触层接收所述第一电压;
    其中,所述驱动开关于所述第一时间导通。
  5. 如权利要求1所述的电容判读电路,其特征在于,所述第一开关的所述第二端电性连接于所述接触层。
  6. 如权利要求5所述的电容判读电路,其特征在于,所述第一开关于所述第二时间导通所述接触层与所述屏蔽层之间的连结。
  7. 如权利要求5或6所述的电容判读电路,其特征在于,所述驱动电路包含有:
    两个驱动开关,分别用来控制所述接触层和所述屏蔽层接收所述第一电压;
    其中,所述两个驱动开关于所述第一时间导通。
  8. 如权利要求1-7任意一项所述的电容判读电路,其特征在于,所述感测电路包含有:
    一放大器;以及
    一积分电容,耦接于所述放大器的一输入端及一输出端。
  9. 一种指纹辨识系统,其特征在于,所述指纹辨识系统电路包含有:
    一感测电路;
    复数个像素电路,耦接于所述感测电路,每一像素电路包含有:
    一接触层,用来接受一手指之接触,所述接触层与所述手指形成一接触电容;
    一屏蔽层,设置于所述接触层的下方,所述屏蔽层与所述接触层形成一寄生电容;
    一驱动电路,电性连接于所述接触层及所述屏蔽层,用来于一第一时间提供一第一电压至所述接触层及所述屏蔽层;以及
    一第一开关,包含有
    一第一端,电性连接于所述屏蔽层;以及
    一第二端,电性连接于所述驱动电路或所述接触层;
    其中,所述感测电路于一第二时间感测所述复数个像素电路的所述接触电容。
  10. 如权利要求9所述的指纹辨识系统,其特征在于,所述第一开关的所述第二端电性连接于所述驱动电路。
  11. 如权利要求10所述的指纹辨识系统,其特征在于,所述第一开关于所述第二时间断开所述驱动电路与所述屏蔽层之间的连结。
  12. 如权利要求9或10所述的指纹辨识系统,其特征在于,所述驱动电路包含有:
    一驱动开关,用来控制所述接触层接收所述第一电压;
    其中,所述驱动开关于所述第一时间导通。
  13. 如权利要求9所述的指纹辨识系统,其特征在于,所述第一开关的所述第二端电性连接于所述接触层。
  14. 如权利要求13所述的指纹辨识系统,其特征在于,所述第一开关于所述第二时间导通所述接触层与所述屏蔽层之间的连结。
  15. 如权利要求13或14所述的指纹辨识系统,其特征在于,所述驱动电路包含有:
    两个驱动开关,分别用来控制所述接触层和所述屏蔽层接收所述第一电压;
    其中,所述两个驱动开关于所述第一时间导通。
  16. 如权利要求9-15任意一项所述的指纹辨识系统,其特征在于,所述感测电路包含有:
    一放大器;以及
    一积分电容,耦接于所述放大器的一输入端及一输出端。
  17. 如权利要求9-15任意一项所述的指纹辨识系统,其特征在于,另包含有:
    一复用器,耦接于所述复数个像素电路的所述接触层与所述感测电路之间。
  18. 一种消除寄生电容的方法,应用于权利要求9所述指纹辨识系统的所述像素电路,所述接触层与所述屏蔽层之间形成一寄生电容,所述方法包含有:
    于所述第一时间,提供所述第一电压至所述接触层及所述屏蔽层;以及
    于所述第二时间,将所述屏蔽层浮接。
  19. 如权利要求18所述的寄生电容消除方法,其特征在于,于所述第二时间将所述屏蔽层浮接的步骤包含:
    于所述第二时间,断开所述第一开关。
  20. 如权利要求18所述的寄生电容消除方法,其特征在于,另包含:
    于所述第二时间,所述感测电路对接触电容进行电容感测,以产生一输出电压。
  21. 一种消除寄生电容的方法,应用于权利要求9所述指纹辨识系统的所述像素电路,所述接触层与所述屏蔽层之间形成一寄生电容,所述方法包含有:
    于所述第一时间,提供所述第一电压至所述接触层及所述屏蔽层;以及
    于所述第二时间,将所述接触层与所述屏蔽层透过所述第一开关相互连接。
  22. 如权利要求21所述的寄生电容消除方法,其特征在于,于所述第二时间将所述接触层与所述屏蔽层透过所述第一开关相互连接包含:
    于所述第二时间,导通所述第一开关。
  23. 如权利要求21所述的寄生电容消除方法,其特征在于,另包含:
    于所述第二时间,所述感测电路对接触电容进行电容感测,以产生一输出电压。
PCT/CN2016/096587 2016-08-24 2016-08-24 电容判读电路及指纹辨识系统 WO2018035759A1 (zh)

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