WO2018027165A1 - Implémentation par mrof de forme d'onde à porteuse unique par blocs (bwsc) - Google Patents

Implémentation par mrof de forme d'onde à porteuse unique par blocs (bwsc) Download PDF

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Publication number
WO2018027165A1
WO2018027165A1 PCT/US2017/045568 US2017045568W WO2018027165A1 WO 2018027165 A1 WO2018027165 A1 WO 2018027165A1 US 2017045568 W US2017045568 W US 2017045568W WO 2018027165 A1 WO2018027165 A1 WO 2018027165A1
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WIPO (PCT)
Prior art keywords
signal
subband
communication device
single carrier
circuitry
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PCT/US2017/045568
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English (en)
Inventor
Hosein Nikopour
Shilpa Talwar
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Intel Corporation
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Publication of WO2018027165A1 publication Critical patent/WO2018027165A1/fr

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03828Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties
    • H04L25/03834Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties using pulse shaping
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/26Systems using multi-frequency codes
    • H04L27/2601Multicarrier modulation systems
    • H04L27/2626Arrangements specific to the transmitter only
    • H04L27/2627Modulators
    • H04L27/2634Inverse fast Fourier transform [IFFT] or inverse discrete Fourier transform [IDFT] modulators in combination with other circuits for modulation
    • H04L27/26362Subcarrier weighting equivalent to time domain filtering, e.g. weighting per subcarrier multiplication
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/26Systems using multi-frequency codes
    • H04L27/2601Multicarrier modulation systems
    • H04L27/2647Arrangements specific to the receiver only
    • H04L27/2649Demodulators
    • H04L27/26534Pulse-shaped multi-carrier, i.e. not using rectangular window

Definitions

  • Embodiments of the present invention relate generally to wireless
  • Block-wise single carrier (BWSC) waveform is a single carrier waveform with low peak to average power ratio (PAPR) and common frame structure as cyclic prefix (CP)-orthogonal frequency division multiplexing (OFDM).
  • PAPR peak to average power ratio
  • CP common frame structure as cyclic prefix
  • OFDM orthogonal frequency division multiplexing
  • Legacy implementations of single carrier waveforms may have the disadvantage that the chip rate of the modulated signal depends on the data rate and the allocated bandwidth.
  • the OFDM waveform (and its different variations) provide constant chip rate at the output of inverse fast Fourier transform (IFFT) OFDM modulator regardless of the allocated bandwidth and input data rate. It may be desirable to have the advantages of both these waveforms.
  • IFFT inverse fast Fourier transform
  • Fig. 1 shows a simplified block diagram is a block diagram illustrating an example user equipment (UE) useable in connection with various aspects described herein;
  • Figs. 2 and 3 show functional block diagrams of transmit (Tx) and receive (Rx) OFDM-based implementations of BWSC according to certain example
  • Figs. 4 and 5 show functional block diagrams of transmit (Tx) and receive (Rx) OFDM-based implementations of BWSC according to other example embodiments of the invention
  • Fig. 6 show a functional block diagram of multiple access using subband frequencies between multiple user equipment (UEs) and an evolved Node B (eNB) network access station using frequency division multiplexing (FDM) according to various embodiments;
  • UEs user equipment
  • eNB evolved Node B
  • FDM frequency division multiplexing
  • Fig. 7 shows a simulated example of FDM-like multiple access by filtering subbands of the OFDM-based BWSC of various embodiments
  • Fig. 8 shows an example block diagram of transmit (Tx) in OFDM-based implementations of BWSC with subband filtering for multiple access according to other example embodiments of the invention
  • Fig. 9 shows an example block diagram of receive (Rx) circuitry and processing in OFDM-based BWSC with subband filtering for multiple access according to other example embodiments of the invention
  • Fig. 10 shows an example block diagram of transmit (Tx) in OFDM-based implementations of BWSC with subband DFT filtering for multiple access according to other example embodiments of the invention.
  • Fig. 1 1 shows an example block diagram of receive (Rx) circuitry and processing in OFDM-based BWSC with subband filtering for multiple access according yet other embodiments of the disclosure.
  • block-wise single carrier (BWSC) waveform is a single carrier waveform with low peak to average power ratio (PAPR) and a same frame structure as cyclic prefix (CP)-orthogonal frequency division multiplexing (OFDM).
  • PAPR peak to average power ratio
  • CP cyclic prefix
  • OFDM orthogonal frequency division multiplexing
  • BWSC a potential waveform candidate for high bands of next generation wireless access networks such as 3GPP new radio (NR) or the like.
  • Legacy implementations of single carrier waveforms may have the
  • chip rate of the modulated signal depends on the data rate and the allocated bandwidth.
  • OFDM waveform (and its different variations) provide constant chip rate at the output of inverse fast Fourier transform (IFFT) OFDM modulator regardless of the allocated bandwidth and input data rate.
  • IFFT inverse fast Fourier transform
  • a component can be a processor (e.g., a microprocessor, a controller, or other processing device), a process running on a processor, a controller, an object, an executable, a program, a storage device, a computer, a tablet PC and/or a user equipment (e.g., mobile phone, etc.) with a processing device.
  • a processor e.g., a microprocessor, a controller, or other processing device
  • a process running on a processor e.g., a microprocessor, a controller, or other processing device
  • an object running on a server and the server
  • a user equipment e.g., mobile phone, etc.
  • an application running on a server and the server can also be a component.
  • One or more components can reside within a process, and a component can be localized on one computer and/or distributed between two or more computers.
  • a set of elements or a set of other components can be described herein, in which the term "set"
  • these components can execute from various computer readable storage media having various data structures stored thereon such as with a module, for example.
  • the components can communicate via local and/or remote processes such as in accordance with a signal having one or more data packets (e.g., data from one component interacting with another component in a local system, distributed system, and/or across a network, such as, the Internet, a local area network, a wide area network, or similar network with other systems via the signal).
  • a signal having one or more data packets (e.g., data from one component interacting with another component in a local system, distributed system, and/or across a network, such as, the Internet, a local area network, a wide area network, or similar network with other systems via the signal).
  • a component can be an apparatus with specific functionality provided by mechanical parts operated by electric or electronic circuitry, in which the electric or electronic circuitry can be operated by a software application or a firmware application executed by one or more processors.
  • the one or more processors can be internal or external to the apparatus and can execute at least a part of the software or firmware application.
  • a component can be an apparatus that provides specific functionality through electronic components without mechanical parts; the electronic components can include one or more processors therein to execute software and/or firmware that confer(s), at least in part, the functionality of the electronic components.
  • circuitry may refer to, be part of, or include an Application Specific Integrated Circuit (ASIC), an electronic circuit, a processor (shared, dedicated, or group), and/or memory (shared, dedicated, or group) that execute one or more software or firmware programs, a combinational logic circuit, and/or other suitable hardware components that provide the described functionality.
  • ASIC Application Specific Integrated Circuit
  • the circuitry may be implemented in, or functions associated with the circuitry may be implemented by, one or more software or firmware modules.
  • circuitry may include logic, at least partially operable in hardware.
  • FIG. 1 illustrates, for one embodiment of a wireless communication device, example components of a User Equipment (UE) device 100.
  • the UE device 100 may include application circuitry 102, baseband circuitry 104, Radio Frequency (RF) circuitry 1 06, front-end module (FEM) circuitry 1 08 and one or more antennas 1 10, coupled together at least as shown.
  • RF Radio Frequency
  • FEM front-end module
  • the application circuitry 102 may include one or more application processors.
  • the application circuitry 102 may include circuitry such as, but not limited to, one or more single-core or multi-core processors.
  • the processor(s) may include any combination of general-purpose processors and dedicated processors (e.g., graphics processors, application processors, etc.).
  • the processors may be coupled with and/or may include memory/storage and may be configured to execute instructions stored in the memory/storage to enable various applications and/or operating systems to run on the system.
  • the baseband circuitry 1 04 may include circuitry such as, but not limited to, one or more single-core or multi-core processors.
  • the baseband circuitry 1 04 may include one or more baseband processors and/or control logic to process baseband signals received from a receive signal path of the RF circuitry 106 and to generate baseband signals for a transmit signal path of the RF circuitry 106.
  • Baseband processing circuity 104 may interface with the application circuitry 102 for generation and processing of the baseband signals and for controlling operations of the RF circuitry 106.
  • the baseband circuitry 104 may include a second generation (2G) baseband processor 104a, third generation (3G) baseband processor 104b, fourth generation (4G) baseband processor 104c, and/or other baseband processor(s) 1 04d for other existing generations, generations in development or to be developed in the future (e.g., fifth generation (5G), 6G, etc.).
  • the baseband circuitry 1 04 e.g., one or more of baseband processors 104a-d
  • the radio control functions may include, but are not limited to, signal modulation/demodulation, encoding/decoding, radio frequency shifting, etc.
  • modulation/demodulation circuitry of the baseband circuitry 104 may include Fast-Fourier Transform (FFT), precoding, and/or constellation mapping/demapping functionality.
  • encoding/decoding circuitry of the baseband circuitry 104 may include convolution, tail-biting convolution, turbo, Viterbi, and/or Low Density Parity Check (LDPC) encoder/decoder functionality.
  • LDPC Low Density Parity Check
  • the baseband circuitry 104 may include elements of a protocol stack such as, for example, elements of an evolved universal terrestrial radio access network (EUTRAN) protocol including, for example, physical (PHY), media access control (MAC), radio link control (RLC), packet data convergence protocol (PDCP), and/or radio resource control (RRC) elements.
  • EUTRAN evolved universal terrestrial radio access network
  • a central processing unit (CPU) 104e of the baseband circuitry 1 04 may be configured to run elements of the protocol stack for signaling of the PHY, MAC, RLC, PDCP and/or RRC layers.
  • the baseband circuitry may include one or more audio digital signal processor(s) (DSP) 104f.
  • DSP audio digital signal processor
  • the audio DSP(s) 104f may be include elements for compression/decompression and echo cancellation and may include other suitable processing elements in other embodiments.
  • Components of the baseband circuitry may be suitably combined in a single chip, a single chipset, or disposed on a same circuit board in some embodiments.
  • some or all of the constituent components of the baseband circuitry 1 04 and the application circuitry 1 02 may be implemented together such as, for example, on a system on a chip (SOC).
  • SOC system on a chip
  • the baseband circuitry 104 may provide for communication compatible with one or more radio technologies.
  • the baseband circuitry 104 may support communication with an evolved universal terrestrial radio access network (EUTRAN) and/or other wireless metropolitan area networks (WMAN), a wireless local area network (WLAN), a wireless personal area network (WPAN).
  • EUTRAN evolved universal terrestrial radio access network
  • WMAN wireless metropolitan area networks
  • WLAN wireless local area network
  • WPAN wireless personal area network
  • multi-mode baseband circuitry Embodiments in which the baseband circuitry 104 is configured to support radio communications of more than one wireless protocol.
  • RF circuitry 106 may enable communication with wireless networks using modulated electromagnetic radiation through a non-solid medium.
  • the RF circuitry 106 may include switches, filters, amplifiers, etc. to facilitate the communication with the wireless network.
  • RF circuitry 106 may include a receive signal path which may include circuitry to down-convert RF signals received from the FEM circuitry 108 and provide baseband signals to the baseband circuitry 1 04.
  • RF circuitry 1 06 may also include a transmit signal path which may include circuitry to up-convert baseband signals provided by the baseband circuitry 104 and provide RF output signals to the FEM circuitry 108 for transmission.
  • the RF circuitry 106 may include a receive signal path and a transmit signal path.
  • the receive signal path of the RF circuitry 106 may include mixer circuitry 106a, amplifier circuitry 106b and filter circuitry 1 06c.
  • the transmit signal path of the RF circuitry 106 may include filter circuitry 1 06c and mixer circuitry 106a.
  • RF circuitry 1 06 may also include synthesizer circuitry 106d for synthesizing a frequency for use by the mixer circuitry 1 06a of the receive signal path and the transmit signal path.
  • the mixer circuitry 106a of the receive signal path may be configured to down-convert RF signals received from the FEM circuitry 108 based on the synthesized frequency provided by synthesizer circuitry 106d.
  • the amplifier circuitry 106b may be configured to amplify the down-converted signals and the filter circuitry 106c may be a low-pass filter (LPF) or band-pass filter (BPF) configured to remove unwanted signals from the down-converted signals to generate output baseband signals.
  • LPF low-pass filter
  • BPF band-pass filter
  • Output baseband signals may be provided to the baseband circuitry 104 for further processing.
  • the output baseband signals may be zero- frequency baseband signals, although this is not a requirement.
  • mixer circuitry 106a of the receive signal path may comprise passive mixers, although the scope of the embodiments is not limited in this respect.
  • the mixer circuitry 1 06a of the transmit signal path may be configured to up-convert input baseband signals based on the synthesized frequency provided by the synthesizer circuitry 106d to generate RF output signals for the FEM circuitry 108.
  • the baseband signals may be provided by the baseband circuitry 104 and may be filtered by filter circuitry 106c.
  • the filter circuitry 106c may include a low-pass filter (LPF), although the scope of the embodiments is not limited in this respect.
  • the mixer circuitry 106a of the receive signal path and the mixer circuitry 106a of the transmit signal path may include two or more mixers and may be arranged for quadrature downconversion and/or upconversion respectively.
  • the mixer circuitry 106a of the receive signal path and the mixer circuitry 106a of the transmit signal path may include two or more mixers and may be arranged for image rejection (e.g., Hartley image rejection).
  • the mixer circuitry 106a of the receive signal path and the mixer circuitry 1 06a may be arranged for direct downconversion and/or direct upconversion, respectively.
  • the mixer circuitry 1 06a of the receive signal path and the mixer circuitry 106a of the transmit signal path may be configured for super-heterodyne operation.
  • the output baseband signals and the input baseband signals may be analog baseband signals, although the scope of the embodiments is not limited in this respect.
  • the output baseband signals and the input baseband signals may be digital baseband signals.
  • the RF circuitry 1 06 may include analog-to-digital converter (ADC) and digital-to-analog converter (DAC) circuitry and the baseband circuitry 1 04 may include a digital baseband interface to communicate with the RF circuitry 106.
  • ADC analog-to-digital converter
  • DAC digital-to-analog converter
  • a separate radio IC circuitry may be provided for processing signals for each spectrum, although the scope of the embodiments is not limited in this respect.
  • the synthesizer circuitry 106d may be a fractional-N synthesizer or a fractional N/N+1 synthesizer, although the scope of the embodiments is not limited in this respect as other types of frequency synthesizers may be suitable.
  • synthesizer circuitry 106d may be a delta-sigma synthesizer, a frequency multiplier, or a synthesizer comprising a phase-locked loop with a frequency divider.
  • the synthesizer circuitry 106d may be configured to synthesize an output frequency for use by the mixer circuitry 106a of the RF circuitry 106 based on a frequency input and a divider control input. In some embodiments, the synthesizer circuitry 106d may be a fractional N/N+1 synthesizer.
  • Frequency input may be provided by a voltage controlled oscillator (VCO), although that is not a requirement.
  • VCO voltage controlled oscillator
  • Divider control input may be provided by either the baseband circuitry 104 or the applications processor 102 depending on the desired output frequency.
  • a divider control input (e.g., N) may be determined from a look-up table based on a channel indicated by the applications processor 102.
  • Synthesizer circuitry 1 06d of the RF circuitry 106 may include a divider, a delay-locked loop (DLL), a multiplexer and a phase accumulator.
  • the divider may be a dual modulus divider (DMD) and the phase accumulator may be a digital phase accumulator (DPA).
  • the DMD may be configured to divide the input signal by either N or N+1 (e.g., based on a carry out) to provide a fractional division ratio.
  • the DLL may include a set of cascaded, tunable, delay elements, a phase detector, a charge pump and a D-type flip- flop.
  • the delay elements may be configured to break a VCO period up into Nd equal packets of phase, where Nd is the number of delay elements in the delay line. In this way, the DLL provides negative feedback to help ensure that the total delay through the delay line is one VCO cycle.
  • Synthesizer circuitry 1 06d may be configured to generate a carrier frequency as the output frequency, while in other embodiments, the output frequency may be a multiple of the carrier frequency (e.g., twice the carrier frequency, four times the carrier frequency) and used in conjunction with quadrature generator and divider circuitry to generate multiple signals at the carrier frequency with multiple different phases with respect to each other.
  • the output frequency may be a LO frequency (LO).
  • the RF circuitry 106 may include an IQ/polar converter.
  • FEM circuitry 108 may include a receive signal path which may include circuitry configured to operate on RF signals received from one or more antennas 1 10, amplify the received signals and provide the amplified versions of the received signals to the RF circuitry 106 for further processing.
  • FEM circuitry 108 may also include a transmit signal path which may include circuitry configured to amplify signals for transmission provided by the RF circuitry 1 06 for transmission by one or more of the one or more antennas 1 10.
  • the FEM circuitry 108 may include a TX/RX switch to switch between transmit mode and receive mode operation.
  • the FEM circuitry may include a receive signal path and a transmit signal path.
  • the receive signal path of the FEM circuitry may include a low-noise amplifier (LNA) to amplify received RF signals and provide the amplified received RF signals as an output (e.g., to the RF circuitry 106).
  • LNA low-noise amplifier
  • the transmit signal path of the FEM circuitry 108 may include a power amplifier (PA) to amplify input RF signals (e.g., provided by RF circuitry 1 06), and one or more filters to generate RF signals for subsequent transmission (e.g., by one or more of the one or more antennas 1 10.
  • PA power amplifier
  • the UE device 100 may include additional elements such as, for example, memory/storage, display, camera, sensor, and/or input/output (I/O) interface.
  • I/O input/output
  • Various components of UE device 100 are adapted to, or cause to, perform the unique functionality for OFDM-based implementation of BWSC waveforms for communicating over-the-air with wireless network infrastructure such as a base station or e-Node B as explained in example detail embodiments hereinafter.
  • one advantage of OFDM may be that the chip rate at the output of IFFT OFDM modulator may be independent of the allocated bandwidth and input data rate. This can enable BWSC to be implemented as an OFDM-based waveform with fix chip rate feature. The allocated system bandwidth and input data rate may not impact the output modulated signal chip rate.
  • An example of OFDM-based implementation of BWSC circuitry and processes is illustrated in Fig. 2 and Fig. 3 for Tx and Rx, respectively.
  • the base fast Fourier transform (FFT) size of OFDM is N but larger out-of-band spectrum can be spectrally shaped if upsampling rate i is selected as an integer greater than 1 . Therefore, the useful system bandwidth may be
  • the spectral shaping filter and match filter may be applied in the frequency domain as frequency domain windows.
  • a plurality of quadrature amplitude modulated (QAM) symbols (if data symbols rather than non-data pilots) of N use ⁇ N may be spectrally shaped applying 205 a discrete Fourier transform (DFT), zero padding 210 to adjust the chip rate from N use samples per block to N samples and repeating 215 for upsampling rate U. Repetition in frequency may be equivalent to time upsampling to cover wider range of out-of-band for spectral shaping.
  • shaping filtering 216 is applied at frequency windowing 217.
  • An inverse fast Fourier transform (IFFT) is applied 218 to form a block of UN samples and, if desired, a cyclic prefix (CP) is inserted 220 to form a BWSC data symbol.
  • IFFT inverse fast Fourier transform
  • CP cyclic prefix
  • shaping filter 21 6 and match filter 316 are defined with clock rate UN samples per block.
  • the bandwidth of these filters depends on the useful system bandwidth which is again, represented by N use -
  • the chip rate of the modulated symbol may be UN samples per block and may be independent of the system useful bandwidth.
  • Tx procedure 200 is shown for transmitting both data symbols 202 and non-data carrying training symbols, also referred to as pilot symbols 222.
  • Rx procedure 300 is shown for receiving data symbols 302 and pilot or training symbols 322.
  • the difference being pilot symbols 222, 322 do not need quadrature amplitude modulation (QAM)/ demodulation for training subcarriers because not data is present.
  • the uplink and downlink modulation techniques or waveforms used need not be reciprocal.
  • OFDM-based BWSC may be used in the uplink and orthogonal frequency division multiple access (OFDMA) in the downlink.
  • OFDM-based BWSC may be used in the uplink and orthogonal frequency division multiple access (OFDMA) in the downlink.
  • OFDM-based BWSC may be used in the uplink and orthogonal frequency division multiple access (OFDMA) in the downlink.
  • Tx procedure 200 may be implemented in, for example, a User Equipment (UE) as described by circuitry above and Rx procedure 300 (Fig.3) may be implemented in a base station or evolved Node B (eNB).
  • UE User Equipment
  • eNB evolved Node B
  • the shaping and match filters 41 6, 516 can be defined with clock rate of UN use samples per block instead of UN samples per block as in the previous embodiments.
  • Detailed block diagrams of these alternative embodiments are described in reference to the OFDM-based use of BWSC modulation and demodulation in the transmit 400 and receive 500 methods of Figs. 4 and 5 respectively.
  • the clock rate of designed shaping filter 416 of the transmitter 400 and match filter 51 6 of the receiver 500 are assumed UN use samples per block.
  • the upsampling rate U should be at least two (2). Zero padding can be added to match the chip rate to UN samples per block.
  • the chip rate is independent of the useful bandwidth N use .
  • the subband scheduling may be an important feature for the uplink transmission.
  • Subband scheduling helps power-limited uplink users to improve their coverage by increasing the power spectral density (PSD) over a narrower allocated bandwidth.
  • PSD power spectral density
  • FDM frequency division multiplexing
  • multiple users/UEs are supported if multiple RF chains are available at a receive node, e.g., eNode B, to form multiple Rx beams; one toward each multiplexed user.
  • a baseband processing approach may enable subband scheduling for BWSC.
  • Spectrum shaping/filtering techniques can be used in combination with BWSC modulation to form the spectrum of a user within a subband of the entire system bandwidth.
  • the concept of the FDM-like user multiplexing over BWSC waveform is illustrated in Fig. 6.
  • the total number of QAM symbols M(Vk) after upsampling M(Vk) R(Vk) N, where N is the base OFDM FFT size used for a BWSC block.
  • N is the base OFDM FFT size used for a BWSC block.
  • the PAPR of the BWSC signal may maintain the same as the original wideband BWSC.
  • the combination of upsampling and subband filtering is somewhat comparable to techniques of CDMA spreading.
  • the subband processing may be comparable to a correlator in CDMA implementations. Therefore, the above structure may provide a baseband processing technique to enable an efficient orthogonal subband scheduling for uplink users.
  • OFDM-based implementation of BWSC may be extended to the uplink subband scheduling with flexible allocated bandwidth and guard bands between adjacent subbands.
  • Tx method 800 and Rx method 900 of OFDM-based implementation of BWSC with subband scheduling is illustrated in Fig. 8 and Fig. 9, respectively.
  • the base FFT size of OFDM may be N, but larger out-of-band spectrum can be spectrally shaped if upsampling rate i is selected as an integer greater than one (1 ).
  • a useful system bandwidth may be N use ⁇ N.
  • the input QAM data symbol length may be M ⁇ B.
  • DFT is applied 803 to M data symbols.
  • both spectral shaping and match filtering 81 6 and the subband filtering 81 7 may be conducted in frequency domain. Depending on the clock rate of the designed filters, they might be applied in the different stages of the Tx and Rx procedures.
  • the clock rate of the shaping and matching filters 81 6, 917 and/or subband filters 817, 91 7 may be NU samples per BWSC block.
  • two (2) zero padding 804 adjusts the chip rate from M to B for subband scheduling, and then from N use to N samples per block for spectrum shaping 81 0, respectively.
  • repetition 815 in the frequency domain is equivalent to time upsampling to enable subband scheduling or cover wider range of out-of-band for spectral shaping.
  • chip rate of the modulated symbol may be UN samples per block and is independent of the user allocated bandwidth as with embodiments of Figs. 4 and 5.
  • These alternate embodiments also may similarly be comparable as a generalization of LTE SC-FDMA waveform (DFT-s- OFDM) with lower out of-band emission and lower PAPR.
  • the optional guard band 804 may be B - M. Including the guard band facilitates frequency, non-overlapped (at least primarily), asynchronous transmission for high band frequencies.
  • the size of the guard band depends on the subband filter frequency localization and requirements for the separation of adjacent subbands (e.g., S1 -S8; Fig. 7).
  • Tx and Rx procedures 1000 and 1 100 of OFDM-based BWSC with subband scheduling can be implemented with frequency domain windowing which has UN use samples per block based on shaping/matching filtering 1016, 1 1 16 and subband filtering 101 7, 1 1 1 7.
  • a communication device comprises a spectrum shaping circuit including at least one of a transmit shaping filter or a receive matching filter and adapted to perform spectral shaping of an input or receive signal to or from a single carrier signal; and one of an inverse fast Forrier transform (IFFT) or an FFT circuit to transform blocks of the single carrier signal into or from an orthogonal frequency division multiplexed (OFDM)-based block wise single carrier (BWSC) signal.
  • IFFT inverse fast Forrier transform
  • OFDM orthogonal frequency division multiplexed
  • BWSC block wise single carrier
  • a Second Example according to the First Example further comprises a subband scheduler circuit, including a subband filter, said subband filter to filter subbands of the BWSC signal according to a multiple access protocol.
  • a Sixth Example further defines the Fifth Example, wherein the
  • the communication device comprises a baseband processor.
  • UE User Equipment
  • a wireless communication device comprises, subband scheduler circuitry adapted to, or cause to, schedule transmission of a plurality of quadrature amplitude modulated (QAM) data symbols to be sent at a subband within a limited plurality of subbands of an available frequency bandwidth to provide multiple user access across the limited plurality of subbands of the available frequency bandwidth; spectrum shaper circuitry in communication with the subband scheduler circuitry, the spectrum shaper circuitry configured to apply discrete Fourier transform (DFT) shaping filtering and subband scheduling filtering in a frequency domain single carrier signal; and an inverse fast Fourier transform (IFFT) circuit to transform blocks of the frequency domain single carrier signal into an orthogonal frequency division multiplexed (OFDM) waveform to enable over the air transmission of the QAM data symbols as a block wise single carrier (BWSC) data symbol.
  • DFT discrete Fourier transform
  • IFFT inverse fast Fourier transform
  • a Ninth Example further defines the Eighth Example wherein the IFFT circuit further configured to insert a cyclic prefix (CP) to the blocks of the OFDM waveform.
  • CP cyclic prefix
  • a Tenth Example is the device of either the Eighth or Ninth Examples wherein a clock rate of the shaping filtering is an upsampling rate U multiplied by a number of total samples N per block.
  • An Eleventh Example is the device of either the Eighth or Ninth Examples wherein a clock rate of the shaping filtering is an upsampling rate U multiplied by a number of useful bandwidth samples Nuse, Nuse being less than a number of total samples N per block and wherein U is an integer greater than or equal to 2.
  • a Twelfth Example device further defines the Eleventh Example wherein spectrum shaping circuitry is further adapted to effect zero padding a difference between the number of total samples N per block and the number of useful bandwidth samples Nuse.
  • a Thirteenth Example is the device of either the Eighth or Ninth Examples, wherein the wireless communication device comprises a User Equipment (UE) mobile device.
  • UE User Equipment
  • a Fourteenth Example embodiment is a wireless communication device comprising a fast Fourier transform (FFT) circuit to transform received orthogonal frequency division multiplexing (OFDM)-based block wise single carrier (BWSC) data symbols into a single carrier signal; and spectrum shaper circuitry in communication with the FFT circuit, the spectrum shaper circuitry configured to apply frequency domain windowing to the FFT transformed single carrier signal including inverse discrete Fourier transform (iDFT) match filtering and multiple access subband filtering to downsample said single carrier signal to a plurality of quadrature amplitude modulated (QAM) symbols scheduled for a given user by an allocated subband.
  • FFT fast Fourier transform
  • OFDM orthogonal frequency division multiplexing
  • BWSC block wise single carrier
  • a Fifteenth Example further defines the Fourteenth Example wherein a clock rate of the match filtering is a sampling rate U multiplied by a number of total samples N per block.
  • a Sixteenth Example further defines the Fourteenth Example wherein a clock rate of the match filtering is a sampling rate U multiplied by a number of useful bandwidth samples Nuse, Nuse being less than a number of total number of samples N per block, and wherein U is an integer greater than or equal to 2.
  • a Seventeenth Example further defines the Sixteenth Example, wherein spectrum shaping circuitry is further configured to remove zero padding from a difference between the number of total samples N per block and the number of useful bandwidth samples Nuse.
  • An Eighteenth Example embodiment is the device of any of the Fourteenth through Seventeenth Examples wherein the wireless communication device comprises at least a portion of an evolved Node B (eNB) network access station.
  • eNB evolved Node B
  • a Nineteenth Example embodiment describes a method for wireless communication comprising, applying a discrete Fourier transform (DFT) to a finite series of quadrature amplitude modulated (QAM) symbols to form a signal; frequency domain windowing the signal including applying a shaping filter DFT and a multiple access subband filter DFT to form a modified signal; and forming blocks of an orthogonal frequency division multiplexing (OFDM) signal by applying an inverse fast Fourier transform (IFFT) to the modified signal to generate a block wise single carrier (BWSC) signal with multiple access subband user scheduling.
  • DFT discrete Fourier transform
  • QAM quadrature amplitude modulated
  • OFDM orthogonal frequency division multiplexing
  • IFFT inverse fast Fourier transform
  • a Twentieth Example further defines the method of the Nineteenth Example by zero padding at least one of the signal or the modified signal to accommodate at least one of a guard band or a difference between usable bandwidth and total available bandwidth.
  • a Twenty First Example embodiment further defines the Twentieth Example by adding a cylic prefix to each of the formed blocks of the OFDM signal.
  • a Twenty Second Example may be any of the Nineteenth thru Twenty-First Examples wherein the method is performed by at least a portion of a User Equipment (UE).
  • UE User Equipment
  • a Twenty Third Example embodiment describes a wireless communication device comprising, means for applying a discrete Fourier transform (DFT) to a finite series of quadrature amplitude modulated (QAM) symbols to form a signal; means for frequency domain windowing the signal including applying a shaping filter DFT and a multiple access subband filter DFT to form a modified signal; and means for forming blocks of an orthogonal frequency division multiplexing (OFDM) signal by applying an inverse fast Fourier transform (IFFT) to the modified signal to generate a block wise single carrier (BWSC) signal with multiple access subband user scheduling.
  • a Twenty Fourth Example embodiment further defines the Twenty Third Example further comprising means for zero padding at least one of the signal or the modified signal to accommodate at least one of a guard band or a difference between usable bandwidth and total available bandwidth.
  • a Twenty Fifth Example embodiment further defines the Twenty Third Example further comprising means for adding a cylic prefix to each of the formed blocks of the OFDM signal.
  • UE User Equipment
  • a Twenty Seventh Example embodiment further defines the wireless communication device of any of the First through Fourth Examples, wherein spectrum shaping circuitry is further adapted to effect zero padding a difference between the number of total samples N per block and the number of useful bandwidth samples Nuse.
  • a Twenty Eight Example furthers the wireless communication device of any of the First through Fourth and Twenty Seventh Examples, wherein the wireless communication device comprises a User Equipment (UE) mobile device.
  • UE User Equipment
  • a Twenty Ninth Example further defines the wireless communication device of any of the Fourteenth through Sixteenth Examples, wherein spectrum shaping circuitry is further configured to remove zero padding from a difference between the number of total samples N per block and the number of useful bandwidth samples Nuse.
  • a Thirtieth Example further defines the wireless communication device of any of the Fourteenth through Sixteenth Examples, wherein the wireless communication device comprises at least a portion of an evolved Node B (eNB) network access station.
  • eNB evolved Node B
  • UE User Equipment
  • a Thirty Third Example embodiment defines an apparatus configured to be employed in a User Equipment (UE), and comprises a memory interface, and one or more processors configured to receive instructions via the memory interface. Upon execution of the received instructions the one or more processor are configured to perform spectral shaping of an input or receive signal to or from a single carrier signal using a transmit shaping filtering process or a receive matching filtering process, and perform one of an inverse fast Fourier transform (IFFT) or employ an FFT circuit to transform blocks of the single carrier signal into or from an orthogonal frequency division multiplexed (OFDM)-based block wise single carrier (BWSC) signal.
  • IFFT inverse fast Fourier transform
  • OFDM orthogonal frequency division multiplexed
  • a Thirty Fourth Example embodiment defines the apparatus of Example Thirty Three, wherein the one or more processors are further configured to filter subbands of the BWSC signal according to a multiple access protocol using a subband filter process.
  • a Thirty Fifth Example embodiment defines the apparatus of Example Thirty Four, wherein the one or more processors are configured to, or cause to, convert a plurality of incoming time domain data symbols into a frequency domain, and shift and overlap the converted signal according to one of a plurality of user subband scheduling protocols, prior to the IFFT processing or the IFFT circuit.
  • a Thirty Sixth Example embodiment defines the apparatus of Example Thirty Four wherein the one or more processors are configured to retrieve an incoming plurality of time domain symbols from a frequency domain signal by shift and overlap of the frequency domain signal according to one of a plurality of user subband scheduling protocols after the FFT processing or the IFFT circuit.
  • a Thirty Seventh Example embodiment defines the apparatus of either of Examples Thirty Three or Thirty Four wherein the one or more processor are configured to, or cause to, add or remove zero padding and apply frequency domain windowing including applying said transmit shaping filter or receive matching filter to the input or receive signal, and apply subband filtering to enable multiple access subband
  • a Thirty Eight Example embodiment defines an apparatus configured to be employed in a User Equipment (UE), and comprises means for applying a discrete Fourier transform (DFT) to a finite series of quadrature amplitude modulated (QAM) symbols to form a signal, means for frequency domain windowing the signal including applying a shaping filter DFT and a multiple access subband filter DFT to form a modified signal, and means for forming blocks of an orthogonal frequency division multiplexing (OFDM) signal by applying an inverse fast Fourier transform (IFFT) to the modified signal to generate a block wise single carrier (BWSC) signal with multiple access subband user scheduling.
  • DFT discrete Fourier transform
  • QAM quadrature amplitude modulated
  • OFDM orthogonal frequency division multiplexing
  • IFFT inverse fast Fourier transform
  • a Thirty Ninth Example embodiment defines the apparatus of Example Thirty Eight, and further comprises means for zero padding at least one of the signal or the modified signal to accommodate at least one of a guard band or a difference between usable bandwidth and total available bandwidth.
  • a Fortieth Example embodiment defines the apparatus of Example Thirty Nine, and further comprises means for adding a cylic prefix to each of the formed blocks of the OFDM signal.
  • ком ⁇ онент As utilized herein, the terms “component,” “system,” “interface,” “logic,” “circuit,” “device,” and the like are intended only to refer to a basic functional entity such as hardware, designs, software (e.g., in execution), logic (circuits or programmable), firmware alone or in combination to suit the claimed functionalities.
  • a component, module, device or processing unit may mean a
  • microprocessor a controller, a programmable logic array and/or a circuit coupled thereto or other logic processing device, and a method or process may mean instructions running on a processor, firmware programmed in a controller, an object, an executable, a program, a storage device including instructions to be executed, a computer, a tablet PC and/or a mobile phone with a processing device.
  • a process, logic, method or module can be any analog circuit, digital processing circuit or combination thereof.
  • One or more circuits or modules can reside within a process, and a module can be localized as a physical circuit, a programmable array, a processor.
  • elements, circuits, components, modules and processes/methods may be hardware or software, combined with a processor, executable from various computer readable storage media having executable instructions and/or data stored thereon.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
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  • Spectroscopy & Molecular Physics (AREA)
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  • General Physics & Mathematics (AREA)
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Abstract

Des procédés et des architectures pour l'implémentation d'une porteuse unique par blocs utilisant le multiplexage par répartition orthogonale de la fréquence (MROF) comprennent l'ordonnancement d'une transmission d'utilisateurs d'une pluralité de symboles de données à modulation d'amplitude en quadrature (QAM) devant être envoyés à une sous-bande dans une pluralité limitée de sous-bandes d'une largeur de bande de fréquence disponible pour fournir un accès utilisateur multiple sur la pluralité limitée de sous-bandes. Un circuit de mise en forme de spectre applique un filtrage de mise en forme de transformation de Fourier discrète (TFD) et un filtrage de planification de sous-bande dans un signal de porteuse unique de domaine de fréquence. Un circuit de transformation de Fourier rapide inverse (TFRI) transforme des blocs du signal de porteuse unique dans le domaine fréquentiel en un signal multiplexé par une forme d'onde MROF pour permettre la transmission par liaison radio des symboles de données QAM en tant que symbole de données de porteuse unique par blocs (BWSC).
PCT/US2017/045568 2016-08-05 2017-08-04 Implémentation par mrof de forme d'onde à porteuse unique par blocs (bwsc) WO2018027165A1 (fr)

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* Cited by examiner, † Cited by third party
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WO2024124465A1 (fr) * 2022-12-15 2024-06-20 Huawei Technologies Co., Ltd. Procédés et appareil de communication de signaux à porteuse unique

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