WO2018008065A1 - Liquid crystal display panel and liquid crystal display apparatus - Google Patents

Liquid crystal display panel and liquid crystal display apparatus Download PDF

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Publication number
WO2018008065A1
WO2018008065A1 PCT/JP2016/069798 JP2016069798W WO2018008065A1 WO 2018008065 A1 WO2018008065 A1 WO 2018008065A1 JP 2016069798 W JP2016069798 W JP 2016069798W WO 2018008065 A1 WO2018008065 A1 WO 2018008065A1
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Prior art keywords
liquid crystal
crystal display
shield electrode
display panel
shield
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PCT/JP2016/069798
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French (fr)
Japanese (ja)
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長谷川　浩二
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堺ディスプレイプロダクト株式会社
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Priority to PCT/JP2016/069798 priority Critical patent/WO2018008065A1/en
Publication of WO2018008065A1 publication Critical patent/WO2018008065A1/en

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device

Definitions

  • the present invention relates to a liquid crystal display panel and the like.
  • a liquid crystal display panel employed in many display devices has an array substrate and a counter substrate facing the array substrate arranged to face each other at a predetermined interval, and liquid crystal is filled between the array substrate and the counter substrate. ing.
  • pixel electrodes for applying a voltage to the liquid crystal switching elements such as thin film transistors for driving the pixel electrodes, and various wirings such as data signal lines are formed in a stacked manner.
  • a black matrix, a color filter of a predetermined color, a transparent electrode, and the like are similarly formed in a laminated form.
  • the liquid crystal display panel described in Patent Document 1 has a weaker electric field from the data signal line to the pixel electrode by disposing the shield electrode between the plurality of pixel electrodes than when the shield electrode is not disposed. This suppresses the parasitic capacitance between the data signal line and the pixel electrode.
  • the present invention has been made in view of such circumstances, and an object of the present invention is to provide a liquid crystal display panel or the like that can sufficiently enhance the effect of improving the display quality of the liquid crystal display panel.
  • the liquid crystal display panel according to the present invention is a liquid crystal display panel in which liquid crystal is filled between two opposingly arranged substrates, a data signal line disposed on one of the two substrates, and the data signal line And a plurality of first shield electrodes formed on the first shield electrode and a second shield electrode disposed opposite to each of the plurality of first shield electrodes.
  • the liquid crystal display device includes a liquid crystal display panel as a display unit.
  • the effect of improving the display quality of the liquid crystal display panel can be sufficiently enhanced.
  • FIG. 6 is a cross-sectional view showing a main part of a liquid crystal display device according to Embodiment 2.
  • FIG. 6 is a cross-sectional view showing a main part of a liquid crystal display device according to Embodiment 4.
  • FIG. 1 is a cross-sectional view showing a liquid crystal display device.
  • the illustrated liquid crystal display device includes a liquid crystal display panel 1 for image display, and a backlight 2 that irradiates the liquid crystal display panel 1 with light.
  • the image display surface side of the liquid crystal panel 1 is the front surface, and the other side is the back surface.
  • the backlight 2 is configured by arranging a plurality of LEDs 22 vertically and horizontally on the bottom plate of the backlight chassis 20 formed in a shallow box shape, and covering the opening of the backlight chassis 20 with a diffusion plate 23.
  • the bottom plate of the backlight chassis 20 is covered over the entire surface except for the positions where the plurality of LEDs 22 are disposed with a reflection sheet 24 having excellent light reflectivity. Is emitted through a diffusion plate 23 that diffuses the light evenly.
  • the liquid crystal display device is disposed in front of the backlight 2 described above, and an optical sheet 21 is disposed between the liquid crystal display panel 1 and the liquid crystal display device.
  • the liquid crystal display device in this embodiment is a direct type, but may be an edge light type.
  • the liquid crystal display device may be other than the direct type or the edge light type, and the direct type or the edge light type is an example, and the liquid crystal display device is not limited to this.
  • FIG. 2 is an enlarged sectional view showing the liquid crystal display panel 1.
  • the upper side of FIG. 2 is the front side of the liquid crystal display device 1, and the lower side is the back side of the liquid crystal display device 1.
  • the liquid crystal display panel 1 includes an array substrate 11 having signal lines formed on the substrate, a counter substrate 12 facing the array substrate 11, and a liquid crystal layer 13 filled between the array substrate 11 and the counter substrate 12.
  • the array substrate 11 includes the substrate 111, a polarizing plate 112 that covers the back side of the substrate 111, first shield electrodes 113 formed on the front side of the substrate 111 at predetermined intervals, and positions where the first shield electrodes 113 are formed. Including the insulating film 114 covering the front surface of the substrate 111, the second shield electrode 116 formed at a predetermined interval on the front surface side of the insulating film 114, and the plurality of second shield electrodes 116 on the insulating film 114.
  • the counter substrate 12 includes a substrate 121, a polarizing plate 122 that covers the front side of the substrate 121, a color filter 124 formed at a predetermined interval on the back side of the substrate 121, and a black matrix 123 provided between the color filters 124. And a counter electrode 125 formed on the back side of the color filter 124.
  • the substrates 111 and 121 are, for example, substrates made of glass or transparent resin.
  • the polarizing plates 112 and 122 polarize incoming and outgoing light in a specific direction.
  • the light passing through the polarizing plate 112 and the light passing through the polarizing plate 122 have a polarization direction different by 90 degrees.
  • the first shield electrode 113 and the second shield electrode 116 are made of an opaque conductive material such as aluminum, titanium, silver, molybdenum, tungsten, copper, or chromium.
  • the first shield electrode 113 is disposed along the data signal line 115.
  • the first shield electrode 113 and the second shield electrode 116 may be made of a transparent conductive material such as ITO (indium tin oxide) or IZO (indium zinc oxide).
  • the second shield electrode 116 is provided at a position facing the first shield electrode 113 toward the counter substrate 12 with the insulating film 114 interposed therebetween.
  • Arbitrary potentials may be supplied to the first shield electrode 113 and the second shield electrode 116, and the potential may coincide with the potential common to all pixels (common potential).
  • the first shield electrode 113 and the second shield electrode 116 may be connected within the display area of the liquid crystal display panel 1 or outside the display area of the liquid crystal display panel 1, and further connected outside the liquid crystal display panel 1. May be.
  • the width of the first shield electrode 113 in the left-right direction is the same as the width of the second shield electrode 116, and both ends in the left-right direction are made to coincide with both ends of the second shield electrode 116.
  • the liquid crystal display panel 1 has auxiliary capacitance wiring.
  • the liquid crystal display panel 1 can change the pixel potential from the potential of the data signal line by changing the potential of the auxiliary capacitance wiring (auxiliary capacitance potential).
  • auxiliary capacitance potential auxiliary capacitance potential
  • the insulating films 114, 117 and 118 are made of, for example, an inorganic material or an organic material such as silicon nitride.
  • a potential common to all pixels is applied to the transparent electrode 125, and a potential (pixel potential) for each pixel is applied to the pixel electrode 119.
  • a voltage corresponding to the potential difference between the common potential and the pixel potential is applied to the liquid crystal layer 13 to change the alignment of the liquid crystal and obtain a desired display.
  • the color filter 124 is formed of a colored resin material on the substrate 121, absorbs light other than a predetermined wavelength component out of light passing through the pixel opening, and transmits only light having a wavelength corresponding to each color. To do.
  • the black matrix 123 blocks light leaking from between the color filters 124.
  • the data signal line 115 is disposed between the array substrate 11 and the liquid crystal layer 13. Note that the black matrix 123 or the color filter 124 may be provided on either the substrate 111 or the substrate 121.
  • the parasitic capacitance generated in the data signal line 115 will be described. Table 1 below shows the parasitic capacitance generated in the data signal line 115 in various structures.
  • FIG. 3 is a cross-sectional view showing the structure around the data signal line 115.
  • Table 1 will be described with reference to FIG.
  • Structure A shows a structure in which the shield electrode 14 is disposed at a position facing the data signal line 115 with the insulating films 114 and 118 interposed therebetween (FIG. 3A).
  • the structure B shows a structure in which the data signal line 115 is arranged between the pair of first shield electrodes 113 and the second shield electrode 116 shown in the first embodiment is not arranged (FIG. 3B).
  • a structure C is a structure described in Patent Document 1, and shows a structure in which a common electrode that applies a potential common to all pixels is arranged between a plurality of pixel electrodes 119 (FIG. 3C).
  • the data line-pixel capacitance shown in Table 1 indicates a parasitic capacitance generated from the pixel electrode 119 to the data signal line 115.
  • the data line-conductor capacitance indicates the parasitic capacitance from all conductors to the data signal line 115 in each figure.
  • the data line-pixel capacitance and the data line-conductor capacitance are represented by relative values where the parasitic capacitance in the structure A is 1.
  • a structure D shown in FIG. 3D is a structure in the vicinity of the data signal line 115 proposed so far for the purpose of reducing the capacitance between the data line and the pixel, and is a shield electrode that covers the data signal line 115 via the insulating film 114. 16.
  • the data line-pixel capacitance is reduced by increasing the electric field from the data line to the shield electrode.
  • the fluctuation of the pixel potential due to the fluctuation of the potential of the data signal line is suppressed, and the display quality of the liquid crystal display panel 1 having the structure D is improved as compared with the liquid crystal display panel 1 having the structures A to C.
  • the effect of the data line-pixel capacitance and the data line-conductor capacitance on the display quality is as follows.
  • the capacitance between the data line and the pixel is high, the potential of the pixel electrode varies due to the potential variation of the data signal line 115, and the display quality of the liquid crystal display panel deteriorates because the potential of the pixel electrode is different from the intended potential.
  • the capacitance between the data line and the conductor is high, the load on the data signal line 115 is increased and the data line signal is delayed. As a result, the voltage of the data signal line 115 cannot reach the intended voltage, and the pixel potential is intended.
  • the display quality of the liquid crystal display panel 1 deteriorates due to the difference from the voltage.
  • the data line-pixel capacitance and the data line-conductor capacitance will be compared between the structure of the first embodiment and the structures A to C.
  • the second shield electrode 116 is disposed on the first shield electrode 113 as compared with the structure B, the electric field from the data signal line 115 to the pixel electrode 119 is shielded compared to the structure B.
  • the data line-pixel capacitance is reduced by 14 percent compared to structure B.
  • the present embodiment has the same effect as that of the structure A in shielding the electric field from the data signal line 115 to the pixel electrode 119, and can reduce the data line-conductor capacitance from the structure A.
  • the data line-conductor capacitance is reduced by 19 percent compared to structure A. That is, the present embodiment has a structure in which the data line-conductor capacitance and the data line-pixel capacitance can be reduced as compared with the structures A and B, respectively.
  • this embodiment can reduce the capacitance between the data line and the conductor, so that the display quality of the liquid crystal display panel can be improved from the structures A and C.
  • the display quality of the liquid crystal display panel can be improved over the structure B because the structure of this embodiment can reduce the data line-pixel capacitance.
  • the first shield electrode 113 and the second shield electrode 116 are provided along the data signal line 115, the data line-pixel capacitance and the data line-conductor capacitance are suppressed. can do.
  • the second shield electrode 116 is formed on the insulating film 114, but may be formed on the insulating film 117. Further, the black matrix 123 and the color filter 124 may be formed on the array substrate 11. Further, the potentials of the first shield electrode 113 and the second shield electrode 116 may vary.
  • FIG. 4 is a cross-sectional view showing the main part of the liquid crystal display device 1 according to the second embodiment.
  • the liquid crystal display device 1 includes a plurality of third shield electrodes 17 between adjacent pixel electrodes 119 on the array substrate 11. That is, the third shield electrode is provided in the vicinity of the pixel electrode 119.
  • the third shield electrode 17 is opposed to the data signal line 115 with the insulating films 117 and 118 interposed therebetween.
  • the width of the data signal line 115 in the left-right direction is 6 ⁇ m.
  • a slit (opening) that opens in the same direction as the direction in which the data signal line extends is provided between the plurality of third shield electrodes 17. The width of the slit is 2 ⁇ m.
  • FIG. 4 shows a structure near the data signal line 115 in this embodiment.
  • the electric field between the first shield electrode 113, the second shield electrode 116, the third shield electrode 17 and the data signal line 115 is increased as compared with the structures A, B, and C.
  • the electric field between the electrode 119 and the data signal line 115 is reduced as compared with the structures A, B, and C.
  • the data line-pixel capacitance of the present embodiment is reduced by 13% compared to the structure A, reduced by 22% compared with the structure B, and decreased by 61% compared with the structure C.
  • the third shield electrode 17 is provided on the data signal line 115 as compared with the first embodiment. For this reason, the electric field from the data signal line 115 to the pixel electrode 119 is more easily shielded than in the first embodiment. That is, since a part of the electric field from the data signal line 115 to the pixel electrode 119 is replaced by the electric field from the data signal line 115 to the shield electrode 17, the capacitance between the data line and the conductor increases, but the distance between the data line and the pixel is increased. The capacity can be further reduced. As a result, it has been experimentally found that the capacity between the data line and the pixel is reduced by 8% compared to the first embodiment. That is, the present embodiment has a structure that can further reduce the data line-pixel capacitance as compared with the first embodiment.
  • the display quality of the liquid crystal display panel 1 can be improved as compared with the conventional case by providing the third shield electrode 17 and further suppressing the data line-pixel capacitance.
  • the third shield electrode 17 in front of the data signal line 115, the effect of shielding the electric field from the data signal line 115 to the pixel electrode 119 is increased. Capacity can be suppressed.
  • liquid crystal display panel according to this embodiment may not include the first shield electrode 113 or the second shield electrode 116.
  • Embodiment 3 Table 2 below shows the correspondence between the horizontal width of the first shield electrode 113 and the second shield electrode 116 and the parasitic capacitance.
  • the configuration and operation other than those specifically described are the same as those of the first embodiment, and the description is omitted for the sake of brevity.
  • Embodiment 1 has a structure in which the width in the left-right direction of the first shield electrode 113 and the second shield electrode 116 is 6 ⁇ m.
  • the structure E is a structure in which the first shield electrode 113 has a horizontal width of 6 ⁇ m and the second shield electrode 116 has a horizontal width of 5 ⁇ m.
  • the structure F is a structure in which the first shield electrode 113 has a horizontal width of 6 ⁇ m and the second shield electrode 116 has a horizontal width of 4 ⁇ m.
  • the structure G is a structure in which the width of the first shield electrode 113 in the left-right direction is 5 ⁇ m and the width of the second shield electrode 116 in the left-right direction is 6 ⁇ m.
  • the structure H is a structure in which the first shield electrode 113 has a horizontal width of 4 ⁇ m and the second shield electrode 116 has a horizontal width of 6 ⁇ m.
  • the positions of both ends in the left-right direction of the first shield electrode 113 and the second shield electrode 116 of Embodiment 1 correspond to each other.
  • the second shield electrode 116 of the structures E to F is located inside the first shield electrode 113 in the left-right direction.
  • the first shield electrode 113 of the structures G to H is located inside the second shield electrode 116 in the left-right direction.
  • the data line-pixel capacitance of Embodiment 1 is the lowest among Embodiment 1 and structures EH.
  • the data line-conductor capacitances in the first embodiment and structures E to H are substantially the same.
  • the structure in which the first shield electrode 113 and the second shield electrode 116 have the same width in the left-right direction is different in the width in the left-right direction of the first shield electrode 113 and the second shield electrode 116.
  • the display quality of the liquid crystal display panel 1 can be improved as compared with the existing structure.
  • FIG. 5 is a cross-sectional view showing a main part of the liquid crystal display device 1 according to the fourth embodiment.
  • the shield electrode 17 has no slit as compared with the second embodiment.
  • the width of the third shield electrode 17 in the left-right direction is 6 ⁇ m, which is the same as the width of the data signal line 115.
  • the correspondence relationship between the shape of the third shield electrode 17 and the parasitic capacitance is shown in Table 3 below.
  • the data line-pixel capacitance of the second embodiment is substantially the same as that of the fourth embodiment. Further, the data line-conductor capacitance of the second embodiment is reduced by 2% compared to the fourth embodiment.
  • the display quality of the liquid crystal display panel 1 can be improved in the third shield electrode 17 having the slit than the third shield electrode 17 having no slit.

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  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
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Abstract

Provided is a liquid crystal display panel 1 or the like that is capable of sufficiently increasing the improvement of display quality. This liquid crystal display panel 1 has a liquid crystal loaded in a portion between two substrates arranged opposite each other, and is characterized by being provided with: a data signal line that is arranged in one of the two substrates; a plurality of first shield electrodes that are formed along the data signal line; and second shield electrodes that are arranged opposite the respective first shield electrodes. This liquid crystal display apparatus is characterized by being provided with the liquid crystal display panel 1 that servers as a display unit.

Description

液晶表示パネル及び液晶表示装置Liquid crystal display panel and liquid crystal display device
　本発明は液晶表示パネル等に関する。 The present invention relates to a liquid crystal display panel and the like.
　近年、表示装置の多くに採用されている液晶表示パネルは、アレイ基板及びアレイ基板に対向する対向基板が所定の間隔をおいて対向配置し、アレイ基板と対向基板との間に液晶が充填されている。アレイ基板には、液晶に電圧を印加する画素電極、この画素電極を駆動する薄膜トランジスタ等のスイッチング素子、データ信号線等の各種配線が積層状に形成される。また対向基板には、ブラックマトリクス、所定の色のカラーフィルタ及び透明電極等が同様に積層状に形成されている。 In recent years, a liquid crystal display panel employed in many display devices has an array substrate and a counter substrate facing the array substrate arranged to face each other at a predetermined interval, and liquid crystal is filled between the array substrate and the counter substrate. ing. On the array substrate, pixel electrodes for applying a voltage to the liquid crystal, switching elements such as thin film transistors for driving the pixel electrodes, and various wirings such as data signal lines are formed in a stacked manner. On the counter substrate, a black matrix, a color filter of a predetermined color, a transparent electrode, and the like are similarly formed in a laminated form.
　この種の液晶表示パネルは、データ信号線と画素電極との間の寄生容量に起因して、画素電極の電位が変動し液晶へ予期しない電圧がかかることで液晶の配向が乱され、液晶表示パネルの表示品位が悪化する場合があった。 In this type of liquid crystal display panel, due to the parasitic capacitance between the data signal line and the pixel electrode, the potential of the pixel electrode fluctuates and an unexpected voltage is applied to the liquid crystal. The display quality of the panel may deteriorate.
　このことにより、例えば特許文献１に記載の液晶表示パネルは、複数の画素電極の間にシールド電極を配置することでデータ信号線から画素電極への電界をシールド電極を配置しない場合に比べて弱くすることでデータ信号線と画素電極との間の寄生容量を抑制させている。 Accordingly, for example, the liquid crystal display panel described in Patent Document 1 has a weaker electric field from the data signal line to the pixel electrode by disposing the shield electrode between the plurality of pixel electrodes than when the shield electrode is not disposed. This suppresses the parasitic capacitance between the data signal line and the pixel electrode.
特開２０１５－７２４３４号公報Japanese Patent Laying-Open No. 2015-72434
　しかし、特許文献１に記載の液晶表示パネルには新たに設けられた導電体とデータ信号線との間で寄生容量が発生する。このことにより、伝送されるデータ信号に遅延が発生し、液晶表示パネルの表示品位の改善効果を十分に高めることが難しいという問題があった。 However, in the liquid crystal display panel described in Patent Document 1, parasitic capacitance is generated between the newly provided conductor and the data signal line. As a result, there is a problem that a delay occurs in the transmitted data signal and it is difficult to sufficiently improve the display quality improvement effect of the liquid crystal display panel.
　本発明は斯かる事情に鑑みてなされたものであり、その目的とするところは、液晶表示パネルの表示品位の改善効果を十分に高めることができる液晶表示パネル等を提供することにある。 The present invention has been made in view of such circumstances, and an object of the present invention is to provide a liquid crystal display panel or the like that can sufficiently enhance the effect of improving the display quality of the liquid crystal display panel.
　本発明に係る液晶表示パネルは、対向配置された２つの基板の間に液晶が充填された液晶表示パネルにおいて、前記２つの基板の一方に配設されたデータ信号線と、該データ信号線沿いに形成された複数の第１のシールド電極と、前記複数の第１のシールド電極の夫々に対向配置された第２のシールド電極とを備えることを特徴とする。 The liquid crystal display panel according to the present invention is a liquid crystal display panel in which liquid crystal is filled between two opposingly arranged substrates, a data signal line disposed on one of the two substrates, and the data signal line And a plurality of first shield electrodes formed on the first shield electrode and a second shield electrode disposed opposite to each of the plurality of first shield electrodes.
　本発明に係る液晶表示装置は、液晶表示パネルを表示部として備えることを特徴とする。 The liquid crystal display device according to the present invention includes a liquid crystal display panel as a display unit.
　本発明によれば、液晶表示パネルの表示品位の改善効果を十分に高めることができる。 According to the present invention, the effect of improving the display quality of the liquid crystal display panel can be sufficiently enhanced.
液晶表示装置を示す横断面図である。It is a cross-sectional view which shows a liquid crystal display device. 液晶表示パネルを示す拡大断面図である。It is an expanded sectional view showing a liquid crystal display panel. データ信号線付近の構造を示す断面図である。It is sectional drawing which shows the structure of a data signal line vicinity. 実施の形態２に係る液晶表示装置の主要部を示す断面図である。6 is a cross-sectional view showing a main part of a liquid crystal display device according to Embodiment 2. FIG. 実施の形態４に係る液晶表示装置の主要部を示す断面図である。FIG. 6 is a cross-sectional view showing a main part of a liquid crystal display device according to Embodiment 4.
　実施の形態１
　以下、本発明をその実施の形態を示す図面に基づいて詳述する。以下の説明では各図中の上下、左右を使用する。図１は液晶表示装置を示す横断面図である。図示の液晶表示装置は、画像表示用の液晶表示パネル１と、該液晶表示パネル１に光を照射するバックライト２とを備えている。以下の説明においては、液晶パネル１の画像表示面の側を正面、他側を背面とする。バックライト２は、浅底の箱形に成形されたバックライトシャーシ２０の底板上に、複数のＬＥＤ２２を縦横に並べて均等に配置し、バックライトシャーシ２０の開口部を拡散板２３で覆って構成されている。バックライトシャーシ２０の底板は、光反射性に優れた反射シート２４により複数のＬＥＤ２２の配設位置を除いて全面に亘って覆ってあり、各ＬＥＤ２２の発光を反射シート２４により反射して、光を均等に拡散する拡散板２３を通して出射するように構成してある。液晶表示装置は上述のバックライト２の正面に配置して、液晶表示パネル１との間に光学シート２１を配置している。なお、本実施形態における液晶表示装置は直下型であるが、エッジライト型であってもよい。また液晶表示装置は直下型又はエッジライト型以外であってもよく、直下型又はエッジライト型は一例であり、液晶表示装置はこれに限られない。 Embodiment 1
Hereinafter, the present invention will be described in detail with reference to the drawings illustrating embodiments thereof. In the following description, the top, bottom, left and right in each figure are used. FIG. 1 is a cross-sectional view showing a liquid crystal display device. The illustrated liquid crystal display device includes a liquid crystal display panel 1 for image display, and a backlight 2 that irradiates the liquid crystal display panel 1 with light. In the following description, the image display surface side of the liquid crystal panel 1 is the front surface, and the other side is the back surface. The backlight 2 is configured by arranging a plurality of LEDs 22 vertically and horizontally on the bottom plate of the backlight chassis 20 formed in a shallow box shape, and covering the opening of the backlight chassis 20 with a diffusion plate 23. Has been. The bottom plate of the backlight chassis 20 is covered over the entire surface except for the positions where the plurality of LEDs 22 are disposed with a reflection sheet 24 having excellent light reflectivity. Is emitted through a diffusion plate 23 that diffuses the light evenly. The liquid crystal display device is disposed in front of the backlight 2 described above, and an optical sheet 21 is disposed between the liquid crystal display panel 1 and the liquid crystal display device. The liquid crystal display device in this embodiment is a direct type, but may be an edge light type. The liquid crystal display device may be other than the direct type or the edge light type, and the direct type or the edge light type is an example, and the liquid crystal display device is not limited to this.
　図２は液晶表示パネル１を示す拡大断面図である。図２の上方が液晶表示装置１の正面側であり、下方が液晶表示装置１の背面側である。液晶表示パネル１は基板上に信号線が形成されたアレイ基板１１と、アレイ基板１１に対向する対向基板１２と、アレイ基板１１及び対向基板１２の間に充填された液晶層１３とを備える。 FIG. 2 is an enlarged sectional view showing the liquid crystal display panel 1. The upper side of FIG. 2 is the front side of the liquid crystal display device 1, and the lower side is the back side of the liquid crystal display device 1. The liquid crystal display panel 1 includes an array substrate 11 having signal lines formed on the substrate, a counter substrate 12 facing the array substrate 11, and a liquid crystal layer 13 filled between the array substrate 11 and the counter substrate 12.
　アレイ基板１１は基板１１１と、基板１１１の背面側を覆う偏光板１１２と、基板１１１の正面側に所定間隔で形成された第１のシールド電極１１３と、第１のシールド電極１１３の形成位置を含め、基板１１１の正面を覆う絶縁膜１１４と、絶縁膜１１４の正面側に所定間隔で形成された第２のシールド電極１１６と、絶縁膜１１４上で複数の第２のシールド電極１１６に隣り合う位置に設けられたデータ信号線１１５と、データ信号線１１５及び第２のシールド電極１１６の形成位置を含め、絶縁膜１１４の正面を覆う絶縁膜１１７と、絶縁膜１１７の正面を覆う絶縁膜１１８と、絶縁膜１１８の正面に所定間隔で形成された画素電極１１９とを備える。なお、絶縁膜１１７及び１１８は両方存在していてもよいし、どちらか一方だけでもよい。 The array substrate 11 includes the substrate 111, a polarizing plate 112 that covers the back side of the substrate 111, first shield electrodes 113 formed on the front side of the substrate 111 at predetermined intervals, and positions where the first shield electrodes 113 are formed. Including the insulating film 114 covering the front surface of the substrate 111, the second shield electrode 116 formed at a predetermined interval on the front surface side of the insulating film 114, and the plurality of second shield electrodes 116 on the insulating film 114. The insulating film 117 covering the front surface of the insulating film 114 including the data signal line 115 provided at the position, the position where the data signal line 115 and the second shield electrode 116 are formed, and the insulating film 118 covering the front surface of the insulating film 117. And pixel electrodes 119 formed at a predetermined interval on the front surface of the insulating film 118. Note that both the insulating films 117 and 118 may be present, or only one of them may be present.
　対向基板１２は基板１２１と、基板１２１の正面側を覆う偏光板１２２と、基板１２１の背面側に所定間隔で形成されたカラーフィルタ１２４と、カラーフィルタ１２４の間に設けられたブラックマトリクス１２３と、カラーフィルタ１２４の背面側に形成された対向電極１２５とを備える。 The counter substrate 12 includes a substrate 121, a polarizing plate 122 that covers the front side of the substrate 121, a color filter 124 formed at a predetermined interval on the back side of the substrate 121, and a black matrix 123 provided between the color filters 124. And a counter electrode 125 formed on the back side of the color filter 124.
　基板１１１及び１２１は、例えば、ガラス又は透明樹脂製の基板である。 The substrates 111 and 121 are, for example, substrates made of glass or transparent resin.
　偏光板１１２及び１２２は、出入りする光を特定方向に偏光する。偏光板１１２を通過する光と偏光板１２２を通過する光とは、偏光方向が９０度異なるようにしてある。 The polarizing plates 112 and 122 polarize incoming and outgoing light in a specific direction. The light passing through the polarizing plate 112 and the light passing through the polarizing plate 122 have a polarization direction different by 90 degrees.
　第１のシールド電極１１３及び第２のシールド電極１１６はアルミニウム、チタン、銀、モリブデン、タングステン、銅又はクロム等の不透明な導電材料で構成されている。第１のシールド電極１１３はデータ信号線１１５沿いに配置されている。なお、第１のシールド電極１１３及び第２のシールド電極１１６は例えばＩＴＯ（インジウム・ティン・オキサイド）又はＩＺＯ（インジウム・ジンク・オキサイド）等の透明な導電材料で構成されていてもよい。 The first shield electrode 113 and the second shield electrode 116 are made of an opaque conductive material such as aluminum, titanium, silver, molybdenum, tungsten, copper, or chromium. The first shield electrode 113 is disposed along the data signal line 115. The first shield electrode 113 and the second shield electrode 116 may be made of a transparent conductive material such as ITO (indium tin oxide) or IZO (indium zinc oxide).
　第２のシールド電極１１６は絶縁膜１１４を挟んで対向基板１２に向かって第１のシールド電極１１３に対向する位置に設けられている。第１のシールド電極１１３及び第２のシールド電極１１６には任意の電位を供給してもよく、またその電位は全画素共通の電位（共通電位）と一致していてもよい。また第１のシールド電極１１３及び第２のシールド電極１１６は液晶表示パネル１の表示エリア内又は液晶表示パネル１の表示エリア外で接続されていてもよく、さらに液晶表示パネル１外で接続されていてもよい。また第１のシールド電極１１３の左右方向の幅は第２のシールド電極１１６の幅と同一であり、左右方向の両端は第２のシールド電極１１６の両端に一致させてある。なお、液晶表示パネル１は補助容量配線を有している。液晶表示パネル１は補助容量配線の電位（補助容量電位）を変化させることで画素電位をデータ信号線の電位から変動させることができる。このことによりデータ信号線の電位が供給されている画素群において異なる複数の画素電位を持つ画素群が生じ、視野角改善効果が得られる。 The second shield electrode 116 is provided at a position facing the first shield electrode 113 toward the counter substrate 12 with the insulating film 114 interposed therebetween. Arbitrary potentials may be supplied to the first shield electrode 113 and the second shield electrode 116, and the potential may coincide with the potential common to all pixels (common potential). Further, the first shield electrode 113 and the second shield electrode 116 may be connected within the display area of the liquid crystal display panel 1 or outside the display area of the liquid crystal display panel 1, and further connected outside the liquid crystal display panel 1. May be. The width of the first shield electrode 113 in the left-right direction is the same as the width of the second shield electrode 116, and both ends in the left-right direction are made to coincide with both ends of the second shield electrode 116. The liquid crystal display panel 1 has auxiliary capacitance wiring. The liquid crystal display panel 1 can change the pixel potential from the potential of the data signal line by changing the potential of the auxiliary capacitance wiring (auxiliary capacitance potential). As a result, pixel groups having a plurality of different pixel potentials are generated in the pixel group to which the potential of the data signal line is supplied, and a viewing angle improvement effect is obtained.
　絶縁膜１１４、１１７及び１１８は例えば、窒化ケイ素等の無機材料又は有機材料で構成されている。透明電極１２５には全画素共通の電位（共通電位）、画素電極１１９には各画素毎の電位（画素電位）が与えられる。液晶層１３に共通電位と画素電位との電位差に応じた電圧が印加され、液晶の配向が変化し、目的の表示が得られる。 The insulating films 114, 117 and 118 are made of, for example, an inorganic material or an organic material such as silicon nitride. A potential common to all pixels (common potential) is applied to the transparent electrode 125, and a potential (pixel potential) for each pixel is applied to the pixel electrode 119. A voltage corresponding to the potential difference between the common potential and the pixel potential is applied to the liquid crystal layer 13 to change the alignment of the liquid crystal and obtain a desired display.
　カラーフィルタ１２４は、基板１２１上に、着色された樹脂材料で形成されており、画素開口部を通った光のうち、所定波長成分以外の光が吸収され、各色に相当する波長の光のみ透過する。ブラックマトリクス１２３はカラーフィルタ１２４の間から漏れる光を遮光する。 The color filter 124 is formed of a colored resin material on the substrate 121, absorbs light other than a predetermined wavelength component out of light passing through the pixel opening, and transmits only light having a wavelength corresponding to each color. To do. The black matrix 123 blocks light leaking from between the color filters 124.
　データ信号線１１５はアレイ基板１１及び液晶層１３の間に配設されている。なお、ブラックマトリクス１２３又はカラーフィルタ１２４は基板１１１又は基板１２１のどちらに設けられていてもよい。以下、データ信号線１１５に発生する寄生容量について説明する。種々の構造においてデータ信号線１１５に発生する寄生容量を下記の表１に示す。 The data signal line 115 is disposed between the array substrate 11 and the liquid crystal layer 13. Note that the black matrix 123 or the color filter 124 may be provided on either the substrate 111 or the substrate 121. Hereinafter, the parasitic capacitance generated in the data signal line 115 will be described. Table 1 below shows the parasitic capacitance generated in the data signal line 115 in various structures.
Figure JPOXMLDOC01-appb-T000001
Figure JPOXMLDOC01-appb-T000001
　図３はデータ信号線１１５付近の構造を示す断面図である。以下では図３を参照しつつ、表１を説明する。構造Ａは絶縁膜１１４及び１１８を挟んでデータ信号線１１５に対向する位置にシールド電極１４を配置した構造を示す（図３Ａ）。構造Ｂは１対の第１のシールド電極１１３の間にデータ信号線１１５を配置し、実施の形態１に示す第２のシールド電極１１６を配置しない構造を示す（図３Ｂ）。構造Ｃは特許文献１に記載の構造であり、複数の画素電極１１９の間に全画素共通の電位を与える共通電極を配置した構造を示す（図３Ｃ）。表１に示すデータ線－画素間容量は画素電極１１９からデータ信号線１１５へ発生する寄生容量を示す。データ線－導電体間容量は各図中の全導電体からデータ信号線１１５への寄生容量を示す。データ線－画素間容量及びデータ線－導電体間容量は構造Ａにおける寄生容量を１とする相対値で表してある。 FIG. 3 is a cross-sectional view showing the structure around the data signal line 115. Hereinafter, Table 1 will be described with reference to FIG. Structure A shows a structure in which the shield electrode 14 is disposed at a position facing the data signal line 115 with the insulating films 114 and 118 interposed therebetween (FIG. 3A). The structure B shows a structure in which the data signal line 115 is arranged between the pair of first shield electrodes 113 and the second shield electrode 116 shown in the first embodiment is not arranged (FIG. 3B). A structure C is a structure described in Patent Document 1, and shows a structure in which a common electrode that applies a potential common to all pixels is arranged between a plurality of pixel electrodes 119 (FIG. 3C). The data line-pixel capacitance shown in Table 1 indicates a parasitic capacitance generated from the pixel electrode 119 to the data signal line 115. The data line-conductor capacitance indicates the parasitic capacitance from all conductors to the data signal line 115 in each figure. The data line-pixel capacitance and the data line-conductor capacitance are represented by relative values where the parasitic capacitance in the structure A is 1.
　また図３Ｄに示す構造Ｄはデータ線－画素間容量を低減する目的でこれまでに提案された、データ信号線１１５付近の構造であり、絶縁膜１１４を介してデータ信号線１１５を覆うシールド電極１６を備える構造である。構造Ｄはデータ線からシールド電極への電界を増加させることでデータ線－画素間容量を低減している。その結果、データ信号線の電位の変動による画素電位の変動が抑制され、構造Ｄを有する液晶表示パネル１の表示品位は構造Ａ～Ｃを有する液晶表示パネル１よりも改善される。 A structure D shown in FIG. 3D is a structure in the vicinity of the data signal line 115 proposed so far for the purpose of reducing the capacitance between the data line and the pixel, and is a shield electrode that covers the data signal line 115 via the insulating film 114. 16. In structure D, the data line-pixel capacitance is reduced by increasing the electric field from the data line to the shield electrode. As a result, the fluctuation of the pixel potential due to the fluctuation of the potential of the data signal line is suppressed, and the display quality of the liquid crystal display panel 1 having the structure D is improved as compared with the liquid crystal display panel 1 having the structures A to C.
　データ線－画素間容量及びデータ線－導電体間容量の表示品位に対する効果は以下の通りである。データ線－画素間容量が高かった場合、データ信号線１１５の電位変動により画素電極の電位が変動し、画素電極の電位が意図した電位と異なることで液晶表示パネルの表示品位が悪化する。またデータ線－導体間容量が高かった場合、データ信号線１１５への負荷が大きくなりデータ線信号が遅延した結果、データ信号線１１５の電圧が意図した電圧まで達せなくなり、画素電位が意図していた電圧とは異なることで液晶表示パネル１の表示品位が悪化する。 The effect of the data line-pixel capacitance and the data line-conductor capacitance on the display quality is as follows. When the capacitance between the data line and the pixel is high, the potential of the pixel electrode varies due to the potential variation of the data signal line 115, and the display quality of the liquid crystal display panel deteriorates because the potential of the pixel electrode is different from the intended potential. If the capacitance between the data line and the conductor is high, the load on the data signal line 115 is increased and the data line signal is delayed. As a result, the voltage of the data signal line 115 cannot reach the intended voltage, and the pixel potential is intended. The display quality of the liquid crystal display panel 1 deteriorates due to the difference from the voltage.
　以下、データ線－画素間容量及びデータ線－導電体間容量を本実施形態１の構造と構造Ａ～Ｃとで比較する。本実施形態は、構造Ｂに比べて第１のシールド電極１１３の上に第２のシールド電極１１６が配置されているため、構造Ｂに比べてデータ信号線１１５から画素電極１１９への電界が遮蔽されやすい。すなわち、データ信号線１１５から画素電極１１９への電界の一部がデータ信号線１１５からシールド電極１１６への電界に置き替わるため、データ線－導電体間容量をほとんど増加させずにデータ線－画素間容量を削減することができる。実験により、データ線－画素間容量は構造Ｂに比べて１４パーセント減少することがわかった。また、本実施形態は構造Ａと同じぐらいデータ信号線１１５から画素電極１１９への電界を遮蔽する効果を持ち、データ線－導電体間容量を構造Ａより減少させることができる構造である。実験により、データ線－導電体間容量は構造Ａに比べて１９パーセント減少することがわかった。すなわち、本実施形態は構造Ａと構造Ｂに比べて、データ線－導電体間容量やデータ線－画素間容量をそれぞれ削減することができる構造である。 Hereinafter, the data line-pixel capacitance and the data line-conductor capacitance will be compared between the structure of the first embodiment and the structures A to C. In this embodiment, since the second shield electrode 116 is disposed on the first shield electrode 113 as compared with the structure B, the electric field from the data signal line 115 to the pixel electrode 119 is shielded compared to the structure B. Easy to be. That is, a part of the electric field from the data signal line 115 to the pixel electrode 119 is replaced with the electric field from the data signal line 115 to the shield electrode 116, so that the data line-pixel capacitance is hardly increased. Capacity can be reduced. Experiments have shown that the data line-pixel capacitance is reduced by 14 percent compared to structure B. In addition, the present embodiment has the same effect as that of the structure A in shielding the electric field from the data signal line 115 to the pixel electrode 119, and can reduce the data line-conductor capacitance from the structure A. Experiments have shown that the data line-conductor capacitance is reduced by 19 percent compared to structure A. That is, the present embodiment has a structure in which the data line-conductor capacitance and the data line-pixel capacitance can be reduced as compared with the structures A and B, respectively.
　以上の実験結果から本実施形態はデータ線－導電体間容量を削減できるため、構造Ａ及びＣより液晶表示パネルの表示品位を改善できる。また本実施形態の構造はデータ線－画素間容量を削減できるため、構造Ｂより液晶表示パネルの表示品位を改善できることがわかった。 From the above experimental results, this embodiment can reduce the capacitance between the data line and the conductor, so that the display quality of the liquid crystal display panel can be improved from the structures A and C. In addition, it was found that the display quality of the liquid crystal display panel can be improved over the structure B because the structure of this embodiment can reduce the data line-pixel capacitance.
　本実施形態によれば、データ信号線１１５に沿って第１のシールド電極１１３及び第２のシールド電極１１６が設けられていることでデータ線－画素間容量及びデータ線－導電体間容量を抑制することができる。 According to the present embodiment, since the first shield electrode 113 and the second shield electrode 116 are provided along the data signal line 115, the data line-pixel capacitance and the data line-conductor capacitance are suppressed. can do.
　なお、本実施形態では第２のシールド電極１１６は絶縁膜１１４上に形成されたが、絶縁膜１１７上に形成されてもよい。また、ブラックマトリクス１２３及びカラーフィルタ１２４はアレイ基板１１に形成されてもよい。また第１のシールド電極１１３及び第２のシールド電極１１６の電位は変動してもよい。 In the present embodiment, the second shield electrode 116 is formed on the insulating film 114, but may be formed on the insulating film 117. Further, the black matrix 123 and the color filter 124 may be formed on the array substrate 11. Further, the potentials of the first shield electrode 113 and the second shield electrode 116 may vary.
　実施の形態２
　図４は実施の形態２に係る液晶表示装置１の主要部を示す断面図である。以下、特に説明する構成、作用以外の構成及び作用は実施の形態１と同等であり、簡潔のため記載を省略する。液晶表示装置１はアレイ基板１１上に隣り合う画素電極１１９の間に複数の第３のシールド電極１７を備える。すなわち第３のシールド電極は画素電極１１９の近傍に設けられている。第３のシールド電極１７はデータ信号線１１５に対して絶縁膜１１７及び１１８を挟んで対向している。データ信号線１１５の左右方向の幅は６μｍである。複数の第３のシールド電極１７の間にはデータ信号線が伸びる方向と同方向に開口するスリット（開口部）が設けられている。スリットの幅は２μｍである。 Embodiment 2
FIG. 4 is a cross-sectional view showing the main part of the liquid crystal display device 1 according to the second embodiment. In the following, the configuration and operation other than those specifically described are the same as those of the first embodiment, and the description is omitted for the sake of brevity. The liquid crystal display device 1 includes a plurality of third shield electrodes 17 between adjacent pixel electrodes 119 on the array substrate 11. That is, the third shield electrode is provided in the vicinity of the pixel electrode 119. The third shield electrode 17 is opposed to the data signal line 115 with the insulating films 117 and 118 interposed therebetween. The width of the data signal line 115 in the left-right direction is 6 μm. A slit (opening) that opens in the same direction as the direction in which the data signal line extends is provided between the plurality of third shield electrodes 17. The width of the slit is 2 μm.
　以下では図３及び図４を参照しつつ、表１を説明する。図４は本実施形態におけるデータ信号線１１５付近の構造である。本実施形態の場合、第１のシールド電極１１３、第２のシールド電極１１６及び第３のシールド電極１７とデータ信号線１１５との間の電界が構造Ａ、Ｂ及びＣに比べて増えるため、画素電極１１９とデータ信号線１１５との間の電界が構造Ａ、Ｂ及びＣに比べて減少する。その結果、本実施形態のデータ線－画素間容量は構造Ａに比べて１３パーセント減少し、構造Ｂに比べて２２パーセント減少し、構造Ｃに比べて６１パーセント減少することがわかる。 Hereinafter, Table 1 will be described with reference to FIGS. 3 and 4. FIG. 4 shows a structure near the data signal line 115 in this embodiment. In the present embodiment, the electric field between the first shield electrode 113, the second shield electrode 116, the third shield electrode 17 and the data signal line 115 is increased as compared with the structures A, B, and C. The electric field between the electrode 119 and the data signal line 115 is reduced as compared with the structures A, B, and C. As a result, it can be seen that the data line-pixel capacitance of the present embodiment is reduced by 13% compared to the structure A, reduced by 22% compared with the structure B, and decreased by 61% compared with the structure C.
　本実施形態は、実施の形態１に比べてデータ信号線１１５の上に第３のシールド電極１７が設けられている。このため、実施の形態1に比べてデータ信号線１１５から画素電極１１９への電界が更に遮蔽されやすくなる。すなわち、データ信号線１１５から画素電極１１９への電界の一部がデータ信号線１１５からシールド電極１７への電界に置き替わるため、データ線－導電体間容量は増加するが、データ線－画素間容量を更に削減することが可能となる。その結果、データ線－画素間容量は実施の形態１に比べて８パーセント減少することが実験によりわかった。すなわち、本実施形態は実施の形態１と比べて、データ線－画素間容量を更に削減することができる構造である。 In the present embodiment, the third shield electrode 17 is provided on the data signal line 115 as compared with the first embodiment. For this reason, the electric field from the data signal line 115 to the pixel electrode 119 is more easily shielded than in the first embodiment. That is, since a part of the electric field from the data signal line 115 to the pixel electrode 119 is replaced by the electric field from the data signal line 115 to the shield electrode 17, the capacitance between the data line and the conductor increases, but the distance between the data line and the pixel is increased. The capacity can be further reduced. As a result, it has been experimentally found that the capacity between the data line and the pixel is reduced by 8% compared to the first embodiment. That is, the present embodiment has a structure that can further reduce the data line-pixel capacitance as compared with the first embodiment.
　本実施形態によれば、第３のシールド電極１７を設けることでさらにデータ線－画素間容量を抑制することで液晶表示パネル１の表示品位を従来より改善することができる。 According to the present embodiment, the display quality of the liquid crystal display panel 1 can be improved as compared with the conventional case by providing the third shield electrode 17 and further suppressing the data line-pixel capacitance.
　本実施形態によれば、データ信号線１１５の正面に第３のシールド電極１７を置くことで、データ信号線１１５から画素電極１１９への電界を遮蔽する効果が増えるため、さらにデータ線－画素間容量を抑制することができる。 According to the present embodiment, by placing the third shield electrode 17 in front of the data signal line 115, the effect of shielding the electric field from the data signal line 115 to the pixel electrode 119 is increased. Capacity can be suppressed.
　なお、本実施形態における液晶表示パネルは、第１のシールド電極１１３又は第２のシールド電極１１６を設けなくてもよい。 Note that the liquid crystal display panel according to this embodiment may not include the first shield electrode 113 or the second shield electrode 116.
　実施の形態３
　第１のシールド電極１１３及び第２のシールド電極１１６の左右方向の幅と寄生容量との対応関係を下記の表２に示す。以下、特に説明する構成、作用以外の構成及び作用は実施の形態１と同等であり、簡潔のため記載を省略する。 Embodiment 3
Table 2 below shows the correspondence between the horizontal width of the first shield electrode 113 and the second shield electrode 116 and the parasitic capacitance. In the following, the configuration and operation other than those specifically described are the same as those of the first embodiment, and the description is omitted for the sake of brevity.
Figure JPOXMLDOC01-appb-T000002
Figure JPOXMLDOC01-appb-T000002
　以下では図２を参照しつつ、表２を説明する。実施形態１は第１のシールド電極１１３及び第２のシールド電極１１６の左右方向の幅を６μｍとする構造である。構造Ｅは第１のシールド電極１１３の左右方向の幅を６μｍとし、第２のシールド電極１１６の左右方向の幅を５μｍとする構造である。構造Ｆは第１のシールド電極１１３の左右方向の幅を６μｍとし、第２のシールド電極１１６の左右方向の幅を４μｍとする構造である。構造Ｇは第１のシールド電極１１３の左右方向の幅を５μｍとし、第２のシールド電極１１６の左右方向の幅を６μｍとする構造である。構造Ｈは第１のシールド電極１１３の左右方向の幅を４μｍとし、第２のシールド電極１１６の左右方向の幅を６μｍとする構造である。 Hereinafter, Table 2 will be described with reference to FIG. Embodiment 1 has a structure in which the width in the left-right direction of the first shield electrode 113 and the second shield electrode 116 is 6 μm. The structure E is a structure in which the first shield electrode 113 has a horizontal width of 6 μm and the second shield electrode 116 has a horizontal width of 5 μm. The structure F is a structure in which the first shield electrode 113 has a horizontal width of 6 μm and the second shield electrode 116 has a horizontal width of 4 μm. The structure G is a structure in which the width of the first shield electrode 113 in the left-right direction is 5 μm and the width of the second shield electrode 116 in the left-right direction is 6 μm. The structure H is a structure in which the first shield electrode 113 has a horizontal width of 4 μm and the second shield electrode 116 has a horizontal width of 6 μm.
　実施形態１の第１のシールド電極１１３及び第２のシールド電極１１６の左右方向の両端の位置は対応している。また構造Ｅ～Ｆの第２のシールド電極１１６は第１のシールド電極１１３の左右方向の内側に位置している。また構造Ｇ～Ｈの第１のシールド電極１１３は第２のシールド電極１１６の左右方向の内側に位置している。 The positions of both ends in the left-right direction of the first shield electrode 113 and the second shield electrode 116 of Embodiment 1 correspond to each other. In addition, the second shield electrode 116 of the structures E to F is located inside the first shield electrode 113 in the left-right direction. In addition, the first shield electrode 113 of the structures G to H is located inside the second shield electrode 116 in the left-right direction.
　実施形態１のデータ線－画素間容量は実施形態１及び構造Ｅ～Ｈの内、最も低い。実施形態１及び構造Ｅ～Ｈのデータ線－導電体間容量は略同一である。 The data line-pixel capacitance of Embodiment 1 is the lowest among Embodiment 1 and structures EH. The data line-conductor capacitances in the first embodiment and structures E to H are substantially the same.
　以上の結果から第１のシールド電極１１３及び第２のシールド電極１１６の左右方向の幅が同一である構造は、第１のシールド電極１１３及び第２のシールド電極１１６の左右方向の幅が異なっている構造に比べて液晶表示パネル１の表示品位を改善できる。 From the above results, the structure in which the first shield electrode 113 and the second shield electrode 116 have the same width in the left-right direction is different in the width in the left-right direction of the first shield electrode 113 and the second shield electrode 116. The display quality of the liquid crystal display panel 1 can be improved as compared with the existing structure.
　実施の形態４
　図５は実施の形態４に係る液晶表示装置１の主要部を示す断面図である。以下、特に説明する構成、作用以外の構成及び作用は実施の形態１と同等であり、簡潔のため記載を省略する。本実施形態は、実施形態２と比較してシールド電極１７にスリットが存在しない構造となっている。第３のシールド電極１７の左右方向の幅は６μｍであり、データ信号線１１５の幅と同一である。第３のシールド電極１７の形状と寄生容量との対応関係を下記の表３に示す。 Embodiment 4
FIG. 5 is a cross-sectional view showing a main part of the liquid crystal display device 1 according to the fourth embodiment. In the following, the configuration and operation other than those specifically described are the same as those of the first embodiment, and the description is omitted for the sake of brevity. In the present embodiment, the shield electrode 17 has no slit as compared with the second embodiment. The width of the third shield electrode 17 in the left-right direction is 6 μm, which is the same as the width of the data signal line 115. The correspondence relationship between the shape of the third shield electrode 17 and the parasitic capacitance is shown in Table 3 below.
Figure JPOXMLDOC01-appb-T000003
Figure JPOXMLDOC01-appb-T000003
　実施の形態２のデータ線－画素間容量は実施の形態４と略同一である。また実施の形態２のデータ線－導電体間容量は実施の形態４に比べて２パーセント削減されている。 The data line-pixel capacitance of the second embodiment is substantially the same as that of the fourth embodiment. Further, the data line-conductor capacitance of the second embodiment is reduced by 2% compared to the fourth embodiment.
　以上の結果からスリットがある第３のシールド電極１７はスリットがない第３のシールド電極１７より液晶表示パネル１の表示品位を改善できる。 From the above results, the display quality of the liquid crystal display panel 1 can be improved in the third shield electrode 17 having the slit than the third shield electrode 17 having no slit.
　今回開示された実施の形態はすべての点で例示であって、制限的なものではないと考えられるべきである。本発明の範囲は、上記した意味ではなく、請求の範囲によって示され、請求の範囲と均等の意味及び範囲内でのすべての変更が含まれることが意図される。 It should be considered that the embodiment disclosed this time is illustrative in all respects and not restrictive. The scope of the present invention is defined not by the above-described meaning but by the scope of claims, and is intended to include all modifications within the meaning and scope equivalent to the scope of claims.
　１　液晶表示パネル
　１１　アレイ基板
　１２　対向基板
　１３　液晶層
　１７　第３のシールド電極
　１１３　第１のシールド電極
　１１４　絶縁膜
　１１５　データ信号線
　１１６　第２のシールド電極
　１１９　画素電極 DESCRIPTION OF SYMBOLS 1 Liquid crystal display panel 11 Array substrate 12 Counter substrate 13 Liquid crystal layer 17 3rd shield electrode 113 1st shield electrode 114 Insulating film 115 Data signal line 116 2nd shield electrode 119 Pixel electrode

Claims (10)

  1. 　対向配置された２つの基板の間に液晶が充填された液晶表示パネルにおいて、
    　前記２つの基板の一方に配設されたデータ信号線と、
    　該データ信号線沿いに形成された複数の第１のシールド電極と、
    　前記複数の第１のシールド電極の夫々に対向配置された第２のシールド電極と
    　を備えることを特徴とする液晶表示パネル。     In a liquid crystal display panel in which liquid crystal is filled between two substrates arranged opposite to each other,
    A data signal line disposed on one of the two substrates;
    A plurality of first shield electrodes formed along the data signal lines;
    A liquid crystal display panel, comprising: a second shield electrode disposed opposite to each of the plurality of first shield electrodes.
  2. 　前記第１のシールド電極の幅は前記第２のシールド電極の幅と同一であり、
    　前記第１のシールド電極の両端は前記第２のシールド電極の両端に対応している
    　ことを特徴とする請求項１に記載の液晶表示パネル。     The width of the first shield electrode is the same as the width of the second shield electrode;
    The liquid crystal display panel according to claim 1, wherein both ends of the first shield electrode correspond to both ends of the second shield electrode.
  3. 　前記基板上に形成された複数の画素電極と
    　該複数の画素電極近傍に位置し、かつ前記データ信号線上に位置する第３のシールド電極と
    　を備えることを特徴とする請求項１又は請求項２に記載の液晶表示パネル。     3. A plurality of pixel electrodes formed on the substrate, and a third shield electrode located in the vicinity of the plurality of pixel electrodes and on the data signal line. 4. A liquid crystal display panel as described in 1.
  4. 　前記第３のシールド電極は前記データ信号線が伸びる方向と同方向に開口した開口部が設けられている
    　ことを特徴とする請求項３に記載の液晶表示パネル。     The liquid crystal display panel according to claim 3, wherein the third shield electrode is provided with an opening that opens in the same direction as the direction in which the data signal line extends.
  5. 　前記複数の第１のシールド電極、前記複数の第１のシールド電極の夫々に対向配置された第２のシールド電極及び前記基板上に形成された複数の画素電極近傍に位置する第３のシールド電極の電位に供給される電位が同一である
    　ことを特徴とする請求項１から請求項４のいずれか１つに記載の液晶表示パネル。     A plurality of first shield electrodes; a second shield electrode disposed opposite to each of the plurality of first shield electrodes; and a third shield electrode positioned in the vicinity of the plurality of pixel electrodes formed on the substrate. The liquid crystal display panel according to any one of claims 1 to 4, wherein the potential supplied to the same potential is the same.
  6. 　前記第１のシールド電極、第２のシールド電極及び第３のシールド電極が共通電位と同一である
    　ことを特徴とする請求項５に記載の液晶表示パネル。     The liquid crystal display panel according to claim 5, wherein the first shield electrode, the second shield electrode, and the third shield electrode have the same potential.
  7. 　前記第１のシールド電極、第２のシールド電極及び第３のシールド電極が補助容量電位と同一である
    　ことを特徴とする請求項５に記載の液晶表示パネル。     The liquid crystal display panel according to claim 5, wherein the first shield electrode, the second shield electrode, and the third shield electrode have the same auxiliary capacitance potential.
  8. 　前記複数の第１のシールド電極、前記複数の第１のシールド電極の夫々に対向配置された第２のシールド電極又は前記基板上に形成された複数の画素電極近傍に位置する第３のシールド電極が表示エリア内で接続されている
    　ことを特徴とする請求項１から請求項７のいずれか１つに記載の液晶表示パネル。     The plurality of first shield electrodes, the second shield electrode disposed opposite to each of the plurality of first shield electrodes, or the third shield electrode positioned in the vicinity of the plurality of pixel electrodes formed on the substrate The liquid crystal display panel according to claim 1, wherein the liquid crystal display panels are connected in a display area.
  9. 　前記複数の第１のシールド電極、前記複数の第１のシールド電極の夫々に対向配置された第２のシールド電極又は前記基板上に形成された複数の画素電極近傍に位置する第３のシールド電極が表示エリア外で接続されている
    　ことを特徴とする請求項１から請求項７のいずれか１つに記載の液晶表示パネル。     The plurality of first shield electrodes, the second shield electrode disposed opposite to each of the plurality of first shield electrodes, or the third shield electrode positioned in the vicinity of the plurality of pixel electrodes formed on the substrate The liquid crystal display panel according to claim 1, wherein the liquid crystal display panel is connected outside the display area.
  10. 　請求項１から請求項９のいずれか一つに記載の液晶表示パネルを表示部として備える
    　ことを特徴とする液晶表示装置。     A liquid crystal display device comprising the liquid crystal display panel according to any one of claims 1 to 9 as a display unit.
PCT/JP2016/069798 2016-07-04 2016-07-04 Liquid crystal display panel and liquid crystal display apparatus WO2018008065A1 (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001021914A (en) * 1999-07-02 2001-01-26 Nec Corp Active matrix type liquid crystal display device
JP2006313349A (en) * 2005-05-04 2006-11-16 Samsung Electronics Co Ltd Thin film transistor display panel and liquid crystal display including the same
JP2006317516A (en) * 2005-05-10 2006-11-24 Mitsubishi Electric Corp Liquid crystal display device and its manufacturing method
WO2013129200A1 (en) * 2012-02-27 2013-09-06 京セラ株式会社 Liquid crystal display device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001021914A (en) * 1999-07-02 2001-01-26 Nec Corp Active matrix type liquid crystal display device
JP2006313349A (en) * 2005-05-04 2006-11-16 Samsung Electronics Co Ltd Thin film transistor display panel and liquid crystal display including the same
JP2006317516A (en) * 2005-05-10 2006-11-24 Mitsubishi Electric Corp Liquid crystal display device and its manufacturing method
WO2013129200A1 (en) * 2012-02-27 2013-09-06 京セラ株式会社 Liquid crystal display device

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