WO2017222582A1 - Apparatuses for combining and decoding encoded blocks - Google Patents

Apparatuses for combining and decoding encoded blocks Download PDF

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Publication number
WO2017222582A1
WO2017222582A1 PCT/US2016/063636 US2016063636W WO2017222582A1 WO 2017222582 A1 WO2017222582 A1 WO 2017222582A1 US 2016063636 W US2016063636 W US 2016063636W WO 2017222582 A1 WO2017222582 A1 WO 2017222582A1
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WIPO (PCT)
Prior art keywords
copies
received
block
plural number
subset
Prior art date
Application number
PCT/US2016/063636
Other languages
French (fr)
Inventor
Shuang TIAN
Yang Tang
Dae Jung Yoon
Andrey Chervyakov
Anatoliy IOFFE
Original Assignee
Intel IP Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel IP Corporation filed Critical Intel IP Corporation
Priority to CN201680085903.1A priority Critical patent/CN109155705B/en
Publication of WO2017222582A1 publication Critical patent/WO2017222582A1/en

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/08Arrangements for detecting or preventing errors in the information received by repeating transmission, e.g. Verdan system

Definitions

  • the disclosure relates generally to generating and decoding a combined encoded block from a subset of a plurality of received copies of an encoded block.
  • the present disclosure relates to generating and decoding a combined encoded block for Narrow Band Internet-of-Things (NB-loT) and/or Machine Type Communications (MTC) in 3rd Generation Partnership Project (3GPP) Long Term Evolution (LTE) communication systems.
  • NB-loT Narrow Band Internet-of-Things
  • MTC Machine Type Communications
  • 3GPP 3rd Generation Partnership Project
  • LTE Long Term Evolution
  • LTE system 3GPP LTE communication system
  • End users access the LTE system using mobile electronic devices (known as “user equipment” or equivalently “UE”) including appropriate electronics and software modules to communicate according to standards set forth by 3GPP.
  • UE mobile electronic devices
  • FIG. 4 is a block diagram illustrating components, according to some example embodiments, that are able to read instructions from a machine-readable or computer-readable medium (e.g., a machine-readable storage medium) and perform any one or more of the methodologies discussed herein.
  • a machine-readable or computer-readable medium e.g., a machine-readable storage medium
  • FIG. 5 illustrates, for some embodiments, example components of an electronic device. Detailed Description of Preferred Embodiments
  • Narrowband Internet-of-Things (NB-loT) and Machine Type
  • MTC Mobile Communications
  • NB-loT and MTC protocols apply low-complexity channel coding schemes, such as convolutional codes, for encoding/decoding of the information bits, and allow a transmitter to repeatedly transmit the same block of encoded bits to receivers for a number of times. For example, a transmitter can choose a repetition level.
  • the transmitter can choose a number of repeated transmission times, from a set of ⁇ 1 , 2, 4, 8, 16, 32, 64, 128, 256, 512, 1028, 2048 ⁇ repetitions of the transmission, depending on specific circumstances, such as the present multipath channel condition, the signal-to-noise power ratio, other circumstances, and combinations thereof.
  • the transmitted signal will be attenuated and contaminated by various interferences and noises.
  • a receiver can collect multiple received copies of the block of encoded bits, and try to recover the information bits by applying corresponding decoding algorithms.
  • an apparatus for a user equipment includes at least one data storage device configured to store data corresponding to a plural number of received copies of an encoded block of data.
  • the apparatus also includes at least one processor operably coupled to the at least one data storage device and configured to combine a subset of the plurality number of received copies into a combined block, and decode the combined block. A number of copies in the subset is less than the plural number of the received copies.
  • At least one computer-readable storage medium is configured to store computer-readable instructions thereon.
  • the computer-readable instructions are configured to instruct at least one processor to select a portion of a plurality of copies of a block of encoded bits received from a radio access network (RAN) node, combine the selected portion of the plurality of copies into a combined block, and apply the combined block to a decoder.
  • RAN radio access network
  • a wireless communication device includes a receiver configured to receive encoded blocks of data from a far-end communication device, and a baseband processor operably coupled to the receiver.
  • the baseband processor is configured to select a subset of a plurality of copies of an encoded block received from the far-end communication device, and combine the subset of the plurality of copies of the encoded block into a combined block.
  • the wireless communication device also includes a decoder configured to decode the combined block.
  • the base station 1 10 and the UEs 120 include control circuitry 1 12, 122, respectively, configured to perform functions of embodiments described herein.
  • the control circuitry 1 12 of the base station 1 10 is configured to control the communication elements 1 18 to transmit a plurality of copies 130 of an encoded block to one of the UEs 120.
  • the communication elements 128 of the UE 120 are configured to receive the copies 130 of the encoded block.
  • the control circuitry 122 is configured to store the received copies 130 of the encoded block (e.g., on a storage device 126).
  • the control circuitry 122 is also configured to select a subset of the copies 130 of the encoded block, and generate a combined encoded block from the selected subset of the copies 130.
  • the control circuitry 122 is further configured to decode the combined encoded block. Since only a subset of the copies 130 are used to generate the combined encoded block, at least some of the copies 130 that would otherwise introduce severe defects (e.g., severely destructive noise, severely constructive noise) into the combined encoded block may not be used to generate the combined encoded block. As a result, fewer copies 130 may be relied upon to generate the combined encoded block with higher accuracy, as compared to systems that use all received copies to generate a combined encoded block.
  • severe defects e.g., severely destructive noise, severely constructive noise
  • the control circuitry 1 12, 122 may be configured to perform one or more processes.
  • the control circuitry 1 12, 122 may be configured to perform the method 200 illustrated in FIG. 2.
  • these processes may be performed using application circuitry 502 (FIG. 5), baseband circuitry 504 (FIG. 5), hardware resources 400 (FIG. 4), other circuitry, or combinations thereof.
  • the control circuitry 1 12, 122 includes one or more processors 1 14, 124 (sometimes referred to herein as “processor” 1 14, 124) operably coupled to one or more data storage devices 1 16, 126 (sometimes referred to herein as “storage” 1 16, 126).
  • the processor 1 14, 124 includes any of a central processing unit (CPU), a microcontroller, a programmable logic controller (PLC), a programmable device, other processing devices, or combinations thereof.
  • the processor 1 14, 124 also includes one or more hardware elements (not shown) configured to perform at least a portion of the functions the control circuitry 1 12, 122 is configured to perform.
  • the processor 1 14, 124 may include an application specific integrated circuit (ASIC), a system on chip (SOC), an array of logic gates, an array of programmable logic gates (e.g., a field programmable gate array (FPGA)), other hardware elements, or combinations thereof.
  • ASIC application specific integrated circuit
  • SOC system on chip
  • FPGA field programmable gate array
  • the processor 1 14, 124 is configured to execute computer-readable instructions stored on the storage 1 16, 126.
  • the storage 1 16, 126 may include non-transitory computer-readable storage media.
  • the storage 1 16, 126 includes volatile storage (e.g., random access memory (RAM)), non-volatile storage (e.g., read only memory (ROM)), or combinations thereof.
  • the processor 1 14, 124 may be configured to transfer computer-readable instructions stored in non-volatile storage of the storage 1 16, 126 to volatile storage of the storage 1 16, 126 for execution.
  • the storage 1 16, 126 may include dynamic RAM (DRAM), electrically programmable read-only memory (EPROM), a hard drive, a solid state drive, a Flash drive, a magnetic disc, removable media (e.g., memory cards, thumb drives, optical discs, etc.), or other storage devices.
  • DRAM dynamic RAM
  • EPROM electrically programmable read-only memory
  • HDD hard drive
  • solid state drive solid state drive
  • Flash drive a magnetic disc
  • removable media e.g., memory cards, thumb drives, optical discs, etc.
  • the computer-readable instructions stored on the storage 1 16, 126 are configured to instruct the processor 1 14, 124 to perform at least a portion of the operations the control circuitry 1 12, 122 is configured to perform.
  • the computer-readable instructions may be configured to instruct the processor 124 to perform the method 200 illustrated in FIG. 2. Further description of examples of the control circuitry 1 12, 122 is provided below with reference to FIGS. 4 and 5.
  • FIG. 2 is a simplified flowchart illustrating a method 200 of operating a wireless communication device (e.g., one of the UEs 120 of FIG. 1 ).
  • the method 200 includes receiving 210 a plurality of copies 130 of an encoded block.
  • receiving 210 a plurality of copies 130 includes receiving an encoded block and 1 , 2, 4, 8, 16, 32, 64, 128, 256, 512, 1028, or 2048 copies thereof.
  • the number of received copies 130 depends on specific circumstances, such as the present multipath channel condition, the signal-to-noise power ratio, other factors, or combinations thereof.
  • receiving 210 a plurality of copies 130 of an encoded block includes receiving at least one copy 130 through a first carrier signal operating on a first frequency that is different from a second frequency of a second carrier signal on which at least one other copy 130 is received.
  • the method 200 also includes selecting 220 a portion of the plurality of received copies 130 of the encoded block. Selecting 220 a portion includes selecting a number M of the copies 130 for producing a combined block, where 1 ⁇ M ⁇ K, and K is the number of received copies 130. In some embodiments, the number M of selected copies 130 is determined as a function of at least a
  • the number of received copies 130 to be selected for the portion is determined by the control circuitry 122 of the UE 120.
  • the control circuitry 1 12 of the base station 1 10 determines the number of received copies 130 to be selected for the portion, and the base station 1 10 transmits a communication to the UE 120 indicating the number of copies.
  • selecting 220 a portion includes selecting a number N of groups (e.g., M-i , ... M n , ... M N , where 1 ⁇ n ⁇ N, and 1 ⁇ M n ⁇ K) of copies 130 for producing the number N of different combined blocks.
  • the number of copies 130 in each of the number N of groups may vary from group to group, in some instances. In other instances the number of copies 130 in each of the groups may be the same.
  • the control circuitry 122 may select copies 130 for the various groups to lower a correlation between the different groups by selecting as many different copies for different groups as possible.
  • selecting 220 a portion of the plurality of received copies 130 includes selecting the portion based, at least in part, on a signal-to-noise power level of each copy 130 of the portion exceeding a predetermined threshold level. In some embodiments, selecting 220 a portion of the plurality of received copies 130 includes selecting the portion randomly.
  • selecting 220 a portion includes selecting a number N of groups of copies 130 for producing the number N of different combined blocks
  • selecting a portion 220 may include selecting at least one of the groups based, at least in part, on a first performance parameter corresponding to the received copies 130, and selecting at least another one of the groups based, at least in part, on a second performance parameter corresponding to the received copies 130, the second performance parameter being different from the first performance parameter.
  • at least one of the groups may be selected based, at least in part, on a performance parameter corresponding to the received copies being within a first range, and at least one other of the groups may be selected based, at least in part, on the same
  • the method 200 further includes combining 230 the selected portion of the plurality of copies 130 into a combined block.
  • combining 230 the selected portion of the plurality of copies 130 includes summing the selected portion of the plurality of copies 130.
  • combining 230 the selected portion of the plurality of copies 130 includes averaging (e.g., computed as an arithmetic average, a geometric average, etc.) the selected portion of the plurality of copies 130.
  • the method 200 also includes decoding 240 the combined block.
  • decoding 240 the combined block includes applying the combined block to a decoder.
  • selecting a 220 a portion includes selecting a number N of groups of copies 130 for producing the number N of different combined blocks
  • decoding 240 may include decoding each of the N combined blocks separately (e.g., by applying each of the number N of different combined blocks separately to a decoder).
  • decoding 240 may also include determining whether the decoder successfully decoded the combined block (where only a single combined block is generated) or combined blocks (where multiple combined blocks are generated). By way of non-limiting example, a cyclic redundancy check (CRC) may be performed to determine if the decoder successfully decoded the combined block.
  • CRC cyclic redundancy check
  • control circuitry 122 may be configured for both combining 230 the selected portion of the plurality of copies 130 into the combined block, and for combining all of the plurality of copies 130 into a different combined block.
  • the control circuitry 122 may include a switch component (e.g., implemented in hardware, software, or a combination thereof) that is configured to indicate which combination mode should be used.
  • the selection of the combination modes can be determined by factors, such as present channel conditions, signal-to-noise power levels that the received copies 130 of the block of encoded bits experienced, other factors, or combinations thereof.
  • the control circuitry 122 may be configured to monitor one or more values indicating present channel conditions of a channel through which the copies 130 are received.
  • the control circuitry 122 may also be configured to combine all of the copies 130 into a total combined block and apply the total combined block to the decoder instead of a combined block resulting from combining only a portion of the copies 130 responsive to a value (e.g., a signal-to-noise power ratio, a signal-to-interference power ratio, a signal power of received signals, a bit error rate of received data, a block error rate of received encoded blocks, a parameter indicating channel fading, a noise parameter of the channel, an interference parameter of the channel, etc., or combinations thereof) indicating a channel condition demonstrating a first
  • a value e.g., a signal-to-noise power ratio, a signal-to-interference power ratio, a signal power of received signals, a bit error rate of received data, a block error rate of received encoded blocks, a parameter indicating channel fading, a noise parameter of the channel, an interference parameter of the channel, etc., or combinations thereof
  • the control circuitry 122 may further be configured to apply a combined block resulting from combining only a portion of the copies 130 instead of the total combined block to the decoder responsive to the value indicating a channel condition demonstrating a second predetermined behavior (e.g., a second
  • the method 200 of FIG. 2 is discussed generally as being implemented by the UE 120, the method 200 may be implemented by the base station 1 10 instead of, or in addition to, the UE 120.
  • the base station 1 10 instead of, or in addition to, the UE 120.
  • the base station 1 10 instead of, or in addition to, the UE 120.
  • control circuitry 1 12 may perform operations 220, 230, and 240. Accordingly, the base station 1 10 may receive the copies 130 from the base station 1 10 through the uplink.
  • the method 200 of FIG. 2 can be beneficial in additive white Gaussian noise (AWGN) channels (among other types of noise and/or interference channels).
  • AWGN additive white Gaussian noise
  • x,- is the /-th BPSK modulated symbol representing the /-th bit in a block of encoded bits
  • P r is the average received signal power determined by factors (e.g., the transmitted power, propagation loss, channel fading effect, etc.)
  • FIG. 3 is a simplified plot 300 illustrating a non-limiting example of a Block Error Rate (BLER) plotted against SNR for a convolutional code, according to some embodiments.
  • BLER Block Error Rate
  • a desired BLER of less than ten percent (10%) may be achieved if there is an SNR that is greater than or equal to 1 .5 dB.
  • the wireless communication device may achieve the corresponding SNR M of 1.5 dB by combining more than 64 copies. Accordingly, if the wireless communication device waits for more copies, the desired SNR M and the corresponding BLER may be achieved.
  • the desired SNR M and the corresponding BLER may be achieved, according to equations (3) and (4).
  • This specific example illustrates the general concept that, for a relatively lower single received block's SNR rep-i , the wireless device may consume more transmission time to collect more block copies to meet a given BLER goal, and that for a relatively higher single received block's
  • the wireless device may consume less transmission time to collect fewer block copies to meet a given BLER goal.
  • a wireless device receiving the copies of the encoded blocks may make the determination of when to start selecting copy groups, combining, and decoding. Also, the number of copies in each copy group does not have to be the same (e.g., a first copy group may have a different number of copies than a second copy group).
  • FIG. 4 is a block diagram illustrating components, according to some example embodiments, that are able to read instructions from a machine-readable or computer-readable medium (e.g., a machine-readable storage medium) and perform any one or more of the methodologies discussed herein.
  • FIG. 4 shows a diagrammatic representation of hardware resources 400 including one or more processors (or processor cores) 410, one or more memory/storage devices 420, and one or more communication resources 430, each of which is communicatively coupled via a bus 440.
  • the processors 410 may include, for example, a processor 412 and a processor 414.
  • the memory/storage devices 420 may include main memory, disk storage, or any suitable combination thereof.
  • the communication resources 430 may include interconnection and/or network interface components or other suitable devices to communicate with one or more peripheral devices 404 and/or one or more databases 406 via a network 408.
  • the communication resources 430 may include wired communication components (e.g., for coupling via a Universal Serial Bus (USB)), cellular communication components, Near Field Communication (NFC) components, Bluetooth® components (e.g., Bluetooth® Low Energy), Wi-Fi® components, and other communication components.
  • wired communication components e.g., for coupling via a Universal Serial Bus (USB)
  • NFC Near Field Communication
  • Bluetooth® components e.g., Bluetooth® Low Energy
  • Wi-Fi® components e.g., Wi-Fi® components
  • Instructions 450 may comprise software, a program, an application, an applet, an app, or other executable code for causing at least any of the processors 410 to perform any one or more of the methodologies discussed herein.
  • the instructions 450 may reside, completely or partially, within at least one of the processors 410 (e.g., within the processor's cache memory), the memory/storage devices 420, or any suitable combination thereof.
  • any portion of the instructions 450 may be transferred to the hardware resources 400 from any combination of the peripheral devices 404 and/or the databases 406.
  • the memory of processors 410, the memory/storage devices 420, the peripheral devices 404, and the databases 406 are examples of computer-readable and machine-readable media.
  • the instructions 450 may be configured to instruct any of the processors 410 to perform any of the operations or functions discussed herein.
  • circuitry may refer to, be part of, or include an Application Specific Integrated Circuit (ASIC), an electronic circuit, a processor (shared, dedicated, or group), and/or memory (shared, dedicated, or group) that execute one or more software or firmware programs, a combinational logic circuit, and/or other suitable hardware components that provide the described functionality.
  • ASIC Application Specific Integrated Circuit
  • the circuitry may be implemented in, or functions associated with the circuitry may be implemented by, one or more software or firmware modules.
  • circuitry may include logic, at least partially operable in hardware.
  • FIG. 5 illustrates, for some embodiments, example components of an electronic device 500.
  • the electronic device 500 may be, may implement, may be
  • the electronic device 500 may include application circuitry 502, baseband circuitry 504, Radio Frequency (RF) circuitry 506, front-end module (FEM) circuitry 508 and one or more antennas 510, coupled together at least as shown in FIG. 5.
  • UE user equipment
  • RF Radio Frequency
  • FEM front-end module
  • the application circuitry 502 may include one or more application processors.
  • the application circuitry 502 may include circuitry such as, but not limited to, one or more single-core or multi-core processors.
  • processor(s) may include any combination of general-purpose processors
  • the processors may be coupled with and/or may include memory/storage and may be configured to execute instructions stored in the memory/storage to enable various applications and/or operating systems to run on the system.
  • the baseband circuitry 504 may include circuitry such as, but not limited to, one or more single-core or multi-core processors.
  • the baseband circuitry 504 may include one or more baseband processors and/or control logic to process baseband signals received from a receive signal path of the RF circuitry 506 and to generate baseband signals for a transmit signal path of the RF circuitry 506.
  • Baseband processing circuity 504 may interface with the application circuitry 502 for generation and processing of the baseband signals and for controlling operations of the RF circuitry 506.
  • the baseband circuitry 504 may include a second generation (2G) baseband processor 504A, third generation (3G) baseband processor 504B, fourth generation (4G) baseband processor 504C, and/or other baseband processor(s) 504D for other existing generations, generations in development, or generations to be developed in the future (e.g., fifth generation (5G), 6G, etc.).
  • the baseband circuitry 504 e.g., one or more of baseband processors 504A-D
  • the radio control functions may include, but are not limited to, signal
  • modulation/demodulation circuitry of the baseband circuitry 504 may include Fast-Fourier Transform (FFT), precoding, and/or constellation
  • encoding/decoding circuitry of the baseband circuitry 504 may include convolution, tail-biting
  • Embodiments of modulation/demodulation and encoder/decoder functionality are not limited to these examples and may include other suitable functionality in other embodiments.
  • the baseband circuitry 504 may include elements of a protocol stack such as, for example, elements of an evolved universal terrestrial radio access network (EUTRAN) protocol including, for example, physical (PHY), media access control (MAC), radio link control (RLC), packet data convergence protocol (PDCP), and/or radio resource control (RRC) elements.
  • EUTRAN evolved universal terrestrial radio access network
  • a central processing unit (CPU) 504E of the baseband circuitry 504 may be configured to run elements of the protocol stack for signaling of the PHY, MAC, RLC, PDCP and/or RRC layers.
  • the baseband circuitry 504 may include one or more audio digital signal processor(s) (DSP) 504F.
  • the audio DSP(s) 504F may include elements for compression/decompression and echo cancellation and may include other suitable processing elements in other embodiments.
  • the baseband circuitry 504 may further include memory/storage 504G.
  • the memory/storage 504G may be used to load and store data and/or instructions for operations performed by the processors of the baseband circuitry 504.
  • Memory/storage 504G may include any combination of suitable volatile memory and/or non-volatile memory.
  • the memory/storage 504G may include any combination of various levels of memory/storage including, but not limited to, read-only memory (ROM) having embedded software instructions (e.g., firmware), random access memory (e.g., dynamic random access memory (DRAM)), cache, buffers, etc.
  • ROM read-only memory
  • DRAM dynamic random access memory
  • the memory/storage 504G may be shared among the various processors or dedicated to particular processors.
  • Components of the baseband circuitry 504 may be suitably combined in a single chip, combined in a single chipset, or disposed on a same circuit board in some embodiments. In some embodiments, some or all of the constituent components of the baseband circuitry 504 and the application circuitry 502 may be implemented together, such as, for example, on a system on a chip (SOC).
  • SOC system on a chip
  • the baseband circuitry 504 may provide for communication compatible with one or more radio technologies.
  • the baseband circuitry 504 may support communication with an evolved universal terrestrial radio access network (EUTRAN) and/or other wireless metropolitan area networks (WMAN), a wireless local area network (WLAN), or a wireless personal area network (WPAN).
  • EUTRAN evolved universal terrestrial radio access network
  • WMAN wireless metropolitan area networks
  • WLAN wireless local area network
  • WPAN wireless personal area network
  • multi-mode baseband circuitry Embodiments in which the baseband circuitry 504 is configured to support radio communications of more than one wireless protocol.
  • RF circuitry 506 may enable communication with wireless networks using modulated electromagnetic radiation through a non-solid medium.
  • the RF circuitry 506 may include switches, filters, amplifiers, etc., to facilitate the communication with the wireless network.
  • RF circuitry 506 may include a receive signal path, which may include circuitry to down-convert RF signals received from the FEM circuitry 508 and provide baseband signals to the baseband circuitry 504.
  • RF circuitry 506 may also include a transmit signal path, which may include circuitry to up-convert baseband signals provided by the baseband circuitry 504 and provide RF output signals to the FEM circuitry 508 for transmission.
  • the RF circuitry 506 may include a receive signal path and a transmit signal path.
  • the receive signal path of the RF circuitry 506 may include mixer circuitry 506A, amplifier circuitry 506B, and filter circuitry 506C.
  • the transmit signal path of the RF circuitry 506 may include filter circuitry 506C and mixer circuitry 506A.
  • RF circuitry 506 may also include synthesizer circuitry 506D for synthesizing a frequency for use by the mixer circuitry 506A of the receive signal path and the transmit signal path.
  • the mixer circuitry 506A of the receive signal path may be configured to down-convert RF signals received from the FEM circuitry 508 based on the synthesized frequency provided by synthesizer circuitry 506D.
  • the amplifier circuitry 506B may be configured to amplify the down- converted signals
  • the filter circuitry 506C may be a low-pass filter (LPF) or band-pass filter (BPF) configured to remove unwanted signals from the down- converted signals to generate output baseband signals.
  • Output baseband signals may be provided to the baseband circuitry 504 for further processing.
  • the output baseband signals may be zero-frequency baseband signals, although this is not a requirement.
  • mixer circuitry 506A of the receive signal path may comprise passive mixers, although the scope of the embodiments is not limited in this respect.
  • the mixer circuitry 506A of the transmit signal path may be configured to up-convert input baseband signals based on the synthesized frequency provided by the synthesizer circuitry 506D to generate RF output signals for the FEM circuitry 508.
  • the baseband signals may be provided by the baseband circuitry 504 and may be filtered by filter circuitry 506C.
  • the filter circuitry 506C may include a low-pass filter (LPF), although the scope of the embodiments is not limited in this respect.
  • the mixer circuitry 506A of the receive signal path and the mixer circuitry 506A of the transmit signal path may include two or more mixers and may be arranged for quadrature downconversion and/or upconversion respectively.
  • the mixer circuitry 506A of the receive signal path and the mixer circuitry 506A of the transmit signal path may include two or more mixers and may be arranged for image rejection (e.g., Hartley image rejection).
  • the mixer circuitry 506A of the receive signal path and the mixer circuitry 506A of the transmit signal path may be arranged for direct downconversion and/or direct upconversion, respectively.
  • the mixer circuitry 506A of the receive signal path and the mixer circuitry 506A of the transmit signal path may be configured for super-heterodyne operation.
  • the output baseband signals and the input baseband signals may be analog baseband signals, although the scope of the embodiments is not limited in this respect.
  • the output baseband signals and the input baseband signals may be digital baseband signals.
  • the RF circuitry 506 may include analog-to-digital converter (ADC) and digital-to-analog converter (DAC) circuitry, and the baseband circuitry 504 may include a digital baseband interface to communicate with the RF circuitry 506.
  • ADC analog-to-digital converter
  • DAC digital-to-analog converter
  • a separate radio IC circuitry may be provided for processing signals for each spectrum, although the scope of the embodiments is not limited in this respect.
  • the synthesizer circuitry 506D may be a fractional- M synthesizer or a fractional N/N+1 synthesizer, although the scope of the
  • synthesizer circuitry 506D may be a delta-sigma synthesizer, a frequency multiplier, or a synthesizer comprising a phase-locked loop with a frequency divider.
  • Synthesizer circuitry 506D of the RF circuitry 506 may include a divider, a delay-locked loop (DLL), a multiplexer and a phase accumulator.
  • DLL delay-locked loop
  • the divider may be a dual modulus divider (DMD) and the phase accumulator may be a digital phase accumulator (DPA).
  • the DMD may be configured to divide the input signal by either N or N+1 (e.g., based on a carry-out) to provide a fractional division ratio.
  • the DLL may include a set of cascaded, tunable, delay elements; a phase detector; a charge pump; and a D-type flip-flop.
  • the delay elements may be configured to break a VCO period up into Nd equal packets of phase, where Nd is the number of delay elements in the delay line. In this way, the DLL provides negative feedback to help ensure that the total delay through the delay line is one VCO cycle.
  • synthesizer circuitry 506D may be configured to generate a carrier frequency as the output frequency, while in other embodiments, the output frequency may be a multiple of the carrier frequency (e.g., twice the carrier frequency, four times the carrier frequency) and used in conjunction with quadrature generator and divider circuitry to generate multiple signals at the carrier frequency with multiple different phases with respect to each other.
  • the output frequency may be a local oscillator (LO) frequency (fLO).
  • the RF circuitry 506 may include an IQ/polar converter.
  • FEM circuitry 508 may include a receive signal path, which may include circuitry configured to operate on RF signals received from one or more antennas 510, amplify the received signals and provide the amplified versions of the received signals to the RF circuitry 506 for further processing.
  • FEM circuitry 508 may also include a transmit signal path, which may include circuitry configured to amplify signals for transmission provided by the RF circuitry 506 for transmission by one or more of the one or more antennas 510.
  • the FEM circuitry 508 may include a TX/RX switch to switch between transmit mode and receive mode operation.
  • the FEM circuitry 508 may include a receive signal path and a transmit signal path.
  • the receive signal path of the FEM circuitry 508 may include a low-noise amplifier (LNA) to amplify received RF signals and provide the amplified received RF signals as an output (e.g., to the RF circuitry 506).
  • the transmit signal path of the FEM circuitry 508 may include a power amplifier (PA) to amplify input RF signals (e.g., provided by RF circuitry 506), and one or more filters to generate RF signals for subsequent transmission (e.g., by one or more of the one or more antennas 510).
  • PA power amplifier
  • the electronic device 500 may include additional elements such as, for example, memory/storage, display, camera, sensor, and/or input/output (I/O) interface.
  • additional elements such as, for example, memory/storage, display, camera, sensor, and/or input/output (I/O) interface.
  • Example 1 An apparatus for a user equipment (UE), comprising: at least one data storage device configured to store data indicating a plural number of received copies of an encoded block of data, wherein the data indicating the plural number of received copies comprises downlink (DL) data; at least one processor operably coupled to the at least one data storage device and configured to: combine a subset of the plural number of received copies into a combined block, a number of copies in the subset being less than the plural number of the received copies; and decode the combined block.
  • DL downlink
  • Example 2 The apparatus of Example 1 , wherein the subset of the plural number of received copies is selected based, at least in part, on a signal to noise power level of each copy of the subset of the copies exceeding a predetermined threshold level.
  • Example 3 The apparatus of Example 1 , wherein the subset of the copies are selected randomly.
  • Example 4 The apparatus according to any one of Examples 1 -3, wherein the at least one processor is further configured to: combine one or more other subsets of the plural number of received copies of the encoded block into one or more other combined blocks, a number of copies in each of the one or more other subsets being less than or equal to the plural number of received copies of the encoded block; and decode the one or more other combined blocks.
  • Example 5 The apparatus of Example 4, wherein the at least one processor is further configured to decode each of the one or more other combined blocks and the combined block separately.
  • Example 6 The apparatus according to any one of Examples 4 and 5, wherein: the subset of the plural number of received copies is selected based, at least in part, on a first performance parameter corresponding to the received copies; and at least one of the one or more other subsets is selected based, at least in part, on a second performance parameter corresponding to the received copies.
  • Example 7 The apparatus according to any one of Examples 4 and 5, wherein: the subset of the plural number of received copies is selected based, at least in part, on a performance parameter corresponding to the received copies being within a first range; and at least one of the one or more subsets is selected based, at least in part, on the same performance parameter corresponding to the received copies being within a second range that is different from the first range.
  • Example 8 The apparatus according to any one of Examples 1 -7, wherein the at least one processor is configured to vary the number of copies in the subset as a function of at least a performance parameter of communications in which the plural number of received copies are received and a desired block error-rate (BLER).
  • BLER block error-rate
  • Example 9 The apparatus of Example 8, wherein the performance parameter is a signal-to-noise power level.
  • Example 10 The apparatus according to any one of Examples 1 -9, wherein the at least one processor is configured to switch between: combining the subset of the plural number of received copies of the encoded block into the combined block; and combining all of the plural number of received copies into a total combined block.
  • Example 1 1 The apparatus according to any one of Examples 1 -10, wherein the plural number of received copies are received from an evolved Node B (eNB) in a narrowband internet-of-things (NB-loT) system.
  • eNB evolved Node B
  • NB-loT narrowband internet-of-things
  • Example 12 The apparatus according to any one of Examples 1 -10, wherein the plural number of received copies are received from an evolved Node B (eNB) in a machine type communications (MTC) system.
  • eNB evolved Node B
  • MTC machine type communications
  • Example 13 A computer-readable storage medium configured to store computer readable instructions thereon, the computer-readable instructions configured to instruct at least one processor to: select a portion of a plurality of copies of a block of encoded bits received from a radio access network (RAN) node through a downlink of a cellular communication network; combine the selected portion of the plurality of copies into a combined block; and apply the combined block to a decoder; wherein at least one copy of the plurality of copies received from the RAN node is received by a first carrier signal operating on a first frequency that is different from a second frequency of a second carrier signal on which at least one other copy of the plurality of copies is received.
  • RAN radio access network
  • Example 14 The computer-readable storage medium of Example 13, wherein a number of the plurality of copies of the block received from the RAN node is selected from the group consisting of two (2), four (4), sixteen (16), thirty-two (32), sixty-four (64), 128, 256, 512, 1028, and 2048 copies of the encoded block received from the RAN node.
  • Example 15 The computer-readable storage medium according to any one of Examples 13 and 14, wherein the computer-readable instructions are configured to instruct the one or more processors to: monitor one or more values indicating present channel conditions of a channel through which the plurality of copies are received from the RAN node; combine all of the copies in the plurality of copies received from the RAN node into a total combined block and apply the total combined block to the decoder instead of the combined block responsive to the one or more values indicating the present channel conditions demonstrating a first predetermined behavior; and apply the combined block to the decoder instead of the total combined block responsive to the one or more values indicating the present channel conditions demonstrating a second predetermined behavior different from the first predetermined behavior.
  • Example 16 The computer-readable storage medium of Example 15, wherein the one or more values include at least one channel parameter selected from the group consisting of a signal to noise ratio of the channel, a signal power of received signals, a bit error rate of received data, a block error rate of received encoded blocks, a parameter indicating channel fading, a noise parameter of the channel, and an interference parameter of the channel.
  • the one or more values include at least one channel parameter selected from the group consisting of a signal to noise ratio of the channel, a signal power of received signals, a bit error rate of received data, a block error rate of received encoded blocks, a parameter indicating channel fading, a noise parameter of the channel, and an interference parameter of the channel.
  • Example 17 A wireless communication device, comprising: a receiver configured to receive encoded blocks of data from a far-end communication device through a cellular communication network; a baseband processor operably coupled to the receiver and configured to: select a subset of a plurality of copies of an encoded block received from the far-end communication device; and combine the subset of the plurality of copies of the encoded block into a combined block; and a decoder configured to decode the combined block.
  • Example 18 The wireless communication device of Example 17, wherein the wireless communication device is a user equipment (UE) and the far-end communication device is a cellular base station.
  • UE user equipment
  • Example 20 The wireless communication device according to any one of Examples 17-19, wherein the baseband processor is configured to perform a cyclic redundancy check (CRC) to determine whether the decoder successfully decoded the combined block.
  • CRC cyclic redundancy check
  • Example 24 The method according to any one of Examples 21 -23, further comprising: combining one or more other subsets of the plural number of received copies of the encoded block into one or more other combined blocks, a number of copies in each of the one or more other subsets being less than or equal to the plural number of received copies of the encoded block; and decoding the one or more other combined blocks.
  • Example 26 The method according to any one of Examples 24 and 25, further comprising: selecting the subset of the plural number of received copies based, at least in part, on a first performance parameter corresponding to the received copies; and selecting at least one of the one or more other subsets based, at least in part, on a second performance parameter corresponding to the received copies.
  • Example 29 The method of Example 28, wherein the performance parameter is a signal-to-noise power level.
  • Example 31 The method according to any one of Examples 21 -30, wherein receiving a plural number of received copies of an encoded block of data comprises communicating with an evolved Node B (eNB) in a narrowband internet- of-things (NB-loT) system.
  • eNB evolved Node B
  • NB-loT narrowband internet- of-things
  • Example 37 A method of operating a wireless communication device, the method comprising: receiving encoded blocks of data from a far-end communication device through a cellular communication network; selecting a subset of a plurality of copies of an encoded block received from the far-end communication device; and combine the subset of the plurality of copies of the encoded block into a combined block; and decoding the combined block.
  • Example 38 The method of Example 37, wherein the wireless
  • the communication device is a user equipment (UE) and the far-end communication device is a cellular base station.
  • UE user equipment
  • Example 39 The method of Example 37, wherein the wireless
  • Example 41 A computer-readable storage medium comprising computer- readable instructions stored thereon, the computer-readable instructions configured to instruct a processor to perform the method according to any one of Examples 21 - 40.
  • Example 42 A means for performing the method according to any one of Examples 21 -40.
  • Example 43 may include upon receiving K copies of the block of encoded bits, the receiver can judiciously select a group of M (1 ⁇ M ⁇ K) copies for
  • Example 46 may include the subject matter of Example 44 may include the subject matter of Example 44 and/or some other example herein, wherein the receiver should try to lower the correlation between different copy groups by selecting as many different copies for different groups as possible.
  • Example 48 may include subject matter wherein if a receiver supports both the conventional (which combines all the received copies of the block of encoded bits) and described combination modes for decoding, a switch component/device would be required at the receiver to indicate which combination mode is used.
  • the selection of the combination modes can be determined by factors, such as present channel conditions and signal-to-noise power levels that the received copies of the block of encoded bits experienced.
  • Example 50 may include one or more non-transitory computer-readable media comprising instructions to cause an electronic device, upon execution of the instructions by one or more processors of the electronic device, to perform one or more elements of a method described in or related to any of Examples 43-48, or any other method or process described herein.
  • Example 51 may include an apparatus comprising logic, modules, and/or circuitry to perform one or more elements of a method described in or related to any of Examples 43-48, or any other method or process described herein.
  • Example 54 may include a method of communicating in a wireless network as shown and described herein.
  • Example 55 may include a system for providing wireless communication as shown and described herein.
  • Example 56 may include a device for providing wireless communication as shown and described herein.

Abstract

Apparatuses for combining and decoding encoded blocks are disclosed. An apparatus for a user equipment (UE) includes at least one processor configured to combine a subset of a plural number of received copies of an encoded block of data into a combined block. A number of copies in the subset is less than the plural number of the received copies. The at least one processor is also configured to decode the combined block.

Description

APPARATUSES FOR COMBINING AND DECODING ENCODED BLOCKS
Related Applications
[0001] This application claims priority to U.S. Provisional Patent Application No. 62/352,373, filed June 20, 2016, which is hereby incorporated by reference herein in its entirety.
Technical Field
[0002] The disclosure relates generally to generating and decoding a combined encoded block from a subset of a plurality of received copies of an encoded block. In particular, the present disclosure relates to generating and decoding a combined encoded block for Narrow Band Internet-of-Things (NB-loT) and/or Machine Type Communications (MTC) in 3rd Generation Partnership Project (3GPP) Long Term Evolution (LTE) communication systems.
Background
[0003] In recent years, demand for access to fast mobile wireless data for mobile electronic devices has fueled the development of the 3GPP LTE communication system (hereinafter "LTE system"). End users access the LTE system using mobile electronic devices (known as "user equipment" or equivalently "UE") including appropriate electronics and software modules to communicate according to standards set forth by 3GPP.
Brief Description of the Drawings
[0004] FIG. 1 is a simplified block diagram of a wireless communication system, according to some embodiments.
[0005] FIG. 2 is a simplified flowchart illustrating a method of operating a wireless communication device
[0006] FIG. 3 is a simplified plot illustrating a non-limiting example of a Block Error Rate plotted against signal-to-noise ratio for a convolutional code, according to some embodiments.
[0007] FIG. 4 is a block diagram illustrating components, according to some example embodiments, that are able to read instructions from a machine-readable or computer-readable medium (e.g., a machine-readable storage medium) and perform any one or more of the methodologies discussed herein.
[0008] FIG. 5 illustrates, for some embodiments, example components of an electronic device. Detailed Description of Preferred Embodiments
[0009] In the following detailed description, reference is made to the
accompanying drawings, which form a part hereof, and in which are shown by way of illustration specific embodiments in which the present disclosure may be practiced. These embodiments are described in sufficient detail to enable those of ordinary skill in the art to practice the disclosure made herein. It should be understood, however, that the detailed description and the specific examples, while indicating examples of embodiments of the disclosure, are given by way of illustration only, and not by way of limitation. From the disclosure, various substitutions, modifications, additions, rearrangements, or combinations thereof within the scope of the disclosure may be made and will become apparent to those of ordinary skill in the art.
[0010] In accordance with common practice, the various features illustrated in the drawings may not be drawn to scale. The illustrations presented herein are not meant to be actual views of any particular apparatus (e.g., device, system, etc.) or method, but are merely idealized representations that are employed to describe various embodiments of the disclosure. Accordingly, the dimensions of the various features may be arbitrarily expanded or reduced for clarity. In addition, some of the drawings may be simplified for clarity. Thus, the drawings may not depict all of the components of a given apparatus or all operations of a particular method.
[0011] Information and signals described herein may be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the description may be represented by voltages, currents,
electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof. Some drawings may illustrate signals as a single signal for clarity of presentation and description. It should be understood by a person of ordinary skill in the art that the signal may represent a bus of signals, wherein the bus may have a variety of bit widths, and the present disclosure may be
implemented on any number of data signals including a single data signal.
[0012] The various illustrative logical blocks, modules, circuits, and algorithm acts described in connection with embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and acts are described generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the embodiments of the disclosure described herein.
[0013] In addition, it is noted that the embodiments may be described in terms of a process that is depicted as a flowchart, a flow diagram, a structure diagram, a signaling diagram, or a block diagram. Although a flowchart or signaling diagram may describe operational acts as a sequential process, many of these acts can be performed in another sequence, in parallel, or substantially concurrently. In addition, the order of the acts may be rearranged. A process may correspond to a method, a function, a procedure, a subroutine, a subprogram, etc. Furthermore, the methods disclosed herein may be implemented in hardware, software, or both. If
implemented in software, the functions may be stored or transmitted as one or more computer-readable instructions (e.g., software code) on a computer-readable medium. Computer-readable media includes both computer storage media (i.e., non-transitory media) and communication media including any medium that facilitates transfer of a computer program from one place to another.
[0014] Narrowband Internet-of-Things (NB-loT) and Machine Type
Communications (MTC) are both currently 3GPP LTE work items. One common target of these work items is to develop wireless technologies that can support enhanced network coverage and a massive number of low cost, low power consumption and low delay sensitivity UE devices. To meet this particular target, NB-loT and MTC protocols apply low-complexity channel coding schemes, such as convolutional codes, for encoding/decoding of the information bits, and allow a transmitter to repeatedly transmit the same block of encoded bits to receivers for a number of times. For example, a transmitter can choose a repetition level. For example, the transmitter can choose a number of repeated transmission times, from a set of {1 , 2, 4, 8, 16, 32, 64, 128, 256, 512, 1028, 2048} repetitions of the transmission, depending on specific circumstances, such as the present multipath channel condition, the signal-to-noise power ratio, other circumstances, and combinations thereof. [0015] At the receiver side, after traveling through certain communication channels, the transmitted signal will be attenuated and contaminated by various interferences and noises. In NB-loT and MTC scenarios, a receiver can collect multiple received copies of the block of encoded bits, and try to recover the information bits by applying corresponding decoding algorithms.
[0016] Conventionally, a receiver may combine (e.g. add together, average, etc.) all the received copies of the block of encoded bits to produce a combined block. The combined block is then input to the decoder to improve the probability of successful decoding (e.g. to pass Cyclic Redundancy Check, CRC). For NB-loT and MTC protocols, one goal is to support an extended network coverage with high device density, in which scenario the noise power is rather likely to be much higher than the intended signal's power at the receiver side. Accordingly, the transmitter repeatedly transmits the same block of encoded bits for potentially as many as thousands of times. Due to the randomness in noise, the impact of noise on signals corresponding to received block copies can be destructive or constructive to the signals. If one or more received block copies are affected by noise in a severely destructive manner, and is used to produce the combined block for decoding, the receiver may take a lot more time to collect a sufficient number of received block copies affected by constructive and/or less destructive noise to leverage the severely destructive impact on the combined block.
[0017] Disclosed herein are apparatuses, computer-readable storage media, and communication devices configured to select a subgroup of received copies of an encoded block, and generate a combined encoded block from the subgroup of received copies. Although the disclosure focuses on a UE receiving copies of an encoded block in a downlink from a cellular base station, embodiments disclosed herein are applicable also to a cellular base station receiving copies of an encoded block from a UE in an uplink, or any other situation where combining of copies of a block of data would be helpful or desirable.
[0018] In some embodiments, an apparatus for a user equipment (UE) includes at least one data storage device configured to store data corresponding to a plural number of received copies of an encoded block of data. The apparatus also includes at least one processor operably coupled to the at least one data storage device and configured to combine a subset of the plurality number of received copies into a combined block, and decode the combined block. A number of copies in the subset is less than the plural number of the received copies.
[0019] In some embodiments, at least one computer-readable storage medium is configured to store computer-readable instructions thereon. The computer-readable instructions are configured to instruct at least one processor to select a portion of a plurality of copies of a block of encoded bits received from a radio access network (RAN) node, combine the selected portion of the plurality of copies into a combined block, and apply the combined block to a decoder.
[0020] In some embodiments, a wireless communication device includes a receiver configured to receive encoded blocks of data from a far-end communication device, and a baseband processor operably coupled to the receiver. The baseband processor is configured to select a subset of a plurality of copies of an encoded block received from the far-end communication device, and combine the subset of the plurality of copies of the encoded block into a combined block. The wireless communication device also includes a decoder configured to decode the combined block.
[0021] FIG. 1 is a simplified block diagram of a wireless communication system 100, according to some embodiments. The wireless communication system 100 includes a cellular base station 1 10 (also referred to sometimes herein as "base station" 1 10, "Radio Access Network (RAN) Node," "evolved node B," "eNB," etc.) and user equipment (UEs) 120 (e.g., cellular communications enabled electronic devices). The base station 1 10 includes communication elements 1 18 (e.g., an antenna, transmission circuitry, receiving circuitry, etc.) configured to engage in wireless communication with communication elements 128 (e.g., a communication device or radio) of the UEs 120.
[0022] The base station 1 10 and the UEs 120 include control circuitry 1 12, 122, respectively, configured to perform functions of embodiments described herein. By way of non-limiting example, the control circuitry 1 12 of the base station 1 10 is configured to control the communication elements 1 18 to transmit a plurality of copies 130 of an encoded block to one of the UEs 120. The communication elements 128 of the UE 120 are configured to receive the copies 130 of the encoded block. The control circuitry 122 is configured to store the received copies 130 of the encoded block (e.g., on a storage device 126). The control circuitry 122 is also configured to select a subset of the copies 130 of the encoded block, and generate a combined encoded block from the selected subset of the copies 130. The control circuitry 122 is further configured to decode the combined encoded block. Since only a subset of the copies 130 are used to generate the combined encoded block, at least some of the copies 130 that would otherwise introduce severe defects (e.g., severely destructive noise, severely constructive noise) into the combined encoded block may not be used to generate the combined encoded block. As a result, fewer copies 130 may be relied upon to generate the combined encoded block with higher accuracy, as compared to systems that use all received copies to generate a combined encoded block.
[0023] The control circuitry 1 12, 122 may be configured to perform one or more processes. By way of non-limiting example, the control circuitry 1 12, 122 may be configured to perform the method 200 illustrated in FIG. 2. Also by way of non-limiting example, these processes may be performed using application circuitry 502 (FIG. 5), baseband circuitry 504 (FIG. 5), hardware resources 400 (FIG. 4), other circuitry, or combinations thereof.
[0024] The control circuitry 1 12, 122 includes one or more processors 1 14, 124 (sometimes referred to herein as "processor" 1 14, 124) operably coupled to one or more data storage devices 1 16, 126 (sometimes referred to herein as "storage" 1 16, 126). The processor 1 14, 124 includes any of a central processing unit (CPU), a microcontroller, a programmable logic controller (PLC), a programmable device, other processing devices, or combinations thereof. In some embodiments the processor 1 14, 124 also includes one or more hardware elements (not shown) configured to perform at least a portion of the functions the control circuitry 1 12, 122 is configured to perform. By way of non-limiting example, the processor 1 14, 124 may include an application specific integrated circuit (ASIC), a system on chip (SOC), an array of logic gates, an array of programmable logic gates (e.g., a field programmable gate array (FPGA)), other hardware elements, or combinations thereof. The processor 1 14, 124 is configured to execute computer-readable instructions stored on the storage 1 16, 126.
[0025] The storage 1 16, 126 may include non-transitory computer-readable storage media. By way of non-limiting example, the storage 1 16, 126 includes volatile storage (e.g., random access memory (RAM)), non-volatile storage (e.g., read only memory (ROM)), or combinations thereof. In some embodiments, the processor 1 14, 124 may be configured to transfer computer-readable instructions stored in non-volatile storage of the storage 1 16, 126 to volatile storage of the storage 1 16, 126 for execution. By way of non-limiting example, the storage 1 16, 126 may include dynamic RAM (DRAM), electrically programmable read-only memory (EPROM), a hard drive, a solid state drive, a Flash drive, a magnetic disc, removable media (e.g., memory cards, thumb drives, optical discs, etc.), or other storage devices.
[0026] The computer-readable instructions stored on the storage 1 16, 126 are configured to instruct the processor 1 14, 124 to perform at least a portion of the operations the control circuitry 1 12, 122 is configured to perform. By way of non-limiting example, the computer-readable instructions may be configured to instruct the processor 124 to perform the method 200 illustrated in FIG. 2. Further description of examples of the control circuitry 1 12, 122 is provided below with reference to FIGS. 4 and 5.
[0027] FIG. 2 is a simplified flowchart illustrating a method 200 of operating a wireless communication device (e.g., one of the UEs 120 of FIG. 1 ). Referring to FIGS. 1 and 2 together, the method 200 includes receiving 210 a plurality of copies 130 of an encoded block. In some embodiments, receiving 210 a plurality of copies 130 includes receiving an encoded block and 1 , 2, 4, 8, 16, 32, 64, 128, 256, 512, 1028, or 2048 copies thereof. In some embodiments, the number of received copies 130 depends on specific circumstances, such as the present multipath channel condition, the signal-to-noise power ratio, other factors, or combinations thereof. In some embodiments, receiving 210 a plurality of copies 130 of an encoded block includes receiving at least one copy 130 through a first carrier signal operating on a first frequency that is different from a second frequency of a second carrier signal on which at least one other copy 130 is received.
[0028] In OFDM-based systems, such as 3GPP LTE systems, if dynamic frequency resource allocation schemes, such as distributed mapping or frequency hopping, are applied, the copies 130 transmitted in different time slots would be assigned to and transmitted on different frequency bands. When mutlipath channels are present, different frequency bands would have different behaviors. Some bands may end up with constructive interference, noise, or a combination thereof, when received after transmission. Other bands may end up with destructive interference, noise, or a combination thereof. If more copies 130 that were received on the constructive frequency bands were selected for combination, the probability of successful decoding would be improved.
[0029] The method 200 also includes selecting 220 a portion of the plurality of received copies 130 of the encoded block. Selecting 220 a portion includes selecting a number M of the copies 130 for producing a combined block, where 1 < M < K, and K is the number of received copies 130. In some embodiments, the number M of selected copies 130 is determined as a function of at least a
performance parameter (e.g., signal-to-noise-power level, other channel conditions, etc.) of communications in which the received copies 130 are received and a desired block error rate (as will be discussed in more detail with reference to FIG. 3). In some embodiments, the number of received copies 130 to be selected for the portion is determined by the control circuitry 122 of the UE 120. In some embodiments, the control circuitry 1 12 of the base station 1 10 determines the number of received copies 130 to be selected for the portion, and the base station 1 10 transmits a communication to the UE 120 indicating the number of copies.
[0030] In some embodiments, selecting 220 a portion includes selecting a number N of groups (e.g., M-i , ... Mn, ... MN, where 1 < n < N, and 1 < Mn≤ K) of copies 130 for producing the number N of different combined blocks. The number of copies 130 in each of the number N of groups may vary from group to group, in some instances. In other instances the number of copies 130 in each of the groups may be the same. In some embodiments, the control circuitry 122 may select copies 130 for the various groups to lower a correlation between the different groups by selecting as many different copies for different groups as possible.
[0031] In some embodiments, selecting 220 a portion of the plurality of received copies 130 includes selecting the portion based, at least in part, on a signal-to-noise power level of each copy 130 of the portion exceeding a predetermined threshold level. In some embodiments, selecting 220 a portion of the plurality of received copies 130 includes selecting the portion randomly. In embodiments where selecting 220 a portion includes selecting a number N of groups of copies 130 for producing the number N of different combined blocks, selecting a portion 220 may include selecting at least one of the groups based, at least in part, on a first performance parameter corresponding to the received copies 130, and selecting at least another one of the groups based, at least in part, on a second performance parameter corresponding to the received copies 130, the second performance parameter being different from the first performance parameter. In some embodiments, at least one of the groups may be selected based, at least in part, on a performance parameter corresponding to the received copies being within a first range, and at least one other of the groups may be selected based, at least in part, on the same
performance parameter corresponding to the received copies being within a second range different from the first range.
[0032] The method 200 further includes combining 230 the selected portion of the plurality of copies 130 into a combined block. In some embodiments, combining 230 the selected portion of the plurality of copies 130 includes summing the selected portion of the plurality of copies 130. In some embodiments, combining 230 the selected portion of the plurality of copies 130 includes averaging (e.g., computed as an arithmetic average, a geometric average, etc.) the selected portion of the plurality of copies 130.
[0033] The method 200 also includes decoding 240 the combined block. In some embodiments, decoding 240 the combined block includes applying the combined block to a decoder. In embodiments where selecting a 220 a portion includes selecting a number N of groups of copies 130 for producing the number N of different combined blocks, decoding 240 may include decoding each of the N combined blocks separately (e.g., by applying each of the number N of different combined blocks separately to a decoder). In some embodiments, decoding 240 may also include determining whether the decoder successfully decoded the combined block (where only a single combined block is generated) or combined blocks (where multiple combined blocks are generated). By way of non-limiting example, a cyclic redundancy check (CRC) may be performed to determine if the decoder successfully decoded the combined block.
[0034] In some embodiments, the control circuitry 122 may be configured for both combining 230 the selected portion of the plurality of copies 130 into the combined block, and for combining all of the plurality of copies 130 into a different combined block. In such embodiments, the control circuitry 122 may include a switch component (e.g., implemented in hardware, software, or a combination thereof) that is configured to indicate which combination mode should be used. The selection of the combination modes can be determined by factors, such as present channel conditions, signal-to-noise power levels that the received copies 130 of the block of encoded bits experienced, other factors, or combinations thereof. For example, the control circuitry 122 may be configured to monitor one or more values indicating present channel conditions of a channel through which the copies 130 are received. The control circuitry 122 may also be configured to combine all of the copies 130 into a total combined block and apply the total combined block to the decoder instead of a combined block resulting from combining only a portion of the copies 130 responsive to a value (e.g., a signal-to-noise power ratio, a signal-to-interference power ratio, a signal power of received signals, a bit error rate of received data, a block error rate of received encoded blocks, a parameter indicating channel fading, a noise parameter of the channel, an interference parameter of the channel, etc., or combinations thereof) indicating a channel condition demonstrating a first
predetermined behavior (e.g., a first predetermined range, a first predetermined frequency, etc.). The control circuitry 122 may further be configured to apply a combined block resulting from combining only a portion of the copies 130 instead of the total combined block to the decoder responsive to the value indicating a channel condition demonstrating a second predetermined behavior (e.g., a second
predetermined range, a second predetermined frequency, etc.).
[0035] Although the method 200 of FIG. 2 is discussed generally as being implemented by the UE 120, the method 200 may be implemented by the base station 1 10 instead of, or in addition to, the UE 120. For example, the
communication elements 1 18 may perform operation 210, and control circuitry 1 12 may perform operations 220, 230, and 240. Accordingly, the base station 1 10 may receive the copies 130 from the base station 1 10 through the uplink.
[0036] The method 200 of FIG. 2 can be beneficial in additive white Gaussian noise (AWGN) channels (among other types of noise and/or interference channels). For example, a received symbol y
Figure imgf000012_0001
where x,- is the /-th BPSK modulated symbol representing the /-th bit in a block of encoded bits, Pr is the average received signal power determined by factors (e.g., the transmitted power, propagation loss, channel fading effect, etc.), and n,- is the AWGN (e.g., assuming noise power is normalized to unity). It will be apparent that other types of channel noise may be included instead of, or in addition to, AWGN). Accordingly, for a single received block (i.e., repetition number is "1 "), the SNR power ratio is given, in dB, by equation (2): SNRrep_1 = 10 - log10 ^ -. (2)
If M block copies are combined together (e.g., added together), the SNRreP-M is given, in dB, by equation (3):
2
SNRrep_M = 10 log10 = 10 log10 (3)
If 2M block copies are combined together (e.g., added together), the SNRreP-2M is given, in dB, by equation (4):
2
SNRrep_2M = 10 log10 = 10 log10 - 2^f- = SNRrep_M + 3dB. (4)
[0037] FIG. 3 is a simplified plot 300 illustrating a non-limiting example of a Block Error Rate (BLER) plotted against SNR for a convolutional code, according to some embodiments. For this convolutional code, a desired BLER of less than ten percent (10%) may be achieved if there is an SNR that is greater than or equal to 1 .5 dB.
[0038] Assuming an SNRrep- of a single received block (equation 2) is
about -19.56 dB, if a wireless communication device (e.g., the UE 120, the base station 1 10, etc.) receives 64 copies and combines all 64 copies, the resulting SNRrep-64 (equation 3) is about -1 .5 dB, and the corresponding BLER is about Pe = 0.85, as shown in FIG. 3. If, however, a BLER of Pe = 0.1 (e.g., to achieve 3dB gains in SNR) is desirable, the wireless communication device may achieve the corresponding SNRM of 1.5 dB by combining more than 64 copies. Accordingly, if the wireless communication device waits for more copies, the desired SNRM and the corresponding BLER may be achieved. In this scenario, if 64 more copies are received (totaling 128 copies), the desired SNRM and the corresponding BLER may be achieved, according to equations (3) and (4). This specific example illustrates the general concept that, for a relatively lower single received block's SNRrep-i, the wireless device may consume more transmission time to collect more block copies to meet a given BLER goal, and that for a relatively higher single received block's
SNRrep-7, the wireless device may consume less transmission time to collect fewer block copies to meet a given BLER goal.
[0039] As specific, non-limiting example of using multiple groups of copies to generate multiple combined blocks, if it is assumed that the SNRrep-i of a single received encoded block is about -19.56 dB, and 96 copies of the encoded block have been received, a group of 64 out of the 96 copies may be selected. There would be about ( r « 3 x 1025 different 64-copy groups that could be selected from the 96 copies. The BLER of a combined block resulting from a 64-copy group would be about Pe = 0.85, according to the convolutional code of FIG. 3. Since 0.8529 = 9%, by properly selecting 29 out of 3 x 1025 possible 64-copy groups for combination and separately decoding each of the groups, a BLER goal of 9% may be achieved using only 96 block copies, in contrast to 128 block copies if all the block copies are combined into one combined block. In addition, as low a correlation between different 64-copy groups should be sought after. A wireless device receiving the copies of the encoded blocks may make the determination of when to start selecting copy groups, combining, and decoding. Also, the number of copies in each copy group does not have to be the same (e.g., a first copy group may have a different number of copies than a second copy group).
[0040] FIG. 4 is a block diagram illustrating components, according to some example embodiments, that are able to read instructions from a machine-readable or computer-readable medium (e.g., a machine-readable storage medium) and perform any one or more of the methodologies discussed herein. Specifically, FIG. 4 shows a diagrammatic representation of hardware resources 400 including one or more processors (or processor cores) 410, one or more memory/storage devices 420, and one or more communication resources 430, each of which is communicatively coupled via a bus 440.
[0041] The processors 410 (e.g., a central processing unit (CPU), a reduced instruction set computing (RISC) processor, a complex instruction set computing (CISC) processor, a graphics processing unit (GPU), a digital signal processor (DSP) such as a baseband processor, an application specific integrated circuit (ASIC), a radio-frequency integrated circuit (RFIC), another processor, or any suitable combination thereof) may include, for example, a processor 412 and a processor 414. The memory/storage devices 420 may include main memory, disk storage, or any suitable combination thereof.
[0042] The communication resources 430 may include interconnection and/or network interface components or other suitable devices to communicate with one or more peripheral devices 404 and/or one or more databases 406 via a network 408. For example, the communication resources 430 may include wired communication components (e.g., for coupling via a Universal Serial Bus (USB)), cellular communication components, Near Field Communication (NFC) components, Bluetooth® components (e.g., Bluetooth® Low Energy), Wi-Fi® components, and other communication components.
[0043] Instructions 450 may comprise software, a program, an application, an applet, an app, or other executable code for causing at least any of the processors 410 to perform any one or more of the methodologies discussed herein. The instructions 450 may reside, completely or partially, within at least one of the processors 410 (e.g., within the processor's cache memory), the memory/storage devices 420, or any suitable combination thereof. Furthermore, any portion of the instructions 450 may be transferred to the hardware resources 400 from any combination of the peripheral devices 404 and/or the databases 406. Accordingly, the memory of processors 410, the memory/storage devices 420, the peripheral devices 404, and the databases 406 are examples of computer-readable and machine-readable media. By way of non-limiting example, the instructions 450 may be configured to instruct any of the processors 410 to perform any of the operations or functions discussed herein.
[0044] As used herein, the term "circuitry" may refer to, be part of, or include an Application Specific Integrated Circuit (ASIC), an electronic circuit, a processor (shared, dedicated, or group), and/or memory (shared, dedicated, or group) that execute one or more software or firmware programs, a combinational logic circuit, and/or other suitable hardware components that provide the described functionality. In some embodiments, the circuitry may be implemented in, or functions associated with the circuitry may be implemented by, one or more software or firmware modules. In some embodiments, circuitry may include logic, at least partially operable in hardware.
[0045] Embodiments described herein may be implemented into a system using any suitably configured hardware and/or software. FIG. 5 illustrates, for some embodiments, example components of an electronic device 500. In some embodiments, the electronic device 500 may be, may implement, may be
incorporated into, or otherwise may be a part of a user equipment (UE) (e.g., the UEs 120 of FIG. 1 ), a cellular base station (e.g., the base stations 1 10 of FIG. 1 ), or some other suitable electronic device. In some embodiments, the electronic device 500 may include application circuitry 502, baseband circuitry 504, Radio Frequency (RF) circuitry 506, front-end module (FEM) circuitry 508 and one or more antennas 510, coupled together at least as shown in FIG. 5.
[0046] The application circuitry 502 may include one or more application processors. For example, the application circuitry 502 may include circuitry such as, but not limited to, one or more single-core or multi-core processors. The
processor(s) may include any combination of general-purpose processors
and dedicated processors (e.g., graphics processors, application processors, etc.). The processors may be coupled with and/or may include memory/storage and may be configured to execute instructions stored in the memory/storage to enable various applications and/or operating systems to run on the system.
[0047] The baseband circuitry 504 may include circuitry such as, but not limited to, one or more single-core or multi-core processors. The baseband circuitry 504 may include one or more baseband processors and/or control logic to process baseband signals received from a receive signal path of the RF circuitry 506 and to generate baseband signals for a transmit signal path of the RF circuitry 506.
Baseband processing circuity 504 may interface with the application circuitry 502 for generation and processing of the baseband signals and for controlling operations of the RF circuitry 506. For example, in some embodiments, the baseband circuitry 504 may include a second generation (2G) baseband processor 504A, third generation (3G) baseband processor 504B, fourth generation (4G) baseband processor 504C, and/or other baseband processor(s) 504D for other existing generations, generations in development, or generations to be developed in the future (e.g., fifth generation (5G), 6G, etc.). The baseband circuitry 504 (e.g., one or more of baseband processors 504A-D) may handle various radio control functions that enable communication with one or more radio networks via the RF circuitry 506. The radio control functions may include, but are not limited to, signal
modulation/demodulation, encoding/decoding, radio frequency shifting, etc. In some embodiments, modulation/demodulation circuitry of the baseband circuitry 504 may include Fast-Fourier Transform (FFT), precoding, and/or constellation
mapping/demapping functionality. In some embodiments, encoding/decoding circuitry of the baseband circuitry 504 may include convolution, tail-biting
convolution, turbo, Viterbi, and/or Low Density Parity Check (LDPC)
encoder/decoder functionality. Embodiments of modulation/demodulation and encoder/decoder functionality are not limited to these examples and may include other suitable functionality in other embodiments.
[0048] In some embodiments, the baseband circuitry 504 may include elements of a protocol stack such as, for example, elements of an evolved universal terrestrial radio access network (EUTRAN) protocol including, for example, physical (PHY), media access control (MAC), radio link control (RLC), packet data convergence protocol (PDCP), and/or radio resource control (RRC) elements. A central processing unit (CPU) 504E of the baseband circuitry 504 may be configured to run elements of the protocol stack for signaling of the PHY, MAC, RLC, PDCP and/or RRC layers. In some embodiments, the baseband circuitry 504 may include one or more audio digital signal processor(s) (DSP) 504F. The audio DSP(s) 504F may include elements for compression/decompression and echo cancellation and may include other suitable processing elements in other embodiments.
[0049] The baseband circuitry 504 may further include memory/storage 504G. The memory/storage 504G may be used to load and store data and/or instructions for operations performed by the processors of the baseband circuitry 504.
Memory/storage 504G for one embodiment may include any combination of suitable volatile memory and/or non-volatile memory. The memory/storage 504G may include any combination of various levels of memory/storage including, but not limited to, read-only memory (ROM) having embedded software instructions (e.g., firmware), random access memory (e.g., dynamic random access memory (DRAM)), cache, buffers, etc. The memory/storage 504G may be shared among the various processors or dedicated to particular processors.
[0050] Components of the baseband circuitry 504 may be suitably combined in a single chip, combined in a single chipset, or disposed on a same circuit board in some embodiments. In some embodiments, some or all of the constituent components of the baseband circuitry 504 and the application circuitry 502 may be implemented together, such as, for example, on a system on a chip (SOC).
[0051] In some embodiments, the baseband circuitry 504 may provide for communication compatible with one or more radio technologies. For example, in some embodiments, the baseband circuitry 504 may support communication with an evolved universal terrestrial radio access network (EUTRAN) and/or other wireless metropolitan area networks (WMAN), a wireless local area network (WLAN), or a wireless personal area network (WPAN). Embodiments in which the baseband circuitry 504 is configured to support radio communications of more than one wireless protocol may be referred to as multi-mode baseband circuitry.
[0052] RF circuitry 506 may enable communication with wireless networks using modulated electromagnetic radiation through a non-solid medium. In various embodiments, the RF circuitry 506 may include switches, filters, amplifiers, etc., to facilitate the communication with the wireless network. RF circuitry 506 may include a receive signal path, which may include circuitry to down-convert RF signals received from the FEM circuitry 508 and provide baseband signals to the baseband circuitry 504. RF circuitry 506 may also include a transmit signal path, which may include circuitry to up-convert baseband signals provided by the baseband circuitry 504 and provide RF output signals to the FEM circuitry 508 for transmission.
[0053] In some embodiments, the RF circuitry 506 may include a receive signal path and a transmit signal path. The receive signal path of the RF circuitry 506 may include mixer circuitry 506A, amplifier circuitry 506B, and filter circuitry 506C. The transmit signal path of the RF circuitry 506 may include filter circuitry 506C and mixer circuitry 506A. RF circuitry 506 may also include synthesizer circuitry 506D for synthesizing a frequency for use by the mixer circuitry 506A of the receive signal path and the transmit signal path. In some embodiments, the mixer circuitry 506A of the receive signal path may be configured to down-convert RF signals received from the FEM circuitry 508 based on the synthesized frequency provided by synthesizer circuitry 506D. The amplifier circuitry 506B may be configured to amplify the down- converted signals, and the filter circuitry 506C may be a low-pass filter (LPF) or band-pass filter (BPF) configured to remove unwanted signals from the down- converted signals to generate output baseband signals. Output baseband signals may be provided to the baseband circuitry 504 for further processing. In some embodiments, the output baseband signals may be zero-frequency baseband signals, although this is not a requirement. In some embodiments, mixer circuitry 506A of the receive signal path may comprise passive mixers, although the scope of the embodiments is not limited in this respect.
[0054] In some embodiments, the mixer circuitry 506A of the transmit signal path may be configured to up-convert input baseband signals based on the synthesized frequency provided by the synthesizer circuitry 506D to generate RF output signals for the FEM circuitry 508. The baseband signals may be provided by the baseband circuitry 504 and may be filtered by filter circuitry 506C. The filter circuitry 506C may include a low-pass filter (LPF), although the scope of the embodiments is not limited in this respect.
[0055] In some embodiments, the mixer circuitry 506A of the receive signal path and the mixer circuitry 506A of the transmit signal path may include two or more mixers and may be arranged for quadrature downconversion and/or upconversion respectively. In some embodiments, the mixer circuitry 506A of the receive signal path and the mixer circuitry 506A of the transmit signal path may include two or more mixers and may be arranged for image rejection (e.g., Hartley image rejection). In some embodiments, the mixer circuitry 506A of the receive signal path and the mixer circuitry 506A of the transmit signal path may be arranged for direct downconversion and/or direct upconversion, respectively. In some embodiments, the mixer circuitry 506A of the receive signal path and the mixer circuitry 506A of the transmit signal path may be configured for super-heterodyne operation.
[0056] In some embodiments, the output baseband signals and the input baseband signals may be analog baseband signals, although the scope of the embodiments is not limited in this respect. In some embodiments, the output baseband signals and the input baseband signals may be digital baseband signals. In these embodiments, the RF circuitry 506 may include analog-to-digital converter (ADC) and digital-to-analog converter (DAC) circuitry, and the baseband circuitry 504 may include a digital baseband interface to communicate with the RF circuitry 506.
[0057] In some dual-mode embodiments, a separate radio IC circuitry may be provided for processing signals for each spectrum, although the scope of the embodiments is not limited in this respect.
[0058] In some embodiments, the synthesizer circuitry 506D may be a fractional- M synthesizer or a fractional N/N+1 synthesizer, although the scope of the
embodiments is not limited in this respect as other types of frequency synthesizers may be suitable. For example, synthesizer circuitry 506D may be a delta-sigma synthesizer, a frequency multiplier, or a synthesizer comprising a phase-locked loop with a frequency divider.
[0059] The synthesizer circuitry 506D may be configured to synthesize an output frequency for use by the mixer circuitry 506A of the RF circuitry 506 based on a frequency input and a divider control input. In some embodiments, the synthesizer circuitry 506D may be a fractional N/N+1 synthesizer. [0060] In some embodiments, frequency input may be provided by a voltage controlled oscillator (VCO), although that is not a requirement. Divider control input may be provided by either the baseband circuitry 504 or the application circuitry 502 depending on the desired output frequency. In some embodiments, a divider control input (e.g., M) may be determined from a look-up table based on a channel indicated by the application circuitry 502.
[0061] Synthesizer circuitry 506D of the RF circuitry 506 may include a divider, a delay-locked loop (DLL), a multiplexer and a phase accumulator. In some
embodiments, the divider may be a dual modulus divider (DMD) and the phase accumulator may be a digital phase accumulator (DPA). In some embodiments, the DMD may be configured to divide the input signal by either N or N+1 (e.g., based on a carry-out) to provide a fractional division ratio. In some example embodiments, the DLL may include a set of cascaded, tunable, delay elements; a phase detector; a charge pump; and a D-type flip-flop. In these embodiments, the delay elements may be configured to break a VCO period up into Nd equal packets of phase, where Nd is the number of delay elements in the delay line. In this way, the DLL provides negative feedback to help ensure that the total delay through the delay line is one VCO cycle.
[0062] In some embodiments, synthesizer circuitry 506D may be configured to generate a carrier frequency as the output frequency, while in other embodiments, the output frequency may be a multiple of the carrier frequency (e.g., twice the carrier frequency, four times the carrier frequency) and used in conjunction with quadrature generator and divider circuitry to generate multiple signals at the carrier frequency with multiple different phases with respect to each other. In some embodiments, the output frequency may be a local oscillator (LO) frequency (fLO). In some embodiments, the RF circuitry 506 may include an IQ/polar converter.
[0063] FEM circuitry 508 may include a receive signal path, which may include circuitry configured to operate on RF signals received from one or more antennas 510, amplify the received signals and provide the amplified versions of the received signals to the RF circuitry 506 for further processing. FEM circuitry 508 may also include a transmit signal path, which may include circuitry configured to amplify signals for transmission provided by the RF circuitry 506 for transmission by one or more of the one or more antennas 510. [0064] In some embodiments, the FEM circuitry 508 may include a TX/RX switch to switch between transmit mode and receive mode operation. The FEM circuitry 508 may include a receive signal path and a transmit signal path. The receive signal path of the FEM circuitry 508 may include a low-noise amplifier (LNA) to amplify received RF signals and provide the amplified received RF signals as an output (e.g., to the RF circuitry 506). The transmit signal path of the FEM circuitry 508 may include a power amplifier (PA) to amplify input RF signals (e.g., provided by RF circuitry 506), and one or more filters to generate RF signals for subsequent transmission (e.g., by one or more of the one or more antennas 510).
[0065] In some embodiments, the electronic device 500 may include additional elements such as, for example, memory/storage, display, camera, sensor, and/or input/output (I/O) interface.
Examples
[0066] The following is a list of example embodiments that fall within the scope of the disclosure. In order to avoid complexity in providing the disclosure, not all of the examples listed below are separately and explicitly disclosed as having been contemplated herein as combinable with all of the others of the examples listed below and other embodiments disclosed hereinabove. Unless one of ordinary skill in the art would understand that these examples listed below, and the above disclosed embodiments, are not combinable, it is contemplated within the scope of the disclosure that such examples and embodiments are combinable.
[0067] Example 1 : An apparatus for a user equipment (UE), comprising: at least one data storage device configured to store data indicating a plural number of received copies of an encoded block of data, wherein the data indicating the plural number of received copies comprises downlink (DL) data; at least one processor operably coupled to the at least one data storage device and configured to: combine a subset of the plural number of received copies into a combined block, a number of copies in the subset being less than the plural number of the received copies; and decode the combined block.
[0068] Example 2: The apparatus of Example 1 , wherein the subset of the plural number of received copies is selected based, at least in part, on a signal to noise power level of each copy of the subset of the copies exceeding a predetermined threshold level. [0069] Example 3: The apparatus of Example 1 , wherein the subset of the copies are selected randomly.
[0070] Example 4: The apparatus according to any one of Examples 1 -3, wherein the at least one processor is further configured to: combine one or more other subsets of the plural number of received copies of the encoded block into one or more other combined blocks, a number of copies in each of the one or more other subsets being less than or equal to the plural number of received copies of the encoded block; and decode the one or more other combined blocks.
[0071] Example 5: The apparatus of Example 4, wherein the at least one processor is further configured to decode each of the one or more other combined blocks and the combined block separately.
[0072] Example 6: The apparatus according to any one of Examples 4 and 5, wherein: the subset of the plural number of received copies is selected based, at least in part, on a first performance parameter corresponding to the received copies; and at least one of the one or more other subsets is selected based, at least in part, on a second performance parameter corresponding to the received copies.
[0073] Example 7: The apparatus according to any one of Examples 4 and 5, wherein: the subset of the plural number of received copies is selected based, at least in part, on a performance parameter corresponding to the received copies being within a first range; and at least one of the one or more subsets is selected based, at least in part, on the same performance parameter corresponding to the received copies being within a second range that is different from the first range.
[0074] Example 8: The apparatus according to any one of Examples 1 -7, wherein the at least one processor is configured to vary the number of copies in the subset as a function of at least a performance parameter of communications in which the plural number of received copies are received and a desired block error-rate (BLER).
[0075] Example 9: The apparatus of Example 8, wherein the performance parameter is a signal-to-noise power level.
[0076] Example 10: The apparatus according to any one of Examples 1 -9, wherein the at least one processor is configured to switch between: combining the subset of the plural number of received copies of the encoded block into the combined block; and combining all of the plural number of received copies into a total combined block. [0077] Example 1 1 : The apparatus according to any one of Examples 1 -10, wherein the plural number of received copies are received from an evolved Node B (eNB) in a narrowband internet-of-things (NB-loT) system.
[0078] Example 12: The apparatus according to any one of Examples 1 -10, wherein the plural number of received copies are received from an evolved Node B (eNB) in a machine type communications (MTC) system.
[0079] Example 13: A computer-readable storage medium configured to store computer readable instructions thereon, the computer-readable instructions configured to instruct at least one processor to: select a portion of a plurality of copies of a block of encoded bits received from a radio access network (RAN) node through a downlink of a cellular communication network; combine the selected portion of the plurality of copies into a combined block; and apply the combined block to a decoder; wherein at least one copy of the plurality of copies received from the RAN node is received by a first carrier signal operating on a first frequency that is different from a second frequency of a second carrier signal on which at least one other copy of the plurality of copies is received.
[0080] Example 14: The computer-readable storage medium of Example 13, wherein a number of the plurality of copies of the block received from the RAN node is selected from the group consisting of two (2), four (4), sixteen (16), thirty-two (32), sixty-four (64), 128, 256, 512, 1028, and 2048 copies of the encoded block received from the RAN node.
[0081] Example 15: The computer-readable storage medium according to any one of Examples 13 and 14, wherein the computer-readable instructions are configured to instruct the one or more processors to: monitor one or more values indicating present channel conditions of a channel through which the plurality of copies are received from the RAN node; combine all of the copies in the plurality of copies received from the RAN node into a total combined block and apply the total combined block to the decoder instead of the combined block responsive to the one or more values indicating the present channel conditions demonstrating a first predetermined behavior; and apply the combined block to the decoder instead of the total combined block responsive to the one or more values indicating the present channel conditions demonstrating a second predetermined behavior different from the first predetermined behavior. [0082] Example 16: The computer-readable storage medium of Example 15, wherein the one or more values include at least one channel parameter selected from the group consisting of a signal to noise ratio of the channel, a signal power of received signals, a bit error rate of received data, a block error rate of received encoded blocks, a parameter indicating channel fading, a noise parameter of the channel, and an interference parameter of the channel.
[0083] Example 17: A wireless communication device, comprising: a receiver configured to receive encoded blocks of data from a far-end communication device through a cellular communication network; a baseband processor operably coupled to the receiver and configured to: select a subset of a plurality of copies of an encoded block received from the far-end communication device; and combine the subset of the plurality of copies of the encoded block into a combined block; and a decoder configured to decode the combined block.
[0084] Example 18: The wireless communication device of Example 17, wherein the wireless communication device is a user equipment (UE) and the far-end communication device is a cellular base station.
[0085] Example 19: The wireless communication device of Example 18, wherein the wireless communication device is a cellular base station, and the far-end communication device is a user equipment (UE).
[0086] Example 20: The wireless communication device according to any one of Examples 17-19, wherein the baseband processor is configured to perform a cyclic redundancy check (CRC) to determine whether the decoder successfully decoded the combined block.
[0087] Example 21 : A method of operating a user equipment (UE), the method comprising: receiving a plural number of received copies of an encoded block of data, wherein the data indicating the plural number of received copies comprises downlink (DL) data; combining a subset of the plural number of received copies into a combined block, a number of copies in the subset being less than the plural number of the received copies; and decoding the combined block.
[0088] Example 22: The method of Example 21 , further comprising selecting the subset of the plural number of received copies based, at least in part, on a signal to noise power level of each copy of the subset of the copies exceeding a
predetermined threshold level. [0089] Example 23: The method of Example 21 , further comprising selecting the subset of the plural number of received copies randomly.
[0090] Example 24: The method according to any one of Examples 21 -23, further comprising: combining one or more other subsets of the plural number of received copies of the encoded block into one or more other combined blocks, a number of copies in each of the one or more other subsets being less than or equal to the plural number of received copies of the encoded block; and decoding the one or more other combined blocks.
[0091] Example 25: The method of Example 24, wherein decoding the one or more other combined blocks comprises decoding each of the one or more other combined blocks and the combined block separately.
[0092] Example 26: The method according to any one of Examples 24 and 25, further comprising: selecting the subset of the plural number of received copies based, at least in part, on a first performance parameter corresponding to the received copies; and selecting at least one of the one or more other subsets based, at least in part, on a second performance parameter corresponding to the received copies.
[0093] Example 27: The method according to any one of Examples 24 and 25, wherein: selecting the subset of the plural number of received copies comprises selecting the subset of the plural number of received copies based, at least in part, on a performance parameter corresponding to the received copies being within a first range; and selecting at least one of the one or more other subsets comprises selecting the at least one of the one or more subsets based, at least in part, on the same performance parameter corresponding to the received copies being within a second range that is different from the first range.
[0094] Example 28: The method according to any one of Examples 21 -27, further comprising varying the number of copies in the subset as a function of at least a performance parameter of communications in which the plural number of received copies are received and a desired block error-rate (BLER).
[0095] Example 29: The method of Example 28, wherein the performance parameter is a signal-to-noise power level.
[0096] Example 30: The method according to any one of Examples 21 -29, further comprising switching between: combining the subset of the plural number of received copies of the encoded block into the combined block; and combining all of the plural number of received copies into a total combined block.
[0097] Example 31 : The method according to any one of Examples 21 -30, wherein receiving a plural number of received copies of an encoded block of data comprises communicating with an evolved Node B (eNB) in a narrowband internet- of-things (NB-loT) system.
[0098] Example 32: The method according to any one of Examples 21 -30, wherein receiving a plural number of received copies of an encoded block of data comprises communicating with an evolved Node B (eNB) in a machine type communications (MTC) system.
[0099] Example 33: A method of operating a user equipment (UE), the method comprising: selecting a portion of a plurality of copies of a block of encoded bits received from a radio access network (RAN) node through a downlink of a cellular communication network; combining the selected portion of the plurality of copies into a combined block; and applying the combined block to a decoder; wherein at least one copy of the plurality of copies received from the RAN node is received by a first carrier signal operating on a first frequency that is different from a second frequency of a second carrier signal on which at least one other copy of the plurality of copies is received.
[0100] Example 34: The method of Example 33, wherein a number of the plurality of copies of the block received from the RAN node is selected from the group consisting of two (2), four (4), sixteen (16), thirty-two (32), sixty-four (64), 128, 256, 512, 1028, and 2048 copies of the encoded block received from the evolved RAN node.
[0101] Example 35: The method according to any one of Examples 33 and 34, further comprising: monitoring one or more values indicating present channel conditions of a channel through which the plurality of copies are received from the RAN node; combining all of the copies in the plurality of copies received from the RAN node into a total combined block and apply the total combined block to the decoder instead of the combined block responsive to the one or more values indicating the present channel conditions demonstrating a first predetermined behavior; and applying the combined block to the decoder instead of the total combined block responsive to the one or more values indicating the present channel conditions demonstrating a second predetermined behavior different from the first predetermined behavior.
[0102] Example 36: The method of Example 35, wherein the one or more values include at least one channel parameter selected from the group consisting of a signal to noise ratio of the channel, a signal power of received signals, a bit error rate of received data, a block error rate of received encoded blocks, a parameter indicating channel fading, a noise parameter of the channel, and an interference parameter of the channel.
[0103] Example 37: A method of operating a wireless communication device, the method comprising: receiving encoded blocks of data from a far-end communication device through a cellular communication network; selecting a subset of a plurality of copies of an encoded block received from the far-end communication device; and combine the subset of the plurality of copies of the encoded block into a combined block; and decoding the combined block.
[0104] Example 38: The method of Example 37, wherein the wireless
communication device is a user equipment (UE) and the far-end communication device is a cellular base station.
[0105] Example 39: The method of Example 37, wherein the wireless
communication device is a cellular base station, and the far-end communication device is a user equipment (UE).
[0106] Example 40: The method according to any one of Examples 37-39, further comprising performing a cyclic redundancy check (CRC) to determine whether the decoder successfully decoded the combined block.
[0107] Example 41 : A computer-readable storage medium comprising computer- readable instructions stored thereon, the computer-readable instructions configured to instruct a processor to perform the method according to any one of Examples 21 - 40.
[0108] Example 42: A means for performing the method according to any one of Examples 21 -40.
[0109] Example 43 may include upon receiving K copies of the block of encoded bits, the receiver can judiciously select a group of M (1 < M < K) copies for
combination. The produced block after combination is then input to the decoder. [0110] Example 44 may include the receiver can also select N groups, i.e. M^ , Mn, ... MN (1≤ N and 1 < Mn≤ ), of copies to produce N different combined blocks. Each combined block will be separately input to the decoder for decoding.
[0111] Example 45 may include the subject matter of Example 44 and/or some other example herein, wherein the number of copies in each group does not have to be equal.
[0112] Example 46 may include the subject matter of Example 44 may include the subject matter of Example 44 and/or some other example herein, wherein the receiver should try to lower the correlation between different copy groups by selecting as many different copies for different groups as possible.
[0113] Example 47 may include the subject matter of Example 44 and/or some other example herein, wherein it is up to the receiver to decide when to start to group the received copies of the block of encoded bits for combination and decoding.
[0114] Example 48 may include subject matter wherein if a receiver supports both the conventional (which combines all the received copies of the block of encoded bits) and described combination modes for decoding, a switch component/device would be required at the receiver to indicate which combination mode is used. The selection of the combination modes can be determined by factors, such as present channel conditions and signal-to-noise power levels that the received copies of the block of encoded bits experienced.
[0115] Example 49 may include an apparatus comprising means to perform one or more elements of a method described in or related to any of Examples 43-48, or any other method or process described herein.
[0116] Example 50 may include one or more non-transitory computer-readable media comprising instructions to cause an electronic device, upon execution of the instructions by one or more processors of the electronic device, to perform one or more elements of a method described in or related to any of Examples 43-48, or any other method or process described herein.
[0117] Example 51 may include an apparatus comprising logic, modules, and/or circuitry to perform one or more elements of a method described in or related to any of Examples 43-48, or any other method or process described herein.
[0118] Example 52 may include a method, technique, or process as described in or related to any of Examples 43-48, or portions or parts thereof. [0119] Example 53 may include an apparatus comprising: one or more
processors and one or more computer readable media comprising instructions that, when executed by the one or more processors, cause the one or more processors to perform the method, techniques, or process as described in or related to any of Examples 43-48, or portions thereof.
[0120] Example 54 may include a method of communicating in a wireless network as shown and described herein.
[0121] Example 55 may include a system for providing wireless communication as shown and described herein.
[0122] Example 56 may include a device for providing wireless communication as shown and described herein.
[0123] While certain illustrative embodiments have been described in connection with the figures, those of ordinary skill in the art will recognize and appreciate that embodiments encompassed by the disclosure are not limited to those embodiments explicitly shown and described herein. Rather, many additions, deletions, and modifications to the embodiments described herein may be made without departing from the scope of embodiments encompassed by the disclosure, such as those hereinafter claimed, including legal equivalents. In addition, features from one disclosed embodiment may be combined with features of another disclosed embodiment while still being encompassed within the scope of embodiments encompassed by the disclosure, as contemplated by the inventors.

Claims

Claims
1 . An apparatus for a user equipment (UE), comprising:
at least one data storage device configured to store data indicating a plural number of received copies of an encoded block of data, wherein the data indicating the plural number of received copies comprises downlink (DL) data;
at least one processor operably coupled to the at least one data storage device and configured to:
combine a subset of the plural number of received copies into a combined block, a number of copies in the subset being less than the plural number of the received copies; and
decode the combined block.
2. The apparatus of claim 1 , wherein the subset of the plural number of received copies is selected based, at least in part, on a signal to noise power level of each copy of the subset of the copies exceeding a predetermined threshold level.
3. The apparatus of claim 1 , wherein the subset of the copies are selected randomly.
4. The apparatus according to any one of claims 1 -3, wherein the at least one processor is further configured to:
combine one or more other subsets of the plural number of received copies of the encoded block into one or more other combined blocks, a number of copies in each of the one or more other subsets being less than or equal to the plural number of received copies of the encoded block; and
decode the one or more other combined blocks.
5. The apparatus of claim 4, wherein the at least one processor is further configured to decode each of the one or more other combined blocks and the combined block separately.
6. The apparatus of claim 4, wherein:
the subset of the plural number of received copies is selected based, at least in part, on a first performance parameter corresponding to the received copies; and at least one of the one or more other subsets is selected based, at least in part, on a second performance parameter corresponding to the received copies.
7. The apparatus of claim 4, wherein:
the subset of the plural number of received copies is selected based, at least in part, on a performance parameter corresponding to the received copies being within a first range; and
at least one of the one or more subsets is selected based, at least in part, on the same performance parameter corresponding to the received copies being within a second range that is different from the first range.
8. The apparatus according to any one of claims 1 -3, wherein the at least one processor is configured to vary the number of copies in the subset as a function of at least a performance parameter of communications in which the plural number of received copies are received and a desired block-error-rate (BLER).
9. The apparatus of claim 8, wherein the performance parameter is a signal-to-noise power level.
10. The apparatus according to any one of claims 1 -3, wherein the at least one processor is configured to switch between:
combining the subset of the plural number of received copies of the encoded block into the combined block; and
combining all of the plural number of received copies into a total combined block.
1 1 . The apparatus according to any one of claims 1 -3, wherein the plural number of received copies are received from an evolved Node B (eNB) in a narrowband internet-of-things (NB-loT) system.
12. The apparatus according to any one of claims 1 -3, wherein the plural number of received copies are received from an evolved Node B (eNB) in a machine type communications (MTC) system.
13. A computer-readable storage medium configured to store
computer-readable instructions thereon, the computer-readable instructions configured to instruct at least one processor to:
select a portion of a plurality of copies of a block of encoded bits received from a radio access network (RAN) node through a downlink of a cellular
communication network;
combine the selected portion of the plurality of copies into a combined block; and
apply the combined block to a decoder; wherein at least one copy of the plurality of copies received from the RAN node is received by a first carrier signal operating on a first frequency that is different from a second frequency of a second carrier signal on which at least one other copy of the plurality of copies is received.
14. The computer-readable storage medium of claim 13, wherein a number of the plurality of copies of the block received from the evolved node B is selected from the group consisting of two (2), four (4), sixteen (16), thirty-two (32), sixty-four (64), 128, 256, 512, 1028, and 2048 copies of the encoded block received from the evolved node B.
15. The computer-readable storage medium according to any one of claims 13 and 14, wherein the computer-readable instructions are configured to instruct the one or more processors to:
monitor one or more values indicating present channel conditions of a channel through which the plurality of copies are received from the RAN node;
combine all of the copies in the plurality of copies received from the RAN node into a total combined block and apply the total combined block to the decoder instead of the combined block responsive to the one or more values indicating the present channel conditions demonstrating a first predetermined behavior; and
apply the combined block to the decoder instead of the total combined block responsive to the one or more values indicating the present channel conditions demonstrating a second predetermined behavior different from the first
predetermined behavior.
16. The computer-readable storage medium of claim 15, wherein the one or more values include at least one channel parameter selected from the group consisting of a signal to noise ratio of the channel, a signal power of received signals, a bit error rate of received data, a block error rate of received encoded blocks, a parameter indicating channel fading, a noise parameter of the channel, and an interference parameter of the channel.
17. A wireless communication device, comprising:
a receiver configured to receive encoded blocks of data from a far-end communication device through a cellular communication network;
a baseband processor operably coupled to the receiver and configured to: select a subset of a plurality of copies of an encoded block received from the far-end communication device; and combine the subset of the plurality of copies of the encoded block into a combined block; and
a decoder configured to decode the combined block.
18. The wireless communication device of claim 17, wherein the wireless communication device is a user equipment (UE) and the far-end communication device is a cellular base station.
19. The wireless communication device of claim 18, wherein the wireless communication device is a cellular base station, and the far-end communication device is a user equipment (UE).
20. The wireless communication device according to any one of claims 17-19, wherein the baseband processor is configured to perform a cyclic redundancy check (CRC) to determine whether the decoder successfully decoded the combined block.
PCT/US2016/063636 2016-06-20 2016-11-23 Apparatuses for combining and decoding encoded blocks WO2017222582A1 (en)

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Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110275828B (en) * 2019-06-06 2022-11-22 江西理工大学 Method for optimizing test data payload by computer software
CN115136550B (en) * 2020-02-18 2023-10-27 哲库科技(上海)有限公司 Smooth transition of data streams with adjusted gain

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1605623A2 (en) * 2004-06-13 2005-12-14 ASUSTeK Computer Inc. Multiple transmission communications method and device
US20070162812A1 (en) * 2003-10-23 2007-07-12 Koninklijke Philips Electronics N. V. Decoding and reconstruction of data
US20080063103A1 (en) * 2006-09-13 2008-03-13 Jungwon Lee Decoding method for alamouti scheme with harq and/or repetition coding
EP1919116A2 (en) * 2006-10-31 2008-05-07 Innovative Sonic Limited Method and apparatus for packet reception and transmission in a wireless communications system with automatic repeat request

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6381450B1 (en) * 1999-04-02 2002-04-30 D.S.P.C. Technologies Ltd. Method and device for managing power consumption of a receiver in stand-by mode
US6789123B2 (en) * 2001-12-28 2004-09-07 Microsoft Corporation System and method for delivery of dynamically scalable audio/video content over a network
US7159163B2 (en) * 2002-07-08 2007-01-02 Qualcomm Incorporated Feedback for data transmissions
US7573958B2 (en) * 2002-07-18 2009-08-11 Motorola, Inc. Receiver for and method of recovering transmitted symbols in a H-ARQ packet retransmission
US7646875B2 (en) * 2004-04-05 2010-01-12 Koninklijke Philips Electronics N.V. Stereo coding and decoding methods and apparatus thereof
US8345803B2 (en) * 2008-10-02 2013-01-01 Qualcomm Incorporated Optimized finger assignment for improved multicarrier throughput
US9124424B2 (en) * 2009-06-18 2015-09-01 Arvato Digital Services Llc System, apparatus and method for license key permutation
WO2014100232A1 (en) * 2012-12-18 2014-06-26 Huawei Technologies Co., Ltd. System and method for apriori decoding
US9144066B2 (en) * 2012-12-28 2015-09-22 Sierra Wireless, Inc. Method and system for hybrid automatic repeat request combining on an lte downlink control channel
US9204437B2 (en) * 2013-02-27 2015-12-01 Qualcomm Incorporated Methods and apparatus for conditional offload of one or more log-likelihood ratios (LLRs) or decoded bits
US11470339B2 (en) * 2013-08-27 2022-10-11 Qualcomm Incorporated Residual prediction for intra block copying

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070162812A1 (en) * 2003-10-23 2007-07-12 Koninklijke Philips Electronics N. V. Decoding and reconstruction of data
EP1605623A2 (en) * 2004-06-13 2005-12-14 ASUSTeK Computer Inc. Multiple transmission communications method and device
US20080063103A1 (en) * 2006-09-13 2008-03-13 Jungwon Lee Decoding method for alamouti scheme with harq and/or repetition coding
EP1919116A2 (en) * 2006-10-31 2008-05-07 Innovative Sonic Limited Method and apparatus for packet reception and transmission in a wireless communications system with automatic repeat request

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