WO2017213841A1 - Transient suppressing circuit arrangements - Google Patents

Transient suppressing circuit arrangements Download PDF

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Publication number
WO2017213841A1
WO2017213841A1 PCT/US2017/034007 US2017034007W WO2017213841A1 WO 2017213841 A1 WO2017213841 A1 WO 2017213841A1 US 2017034007 W US2017034007 W US 2017034007W WO 2017213841 A1 WO2017213841 A1 WO 2017213841A1
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WO
WIPO (PCT)
Prior art keywords
input terminal
coupled
sidactor
diode
series
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2017/034007
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French (fr)
Inventor
James Allan PETERS
Gary Bentley
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Littelfuse Inc
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Littelfuse Inc
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Filing date
Publication date
Application filed by Littelfuse Inc filed Critical Littelfuse Inc
Priority to DE112017002917.1T priority Critical patent/DE112017002917T5/en
Priority to KR1020197000197A priority patent/KR20190015496A/en
Priority to CN201780035893.5A priority patent/CN109314387A/en
Publication of WO2017213841A1 publication Critical patent/WO2017213841A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/04—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/611—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using diodes as protective elements

Definitions

  • the present invention relates generally transient suppressing circuits. More specifically, the present invention relates generally to transient suppressing circuits that may be used to mitigate against voltage transients that may occur on signal lines.
  • Voltage transients are short duration voltage surges or spikes. Unsuppressed, voltage transients may damage circuits and components, possibly resulting in complete system failure.
  • Voltage transients may be generated from a number of different sources. For example, switching of inductive loads, such as those that occur with transformers, generators, motors, and relays, can create transients up to hundreds of volts and amps, and can last as long as hundreds of milliseconds. Such transients can negatively affect both AC and DC circuits.
  • Voltage transients may also be created by lightning strikes. Such lightning strikes and associated voltage transients may create disturbance on electrical and communication lines connected to electronic equipment. Another source of voltage transients is known as an automotive load dump.
  • a load dump refers to what happens to a supply voltage in a vehicle when a load is removed. If a load is removed rapidly, such as when the battery is disconnected while the engine is running, the voltage may spike before stabilizing the damage electric components associated with the vehicle.
  • Circuit structures such as a Zener diode in series with a thyristor, have been used for transient suppression. However, such circuit structures do not provide adequate transient suppression when transient voltages exceed 150 volts.
  • Transient suppression circuit arrangements are disclosed.
  • at least one avalanche diode is coupled in series with a DIAC, a silicon diode for alternating current (SIDAC) device or SIDACtor.
  • DIAC, SIDAC and SIDACtor devices are considered a threshold voltage triggered switch.
  • a threshold voltage triggered switch is considered a silicon bilateral voltage triggered switch that breaks down from high impedance to low impedance when a threshold voltage is applied.
  • a plurality of avalanche diodes is coupled in series with a DIAC, SIDAC device or SIDACtor.
  • at least one avalanche diode is coupled in series with a SIDACtor.
  • a plurality of avalanche diodes is coupled in series with a SIDACtor.
  • FIG. 1 illustrates transient suppression circuit arrangement according to an embodiment.
  • FIG. 2 illustrates transient suppression circuit arrangement according to an embodiment.
  • FIGS 3-5 illustrate breakdown characteristic of devices used in circuit arrangements.
  • FIG. 1 illustrates transient suppression circuit 100 arrangement according to an embodiment.
  • the transient suppression circuit 100 may include an avalanche diode 102 in series with a threshold voltage triggered switch 104, such as, a DIAC, a silicon diode for alternating current (SID AC) device or SIDACtor.
  • a threshold voltage triggered switch 104 such as, a DIAC, a silicon diode for alternating current (SID AC) device or SIDACtor.
  • the threshold voltage triggered switch 104 is a SIDACtor.
  • the avalanche diode 102 and the SIDACtor 104 may be a coupled in series between a first input terminal 106 and a second input terminal 108.
  • the first input terminal 106 or the second input terminal 108 is coupled to ground.
  • a supply voltage may be provided to at least one of the first input terminal 106 and the second input terminal 108.
  • the supply voltage may provide voltage to an equipment device (not illustrated) coupled to at least one of the first input terminal 106 and the second input terminal 108.
  • the series arrangement of the avalanche diode 102 and the SIDACtor 104 is provided to protect the equipment device or the like from voltage transients that may be present at least one of the first input terminal 106 and the second input terminal 108.
  • the avalanche diode 102 has a breakdown voltage of Vz
  • the SIDACtor 104 has a breakdown voltage of Vso.
  • Vz is equal to or nominally higher than a supply voltage provided at least one of the first input terminal 106 and the second input terminal 108.
  • Vz+Vso is lower than a breakdown of voltage associated with the equipment device.
  • Vz+Vso is approximately 1000-1500 volts.
  • Vz+Vso is approximately 3000- 3500 volts.
  • FIG. 2 illustrates transient suppression circuit 200 arrangement according to an embodiment.
  • the transient suppression circuit 200 may include a plurality of avalanche diodes 202 in series with a threshold voltage triggered switch 204, such as, a DIAC, a silicon diode for alternating current (SIDAC) device or SIDACtor.
  • a threshold voltage triggered switch 204 such as, a DIAC, a silicon diode for alternating current (SIDAC) device or SIDACtor.
  • the threshold voltage triggered switch 204 is a SIDACtor. More than two avalanche diodes 202 may be coupled in series with the SIDACtor 204.
  • the avalanche diodes 202 and the SIDACtor 204 may be a coupled in series between a first input terminal 206 and a second input terminal 208.
  • the first input terminal 206 or the second input terminal 208 is coupled to ground.
  • a supply voltage may be provided at least one of the first input terminal 206 and the second input terminal 208.
  • the supply voltage may provide voltage to an equipment device (not illustrated) coupled to at least one of the first input terminal 206 and the second input terminal 208.
  • the series arrangement of the avalanche diodes 202 and the SIDACtor 204 is provided to protect the equipment device or the like from voltage transients that may be present at least one of the first input terminal 206 and the second input terminal 208.
  • the avalanche diodes 202 has a breakdown voltage of
  • Vz and VFB, respectively, and the SIDACtor 204 has a breakdown voltage of Vso.
  • VZ+VFB+VSO is lower than a breakdown of voltage associated with the equipment device.
  • VZ+VFB+VSO is approximately 1000-1500 volts.
  • VZ+VFB+VSO is approximately 3000-3500 volts.
  • the device 202 is a foldback (FB) (e.g., foldbakTM) diode.
  • FIG. 3 illustrates the breakdown characteristic of the avalanche diodes 102 and 202.
  • Reference numeral 300 shows the initial breakdown region associated with the avalanche diodes 102 and 202. Voltage is represented on the x-axis and current is represented on the y-axis.
  • FIG. 4 illustrates the breakdown characteristic of a threshold voltage triggered switches 104 or 204, such as, a DIAC, a silicon diode for alternating current (SID AC) device or SIDACtor.
  • Reference numeral 400 shows the initial breakdown region associated with a threshold voltage triggered switch 104 or 204, such as, a DIAC, a silicon diode for alternating current (SIDAC) device or SIDACtor.
  • the breakdown characteristic for Vz+Vso and VZ+VFB+VSO is similar to that illustrated in FIG. 4, but the initial breakdown region will be greater than the breakdown region shown at reference 400. Voltage is represented on the x-axis and current is represented on the y-axis.
  • FIG. 5 illustrates the breakdown characteristic of the device 202 implemented as a foldback (e.g., foldbak) diode.
  • Reference numeral 500 shows the initial breakdown region associated with the device 202 implemented as a FB (e.g., foldbak) diode. Voltage is represented on the x-axis and current is represented on the y-axis.
  • Transient suppression circuit arrangements are disclosed with reference to certain embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the spirit and scope of the claims of the application. Other modifications may be made to adapt a particular situation or material to the teachings disclosed above without departing from the scope of the claims. Therefore, the claims should not be construed as being limited to any one of the particular embodiments disclosed, but to any embodiments that fall within the scope of the claims.

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  • Emergency Protection Circuit Devices (AREA)

Abstract

Transient suppression circuit arrangements are disclosed. In one implementation of a transient suppression circuit, at least one avalanche diode is coupled in series with a DIAC, a silicon diode for altemating current (SIDAC) device or SIDACtor.

Description

TRANSIENT SUPPRESSING CIRCUIT ARRANGEMENTS
BACKGROUND
Cross Reference to Related Applications
[0001] This Application claims priority to U.S. Provisional Patent Application
No. 62/348,242, filed June 10, 2016, entitled Transient Suppressing Circuit Arrangements, and incorporated by reference herein in its entirety.
Field
[0002] The present invention relates generally transient suppressing circuits. More specifically, the present invention relates generally to transient suppressing circuits that may be used to mitigate against voltage transients that may occur on signal lines.
Description of Related Art
[0003] Voltage transients are short duration voltage surges or spikes. Unsuppressed, voltage transients may damage circuits and components, possibly resulting in complete system failure.
[0004] Voltage transients may be generated from a number of different sources. For example, switching of inductive loads, such as those that occur with transformers, generators, motors, and relays, can create transients up to hundreds of volts and amps, and can last as long as hundreds of milliseconds. Such transients can negatively affect both AC and DC circuits.
[0005] Voltage transients may also be created by lightning strikes. Such lightning strikes and associated voltage transients may create disturbance on electrical and communication lines connected to electronic equipment. Another source of voltage transients is known as an automotive load dump. A load dump refers to what happens to a supply voltage in a vehicle when a load is removed. If a load is removed rapidly, such as when the battery is disconnected while the engine is running, the voltage may spike before stabilizing the damage electric components associated with the vehicle.
[0006] Circuit structures, such as a Zener diode in series with a thyristor, have been used for transient suppression. However, such circuit structures do not provide adequate transient suppression when transient voltages exceed 150 volts.
SUMMARY
[0007] Transient suppression circuit arrangements are disclosed. In one implementation of a transient suppression circuit, at least one avalanche diode is coupled in series with a DIAC, a silicon diode for alternating current (SIDAC) device or SIDACtor. Each of the DIAC, SIDAC and SIDACtor devices is considered a threshold voltage triggered switch. In particular, such a device is considered a silicon bilateral voltage triggered switch that breaks down from high impedance to low impedance when a threshold voltage is applied. In another implementation, a plurality of avalanche diodes is coupled in series with a DIAC, SIDAC device or SIDACtor. In another implementation, at least one avalanche diode is coupled in series with a SIDACtor. In yet another implementation, a plurality of avalanche diodes is coupled in series with a SIDACtor.
BRIEF DESCRIPTION OF THE DRAWINGS
[0008] FIG. 1 illustrates transient suppression circuit arrangement according to an embodiment.
[0009] FIG. 2 illustrates transient suppression circuit arrangement according to an embodiment.
[0010] FIGS 3-5 illustrate breakdown characteristic of devices used in circuit arrangements.
DETAILED DESCRIPTION
[0011] FIG. 1 illustrates transient suppression circuit 100 arrangement according to an embodiment. The transient suppression circuit 100 may include an avalanche diode 102 in series with a threshold voltage triggered switch 104, such as, a DIAC, a silicon diode for alternating current (SID AC) device or SIDACtor. In one implementation, the threshold voltage triggered switch 104 is a SIDACtor.
[0012] The avalanche diode 102 and the SIDACtor 104 may be a coupled in series between a first input terminal 106 and a second input terminal 108. In one implementation, the first input terminal 106 or the second input terminal 108 is coupled to ground. A supply voltage may be provided to at least one of the first input terminal 106 and the second input terminal 108. The supply voltage may provide voltage to an equipment device (not illustrated) coupled to at least one of the first input terminal 106 and the second input terminal 108. The series arrangement of the avalanche diode 102 and the SIDACtor 104 is provided to protect the equipment device or the like from voltage transients that may be present at least one of the first input terminal 106 and the second input terminal 108. [0013] In one implementation, the avalanche diode 102 has a breakdown voltage of Vz, and the SIDACtor 104 has a breakdown voltage of Vso. In one implementation, Vz is equal to or nominally higher than a supply voltage provided at least one of the first input terminal 106 and the second input terminal 108. In one implementation, Vz+Vso is lower than a breakdown of voltage associated with the equipment device. In a particular implementation, Vz+Vso is approximately 1000-1500 volts. In another implementation, Vz+Vso is approximately 3000- 3500 volts.
[0014] FIG. 2 illustrates transient suppression circuit 200 arrangement according to an embodiment. The transient suppression circuit 200 may include a plurality of avalanche diodes 202 in series with a threshold voltage triggered switch 204, such as, a DIAC, a silicon diode for alternating current (SIDAC) device or SIDACtor. In one implementation, the threshold voltage triggered switch 204 is a SIDACtor. More than two avalanche diodes 202 may be coupled in series with the SIDACtor 204.
[0015] The avalanche diodes 202 and the SIDACtor 204 may be a coupled in series between a first input terminal 206 and a second input terminal 208. In one implementation, the first input terminal 206 or the second input terminal 208 is coupled to ground. A supply voltage may be provided at least one of the first input terminal 206 and the second input terminal 208. The supply voltage may provide voltage to an equipment device (not illustrated) coupled to at least one of the first input terminal 206 and the second input terminal 208. The series arrangement of the avalanche diodes 202 and the SIDACtor 204 is provided to protect the equipment device or the like from voltage transients that may be present at least one of the first input terminal 206 and the second input terminal 208.
[0016] In one implementation, the avalanche diodes 202 has a breakdown voltage of
Vz and VFB, respectively, and the SIDACtor 204 has a breakdown voltage of Vso. In one implementation, VZ+VFB+VSO is lower than a breakdown of voltage associated with the equipment device. In a particular implementation, VZ+VFB+VSO is approximately 1000-1500 volts. In another implementation, VZ+VFB+VSO is approximately 3000-3500 volts. In one implementation, the device 202 is a foldback (FB) (e.g., foldbak™) diode.
[0017] FIG. 3 illustrates the breakdown characteristic of the avalanche diodes 102 and 202. Reference numeral 300 shows the initial breakdown region associated with the avalanche diodes 102 and 202. Voltage is represented on the x-axis and current is represented on the y-axis.
[0018] FIG. 4 illustrates the breakdown characteristic of a threshold voltage triggered switches 104 or 204, such as, a DIAC, a silicon diode for alternating current (SID AC) device or SIDACtor. Reference numeral 400 shows the initial breakdown region associated with a threshold voltage triggered switch 104 or 204, such as, a DIAC, a silicon diode for alternating current (SIDAC) device or SIDACtor. The breakdown characteristic for Vz+Vso and VZ+VFB+VSO is similar to that illustrated in FIG. 4, but the initial breakdown region will be greater than the breakdown region shown at reference 400. Voltage is represented on the x-axis and current is represented on the y-axis.
[0019] FIG. 5 illustrates the breakdown characteristic of the device 202 implemented as a foldback (e.g., foldbak) diode. Reference numeral 500 shows the initial breakdown region associated with the device 202 implemented as a FB (e.g., foldbak) diode. Voltage is represented on the x-axis and current is represented on the y-axis.
[0020] Transient suppression circuit arrangements are disclosed with reference to certain embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the spirit and scope of the claims of the application. Other modifications may be made to adapt a particular situation or material to the teachings disclosed above without departing from the scope of the claims. Therefore, the claims should not be construed as being limited to any one of the particular embodiments disclosed, but to any embodiments that fall within the scope of the claims.

Claims

CLAIMS We claim:
1. An apparatus, comprising: an avalanche diode; and a DIAC, silicon diode for alternating current (SIDAC) or SIDACtor coupled in series with the avalanche diode.
2. The apparatus according to claim 1, wherein the avalanche diode is a plurality of avalanche diodes.
3. The apparatus according to claim 1, wherein the SIDACtor is coupled in series with the avalanche diode.
4. The apparatus according to claim 1, wherein the avalanche diode is a plurality of avalanche diodes, and the SIDACtor is coupled in series with the plurality of avalanche diodes.
5. The apparatus according to claim 1 , further comprising a first input terminal and a second input terminal, the series arrangement of the DIAC, SIDAC or SIDACtor and the avalanche diode coupled between the first input terminal and the second input terminal.
6. The apparatus according to claim 5, wherein at least one of the first input terminal and the second input terminal includes a supply voltage for an equipment device coupled to the at least one of the first input terminal and the second input terminal.
7. The apparatus according to claim 5, wherein at least one of the first input terminal and the second input terminal is coupled to ground.
8. The apparatus according to claim 5, wherein the series arrangement includes the SIDACtor and avalanche diode coupled between the first input terminal and the second input terminal.
9. An apparatus, comprising: an avalanche diode coupled in series with a foldback diode; and a DIAC, silicon diode for alternating current (SID AC) or SIDACtor coupled in series with the series coupled avalanche diode and foldback diode.
PCT/US2017/034007 2016-06-10 2017-05-23 Transient suppressing circuit arrangements Ceased WO2017213841A1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
DE112017002917.1T DE112017002917T5 (en) 2016-06-10 2017-05-23 Transient suppression circuitry
KR1020197000197A KR20190015496A (en) 2016-06-10 2017-05-23 Transient suppression circuit device
CN201780035893.5A CN109314387A (en) 2016-06-10 2017-05-23 Transient Suppression Circuit Layout

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201662348242P 2016-06-10 2016-06-10
US62/348,242 2016-06-10
US15/585,476 US20170358567A1 (en) 2016-06-10 2017-05-03 Transient suppressing circuit arrangements
US15/585,476 2017-05-03

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US (1) US20170358567A1 (en)
KR (1) KR20190015496A (en)
CN (1) CN109314387A (en)
DE (1) DE112017002917T5 (en)
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WO (1) WO2017213841A1 (en)

Families Citing this family (3)

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Publication number Priority date Publication date Assignee Title
FR3064418A1 (en) * 2017-03-27 2018-09-28 Stmicroelectronics (Tours) Sas OVERVOLTAGE PROTECTION DEVICE
EP4659318A1 (en) * 2023-03-02 2025-12-10 Vishay General Semiconductor, Llc Transient voltage suppression device with clamping characteristic
DE102023206561A1 (en) * 2023-07-11 2025-01-16 Siemens Aktiengesellschaft electronic arrangement

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0360933A1 (en) * 1988-09-28 1990-04-04 Semitron Industries Limited An improved transient suppression device
US6226166B1 (en) * 1997-11-28 2001-05-01 Erico Lighting Technologies Pty Ltd Transient overvoltage and lightning protection of power connected equipment
WO2006122058A2 (en) * 2005-05-06 2006-11-16 Fultec Semiconductor, Inc. Transient blocking apparatus with electrostatic discharge protection
US20120176718A1 (en) * 2011-01-06 2012-07-12 Littelfuse, Inc. Transient voltage suppressor

Family Cites Families (5)

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Publication number Priority date Publication date Assignee Title
US4677518A (en) * 1984-06-11 1987-06-30 Power Integrity Corporation Transient voltage surge suppressor
WO2006050568A1 (en) * 2004-11-12 2006-05-18 Fultec Semiconductor Inc. A surge protection device
WO2009142657A1 (en) * 2008-05-19 2009-11-26 Polyphaser Corporation Dc and rf pass broadband surge suppressor
EP2369725B1 (en) * 2010-03-25 2012-09-26 ABB Schweiz AG Short circuiting unit
US8854103B2 (en) * 2012-03-28 2014-10-07 Infineon Technologies Ag Clamping circuit

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0360933A1 (en) * 1988-09-28 1990-04-04 Semitron Industries Limited An improved transient suppression device
US6226166B1 (en) * 1997-11-28 2001-05-01 Erico Lighting Technologies Pty Ltd Transient overvoltage and lightning protection of power connected equipment
WO2006122058A2 (en) * 2005-05-06 2006-11-16 Fultec Semiconductor, Inc. Transient blocking apparatus with electrostatic discharge protection
US20120176718A1 (en) * 2011-01-06 2012-07-12 Littelfuse, Inc. Transient voltage suppressor

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Publication number Publication date
DE112017002917T5 (en) 2019-02-14
US20170358567A1 (en) 2017-12-14
TW201743527A (en) 2017-12-16
KR20190015496A (en) 2019-02-13
CN109314387A (en) 2019-02-05

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