WO2017212870A1 - Signal processing device, signal processing method, and imaging device - Google Patents

Signal processing device, signal processing method, and imaging device Download PDF

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Publication number
WO2017212870A1
WO2017212870A1 PCT/JP2017/018078 JP2017018078W WO2017212870A1 WO 2017212870 A1 WO2017212870 A1 WO 2017212870A1 JP 2017018078 W JP2017018078 W JP 2017018078W WO 2017212870 A1 WO2017212870 A1 WO 2017212870A1
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Prior art keywords
detection
unit
flicker
frame
imaging
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PCT/JP2017/018078
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French (fr)
Japanese (ja)
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堀江 陽介
亮 広野
幹道 渡壁
大吾 柳
健 赤羽
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ソニーセミコンダクタソリューションズ株式会社
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Publication of WO2017212870A1 publication Critical patent/WO2017212870A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/70Circuitry for compensating brightness variation in the scene
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/80Camera processing pipelines; Components thereof
    • H04N23/81Camera processing pipelines; Components thereof for suppressing or minimising disturbance in the image signal generation

Definitions

  • the present disclosure relates to a signal processing device, a signal processing method, and an imaging device.
  • an image pickup apparatus including an image pickup device called an image sensor
  • an image pickup device called an image sensor
  • the brightness of the periodic brightness in the vertical scanning direction is displayed on the display screen based on the image pickup signal. Variations appear.
  • This periodic variation in luminance is visually recognized as a so-called horizontal stripe (flicker stripe) on the display screen, which causes a deterioration in the image quality of the captured image.
  • occurrence of flicker is detected by detecting the period of flicker fringes in one screen (within one imaging frame) caused by the readout time of the imaging signal in the imaging device and the blinking cycle of the light source whose brightness varies periodically. It was made to detect (for example, refer patent document 1).
  • the flicker detection according to the prior art described in Patent Document 1 is to detect the period of flicker fringes within one screen (within one imaging frame). Therefore, when flicker fringes in one screen do not occur, the conventional technology described in Patent Document 1 cannot detect the occurrence of flicker.
  • an object of the present disclosure is to provide a signal processing device, a signal processing method, and an imaging device that can detect the occurrence of flicker even when flicker fringes in one screen do not occur. .
  • a signal processing device of the present disclosure For a plurality of detection frames set by dividing the imaging screen in the vertical scanning direction, a luminance detection unit that detects the luminance of each pixel for each detection frame based on the imaging signal, A period detection unit that detects the frame periodicity of each detection frame for flicker components using the luminance detection values obtained by the luminance detection unit for a plurality of frames; and A determination unit that determines the presence or absence of flicker based on the detection result of the frame periodicity by the cycle detection unit, Is provided.
  • a signal processing method of the present disclosure includes: For a plurality of detection frames set by dividing the imaging screen in the vertical scanning direction, the luminance of each pixel is detected for each detection frame based on the imaging signal, Detect the frame periodicity of each detection frame for flicker components using the luminance detection value for multiple frames, The presence or absence of flicker is determined based on the detection result of the frame periodicity.
  • an imaging apparatus of the present disclosure is provided.
  • the signal processing circuit For a plurality of detection frames set by dividing the imaging screen in the vertical scanning direction, a luminance detection unit that detects the luminance of each pixel for each detection frame based on the imaging signal, A period detection unit that detects the frame periodicity of each detection frame for flicker components using the luminance detection values obtained by the luminance detection unit for a plurality of frames; and A determination unit that determines the presence or absence of flicker based on the detection result of the frame periodicity by the cycle detection unit.
  • flicker is obtained by using the luminance detection values obtained by detecting the luminance of each pixel for each detection frame for a plurality of detection frames.
  • the frame periodicity of each detection frame can be detected for the component.
  • the presence / absence of a flicker component can be determined from the detection result of the frame periodicity.
  • FIG. 1A is a conceptual diagram of an operation of the rolling shutter system
  • FIG. 1B is an explanatory diagram regarding a relationship between a pixel drive frame rate, a light source frequency, and a flicker cycle.
  • FIG. 2 is an exploded perspective view schematically illustrating the configuration of the image pickup device having a laminated structure.
  • FIG. 3 is a circuit diagram illustrating an example of the configuration of the imaging pixel unit.
  • FIG. 4A is a conceptual diagram of the operation of the pseudo global shutter system, and FIG. 4B is a conceptual diagram of the operation of the global shutter system.
  • FIG. 5 is a block diagram illustrating an example of the configuration of the signal processing device according to the first embodiment of the present disclosure.
  • FIG. 1A is a conceptual diagram of an operation of the rolling shutter system
  • FIG. 1B is an explanatory diagram regarding a relationship between a pixel drive frame rate, a light source frequency, and a flicker cycle.
  • FIG. 2 is an exploded perspective view schematically illustrating the configuration
  • FIG. 6 is a block diagram showing an example of the configuration of an N frame cycle flicker detector that constitutes the cycle detection unit.
  • FIG. 7 is an explanatory diagram of the normalization process.
  • FIG. 8 is a flowchart showing a flow of N frame periodicity detection processing in the N frame high frequency detection processing unit.
  • FIG. 9 is a flowchart showing the flow of the screen ratio determination process in the screen ratio determination unit.
  • FIG. 11 is a block diagram illustrating an exemplary configuration of a signal processing device according to the second embodiment of the present disclosure.
  • FIG. 12 is a block diagram illustrating an example of a system configuration of the imaging apparatus according to the present disclosure.
  • the luminance integrated value obtained by integrating the luminance information of each pixel for each detection frame, or the luminance integrated value as one pixel. It can be set as the structure which is the luminance average value averaged by the unit.
  • a plurality of frames are included in the past N frames including the frame of interest (N is the driving frequency of the imaging device and the blinking of the light source). Value determined by frequency).
  • the period detection unit obtains the maximum value and the minimum value in the luminance detection values of N frames, performs normalization processing based on the difference between the maximum value and the minimum value, and evaluates the frame periodicity of each detection frame for flicker components. It can be.
  • the difference between the maximum value and the minimum value in the luminance detection values of N frames is less than a predetermined minimum amplitude threshold value, it is preferable to set the evaluation value of the frame periodicity to 0.
  • the period detection unit may include a high-frequency detection processing unit and a periodicity detection processing unit. It can.
  • the high frequency detection processing unit detects whether or not a high frequency component exists in the N frame.
  • the periodicity detection processing unit detects the periodicity of the flicker component in the N frame in units of frames based on the difference in the luminance detection value between the N frames.
  • the period detection unit is based on the detection results of the high-frequency detection processing unit and the periodicity detection processing unit.
  • the flicker components in the N frame cycle can be detected.
  • the luminance detection value is subjected to discrete Fourier transform for the high frequency detection processing unit, and imaging is performed from the obtained frequency information.
  • the presence or absence of a flicker component can be determined based on whether or not a high-frequency component exists in the signal.
  • the periodicity detection processing unit is configured to determine that the flicker component in the N frame has periodicity in units of frames when the difference in luminance detection value between the N frames is smaller than a predetermined periodicity determination threshold. can do.
  • the determination unit is based on the detection result of the frame periodicity of each detection frame by the cycle detection unit. It can be configured to determine the presence or absence of flicker on the entire screen. Further, the determination unit counts the detection result of the frame periodicity of each detection frame by the cycle detection unit, calculates the flicker detection ratio by dividing the total count by the total number of detection frames, and sets the flicker detection ratio to a predetermined value. It can be configured to determine the presence or absence of flicker by comparing with the area ratio determination threshold.
  • the determination result of the presence / absence of flicker in each frame by the determination unit is accumulated, and variation in the determination result is eliminated. And it can be set as the structure provided with the variation removal part made into a final determination result. Then, the variation removal unit accumulates the determination results for the past M frames by the determination unit, and when the number of flicker determinations is equal to or greater than a predetermined variation removal determination threshold, the final determination result is configured to have flicker. it can.
  • a long-time accumulation imaging signal obtained by accumulating signal charges for a long time for one pixel A short-time accumulation imaging signal obtained by accumulating signal charges for a short time can be input to the luminance detection unit.
  • the luminance detection unit can be configured to detect the luminance of each pixel for each detection frame for each of the long-time accumulation imaging signal and the short-time accumulation imaging signal and to give the luminance detection value to the period detection unit.
  • the imaging pixel unit may be configured by a CMOS sensor.
  • a pixel substrate on which an imaging pixel unit is formed and a circuit substrate on which a signal processing circuit is formed are stacked, and an imaging signal output from the imaging pixel unit is provided between the pixel substrate and the circuit substrate.
  • a structure in which a substrate on which a memory portion for temporarily storing is formed is provided.
  • the imaging pixel unit to the memory unit can be read out with a readout time shorter than the readout time in the rolling shutter system in a light source environment in which the brightness periodically varies.
  • the imaging signal can be read out.
  • a signal processing circuit for a long-time accumulation imaging signal obtained by accumulating signal charges for a long time and a short-time accumulation imaging signal obtained by accumulating signal charges for a short time for one pixel It can be set as the structure supplied to.
  • CMOS Complementary Metal Oxide Semiconductor
  • flicker that contributes to image quality degradation of a photographed image
  • a shutter system generally, from one line (horizontal line) to several lines are made into one block, and each block is divided.
  • a rolling shutter system that acquires an imaging signal is employed.
  • FIG. 1A A conceptual diagram of the operation of the rolling shutter system is shown in FIG. 1A.
  • the solid line indicates the exposure start time
  • the broken line indicates the readout start time of the imaging signal
  • shaded area indicates the exposure time.
  • a rolling shutter type imaging device when shooting is performed in a light source environment in which the brightness varies periodically, luminance is periodically displayed in the vertical scanning direction (pixel row arrangement direction) on the display screen based on the imaging signal. Flicker is generated in which the fluctuations are visually recognized as horizontal stripes (flicker stripes). For example, when a light source such as a fluorescent lamp is turned on with a commercial power supply having a frequency of 50 Hz, the brightness periodically fluctuates (flickers) at a frequency twice the power supply frequency, that is, 100 Hz.
  • the exposure start time signal charge accumulation start time
  • the luminance fluctuation periodically in the vertical scanning direction on the display screen Appear as flicker stripes.
  • FIG. 1B shows the relationship between the frame rate, the light source frequency, and the flicker cycle. Specifically, under a light source environment of 50 Hz, when the frame rate is 15 fps, 30 fps, and 60 fps, the flicker period is 3 frame periods. Further, under a light source environment of 60 Hz, when the frame rate is 12.5 fps, 25 fps, and 50 fps, the flicker cycle becomes 5 frame cycles.
  • in-plane line flicker flicker stripes in units of horizontal lines within one screen (within one imaging frame) depending on the readout time of the imaging signal and the blinking cycle of the light source. May occur). Therefore, the occurrence of flicker can be detected by detecting the period of in-plane line flicker.
  • this flicker detection technique cannot detect the occurrence of flicker in the case of an image sensor that does not generate in-plane line flicker.
  • FIG. 2 shows an outline of the configuration of the image pickup element having a laminated structure.
  • the image pickup device 10 having a laminated structure according to this example has a configuration in which at least three semiconductor substrates (semiconductor chips) 11, 12, and 13 are laminated.
  • the first-layer semiconductor substrate 11 is a pixel substrate on which the imaging pixel unit 21 is formed.
  • an imaging pixel unit 21 is configured in which pixels including photoelectric conversion elements and various pixel transistors are arranged in a matrix. Details of the configuration of the imaging pixel unit 21 will be described later.
  • the second-layer semiconductor substrate 12 is a memory substrate on which a memory unit 22 that temporarily stores an analog imaging signal output from the imaging pixel unit 21 of the first-layer semiconductor substrate 11 is formed.
  • a high-speed, low-power, large-capacity memory is preferably used as the memory unit 22 that temporarily stores the imaging signal.
  • the third-layer semiconductor substrate 13 is a circuit board on which signal processing units such as an A (analog) / D (digital) conversion unit 23 and a logic circuit 24 are formed.
  • the A / D conversion unit 23 converts an analog imaging signal read from the memory unit 22 of the second-layer semiconductor substrate 12 into a digital imaging signal.
  • the logic circuit 24 performs various signal processing on the digital imaging signal.
  • the A / D converter 23 can be a known A / D converter. Specifically, as the A / D conversion unit 23, a single slope type A / D conversion unit, a successive approximation type A / D conversion unit, or a delta-sigma modulation type ( ⁇ modulation type) A / D conversion unit is exemplified. can do. However, the A / D converter 23 is not limited to these.
  • the image pickup device 10 having a stacked structure in which at least three semiconductor substrates 11, 12, and 13 are stacked has a size (area) enough to form the image pickup pixel portion 21 as the first semiconductor substrate 11. It's fine. Accordingly, the size (area) of the first-layer semiconductor substrate 11 and, consequently, the size of the entire chip can be reduced. Furthermore, a process suitable for pixel creation can be applied to the first semiconductor substrate 11, and a process suitable for circuit creation can be applied to the second and third semiconductor substrates 12 and 13, respectively. There is also an advantage that the process can be optimized in the manufacture of 10.
  • an imaging signal read from the imaging pixel unit 21 is converted into digital data by the A / D conversion unit 23, and then controlled by a memory controller (not shown). Data is written to the memory unit 22 at high speed. Then, the digital data written in the memory unit 22 is read out to the signal processing unit such as the logic circuit 24 at a low speed under the control of the memory controller. As a result, an image pickup signal is instantaneously read from the image pickup pixel unit 21 to the memory unit 22 and is slowly read out from the memory unit 22 to perform signal processing, thereby obtaining a high-quality image with little distortion.
  • the imaging pixel unit 21 is configured as a CMOS sensor in which pixels 30 including photoelectric conversion elements and various pixel transistors are arranged in a two-dimensional matrix in the row direction and the column direction.
  • the pixel 30 includes, for example, a photodiode 31 as a photoelectric conversion element, and includes, for example, four transistors, which are a transfer transistor 32, a reset transistor 33, an amplification transistor 34, and a selection transistor 35, as pixel transistors.
  • the four pixel transistors 32 to 35 for example, N-channel transistors are used.
  • the conductivity type combinations of the transfer transistor 32, the reset transistor 33, the amplification transistor 34, and the selection transistor 35 illustrated here are merely examples, and are not limited to these combinations. That is, a combination using a P-channel transistor can be used as necessary.
  • a transfer signal TRG, a reset signal RST, and a selection signal SEL that are drive signals for driving the pixel 30 are appropriately supplied to the pixel 30 from a row selection unit (not shown). That is, the transfer signal TRG is applied to the gate electrode of the transfer transistor 32, the reset signal RST is applied to the gate electrode of the reset transistor 33, and the selection signal SEL is applied to the gate electrode of the selection transistor 35.
  • the photodiode 31 has an anode electrode connected to a low-potential side power source (for example, ground), and photoelectrically converts received light (incident light) into photocharge (here, photoelectrons) having a charge amount corresponding to the amount of light. Then, the photocharge is accumulated.
  • the cathode electrode of the photodiode 31 is electrically connected to the gate electrode of the amplification transistor 34 via the transfer transistor 32.
  • a node electrically connected to the gate electrode of the amplification transistor 34 is a floating diffusion (floating diffusion region) 36.
  • the transfer transistor 32 is connected between the cathode electrode of the photodiode 31 and the floating diffusion 36.
  • a high level (for example, V DD level) transfer signal TRG is applied to the gate electrode of the transfer transistor 32.
  • the transfer transistor 32 becomes conductive, and the photoelectric charge photoelectrically converted by the photodiode 31 is transferred to the floating diffusion 36.
  • the reset transistor 33 has a drain electrode connected to the pixel power supply V DD and a source electrode connected to the floating diffusion 36.
  • a high level reset signal RST is applied to the gate electrode of the reset transistor 33. In response to the reset signal RST, the reset transistor 33 becomes conductive and resets the floating diffusion 36.
  • the amplification transistor 34 has a gate electrode connected to the floating diffusion 36 and a drain electrode connected to the pixel power source V DD .
  • the amplification transistor 34 outputs the potential of the floating diffusion 36 after being reset by the reset transistor 33 as a reset signal (reset level). Further, the amplification transistor 34 outputs the potential of the floating diffusion 36 after the signal charge is transferred by the transfer transistor 32 as a light accumulation signal (signal level).
  • the selection transistor 35 has, for example, a drain electrode connected to the source electrode of the amplification transistor 34 and a source electrode connected to the signal line 25.
  • a high level selection signal SEL is supplied to the gate electrode of the selection transistor 35.
  • the selection transistor 35 is turned on, and the pixel 30 is selected and a signal output from the amplification transistor 34 is read out to the signal line 25.
  • the circuit configuration in which the selection transistor 35 is connected between the source electrode of the amplification transistor 34 and the signal line 25 is illustrated, but the selection transistor 35 is connected between the pixel power supply V DD and the drain electrode of the amplification transistor 34. It is also possible to adopt a circuit configuration.
  • the pixel 30 is not limited to the pixel configuration including the four transistors 32 to 35 described above.
  • ⁇ Pseudo global shutter system> high-speed reading of the image pickup signal from the image pickup pixel unit 21 to the memory unit 22 is performed with a read time shorter than the read time in the above-described rolling shutter method, for example, brightness is periodically changed. In a changing light source environment, the time is shorter than the blinking cycle of the light source. Then, by performing the rolling shutter at high speed, the characteristics of the global shutter are approximated. Accordingly, in this specification, a readout time shorter than the readout time in the rolling shutter system, that is, a shutter system that reads out an imaging signal at a higher speed than the rolling shutter system is referred to as a pseudo global shutter system.
  • FIG. 4A A conceptual diagram of the operation of the pseudo global shutter system is shown in FIG. 4A.
  • the image pickup device 10 that reads out an image pickup signal from the image pickup pixel unit 21 to the memory unit 22 at a high speed by this pseudo global shutter method, the in-plane line flicker does not occur and flickers blinking in units of one screen (one image pickup frame).
  • surface flicker may be described).
  • FIG. 4B shows a conceptual diagram of the operation of the global shutter system generally employed in a charge transfer type imaging device represented by a CCD (Charge Coupled Device) image sensor.
  • CCD Charge Coupled Device
  • the imaging screen is divided in the vertical scanning direction to set a plurality of detection frames, and using the luminance detection value of each detection frame, the number and interval of waves are calculated as theoretical calculation values. By comparison, flicker was detected.
  • an XY address type image pickup device typified by a CMOS image sensor
  • an image pickup device having a laminated structure in-plane line flicker does not occur and flicker occurs even when surface flicker occurs.
  • the technology of the present disclosure is not limited to application to an image pickup device having a laminated structure, and does not exclude application to a charge transfer type image pickup device typified by a CCD image sensor.
  • specific embodiments of the technology of the present disclosure will be described.
  • FIG. 5 is a block diagram illustrating an example of a configuration of the signal processing device (signal processing circuit) according to the first embodiment of the present disclosure.
  • the imaging screen 40 corresponding to the imaging region (pixel region) of the imaging pixel unit 21 is divided into a plurality of detection frames 41 1 to 41 by dividing the imaging screen 40 in the vertical scanning direction (direction orthogonal to the pixel row / horizontal line). 6 is set.
  • the number of detection frames to be set is arbitrary, but here it is set to 6 for simplification of the drawing. Actually, it is preferable to set a large number of detection frames such as 16 or 32.
  • the signal processing device 50 includes a luminance detection unit 51, a period detection unit 52, a screen ratio determination unit 53, and a variation removal unit 54.
  • the flicker frame period is detected by using the luminance detection value of each detection frame for a plurality of frames. Then, based on the detection results obtained from the detection frames 41 1 to 41 6, it is determined whether or not flicker has occurred in the entire screen. Preferably, the determination results are accumulated in units of frames, and variations in the determination results are removed to obtain a final determination result.
  • the luminance detection unit 51 includes six luminance detectors 51 1 to 51 6 corresponding to, for example, six detection frames 41 1 to 41 6 of the imaging screen 40, and the six luminance detectors 51 1 to 51 6. , The luminance of each pixel 30 is detected for each detection frame based on the imaging signal. More specifically, the luminance detection unit 51 detects the luminance of each pixel 30 so that the change of the luminance detection value for each of the detection frames 41 1 to 41 6 is a period change equivalent to the global shutter method.
  • the luminance detection value may be a luminance integrated value obtained by integrating the luminance information of each pixel 30 for each of the detection frames 41 1 to 41 6 , or a luminance average value obtained by averaging the luminance integrated value for each pixel. May be.
  • the period detection unit 52 includes six N frame period flicker detectors 52 1 to 52 6 corresponding to the six luminance detectors 51 1 to 51 6, and each detection frame 41 1 is used for flicker components using a plurality of frames.
  • a periodicity (or high frequency) detection process in units of ⁇ 41 6 frames is performed. By performing this detection process, the occurrence of flicker can be detected.
  • the plurality of frames are the past N frames including the frame of interest.
  • N is a value determined by the drive frequency of the image sensor and the blinking frequency of the light source. Details of the period detector 52 will be described later.
  • the screen ratio determination unit 53 determines the presence or absence of flicker in the entire imaging screen 40 based on the detection result of periodicity (or high frequency) in units of frames by the period detection unit 52.
  • the variation removal unit 54 accumulates the determination result of the presence / absence of the flicker component in each frame by the screen ratio determination unit 53, and removes the variation of the determination result to obtain the final determination result. Details of the screen ratio determination unit 53 and the variation removal unit 54 will be described later.
  • N frame period flicker detector An example of the configuration of the N frame cycle flicker detectors 52 1 to 52 6 constituting the cycle detector 52 is shown in FIG.
  • the captured image output image
  • the captured image has a high-frequency luminance change with a periodicity in units of frames.
  • the N frame period flicker detectors 52 1 to 52 6 perform high frequency detection and periodicity detection in units of frames by utilizing the characteristics of having high frequency and periodicity in units of frames, and detecting flicker components of N frame periods. Determine presence or absence.
  • the N frame period flicker detectors 52 1 to 52 6 include a normalization processing unit 511, an N frame high frequency detection processing unit 512, an N frame periodicity detection processing unit 513, and a logical product unit 514. ing.
  • the luminance average value is used as the luminance detection value will be described as an example, but the same applies to the case where the luminance integral value is used.
  • the normalization processing unit 511 obtains the maximum value Max and the minimum value Min in the luminance detection values of the past N frames including the frame of interest.
  • N 3 that is, the case where the drive frequency of the image sensor is 60 Hz and the blinking frequency of the light source is 50 Hz is illustrated.
  • the normalization processing unit 511 After obtaining the maximum value Max and the minimum value Min, the normalization processing unit 511 performs normalization processing based on the difference between the maximum value Max and the minimum value Min (Max ⁇ Min), and each detection frame 41 1 to 41 6 for the flicker component. Evaluate the frame periodicity.
  • this normalization processing even when the flicker due to flicker is very small, for example, when the exposure time is long, the periodicity of flicker can be detected with high accuracy.
  • the normalization processing unit 511 determines that the luminance is not blinking due to flicker.
  • the evaluation value of frame periodicity is set to 0.
  • X represents the luminance detection value of the frame of interest i
  • Max represents the maximum luminance detection value in the past N frames.
  • Min represents the minimum luminance detection value in the past N frames, and
  • a represents a reference amplitude coefficient.
  • the N-frame high-frequency detection processing unit 512 performs N-point discrete Fourier transform (DFT) on the luminance average value (or luminance integral value) acquired from the luminance detection unit 51, and generates N frames from the obtained frequency information.
  • DFT N-point discrete Fourier transform
  • the presence / absence of a flicker component is determined depending on whether a high frequency component is present therein.
  • the N frame high frequency detection processing unit 512 sets the result of the expression (3) as an evaluation value as to whether or not a high frequency component exists in the N frame. Then, when the result (evaluation value) of the expression (3) is larger than a predetermined high frequency determination threshold, the N frame high frequency detection processing unit 512 has a high frequency component in the N frame, and the flicker component within the detection frame Judge that there is.
  • N-frame periodicity detection The N-frame high-frequency detection processing unit 512 can detect high-frequency blinking by discrete Fourier transform, but does not consider the periodicity of flicker components in units of frames. Therefore, there is a concern that a change in the subject is erroneously detected as flicker. Therefore, an N frame periodicity detection processing unit 513 is provided.
  • the N frame periodicity detection processing unit 513 determines that the flicker component in the N frame has periodicity in units of frames when the difference in the luminance detection value between the N frames is smaller than a predetermined periodicity determination threshold.
  • FIG. 8 shows a flow of N frame periodicity detection processing in the N frame periodicity detection processing unit 513.
  • the N frame periodicity detection processing unit 513 detects a difference in luminance detection value between N frames (step S11), and then determines whether or not the difference between N frames is smaller than a predetermined periodicity determination threshold. (Step S12).
  • the N frame periodicity detection processing unit 513 sets the periodicity determination result to true (true) (step S13).
  • the N-frame high-frequency detection processing unit 512 sets the periodicity determination result to no periodicity (false) (step S14).
  • the logical product unit 514 calculates the logical product of the detection results of the N frame high frequency detection processing unit 512 and the N frame periodicity detection processing unit 513. Thereby, the period detection unit 52 has a high frequency component in the N frame and flicker components in units of frames based on the detection results of the N frame high frequency detection processing unit 512 and the N frame periodicity detection processing unit 513. When it has periodicity, the flicker component of the N frame period is detected.
  • the screen ratio determination unit 53 determines the presence or absence of flicker in the entire imaging screen 40 based on the detection result of the frame periodicity of the detection frames 41 1 to 41 6 by the cycle detection unit 52. More specifically, the screen ratio determination unit 53 counts the detection results of the frame periodicity of the detection frames 41 1 to 41 6 by the cycle detection unit 52, divides the total count by the total number of detection frames, and flickers. The detection ratio is calculated, and the presence or absence of flicker is determined by comparing the flicker detection ratio with a predetermined area ratio determination threshold.
  • the screen ratio determination unit 53 first calculates the number of flicker detection frames (step S21).
  • the screen ratio determination unit 53 calculates a flicker detection ratio (step S22).
  • the screen ratio determination unit 53 determines whether or not the flicker detection ratio exceeds a predetermined area ratio determination threshold (step S23), and if flicker detection ratio> area ratio determination threshold (YES in S23).
  • the flicker detection result is assumed to be flicker present (true) (step S24). Further, when the flicker detection ratio ⁇ the area ratio determination threshold value (NO in S23), the screen ratio determination unit 53 sets the flicker detection result to “no flicker” (false) (step S25).
  • the variation removal unit 54 performs variation removal (chattering removal) of the determination result of the presence or absence of the flicker component by the screen ratio determination unit 53. Specifically, the variation removal unit 54 accumulates the determination results of the screen ratio determination unit 53 for the past M frames (M can be arbitrarily set), and the number of determinations with flicker is equal to or greater than a predetermined variation removal determination threshold. In this case, the final judgment result is flicker. As a result, it is possible to prevent erroneous detection of flicker due to changes in the subject.
  • the number of flicker determinations is 4 when the flicker frequency of the light source is 50 Hz
  • the number of flicker determinations is 0 when the light source flicker frequency is 60 Hz
  • the number of determinations without flicker is 4 It is an example.
  • the final determination result is set to no flicker detection.
  • the number of flicker determinations is 5 when the light source flicker frequency is 50 Hz
  • the flicker determination number is 0 when the light source flicker frequency is 60 Hz
  • the number of flicker determinations is 3 It is an example.
  • the final determination result is that flicker is detected when the flicker frequency of the light source is 50 Hz.
  • the number of flicker determinations is 3 when the light source flicker frequency is 50 Hz
  • the number of flicker determinations is 3 when the light source flicker frequency is 60 Hz
  • the number of flicker determinations is 2 It is an example.
  • the final determination result is set to no flicker detection.
  • the number of flicker determinations is 3 when the light source flicker frequency is 50 Hz, the number of flicker determinations is 5 when the light source flicker frequency is 60 Hz, and the number of flicker determinations is 0. It is an example.
  • the final determination result is flicker detection when the flicker frequency of the light source is 60 Hz.
  • the luminance detection values obtained by detecting the luminance of each pixel for each detection frame are obtained for a plurality of frames.
  • the frame periodicity of each detection frame is detected for the flicker component.
  • the presence or absence of flicker is determined from the detection result of the frame periodicity.
  • the maximum value Max and the minimum value Min in the luminance detection values of the past N frames including the frame of interest are obtained, normalization processing is performed using the difference (Max-Min), and the frames of the detection frames 41 1 to 41 6 with respect to the flicker component Periodicity is evaluated.
  • this normalization processing even when the flicker due to flicker is very small, for example, when the exposure time is long, the periodicity of flicker can be detected with high accuracy.
  • the difference (Max-Min) falls below a predetermined minimum amplitude threshold, it is determined that the luminance is not flickering due to flicker, and the evaluation value of the frame periodicity is set to zero. Thereby, since flickering of luminance that is not caused by flicker can be excluded, the periodicity of flicker can be detected with higher accuracy. Further, screen ratio determination results for the past M frames are accumulated, and the final determination result is set to flicker when the number of flicker determinations is equal to or greater than a predetermined variation removal determination threshold. As a result, it is possible to prevent erroneous detection of flicker due to changes in the subject.
  • the second embodiment is an example when applied to an imaging pixel unit (imaging device) having a wide dynamic range (HDR).
  • An example of the configuration of a signal processing device (signal processing circuit) according to the second embodiment is shown in FIG.
  • a long-time accumulation imaging signal obtained by accumulating signal charges for a long time and a signal charge for a short time are accumulated for one pixel.
  • a short-time accumulated imaging signal obtained in this way is obtained. Then, by performing predetermined processing using the long-time accumulated image signal and the short-time accumulated image signal, an image signal having a contrast with respect to a wide range of incident light amounts can be obtained.
  • the luminance detection unit 51 is provided for each of the detection frames 41 1 to 41 6 for each of the long-time accumulation imaging signal and the short-time accumulation imaging signal input from the imaging pixel unit 21.
  • the luminance of the pixel is detected, and the luminance detection value is given to the period detection unit 52.
  • the luminance detection unit 51 includes a long-time accumulation luminance detector 51 L that processes a long-time accumulation imaging signal and a short-time accumulation luminance detector 51 S that processes a short-time accumulation imaging signal.
  • the function of the long-time accumulation luminance detector 51 L and short accumulation luminance detector 51 S is the same as the brightness detector 51 1-51 6 in the first embodiment.
  • the period detector 52 also has a long-time accumulation flicker detector 52 L and a short-time accumulation flicker detector 52 S corresponding to the luminance detector 51.
  • the function of the long-time accumulation flicker detector 52 L and short storage flicker detector 52 S is the same as the N-frame period flicker detector 52 1-52 6 in the first embodiment.
  • the screen ratio determination unit 53 and the variation removal unit 54 of the first embodiment are not shown.
  • the same operations and effects as those of the signal processing device 50 according to the first embodiment can be obtained. That is, even when flicker stripes within one screen, that is, in-plane line flicker does not occur, the occurrence of flicker can be detected with high accuracy. Further, even when flicker due to flicker is small, it is possible to accurately detect flicker periodicity and to prevent false detection of flicker due to changes in the subject.
  • the imaging device 1 includes a sensor unit 60, an analog signal processing circuit 70, and a digital signal processing circuit 80.
  • the sensor unit 60 corresponds to the imaging pixel unit 21 in FIG.
  • the analog signal processing circuit 70 includes a signal amplification unit 71 and an A / D conversion unit 72.
  • the signal amplifying unit 71 performs processing for amplifying an analog imaging signal obtained by the imaging pixel unit 21.
  • the A / D conversion unit 72 corresponds to the A / D conversion unit 23 in FIG. 2, and performs a process of converting an analog imaging signal output from the signal amplification unit 71 into a digital imaging signal.
  • the digital signal processing circuit 80 includes the function of the signal processing device (circuit) 50 according to the first embodiment or the second embodiment, that is, the function of detecting flicker, and the imaging pixel unit 21 and the signal amplification based on the detection result. And a function of controlling the A / D converter 72.
  • the digital signal processing circuit 80 includes a luminance detection unit 81, a flicker detection unit 82, an exposure control unit 83, a drive circuit control unit 84, and a drive circuit unit 85.
  • the luminance detection unit 81 includes the luminance detection unit 51 of the first embodiment or the second embodiment, and a plurality of detection frames 41 1 to 41 6 of the imaging screen 40 (see FIG. 5). Then, the luminance of each pixel is detected for each detection frame based on the imaging signal, and the luminance detection value is given to the flicker detection unit 82.
  • the flicker detection unit 82 includes the period detection unit 52, the screen ratio determination unit 53, and the variation removal unit 54 of the first or second embodiment, and flicker based on the luminance detection value provided from the luminance detection unit 81. The presence / absence of presence / absence is detected and the detection result is given to the exposure control unit 83.
  • the exposure control unit 83 sets the signal charge accumulation time of the imaging pixel unit 21 and the gain value of the signal amplification unit 71 based on the detection result of the flicker detection unit 82. Specifically, for example, when the detection result of the flicker detection unit 82 is flicker, the exposure control unit 83 sets an accumulation time of n / 100 seconds for a 50 Hz light source, and n / 120 for a 60 Hz light source. Set the accumulation time in seconds.
  • the drive circuit control unit 84 controls the imaging pixel unit 21, the signal amplification unit 71, and the A / D conversion unit 72 via the drive circuit unit 85 based on the accumulation time and gain value set by the exposure control unit 83. To drive.
  • the signal processing device 50 according to the first embodiment or the second embodiment even if flicker fringes in one screen, that is, in-plane line flicker does not occur, occurrence of flicker is accurate. Can be detected well. Therefore, according to the imaging device 1 of the present disclosure including the digital signal processing circuit 80 having the function of the signal processing device 50 according to the first embodiment or the second embodiment, the flicker is detected with high accuracy of occurrence of flicker. It is possible to obtain a high-quality image without any image.
  • the system configuration shown in FIG. 12 assumes a system configuration in which the digital signal processing circuit 80 is built in together with the analog signal processing circuit 70 inside the image sensor including the sensor unit 60, but is limited to this system configuration. It is not a thing. That is, a system configuration in which the digital signal processing circuit 80 is provided outside the imaging device including the sensor unit 60 and the analog signal processing circuit 70 can also be adopted.
  • the imaging device 1 of the present disclosure can be used as an imaging device such as a digital still camera or a video camera. Furthermore, the imaging device 1 of the present disclosure can be used as an imaging unit in various electronic devices having an imaging function such as a mobile phone and a smartphone in addition to the camera.
  • the present disclosure has been described based on the preferred embodiments, the present disclosure is not limited to these embodiments.
  • the configuration and structure of the image sensor described in each of the above embodiments are examples, and can be changed as appropriate.
  • the case where the present invention is applied to a pseudo-global shutter type imaging device (imaging pixel unit) has been described as an example, but the present invention can also be applied to a global shutter type imaging device.
  • the present invention can also be applied to a rolling shutter system image sensor.
  • the imaging of a three-layer structure in which the pixel substrate on which the imaging pixel unit is formed, the memory substrate on which the memory unit is formed, and the circuit substrate on which the signal processing circuit is formed is stacked.
  • the present invention can be applied to a two-layer structure in which the memory substrate is omitted and the memory portion is formed on the circuit board.
  • the present invention is not limited to a stacked structure, and can be applied to a so-called flat structure in which a memory portion and a signal processing circuit are formed together with an imaging pixel portion on a pixel substrate.
  • the technology of the present disclosure can be applied regardless of the format of the image sensor such as a monochrome image sensor or a Bayer array image sensor.
  • the case where luminance is detected has been exemplified.
  • a configuration in which only information on green pixels is detected may be employed. It is.
  • this indication can also take the following structures.
  • a luminance detection unit that detects the luminance of each pixel for each detection frame based on the imaging signal for a plurality of detection frames set by dividing the imaging screen in the vertical scanning direction;
  • a period detection unit that detects the frame periodicity of each detection frame for flicker components using the luminance detection values obtained by the luminance detection unit for a plurality of frames; and
  • a determination unit that determines the presence or absence of flicker based on the detection result of the frame periodicity by the cycle detection unit
  • a signal processing apparatus comprising: [2]
  • the luminance detection value is a luminance integrated value obtained by integrating the luminance information of each pixel for each detection frame, or a luminance average value obtained by averaging the luminance integrated value in units of one pixel.
  • the signal processing device according to [1] above.
  • the plurality of frames are the past N frames (N is a value determined by the driving frequency of the image sensor and the blinking frequency of the light source) including the frame of interest.
  • the period detection unit obtains a maximum value and a minimum value in luminance detection values of N frames, performs a normalization process based on a difference between the maximum value and the minimum value, and evaluates the frame periodicity of each detection frame with respect to a flicker component.
  • the signal processing device according to [1] or [2].
  • the period detection unit sets the evaluation value of the frame periodicity to 0 when the difference between the maximum value and the minimum value in the luminance detection values of N frames is lower than a predetermined minimum amplitude threshold value.
  • the signal processing device according to [3] above.
  • the period detector A high-frequency detection processing unit that detects whether or not a high-frequency component exists in the N frame; and A periodicity detection processing unit that detects the periodicity of the flicker component in the N frame in units of frames based on a difference in luminance detection values between the N frames; The signal processing device according to any one of [1] to [4].
  • the period detection unit is configured such that, based on the detection results of the high-frequency detection processing unit and the periodicity detection processing unit, a high-frequency component exists in N frames and the flicker component has periodicity in units of frames. Detect flicker component of frame period, The signal processing device according to [5] above.
  • the high frequency detection processing unit performs discrete Fourier transform on the luminance detection value, and determines the presence or absence of a flicker component based on whether or not a high frequency component exists in the imaging signal from the obtained frequency information.
  • the signal processing device according to [5] or [6] above.
  • the periodicity detection processing unit determines that the flicker component in the N frame has periodicity in units of frames when the difference in luminance detection value between the N frames is smaller than a predetermined periodicity determination threshold.
  • the signal processing device according to [5] or [6] above.
  • the determination unit determines the presence or absence of a flicker component as a whole screen based on the detection result of the frame periodicity of each detection frame by the cycle detection unit.
  • the signal processing device according to any one of [1] to [8].
  • the determination unit counts the detection result of the frame periodicity of each detection frame by the cycle detection unit, calculates the flicker detection ratio by dividing the total count by the total number of detection frames, and sets the flicker detection ratio to a predetermined value. The presence or absence of flicker is determined by comparing with the area ratio determination threshold of The signal processing device according to [9] above.
  • a variation removal unit that accumulates the determination results of the presence or absence of flicker in each frame by the determination unit and removes variations in the determination results to obtain a final determination result.
  • the signal processing device according to any one of [1] to [10].
  • the variation removal unit accumulates the determination results for the past M frames by the determination unit, and sets the final determination result to flicker when the number of flicker determinations is equal to or greater than a predetermined variation removal determination threshold.
  • the signal processing device according to [11] above.
  • a long-time accumulation imaging signal obtained by accumulating signal charges for a long time and a short-time accumulation imaging signal obtained by accumulating signal charges for a short time are input to the luminance detection unit for one pixel .
  • the luminance detection unit detects the luminance of each pixel for each detection frame for each of the long-time accumulation imaging signal and the short-time accumulation imaging signal, and gives the luminance detection value to the period detection unit.
  • the signal processing device according to any one of [1] to [12].
  • the luminance of each pixel is detected for each detection frame based on the imaging signal; Detect the frame periodicity of each detection frame for flicker components using the luminance detection value for multiple frames, The presence or absence of flicker is determined based on the detection result of the frame periodicity. Signal processing method.
  • a pixel substrate on which an imaging pixel portion is formed, and The circuit board on which the signal processing circuit is formed is laminated, Between the pixel substrate and the circuit board, there is provided a memory substrate in which a memory unit for temporarily storing an imaging signal output from the imaging pixel unit is formed.
  • an imaging signal is read from the imaging pixel unit to the memory unit with a readout time shorter than the readout time in the rolling shutter system.
  • [19] Read an imaging signal from the imaging pixel unit to the memory unit with a readout time shorter than the blinking cycle of the light source.
  • the imaging pixel unit supplies, for each pixel, a long-time accumulation imaging signal with a long signal charge accumulation time and a short-time accumulation imaging signal with a short signal charge accumulation time to the signal processing circuit.
  • the imaging device according to any one of [15] to [19].
  • SYMBOLS 1 ... Imaging device, 10 ... Imaging element, 11, 12, 13 ... Semiconductor substrate, 21 ... Imaging pixel part, 22 ... Memory part, 23 ... A / D conversion part, 24 ... logic circuit, 25 ... signal line, 30 ... pixel, 31 ... photodiode (photoelectric conversion element), 32 ... transfer transistor, 33 ... reset transistor, 34 ... Amplifying transistor, 35 ... select transistor, 40 ... imaging screen, 41 1 to 41 6 ... detection frame, 50 ... signal processing device (signal processing circuit), 51 ... luminance detection unit, 52 ... Period detection unit, 53 ... Screen ratio determination unit, 54 ... Variance removal unit, 60 ... Sensor unit, 70 ... Analog signal processing circuit, 80 ... Digital signal processing circuit, 511 ... Normalization processing unit, 512 ... N Over beam frequency detection processing section, 513 ... N frame periodicity detection processing section, 514 ... logical unit

Abstract

This signal processing device is provided with: a luminance detection unit for detecting, on the basis of an imaging signal, the luminance of each pixel for each of a plurality of detection frames set by dividing an imaging screen in a vertical scanning direction; a period detection unit for detecting the frame periodicity of a flicker component in each of the detection frames by using detected luminance values obtained by the luminance detection unit for a plurality of frames; and a determination unit for determining whether a flicker is present on the basis of the result of frame periodicity detection by the period detection unit.

Description

信号処理装置、信号処理方法、及び、撮像装置Signal processing apparatus, signal processing method, and imaging apparatus
 本開示は、信号処理装置、信号処理方法、及び、撮像装置に関する。 The present disclosure relates to a signal processing device, a signal processing method, and an imaging device.
 イメージセンサと呼称される撮像素子を備える撮像装置では、明るさが周期的に変動する光源環境下で撮影を行うと、その撮像信号に基づく表示画面上に、垂直走査方向に周期的な輝度の変動が現れる。この周期的な輝度の変動は、表示画面上において、所謂、横縞(フリッカ縞)として視認されることになるため、撮影した画像の画質劣化を引き起こす一因となる。 In an image pickup apparatus including an image pickup device called an image sensor, when shooting is performed in a light source environment in which brightness varies periodically, the brightness of the periodic brightness in the vertical scanning direction is displayed on the display screen based on the image pickup signal. Variations appear. This periodic variation in luminance is visually recognized as a so-called horizontal stripe (flicker stripe) on the display screen, which causes a deterioration in the image quality of the captured image.
 このフリッカ(フリッカ縞)に起因する画質劣化を抑えるためには、フリッカの発生を検出することが必要になる。従来は、撮像素子における撮像信号の読み出し時間と、明るさが周期的に変動する光源の明滅周期によって生じる1画面内(1撮像フレーム内)のフリッカ縞の周期を検出することによってフリッカの発生を検出するようにしていた(例えば、特許文献1参照)。 In order to suppress image quality deterioration due to this flicker (flicker stripe), it is necessary to detect the occurrence of flicker. Conventionally, occurrence of flicker is detected by detecting the period of flicker fringes in one screen (within one imaging frame) caused by the readout time of the imaging signal in the imaging device and the blinking cycle of the light source whose brightness varies periodically. It was made to detect (for example, refer patent document 1).
特開2003-189129号公報JP 2003-189129 A
 上述したように、特許文献1に記載の従来技術に係るフリッカ検出は、1画面内(1撮像フレーム内)のフリッカ縞の周期を検出するものであった。そのため、1画面内のフリッカ縞が発生しない場合には、特許文献1に記載の従来技術では、フリッカの発生を検出することはできない。 As described above, the flicker detection according to the prior art described in Patent Document 1 is to detect the period of flicker fringes within one screen (within one imaging frame). Therefore, when flicker fringes in one screen do not occur, the conventional technology described in Patent Document 1 cannot detect the occurrence of flicker.
 そこで、本開示は、1画面内のフリッカ縞が発生しない場合であっても、フリッカの発生を検出することができる信号処理装置、信号処理方法、及び、撮像装置を提供することを目的とする。 Therefore, an object of the present disclosure is to provide a signal processing device, a signal processing method, and an imaging device that can detect the occurrence of flicker even when flicker fringes in one screen do not occur. .
 上記の目的を達成するための本開示の信号処理装置は、
 撮像画面を垂直走査向に分割して設定した複数の検波枠について、撮像信号に基づいて検波枠毎に各画素の輝度を検波する輝度検波部、
 輝度検波部で得られる輝度検波値を複数フレーム分用いてフリッカ成分について各検波枠のフレーム周期性を検出する周期検出部、及び、
 周期検出部によるフレーム周期性の検出結果に基づいて、フリッカの有無を判定する判定部、
 を備える。
In order to achieve the above object, a signal processing device of the present disclosure is provided.
For a plurality of detection frames set by dividing the imaging screen in the vertical scanning direction, a luminance detection unit that detects the luminance of each pixel for each detection frame based on the imaging signal,
A period detection unit that detects the frame periodicity of each detection frame for flicker components using the luminance detection values obtained by the luminance detection unit for a plurality of frames; and
A determination unit that determines the presence or absence of flicker based on the detection result of the frame periodicity by the cycle detection unit,
Is provided.
 上記の目的を達成するための本開示の信号処理方法は、
 撮像画面を垂直走査向に分割して設定した複数の検波枠について、撮像信号に基づいて検波枠毎に各画素の輝度を検波し、
 その輝度検波値を複数フレーム分用いてフリッカ成分について各検波枠のフレーム周期性を検出し、
 フレーム周期性の検出結果に基づいて、フリッカの有無を判定する。
In order to achieve the above object, a signal processing method of the present disclosure includes:
For a plurality of detection frames set by dividing the imaging screen in the vertical scanning direction, the luminance of each pixel is detected for each detection frame based on the imaging signal,
Detect the frame periodicity of each detection frame for flicker components using the luminance detection value for multiple frames,
The presence or absence of flicker is determined based on the detection result of the frame periodicity.
 上記の目的を達成するための本開示の撮像装置は、
 撮像画素部、及び、
 撮像画素部から出力される撮像信号を処理する信号処理回路、
 を備えており、
 信号処理回路は、
 撮像画面を垂直走査向に分割して設定した複数の検波枠について、撮像信号に基づいて検波枠毎に各画素の輝度を検波する輝度検波部、
 輝度検波部で得られる輝度検波値を複数フレーム分用いてフリッカ成分について各検波枠のフレーム周期性を検出する周期検出部、及び、
 周期検出部によるフレーム周期性の検出結果に基づいて、フリッカの有無を判定する判定部を有する。
In order to achieve the above object, an imaging apparatus of the present disclosure is provided.
An imaging pixel unit, and
A signal processing circuit for processing an imaging signal output from the imaging pixel unit;
With
The signal processing circuit
For a plurality of detection frames set by dividing the imaging screen in the vertical scanning direction, a luminance detection unit that detects the luminance of each pixel for each detection frame based on the imaging signal,
A period detection unit that detects the frame periodicity of each detection frame for flicker components using the luminance detection values obtained by the luminance detection unit for a plurality of frames; and
A determination unit that determines the presence or absence of flicker based on the detection result of the frame periodicity by the cycle detection unit.
 上記の構成の信号処理装置、信号処理方法、あるいは、撮像装置において、複数の検波枠について、検波枠毎に各画素の輝度を検波して得た輝度検波値を複数フレーム分用いることで、フリッカ成分について各検波枠のフレーム周期性を検出することができる。そして、フレーム周期性の検出結果から、フリッカ成分の有無を判定することができる。 In the signal processing device, the signal processing method, or the imaging device having the above-described configuration, flicker is obtained by using the luminance detection values obtained by detecting the luminance of each pixel for each detection frame for a plurality of detection frames. The frame periodicity of each detection frame can be detected for the component. The presence / absence of a flicker component can be determined from the detection result of the frame periodicity.
 本開示によれば、フリッカ成分について各検波枠のフレーム周期性を検出し、その検出結果からフリッカ成分の有無を判定することで、1画面内のフリッカ縞が発生しない場合であっても、フリッカの発生を検出することができる。 According to the present disclosure, by detecting the frame periodicity of each detection frame for flicker components and determining the presence or absence of flicker components from the detection result, even if flicker fringes in one screen do not occur, flicker Can be detected.
 尚、ここに記載された効果に必ずしも限定されるものではなく、本明細書中に記載されたいずれかの効果であってもよい。また、本明細書に記載された効果はあくまで例示であって、これに限定されるものではなく、また付加的な効果があってもよい。 It should be noted that the effect described here is not necessarily limited, and may be any effect described in the present specification. Moreover, the effect described in this specification is an illustration to the last, Comprising: It is not limited to this, There may be an additional effect.
図1Aは、ローリングシャッタ方式の動作の概念図であり、図1Bは、画素駆動のフレームレート、光源周波数、及び、フリッカ周期の関係についての説明図である。FIG. 1A is a conceptual diagram of an operation of the rolling shutter system, and FIG. 1B is an explanatory diagram regarding a relationship between a pixel drive frame rate, a light source frequency, and a flicker cycle. 図2は、積層構造の撮像素子の構成の概略を分解斜視図である。FIG. 2 is an exploded perspective view schematically illustrating the configuration of the image pickup device having a laminated structure. 図3は、撮像画素部の構成の一例を示す回路図である。FIG. 3 is a circuit diagram illustrating an example of the configuration of the imaging pixel unit. 図4Aは、疑似グローバルシャッタ方式の動作の概念図であり、図4Bは、グローバルシャッタ方式の動作の概念図である。FIG. 4A is a conceptual diagram of the operation of the pseudo global shutter system, and FIG. 4B is a conceptual diagram of the operation of the global shutter system. 図5は、本開示の第1実施形態に係る信号処理装置の構成の一例を示すブロック図である。FIG. 5 is a block diagram illustrating an example of the configuration of the signal processing device according to the first embodiment of the present disclosure. 図6は、周期検出部を構成するNフレーム周期フリッカ検出器の構成の一例を示すブロック図である。FIG. 6 is a block diagram showing an example of the configuration of an N frame cycle flicker detector that constitutes the cycle detection unit. 図7は、正規化処理についての説明図である。FIG. 7 is an explanatory diagram of the normalization process. 図8は、Nフレーム高周波検出処理部におけるNフレーム周期性検出の処理の流れを示すフローチャートである。FIG. 8 is a flowchart showing a flow of N frame periodicity detection processing in the N frame high frequency detection processing unit. 図9は、画面比率判定部における画面比率判定の処理の流れを示すフローチャートである。FIG. 9 is a flowchart showing the flow of the screen ratio determination process in the screen ratio determination unit. 図10は、M=8、バラつき除去判定閾値=5の場合のバラつき除去の処理例を示す図である。FIG. 10 is a diagram illustrating a processing example of variation removal when M = 8 and variation removal determination threshold = 5. 図11は、本開示の第2実施形態に係る信号処理装置の構成の一例を示すブロック図である。FIG. 11 is a block diagram illustrating an exemplary configuration of a signal processing device according to the second embodiment of the present disclosure. 図12は、本開示の撮像装置のシステム構成の一例を示すブロック図である。FIG. 12 is a block diagram illustrating an example of a system configuration of the imaging apparatus according to the present disclosure.
 以下、本開示の技術を実施するための形態(以下、「実施形態」と記述する)について図面を用いて詳細に説明する。本開示の技術は実施形態に限定されるものではなく、実施形態における種々の数値などは例示である。以下の説明において、同一要素又は同一機能を有する要素には同一符号を用いることとし、重複する説明は省略する。尚、説明は以下の順序で行う。
1.本開示の信号処理装置、信号処理方法、及び、撮像装置、全般に関する説明
2.フリッカについて
3.積層構造の撮像素子について
4.疑似グローバルシャッタ方式について
5.第1実施形態
 5-1.システム構成
 5-2.Nフレーム周期フリッカ検出器
  5-2-1.正規化処理
  5-2-2.Nフレーム高周波検出
  5-2-3.Nフレーム周期性検出
  5-2-4.画面比率判定
  5-2-5.バラつき除去(チャタリング除去)
6.第2実施形態
7.本開示の撮像装置
8.変形例
9.本開示の構成
Hereinafter, modes for carrying out the technology of the present disclosure (hereinafter referred to as “embodiments”) will be described in detail with reference to the drawings. The technology of the present disclosure is not limited to the embodiments, and various numerical values in the embodiments are examples. In the following description, the same reference numerals are used for the same elements or elements having the same function, and redundant description is omitted. The description will be given in the following order.
1. 1. General description of signal processing apparatus, signal processing method, and imaging apparatus of the present disclosure About Flicker 3. Regarding an image sensor having a laminated structure 4. Pseudo global shutter system First embodiment 5-1. System configuration 5-2. N frame period flicker detector 5-2-1. Normalization processing 5-2-2. N frame high frequency detection 5-2-3. N-frame periodicity detection 5-2-4. Screen ratio determination 5-2-5. Unevenness (removal of chattering)
6). Second embodiment 7. 7. Imaging device of the present disclosure Modification 9 Composition of the present disclosure
<本開示の信号処理装置、信号処理方法、及び、撮像装置、全般に関する説明>
 本開示の信号処理装置、信号処理方法、及び、撮像装置にあっては、輝度検波値について、検波枠毎に各画素の輝度情報を積算した輝度積分値、又は、当該輝度積分値を1画素単位で平均化した輝度平均値である構成とすることができる。
<Description on Signal Processing Device, Signal Processing Method, and Imaging Device of the Present Disclosure>
In the signal processing device, the signal processing method, and the imaging device of the present disclosure, with respect to the luminance detection value, the luminance integrated value obtained by integrating the luminance information of each pixel for each detection frame, or the luminance integrated value as one pixel. It can be set as the structure which is the luminance average value averaged by the unit.
 上述した好ましい構成を含む本開示の信号処理装置、信号処理方法、及び、撮像装置にあっては、複数フレームを、注目フレームを含む過去Nフレーム(Nは、撮像素子の駆動周波数及び光源の明滅周波数で決まる値)とすることができる。そして、周期検出部について、Nフレームの輝度検波値における最大値及び最小値を求め、最大値及び最小値の差分により正規化処理を行い、フリッカ成分について各検波枠のフレーム周期性を評価する構成とすることができる。その際に、Nフレームの輝度検波値における最大値及び最小値の差分が所定の最小振幅閾値を下回る場合、フレーム周期性の評価値を0とすることが好ましい。 In the signal processing device, the signal processing method, and the imaging device of the present disclosure including the preferred configuration described above, a plurality of frames are included in the past N frames including the frame of interest (N is the driving frequency of the imaging device and the blinking of the light source). Value determined by frequency). Then, the period detection unit obtains the maximum value and the minimum value in the luminance detection values of N frames, performs normalization processing based on the difference between the maximum value and the minimum value, and evaluates the frame periodicity of each detection frame for flicker components. It can be. At this time, when the difference between the maximum value and the minimum value in the luminance detection values of N frames is less than a predetermined minimum amplitude threshold value, it is preferable to set the evaluation value of the frame periodicity to 0.
 更に、上述した好ましい構成を含む本開示の信号処理装置、信号処理方法、及び、撮像装置にあっては、周期検出部について、高周波検出処理部及び周期性検出処理部を有する構成とすることができる。高周波検出処理部は、Nフレーム中に高周波成分が存在するか否かを検出する。周期性検出処理部は、Nフレーム間の輝度検波値の差分に基づいて、Nフレーム中のフリッカ成分のフレーム単位での周期性を検出する。 Furthermore, in the signal processing device, the signal processing method, and the imaging device of the present disclosure including the preferable configuration described above, the period detection unit may include a high-frequency detection processing unit and a periodicity detection processing unit. it can. The high frequency detection processing unit detects whether or not a high frequency component exists in the N frame. The periodicity detection processing unit detects the periodicity of the flicker component in the N frame in units of frames based on the difference in the luminance detection value between the N frames.
 更に、上述した好ましい構成を含む本開示の信号処理装置、信号処理方法、及び、撮像装置にあっては、周期検出部について、高周波検出処理部及び周期性検出処理部の各検出結果を基に、Nフレーム中に高周波成分が存在し、かつフリッカ成分がフレーム単位で周期性を持つとき、Nフレーム周期のフリッカ成分を検出する構成とすることができる。 Furthermore, in the signal processing device, the signal processing method, and the imaging device of the present disclosure including the preferred configuration described above, the period detection unit is based on the detection results of the high-frequency detection processing unit and the periodicity detection processing unit. When there are high frequency components in N frames and the flicker components have periodicity in units of frames, the flicker components in the N frame cycle can be detected.
 更に、上述した好ましい構成を含む本開示の信号処理装置、信号処理方法、及び、撮像装置にあっては、高周波検出処理部について、輝度検波値を離散フーリエ変換し、得られた周波数情報から撮像信号に高周波成分が存在するか否かによってフリッカ成分の有無を判断する構成とすることができる。また、周期性検出処理部について、Nフレーム間の輝度検波値の差分が所定の周期性判定閾値よりも小さい場合に、Nフレーム中のフリッカ成分のフレーム単位での周期性有りと判定する構成とすることができる。 Furthermore, in the signal processing device, the signal processing method, and the imaging device of the present disclosure including the preferred configuration described above, the luminance detection value is subjected to discrete Fourier transform for the high frequency detection processing unit, and imaging is performed from the obtained frequency information. The presence or absence of a flicker component can be determined based on whether or not a high-frequency component exists in the signal. The periodicity detection processing unit is configured to determine that the flicker component in the N frame has periodicity in units of frames when the difference in luminance detection value between the N frames is smaller than a predetermined periodicity determination threshold. can do.
 更に、上述した好ましい構成を含む本開示の信号処理装置、信号処理方法、及び、撮像装置にあっては、判定部について、周期検出部による各検波枠のフレーム周期性の検出結果を基に、画面全体としてのフリッカの有無を判定する構成とすることができる。また、判定部について、周期検出部による各検波枠のフレーム周期性の検出結果をカウントし、そのカウント合計を総検波枠数で除算してフリッカ検出比率を算出し、当該フリッカ検出比率を所定の面積比率判定閾値と比較することによってフリッカの有無を判定する構成とすることができる。 Furthermore, in the signal processing device, the signal processing method, and the imaging device of the present disclosure including the preferable configuration described above, the determination unit is based on the detection result of the frame periodicity of each detection frame by the cycle detection unit. It can be configured to determine the presence or absence of flicker on the entire screen. Further, the determination unit counts the detection result of the frame periodicity of each detection frame by the cycle detection unit, calculates the flicker detection ratio by dividing the total count by the total number of detection frames, and sets the flicker detection ratio to a predetermined value. It can be configured to determine the presence or absence of flicker by comparing with the area ratio determination threshold.
 更に、上述した好ましい構成を含む本開示の信号処理装置、信号処理方法、及び、撮像装置にあっては、判定部による各フレームにおけるフリッカの有無の判定結果を蓄積し、判定結果のバラつきを除去して最終判定結果とするバラつき除去部を備える構成とすることができる。そして、バラつき除去部について、判定部による過去Mフレーム分の判定結果を蓄積し、フリッカ有りの判定回数が所定のバラつき除去判定閾値以上の場合に最終判定結果をフリッカ有りとする構成とすることができる。 Furthermore, in the signal processing device, the signal processing method, and the imaging device of the present disclosure including the preferred configuration described above, the determination result of the presence / absence of flicker in each frame by the determination unit is accumulated, and variation in the determination result is eliminated. And it can be set as the structure provided with the variation removal part made into a final determination result. Then, the variation removal unit accumulates the determination results for the past M frames by the determination unit, and when the number of flicker determinations is equal to or greater than a predetermined variation removal determination threshold, the final determination result is configured to have flicker. it can.
 更に、上述した好ましい構成を含む本開示の信号処理装置、信号処理方法、及び、撮像装置にあっては、1つの画素について、信号電荷を長時間蓄積して得られる長時間蓄積撮像信号と、信号電荷を短時間蓄積して得られる短時間蓄積撮像信号とが輝度検波部に入力される構成とすることができる。このとき、輝度検波部について、長時間蓄積撮像信号及び短時間蓄積撮像信号のそれぞれについて検波枠毎に各画素の輝度を検波し、その輝度検波値を周期検出部に与える構成とすることができる。 Furthermore, in the signal processing device, the signal processing method, and the imaging device of the present disclosure including the preferred configuration described above, a long-time accumulation imaging signal obtained by accumulating signal charges for a long time for one pixel, A short-time accumulation imaging signal obtained by accumulating signal charges for a short time can be input to the luminance detection unit. At this time, the luminance detection unit can be configured to detect the luminance of each pixel for each detection frame for each of the long-time accumulation imaging signal and the short-time accumulation imaging signal and to give the luminance detection value to the period detection unit. .
 あるいは又、本開示の撮像装置にあっては、撮像画素部について、CMOSセンサから成る構成とすることができる。また、撮像画素部が形成された画素基板、及び、信号処理回路が形成された回路基板が積層されており、画素基板と回路基板との間には、撮像画素部から出力される撮像信号を一旦格納するメモリ部が形成された基板が設けられている構成とすることができる。 Alternatively, in the imaging device of the present disclosure, the imaging pixel unit may be configured by a CMOS sensor. In addition, a pixel substrate on which an imaging pixel unit is formed and a circuit substrate on which a signal processing circuit is formed are stacked, and an imaging signal output from the imaging pixel unit is provided between the pixel substrate and the circuit substrate. A structure in which a substrate on which a memory portion for temporarily storing is formed is provided.
 更に、上述した好ましい構成を含む本開示の撮像装置にあっては、明るさが周期的に変動する光源環境下において、ローリングシャッタ方式での読み出し時間よりも短い読み出し時間で撮像画素部からメモリ部へ撮像信号を読み出す構成とすることができる。このとき、光源の明滅周期よりも短い読み出し時間で撮像画素部からメモリ部へ撮像信号を読み出すことが好ましい。また、撮像画素部からは、1つの画素について、信号電荷を長時間蓄積して得られる長時間蓄積撮像信号と、信号電荷を短時間蓄積して得られる短時間蓄積撮像信号とを信号処理回路に供給する構成とすることができる。 Further, in the imaging device of the present disclosure including the above-described preferable configuration, the imaging pixel unit to the memory unit can be read out with a readout time shorter than the readout time in the rolling shutter system in a light source environment in which the brightness periodically varies. The imaging signal can be read out. At this time, it is preferable to read the imaging signal from the imaging pixel unit to the memory unit with a readout time shorter than the blinking cycle of the light source. Further, from the imaging pixel unit, a signal processing circuit for a long-time accumulation imaging signal obtained by accumulating signal charges for a long time and a short-time accumulation imaging signal obtained by accumulating signal charges for a short time for one pixel. It can be set as the structure supplied to.
<フリッカについて>
 先ず、撮影した画像の画質劣化を引き起こす一因となるフリッカについて説明する。CMOS(Complementary Metal Oxide Semiconductor)イメージセンサに代表されるX-Yアドレス型撮像素子では、シャッタ方式として、一般的に、1ライン(水平ライン)から数ラインを1つのブロックにして、このブロック毎に撮像信号を取得するローリングシャッタ方式が採用されている。ローリングシャッタ方式の動作の概念図を図1Aに示す。図1Aにおいて、実線が露光開始時刻を示し、破線が撮像信号の読み出し開始時刻を示し、網掛け領域が露光時間を示している。
<About Flicker>
First, flicker that contributes to image quality degradation of a photographed image will be described. In an XY address type image pickup device represented by a CMOS (Complementary Metal Oxide Semiconductor) image sensor, as a shutter system, generally, from one line (horizontal line) to several lines are made into one block, and each block is divided. A rolling shutter system that acquires an imaging signal is employed. A conceptual diagram of the operation of the rolling shutter system is shown in FIG. 1A. In FIG. 1A, the solid line indicates the exposure start time, the broken line indicates the readout start time of the imaging signal, and the shaded area indicates the exposure time.
 ローリングシャッタ方式の撮像素子では、明るさが周期的に変動する光源環境下で撮影を行うと、その撮像信号に基づく表示画面上に、垂直走査方向(画素行の配列方向)に周期的な輝度の変動が横縞(フリッカ縞)として視認されるフリッカが発生する。例えば、周波数が50Hzの商用電源で蛍光灯等の光源を点灯させた場合、電源周波数の2倍の周波数、即ち、100Hzで明るさが周期的に変動する(明滅する)。 In a rolling shutter type imaging device, when shooting is performed in a light source environment in which the brightness varies periodically, luminance is periodically displayed in the vertical scanning direction (pixel row arrangement direction) on the display screen based on the imaging signal. Flicker is generated in which the fluctuations are visually recognized as horizontal stripes (flicker stripes). For example, when a light source such as a fluorescent lamp is turned on with a commercial power supply having a frequency of 50 Hz, the brightness periodically fluctuates (flickers) at a frequency twice the power supply frequency, that is, 100 Hz.
 上記の光源環境下において、例えば撮影フレームの周期が1/30秒(30fps)の場合、3フレーム周期で光源の明るさの位相が揃うため、3フレーム周期毎に各フレームの輝度が変動する。また、ローリングシャッタ方式の撮像素子では、図1に示すように、ライン単位で露光開始時刻(信号電荷の蓄積開始時刻)が異なるため、表示画面上に、垂直走査方向に周期的な輝度の変動として現れ、フリッカ縞として視認される。 Under the above light source environment, for example, when the cycle of the shooting frame is 1/30 second (30 fps), the brightness phase of the light source is aligned in three frame cycles, so the luminance of each frame varies every three frame cycles. In addition, in the rolling shutter type imaging device, as shown in FIG. 1, since the exposure start time (signal charge accumulation start time) is different for each line, the luminance fluctuation periodically in the vertical scanning direction on the display screen. Appear as flicker stripes.
 フレームレート、光源周波数、及び、フリッカ周期の関係を図1Bに示す。具体的には、50Hzの光源環境下では、フレームレートが15fps、30fps、60fpsの場合に、フリッカ周期が3フレーム周期となる。また、60Hzの光源環境下では、フレームレートが12.5fps、25fps、50fpsの場合に、フリッカ周期が5フレーム周期となる。 FIG. 1B shows the relationship between the frame rate, the light source frequency, and the flicker cycle. Specifically, under a light source environment of 50 Hz, when the frame rate is 15 fps, 30 fps, and 60 fps, the flicker period is 3 frame periods. Further, under a light source environment of 60 Hz, when the frame rate is 12.5 fps, 25 fps, and 50 fps, the flicker cycle becomes 5 frame cycles.
 上述したように、ローリングシャッタ方式の撮像素子では、撮像信号の読み出し時間と光源の明滅周期によって、1画面内(1撮像フレーム内)に水平ライン単位でフリッカ縞(以下、「面内ラインフリッカ」と記述する場合がある)が発生する。従って、面内ラインフリッカの周期を検出することによってフリッカの発生を検出することができる。しかし、このフリッカ検出の技術では、面内ラインフリッカが発生しない撮像素子の場合は、フリッカの発生を検出することはできない。 As described above, in a rolling shutter type imaging device, flicker stripes (hereinafter referred to as “in-plane line flicker”) in units of horizontal lines within one screen (within one imaging frame) depending on the readout time of the imaging signal and the blinking cycle of the light source. May occur). Therefore, the occurrence of flicker can be detected by detecting the period of in-plane line flicker. However, this flicker detection technique cannot detect the occurrence of flicker in the case of an image sensor that does not generate in-plane line flicker.
<積層構造の撮像素子について>
 面内ラインフリッカが発生しない撮像素子として、積層構造の撮像素子を例示することができる。但し、積層構造の撮像素子に限定するものではない。積層構造の撮像素子の構成の概略を図2に示す。
<Regarding an image sensor with a laminated structure>
As an image sensor that does not generate in-plane line flicker, an image sensor having a laminated structure can be exemplified. However, the present invention is not limited to the image pickup device having a laminated structure. FIG. 2 shows an outline of the configuration of the image pickup element having a laminated structure.
 本例に係る積層構造の撮像素子10は、少なくとも3枚の半導体基板(半導体チップ)11,12,13が積層される構成となっている。1層目の半導体基板11は、撮像画素部21が形成された画素基板となっている。具体的には、半導体基板11には、光電変換素子や種々の画素トランジスタを含む画素が行列状に配列されて成る撮像画素部21が構成されている。撮像画素部21の構成の詳細については後述する。 The image pickup device 10 having a laminated structure according to this example has a configuration in which at least three semiconductor substrates (semiconductor chips) 11, 12, and 13 are laminated. The first-layer semiconductor substrate 11 is a pixel substrate on which the imaging pixel unit 21 is formed. Specifically, on the semiconductor substrate 11, an imaging pixel unit 21 is configured in which pixels including photoelectric conversion elements and various pixel transistors are arranged in a matrix. Details of the configuration of the imaging pixel unit 21 will be described later.
 2層目の半導体基板12は、1層目の半導体基板11の撮像画素部21から出力されるアナログの撮像信号を一旦格納するメモリ部22が形成されたメモリ基板となっている。撮像信号を一旦格納するメモリ部22としては、例えば、高速、低パワーの大容量メモリを用いることが好ましい。 The second-layer semiconductor substrate 12 is a memory substrate on which a memory unit 22 that temporarily stores an analog imaging signal output from the imaging pixel unit 21 of the first-layer semiconductor substrate 11 is formed. For example, a high-speed, low-power, large-capacity memory is preferably used as the memory unit 22 that temporarily stores the imaging signal.
 3層目の半導体基板13は、A(アナログ)/D(デジタル)変換部23やロジック回路24等の信号処理部が形成された回路基板となっている。A/D変換部23は、2層目の半導体基板12のメモリ部22から読み出されるアナログの撮像信号をデジタルの撮像信号に変換する。ロジック回路24は、デジタルの撮像信号に対して種々の信号処理を行う。 The third-layer semiconductor substrate 13 is a circuit board on which signal processing units such as an A (analog) / D (digital) conversion unit 23 and a logic circuit 24 are formed. The A / D conversion unit 23 converts an analog imaging signal read from the memory unit 22 of the second-layer semiconductor substrate 12 into a digital imaging signal. The logic circuit 24 performs various signal processing on the digital imaging signal.
 A/D変換部23は、周知のA/D変換部とすることができる。具体的には、A/D変換部23として、シングルスロープ型A/D変換部、逐次比較型A/D変換部、又は、デルタ-シグマ変調型(ΔΣ変調型)A/D変換部を例示することができる。但し、A/D変換部23は、これらに限定されるものではない。 The A / D converter 23 can be a known A / D converter. Specifically, as the A / D conversion unit 23, a single slope type A / D conversion unit, a successive approximation type A / D conversion unit, or a delta-sigma modulation type (ΔΣ modulation type) A / D conversion unit is exemplified. can do. However, the A / D converter 23 is not limited to these.
 上述したように、少なくとも3枚の半導体基板11,12,13が積層されて成る積層構造の撮像素子10は、1層目の半導体基板11として撮像画素部21を形成できるだけの大きさ(面積)のもので済む。従って、1層目の半導体基板11のサイズ(面積)、ひいては、チップ全体のサイズを小さくできる。更に、1層目の半導体基板11には画素の作成に適したプロセスを、2層目、3層目の半導体基板12,13には回路の作成に適したプロセスをそれぞれ適用できるため、撮像素子10の製造に当たって、プロセスの最適化を図ることができるメリットもある。 As described above, the image pickup device 10 having a stacked structure in which at least three semiconductor substrates 11, 12, and 13 are stacked has a size (area) enough to form the image pickup pixel portion 21 as the first semiconductor substrate 11. It's fine. Accordingly, the size (area) of the first-layer semiconductor substrate 11 and, consequently, the size of the entire chip can be reduced. Furthermore, a process suitable for pixel creation can be applied to the first semiconductor substrate 11, and a process suitable for circuit creation can be applied to the second and third semiconductor substrates 12 and 13, respectively. There is also an advantage that the process can be optimized in the manufacture of 10.
 また、上記の撮像素子10において、撮像画素部21から読み出された撮像信号は、A/D変換部23でデジタルデータに変換された後、メモリコントローラ(図示せず)による制御の下に、高速にメモリ部22に書き込まれる。そして、メモリ部22に書き込まれデジタルデータは、メモリコントローラによる制御の下に、低速にロジック回路24等の信号処理部へ読み出される。これにより、撮像画素部21からメモリ部22へ撮像信号を一瞬で読み出し、メモリ部22からゆっくり読み出して信号処理を行うことで、歪みの少ない高画質の画像を得ることができる。 In the imaging device 10 described above, an imaging signal read from the imaging pixel unit 21 is converted into digital data by the A / D conversion unit 23, and then controlled by a memory controller (not shown). Data is written to the memory unit 22 at high speed. Then, the digital data written in the memory unit 22 is read out to the signal processing unit such as the logic circuit 24 at a low speed under the control of the memory controller. As a result, an image pickup signal is instantaneously read from the image pickup pixel unit 21 to the memory unit 22 and is slowly read out from the memory unit 22 to perform signal processing, thereby obtaining a high-quality image with little distortion.
 ここで、撮像画素部21の構成について、具体例を挙げて説明する。撮像画素部21の構成の一例を図3に示す。本例に係る撮像画素部21は、光電変換素子や種々の画素トランジスタを含む画素30が、行方向及び列方向に2次元マトリクス状に配列されて成るCMOSセンサとして構成されている。 Here, the configuration of the imaging pixel unit 21 will be described with a specific example. An example of the configuration of the imaging pixel unit 21 is shown in FIG. The imaging pixel unit 21 according to this example is configured as a CMOS sensor in which pixels 30 including photoelectric conversion elements and various pixel transistors are arranged in a two-dimensional matrix in the row direction and the column direction.
 画素30は、光電変換素子として、例えばフォトダイオード31を有し、画素トランジスタとして、例えば、転送トランジスタ32、リセットトランジスタ33、増幅トランジスタ34、及び、選択トランジスタ35の4つのトランジスタを有している。 The pixel 30 includes, for example, a photodiode 31 as a photoelectric conversion element, and includes, for example, four transistors, which are a transfer transistor 32, a reset transistor 33, an amplification transistor 34, and a selection transistor 35, as pixel transistors.
 ここでは、4つの画素トランジスタ32~35として、例えばNチャネルのトランジスタを用いている。但し、ここで例示した転送トランジスタ32、リセットトランジスタ33、増幅トランジスタ34、及び、選択トランジスタ35の導電型の組み合わせは一例に過ぎず、これらの組み合わせに限られるものではない。すなわち、必要に応じて、Pチャネルのトランジスタを用いる組み合わせとすることができる。 Here, as the four pixel transistors 32 to 35, for example, N-channel transistors are used. However, the conductivity type combinations of the transfer transistor 32, the reset transistor 33, the amplification transistor 34, and the selection transistor 35 illustrated here are merely examples, and are not limited to these combinations. That is, a combination using a P-channel transistor can be used as necessary.
 画素30に対して、当該画素30を駆動する駆動信号である転送信号TRG、リセット信号RST、及び、選択信号SELが行選択部(図示せず)から適宜与えられる。すなわち、転送信号TRGが転送トランジスタ32のゲート電極に、リセット信号RSTがリセットトランジスタ33のゲート電極に、選択信号SELが選択トランジスタ35のゲート電極にそれぞれ印加される。 A transfer signal TRG, a reset signal RST, and a selection signal SEL that are drive signals for driving the pixel 30 are appropriately supplied to the pixel 30 from a row selection unit (not shown). That is, the transfer signal TRG is applied to the gate electrode of the transfer transistor 32, the reset signal RST is applied to the gate electrode of the reset transistor 33, and the selection signal SEL is applied to the gate electrode of the selection transistor 35.
 フォトダイオード31は、アノード電極が低電位側電源(例えば、グランド)に接続されており、受光した光(入射光)をその光量に応じた電荷量の光電荷(ここでは、光電子)に光電変換してその光電荷を蓄積する。フォトダイオード31のカソード電極は、転送トランジスタ32を介して増幅トランジスタ34のゲート電極と電気的に接続されている。増幅トランジスタ34のゲート電極と電気的に繋がったノードがフローティングディフュージョン(浮遊拡散領域)36である。 The photodiode 31 has an anode electrode connected to a low-potential side power source (for example, ground), and photoelectrically converts received light (incident light) into photocharge (here, photoelectrons) having a charge amount corresponding to the amount of light. Then, the photocharge is accumulated. The cathode electrode of the photodiode 31 is electrically connected to the gate electrode of the amplification transistor 34 via the transfer transistor 32. A node electrically connected to the gate electrode of the amplification transistor 34 is a floating diffusion (floating diffusion region) 36.
 転送トランジスタ32は、フォトダイオード31のカソード電極とフローティングディフュージョン36との間に接続されている。転送トランジスタ32のゲート電極には、高レベル(例えば、VDDレベル)の転送信号TRGが与えられる。この転送信号TRGに応答して、転送トランジスタ32が導通状態となり、フォトダイオード31で光電変換された光電荷をフローティングディフュージョン36に転送する。 The transfer transistor 32 is connected between the cathode electrode of the photodiode 31 and the floating diffusion 36. A high level (for example, V DD level) transfer signal TRG is applied to the gate electrode of the transfer transistor 32. In response to the transfer signal TRG, the transfer transistor 32 becomes conductive, and the photoelectric charge photoelectrically converted by the photodiode 31 is transferred to the floating diffusion 36.
 リセットトランジスタ33は、ドレイン電極が画素電源VDDに、ソース電極がフローティングディフュージョン36にそれぞれ接続されている。リセットトランジスタ33のゲート電極には、高レベルのリセット信号RSTが与えられる。このリセット信号RSTに応答して、リセットトランジスタ33が導通状態となり、フローティングディフュージョン36をリセットする。 The reset transistor 33 has a drain electrode connected to the pixel power supply V DD and a source electrode connected to the floating diffusion 36. A high level reset signal RST is applied to the gate electrode of the reset transistor 33. In response to the reset signal RST, the reset transistor 33 becomes conductive and resets the floating diffusion 36.
 増幅トランジスタ34は、ゲート電極がフローティングディフュージョン36に、ドレイン電極が画素電源VDDにそれぞれ接続されている。そして、増幅トランジスタ34は、リセットトランジスタ33によってリセットされた後のフローティングディフュージョン36の電位をリセット信号(リセットレベル)として出力する。増幅トランジスタ34は更に、転送トランジスタ32によって信号電荷が転送された後のフローティングディフュージョン36の電位を光蓄積信号(信号レベル)として出力する。 The amplification transistor 34 has a gate electrode connected to the floating diffusion 36 and a drain electrode connected to the pixel power source V DD . The amplification transistor 34 outputs the potential of the floating diffusion 36 after being reset by the reset transistor 33 as a reset signal (reset level). Further, the amplification transistor 34 outputs the potential of the floating diffusion 36 after the signal charge is transferred by the transfer transistor 32 as a light accumulation signal (signal level).
 選択トランジスタ35は、例えば、ドレイン電極が増幅トランジスタ34のソース電極に、ソース電極が信号線25にそれぞれ接続されている。選択トランジスタ35のゲート電極には、高レベルの選択信号SELが与えられる。この選択信号SELに応答して、選択トランジスタ35が導通状態となり、画素30を選択状態として増幅トランジスタ34から出力される信号を信号線25に読み出す。 The selection transistor 35 has, for example, a drain electrode connected to the source electrode of the amplification transistor 34 and a source electrode connected to the signal line 25. A high level selection signal SEL is supplied to the gate electrode of the selection transistor 35. In response to the selection signal SEL, the selection transistor 35 is turned on, and the pixel 30 is selected and a signal output from the amplification transistor 34 is read out to the signal line 25.
 尚、ここでは、選択トランジスタ35について、増幅トランジスタ34のソース電極と信号線25との間に接続する回路構成を例示したが、画素電源VDDと増幅トランジスタ34のドレイン電極との間に接続する回路構成を採ることも可能である。 Here, the circuit configuration in which the selection transistor 35 is connected between the source electrode of the amplification transistor 34 and the signal line 25 is illustrated, but the selection transistor 35 is connected between the pixel power supply V DD and the drain electrode of the amplification transistor 34. It is also possible to adopt a circuit configuration.
 また、画素30としては、上記の4つのトランジスタ32~35から成る画素構成のものに限られるものではない。例えば、増幅トランジスタ34に選択トランジスタ35の機能を持たせた3つのトランジスタから成る画素構成や、複数の光電変換素子間(画素間)で、フローティングディフュージョン36以降のトランジスタを共用する画素構成などであっても良く、その画素回路の構成は問わない。 Further, the pixel 30 is not limited to the pixel configuration including the four transistors 32 to 35 described above. For example, a pixel configuration including three transistors in which the function of the selection transistor 35 is provided in the amplification transistor 34, or a pixel configuration in which a transistor after the floating diffusion 36 is shared between a plurality of photoelectric conversion elements (between pixels). There is no limitation on the configuration of the pixel circuit.
<疑似グローバルシャッタ方式について>
 上述した積層構造の撮像素子10において、撮像画素部21からメモリ部22への撮像信号の高速読み出しは、先述したローリングシャッタ方式での読み出し時間よりも短い読み出し時間、例えば、明るさが周期的に変動する光源環境下において、光源の明滅周期よりも短い時間で行うことになる。そして、ローリングシャッタを高速に行うことにより、疑似的にグローバルシャッタの特性に近づける。従って、本明細書においては、ローリングシャッタ方式での読み出し時間よりも短い読み出し時間、即ち、ローリングシャッタ方式よりも高速で撮像信号を読み出すシャッタ方式を、疑似グローバルシャッタ方式と呼ぶこととする。
<Pseudo global shutter system>
In the image pickup device 10 having the above-described stacked structure, high-speed reading of the image pickup signal from the image pickup pixel unit 21 to the memory unit 22 is performed with a read time shorter than the read time in the above-described rolling shutter method, for example, brightness is periodically changed. In a changing light source environment, the time is shorter than the blinking cycle of the light source. Then, by performing the rolling shutter at high speed, the characteristics of the global shutter are approximated. Accordingly, in this specification, a readout time shorter than the readout time in the rolling shutter system, that is, a shutter system that reads out an imaging signal at a higher speed than the rolling shutter system is referred to as a pseudo global shutter system.
 疑似グローバルシャッタ方式の動作の概念図を図4Aに示す。この疑似グローバルシャッタ方式にて撮像画素部21からメモリ部22へ撮像信号を高速で読み出す撮像素子10の場合、面内ラインフリッカは発生せず、1画面(1撮像フレーム)単位で明滅するフリッカ(以下、「面フリッカ」と記述する場合がある)が発生する。この面フリッカが発生する疑似グローバルシャッタ方式の場合、面内ラインフリッカが発生するローリングシャッタ方式を対象としたフリッカの検出方式ではフリッカの検出が困難である。 A conceptual diagram of the operation of the pseudo global shutter system is shown in FIG. 4A. In the case of the image pickup device 10 that reads out an image pickup signal from the image pickup pixel unit 21 to the memory unit 22 at a high speed by this pseudo global shutter method, the in-plane line flicker does not occur and flickers blinking in units of one screen (one image pickup frame). Hereinafter, “surface flicker” may be described). In the case of the pseudo global shutter system in which the surface flicker occurs, it is difficult to detect the flicker in the flicker detection system for the rolling shutter system in which the in-plane line flicker occurs.
 因みに、一般的に、CCD(Charge Coupled Device)イメージセンサに代表される電荷転送型撮像素子で採用されるグローバルシャッタ方式の動作の概念図を図4Bに示す。このグローバルシャッタ方式の場合にも、面内ラインフリッカは発生せず、1画面単位で明滅する面フリッカが発生する。具体的には、グローバルシャッタ方式では、撮像素子の駆動周波数と光源の明滅周波数の組み合わせにより、高周波で明滅するフリッカ画像が得られる。 Incidentally, FIG. 4B shows a conceptual diagram of the operation of the global shutter system generally employed in a charge transfer type imaging device represented by a CCD (Charge Coupled Device) image sensor. Even in the case of this global shutter system, in-plane line flicker does not occur, and surface flicker that blinks in units of one screen occurs. Specifically, in the global shutter system, a flicker image blinking at a high frequency is obtained by a combination of the driving frequency of the image sensor and the blinking frequency of the light source.
 一例として、撮像素子の駆動周波数が60Hz、光源の明滅周波数が50Hzのとき、3フレーム周期のフリッカ画像が得られる。この性質を利用し、グローバルシャッタ方式では、撮像画面を垂直走査向に分割して複数の検波枠を設定し、各検波枠の輝度検波値を用いて、波の数及び間隔を理論計算値と比較することにより、フリッカの検出を行っていた。 As an example, when the driving frequency of the image sensor is 60 Hz and the blinking frequency of the light source is 50 Hz, a flicker image having a three-frame cycle is obtained. Using this property, in the global shutter method, the imaging screen is divided in the vertical scanning direction to set a plurality of detection frames, and using the luminance detection value of each detection frame, the number and interval of waves are calculated as theoretical calculation values. By comparison, flicker was detected.
 疑似グローバルシャッタ方式では、グローバルシャッタ方式と同様に、1画面単位で明滅する面フリッカが発生するものの、画面上にある程度の輝度差が生じる。よって、撮像画面全体で見た場合、規則的な明滅が発生しないため、グローバルシャッタ方式を対象とした検出方式を用いて、疑似グローバルシャッタ方式で発生するフリッカの周期性を精度よく検出することは困難である。 In the pseudo global shutter system, as in the global shutter system, a surface flicker that blinks in units of one screen occurs, but a certain luminance difference occurs on the screen. Therefore, since regular blinking does not occur when viewed on the entire imaging screen, it is possible to accurately detect flicker periodicity generated in the pseudo global shutter method using a detection method targeting the global shutter method. Have difficulty.
 そこで、本開示では、CMOSイメージセンサに代表されるX-Yアドレス型撮像素子、例えば積層構造の撮像素子において、面内ラインフリッカが発生せず、面フリッカが発生する場合であっても、フリッカの周期性を精度よく検出することができる技術を提案する。但し、本開示の技術は、積層構造の撮像素子への適用に限るものではなく、また、CCDイメージセンサに代表される電荷転送型撮像素子への適用を排除するものではない。以下に、本開示の技術の具体的な実施形態について説明する。 Therefore, in the present disclosure, in an XY address type image pickup device typified by a CMOS image sensor, for example, an image pickup device having a laminated structure, in-plane line flicker does not occur and flicker occurs even when surface flicker occurs. We propose a technique that can accurately detect the periodicity of the. However, the technology of the present disclosure is not limited to application to an image pickup device having a laminated structure, and does not exclude application to a charge transfer type image pickup device typified by a CCD image sensor. Hereinafter, specific embodiments of the technology of the present disclosure will be described.
<第1実施形態>
 図5は、本開示の第1実施形態に係る信号処理装置(信号処理回路)の構成の一例を示すブロック図である。本実施形態では、撮像画素部21の撮像領域(画素領域)に対応する撮像画面40を、垂直走査向(画素行/水平ラインに直交する方向)に分割して複数の検波枠411~416を設定することとする。設定する検波枠数は任意であるが、ここでは、図面の簡略化のために6個としている。実際には、16個や32個など、多くの検波枠数を設定することが好ましい。
<First Embodiment>
FIG. 5 is a block diagram illustrating an example of a configuration of the signal processing device (signal processing circuit) according to the first embodiment of the present disclosure. In the present embodiment, the imaging screen 40 corresponding to the imaging region (pixel region) of the imaging pixel unit 21 is divided into a plurality of detection frames 41 1 to 41 by dividing the imaging screen 40 in the vertical scanning direction (direction orthogonal to the pixel row / horizontal line). 6 is set. The number of detection frames to be set is arbitrary, but here it is set to 6 for simplification of the drawing. Actually, it is preferable to set a large number of detection frames such as 16 or 32.
[システム構成]
 図5に示すように、本実施形態に係る信号処理装置50は、輝度検波部51、周期検出部52、画面比率判定部53、及び、バラつき除去部54から構成されており、撮像画面40の各検出枠の輝度検波値を複数フレーム分用いてフリッカのフレーム周期の検出を行う。そして、各検波枠411~416より得られた検出結果を基に画面全体としてフリッカが発生しているか否かの判定を行う。好ましくは、その判定結果をフレーム単位で蓄積を行い、判定結果のバラつきを除去し、最終の判定結果とする。
[System configuration]
As illustrated in FIG. 5, the signal processing device 50 according to the present embodiment includes a luminance detection unit 51, a period detection unit 52, a screen ratio determination unit 53, and a variation removal unit 54. The flicker frame period is detected by using the luminance detection value of each detection frame for a plurality of frames. Then, based on the detection results obtained from the detection frames 41 1 to 41 6, it is determined whether or not flicker has occurred in the entire screen. Preferably, the determination results are accumulated in units of frames, and variations in the determination results are removed to obtain a final determination result.
 輝度検波部51は、撮像画面40の例えば6個の検波枠411~416に対応して6個の輝度検波器511~516から成り、6個の輝度検波器511~516について、撮像信号に基づいて検波枠毎に各画素30の輝度を検波する。より具体的には、輝度検波部51は、検波枠411~416毎の輝度検波値の変化が、グローバルシャッタ方式と同等の周期変化となるように各画素30の輝度を検波する。輝度検波値は、検波枠411~416毎に各画素30の輝度情報を積算した輝度積分値であってもよいし、当該輝度積分値を1画素単位で平均化した輝度平均値であってもよい。 The luminance detection unit 51 includes six luminance detectors 51 1 to 51 6 corresponding to, for example, six detection frames 41 1 to 41 6 of the imaging screen 40, and the six luminance detectors 51 1 to 51 6. , The luminance of each pixel 30 is detected for each detection frame based on the imaging signal. More specifically, the luminance detection unit 51 detects the luminance of each pixel 30 so that the change of the luminance detection value for each of the detection frames 41 1 to 41 6 is a period change equivalent to the global shutter method. The luminance detection value may be a luminance integrated value obtained by integrating the luminance information of each pixel 30 for each of the detection frames 41 1 to 41 6 , or a luminance average value obtained by averaging the luminance integrated value for each pixel. May be.
 周期検出部52は、6個の輝度検波器511~516に対応した6個のNフレーム周期フリッカ検出器521~526から成り、複数フレーム分用いてフリッカ成分について各検波枠411~416のフレーム単位での周期性(もしくは、高周波)の検出処理を行う。この検出処理を行うことにより、フリッカの発生を検出することができる。ここで、複数フレームは、注目フレームを含む過去Nフレームである。Nは、撮像素子の駆動周波数及び光源の明滅周波数で決まる値である。周期検出部52の詳細については後述する。 The period detection unit 52 includes six N frame period flicker detectors 52 1 to 52 6 corresponding to the six luminance detectors 51 1 to 51 6, and each detection frame 41 1 is used for flicker components using a plurality of frames. A periodicity (or high frequency) detection process in units of ˜41 6 frames is performed. By performing this detection process, the occurrence of flicker can be detected. Here, the plurality of frames are the past N frames including the frame of interest. N is a value determined by the drive frequency of the image sensor and the blinking frequency of the light source. Details of the period detector 52 will be described later.
 画面比率判定部53は、周期検出部52によるフレーム単位での周期性(もしくは、高周波)の検出結果に基づいて、撮像画面40全体としてのフリッカの有無を判定する。バラつき除去部54は、画面比率判定部53による各フレームにおけるフリッカ成分の有無の判定結果を蓄積し、判定結果のバラつきを除去して最終判定結果とする。画面比率判定部53及びバラつき除去部54の詳細については後述する。 The screen ratio determination unit 53 determines the presence or absence of flicker in the entire imaging screen 40 based on the detection result of periodicity (or high frequency) in units of frames by the period detection unit 52. The variation removal unit 54 accumulates the determination result of the presence / absence of the flicker component in each frame by the screen ratio determination unit 53, and removes the variation of the determination result to obtain the final determination result. Details of the screen ratio determination unit 53 and the variation removal unit 54 will be described later.
[Nフレーム周期フリッカ検出器]
 周期検出部52を構成するNフレーム周期フリッカ検出器521~526の構成の一例を図6に示す。明るさが周期的に変動する光源環境下において、グローバルシャッタ方式の撮像素子で被写体を撮像すると、撮像画像(出力画像)としては、高周波で、かつフレーム単位で周期性を持つ輝度変化が見られる。
[N frame period flicker detector]
An example of the configuration of the N frame cycle flicker detectors 52 1 to 52 6 constituting the cycle detector 52 is shown in FIG. When a subject is imaged with a global shutter imaging device in a light source environment where the brightness varies periodically, the captured image (output image) has a high-frequency luminance change with a periodicity in units of frames. .
 Nフレーム周期フリッカ検出器521~526は、高周波で、かつフレーム単位で周期性を持つという特性を利用し、高周波検出及びフレーム単位での周期性検出を行い、Nフレーム周期のフリッカ成分の有無を判定する。具体的には、Nフレーム周期フリッカ検出器521~526は、正規化処理部511、Nフレーム高周波検出処理部512、Nフレーム周期性検出処理部513、及び、論理積部514から構成されている。ここでは、輝度検波値として、輝度平均値を用いる場合を例に挙げて説明するが、輝度積分値を用いる場合も同様である。 The N frame period flicker detectors 52 1 to 52 6 perform high frequency detection and periodicity detection in units of frames by utilizing the characteristics of having high frequency and periodicity in units of frames, and detecting flicker components of N frame periods. Determine presence or absence. Specifically, the N frame period flicker detectors 52 1 to 52 6 include a normalization processing unit 511, an N frame high frequency detection processing unit 512, an N frame periodicity detection processing unit 513, and a logical product unit 514. ing. Here, the case where the luminance average value is used as the luminance detection value will be described as an example, but the same applies to the case where the luminance integral value is used.
(正規化処理)
 正規化処理部511は、図7に示すように、注目フレームを含む過去Nフレームの輝度検波値における最大値Max及び最小値Minを求める。ここでは、N=3の場合、即ち、撮像素子の駆動周波数が60Hz、光源の明滅周波数が50Hzの場合を例示している。正規化処理部511は、最大値Max及び最小値Minを求めたら、最大値Max及び最小値Minの差分(Max-Min)により正規化処理を行い、フリッカ成分について各検波枠411~416のフレーム周期性を評価する。この正規化処理により、例えば露光時間が長い場合など、フリッカによる明滅が微少な場合であっても、フリッカの周期性を精度よく検出することができる。
(Normalization processing)
As illustrated in FIG. 7, the normalization processing unit 511 obtains the maximum value Max and the minimum value Min in the luminance detection values of the past N frames including the frame of interest. Here, the case where N = 3, that is, the case where the drive frequency of the image sensor is 60 Hz and the blinking frequency of the light source is 50 Hz is illustrated. After obtaining the maximum value Max and the minimum value Min, the normalization processing unit 511 performs normalization processing based on the difference between the maximum value Max and the minimum value Min (Max−Min), and each detection frame 41 1 to 41 6 for the flicker component. Evaluate the frame periodicity. By this normalization processing, even when the flicker due to flicker is very small, for example, when the exposure time is long, the periodicity of flicker can be detected with high accuracy.
 但し、正規化処理部511は、Nフレームの輝度検波値における最大値Max及び最小値Minの差分(Max-Min)が所定の最小振幅閾値を下回る場合、フリッカによる輝度の明滅ではないと判断し、フレーム周期性の評価値を0とする。これにより、フリッカ起因ではない輝度の明滅を除外することができるため、フリッカの周期性をより精度よく検出することができる。 However, when the difference (Max−Min) between the maximum value Max and the minimum value Min in the luminance detection value of N frames is less than a predetermined minimum amplitude threshold, the normalization processing unit 511 determines that the luminance is not blinking due to flicker. The evaluation value of frame periodicity is set to 0. Thereby, since flickering of luminance that is not caused by flicker can be excluded, the periodicity of flicker can be detected with higher accuracy.
 正規化処理部511による正規化処理における注目フレームiの評価式を次式(1)に示す。
Figure JPOXMLDOC01-appb-I000001
An evaluation formula of the frame of interest i in the normalization process by the normalization processing unit 511 is shown in the following formula (1).
Figure JPOXMLDOC01-appb-I000001
 式(1)において、Xは注目フレームiの輝度検波値を表し、Maxは過去Nフレームにおける輝度検波値の最大値を表している。また、Minは過去Nフレームにおける輝度検波値の最小値を表し、aは基準振幅係数を表している。 In Expression (1), X represents the luminance detection value of the frame of interest i, and Max represents the maximum luminance detection value in the past N frames. Min represents the minimum luminance detection value in the past N frames, and a represents a reference amplitude coefficient.
(Nフレーム高周波検出)
 Nフレーム高周波検出処理部512は、輝度検波部51から取得した輝度平均値(又は、輝度積分値)を、Nポイント離散フーリエ変換(Discrete Fourier Transform;DFT)し、得られた周波数情報からNフレーム中に高周波成分が存在するか否かによって、フリッカ成分の有無を判断する。
(N frame high frequency detection)
The N-frame high-frequency detection processing unit 512 performs N-point discrete Fourier transform (DFT) on the luminance average value (or luminance integral value) acquired from the luminance detection unit 51, and generates N frames from the obtained frequency information. The presence / absence of a flicker component is determined depending on whether a high frequency component is present therein.
 離散フーリエ変換の一般式を次式(2)に示す。
Figure JPOXMLDOC01-appb-I000002
The general formula of the discrete Fourier transform is shown in the following formula (2).
Figure JPOXMLDOC01-appb-I000002
 式(2)をm=1の場合について展開し、フレーム数Nで正規化したものに対して、絶対値の自乗をとると、次式(3)となる。
Figure JPOXMLDOC01-appb-I000003
When Expression (2) is expanded for m = 1 and normalized by the number of frames N, the square of the absolute value is taken to obtain the following Expression (3).
Figure JPOXMLDOC01-appb-I000003
 Nフレーム高周波検出処理部512は、(3)式の結果を、Nフレーム中に高周波成分が存在するか否かの評価値とする。そして、Nフレーム高周波検出処理部512は、(3)式の結果(評価値)が所定の高周波判定閾値よりも大きい場合に、Nフレーム中に高周波成分が存在し、その検波枠内でフリッカ成分有りと判断する。 The N frame high frequency detection processing unit 512 sets the result of the expression (3) as an evaluation value as to whether or not a high frequency component exists in the N frame. Then, when the result (evaluation value) of the expression (3) is larger than a predetermined high frequency determination threshold, the N frame high frequency detection processing unit 512 has a high frequency component in the N frame, and the flicker component within the detection frame Judge that there is.
(Nフレーム周期性検出)
 Nフレーム高周波検出処理部512では、離散フーリエ変換によって高周波の明滅を検出できるものの、フリッカ成分のフレーム単位での周期性については考慮していない。そのため、被写体の変化をフリッカであると誤検出する懸念がある。そこで、Nフレーム周期性検出処理部513が設けられている。Nフレーム周期性検出処理部513は、Nフレーム間の輝度検波値の差分が所定の周期性判定閾値よりも小さい場合に、Nフレーム中のフリッカ成分のフレーム単位での周期性有りと判定する。
(N-frame periodicity detection)
The N-frame high-frequency detection processing unit 512 can detect high-frequency blinking by discrete Fourier transform, but does not consider the periodicity of flicker components in units of frames. Therefore, there is a concern that a change in the subject is erroneously detected as flicker. Therefore, an N frame periodicity detection processing unit 513 is provided. The N frame periodicity detection processing unit 513 determines that the flicker component in the N frame has periodicity in units of frames when the difference in the luminance detection value between the N frames is smaller than a predetermined periodicity determination threshold.
 Nフレーム周期性検出処理部513におけるNフレーム周期性検出の処理の流れを図8に示す。Nフレーム周期性検出処理部513は、Nフレーム間の輝度検波値の差分を検出し(ステップS11)、次いで、そのNフレーム間差分が所定の周期性判定閾値よりも小さいか否かを判定する(ステップS12)。 FIG. 8 shows a flow of N frame periodicity detection processing in the N frame periodicity detection processing unit 513. The N frame periodicity detection processing unit 513 detects a difference in luminance detection value between N frames (step S11), and then determines whether or not the difference between N frames is smaller than a predetermined periodicity determination threshold. (Step S12).
 そして、Nフレーム周期性検出処理部513は、Nフレーム間差分が所定の周期性判定閾値よりも小さい場合には(S12YES)、周期性判定結果を周期性有り(true)とする(ステップS13)。また、Nフレーム高周波検出処理部512は、Nフレーム間差分が所定の周期性判定閾値以上の場合には(S12のNO)、周期性判定結果を周期性無し(false)とする(ステップS14)。 Then, when the difference between N frames is smaller than the predetermined periodicity determination threshold value (S12 YES), the N frame periodicity detection processing unit 513 sets the periodicity determination result to true (true) (step S13). . Further, when the difference between N frames is equal to or greater than a predetermined periodicity determination threshold (NO in S12), the N-frame high-frequency detection processing unit 512 sets the periodicity determination result to no periodicity (false) (step S14). .
 論理積部514は、Nフレーム高周波検出処理部512及びNフレーム周期性検出処理部513の各検出結果の論理積をとる。これにより、周期検出部52は、Nフレーム高周波検出処理部512及びNフレーム周期性検出処理部513の各検出結果を基に、Nフレーム中に高周波成分が存在し、かつフリッカ成分がフレーム単位で周期性を持つとき、Nフレーム周期のフリッカ成分を検出することになる。 The logical product unit 514 calculates the logical product of the detection results of the N frame high frequency detection processing unit 512 and the N frame periodicity detection processing unit 513. Thereby, the period detection unit 52 has a high frequency component in the N frame and flicker components in units of frames based on the detection results of the N frame high frequency detection processing unit 512 and the N frame periodicity detection processing unit 513. When it has periodicity, the flicker component of the N frame period is detected.
(画面比率判定)
 画面比率判定部53は、周期検出部52による各検波枠411~416のフレーム周期性の検出結果を基に、撮像画面40全体としてのフリッカの有無を判定する。より具体的には、画面比率判定部53は、周期検出部52による各検波枠411~416のフレーム周期性の検出結果をカウントし、そのカウント合計を総検波枠数で除算してフリッカ検出比率を算出し、当該フリッカ検出比率を所定の面積比率判定閾値と比較することによってフリッカの有無を判定する。
(Screen ratio judgment)
The screen ratio determination unit 53 determines the presence or absence of flicker in the entire imaging screen 40 based on the detection result of the frame periodicity of the detection frames 41 1 to 41 6 by the cycle detection unit 52. More specifically, the screen ratio determination unit 53 counts the detection results of the frame periodicity of the detection frames 41 1 to 41 6 by the cycle detection unit 52, divides the total count by the total number of detection frames, and flickers. The detection ratio is calculated, and the presence or absence of flicker is determined by comparing the flicker detection ratio with a predetermined area ratio determination threshold.
 画面比率判定部53における画面比率判定の処理の流れを図9に示す。画面比率判定部53は、先ず、フリッカ検出枠数を算出する(ステップS21)。フリッカ検出枠数は、(フリッカ検出枠数)=Σ(各検波枠411~416の検出結果)として算出することができる。次に、画面比率判定部53は、フリッカ検出比率を算出する(ステップS22)。フリッカ検出比率は、(フリッカ検出比率)=(フリッカ検出枠数)/(総検出枠数)として算出することができる。 The flow of the screen ratio determination process in the screen ratio determination unit 53 is shown in FIG. The screen ratio determination unit 53 first calculates the number of flicker detection frames (step S21). The number of flicker detection frames can be calculated as (number of flicker detection frames) = Σ (detection results of the detection frames 41 1 to 41 6 ). Next, the screen ratio determination unit 53 calculates a flicker detection ratio (step S22). The flicker detection ratio can be calculated as (flicker detection ratio) = (number of flicker detection frames) / (total number of detection frames).
 次に、画面比率判定部53は、フリッカ検出比率が所定の面積比率判定閾値を超えるか否かを判定し(ステップS23)、フリッカ検出比率>面積比率判定閾値の場合には(S23のYES)、フリッカ検出結果をフリッカ有り(true)とする(ステップS24)。また、画面比率判定部53は、フリッカ検出比率≦面積比率判定閾値の場合には(S23のNO)、フリッカ検出結果をフリッカ無し(false)とする(ステップS25)。 Next, the screen ratio determination unit 53 determines whether or not the flicker detection ratio exceeds a predetermined area ratio determination threshold (step S23), and if flicker detection ratio> area ratio determination threshold (YES in S23). The flicker detection result is assumed to be flicker present (true) (step S24). Further, when the flicker detection ratio ≦ the area ratio determination threshold value (NO in S23), the screen ratio determination unit 53 sets the flicker detection result to “no flicker” (false) (step S25).
[バラつき除去]
 バラつき除去部54は、画面比率判定部53によるフリッカ成分の有無の判定結果のバラつき除去(チャタリング除去)を行う。具体的には、バラつき除去部54は、過去Mフレーム分(Mは任意に設定可能)の画面比率判定部53の判定結果を蓄積し、フリッカ有りの判定回数が所定のバラつき除去判定閾値以上の場合に最終判定結果をフリッカ有りとする。これにより、被写体の変化等によるフリッカの誤検出を防止することができる。
[Removal of variation]
The variation removal unit 54 performs variation removal (chattering removal) of the determination result of the presence or absence of the flicker component by the screen ratio determination unit 53. Specifically, the variation removal unit 54 accumulates the determination results of the screen ratio determination unit 53 for the past M frames (M can be arbitrarily set), and the number of determinations with flicker is equal to or greater than a predetermined variation removal determination threshold. In this case, the final judgment result is flicker. As a result, it is possible to prevent erroneous detection of flicker due to changes in the subject.
 M=8、バラつき除去判定閾値=5の場合のバラつき除去の処理例を図10に示す。case1は、光源の明滅周波数が50Hzのときのフリッカ有りの判定回数が4回、光源の明滅周波数が60Hzのときのフリッカ有りの判定回数が0回、フリッカ無しの判定回数が4回の場合の例である。case1の例では、光源の明滅周波数が50Hz及び60Hzのときのフリッカ有りの判定回数が共にバラつき除去判定閾値を下回るため、最終判定結果をフリッカ検出無しとする。 FIG. 10 shows an example of variation removal processing when M = 8 and variation removal determination threshold = 5. In case 1, the number of flicker determinations is 4 when the flicker frequency of the light source is 50 Hz, the number of flicker determinations is 0 when the light source flicker frequency is 60 Hz, and the number of determinations without flicker is 4 It is an example. In the case 1, since the number of flicker determinations when the blinking frequency of the light source is 50 Hz and 60 Hz is less than the variation removal determination threshold, the final determination result is set to no flicker detection.
 case2は、光源の明滅周波数が50Hzのときのフリッカ有りの判定回数が5回、光源の明滅周波数が60Hzのときのフリッカ有りの判定回数が0回、フリッカ無しの判定回数が3回の場合の例である。case2の例では、光源の明滅周波数が50Hzのときのフリッカ有りの判定回数がバラつき除去判定閾値以上であるため、最終判定結果を光源の明滅周波数が50Hzのときにフリッカ検出有りとする。 In case 2, the number of flicker determinations is 5 when the light source flicker frequency is 50 Hz, the flicker determination number is 0 when the light source flicker frequency is 60 Hz, and the number of flicker determinations is 3 It is an example. In the case 2 case, since the number of flicker determinations when the flicker frequency of the light source is 50 Hz is equal to or greater than the variation removal determination threshold, the final determination result is that flicker is detected when the flicker frequency of the light source is 50 Hz.
 case3は、光源の明滅周波数が50Hzのときのフリッカ有りの判定回数が3回、光源の明滅周波数が60Hzのときのフリッカ有りの判定回数が3回、フリッカ無しの判定回数が2回の場合の例である。case3の例では、光源の明滅周波数が50Hz及び60Hzのときのフリッカ有りの判定回数が共にバラつき除去判定閾値を下回るため、最終判定結果をフリッカ検出無しとする。 In case 3, the number of flicker determinations is 3 when the light source flicker frequency is 50 Hz, the number of flicker determinations is 3 when the light source flicker frequency is 60 Hz, and the number of flicker determinations is 2 It is an example. In the case 3 case, since the number of flicker determinations when the blinking frequency of the light source is 50 Hz and 60 Hz is less than the variation removal determination threshold, the final determination result is set to no flicker detection.
 case4は、光源の明滅周波数が50Hzのときのフリッカ有りの判定回数が3回、光源の明滅周波数が60Hzのときのフリッカ有りの判定回数が5回、フリッカ無しの判定回数が0回の場合の例である。case4の例では、光源の明滅周波数が60Hzのときのフリッカ有りの判定回数がバラつき除去判定閾値以上であるため、最終判定結果を光源の明滅周波数が60Hzのときにフリッカ検出有りとする。 In case 4, the number of flicker determinations is 3 when the light source flicker frequency is 50 Hz, the number of flicker determinations is 5 when the light source flicker frequency is 60 Hz, and the number of flicker determinations is 0. It is an example. In the case 4 case, since the number of flicker determinations when the flicker frequency of the light source is 60 Hz is equal to or greater than the variation removal determination threshold, the final determination result is flicker detection when the flicker frequency of the light source is 60 Hz.
 以上説明したように、第1実施形態に係る信号処理装置50では、複数の検波枠411~416について、検波枠毎に各画素の輝度を検波して得た輝度検波値を複数フレーム分用いることで、フリッカ成分について各検波枠のフレーム周期性を検出するようにしている。そして、フレーム周期性の検出結果から、フリッカ発生の有無を判定するようにしている。これにより、1画面内のフリッカ縞、即ち面内ラインフリッカが発生しない場合であっても、フリッカの発生を精度よく検出することができる。 As described above, in the signal processing device 50 according to the first embodiment, for the plurality of detection frames 41 1 to 41 6 , the luminance detection values obtained by detecting the luminance of each pixel for each detection frame are obtained for a plurality of frames. By using it, the frame periodicity of each detection frame is detected for the flicker component. The presence or absence of flicker is determined from the detection result of the frame periodicity. Thus, even when flicker fringes within one screen, that is, when in-plane line flicker does not occur, occurrence of flicker can be detected with high accuracy.
 特に、注目フレームを含む過去Nフレームの輝度検波値における最大値Max及び最小値Minを求め、差分(Max-Min)により正規化処理を行い、フリッカ成分について各検波枠411~416のフレーム周期性を評価するようにしている。この正規化処理により、例えば露光時間が長い場合など、フリッカによる明滅が微少な場合であっても、フリッカの周期性を精度よく検出することができる。 In particular, the maximum value Max and the minimum value Min in the luminance detection values of the past N frames including the frame of interest are obtained, normalization processing is performed using the difference (Max-Min), and the frames of the detection frames 41 1 to 41 6 with respect to the flicker component Periodicity is evaluated. By this normalization processing, even when the flicker due to flicker is very small, for example, when the exposure time is long, the periodicity of flicker can be detected with high accuracy.
 また、差分(Max-Min)が所定の最小振幅閾値を下回る場合、フリッカによる輝度の明滅ではないと判断し、フレーム周期性の評価値を0にするようにしている。これにより、フリッカ起因ではない輝度の明滅を除外することができるため、フリッカの周期性をより精度よく検出することができる。更に、過去Mフレーム分の画面比率の判定結果を蓄積し、フリッカ有りの判定回数が所定のバラつき除去判定閾値以上の場合に最終判定結果をフリッカ有りとするようにしている。これにより、被写体の変化等によるフリッカの誤検出を防止することができる。 Also, when the difference (Max-Min) falls below a predetermined minimum amplitude threshold, it is determined that the luminance is not flickering due to flicker, and the evaluation value of the frame periodicity is set to zero. Thereby, since flickering of luminance that is not caused by flicker can be excluded, the periodicity of flicker can be detected with higher accuracy. Further, screen ratio determination results for the past M frames are accumulated, and the final determination result is set to flicker when the number of flicker determinations is equal to or greater than a predetermined variation removal determination threshold. As a result, it is possible to prevent erroneous detection of flicker due to changes in the subject.
<第2実施形態>
 第2実施形態は、広ダイナミックレンジ(High Dynamic Range;HDR)の撮像画素部(撮像素子)に適用する場合の例である。第2実施形態に係る信号処理装置(信号処理回路)の構成の一例を図11に示す。
Second Embodiment
The second embodiment is an example when applied to an imaging pixel unit (imaging device) having a wide dynamic range (HDR). An example of the configuration of a signal processing device (signal processing circuit) according to the second embodiment is shown in FIG.
 撮像画素部21(図3参照)からは、広ダイナミックレンジ化を図るために、1つの画素について、信号電荷を長時間蓄積して得られる長時間蓄積撮像信号と、信号電荷を短時間蓄積して得られる短時間蓄積撮像信号とが出力される。そして、この長時間蓄積撮像信号と短時間蓄積撮像信号とを用いて所定の処理を行うことで、広い範囲の入射光量に対してコントラストのある撮像信号を得ることができる。 From the imaging pixel unit 21 (see FIG. 3), in order to widen the dynamic range, a long-time accumulation imaging signal obtained by accumulating signal charges for a long time and a signal charge for a short time are accumulated for one pixel. And a short-time accumulated imaging signal obtained in this way. Then, by performing predetermined processing using the long-time accumulated image signal and the short-time accumulated image signal, an image signal having a contrast with respect to a wide range of incident light amounts can be obtained.
 第2実施形態に係る信号処理装置50において、輝度検波部51は、撮像画素部21から入力される長時間蓄積撮像信号及び短時間蓄積撮像信号のそれぞれについて検波枠411~416毎に各画素の輝度を検波し、その輝度検波値を周期検出部52に与える。すなわち、輝度検波部51は、長時間蓄積撮像信号を処理する長時間蓄積用輝度検波器51Lと、短時間蓄積撮像信号を処理する短時間蓄積用輝度検波器51Sとを有する。長時間蓄積用輝度検波器51L及び短時間蓄積用輝度検波器51Sの機能については、第1実施形態の輝度検波器511~516と同じである。 In the signal processing device 50 according to the second embodiment, the luminance detection unit 51 is provided for each of the detection frames 41 1 to 41 6 for each of the long-time accumulation imaging signal and the short-time accumulation imaging signal input from the imaging pixel unit 21. The luminance of the pixel is detected, and the luminance detection value is given to the period detection unit 52. That is, the luminance detection unit 51 includes a long-time accumulation luminance detector 51 L that processes a long-time accumulation imaging signal and a short-time accumulation luminance detector 51 S that processes a short-time accumulation imaging signal. The function of the long-time accumulation luminance detector 51 L and short accumulation luminance detector 51 S is the same as the brightness detector 51 1-51 6 in the first embodiment.
 周期検出部52も輝度検波部51に対応して、長時間蓄積用フリッカ検出器52Lと短時間蓄積用フリッカ検出器52Sとを有する。長時間蓄積用フリッカ検出器52L及び短時間蓄積用フリッカ検出器52Sの機能については、第1実施形態のNフレーム周期フリッカ検出器521~526と同じである。図11では、第1実施形態の画面比率判定部53及びバラつき除去部54の図示を省略している。 The period detector 52 also has a long-time accumulation flicker detector 52 L and a short-time accumulation flicker detector 52 S corresponding to the luminance detector 51. The function of the long-time accumulation flicker detector 52 L and short storage flicker detector 52 S is the same as the N-frame period flicker detector 52 1-52 6 in the first embodiment. In FIG. 11, the screen ratio determination unit 53 and the variation removal unit 54 of the first embodiment are not shown.
 長時間蓄積用フリッカ検出器52Lによる長時間蓄積フリッカ検出結果、及び、短時間蓄積用フリッカ検出器52Sによる短時間蓄積用フリッカ検出結果に対する処理については種々考えられる。一例として、短時間蓄積用フリッカ検出器52Sからのみフリッカ検出結果が出力されたときは、短時間蓄積側についてのみフリッカが発生しないように制御を行う処理などを例示することができる。 Various processes can be considered for the long-time accumulation flicker detection result by the long-time accumulation flicker detector 52 L and the short-time accumulation flicker detection result by the short-time accumulation flicker detector 52 S. As an example, when a flicker detection result is output only from the short-time accumulation flicker detector 52 S , a process of performing control so that flicker does not occur only on the short-time accumulation side can be exemplified.
 上述した第2実施形態に係る信号処理装置50にあっても、第1実施形態に係る信号処理装置50と同様の作用、効果を得ることができる。すなわち、1画面内のフリッカ縞、即ち面内ラインフリッカが発生しない場合であっても、フリッカの発生を精度よく検出することができる。また、フリッカによる明滅が微少な場合であっても、フリッカの周期性を精度よく検出することができるとともに、被写体の変化等によるフリッカの誤検出を防止することができる。 Even in the signal processing device 50 according to the second embodiment described above, the same operations and effects as those of the signal processing device 50 according to the first embodiment can be obtained. That is, even when flicker stripes within one screen, that is, in-plane line flicker does not occur, the occurrence of flicker can be detected with high accuracy. Further, even when flicker due to flicker is small, it is possible to accurately detect flicker periodicity and to prevent false detection of flicker due to changes in the subject.
<本開示の撮像装置>
 本開示の撮像装置のシステム構成の一例を図12に示す。本開示の撮像装置1は、センサ部60、アナログ信号処理回路70、及び、デジタル信号処理回路80を備える構成となっている。センサ部60は、図3の撮像画素部21に相当する。アナログ信号処理回路70は、信号増幅部71及びA/D変換部72を有する。信号増幅部71は、撮像画素部21で得られるアナログの撮像信号を増幅する処理を行う。A/D変換部72は、図2のA/D変換部23に相当し、信号増幅部71から出力されるアナログの撮像信号をデジタルの撮像信号に変換する処理を行う。
<Imaging Device of the Present Disclosure>
An example of the system configuration of the imaging apparatus of the present disclosure is illustrated in FIG. The imaging device 1 according to the present disclosure includes a sensor unit 60, an analog signal processing circuit 70, and a digital signal processing circuit 80. The sensor unit 60 corresponds to the imaging pixel unit 21 in FIG. The analog signal processing circuit 70 includes a signal amplification unit 71 and an A / D conversion unit 72. The signal amplifying unit 71 performs processing for amplifying an analog imaging signal obtained by the imaging pixel unit 21. The A / D conversion unit 72 corresponds to the A / D conversion unit 23 in FIG. 2, and performs a process of converting an analog imaging signal output from the signal amplification unit 71 into a digital imaging signal.
 デジタル信号処理回路80は、第1実施形態又は第2実施形態に係る信号処理装置(回路)50の機能、即ち、フリッカを検出する機能と、その検出結果に基づいて撮像画素部21、信号増幅部71、及び、A/D変換部72を制御する機能とを備えている。具体的には、デジタル信号処理回路80は、輝度検波部81、フリッカ検出部82、露光制御部83、駆動回路制御部84、及び、駆動回路部85を有している。 The digital signal processing circuit 80 includes the function of the signal processing device (circuit) 50 according to the first embodiment or the second embodiment, that is, the function of detecting flicker, and the imaging pixel unit 21 and the signal amplification based on the detection result. And a function of controlling the A / D converter 72. Specifically, the digital signal processing circuit 80 includes a luminance detection unit 81, a flicker detection unit 82, an exposure control unit 83, a drive circuit control unit 84, and a drive circuit unit 85.
 このデジタル信号処理回路80において、輝度検波部81は、第1実施形態又は第2実施形態の輝度検波部51から成り、撮像画面40(図5参照)の複数の検波枠411~416について、撮像信号に基づいて検波枠毎に各画素の輝度を検波し、その輝度検波値をフリッカ検出部82に与える。フリッカ検出部82は、第1実施形態又は第2実施形態の周期検出部52、画面比率判定部53、及び、バラつき除去部54から成り、輝度検波部81から与えられる輝度検波値を基にフリッカの有/無を検出し、その検出結果を露光制御部83に与える。 In the digital signal processing circuit 80, the luminance detection unit 81 includes the luminance detection unit 51 of the first embodiment or the second embodiment, and a plurality of detection frames 41 1 to 41 6 of the imaging screen 40 (see FIG. 5). Then, the luminance of each pixel is detected for each detection frame based on the imaging signal, and the luminance detection value is given to the flicker detection unit 82. The flicker detection unit 82 includes the period detection unit 52, the screen ratio determination unit 53, and the variation removal unit 54 of the first or second embodiment, and flicker based on the luminance detection value provided from the luminance detection unit 81. The presence / absence of presence / absence is detected and the detection result is given to the exposure control unit 83.
 露光制御部83は、フリッカ検出部82の検出結果を基に、撮像画素部21の信号電荷の蓄積時間及び信号増幅部71のゲイン値を設定する。具体的には、露光制御部83は、例えば、フリッカ検出部82の検出結果がフリッカ有りのとき、50Hz光源の場合、n/100秒の蓄積時間に設定し、60Hz光源の場合、n/120秒の蓄積時間に設定する。駆動回路制御部84は、露光制御部83で設定された蓄積時間及びゲイン値を基に、駆動回路部85を介して撮像画素部21、信号増幅部71、及び、A/D変換部72を駆動する。 The exposure control unit 83 sets the signal charge accumulation time of the imaging pixel unit 21 and the gain value of the signal amplification unit 71 based on the detection result of the flicker detection unit 82. Specifically, for example, when the detection result of the flicker detection unit 82 is flicker, the exposure control unit 83 sets an accumulation time of n / 100 seconds for a 50 Hz light source, and n / 120 for a 60 Hz light source. Set the accumulation time in seconds. The drive circuit control unit 84 controls the imaging pixel unit 21, the signal amplification unit 71, and the A / D conversion unit 72 via the drive circuit unit 85 based on the accumulation time and gain value set by the exposure control unit 83. To drive.
 先述したように、第1実施形態又は第2実施形態に係る信号処理装置50によれば、1画面内のフリッカ縞、即ち面内ラインフリッカが発生しない場合であっても、フリッカの発生を精度よく検出することができる。従って、第1実施形態又は第2実施形態に係る信号処理装置50の機能を有するデジタル信号処理回路80を備える本開示の撮像装置1によれば、フリッカ発生の精度のよい検出の下に、フリッカの無い、高画質の画像を得ることができる。 As described above, according to the signal processing device 50 according to the first embodiment or the second embodiment, even if flicker fringes in one screen, that is, in-plane line flicker does not occur, occurrence of flicker is accurate. Can be detected well. Therefore, according to the imaging device 1 of the present disclosure including the digital signal processing circuit 80 having the function of the signal processing device 50 according to the first embodiment or the second embodiment, the flicker is detected with high accuracy of occurrence of flicker. It is possible to obtain a high-quality image without any image.
 尚、図12に示すシステム構成では、センサ部60を含む撮像素子の内部に、アナログ信号処理回路70と共にデジタル信号処理回路80を内蔵するシステム構成を想定しているが、このシステム構成に限られるものではない。すなわち、センサ部60及びアナログ信号処理回路70を含む撮像素子の外部に、デジタル信号処理回路80を設けるシステム構成を採ることもできる。 The system configuration shown in FIG. 12 assumes a system configuration in which the digital signal processing circuit 80 is built in together with the analog signal processing circuit 70 inside the image sensor including the sensor unit 60, but is limited to this system configuration. It is not a thing. That is, a system configuration in which the digital signal processing circuit 80 is provided outside the imaging device including the sensor unit 60 and the analog signal processing circuit 70 can also be adopted.
 本開示の撮像装置1は、デジタルスチルカメラやビデオカメラ等の撮像装置として用いることができる。更に、本開示の撮像装置1は、カメラ以外にも、携帯電話機やスマートフォンなどの撮像機能を有する種々の電子機器において、その撮像部として用いることができる。 The imaging device 1 of the present disclosure can be used as an imaging device such as a digital still camera or a video camera. Furthermore, the imaging device 1 of the present disclosure can be used as an imaging unit in various electronic devices having an imaging function such as a mobile phone and a smartphone in addition to the camera.
<変形例>
 以上、本開示を好ましい実施形態に基づき説明したが、本開示はこれらの実施形態に限定されるものではない。上記の各実施形態において説明した撮像素子の構成、構造は例示であり、適宜、変更することができる。例えば、疑似グローバルシャッタ方式の撮像素子(撮像画素部)に適用した場合を例に挙げて説明したが、グローバルシャッタ方式の撮像素子に対しても適用可能である。また、検出枠の分割数を、疑似グローバルシャッタ方式の場合よりも多く設定すれば、ローリングシャッタ方式の撮像素子に対しても適用可能である。
<Modification>
Although the present disclosure has been described based on the preferred embodiments, the present disclosure is not limited to these embodiments. The configuration and structure of the image sensor described in each of the above embodiments are examples, and can be changed as appropriate. For example, the case where the present invention is applied to a pseudo-global shutter type imaging device (imaging pixel unit) has been described as an example, but the present invention can also be applied to a global shutter type imaging device. In addition, if the number of detection frame divisions is set to be larger than that in the case of the pseudo global shutter system, the present invention can also be applied to a rolling shutter system image sensor.
 また、上記の各実施形態では、撮像画素部が形成された画素基板、メモリ部が形成されたメモリ基板、及び、信号処理回路が形成された回路基板が積層された3層の積層構造の撮像素子に適用した場合を例に挙げて説明したが、3層の積層構造への適用に限られるものではない。例えば、メモリ基板を省略し、メモリ部を回路基板に形成する2層構造に適用することも可能である。更には、積層構造に限らず、画素基板上に撮像画素部と共にメモリ部及び信号処理回路を形成した、所謂、平置構造に適用することも可能である。 Further, in each of the above embodiments, the imaging of a three-layer structure in which the pixel substrate on which the imaging pixel unit is formed, the memory substrate on which the memory unit is formed, and the circuit substrate on which the signal processing circuit is formed is stacked. Although the case where it applied to the element was mentioned as an example and demonstrated, it is not restricted to application to a laminated structure of 3 layers. For example, the present invention can be applied to a two-layer structure in which the memory substrate is omitted and the memory portion is formed on the circuit board. Furthermore, the present invention is not limited to a stacked structure, and can be applied to a so-called flat structure in which a memory portion and a signal processing circuit are formed together with an imaging pixel portion on a pixel substrate.
 また、本開示の技術は、白黒の撮像素子やベイヤー配列の撮像素子など、撮像素子のフォーマットによらず適用可能である。さらに、上記の各実施形態では、輝度を検波する場合を例示したが、カラー対応の撮像素子において、構成の簡略化のために、例えば緑色の画素の情報のみを検波する構成を採ることも可能である。 In addition, the technology of the present disclosure can be applied regardless of the format of the image sensor such as a monochrome image sensor or a Bayer array image sensor. Furthermore, in each of the above-described embodiments, the case where luminance is detected has been exemplified. However, in order to simplify the configuration of the color-capable imaging device, for example, a configuration in which only information on green pixels is detected may be employed. It is.
<本開示の構成>
 尚、本開示は、以下のような構成をとることもできる。
[1]撮像画面を垂直走査向に分割して設定した複数の検波枠について、撮像信号に基づいて検波枠毎に各画素の輝度を検波する輝度検波部、
 輝度検波部で得られる輝度検波値を複数フレーム分用いてフリッカ成分について各検波枠のフレーム周期性を検出する周期検出部、及び、
 周期検出部によるフレーム周期性の検出結果に基づいて、フリッカの有無を判定する判定部、
 を備える信号処理装置。
[2]輝度検波値は、検波枠毎に各画素の輝度情報を積算した輝度積分値、又は、当該輝度積分値を1画素単位で平均化した輝度平均値である、
 上記[1]に記載の信号処理装置。
[3]複数フレームは、注目フレームを含む過去Nフレーム(Nは、撮像素子の駆動周波数及び光源の明滅周波数で決まる値)であり、
 周期検出部は、Nフレームの輝度検波値における最大値及び最小値を求め、最大値及び最小値の差分により正規化処理を行い、フリッカ成分について各検波枠のフレーム周期性を評価する、
 上記[1]又は[2]に記載の信号処理装置。
[4]周期検出部は、Nフレームの輝度検波値における最大値及び最小値の差分が所定の最小振幅閾値を下回る場合、フレーム周期性の評価値を0とする、
 上記[3]に記載の信号処理装置。
[5]周期検出部は、
 Nフレーム中に高周波成分が存在するか否かを検出する高周波検出処理部、及び、
 Nフレーム間の輝度検波値の差分に基づいて、Nフレーム中のフリッカ成分のフレーム単位での周期性を検出する周期性検出処理部を有する、
 上記[1]乃至[4]のいずれかに記載の信号処理装置。
[6]周期検出部は、高周波検出処理部及び周期性検出処理部の各検出結果を基に、Nフレーム中に高周波成分が存在し、かつフリッカ成分がフレーム単位で周期性を持つとき、Nフレーム周期のフリッカ成分を検出する、
 上記[5]に記載の信号処理装置。
[7]高周波検出処理部は、輝度検波値を離散フーリエ変換し、得られた周波数情報から撮像信号に高周波成分が存在するか否かによってフリッカ成分の有無を判断する、
 上記[5]又は[6]に記載の信号処理装置。
[8]周期性検出処理部は、Nフレーム間の輝度検波値の差分が所定の周期性判定閾値よりも小さい場合に、Nフレーム中のフリッカ成分のフレーム単位での周期性有りと判定する、
 上記[5]又は[6]に記載の信号処理装置。
[9]判定部は、周期検出部による各検波枠のフレーム周期性の検出結果を基に、画面全体としてのフリッカ成分の有無を判定する、
 上記[1]乃至[8]のいずれかに記載の信号処理装置。
[10]判定部は、周期検出部による各検波枠のフレーム周期性の検出結果をカウントし、そのカウント合計を総検波枠数で除算してフリッカ検出比率を算出し、当該フリッカ検出比率を所定の面積比率判定閾値と比較することによってフリッカの有無を判定する、
 上記[9]に記載の信号処理装置。
[11]判定部による各フレームにおけるフリッカの有無の判定結果を蓄積し、判定結果のバラつきを除去して最終判定結果とするバラつき除去部を備える、
 上記[1]乃至[10]のいずれかに記載の信号処理装置。
[12]バラつき除去部は、判定部による過去Mフレーム分の判定結果を蓄積し、フリッカ有りの判定回数が所定のバラつき除去判定閾値以上の場合に最終判定結果をフリッカ有りとする、
 上記[11]に記載の信号処理装置。
[13]1つの画素について、信号電荷を長時間蓄積して得られる長時間蓄積撮像信号と、信号電荷を短時間蓄積して得られる短時間蓄積撮像信号とが輝度検波部に入力されるとき、
 輝度検波部は、長時間蓄積撮像信号及び短時間蓄積撮像信号のそれぞれについて検波枠毎に各画素の輝度を検波し、その輝度検波値を周期検出部に与える、
 上記[1]乃至[12]のいずれかに記載の信号処理装置。
[14]撮像画面を垂直走査向に分割して設定した複数の検波枠について、撮像信号に基づいて検波枠毎に各画素の輝度を検波し、
 その輝度検波値を複数フレーム分用いてフリッカ成分について各検波枠のフレーム周期性を検出し、
 フレーム周期性の検出結果に基づいて、フリッカの有無を判定する、
 信号処理方法。
[15]撮像画素部、及び、
 撮像画素部から出力される撮像信号を処理する信号処理回路、
 を備えており、
 信号処理回路は、
 撮像画面を垂直走査向に分割して設定した複数の検波枠について、撮像信号に基づいて検波枠毎に各画素の輝度を検波する輝度検波部、
 輝度検波部で得られる輝度検波値を複数フレーム分用いてフリッカ成分について各検波枠のフレーム周期性を検出する周期検出部、及び、
 周期検出部によるフレーム周期性の検出結果に基づいて、フリッカの有無を判定する判定部を有する、
 撮像装置。
[16]撮像画素部は、CMOSセンサから成る、
 上記[15]に記載の撮像装置。
[17]撮像画素部が形成された画素基板、及び、
 信号処理回路が形成された回路基板が積層されており、
 画素基板と回路基板との間には、撮像画素部から出力される撮像信号を一旦格納するメモリ部が形成されたメモリ基板が設けられている、
 上記[16]に記載の撮像装置。
[18]明るさが周期的に変動する光源環境下において、ローリングシャッタ方式での読み出し時間よりも短い読み出し時間で撮像画素部からメモリ部へ撮像信号を読み出す、
 上記[17]に記載の撮像装置。
[19]光源の明滅周期よりも短い読み出し時間で撮像画素部からメモリ部へ撮像信号を読み出す、
 上記[18]に記載の撮像装置。
[20]撮像画素部は、1つの画素について、信号電荷の蓄積時間が長い長時間蓄積撮像信号と、信号電荷の蓄積時間が短い短時間蓄積撮像信号とを信号処理回路に供給する、
 上記[15]乃至[19]のいずれかに記載の撮像装置。
<Configuration of the present disclosure>
In addition, this indication can also take the following structures.
[1] A luminance detection unit that detects the luminance of each pixel for each detection frame based on the imaging signal for a plurality of detection frames set by dividing the imaging screen in the vertical scanning direction;
A period detection unit that detects the frame periodicity of each detection frame for flicker components using the luminance detection values obtained by the luminance detection unit for a plurality of frames; and
A determination unit that determines the presence or absence of flicker based on the detection result of the frame periodicity by the cycle detection unit,
A signal processing apparatus comprising:
[2] The luminance detection value is a luminance integrated value obtained by integrating the luminance information of each pixel for each detection frame, or a luminance average value obtained by averaging the luminance integrated value in units of one pixel.
The signal processing device according to [1] above.
[3] The plurality of frames are the past N frames (N is a value determined by the driving frequency of the image sensor and the blinking frequency of the light source) including the frame of interest.
The period detection unit obtains a maximum value and a minimum value in luminance detection values of N frames, performs a normalization process based on a difference between the maximum value and the minimum value, and evaluates the frame periodicity of each detection frame with respect to a flicker component.
The signal processing device according to [1] or [2].
[4] The period detection unit sets the evaluation value of the frame periodicity to 0 when the difference between the maximum value and the minimum value in the luminance detection values of N frames is lower than a predetermined minimum amplitude threshold value.
The signal processing device according to [3] above.
[5] The period detector
A high-frequency detection processing unit that detects whether or not a high-frequency component exists in the N frame; and
A periodicity detection processing unit that detects the periodicity of the flicker component in the N frame in units of frames based on a difference in luminance detection values between the N frames;
The signal processing device according to any one of [1] to [4].
[6] The period detection unit is configured such that, based on the detection results of the high-frequency detection processing unit and the periodicity detection processing unit, a high-frequency component exists in N frames and the flicker component has periodicity in units of frames. Detect flicker component of frame period,
The signal processing device according to [5] above.
[7] The high frequency detection processing unit performs discrete Fourier transform on the luminance detection value, and determines the presence or absence of a flicker component based on whether or not a high frequency component exists in the imaging signal from the obtained frequency information.
The signal processing device according to [5] or [6] above.
[8] The periodicity detection processing unit determines that the flicker component in the N frame has periodicity in units of frames when the difference in luminance detection value between the N frames is smaller than a predetermined periodicity determination threshold.
The signal processing device according to [5] or [6] above.
[9] The determination unit determines the presence or absence of a flicker component as a whole screen based on the detection result of the frame periodicity of each detection frame by the cycle detection unit.
The signal processing device according to any one of [1] to [8].
[10] The determination unit counts the detection result of the frame periodicity of each detection frame by the cycle detection unit, calculates the flicker detection ratio by dividing the total count by the total number of detection frames, and sets the flicker detection ratio to a predetermined value. The presence or absence of flicker is determined by comparing with the area ratio determination threshold of
The signal processing device according to [9] above.
[11] A variation removal unit that accumulates the determination results of the presence or absence of flicker in each frame by the determination unit and removes variations in the determination results to obtain a final determination result.
The signal processing device according to any one of [1] to [10].
[12] The variation removal unit accumulates the determination results for the past M frames by the determination unit, and sets the final determination result to flicker when the number of flicker determinations is equal to or greater than a predetermined variation removal determination threshold.
The signal processing device according to [11] above.
[13] When a long-time accumulation imaging signal obtained by accumulating signal charges for a long time and a short-time accumulation imaging signal obtained by accumulating signal charges for a short time are input to the luminance detection unit for one pixel ,
The luminance detection unit detects the luminance of each pixel for each detection frame for each of the long-time accumulation imaging signal and the short-time accumulation imaging signal, and gives the luminance detection value to the period detection unit.
The signal processing device according to any one of [1] to [12].
[14] For a plurality of detection frames set by dividing the imaging screen in the vertical scanning direction, the luminance of each pixel is detected for each detection frame based on the imaging signal;
Detect the frame periodicity of each detection frame for flicker components using the luminance detection value for multiple frames,
The presence or absence of flicker is determined based on the detection result of the frame periodicity.
Signal processing method.
[15] An imaging pixel unit, and
A signal processing circuit for processing an imaging signal output from the imaging pixel unit;
With
The signal processing circuit
For a plurality of detection frames set by dividing the imaging screen in the vertical scanning direction, a luminance detection unit that detects the luminance of each pixel for each detection frame based on the imaging signal,
A period detection unit that detects the frame periodicity of each detection frame for flicker components using the luminance detection values obtained by the luminance detection unit for a plurality of frames; and
A determination unit that determines the presence or absence of flicker based on the detection result of the frame periodicity by the cycle detection unit;
Imaging device.
[16] The imaging pixel unit is composed of a CMOS sensor.
The imaging device according to [15] above.
[17] A pixel substrate on which an imaging pixel portion is formed, and
The circuit board on which the signal processing circuit is formed is laminated,
Between the pixel substrate and the circuit board, there is provided a memory substrate in which a memory unit for temporarily storing an imaging signal output from the imaging pixel unit is formed.
The imaging device according to [16] above.
[18] Under a light source environment in which brightness periodically varies, an imaging signal is read from the imaging pixel unit to the memory unit with a readout time shorter than the readout time in the rolling shutter system.
The imaging device according to [17] above.
[19] Read an imaging signal from the imaging pixel unit to the memory unit with a readout time shorter than the blinking cycle of the light source.
The imaging device according to [18] above.
[20] The imaging pixel unit supplies, for each pixel, a long-time accumulation imaging signal with a long signal charge accumulation time and a short-time accumulation imaging signal with a short signal charge accumulation time to the signal processing circuit.
The imaging device according to any one of [15] to [19].
 1・・・撮像装置、10・・・撮像素子、11,12,13・・・半導体基板、21・・・撮像画素部、22・・・メモリ部、23・・・A/D変換部、24・・・ロジック回路、25・・・信号線、30・・・画素、31・・・フォトダイオード(光電変換素子)、32・・・転送トランジスタ、33・・・リセットトランジスタ、34・・・増幅トランジスタ、35・・・選択トランジスタ、40・・・撮像画面、411~416・・・検波枠、50・・・信号処理装置(信号処理回路)、51・・・輝度検波部、52・・・周期検出部、53・・・画面比率判定部、54・・・バラつき除去部、60・・・センサ部、70・・・アナログ信号処理回路、80・・・デジタル信号処理回路、511・・・正規化処理部、512・・・Nフレーム高周波検出処理部、513・・・Nフレーム周期性検出処理部、514・・・論理積部 DESCRIPTION OF SYMBOLS 1 ... Imaging device, 10 ... Imaging element, 11, 12, 13 ... Semiconductor substrate, 21 ... Imaging pixel part, 22 ... Memory part, 23 ... A / D conversion part, 24 ... logic circuit, 25 ... signal line, 30 ... pixel, 31 ... photodiode (photoelectric conversion element), 32 ... transfer transistor, 33 ... reset transistor, 34 ... Amplifying transistor, 35 ... select transistor, 40 ... imaging screen, 41 1 to 41 6 ... detection frame, 50 ... signal processing device (signal processing circuit), 51 ... luminance detection unit, 52 ... Period detection unit, 53 ... Screen ratio determination unit, 54 ... Variance removal unit, 60 ... Sensor unit, 70 ... Analog signal processing circuit, 80 ... Digital signal processing circuit, 511 ... Normalization processing unit, 512 ... N Over beam frequency detection processing section, 513 ... N frame periodicity detection processing section, 514 ... logical unit

Claims (20)

  1.  撮像画面を垂直走査向に分割して設定した複数の検波枠について、撮像信号に基づいて検波枠毎に各画素の輝度を検波する輝度検波部、
     輝度検波部で得られる輝度検波値を複数フレーム分用いてフリッカ成分について各検波枠のフレーム周期性を検出する周期検出部、及び、
     周期検出部によるフレーム周期性の検出結果に基づいて、フリッカの有無を判定する判定部、
     を備える信号処理装置。
    For a plurality of detection frames set by dividing the imaging screen in the vertical scanning direction, a luminance detection unit that detects the luminance of each pixel for each detection frame based on the imaging signal,
    A period detection unit that detects the frame periodicity of each detection frame for flicker components using the luminance detection values obtained by the luminance detection unit for a plurality of frames; and
    A determination unit that determines the presence or absence of flicker based on the detection result of the frame periodicity by the cycle detection unit,
    A signal processing apparatus comprising:
  2.  輝度検波値は、検波枠毎に各画素の輝度情報を積算した輝度積分値、又は、当該輝度積分値を1画素単位で平均化した輝度平均値である、
     請求項1に記載の信号処理装置。
    The luminance detection value is a luminance integrated value obtained by integrating the luminance information of each pixel for each detection frame, or a luminance average value obtained by averaging the luminance integrated value in units of one pixel.
    The signal processing apparatus according to claim 1.
  3.  複数フレームは、注目フレームを含む過去Nフレーム(Nは、撮像素子の駆動周波数及び光源の明滅周波数で決まる値)であり、
     周期検出部は、Nフレームの輝度検波値における最大値及び最小値を求め、最大値及び最小値の差分により正規化処理を行い、フリッカ成分について各検波枠のフレーム周期性を評価する、
     請求項1に記載の信号処理装置。
    The plurality of frames are the past N frames including the frame of interest (N is a value determined by the drive frequency of the image sensor and the blinking frequency of the light source),
    The period detection unit obtains a maximum value and a minimum value in luminance detection values of N frames, performs a normalization process based on a difference between the maximum value and the minimum value, and evaluates the frame periodicity of each detection frame with respect to a flicker component.
    The signal processing apparatus according to claim 1.
  4.  周期検出部は、Nフレームの輝度検波値における最大値及び最小値の差分が所定の最小振幅閾値を下回る場合、フレーム周期性の評価値を0とする、
     請求項3に記載の信号処理装置。
    The period detection unit sets the evaluation value of the frame periodicity to 0 when the difference between the maximum value and the minimum value in the luminance detection values of N frames is lower than a predetermined minimum amplitude threshold value.
    The signal processing apparatus according to claim 3.
  5.  周期検出部は、
     Nフレーム中に高周波成分が存在するか否かを検出する高周波検出処理部、及び、
     Nフレーム間の輝度検波値の差分に基づいて、Nフレーム中のフリッカ成分のフレーム単位での周期性を検出する周期性検出処理部を有する、
     請求項1に記載の信号処理装置。
    The period detector
    A high-frequency detection processing unit that detects whether or not a high-frequency component exists in the N frame; and
    A periodicity detection processing unit that detects the periodicity of the flicker component in the N frame in units of frames based on a difference in luminance detection values between the N frames;
    The signal processing apparatus according to claim 1.
  6.  周期検出部は、高周波検出処理部及び周期性検出処理部の各検出結果を基に、Nフレーム中に高周波成分が存在し、かつフリッカ成分がフレーム単位で周期性を持つとき、Nフレーム周期のフリッカ成分を検出する、
     請求項5に記載の信号処理装置。
    Based on the detection results of the high-frequency detection processing unit and the periodicity detection processing unit, the period detection unit has a high-frequency component in N frames and the flicker component has periodicity in units of frames. Detect flicker components,
    The signal processing apparatus according to claim 5.
  7.  高周波検出処理部は、輝度検波値を離散フーリエ変換し、得られた周波数情報から撮像信号に高周波成分が存在するか否かによってフリッカ成分の有無を判断する、
     請求項5に記載の信号処理装置。
    The high frequency detection processing unit performs discrete Fourier transform on the luminance detection value, and determines the presence or absence of a flicker component based on whether or not a high frequency component exists in the imaging signal from the obtained frequency information.
    The signal processing apparatus according to claim 5.
  8.  周期性検出処理部は、Nフレーム間の輝度検波値の差分が所定の周期性判定閾値よりも小さい場合に、Nフレーム中のフリッカ成分のフレーム単位での周期性有りと判定する、
     請求項5に記載の信号処理装置。
    The periodicity detection processing unit determines that the flicker component in the N frame has periodicity in units of frames when the difference in the luminance detection value between the N frames is smaller than a predetermined periodicity determination threshold.
    The signal processing apparatus according to claim 5.
  9.  判定部は、周期検出部による各検波枠のフレーム周期性の検出結果を基に、画面全体としてのフリッカ成分の有無を判定する、
     請求項1に記載の信号処理装置。
    The determination unit determines the presence or absence of a flicker component as a whole screen based on the detection result of the frame periodicity of each detection frame by the cycle detection unit.
    The signal processing apparatus according to claim 1.
  10.  判定部は、周期検出部による各検波枠のフレーム周期性の検出結果をカウントし、そのカウント合計を総検波枠数で除算してフリッカ検出比率を算出し、当該フリッカ検出比率を所定の面積比率判定閾値と比較することによってフリッカの有無を判定する、
     請求項9に記載の信号処理装置。
    The determination unit counts the detection result of the frame periodicity of each detection frame by the period detection unit, calculates the flicker detection ratio by dividing the total count by the total number of detection frames, and calculates the flicker detection ratio to a predetermined area ratio. The presence or absence of flicker is determined by comparing with a determination threshold value.
    The signal processing apparatus according to claim 9.
  11.  判定部による各フレームにおけるフリッカの有無の判定結果を蓄積し、判定結果のバラつきを除去して最終判定結果とするバラつき除去部を備える、
     請求項1に記載の信号処理装置。
    The determination unit accumulates the determination result of the presence or absence of flicker in each frame, and includes a variation removal unit that removes variation in the determination result and sets it as a final determination result.
    The signal processing apparatus according to claim 1.
  12.  バラつき除去部は、判定部による過去Mフレーム分の判定結果を蓄積し、フリッカ有りの判定回数が所定のバラつき除去判定閾値以上の場合に最終判定結果をフリッカ有りとする、
     請求項11に記載の信号処理装置。
    The variation removal unit accumulates the determination results for the past M frames by the determination unit, and sets the final determination result to flicker when the number of determinations with flicker is equal to or greater than a predetermined variation removal determination threshold.
    The signal processing apparatus according to claim 11.
  13.  1つの画素について、信号電荷を長時間蓄積して得られる長時間蓄積撮像信号と、信号電荷を短時間蓄積して得られる短時間蓄積撮像信号とが輝度検波部に入力されるとき、
     輝度検波部は、長時間蓄積撮像信号及び短時間蓄積撮像信号のそれぞれについて検波枠毎に各画素の輝度を検波し、その輝度検波値を周期検出部に与える、
     請求項1に記載の信号処理装置。
    When a long-time accumulation imaging signal obtained by accumulating signal charges for a long time and a short-time accumulation imaging signal obtained by accumulating signal charges for a short time are input to the luminance detection unit for one pixel,
    The luminance detection unit detects the luminance of each pixel for each detection frame for each of the long-time accumulation imaging signal and the short-time accumulation imaging signal, and gives the luminance detection value to the period detection unit.
    The signal processing apparatus according to claim 1.
  14.  撮像画面を垂直走査向に分割して設定した複数の検波枠について、撮像信号に基づいて検波枠毎に各画素の輝度を検波し、
     その輝度検波値を複数フレーム分用いてフリッカ成分について各検波枠のフレーム周期性を検出し、
     フレーム周期性の検出結果に基づいて、フリッカの有無を判定する、
     信号処理方法。
    For a plurality of detection frames set by dividing the imaging screen in the vertical scanning direction, the luminance of each pixel is detected for each detection frame based on the imaging signal,
    Detect the frame periodicity of each detection frame for flicker components using the luminance detection value for multiple frames,
    The presence or absence of flicker is determined based on the detection result of the frame periodicity.
    Signal processing method.
  15.  撮像画素部、及び、
     撮像画素部から出力される撮像信号を処理する信号処理回路、
     を備えており、
     信号処理回路は、
     撮像画面を垂直走査向に分割して設定した複数の検波枠について、撮像信号に基づいて検波枠毎に各画素の輝度を検波する輝度検波部、
     輝度検波部で得られる輝度検波値を複数フレーム分用いてフリッカ成分について各検波枠のフレーム周期性を検出する周期検出部、及び、
     周期検出部によるフレーム周期性の検出結果に基づいて、フリッカの有無を判定する判定部を有する、
     撮像装置。
    An imaging pixel unit, and
    A signal processing circuit for processing an imaging signal output from the imaging pixel unit;
    With
    The signal processing circuit
    For a plurality of detection frames set by dividing the imaging screen in the vertical scanning direction, a luminance detection unit that detects the luminance of each pixel for each detection frame based on the imaging signal,
    A period detection unit that detects the frame periodicity of each detection frame for flicker components using the luminance detection values obtained by the luminance detection unit for a plurality of frames; and
    A determination unit that determines the presence or absence of flicker based on the detection result of the frame periodicity by the cycle detection unit;
    Imaging device.
  16.  撮像画素部は、CMOSセンサから成る、
     請求項15に記載の撮像装置。
    The imaging pixel unit is composed of a CMOS sensor.
    The imaging device according to claim 15.
  17.  撮像画素部が形成された画素基板、及び、
     信号処理回路が形成された回路基板が積層されており、
     画素基板と回路基板との間には、撮像画素部から出力される撮像信号を一旦格納するメモリ部が形成されたメモリ基板が設けられている、
     請求項16に記載の撮像装置。
    A pixel substrate on which an imaging pixel unit is formed; and
    The circuit board on which the signal processing circuit is formed is laminated,
    Between the pixel substrate and the circuit board, there is provided a memory substrate in which a memory unit for temporarily storing an imaging signal output from the imaging pixel unit is formed.
    The imaging device according to claim 16.
  18.  明るさが周期的に変動する光源環境下において、ローリングシャッタ方式での読み出し時間よりも短い読み出し時間で撮像画素部からメモリ部へ撮像信号を読み出す、
     請求項17に記載の撮像装置。
    In a light source environment in which brightness varies periodically, an imaging signal is read from the imaging pixel unit to the memory unit with a readout time shorter than the readout time in the rolling shutter method.
    The imaging device according to claim 17.
  19.  光源の明滅周期よりも短い読み出し時間で撮像画素部からメモリ部へ撮像信号を読み出す、
     請求項18に記載の撮像装置。
    Reading the imaging signal from the imaging pixel unit to the memory unit with a readout time shorter than the blinking cycle of the light source,
    The imaging device according to claim 18.
  20.  撮像画素部は、1つの画素について、信号電荷を長時間蓄積して得られる長時間蓄積撮像信号と、信号電荷を短時間蓄積して得られる短時間蓄積撮像信号とを信号処理回路に供給する、
     請求項15に記載の撮像装置。
    The imaging pixel unit supplies a signal processing circuit with a long-time accumulation imaging signal obtained by accumulating signal charges for a long time and a short-time accumulation imaging signal obtained by accumulating signal charges for a short time for one pixel. ,
    The imaging device according to claim 15.
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