WO2017207815A1

WO2017207815A1 - Ultrasound systems with time compression and time multiplexing of received ultrasound signals

Info

Publication number: WO2017207815A1
Application number: PCT/EP2017/063590
Authority: WO
Inventors: Michael Thomas MCMILLAN; Steven Russell FREEMAN
Original assignee: Koninklijke Philips N.V.
Priority date: 2016-06-02
Filing date: 2017-06-02
Publication date: 2017-12-07

Abstract

A diagnostic ultrasound system has an array transducer probe coupled to an ultrasound system mainframe having a system beamformer. Signals from the transducer elements are sampled and stored in an electronic signal storage device, then read out at times which impart a delay to the signal samples. The signals are read out at a rate which is greater than the rate at which the signals were sampled, causing a time compression of the signal samples. Samples of a plurality of different signals are time multiplexed onto a cable conductor and coupled to the system mainframe, where they are demultiplexed into the original discrete signals and decompressed back to their original data rate. This enables the transmission of a number of discrete signals over a probe cable which exceeds the number of individual cable signal conductors or system beamformer channels.

Description

ULTRASOUND SYSTEMS WITH TIME COMPRESSION AND TIME MULTIPLEXING OF RECEIVED ULTRASOUND SIGNALS

This invention relates to medical diagnostic ultrasound systems and, in particular, to ultrasound systems with time multiplexing and time compression of received signals.

Ultrasonic array transducers use beamformers to transmit, receive and appropriately delay and sum the ultrasonic echo signals received from elements of the transducer array. The delays are chosen in

consideration of the direction (steering) and focus depth of the beams to be formed by the beamformer. After the signals received from each element have been properly delayed by a channel of the beamformer, the delayed signals are combined to form a beam of properly steered and focused coherent echo signals. During ultrasonic beam transmission, the time of actuation of individual elements is the complement of the receive delay, steering and focusing the transmit beam. The choice of delays is known to be

determinable from the geometry of the array elements and of the image field being interrogated by the beams .

In a traditional ultrasound system the array transducer is located in a probe which is placed against the body of the patient during imaging and contains some electronic components such as tuning elements, switches, and amplification devices. The delaying and signal combining is performed by the beamformer which is contained in the ultrasound system mainframe, to which the probe is connected by a cable.

The foregoing system architecture for an array transducer and a beamformer suffices quite well for most one dimensional (ID) transducer arrays, where the number of transducer elements and the number of beamformer channels are approximately the same. When the number of transducer elements exceeds the number of beamformer channels, multiplexing is generally employed and only a subset of the total number of elements of the transducer can be connected to the beamformer at any point in time. The number of elements in a ID array can range from less than one hundred to several hundred and the typical beamformer has 128 beamformer channels. This system

architecture solution became untenable with the advent of two dimensional (2D) array transducers for two and three dimensional (3D) imaging. That is because 2D array transducers steer and focus beams in both azimuth and elevation over a volumetric region. The number of transducer elements needed for this beam formation is usually in the thousands. The crux of the problem then becomes the cable that connects the probe to the system mainframe where the

beamformer is located. A cable of several thousand conductors of even the finest conductive filaments becomes thick and unwieldy, making manipulation of the probe cumbersome if not impossible.

A solution to this problem is to perform at least some of the beamforming in the probe itself, as described in US Pat. 5,229,933 (Larson, III) . In the ultrasound system shown in this patent, the

beamforming is partitioned between the probe and the system mainframe. Initial beamforming of groups of elements is done in the probe by microcircuitry known as a microbeamformer, where partially beamformed sums are produced. These partially beamformed sums, being fewer in number than the number of transducer

elements, are coupled to the system mainframe through a cable of reasonable dimensions, where the

beamforming process is completed and the final beam produced. The partial beamforming in the probe is done by what Larson, III refers to as intragroup processors, in a microbeamformer in the form of microelectronics attached to the array transducer. See also US Pat. 5,997,479 (Savord et al . ) ; US Pat. 6,013,032 (Savord); US Pat. 6,126,602 (Savord et al . ) ; and US Pat. 6,375,617 (Fraser) . The thousands of connections between the thousands of elements of the transducer array and the microbeamformer is done at the tiny dimensions of the microcircuitry and the array pitch, while the many fewer cable connections between the microbeamformer and the beamformer of the system mainframe are done by more conventional cable technologies. Various planar and curved array formats can be used with microbeamformers such as the curved arrays shown in US Pat. 7,821,180 (Kunkel, III) and US Pat. 7,927,280 (Davidsen) .

Microbeamformers can also be used with one

dimensional arrays and with 2D arrays operated as one dimensional arrays. See, e.g., US Pat. 7,037,264 (Poland) .

The microbeamformers shown in the above patents operate by forming partially delayed sum signals from contiguous transducer element groups referred to as "patches." The signals received by all of the elements of a patch are appropriately individually delayed by the microbeamformer, then combined into a partial sum signal. Generally the patches are formed of small two-dimensional groups of elements, such as a 4x6 group or an 8x10 group of elements. This works well for phased array operation during 3D volume scanning, enabling real time scanning of the volume. However, the time required to scan a sizeable volumetric region of the body can be lengthy, as time is required to transmit and receive all of the beams needed to form the volume image. The scanning time can be reduced by multiline acquisition, whereby multiple spatially distinct receive lines are formed from the echo signals of a single transmit event. To form tightly spaced multilines, it is necessary differently delay and sum closely spaced distinct receive signals. This objective can be limited, however, by the size of the patches of transducer elements and the spacing of the partial sum received signals produced by the patches. Smaller patch sizes can be used, but this approach will often increase the number of patches and partial sum signals to a number which exceeds the number of cable conductors needed to couple the partial sum signals to the system beamformer, where multiline processing is generally performed. Accordingly it is desirable to be able to use a large number of patches and partial sum signals with a more limited number of cable conductors .

In accordance with the principles of the present invention, a diagnostic ultrasound system is

described with an array transducer probe coupled to an ultrasound system mainframe having a system beamformer. Signals from the transducer elements are sampled and stored in an electronic signal storage device, then read out at times which impart a delay to the signal samples. The signals are read out at a rate which is greater than the rate at which the signals were sampled, causing a time compression of the signal samples. Samples of a plurality of different signals are time multiplexed onto a cable conductor and coupled to the system mainframe, where they are demultiplexed into the original discrete signals and decompressed back to their original data rate. This enables the transmission of a number of discrete signals over a probe cable which exceeds the number of individual cable signal conductors or system beamformer channels.

In the drawings:

FIGURE 1 illustrates in block diagram form an ultrasonic imaging system constructed in accordance with the principles of the present invention.

FIGURE 2 illustrates a transducer array

configured in NxlO patches which is to be used for multiline beam formation.

FIGURE 3 illustrates the transducer array of FIGURE 2 reconfigured into smaller patch sizes for improved multiline beam formation.

FIGURE 4 illustrates a capacitive electronic signal storage device used to sample and delay signals from a transducer element.

FIGURE 5 illustrates two signals which are time multiplexed onto a single output line.

FIGURE 6 illustrates signal cross-talk produced by the time multiplexing technique of FIGURE 5.

FIGURE 7 illustrates in block diagram form a multiple signal time multiplexing and time

compression circuit constructed in accordance with the principles of the present invention.

FIGURE 7a illustrates the structure of the read and write pointers of FIGURE 7 in an integrated circuit implementation.

FIGURE 8 illustrates time de-multiplexing and de-compression in accordance with the present invention .

FIGURE 9 illustrates a time de-multiplexing and de-compression circuit constructed in accordance with the principles of the present invention. FIGURE 10 illustrates in detailed block diagram form an ultrasonic imaging system constructed in accordance with the principles of the present

invention .

Referring first to FIGURE 1, an ultrasound system constructed in accordance with the principles of the present invention is shown in block diagram form. A probe 10 has a two dimensional array

transducer 12 which may be planar or curved as shown in this example. The elements of the array are coupled to a microbeamformer 14 located in the probe behind the transducer array. A microbeamformer is an integrated circuit located in the probe with

beamforming channels coupled to elements of the 2D array transducer 12. The microbeamformer applies timed transmit pulses to elements of each patch of the array to transmit beams in the desired directions and to the desired focal points in the image field in front of the array. The profile of the transmit beams in the elevation dimension can exhibit a point focus, a plane wave, or any intermediate beam

profile. Echoes returned by cells and tissue from the transmitted beams are received by the array elements and coupled to channels of the

microbeamformer 14 where they are individually delayed. The delayed signals from a contiguous patch of transducer elements are combined to form a partial sum signal for the patch. In an analog

microbeamformer implementation, combining is done by coupling the delayed signals from the elements of the patch to a common bus, obviating the need for summing circuits. The bus of each patch is coupled to a conductor of a cable 16, which conducts the partial sum patch signals to the system mainframe. In the system mainframe analog partial sum signals are digitized and coupled to channels of a system

beamformer 22, which appropriately delays each partial sum signal. The delayed partial sum signals are then combined to form a coherent steered and focused receive beam. System beamformers are well known in the art and may comprise electronic hardware components, hardware controlled by software, or a microprocessor executing beamforming algorithms. In the case of a digital beamformer the beamformer includes A/D converters which convert analog signals from the microbeamformer into sampled digital echo data. The beamformer generally will include one or more microprocessors, shift registers, and or digital or analog memories to process the echo data into coherent echo signal data. Delays are effected by various means such as by the time of sampling of received signals, the write/read interval of data temporarily stored in memory, or by the length or clock rate of a shift register as described in US Pat. 4,173,007 (McKeighen et al . ) The beam signals from the image field are processed by a signal and image processor 24 to produce 2D or 3D images for display on an image display 30. The signal and image processor may comprise electronic hardware

components, hardware controlled by software, or a microprocessor executing image processing algorithms. It generally will also include specialized hardware or software which processes received echo data into image data for images of a desired display format such as a scan converter.

Control of ultrasound system parameters such as probe selection, beam steering and focusing, and signal and image processing is done under control of a system controller 26 which is coupled to various modules of the system. The system controller may be formed by ASIC circuits or microprocessor circuitry and software data storage devices such as RAMs, ROMs, or disk drives. In the case of the probe 10 some of this control information is provided to the

microbeamformer from the system mainframe over data lines of the cable 16, conditioning the

microbeamformer for operation of the 2D array as required for the particular scanning procedure. The user controls these operating parameters by means of a control panel 20. This basic ultrasound system block diagram illustrates the partitioning of

beamformation between the microbeamformer, which performs beamforming of the signals from a patch of elements, and the system beamformer which completes the beamformation process by combining the partial sum signals from the patches.

FIGURE 2 illustrates a portion of 2D array transducer 12 which is configured in eight element by ten element patches. For ease of illustration only the length dimension in the azimuth plane is shown.

The array of FIGURE 2 may alternatively be viewed as a one dimensional array configured in ten-element patches. In the drawing alternate patches are shaded. The number of elements of each patch is above the respective patch. The array transducer 12 may be operated to transmit a main beam 50 from the array and receive echo signals with each element of the array. The signals from the individual elements of a patch are each delayed by the microbeamformer 14 and the delayed signals are combined to form a partial sum signal of the patch for the main beam. The partial sum signals of the patches are then coupled through the probe cable 16 to the system beamformer 22 where the partial sum signals are delayed relative to each other, then combined to form a main beam signal.

Suppose that it is further desired to

simultaneously form additional beams from the

received signals, shown as multilines 52 and 54 on each side of the main beam 50. To form simultaneous multilines in the system beamformer it is necessary to delay and sum the partial sum signals differently for each multiline, depending on the location of each multiline. However, in this example it is seen that the multilines are very close to the main beam and within the dimensions of the same patch of the array, the patch indicated by the bracket above the array. The problem is that there is only a single partial sum signal from this patch, which represents one particular focusing of the elements of the patch, that required for the main beam 50. The partial sum signal cannot be undone and parsed into separate sub- signals which are needed to differently focus the multilines. This is a particular problem for echoes received from the near field, where the receive aperture is small and may be no larger than a patch. Consequently, the multilines 52 and 54 can only be focused the same as the main beam 50 in the near field, causing the resulting image to appear blocky with poor definition in the near field.

A solution to this problem is shown in FIGURE 3. This is to redefine the patches as smaller sized patches, particularly in the region where multilines 52 and 54 are to be formed on either side of the center C of the transmit beam. In this example this central portion of the array 12 has been configured with four 2 by N element patches. On each side of these patches is a pair of 3 by N patches, and outward from them are pairs of five by N patches, with the other visible lateral patches being ten by N patches. The numerous partial sum signals from the small central patches on either side of the beam center C can be relatively delayed differently in the formation of multilines 52 and 54, steering and focusing the multilines more precisely on either side of the main beam, which is itself a product of different delays of the same partial sum signals. Thus, the main beam 50 and its lateral multilines 52 and 54 will be well defined in the resultant image, particularly in the near field.

This redefinition of the patches to a smaller size can cause its own problem, however, and may not even be possible in a given implementation. That is, with smaller patches, there is an increased number of partial sum signals to couple to the system

beamformer, a number which may exceed the number of conductors in the probe cable. In FIGURE 2 it is seen that there are six ten-by-N patches in the portion of array 12 shown in the drawing, which require six conductors of the probe cable for

coupling to the system beamformer. But FIGURE 3, with the same number of elements, has fourteen patches, requiring fourteen conductors in the probe cable. The ability to operate with smaller patch sizes is thus limited by the number of conductors of the probe cable.

It is an object of the present invention to provide greater latitude in the use of smaller, more numerous patches in the probe, and to be able to couple all of their partial sum signals to the system beamformer .

Turning now to FIGURE 4, a circuit 60 which samples and delays the signals received by a

transducer element of a patch, then outputs the delayed signal samples for combining (summing) with delayed signals from other elements is shown. The circuit 60 is a capacitive circuit which samples the signal produced by a transducer element 42 , stores the sample on a capacitor of the circuit then, at a later time which defines the intended delay, the sample is read from the capacitor. The signal delayed in this manner is then available for further processing such as combining with other element signals to form a partial sum signal. The time that a signal is stored on a capacitor 62 i , 622, ... 62M is determined by the operation of a write controller 64 and a read controller 66 . The write controller is a pointer which determines the closure of one of switches 65 i , 652, ... 65M, the brief closing of which samples the signal of transducer 42 at the output of buffer amplifier 68 and stores the sample on a capacitor. After a switch has "written" one sample to a capacitor, the write controller then closes another switch 65 to store another sample of the signal on another capacitor 62 . The write controller thus stores in rapid succession a plurality of samples of the signals received by transducer element 42 during its reception interval. The frequency with which samples are acquired exceeds the Nyquist rate for the received frequency band, and is usually well in excess of this rate. The read controller 66 operates in a similar manner to read the stored signal samples after they have been stored on the capacitors for the desired delay period. The read controller closes one of switches 67 , coupling a stored signal sample to an output buffer 74 from which it is available for further processing. In a rapid succession a sequence of the sampled signals are read from capacitors 62 and the now-delayed samples are forwarded for further processing by the ultrasound system, such as combining with samples from other elements to form a partial sum signal.

In accordance with the principles of the present invention, a plurality of partial sum signals

produced by the microbeamformer 14 are multiplexed onto and transmitted over a common cable conductor. By sending a plurality of partial sum signals over the same conductor, a number of partial sum signals which exceeds the number of cable conductors can be coupled to the system mainframe beamformer for final beamformation including the formation of simultaneous multiline beams. FIGURE 5 illustrates two partial sum signals Yl and Y2 which are to be coupled over a conductor of the probe cable 16 to the mainframe ultrasound system. One way to do this is to rapidly sample Yl and Y2 in alternate fashion to form a signal for the cable conductor which is a time- multiplexed combination of both Yl and Y2. A time- multiplexed combination of Yl and Y2 is shown at the bottom of FIGURE 5. Alternate points of multiplexed signal 72 are seen to be at the amplitude of Yl, and the intervening points are seen to be at the constant level of Y2, which is the state of Y2 during the time of the Yl waveform. Similarly, rapid alternate sampling of Yl and Y2 during the period of the Y2 waveform produces a time-multiplexed combination of both signals as shown at 76. The time-multiplexed signal including 72, 76 is sent over a cable

conductor to the system beamformer where the signal is demultiplexed. Alternate points of 72, 76 are extracted to reproduce Yl and Y2 in the mainframe ultrasound system.

The extraction of the alternate sample points will faithfully replicate the original Yl and Yl signals provided that there are no bandwidth effects and the demultiplexing is done in proper synchronism with the multiplexing operation. Unfortunately, any realistic amplifier, driver, or sampling circuit has bandwidth limitations which govern the time for the circuit to slew from one level to another. The switching from a level of Yl to a level of Y2 to form multiplexed signals 72, 74 is not instantaneous.

Furthermore, there is a delay caused by the time required for multiplexed signals 72, 74 to travel the length of the cable, and this delay can affect the phase at which any demultiplexing circuit extracts points from the multiplexed signals to reconstruct Yl and Y2. A consequence of these effects is that there can be cross-talk of one signal into another after the reconstruction as shown in FIGURE 6. The top line of FIGURE 6 shows a demultiplexed Yl as the desired Yl', but also containing the cross-talk image of Y2 as circled by 84. Similarly, the demultiplexed Y2 contains the desired reconstruction Y2', but also the cross-talk of Yl circled at 82. Consequently, it is desired to be able to remove this cross-talk at the receiver or, better, prevent it from occurring.

A circuit for time-multiplexing two signals for transmission over a common cable conductor to the mainframe ultrasound system is shown in FIGURE 7.

This circuit comprises two electronic signal storage devices 92 and 94. These devices may be constructed in the same manner as capacitive signal storage device 60 shown in FIGURE 4. Each storage device 92, 94 comprises a series of delay cells<m> which store a sequence of samples of a respective input signal. The times at which the input signals are sampled are determined by write pointers 96a and 96b, which function in the same manner as write controller 64 in FIGURE 4. An example of structure of a write pointer constructed in integrated circuit form is shown in FIGURE 7a. A "1" bit is shifted through the cells of a shift register 110, with the rest of the cells being filled with zeroes. The output of the last cell of the shift register is coupled to the input of the first cell so that the "1" bit is wrapped around and clocked through the shift register again. The shift register operates continuously in this manner when an Input signal is present to continuously sample the input signal. The shift register 110 is shifted by a clock signal from a clock signal

generator 112. The output of each cell is coupled to the gate of a passgate (MOSFET) which functions as a switch, one of which, passgate 65N, is shown in the drawing. When the "1" bit is shifted to a cell its application to the gate of the passgate causes the passgate to become conductive (the switch closes) and couple a sample of the Input signal to a capacitor 65 of the storage device. The source electrode of each passgate is coupled to the Input where the signal is present, and the drain electrode of each passgate is coupled to a different capacitor 62 of the storage device. In the drawing a "1" bit in a cell of the shift register causes passgate 65N to become

conductive and couple a sample of the Input signal to capacitor 65N of a storage device. Write pointer 96a controls the times at which samples of a first signal applied to Input 1 are stored in delay cells<m> of storage device 92, and write pointer 96b controls the times at which samples of a second signal applied to

Input 2 are stored in delay cells<m> of storage device 94.

The delay cells of the storage devices are generally filled from top to bottom, and after a sample has been stored in the last delay cell<m>, the write pointer 96 starts filling the storage device from the top again, writing over the previously stored samples with new samples. After a plurality of samples of the two input signals have been stored in the storage devices, a read pointer 98, which functions in the same manner as read controller 66 of FIGURE 4, begins to read samples out of the delay cells of the storage devices and apply them to an input of output amplifier 90. The read pointer is constructed in the manner shown in FIGURE 7a, except that its shift register is twice as long with twice as many passgates, and its passgates are coupled to read the signal samples off of the capacitors of both storage devices, so there are twice as many passgates as in a write pointer. The shifting of the "1" bit through its shift register will thus output the samples previously stored in both storage devices 92 and 94. Since the read pointer is reading samples out of both storage devices, it reads them out at twice the rate at which the write pointers are sampling each input, which is accomplished by using a clock signal for the read pointer which is twice the frequency of the write pointer clock signals. As FIGURE 7 illustrates, the write pointers 96a, 96b are operated at a sampling clock rate of f_Samp and the read pointer 98 is operated at a read-out clock rate of 2fsamp. To produce the multiplexed signals 72, 74 of FIGURE 6, the read pointer outputs a sample of one signal from one of the storage devices, followed by a sample of the other signal from the other storage device. Thus, the sequence of samples output by the output amplifier 90 will be a sequence of alternate samples of the two input signals, such as Yl and Y2. The multiplexed signals can be sent over a cable conductor to the mainframe ultrasound system, where they are demultiplexed and the two original input signals can be processed with their separate signal characteristics intact.

But as explained above, this technique of alternate signal sampling can produce the cross-talk artifacts illustrated and discussed above. In accordance with a preferred aspect of the present invention, the read pointer 98 is operated, not to select alternate samples of the two waveforms, but to alternately output a plurality of samples of each input signal. Each sequence or "window" of samples is output at twice the rate at which the samples were acquired, 2f_samp in this example. This read sequencing results in alternate windows of the two input signals being output by the output amplifier 90 as shown in

FIGURE 8. The sequence of samples of input signal Yl is stored in storage device 92 at a sampling rate of f samp . This sequence of samples is shown in a series of windows 1, 3, 5, 7 at the top of FIGURE 8.

Similarly, the sequence of samples of input signal Y2 is stored in storage device 94, also at a sampling rate of f_Sam_P . This sequence of samples is shown in a series of windows 2, 4, 6, 8 in the middle of FIGURE 8. By operating at a clock rate of 2f_samp the read pointer 98 outputs the samples of windows of the two signal in alternate fashion and with time compression due to the alternate burst sequencing of the read pointer and its higher clock rate, as shown at the bottom of FIGURE 8.

At the receiving end, in the mainframe

ultrasound system at the input of the system

beamformer in this example, the windows of samples shown at the bottom of FIGURE 8 are demultiplexed and decompressed. One way to accomplish this is shown in FIGURE 9. In this example the multiplexed and compressed signal received over a conductor of cable 16 is coupled by a buffer amplifier 102 to an analog to digital converter 100, where the signal samples are digitized. Since the samples are output by the probe at a 2f_samp data rate, the ADC is similarly clocked at a conversion rate of 2f_samp . The conversion rate clock of the ADC is synchronized to the same sample output clock used to operate the read pointer 98 in the probe. The now-digitized samples are output by the ADC 100 and stored in a random access memory 104, and are written to the memory at the conversion rate of 2f_samp by the memory's write address controller 106. In this example the RAM 104 is partitioned into two storage areas, one for the Yl signal and the other for the Y2 signal. The write address controller 106 stores a sequence of digital samples of the Yl signal in the Yl partition, and a sequence of digital samples of the Y2 signal in the Y2 partition. In the context of FIGURE 8, samples received in a burst of an odd-numbered window are stored in the Yl partition and samples received in a burst of an even-numbered window are stored in the Y2 partition of the memory. Thus, the alternate write addressing of the controller 106 effectively

demultiplexes the two signals into separate data sequences in separate partitions of the memory 104. By processing the stored data as if it were acquired at an f_Sam_P sampling rate, for instance by processing it with a processor clocked at an f_Sam_P data rate, the time compression is effectively accounted for and decompressed .

A detailed block diagram of an ultrasound system constructed in accordance with the principles of the present invention is shown in FIGURE 10. An

ultrasound probe 10 includes a two dimensional array transducer 12 which transmits electronically steered and focused beams over a planar or volumetric region and receives echo signals in response to each

transmit beam. The elements of the transducer array are coupled to a microbeamformer (yBF) 14 where the signals from the elements of each patch of the array are delayed and combined to form a partial sum signal for each patch. Suitable two dimensional arrays are described in U.S. Patent 6,419,633 (Robinson et al . ) and in U.S. Patent 6,368,281 (Solomon et al . )

Microbeamformers are described in U.S. Patents

5,997,479 (Savord et al . ) and 6,013,032 (Savord) . The transmit beam characteristics of the array are controlled by data from a beamformer controller 26, which causes the apodized aperture elements of the array to emit a focused beam of the desired breadth in a desired direction through a region of interest for imaging. When transmit pulses are coupled directly to the transducer probe by the beamformer controller the system beamformer is protected from high voltages by a transmit/receive switch 18. At times when the patch configuration causes the number of partial sum signals to exceed the number of signal conductors of probe cable 16 the partial sum signals are multiplexed and time compressed in the probe as described above. The multiplexed and time compressed signals are coupled to the system beamformer 22, where they are demultiplexed and decompressed as described above. The partially beamformed echo signals from the microbeamformer are delayed and summed in the system beamformer to form fully

beamformed single or multiple receive beams in response to a transmit beam. A suitable beamformer for this purpose is described in US Pat. 8,137,272 (Cooley et al . ) The receive beams formed by the beamformer 22 are coupled to a signal processor 24a which performs functions such as filtering and quadrature

demodulation. The echo signals of the processed receive beams are coupled to a Doppler processor 28 and/or a B mode processor 24. The Doppler processor 28 processes the echo information into Doppler power or velocity information. For B mode imaging the receive beam echoes are envelope detected and the signals logarithmically compressed to a suitable dynamic range by the B mode processor 24. The echo signals from a volumetric region are processed to form a 3D image dataset by a 3D image processor 32. The 3D image data may be processed for display in several ways. One way is to produce multiple 2D planes of the volume. This is described in U.S.

patent 6,443,896 (Detmer) . Such planar images of a volumetric region are produced by a multi-planar reformatter 34. The three dimensional image data may also be rendered to form a perspective or kinetic parallax 3D display by a volume renderer 36. The resulting images, which may be B mode, Doppler or both as described in US patent 5,720,291 (Schwartz), are coupled to a display processor 38, from which they are displayed on an image display 40. User control of the beamformer controller 26 and other functions of the ultrasound system are provided through a user interface or control panel 20.

An implementation of the present invention may also be used for two dimensional imaging with a one dimensional array transducer in cases where all of the beamforming is to be performed by the system beamformer 22 and the number of elements of the array exceed the number of conductors of the probe cable, the number of channels of the system beamformer, or both, and techniques which degrade the frame rate of display such as synthetic aperture beamforming are to be avoided. In these instances the signals from individual elements of the array are applied to a multiplexing and compression circuit such as that shown in FIGURE 7 to put the signals from multiple individual elements on the same cable conductor. The combined signals are then demultiplexed and

decompressed as described above for beamforming in the system beamformer.

It should be noted that the various embodiments described above and illustrated by the exemplary ultrasound system of FIGURES 1 and 10 may be

implemented in hardware, software or a combination thereof. The various embodiments and/or components, for example, the modules, or components and

controllers therein, also may be implemented as part of one or more computers or microprocessors. The computer or processor may include a computing device, an input device, a display unit and an interface, for example, for accessing the Internet. The computer or processor may include a microprocessor. The

microprocessor may be connected to a communication bus, for example, to access a PACS system. The computer or processor may also include a memory. The memory may include Random Access Memory (RAM) and Read Only Memory (ROM) . The computer or processor further may include a storage device, which may be a hard disk drive or a removable storage drive such as a floppy disk drive, optical disk drive, solid-state thumb drive, and the like. The storage device may also be other similar means for loading computer programs or other instructions into the computer or processor . As used herein, the term "computer" or "module" or "processor" may include any processor-based or microprocessor-based system including systems using microcontrollers, reduced instruction set computers (RISC) , ASICs, logic circuits, and any other circuit or processor capable of executing the functions described herein. The above examples are exemplary only, and are thus not intended to limit in any way the definition and/or meaning of these terms.

The computer or processor executes a set of instructions that are stored in one or more storage elements, in order to process input data. The storage elements may also store data or other

information as desired or needed. The storage element may be in the form of an information source or a physical memory element within a processing machine .

The set of instructions may include various commands that instruct the computer or processor as a processing machine to perform specific operations such as the methods and processes of the various embodiments of the invention. The set of instructions may be in the form of a software program. The software may be in various forms such as system software or application software and which may be embodied as a tangible and non-transitory computer readable medium. Further, the software may be in the form of a collection of separate programs or modules, a program module within a larger program or a portion of a program module. The software also may include modular programming in the form of object-oriented programming. The processing of input data by the processing machine may be in response to operator commands, or in response to results of previous processing, or in response to a request made by another processing machine.

Furthermore, the limitations of the following claims are not written in means-plus-function format and are not intended to be interpreted based on 35

U.S.C. 112, sixth paragraph, unless and until such claim limitations expressly use the phrase "means for" followed by a statement of function devoid of further structure.

Claims

WHAT IS CLAIMED IS:

1. An ultrasonic diagnostic imaging system for multiplexing and compressing signals received by an ultrasound transducer array for transmission to an ultrasound system mainframe beamformer, the system comprising :

an ultrasound probe having an array transducer adapted to scan a target region with elements of the array;

a system beamformer located in a mainframe ultrasound system;

a probe cable having a plurality of signal conductors coupling signals received by the array transducer to the system beamformer;

an electronic signal storage device located in the probe and configured to store sequential samples of a plurality of received signals at a sample rate; a read pointer coupled to the electronic signal storage device and configured to alternately read out bursts of stored signal samples at a rate greater than the sample rate,

wherein the alternate bursts of signal samples are coupled to the mainframe ultrasound system over a signal conductor of the probe cable; and

a demultiplexer and decompression circuit that is responsive to the alternate bursts of signal samples and configured to demultiplex and decompress the samples of the received signals.

2. The ultrasonic diagnostic imaging system of Claim 1, wherein the electronic signal storage device comprises a first and second capacitive signal storage device.

3. The ultrasonic diagnostic imaging system of Claim 2, wherein the electronic signal storage device further comprises a first write pointer coupled to the first capacitive signal storage device and a second write pointer coupled to the second capacitive signal storage device,

wherein the first write pointer is configured to sample and store samples of a first signal at the sample rate and the second write pointer is

configured to sample and store samples of a second signal at the sample rate.

4. The ultrasonic diagnostic imaging system of Claim 1, further comprising an output amplifier responsive to the bursts of stored signal samples and coupled to the signal conductor of the probe cable.

5. The ultrasonic diagnostic imaging system of Claim 1, wherein the demultiplexer and decompression circuit comprises an analog to digital converter configured to operate at a rate greater than the sample rate, and wherein the analog to digital converter is configured to produce digitized signal samples at the rate greater than the sample rate.

6. The ultrasonic diagnostic imaging system of Claim 5, further comprising a random access memory configured to store the digitized signal samples at the rate greater than the sample rate.

7. The ultrasonic diagnostic imaging system of Claim 6, further comprising a write address

controller that is coupled to the random access memory and configured to address storage locations of the random access memory at the rate greater than the sample rate.

8. The ultrasonic diagnostic imaging system of Claim 7, wherein the rate greater than the sample rate is twice the sample rate.

9. The ultrasonic diagnostic imaging system of Claim 1, wherein the probe further comprises a microbeamformer that is coupled to the array

transducer and configured to produce partial sum signals from patches of array elements.

10. The ultrasonic diagnostic imaging system of Claim 9, wherein the electronic signal storage device is configured to store sequential samples of a plurality of partial sum signals at the sample rate.

11. The ultrasonic diagnostic imaging system of Claim 1, wherein the array transducer further

comprises a two dimensional array transducer; and the system further comprises a microbeamformer coupled to the array transducer.

12. The ultrasonic diagnostic imaging system of Claim 1, wherein the array transducer comprises a one dimensional array transducer, and wherein the

electronic signal storage device is coupled to store sequential samples of signals received by individual transducer elements of the array transducer.

13. The ultrasonic diagnostic imaging system of Claim 12, wherein the number of elements of the one dimensional array exceeds a number of signal

conductors of the probe cable, a number of channels of the system beamformer, or both.

14. The ultrasonic diagnostic imaging system of Claim 13, wherein the system beamformer performs receive beamforming of signals received by the one dimensional array transducer.

15. The ultrasonic diagnostic imaging system of Claim 13, further comprising a microbeamformer coupled to the one dimensional array transducer.