WO2017202155A1

WO2017202155A1 - Method of sharing hardware resource, controller, data storage device, and system

Info

Publication number: WO2017202155A1
Application number: PCT/CN2017/080824
Authority: WO
Inventors: 刘卫
Original assignee: 深圳市中兴微电子技术有限公司
Priority date: 2016-05-27
Filing date: 2017-04-17
Publication date: 2017-11-30
Also published as: CN107436807A

Abstract

A method of sharing a hardware resource comprises: receiving an operation command transmitted from an advanced extensible interface (AXI), when it is determined that the operation command is one of locking or unlocking command used to perform a locking or unlocking operation on a hardware resource lock in a first storage unit in static random access memory (SRAM), buffering first write data corresponding to the locking or unlocking command, and transmitting, to the first storage unit, a first read command (101); and determining, according to acquired first read data, whether the AXI has successfully locked or unlocked the hardware resource lock, wherein the first read data is data corresponding to the first read command (102).

Description

Method, controller, memory and system for sharing hardware resources

Cross-reference to related applications

The present application is based on a Chinese patent application filed on Jan. 27, 2016, the entire disclosure of which is hereby incorporated by reference.

Technical field

The present invention relates to resource sharing technologies in the field of computers, and in particular, to a method, a controller, a memory and a system, and a computer storage medium for sharing hardware resources.

Background technique

In a system-on-chip (SOC) in a multi-core system, each controller performs competition and mutual exclusion on hardware resources in a multi-core system, in order to enable reasonable and orderly use of shared hardware resources. To prevent multiple controllers from operating on the same hardware resource at the same time, hardware resources must be locked and unlocked through hardware resource locks. In the prior art, registers are used to implement hardware resource locks. When the number of hardware resources in the system is increased, the number of registers required to implement hardware resource locks is correspondingly increased, which increases the implementation cost of the SOC. The scalability of the system is degraded.

Summary of the invention

In order to solve the existing technical problems, embodiments of the present invention are expected to provide a method, a controller, a memory and a system, and a computer storage medium for sharing hardware resources, which improve the scalability of the multi-core system.

The technical solution of the embodiment of the present invention is implemented as follows:

An embodiment of the present invention provides a method for sharing hardware resources, where the method includes:

After receiving the operation instruction sent by the Advanced Scalable Interface (AXI), determining that the operation instruction is a hardware resource lock in the first storage unit in a static random access memory (SRAM) When the instruction of the operation is locked or unlocked, the first write data corresponding to the instruction of the lock or unlock operation is buffered, and the instruction of the first read operation is sent to the first storage unit;

And determining, according to the acquired first read data, that the AXI locks or unlocks the hardware resource lock successfully, and the first read data is data corresponding to an instruction of the first read operation.

In the above solution, the determining that the AXI locks the hardware resource lock successfully comprises:

When it is determined that the acquired first read data is the first preset value, the first write data is written into the first storage unit.

In the above solution, the determining that the AXI unlocks the hardware resource lock successfully includes:

When it is determined that the acquired first read data is consistent with the first write data, writing the second write data to the first storage unit, and writing the second write data to a second preset value.

In the above solution, the method further includes:

Determining that the operation instruction sent by the AXI is an instruction to perform a read operation on the hardware resource lock in the first storage unit, sending a second read operation instruction to the first storage unit, and transmitting the instruction to the AXI The second read operation instruction corresponds to the second read data.

In the above solution, the method further includes:

Determining, when the operation instruction sent by the AXI is an instruction of a write operation or a read operation of a non-hardware resource lock in the second storage unit in the SRAM, sending an instruction or reading of the write operation to the second storage unit An instruction to operate, and send the write data or the read data corresponding to the instruction of the write operation or the instruction of the read operation to the AXI.

In the above solution, the method further includes:

Configuring the first storage unit or the second storage list according to the number of hardware resource locks The size of the storage area of the meta.

The embodiment of the invention further provides a method for sharing hardware resources, the method comprising:

Receiving the instruction of the first read operation or the instruction of the second read operation sent by the controller, sending the instruction of the first read operation or the instruction of the second read operation to the controller Corresponding first read data or second read data;

Receiving an instruction of the write operation or a read operation of the non-hardware resource lock sent by the controller, sending the instruction of the read operation or the write data corresponding to the instruction of the write operation to the controller or Read the data.

In the above solution, the method further includes:

When the first read data is the first preset value, acquiring, by the AXI cached by the controller, the first write data corresponding to the lock or unlock operation instruction of the hardware resource lock; or the first read Obtaining the second write data written by the controller, and writing the second data when the data is consistent with the first write data corresponding to the lock or unlock operation instruction of the hardware resource lock by the AXI cached by the controller. Write data as the second preset value.

The embodiment of the present invention further provides a controller for sharing hardware resources, where the controller includes: a data processing unit and an instruction conversion unit;

The data processing unit is configured to: after receiving the operation instruction sent by the AXI, determine whether the operation instruction is an operation instruction for locking or unlocking the hardware resource lock in the first storage unit in the SRAM;

The instruction conversion unit is configured to: when the data processing unit determines that the operation instruction sent by the AXI is an operation instruction for locking or unlocking a hardware resource lock in the first storage unit, buffering the locking or Decrypting an operation instruction corresponding to the first write data, and sending an instruction of the first read operation to the first storage unit; determining, according to the acquired first read data, that the AXI locks the hardware resource lock or The unlocking is successful, and the first read data is data corresponding to an instruction of the first read operation.

In the above solution, the instruction conversion unit is further configured to: when the obtained first read data is the first preset value, write the first write data into the first storage unit; or

When it is determined that the acquired first read data is consistent with the second write data, the second write data is written into the first storage unit, and the written second write data is a second preset value.

In the above solution, the data processing unit is further configured to determine that the operation instruction sent by the AXI is not an operation instruction for locking or unlocking a hardware resource lock in the first storage unit, and determining that the AXI sends the operation instruction. Whether the operation instruction is an instruction to perform a read operation on the hardware resource lock in the first storage unit;

The instruction conversion unit is further configured to: when the data processing unit determines that the operation instruction sent by the AXI is an instruction to perform a read operation on a hardware resource lock in the first storage unit, send the instruction to the first storage unit The second read operation instruction transmits the second read data corresponding to the second read operation instruction to the AXI.

In the above solution, the data processing unit is further configured to: determine, when the operation instruction sent by the AXI is not an instruction to perform a read operation on the hardware resource lock in the first storage unit, determine whether the operation instruction sent by the AXI is Is an instruction to read or read a non-hardware resource lock in the second storage unit in the SRAM;

The instruction conversion unit is further configured to: when the data processing unit determines that the operation instruction sent by the AXI is an instruction to perform a write operation or a read operation on a non-hardware resource lock in the second storage unit, The second storage unit transmits an instruction of the write operation or an instruction of the read operation, and sends the write data or the read data corresponding to the instruction of the write operation or the read operation to the AXI.

The data processing unit and the instruction conversion unit may use a central processing unit (CPU), a digital signal processor (DSP, Digital Singnal Processor), or a programmable logic array (FPGA, Field-) when performing processing. Programmable Gate Array) implementation.

The embodiment of the present invention further provides a memory that shares hardware resources, where the memory includes: a first storage unit and a second storage unit, where

The first storage unit is configured to send an instruction of the first read operation or an instruction of the first read operation to the controller after receiving an instruction of the first read operation or the second read operation sent by the controller The first read data or the second read data corresponding to the instruction of the second read operation;

The second storage unit is configured to send an instruction of the read operation or the write to the controller after receiving an instruction of a write operation or a read operation sent by the controller to a non-hardware resource lock The instruction of the operation corresponds to writing data or reading data.

In the above solution, the first storage unit is further configured to acquire, when the first read data is the first preset value, an operation instruction for locking or unlocking the hardware resource lock by the AXI cached by the controller. Corresponding first write data; or,

And acquiring, by the controller, a second preset value written by the controller, when the first read data is consistent with the write data corresponding to the operation instruction that the AXI cached by the controller is locked or unlocked by the hardware resource lock. Write data.

The embodiment of the present invention may further provide a system for sharing hardware resources, where the system includes a controller and a memory;

The controller is any of the controllers described above; the memory is any of the memories described above.

Embodiments of the present invention also provide a computer storage medium in which computer executable instructions are stored, the computer executable instructions configuring a method of executing the shared hardware resource.

An embodiment of the present invention provides a method, a controller, a memory, and a system for sharing hardware resources. After receiving an operation instruction sent by the AXI, the controller determines that the operation instruction is a hardware resource lock in a first storage unit in the SRAM. And performing an instruction to lock or unlock the operation, buffering the write data corresponding to the instruction of the locking or unlocking operation, and sending an instruction of the first read operation to the first storage unit; according to the obtained first The first read data corresponding to the instruction of the read operation, Determining that the AXI locks or unlocks the hardware resource lock successfully. In this way, by using the SRAM to lock or unlock the hardware resource lock, not only can the required number of hardware resource locks be realized when the number of hardware resources in the multi-core system increases, but also the SOC usage cost is lowered and the SOC is increased. The scalability of multi-core systems; AXI can be easily accessed by administrators in AXI, enabling good portability.

DRAWINGS

FIG. 1 is a schematic flowchart of a method for sharing hardware resources according to an embodiment of the present invention;

2 is a schematic diagram of a control state of AXI locking a hardware resource lock according to an embodiment of the present invention;

FIG. 3 is a schematic diagram of a control state in which AXI unlocks a hardware resource lock according to an embodiment of the present invention.

4 is a schematic flowchart of another method for sharing hardware resources according to an embodiment of the present invention;

FIG. 5 is a schematic structural diagram of a controller for sharing hardware resources according to an embodiment of the present invention; FIG.

FIG. 6 is a schematic structural diagram of a memory sharing a hardware resource according to an embodiment of the present invention.

detailed description

The specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It is to be understood that the specific embodiments described herein are merely illustrative and not restrictive.

FIG. 1 is a schematic flowchart of a method for sharing hardware resources according to an embodiment of the present invention; as shown in FIG. 1 , the method includes:

Step 101: After receiving the operation instruction sent by the AXI, determining that the operation instruction is an operation instruction for locking or unlocking the hardware resource lock in the first storage unit in the SRAM, buffering the operation instruction of locking or unlocking Corresponding first write data, and sending an instruction of the first read operation to the first storage unit;

Here, after receiving the operation instruction issued by the administrator (master N) in the AXI, the controller determines whether the operation instruction is to lock the hardware resource in the first storage unit in the SRAM. And an operation instruction for locking or unlocking; when it is determined that the operation instruction is an operation instruction for locking or unlocking the hardware resource lock in the first storage unit, buffering the operation instruction corresponding to the locking or unlocking First writing data, and sending an instruction of the first read operation to the first storage unit; the operation instruction for locking or unlocking herein may be understood as a first write operation instruction for the hardware resource lock, and at the first The write operation instruction carries the first write data corresponding to the first write operation instruction.

Step 102: Determine, according to the acquired first read data, that the AXI locks or unlocks the hardware resource lock successfully, and the first read data is data corresponding to an instruction of the first read operation.

Here, after receiving the instruction of the first read operation sent by the controller, the first storage unit sends the first read data corresponding to the instruction of the first read operation to the controller. After receiving the first read data, the controller determines that the AXI locks or unlocks the hardware resource lock successfully.

In the embodiment of the present invention, the determining that the AXI locks the hardware resource successfully comprises: determining that the first read data corresponding to the obtained instruction of the first read operation is a first preset value, Writing the first write data to the first storage unit.

Here, the controller determines whether the first read data corresponding to the acquired instruction of the first read operation is a first preset value, such as “0”, when the controller determines that the first read data is the first pre- When the value is set to "0", the cached first write data is written into the target address in the first storage unit, indicating that the master N in the AXI locks the hardware resource lock successfully.

On the other hand, if the controller determines that the first read data is not the first preset value, such as “0”, the write operation instruction is not sent to the target address in the first storage unit, indicating that the hardware resource lock has been If the controllers of other shared hardware resources in the multi-core system are locked, the first write data cached before is discarded, indicating that the master N in the AXI fails to lock the hardware resource lock. Here, the controller configures the storage area size of the first storage unit according to the number of the hardware resource locks.

2 is a schematic diagram of a control state in which AXI locks a hardware resource lock according to an embodiment of the present invention. As shown in FIG. 2, when the hardware resource lock is in an idle (IDLE) 201 state, the controller receives AXI to add a hardware resource lock. After the operation instruction of the lock, first buffering the first write data corresponding to the locked operation instruction, then generating an instruction of the first read operation, and issuing an instruction of the first read operation to the target address in the first storage unit, Transfer to the next read (READ) 203 state; here, the locked operation command can be understood as an instruction to perform a first write operation on the hardware resource lock in the first storage unit in the SRAM, and at the first The instruction of the write operation carries the first write data corresponding to the instruction of the first write operation; the target address is the target address carried in the locked operation instruction. The controller receives the first read data corresponding to the instruction of the first read operation sent by the first storage unit, and if the first read data is the first preset value, such as “0”, then the write to the write (WRITE) 202 The state, and the first write data buffered by the controller is written into the first storage unit. After the write operation is completed, the IDLE201 state is transferred, indicating that the AXI locks the hardware resource lock successfully. Conversely, if the hardware resource lock has been locked by another controller, the previously written first write data is discarded, indicating that AXI fails to lock the hardware resource lock and transitions to the initial idle IDLE201 state.

In the embodiment of the present invention, the determining that the AXI unlocks the hardware resource lock successfully comprises: determining that the first read data corresponding to the obtained instruction of the first read operation is consistent with the first write data Writing the second write data to the first storage unit, and writing the second write data to a second preset value.

Here, the controller determines that the first read data is not the first preset value, such as "0", determining whether the first read data is consistent with the previously cached first write data, when determining the When the first read data is consistent with the first write data, the second write data is written to the target address in the first storage unit, and the written second write data is a second preset value, such as “0” , indicating that the master N in the AXI unlocks the hardware resource lock successfully.

On the other hand, if the controller determines that the read data is not the first preset value “0”, When a write data is inconsistent, the second write operation instruction is not sent to the target address in the first storage unit, indicating that the hardware resource lock cannot be unlocked by the master N in the AXI, and the previously cached first part is discarded. A write data indicates that master N in AXI has failed to latch the hardware resource. Here, one target address corresponds to one hardware resource lock, and the target address is a target address carried in an unlocked operation instruction.

3 is a schematic diagram of a control state in which AXI unlocks a hardware resource lock according to an embodiment of the present invention. As shown in FIG. 3, the hardware resource lock is in an IDLE301 state. When the controller receives an operation instruction for unlocking the hardware resource lock by AXI, Firstly, the first write data corresponding to the unlocked operation instruction is buffered, and then an instruction of the first read operation is generated, and the instruction of the first read operation is sent to the target address in the first storage unit, and the state is changed to the READ303 state; here, The unlocked operation instruction may be understood as an instruction to perform a first write operation on a hardware resource lock in the first storage unit, and the instruction in the first write operation carries an instruction related to the first write operation. Corresponding first write data; the target address is a target address specified in the instruction of the first write operation; after the controller receives the first read data corresponding to the instruction of the first read operation sent by the first storage unit, If the first read data is consistent with the first write data buffered by the controller, then the WRITE 302 state is entered, and the second address is written to the target address in the first storage unit. Data, a second write data for the second preset value, such as "0", and proceeds to the initial state IDLE301, AXI represents the hardware resource lock unlock success. Conversely, the hardware resource lock cannot be unlocked by the master N in the AXI, and the previously cached first write data is discarded, and the initial IDLE301 state is transferred, indicating that AXI fails to unlock the hardware resource lock.

In the embodiment of the present invention, the method further includes: when the operation instruction sent by the AXI is not an operation instruction for locking or unlocking the hardware resource lock, determining whether the operation instruction sent by the AXI is to the hardware The resource lock performs an operation of a read operation; when the operation command sent by the AXI is an instruction to perform a read operation on the hardware resource lock, sending a second read operation instruction to the first storage unit, and transmitting the instruction to the AXI The second reading corresponding to the second read operation instruction according to.

Here, when the controller determines that the operation instruction sent by the AXI is not an operation instruction for locking or unlocking the hardware resource lock, determining whether the operation instruction sent by the AXI is an instruction to perform a read operation on the hardware resource lock When the controller determines that the operation instruction sent by the AXI is an instruction to perform a read operation on the hardware resource lock, directly sending the second read operation instruction to the first storage unit, and returning the first storage unit The second read data corresponding to the second read operation instruction is sent to the AXI. Here, the second read operation instruction carries the second read data corresponding to the second read operation instruction.

In the embodiment of the present invention, the method further includes: when the operation instruction sent by the AXI is not an instruction to perform a read operation on the hardware resource lock, determining whether the operation instruction sent by the AXI is a second storage unit in the SRAM The non-hardware resource lock in the instruction to perform a write operation or the read operation; the operation instruction sent by the AXI is an instruction to write the non-hardware resource lock or an instruction to read the operation, to the second storage The unit transmits an instruction of the write operation or an instruction of the read operation, and sends the write data or the read data corresponding to the instruction of the write operation or the instruction of the read operation to the AXI.

Here, the controller determines whether the operation instruction sent by the AXI is not an instruction to perform a read operation on the hardware resource lock, and determines whether the operation instruction sent by the AXI is a write operation on a non-hardware resource lock in the second storage unit. The instruction of the instruction or the read operation; the controller determines that the operation instruction sent by the AXI is an instruction of a write operation or a read operation of the non-hardware resource lock, and directly sends the write to the second storage unit The operation instruction or the instruction of the read operation, and the write data or the read data corresponding to the instruction of the write operation or the read operation returned by the second storage unit is sent to the AXI. Here, the instruction of the write operation or the instruction of the read operation carries write data or read data corresponding to the instruction of the write operation or the instruction of the read operation; the storage difference of the second storage unit The size is also configured according to the number of hardware resource locks.

FIG. 4 is a schematic flowchart of another method for sharing hardware resources according to an embodiment of the present invention. As shown in FIG. 4, the method includes:

Step 401: After receiving an instruction of the first read operation or the second read operation sent by the controller, send the instruction of the first read operation or the second read operation to the controller. The first read data or the second read data corresponding to the instruction;

Step 402, after receiving an instruction for writing a non-hardware resource lock sent by the controller or an instruction of a read operation, sending an instruction of the read operation or an instruction of the write operation to the controller. Write data or read data.

Here, when the AXI received by the controller locks or unlocks the hardware resource lock, the first storage unit in the SRAM acquires an instruction to perform a first read operation on the hardware resource lock sent by the controller; When the AXI received by the controller reads the hardware resource lock, the first storage unit in the SRAM acquires an instruction to perform a second read operation on the hardware resource lock sent by the controller; here, the lock or unlock is performed. The operation instruction can be understood as an instruction to perform a first write operation on the hardware resource lock, and the instruction in the first write operation carries the first write data corresponding to the instruction of the first write operation; the second read The operation instructions also carry second read data corresponding to the instructions of the second read operation. The first storage unit sends, according to the received instruction of the first read operation or the instruction of the second read operation, the first read data corresponding to the instruction of the first read operation or the instruction of the second read operation to the controller. Or second read data. The instruction of the first read operation is an instruction conversion command issued by the controller, and the operation instruction for locking or unlocking is converted into an instruction of the first read operation, and the instruction of the first read operation carries the first The first read data corresponding to the instruction of the read operation.

After the AXI receives the instruction of the write operation or the read operation of the non-hardware resource lock, the second storage unit in the SRAM acquires the instruction of the write operation or the read operation sent by the controller to the non-hardware resource lock. Here, the instruction of the write operation or the instruction of the read operation carries write data or read data corresponding to the instruction of the write operation or the read operation. Second The storage unit transmits the write data or the read data corresponding to the instruction of the write operation or the instruction of the read operation to the controller according to the received instruction of the write operation or the instruction of the read operation.

In the embodiment of the present invention, the method further includes: when the first read data is the first preset value, the first storage unit acquires AXI cached by the controller, and locks the hardware resource lock. Or the unlocked operation instruction corresponds to the first write data.

Here, the first read data is a first preset value. If the value is “0”, the first storage unit acquires an operation instruction for locking or unlocking the hardware resource lock by the AXI cached by the instruction conversion unit in the controller. Corresponding first write data indicates that master N in AXI successfully locks the hardware resource lock. Here, the storage area size of the first storage unit is configured according to the number of hardware resource locks.

The control state of the specific AXI lock on the hardware resource lock is described with reference to FIG. 2 in the first method embodiment, and details are not described herein again.

In the embodiment of the present invention, the method further includes: when the first read data is consistent with the first write data corresponding to the instruction that the AXI cached by the controller locks or unlocks the hardware resource lock The first storage unit acquires second write data written by the controller, and the written second write data is a second preset value.

Here, when the first memory unit transmits the first read data corresponding to the instruction of the first read operation and the instruction of the controller in the controller that the AXI caches the hardware resource lock to lock or unlock the operation, When the corresponding first write data is consistent, the second write data written by the controller is obtained, and the second write data written is a second preset value, such as “0”, indicating that the master N in the AXI is to the hardware resource. The lock was unlocked successfully.

The control state of the specific AXI to unlock the hardware resource lock is described with reference to FIG. 3 in the first method embodiment, and details are not described herein again.

FIG. 5 is a schematic structural diagram of a controller 51 for sharing hardware resources according to an embodiment of the present invention. As shown in FIG. 5, the controller 51 includes: a data processing unit 511, and an instruction conversion unit. 512 and data control unit 513, wherein

The data processing unit 511 is configured to: after receiving the operation instruction sent by the AXI, determine whether the operation instruction is an instruction to lock or unlock the hardware resource lock in the first storage unit in the SRAM;

The instruction conversion unit 512 is configured to cache the add-on when the data processing unit 511 determines that the operation instruction sent by the AXI is an instruction to lock or unlock the hardware resource lock in the first storage unit. Locking or unlocking the first write data corresponding to the operation instruction, and sending an instruction of the first read operation to the first storage unit; determining, according to the acquired first read data, that the AXI locks the hardware resource lock or The unlocking is successful, and the first read data is data corresponding to an instruction of the first read operation.

Here, after receiving the operation instruction issued by the administrator master N in the AXI, the data processing unit 511 determines whether the operation instruction is an instruction to lock or unlock the hardware resource lock; determining the lock or unlock When the operation instruction is an instruction to lock or unlock the hardware resource lock, the instruction to generate the first write operation by the instruction of the locking or unlocking operation is sent to the instruction conversion unit 512; here, the locking or unlocking operation is performed. The instruction can be understood as an instruction to perform a first write operation on the hardware resource lock, and the instruction in the first write operation carries the first write data corresponding to the instruction of the first write operation. After receiving the instruction of the locking or unlocking operation sent by the data processing unit 511, the instruction conversion unit 512 buffers the first write data corresponding to the instruction of the locking or unlocking operation, and sends the first data to the data control unit 513. The instruction of the read operation; wherein the instruction of the first read operation carries the first read data corresponding to the instruction of the first read operation. After receiving the instruction of the first read operation sent by the instruction conversion unit 512, the data control unit 513 sends the instruction of the first read operation to the target address in the first storage unit. The destination address here refers to the destination address carried in the instruction to lock or unlock the operation. After receiving the instruction of the first read operation sent by the data control unit 513, the first storage unit sends the first read data corresponding to the instruction of the first read operation to the data control unit 513, and the data is controlled. After receiving the first read data, the unit 513 sends the first read data to the instruction conversion unit 512, and the instruction conversion unit 512 determines the AXI pair hardware according to the first read data sent by the data control unit 513. The resource lock is locked or unlocked successfully.

In the embodiment of the present invention, the instruction conversion unit 512 is further configured to: when the obtained first read data is the first preset value, write the first write data to the first storage unit. .

Here, the instruction conversion unit 512 determines whether the first read data corresponding to the acquired instruction of the first read operation is a first preset value, such as “0”, when the instruction conversion unit 512 determines the first read data. When the first preset value is "0", the instruction of the write operation is sent to the data control unit 513, and the data control unit 513 writes the first write data buffered by the instruction conversion unit 512 according to the instruction of the write operation. Entering the target address in the first storage unit indicates that the master N in AXI successfully locks the hardware resource lock. Here, the target address refers to a target address carried in an instruction for locking or unlocking operations.

On the other hand, if the instruction conversion unit 512 determines that the first read data is not the first preset value, such as "0", the instruction of the first write operation is not sent to the target address in the first storage unit, indicating that the The hardware resource lock has been locked by each controller of the other shared hardware resource locks in the multi-core system, and the first write data buffered before is discarded, indicating that the master N in AXI fails to lock the hardware resource latch. Here, one target address corresponds to one hardware resource lock, and the data processing unit 511 configures the storage area size of the first storage unit according to the number of the hardware resource locks.

The control state of the specific AXI locking of the hardware resource lock is described in FIG. 2 in the embodiment of the method, and is not described here.

In the embodiment of the present invention, the instruction conversion unit 512 is further configured to determine that the first read data corresponding to the instruction for acquiring the first read operation is consistent with the first write data, and the second write data is Writing to the first storage unit, the written second write data is a second preset value.

Here, the instruction conversion unit 512 determines that the first read data is not the first preset value, such as “0”, and determines whether the first read data is consistent with the previously cached first write data. When the first read data is consistent with the first write data, an instruction of the second write operation is sent to the data control unit 513, and the data control unit 513 receives the second write sent by the instruction conversion unit 512. After the operation instruction, the second write data is written to the target address in the first storage unit, and the written second write data is a second preset value, such as “0”, indicating the master N pair in the AXI. The hardware resource lock is unlocked successfully.

On the other hand, if the instruction conversion unit 512 determines that the first read data is not the first preset value, such as “0”, and does not coincide with the first write data, then the target address in the first storage unit is not Sending a second write operation instruction, indicating that the hardware resource lock cannot be unlocked by the master N in the AXI, discarding the previously written first write data, indicating that the master N in the AXI fails to unlock the hardware resource. Here, one target address corresponds to one hardware resource lock, and the target address is a target address carried in an instruction for locking or unlocking operations.

The control state of the specific AXI to unlock the hardware resource lock is described in FIG. 3 in the embodiment of the method, and details are not described herein again.

In the embodiment of the present invention, the data processing unit 511 is further configured to determine, when the operation instruction sent by the AXI is not an instruction to lock or unlock the hardware resource lock, determine an operation instruction sent by the AXI. Whether it is an instruction to perform a read operation on the hardware resource lock; the instruction conversion unit 512 is further configured to: the data processing unit 511 determines that the operation instruction sent by the AXI is an instruction to perform a read operation on the hardware resource lock Directly sending an instruction of the second read operation to the data control unit 513, and after receiving the instruction of the second read operation sent by the instruction conversion unit 512, the data control unit 513 sends the instruction to the first storage unit. And the second read data corresponding to the instruction of the second read operation returned by the first storage unit is sent to the instruction conversion unit 512, and the instruction conversion unit 512 further The second read data is sent to the data processing unit 511, and the second read data is sent by the data processing unit 511 to the AXI. Here, the instruction of the second read operation carries the second read data corresponding to the instruction of the second read operation.

In the embodiment of the present invention, the data processing unit 511 is further configured to determine whether the operation instruction sent by the AXI is an operation instruction when the operation instruction sent by the AXI is not an instruction to perform a read operation on the hardware resource lock. The non-hardware resource lock in the second storage unit is an instruction of a write operation or a read operation; the instruction conversion unit 512 is further configured to determine that the operation instruction sent by the AXI is to the non-hardware When the resource lock performs an instruction of a write operation or an instruction of a read operation, the instruction of the write operation or the instruction of the read operation is directly sent to the data control unit 513, and the data control unit 513 receives the location sent by the instruction conversion unit 512. After the instruction of the operation or the instruction of the read operation is described, the instruction of the write operation or the instruction of the read operation is sent to the second storage unit, and the instruction of the write operation or the read operation of the second storage unit is returned The write data or the read data corresponding to the instruction is sent to the instruction conversion unit 512, and the instruction conversion unit 512 sends the write data or the read data to the data processing. Element 511, and then transmits the write data from the processing unit 511 to the AXI read instruction or a write operation corresponding to the data or read data. Here, the instruction of the write operation or the instruction of the read operation carries write data or read data corresponding to the instruction of the write operation or the instruction of the read operation; the storage difference of the second storage unit The size is configured by the data processing unit 511 in accordance with the number of hardware resource locks.

FIG. 6 is a schematic structural diagram of a memory for sharing a hardware resource according to the present invention. As shown in FIG. 6, the memory 61 includes: a first storage unit 611 and a second storage unit 612;

The first storage unit 611 is configured to send an instruction of the first read operation to the controller after receiving an instruction of the first read operation or the second read operation sent by the controller Or the first read data or the second read data corresponding to the instruction of the second read operation;

The second storage unit 612 is configured to send an instruction of the read operation or the instruction to the controller after receiving an instruction of a write operation or a read operation sent by the controller to a non-hardware resource lock Write data or read data corresponding to the instruction of the write operation.

Here, when the controller receives an instruction that the AXI locks or unlocks the hardware resource lock, the first storage unit 611 receives an instruction sent by the controller to perform a first read operation on the hardware resource lock; when the controller receives When the instruction to read the hardware resource lock is performed by the AXI, the first storage unit 611 receives an instruction for performing a second read operation on the hardware resource lock sent by the controller; here, the locking or unlocking operation instruction may be understood as referring to The instruction to perform the first write operation on the hardware resource lock carries the first write data corresponding to the instruction of the first write operation in the instruction of the first write operation. The first storage unit 611 sends, according to the received instruction of the first operation or the instruction of the second operation, the first read data corresponding to the instruction of the first read operation or the instruction of the second read operation or Second read data. The instruction of the first read operation is an instruction conversion command issued by the controller, and the instruction for locking or unlocking operation is converted into an instruction of the first read operation, and the first read operation carries the first instruction The first read data corresponding to the instruction of the read operation; the second read data corresponding to the instruction of the second read operation is carried in the instruction of the second read operation.

When the controller receives the instruction of the AXI to write to the non-hardware resource lock or the instruction of the read operation, the second storage unit 612 receives the instruction of the write operation or the read operation sent by the controller to the non-hardware resource lock, where The instruction of the write operation or the instruction of the read operation carries write data or read data corresponding to the instruction of the write operation or the read operation. The second storage unit 612 transmits the write data or the read data corresponding to the instruction of the write operation or the instruction of the read operation to the controller according to the received instruction of the write operation or the instruction of the read operation. Here, the instruction of the write operation or the instruction of the read operation carries write data or read data corresponding to the instruction of the write operation or the read operation.

The first storage unit 611 is further configured to: when the first read data is the first preset value, acquire an instruction that the controller cached by the AXI locks or unlocks the hardware resource lock. The first write data.

Here, when the first read data is the first preset value, such as “0”, the first storage unit 611 receives the location. The first write data corresponding to the instruction of the controller cache AXI to lock or unlock the hardware resource lock indicates that the master N in the AXI successfully locks the hardware resource lock. Here, the area size of the first storage unit 611 is configured according to the number of hardware resource locks, and the instruction of the locking or unlocking operation may be regarded as an instruction to perform a first write operation on the hardware resource lock. The instruction of a write operation carries the first write data corresponding to the instruction of the first write operation.

In the embodiment of the present invention, the first storage unit 611 is further configured to: first, corresponding to the instruction that the first read data is locked or unlocked by the AXI cached by the controller to the hardware resource lock. When the write data is consistent, the second write data written by the controller is obtained, and the second write data written is a second preset value.

Here, when the first storage unit 611 sends the read data corresponding to the read operation instruction, the first write data corresponding to the instruction of the AXI cached in the controller that locks or unlocks the hardware resource lock is consistent. The second write data written in the controller is obtained, and the second write number written is a second preset value, such as "0" write data, to indicate that the AXI locks the hardware resource lock successfully.

The control state of the specific AXI to lock or unlock the hardware resource lock is described with reference to FIG. 2 or FIG. 3 in the first method embodiment, and details are not described herein again.

In the embodiment of the present invention, a system for sharing hardware resources includes a controller as shown in FIG. 5 and a memory as shown in FIG. 6.

Those skilled in the art will appreciate that embodiments of the present invention can be provided as a method, system, or computer program product. Accordingly, the present invention can take the form of a hardware embodiment, a software embodiment, or a combination of software and hardware. Moreover, the present invention may employ computer-usable storage media (including but not limited to disks) in one or more of the computer-usable program code embodied therein. A form of computer program product embodied on a memory and optical storage, etc.).

The present invention has been described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (system), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flowchart illustrations and/or FIG. These computer program instructions can be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing device to produce a machine for the execution of instructions for execution by a processor of a computer or other programmable data processing device. Means for implementing the functions specified in one or more of the flow or in a block or blocks of the flow chart.

The computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture comprising the instruction device. The apparatus implements the functions specified in one or more blocks of a flow or a flow and/or block diagram of the flowchart.

These computer program instructions can also be loaded onto a computer or other programmable data processing device such that a series of operational steps are performed on a computer or other programmable device to produce computer-implemented processing for execution on a computer or other programmable device. The instructions provide steps for implementing the functions specified in one or more of the flow or in a block or blocks of a flow diagram.

The above is only the preferred embodiment of the present invention and is not intended to limit the scope of the present invention.

Industrial applicability

According to the embodiment of the present invention, after the controller receives the operation instruction sent by the AXI, and determines that the operation instruction is an instruction to lock or unlock the hardware resource lock in the first storage unit in the SRAM, the cache is Locking or unlocking the operation corresponding to the write data, and transmitting an instruction of the first read operation to the first storage unit; according to the acquired first read operation The instruction corresponding to the first read data determines that the AXI locks or unlocks the hardware resource lock successfully. In this way, by using the SRAM to lock or unlock the hardware resource lock, not only can the required number of hardware resource locks be realized when the number of hardware resources in the multi-core system increases, but also the SOC usage cost is lowered and the SOC is increased. The scalability of multi-core systems; AXI can be easily accessed by administrators in AXI, enabling good portability.

Claims

A method of sharing hardware resources, the method comprising:

After receiving the operation instruction sent by the advanced extensible interface AXI, determining that the operation instruction is an instruction to lock or unlock the hardware resource lock in the first storage unit in the static random access memory (SRAM), buffering the addition Locking or unlocking the first write data corresponding to the instruction of the operation, and transmitting an instruction of the first read operation to the first storage unit;

And determining, according to the acquired first read data, that the AXI locks or unlocks the hardware resource lock successfully, and the first read data is data corresponding to an instruction of the first read operation.
The method of claim 1, wherein the determining that the AXI locks the hardware resource lock successfully comprises:

When it is determined that the acquired first read data is the first preset value, the first write data is written into the first storage unit.
The method of claim 1, wherein the determining that the AXI unlocks the hardware resource lock comprises:

When it is determined that the acquired first read data is consistent with the first write data, writing the second write data to the first storage unit, and writing the second write data to a second preset value.
The method of claim 1 wherein the method further comprises:

Determining that the operation instruction sent by the AXI is an instruction to perform a read operation on the hardware resource lock in the first storage unit, sending a second read operation instruction to the first storage unit, and transmitting the instruction to the AXI The second read operation instruction corresponds to the second read data.
The method of claim 1 wherein the method further comprises:

Determining, when the operation instruction sent by the AXI is an instruction of a write operation or a read operation of a non-hardware resource lock in the second storage unit in the SRAM, sending an instruction or reading of the write operation to the second storage unit An instruction to operate, and send the write data or the read data corresponding to the instruction of the write operation or the instruction of the read operation to the AXI.
The method of any of claims 1 to 5, wherein the method further comprises:

Configuring a storage area size of the first storage unit or the second storage unit according to the number of hardware resource locks.
A method of sharing hardware resources, the method comprising:

Receiving the instruction of the first read operation or the instruction of the second read operation sent by the controller, sending the instruction of the first read operation or the instruction of the second read operation to the controller Corresponding first read data or second read data;

Receiving an instruction of the write operation or a read operation of the non-hardware resource lock sent by the controller, sending the instruction of the read operation or the write data corresponding to the instruction of the write operation to the controller or Read the data.
The method of claim 7 wherein the method further comprises:

When the first read data is the first preset value, acquiring, by the AXI cached by the controller, the first write data corresponding to the lock or unlock operation instruction of the hardware resource lock; or the first read Obtaining the second write data written by the controller, and writing the second data when the data is consistent with the first write data corresponding to the lock or unlock operation instruction of the hardware resource lock by the AXI cached by the controller. Write data as the second preset value.
A controller for sharing hardware resources, the controller comprising: a data processing unit and an instruction conversion unit; wherein

The data processing unit is configured to: after receiving the operation instruction sent by the AXI, determine whether the operation instruction is an operation instruction for locking or unlocking the hardware resource lock in the first storage unit in the SRAM;

The instruction conversion unit is configured to: when the data processing unit determines that the operation instruction sent by the AXI is an operation instruction for locking or unlocking a hardware resource lock in the first storage unit, buffering the locking or Decrypting an operation instruction corresponding to the first write data, and transmitting an instruction of the first read operation to the first storage unit; determining the AXI according to the acquired first read data The hardware resource lock is locked or unlocked successfully, and the first read data is data corresponding to the instruction of the first read operation.
The controller according to claim 9, wherein the instruction conversion unit is further configured to: write the first write data to the first data when the acquired first read data is a first preset value First storage unit; or,

When it is determined that the acquired first read data is consistent with the second write data, the second write data is written into the first storage unit, and the written second write data is a second preset value.
The controller of claim 9 wherein said data processing unit,

And determining, when determining that the operation instruction sent by the AXI is not an operation instruction for locking or unlocking the hardware resource lock in the first storage unit, determining whether the operation instruction sent by the AXI is for the first storage An instruction to read a hardware resource lock in the unit;

The instruction conversion unit is further configured to: when the data processing unit determines that the operation instruction sent by the AXI is an instruction to perform a read operation on a hardware resource lock in the first storage unit, send the instruction to the first storage unit The second read operation instruction transmits the second read data corresponding to the second read operation instruction to the AXI.
The controller of claim 9 wherein said data processing unit,

And determining, when determining that the operation instruction sent by the AXI is not an instruction to perform a read operation on the hardware resource lock in the first storage unit, determining whether the operation instruction sent by the AXI is in the second storage unit in the SRAM An instruction for a write operation or a read operation for a non-hardware resource lock;

The instruction conversion unit is further configured to: when the data processing unit determines that the operation instruction sent by the AXI is an instruction to perform a write operation or a read operation on a non-hardware resource lock in the second storage unit, The second storage unit transmits an instruction of the write operation or an instruction of the read operation, and sends the write data or the read data corresponding to the instruction of the write operation or the read operation to the AXI.
A memory sharing a hardware resource, the memory comprising: a first storage unit and a second storage unit, wherein

The first storage unit is configured to send an instruction of the first read operation or an instruction of the first read operation to the controller after receiving an instruction of the first read operation or the second read operation sent by the controller The first read data or the second read data corresponding to the instruction of the second read operation;

The second storage unit is configured to send an instruction of the read operation or the write to the controller after receiving an instruction of a write operation or a read operation sent by the controller to a non-hardware resource lock The instruction of the operation corresponds to writing data or reading data.
The memory of claim 13, wherein the first storage unit is further configured to acquire, by the AXI cached by the controller, the hardware resource lock when the first read data is a first preset value. The first write data corresponding to the locked or unlocked operation instruction; or

And acquiring, by the controller, a second preset value written by the controller, when the first read data is consistent with the write data corresponding to the operation instruction that the AXI cached by the controller is locked or unlocked by the hardware resource lock. Write data.
A system for sharing hardware resources, the system including a controller and a memory; wherein

The controller is the controller of any one of claims 9 to 12;

The memory is the memory of claim 13 or 14.
A computer storage medium storing computer executable instructions configured to perform the method of sharing hardware resources of claims 1-6, or 7-8.