WO2017166541A1 - 用户设备、休眠唤醒方法以及计算机存储介质 - Google Patents
用户设备、休眠唤醒方法以及计算机存储介质 Download PDFInfo
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- WO2017166541A1 WO2017166541A1 PCT/CN2016/090226 CN2016090226W WO2017166541A1 WO 2017166541 A1 WO2017166541 A1 WO 2017166541A1 CN 2016090226 W CN2016090226 W CN 2016090226W WO 2017166541 A1 WO2017166541 A1 WO 2017166541A1
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- application processor
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- usb connection
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W52/00—Power management, e.g. Transmission Power Control [TPC] or power classes
- H04W52/02—Power saving arrangements
- H04W52/0209—Power saving arrangements in terminal devices
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W52/00—Power management, e.g. Transmission Power Control [TPC] or power classes
- H04W52/02—Power saving arrangements
- H04W52/0209—Power saving arrangements in terminal devices
- H04W52/0261—Power saving arrangements in terminal devices managing power supply demand, e.g. depending on battery level
- H04W52/0274—Power saving arrangements in terminal devices managing power supply demand, e.g. depending on battery level by switching on or off the equipment or parts thereof
- H04W52/028—Power saving arrangements in terminal devices managing power supply demand, e.g. depending on battery level by switching on or off the equipment or parts thereof switching on or off only a part of the equipment circuit blocks
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
Definitions
- the present invention relates to the field of communications technologies, and in particular, to a user equipment, a sleep wake-up method, and a computer storage medium.
- the existing mobile terminal generally includes a modem processor and an application processor, wherein the modem processor is used to complete protocol processing, and is used for modulating and demodulating the transmitted and received communication data to implement external communication equipment. Communication and other functions.
- the application processor is used to handle complex logical operations and task assignments, providing users with interactive interfaces, running operating systems, and the like.
- the newly added application processor When a mobile terminal has a dual application processor, the newly added application processor usually cannot autonomously sleep.
- the original application processor is connected to the newly added application processor through the universal serial bus (USB, Universal Serial Bus) for data communication, the sleep mechanism of the newly added application processor needs to be set according to the communication condition of the USB.
- USB Universal Serial Bus
- the embodiments of the present invention provide a user equipment, a sleep wakeup method, and a computer storage medium, which at least solve the defects of the prior art.
- an embodiment of the present invention provides a user equipment, including:
- the first processor is configured to be connected to the second processor through a USB interface
- the first processor is configured to disconnect the USB connection when the first processor or the second processor needs to sleep.
- the first processor when the first processor has an event that needs to interact with the second processor, the first processor is configured to wake up the second processor and establish a USB connection with the second processor;
- the first processor disconnects the USB connection with the second processor, enabling the second processor to sleep.
- the second processor when the second processor has an event that needs to interact with the first processor, the second processor is configured to wake up the first processor;
- the first processor is woken up, configured to establish a USB connection with the second processor
- the first processor actively disconnects the USB connection with the second processor to enable the second processor to sleep.
- the first processor and the second processor are further configured to make a selection of whether to wake up the other party according to the sleep state of the other party when performing the sleep and wake-up operations.
- the user equipment further includes: a first user identification card and a second user identification card;
- the first user identification card and the second user identification card are both connected to the first processor;
- the first processor is further configured to acquire information of the first user identification card and the second user identification card;
- the first processor is further configured to send the acquired information of the second user identification card to the second processor;
- the first processor is further configured to perform data service by communicating with the first 4G network based on the acquired information of the first user identification card;
- the second processor is further configured to receive information based on the received second user identification card Communicate with the second 4G network to perform data services.
- an embodiment of the present invention provides a sleep wakeup method, including:
- the first processor is configured to connect to the second processor through the USB interface
- the first processor is configured to disconnect the USB connection when the first processor or the second processor needs to sleep.
- the first processor when the first processor has an event that needs to interact with the second processor, the first processor wakes up the second processor and establishes a USB connection with the second processor;
- the first processor disconnects the USB connection with the second processor, enabling the second processor to sleep.
- the second processor when the second processor has an event that needs to interact with the first processor, the second processor wakes up the first processor;
- the first processor actively disconnects the USB connection with the second processor to enable the second processor to sleep.
- the first processor and the second processor when performing the sleep and wake-up operations, make a selection of whether to wake up the other party according to the sleep state of the other party.
- the first processor acquires information of the first user identification card and the second user identification card, wherein the first user identification card and the second user identification card are both related to the first processor connection;
- the first processor sends the acquired information of the second user identification card to the second processor;
- the first processor performs communication with the first 4G network based on the acquired information of the first user identification card to perform data service;
- the second processor performs data service based on the received information of the second user identification card and the second 4G network.
- an embodiment of the present invention provides a user equipment, including:
- the first application processor is configured to connect to the second application processor through the USB interface
- the first application processor is configured to disconnect the USB connection when the first application processor or the second application processor needs to sleep.
- the second application processor when the second application processor has an event that needs to interact with the first application processor, the second application processor is configured to wake up the first application processor by using a preset pin;
- the first application processor After the first application processor is woken up, it is configured to establish a USB connection with the second processor for event interaction.
- the first application processor when the first application processor has an event that needs to interact with the second application processor, the first application processor is configured to wake up the second application processor by using a preset pin, and establish and USB connection of the second application processor.
- the first application processor is configured to control the preset pin to trigger the second application processor to enter the sleep state, and Open the USB connection.
- an embodiment of the present invention provides a sleep wakeup method, including:
- the first application processor is connected to the second application processor through a USB interface
- the first application processor disconnects the USB connection when the first application processor or the second application processor needs to sleep.
- the second application processor when the second application processor has an event that needs to interact with the first application processor, the second application processor wakes up the first application processor by using a preset pin;
- the first application processor when the first application processor has an event that needs to interact with the second application processor, the first application processor wakes up the second application processor by using a preset pin, and establishes and The USB connection of the second application processor.
- the first application processor controls the preset pin to trigger the second application processor to enter the sleep state, and disconnects the Said USB connection.
- an embodiment of the present invention provides a computer storage medium, where the computer storage medium stores computer executable instructions, where the computer executable instructions include:
- the first processor is connected to the second processor through a USB interface
- the first processor disconnects the USB connection when the first processor or the second processor needs to sleep.
- the computer executable instructions further comprise:
- the first processor When the first processor has an event that needs to interact with the second processor, the first processor wakes up the second processor and establishes a USB connection with the second processor;
- the first processor disconnects the USB connection with the second processor, enabling the second processor to sleep.
- the computer executable instructions further comprise:
- the second processor wakes up the first processor when the second processor has an event that needs to interact with the first processor
- the first processor actively disconnects the USB connection with the second processor to enable the second processor to sleep.
- the computer executable instructions comprise:
- the first processor and the second processor when performing the sleep and wake-up operations, make a selection of whether to wake up the other party according to the sleep state of the other party.
- the computer executable instructions comprise:
- the first processor acquires information of the first user identification card and the second user identification card
- the first processor sends the acquired information of the second user identification card to the second processor;
- the first processor performs communication with the first 4G network based on the acquired information of the first user identification card to perform data service;
- the second processor performs data service based on the received information of the second user identification card and the second 4G network.
- an embodiment of the present invention provides a computer storage medium, where the computer storage medium stores computer executable instructions, where the computer executable instructions include:
- the first application processor is connected to the second application processor through a USB interface
- the first application processor disconnects the USB connection when the first application processor or the second application processor needs to sleep.
- the computer executable instructions further comprise:
- the second application processor When the second application processor has an event that needs to interact with the first application processor, the second application processor wakes up the first application processor by using a preset pin;
- the embodiment of the present invention has the following beneficial effects: when the first processor is in sleep, the USB connection is disconnected, and the second processor is enabled to autonomously sleep; when the second processor has active events (eg, control events, network data events, etc.) Actively waking up the first processor, performing USB reconnection, ensuring that the event on the second processor side is transmitted to the first processor in real time; when the event processing is completed, notifying the first processor to disconnect the USB connection, causing the system to sleep, saving Power consumption.
- the first processor has a request event to the second processor, the USB reconnection is actively triggered, and the USB connection is actively disconnected after the event processing is completed, so as to ensure normal sleep of the system and save power consumption.
- FIG. 1 is a schematic structural diagram of a user equipment according to an embodiment of the present invention.
- FIG. 2 is a schematic diagram of state communication between the first processor 10 and the second processor 20 through four groups of GPIOs according to an embodiment of the present invention
- FIG. 3 is a schematic diagram of data and control path connections between a first processor 10 and a second processor 20 implemented by USB according to an embodiment of the present invention
- FIG. 4 is a flow chart showing the operation of the first processor 10 and the second processor 20 according to an embodiment of the present invention
- FIG. 5 is a sequence diagram showing the flow of operations of the first processor 10 and the second processor 20 according to another embodiment of the present invention.
- FIG. 6 is a schematic diagram of a switching operation mode of a USB of a first processor 10 in different scenarios according to an embodiment of the invention
- FIG. 7 is a schematic structural diagram of a user equipment according to another embodiment of the present invention.
- FIG. 1 is a schematic structural diagram of a user equipment according to an embodiment of the present invention.
- the user equipment 100 includes a first processor 10, a first transceiver 11, a first subscriber identity card 13, a second subscriber identity card 14, a second processor 20, and a second transceiver 21.
- the embodiment of the present invention implements the architecture of the "first processor 10 + the second processor 20" to implement that the user equipment 100 supports two user identification cards to reside on the 4G network.
- the first processor 10 is configured to perform protocol processing and is configured to modulate and demodulate the transceived communication data to enable communication with an external communication device or the like.
- the second processor 20 is configured to complete protocol processing and configured to transmit and receive communication data Line modulation and demodulation to enable communication with external communication devices, and the like.
- the protocol processing includes performing a protocol stack that processes various network interfaces that interact with the network, for example, a protocol code specified in a communication standard such as LTE/WCDMA/GSM/TDSCDMA/1X/CDMA/EVDO. . These standard protocols are required for user equipment 100 to interact with the carrier network (eg, via data traffic, VOLTE calls, or calls through CS circuit domains).
- a protocol stack that processes various network interfaces that interact with the network, for example, a protocol code specified in a communication standard such as LTE/WCDMA/GSM/TDSCDMA/1X/CDMA/EVDO.
- the first processor 10 is further configured to process complex logical operations and perform task assignment, provide an interactive interface for the user, and transmit operation instructions input by the user (for example, an operation instruction input by the user through the user interface regarding surfing or calling)
- the second processor 20 is also configured to execute an operating system of the user device 100.
- the operating system is stored in a memory (not shown in FIG. 1), and the operating system includes, but is not limited to, Windows, Linux, Unix, Mac OS X, IOS, Solaris, Android, and the like.
- the first processor 10 can be connected to the first user identification card 13 and the second user identification card 14, respectively, through a data interface to acquire card information from the first user identification card 13 and the second user identification card 14. Additionally, the first processor 10 can be coupled to the second processor 20 via a data interface to transmit card information to the second processor 20. After acquiring the card information (the card information of the first user identification card 13 and/or the second user identification card 14), the first processor 10 (the second processor 20) can perform network registration and authentication according to the acquired information. Wait for the operation.
- the subscriber identity card may store one or more of the following information: a unique serial number (ICCID), an International Mobile Subscriber Identity (IMSI), security authentication and encryption information, temporary information related to the local network, and user access. Business list, personal identification number (PIN) and personal unlock code (PUK) for PIN unlocking.
- the first processor 10 includes both the functions of a modem processor and an application processor.
- the first processor 10 also includes the functions of a modem processor and an application processor.
- the first transceiver 11 is responsible for modulating the signal from the first processor 10 into the radio frequency band, and After being processed by power amplification, etc., it is transmitted by the antenna.
- the first transceiver 11 is also responsible for transmitting the signal received by the antenna to the first processor 10 after low power noise amplification, mixing, and the like.
- the second transceiver 21 is responsible for modulating the signal from the second processor 20 into the radio frequency band, and transmitting it by the antenna after being processed by power amplification or the like.
- the second transceiver 21 is also responsible for transmitting the signal received by the antenna to the second processor 20 after low power noise amplification, mixing, and the like.
- the first processor 10 acquires information of the first subscriber identity card 13 to communicate with the first network based on the acquired information of the first subscriber identity card 13 to perform data services.
- the second processor 20 acquires information of the second subscriber identity card 14 from the first processor 10 to perform data service based on the acquired information of the second subscriber identity card 14 in communication with the second network.
- the first processor 10 has voice and data capabilities, and the first processor 10 is further configured to perform voice communication with the 2G and/or 3G network based on the acquired information of the first subscriber identity card 13.
- the second processor 20 also has voice and data capabilities, whereby the second processor 20 can also perform voice traffic based on the acquired information of the subscriber identity card.
- the first user identification card 13 and the second user identification card 14 can be respectively connected to two processors, whereby the first processor 10 and the second processor 20 can directly obtain the first connection thereto.
- the user identifies the card's information for voice and/or data traffic.
- the first processor 10 includes one or more data interfaces, such as a general purpose I/O interface (GPIO), a UART interface, a USB interface, an I2C interface, and the like.
- the second processor 20 also includes one or more data transfer interfaces, such as a general purpose I/O interface (GPIO), a UART interface, a USB interface, an I2C interface, and the like.
- the UART interface is a serial communication interface for transmitting basic information such as control signals and status signals.
- the first processor 10 can be connected to the user identification card through the UART interface to obtain information of the user identification card.
- the general purpose I/O interface acts as a state detection interface and is identified by the level of high/low or pulse.
- the first processor 10 can detect the sleep/wake state of the second processor 20 by the level high/low state of the state detection pin.
- the USB interface is a high-speed data transmission interface with sufficient bandwidth and data transmission capability to achieve immediate delivery of data (no buffering required).
- the first processor 10 and the second processor 20 perform state communication through four sets of GPIOs (references 1-4), wherein the states include: a sleep state and an awake state. specific:
- the first group of GPIOs are used to indicate the sleep or awake state of the first processor 10.
- the first group of GPIO levels are pulled high (or pulled low), and when waking up, the first group of GPIO levels are pulled low (or pulled high).
- the second processor 20 can determine the state of the first processor 10 by reading the level state of the first group of GPIOs.
- the second group GPIO is used to indicate the sleep or wake state of the second processor 20.
- the second group of GPIO levels are pulled high (or pulled low), and when waking up, the second group of GPIO levels are pulled low (or pulled high).
- the first processor 10 can determine the state of the second processor 20 by reading the level state of the second group GPIO.
- the third group of GPIOs is used to wake up the second processor 20 (the first processor 10 triggers the second processor 20 to wake up).
- the GPIO on the second processor 20 side has a wake-up interrupt function, that is, when the second processor 20 is in the sleep state, if the third group GPIO generates a falling edge (may also be other states, for example, a rising edge, etc.), The second processor 20 interrupts the sleep state and is woken up.
- the fourth group of GPIOs is used to wake up the first processor 10 (the second processor 20 wakes up the first processor 10).
- the first processor 10 side GPIO has an interrupt wake-up function, that is, when the first processor 10 is in the sleep state, if the fourth group GPIO generates a falling edge (may also be other states, for example, generating a rising edge, etc.), the first The processor 10 is awakened by interrupting the sleep state.
- the interface labeled 5 is the USB interface.
- the data and control path connections between the first processor 10 and the second processor 20 are implemented via USB.
- the USB interface adopts a host role mode.
- the first processor 10 acts as a host
- the device 20 acts as a device.
- the VBUS pin (power pin) of the first processor 10 outputs an active high level (eg, 5.0V) to the VBUS pin (power pin) of the second processor 20.
- the level of the D+/D- pin (data pin) changes.
- the first processor 10 detects the change, it considers that a USB device is inserted and initiated. The enumeration process, the two establish a USB connection. Since the USB bottom layer holds the lock, the first processor 10 and the second processor 20 cannot sleep, and if either party needs to sleep, the USB connection needs to be disconnected.
- the VBUS pin of the first processor 10 outputs a low level, so that the VBUS pin of the second processor 20 cannot be powered, and the first processor 10 and the second processor 20 The USB connection between them is broken.
- FIG. 4 a flow chart of the operation states of the first processor 10 and the second processor 20 is shown.
- controlling the third group of GPIO controls triggers the second processor 20 to interrupt the falling edge, causing the second processor 20 to exit the sleep mode, ie, the second processor 20 Was awakened.
- the first processor 10 switches to the host mode, and a USB connection is established between the first processor 10 and the second processor 20.
- the first processor 10 supplies power to the USB of the second processor 20.
- the second processor 20 wakes up, the level of the second group GPIO is controlled to be pulled low, whereby the first processor 10 can learn the wakeup of the second processor 20.
- the first processor 10 when the second processor 20 needs to perform sleep after the event interaction between the first processor 10 and the second processor 20 is completed, the first processor 10 is disconnected from the second process.
- the USB connection of the device 20 ensures that the second processor 20 can sleep normally.
- the VBUS pin of the first processor 10 outputs a low level, and the first processor 10 controls the third group of GPIOs to generate a rising edge, triggers the second processor 20 to interrupt the entry, and the second processor 20 enters the sleep state.
- the second processor 20 enters When going to sleep, the level of the second group of GPIOs is pulled high, whereby the first processor 10 can know the sleep of the second processor 20.
- the control The state of the four groups of GPIOs wakes up the first processor 10. After the first processor 10 is woken up, a USB connection with the second processor 20 is established. When the first processor 10 wakes up, the level of the first group of GPIOs is controlled to be pulled low, whereby the second processor 20 can learn the wakeup of the first processor 10.
- the first processor 10 actively disconnects the USB connection with the second processor 20, enabling the second processor 20 to autonomously sleep. It does not limit the sleep due to the USB connection.
- the first processor 10 and the second processor 20 need to first determine the sleep state of the other party when performing the sleep and wake-up operations, and then make a choice whether to wake up the other party, and only perform mutual interaction when necessary. Wake up to minimize system power consumption.
- the second processor 20 when the second processor 20 is powered off, the GPIO and the interrupt are released.
- Shutdown here refers to the shutdown of the user equipment.
- events that interact between the first processor 10 and the second processor 20 include: network events (eg, data traffic through the first processor 10, data through the second processor 20) Business, etc.), events generated by the processor kernel module, events generated by the application, and so on.
- the manner in which the first processor 10 and the second processor 20 sleep may include maintaining a low clock or not being powered at all, etc., to save power.
- the manner in which the first processor 10 and the second processor 20 are awakened includes: being fully powered, etc.
- the USB connection when the first processor sleeps, the USB connection is disconnected, and when the second processor autonomously sleeps, the second processor 20 has active events (eg, control events, network data events, etc.), and actively wakes up.
- the first processor 10 performs USB reconnection to ensure the side of the second processor 20
- the event is transmitted to the first processor 10 in real time; when the event processing is completed, the first processor 10 is notified to disconnect the USB connection, so that the system sleeps, saving power consumption.
- the USB reconnection is actively triggered, and the USB connection is actively disconnected after the event processing is completed to ensure normal sleep of the system and save power consumption.
- the USB interface of the first processor 10 is used not only for communicating with the second processor 20 but also for communicating with an external device (eg, an OTG device). Therefore, in this embodiment, the USB of the first processor 10 needs to switch the working mode in different scenarios.
- the mode needs to be set to mode 2 (NONE mode), and when waking up, it needs to be awake according to The event is set to mode 1 (host mode).
- the USB path of the first processor 10 is only used to communicate with the second processor 20. Therefore, the USB of the first processor 10 only needs to switch between the host and the none mode.
- the USB path of the first processor 10 is required to communicate with an external device, and the USB of the first processor 10 needs to be in three modes, namely mode 1 (host mode) and mode 2 (none mode). Switching between and , thereby ensuring that it can communicate with both the external device and the second processor.
- Mode 3 peripheral mode is used to communicate with external devices.
- the USB of the first processor 10 is switched from mode 1 to mode 2.
- the USB of the second processor 20 is switched from mode 2 to mode 1.
- the USB of the first processor 10 is switched from mode 2 to mode 3.
- the USB of the first processor 10 is switched from mode 3 to mode 1.
- the first processor 10 communicates with the second processor 20, an external computer is connected, and the USB mode of the first processor 10 is switched from mode 1 to mode 3. This is because, when communicating with an external computer, the user device 100 operates in the device mode, therefore, There will be a mode 1 to mode 3 conversion.
- the first processor 10 communicates with the second processor 20, the external OTG device is connected, and the first processor 10 maintains mode 1, that is, the USB of the first processor 10 operates in the host mode.
- the first processor 10 remains in mode 1 when the connection to the external OTG device is disconnected.
- the USB of the first processor 10 has a function of communicating with the second processor 20 and an external device, and realizes multiplexing of the USB interface; and only one USB state switching method for the first processor 10 To ensure a balance between power consumption and functionality.
- the embodiment of the present invention is different from the embodiment shown in FIG. 1 in that, in this embodiment, the first processor 10 includes a first modem processor 101 and a first application processor 102;
- the second processor 20 includes a second modem processor 201 and a second application processor 202.
- the first application processor 102 processes complex logical operations and performs task assignment, provides an interactive interface for the user, and transmits the operation instructions input by the user to the second application processor 202.
- the first application processor 102 is also configured to execute an operating system of the user device 100.
- the first modem processor 101 performs protocol processing and modulates and demodulates the transmitted and received communication data to implement communication with an external communication device or the like.
- the second application processor 202 does not perform data processing, but only functions as a transparent transmission.
- the data processed by the second modem processor 201 is transparently transmitted to the first application processor 102 for processing, and the data transmitted by the first application processor 102 is transparently transmitted to the second modem processor 201.
- the first application processor 102 and the second application processor 202 perform state communication through four sets of GPIOs (numbers 1-4) and data through the USB interface (reference numeral 5). transmission. specific:
- the first group of GPIOs are used to indicate the sleep or wake state of the first application processor 102.
- the first application processor 102 When the first application processor 102 is in sleep, the first group of GPIO levels are pulled high (or pulled low), and when waking up, the first group of GPIO levels are pulled low (or pulled high).
- the second application processor 202 reads the first group of GPIOs by reading The level state can determine the state of the first application processor 102.
- the second group of GPIOs is used to indicate the sleep or wake state of the second application processor 202.
- the second application processor 202 When the second application processor 202 is in sleep, the second group of GPIO levels are pulled high (or pulled low), and when waking up, the second group of GPIO levels are pulled low (or pulled high).
- the first application processor 102 can determine the state of the second application processor 202 by reading the level state of the second group of GPIOs.
- the third group of GPIOs is used to wake up the second application processor 202 (the first application processor 102 triggers the second application processor 202 to wake up).
- the GPIO on the second application processor 202 side has a wake-up interrupt function, that is, when the second application processor 202 is in the sleep state, if the third group of GPIOs generates a falling edge (other states may also be generated, for example, a rising edge is generated, etc.)
- the second application processor 202 interrupts the sleep state and is woken up.
- the fourth group of GPIOs is used to wake up the first application processor 102 (the second application processor 202 wakes up the first application processor 102).
- the first application processor 102 side GPIO has an interrupt wake-up function, that is, when the first application processor 102 is in a sleep state, if the fourth group of GPIOs generates a falling edge (other states, for example, a rising edge, etc.), The first application processor 102 is awakened by interrupting the sleep state.
- the USB interface adopts a host role mode.
- the first application processor 102 functions as a host.
- the second application processor 202 acts as a device.
- the VBUS pin (power pin) of the first application processor 102 outputs an active high level (eg, 5.0V) to the VBUS pin (power pin) of the second application processor 202.
- the level of the D+/D- pin (data pin) changes.
- the USB device is considered to be inserted. , initiate the enumeration process, the two establish a USB connection. Since the USB bottom layer holds the lock, the first application processor 102 and the second application processor 202 cannot perform hibernation, and if either party needs to sleep, the USB connection needs to be disconnected.
- the first application processor 102 When the USB connection is disconnected, the first application processor 102 The VBUS pin outputs a low level such that the VBUS pin of the second application processor 202 cannot be powered up and the USB connection between the first application processor 102 and the second application processor 202 is broken.
- the flow of the working states of the first application processor 102 and the second application processor 202 is the same as the flow between the first processor 10 and the second processor 20 shown in FIG. 4 and FIG. 5.
- controlling the third group of GPIO controls triggers the second application processor 202 to interrupt the falling edge, causing the second application processor 202 to exit the sleep mode, ie, The second application processor 202 is woken up.
- the first application processor 102 switches to the host mode, and a USB connection is established between the first application processor 102 and the second application processor 202.
- the first application processor 102 supplies power to the USB of the second application processor 202.
- the second application processor 202 wakes up, the level of the second group of GPIOs is controlled to be pulled down, whereby the first application processor 102 can learn the wakeup of the second application processor 202.
- the first application processor 102 when the second application processor 202 needs to perform sleep after the event interaction between the first application processor 102 and the second application processor 202 is completed, the first application processor 102 is disconnected.
- the USB connection with the second application processor 202 ensures that the second application processor 202 can sleep normally.
- the VBUS pin of the first application processor 102 outputs a low level, and the first application processor 102 controls the third group of GPIOs to generate a rising edge, triggering the second application processor 202 to interrupt the entry, and the second application processor 202 Go to sleep.
- the second application processor 202 enters sleep the level of the second group of GPIOs is pulled high, whereby the first application processor 102 can learn the sleep of the second application processor 202.
- the control The state of the four groups of GPIOs wakes up the first application processor 102. After the first application processor 102 is woken up, a USB connection with the second application processor 202 is established. When the first application processor 102 wakes up, the level of the first group of GPIOs is controlled to be pulled down, whereby the second application processor 202 can learn the wakeup of the first application processor 102.
- the first application processor 102 actively disconnects the USB connection with the second application processor 202 to enable the second application processor 202. Can sleep autonomously, without restricting the sleep due to the USB connection.
- the second application processor 202 starts a monitoring process (eg, a WPS task), according to a status event of the first application processor 102 (can be learned by querying the level status of the first group of GPIOs)
- the monitoring process sets the node to enable the second application processor 202 to enter the sleep autonomously.
- the first application processor 102 When the first application processor 102 has an event (eg, a network event) that needs to interact with the second application processor 202, sending a message to the preset USB monitoring process, and the USB monitoring process controls the third group of GPIO controls to trigger the second application processing.
- the device 202 interrupts the falling edge.
- the monitoring process of the second application processor 202 detects an interrupt event, invokes a preset interface (eg, a resume interface), and causes the second application processor 202 to exit the sleep mode, that is, the second application processor 202 is woken up.
- the USB interfaces of the first application processor 102 and the second application processor 202 remain connected and power the USB of the second application processor 202.
- the USB monitoring process of the first application processor 102 controls the third group of GPIOs to generate a rising edge, triggering the second application processor 202 to interrupt the entry.
- the monitoring process of the second application processor 202 receives an interrupt event, triggering the second application processor 202 to go to sleep.
- the level of the second group of GPIOs is controlled to be pulled high.
- the state of the fourth group of GPIOs is controlled to wake up the first application processor 102.
- the USB port is reconnected.
- the first application processor 102 queries the detailed event through the control interface, and continues to report to the relevant program of the application layer as needed, and the related program holds the lock until the event processing is completed.
- the first modem when the first application processor 102 is asleep, the first modem is The processor 101 can be in a sleep or awake state.
- the second application processor 202 when the second application processor 202 is asleep, the second modem processor 201 enters a sleep state.
- the associated device when in a sleep state, the associated device can remain low clocked or not powered at all to save power.
- the first application processor 102 and the second application processor 202 need to first determine the sleep state of the other party when performing the sleep and wake operation, and then make a choice whether to wake up the other party, and only if necessary Wake up each other to minimize system power consumption.
- shutdown refers to the shutdown of the user equipment.
- USB switching scheme of the embodiment shown in FIG. 6 above is equally applicable to the first application processor and the second application processor of the embodiment. That is, when the USB of the first application processor in the implementation has the function of communicating with the second application processor 202 and the external device, the first application processor 102 can adopt the USB of the embodiment shown in FIG. 6 above. State switching method to ensure power and function balance.
- the first application processor disconnects the USB connection while sleeping, enabling the second application processor to autonomously sleep; the second application processor 202 has active events (eg, control events, network data events, etc.) At this time, the first application processor 102 is actively woken up to perform USB reconnection.
- the event on the second application processor 202 side is ensured to be transmitted to the first application processor 102 in real time; when the event processing is completed, the first application processor 102 is notified to disconnect the USB connection, so that the system sleeps, and power consumption is saved.
- the USB reconnection is actively triggered, and the USB connection is actively disconnected after the event processing is completed to ensure normal sleep of the system and save power consumption.
- the user equipment may comprise any mobile, portable computing or communication device, such as a cellular device, that is connectable to the network.
- user device 100 can be a cellular telephone (mobile phone), a navigation system, a computing device, a camera, a PDA, a music device, a gaming device, or a handheld device with wireless connectivity.
- An embodiment of the present invention provides a computer storage medium, where the computer storage medium stores computer executable instructions, and the computer executable instructions include:
- the first processor is connected to the second processor through a USB interface
- the first processor disconnects the USB connection when the first processor or the second processor needs to sleep.
- the computer executable instructions further comprise:
- the first processor When the first processor has an event that needs to interact with the second processor, the first processor wakes up the second processor and establishes a USB connection with the second processor;
- the first processor disconnects the USB connection with the second processor, enabling the second processor to sleep.
- the computer executable instructions further comprise:
- the second processor wakes up the first processor when the second processor has an event that needs to interact with the first processor
- the first processor actively disconnects the USB connection with the second processor to enable the second processor to sleep.
- the computer executable instructions comprise:
- the first processor and the second processor when performing the sleep and wake-up operations, make a selection of whether to wake up the other party according to the sleep state of the other party.
- the computer executable instructions comprise:
- the first processor acquires information of the first user identification card and the second user identification card
- the first processor sends the acquired information of the second user identification card to the second processor;
- the first processor performs communication with the first 4G network based on the acquired information of the first user identification card to perform data service;
- the second processor performs data service based on the received information of the second user identification card and the second 4G network.
- An embodiment of the present invention provides a computer storage medium, where the computer storage medium stores computer executable instructions, and the computer executable instructions include:
- the first application processor is connected to the second application processor through a USB interface
- the first application processor disconnects the USB connection when the first application processor or the second application processor needs to sleep.
- the computer executable instructions further comprise:
- the second application processor When the second application processor has an event that needs to interact with the first application processor, the second application processor wakes up the first application processor by using a preset pin;
- the first application processor when the first application processor has an event that needs to interact with the second application processor, the first application processor wakes up the second application processor by using a preset pin, and establishes the second USB connection to the application processor.
- the first application processor controls the preset pin to trigger the second application processor to enter the sleep state, and disconnects the Said USB connection.
- a plurality means two or more unless otherwise specified.
- the terms “first”, “second” and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
- Any process or method description in the flowcharts or otherwise described in the embodiments of the invention may be understood to include the inclusion of one or more elements for implementing a particular logical function or process.
- a module, segment or portion of code of an executable instruction of a step, and the scope of the embodiments of the invention includes additional implementations, which may not be in the order shown or discussed, including in a substantially simultaneous manner depending on the function involved or The functions are performed in the reverse order, which should be understood by those skilled in the art to which the embodiments of the invention are.
- the first network and the second network may be different networks of different operators, or the same or different networks of the same carrier.
- the first 4G network and the second 4G network may be LTE networks, or other types of 4G networks.
- the USB connection is disconnected, and the second processor is enabled to autonomously sleep; when the second processor has an active event (eg, a control event, a network data event, etc.), the first wake-up is active.
- the processor performs USB reconnection to ensure that the event on the second processor side is transmitted to the first processor in real time; when the event processing is completed, the first processor is notified to disconnect the USB connection, so that the system sleeps and saves power consumption.
- the USB reconnection is actively triggered, and the USB connection is actively disconnected after the event processing is completed, so as to ensure normal sleep of the system and save power consumption.
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Abstract
Description
Claims (20)
- 一种用户设备,包括:第一处理器和第二处理器;第一处理器配置为通过USB接口与第二处理器连接;当第一处理器或第二处理器需要休眠时,所述第一处理器配置为断开所述USB连接。
- 根据权利要求1所述的用户设备,其中,当第一处理器有事件需要与第二处理器交互时,所述第一处理器配置为唤醒第二处理器,并建立与第二处理器的USB连接;当第一处理器和第二处理器之间的事件交互完成后,第一处理器断开与第二处理器的USB连接,使能第二处理器休眠。
- 根据权利要求1所述的用户设备,其中,当第二处理器有事件需要与第一处理器交互时,所述第二处理器配置为唤醒第一处理器;第一处理器被唤醒后,配置为建立与第二处理器的USB连接;当第二处理器和第一处理器之间的事件交互完成后,所述第一处理器主动断开与第二处理器的USB连接,使能第二处理器休眠。
- 根据权利要求1所述的用户设备,其中,所述第一处理器和第二处理器还配置为在进行休眠与唤醒操作时,根据对方的休眠状态做出是否唤醒对方的选择。
- 根据权利要求1所述的用户设备,其中,所述用户设备还包括:第一用户识别卡和第二用户识别卡;所述第一用户识别卡和所述第二用户识别卡均与所述第一处理器连接;所述第一处理器,还配置为获取第一用户识别卡和第二用户识别卡的信息;所述第一处理器,还配置为将获取的第二用户识别卡的信息发送给所述第二处理器;所述第一处理器,还配置为基于获取的所述第一用户识别卡的信息与第一4G网络通信,进行数据业务;所述第二处理器,还配置为基于接收到的所述第二用户识别卡的信息与第二4G网络通信,进行数据业务。
- 一种休眠唤醒方法,所述方法包括:第一处理器通过USB接口与第二处理器连接;当第一处理器或第二处理器需要休眠时,所述第一处理器断开所述USB连接。
- 根据权利要求6所述的方法,其中,当第一处理器有事件需要与第二处理器交互时,所述第一处理器唤醒第二处理器,并建立与第二处理器的USB连接;当第一处理器和第二处理器之间的事件交互完成后,第一处理器断开与第二处理器的USB连接,使能第二处理器休眠。
- 根据权利要求6所述的方法,其中,当第二处理器有事件需要与第一处理器交互时,所述第二处理器唤醒第一处理器;第一处理器被唤醒后,建立与第二处理器的USB连接;当第二处理器和第一处理器之间的事件交互完成后,所述第一处理器主动断开与第二处理器的USB连接,使能第二处理器休眠。
- 根据权利要求6所述的方法,其中,所述第一处理器和第二处理器在进行休眠与唤醒操作时,根据对方的休眠状态做出是否唤醒对方的选择。
- 根据权利要求6所述的方法,其中,所述第一处理器获取第一用户识别卡和第二用户识别卡的信息,所述第一用户识别卡和所述第二用户识别卡均与所述第一处理器连接;所述第一处理器将获取的所述第二用户识别卡的信息发送给所述第二处理器;所述第一处理器基于获取的所述第一用户识别卡的信息与第一4G网络通信,进行数据业务;所述第二处理器基于接收到的所述第二用户识别卡的信息与第二4G网络通信,进行数据业务。
- 一种用户设备,包括:第一应用处理器和第二应用处理器;第一应用处理器配置为通过USB接口与第二应用处理器连接;当第一应用处理器或第二应用处理器需要休眠时,所述第一应用处理器配置为断开所述USB连接。
- 根据权利要求11所述的用户设备,其中,当第二应用处理器有事件需要与第一应用处理器交互时,所述第二应用处理器配置为通过预设引脚唤醒第一应用处理器;所述第一应用处理器被唤醒后,配置为建立与所述第二处理器的USB连接以进行事件交互。
- 根据权利要求11所述的用户设备,其中,当第一应用处理器有事件需要与第二应用处理器交互时,所述第一应用处理器配置为通过预设引脚唤醒第二应用处理器,并建立与所述第二应用处理器的USB连接。
- 根据权利要求12或13所述的用户设备,其中,所述第一应用处理器和第二应用处理器的事件交互完成后,所述第一应用处理器配置为控制预设引脚触发第二应用处理器进入休眠,并断开所述USB连接。
- 一种休眠唤醒方法,所述方法包括:第一应用处理器通过USB接口与第二应用处理器连接;当第一应用处理器或第二应用处理器需要休眠时,所述第一应用处理 器断开所述USB连接。
- 根据权利要求15所述的方法,其中,当第二应用处理器有事件需要与第一应用处理器交互时,所述第二应用处理器通过预设引脚唤醒第一应用处理器;所述第一应用处理器被唤醒后,建立与所述第二处理器的USB连接以进行事件交互。
- 根据权利要求15所述的方法,其中,当第一应用处理器有事件需要与第二应用处理器交互时,所述第一应用处理器通过预设引脚唤醒第二应用处理器,并建立与所述第二应用处理器的USB连接。
- 根据权利要求16或17所述的方法,其中,所述第一应用处理器和第二应用处理器的事件交互完成后,所述第一应用处理器控制预设引脚触发第二应用处理器进入休眠,并断开所述USB连接。
- 一种计算机存储介质,所述计算机存储介质中存储有计算机可执行指令,所述计算机可执行指令用于执行如权利要求6-10任一项所述的休眠唤醒方法。
- 一种计算机存储介质,所述计算机存储介质中存储有计算机可执行指令,所述计算机可执行指令用于执行如权利要求15-18任一项所述的休眠唤醒方法。
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| CN114780166A (zh) * | 2022-03-26 | 2022-07-22 | 深圳市广通远驰科技有限公司 | 引脚配置的方法、相关装置、设备以及可读存储介质 |
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| CN105744606A (zh) * | 2016-04-01 | 2016-07-06 | 努比亚技术有限公司 | 用户设备及休眠唤醒方法 |
| CN106507457B (zh) * | 2016-10-31 | 2019-10-15 | 努比亚技术有限公司 | 一种休眠控制方法及终端 |
| US11928002B2 (en) | 2019-11-27 | 2024-03-12 | Mobvoi Information Technology Company Limited | Data transmission method, apparatus and smart watch device |
| CN110955323A (zh) * | 2019-11-27 | 2020-04-03 | 出门问问信息科技有限公司 | 一种智能手表设备 |
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