WO2017155591A1 - Code division multiplexing of uplink control information - Google Patents

Code division multiplexing of uplink control information Download PDF

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Publication number
WO2017155591A1
WO2017155591A1 PCT/US2016/068982 US2016068982W WO2017155591A1 WO 2017155591 A1 WO2017155591 A1 WO 2017155591A1 US 2016068982 W US2016068982 W US 2016068982W WO 2017155591 A1 WO2017155591 A1 WO 2017155591A1
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WIPO (PCT)
Prior art keywords
uci
orthogonal spreading
processing circuitry
interlace
res
Prior art date
Application number
PCT/US2016/068982
Other languages
French (fr)
Inventor
Abhijeet Bhorkar
Huaning Niu
Hwan-Joon Kwon
Qiaoyang Ye
Jeongho Jeon
Fatemeh HAMIDI-SEPEHR
Seunghee Han
Original Assignee
Intel IP Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by Intel IP Corporation filed Critical Intel IP Corporation
Priority to CN201680083390.0A priority Critical patent/CN108781124B/en
Publication of WO2017155591A1 publication Critical patent/WO2017155591A1/en

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J13/00Code division multiplex systems
    • H04J13/0007Code type
    • H04J13/004Orthogonal
    • H04J13/0048Walsh
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J13/00Code division multiplex systems
    • H04J13/0007Code type
    • H04J13/0055ZCZ [zero correlation zone]
    • H04J13/0059CAZAC [constant-amplitude and zero auto-correlation]
    • H04J13/0062Zadoff-Chu
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00Arrangements affording multiple use of the transmission path
    • H04L5/003Arrangements for allocating sub-channels of the transmission path
    • H04L5/0053Allocation of signaling, i.e. of overhead other than pilot signals
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00Arrangements affording multiple use of the transmission path
    • H04L5/02Channels characterised by the type of signal
    • H04L5/06Channels characterised by the type of signal the signals being represented by different frequencies

Definitions

  • Embodiments described herein relate generally to wireless networks and communications systems. Some embodiments relate to cellular communication networks including 3 GPP (Third Generation Partnership Project) networks, 3GPP LTE (Long Term Evolution) networks, and 3GPP LTE-A (LTE Advanced) networks, although the scope of the embodiments is not limited in this respect.
  • 3 GPP Transmissiond Generation Partnership Project
  • 3GPP LTE Long Term Evolution
  • 3GPP LTE-A LTE Advanced
  • LAA Licensed-Assisted Access
  • SCells flexible carrier aggregation
  • LAA/MF incorporate a Listen-Before-Talk (LBT) procedure where radio transmitters first sense the medium and transmit only if the medium is sensed to be idle.
  • LBT Listen-Before-Talk
  • UCI uplink control information
  • FIG. 1 illustrates an example UE and e B according to some embodiments.
  • Fig. 2 shows an example of a MulteFire or LAA frame structure according to some embodiments.
  • Fig. 3 illustrates a B-IFDMA interlace.
  • Fig. 4 illustrates aperiodic CSI reporting on unlicensed spectrum as triggered by an uplink grant.
  • FIG. 5 illustrates an example of a user equipment device according to some embodiments.
  • FIG. 6 illustrates an example of a computing machine according to some embodiments.
  • a mobile terminal (referred to as a User Equipment or UE) connects to the cellular network via a base station (referred to as an evolved Node B or eNB).
  • LTE systems usually utilize licensed spectrum for both uplink (UL) and downlink (DL) transmissions between a UE and an eNB.
  • Fig. 1 illustrates an example of the components of a UE 400 and a base station or eNB 300.
  • the eNB 300 includes processing circuitry 301 connected to a radio transceiver 302 for providing an air interface.
  • the UE 400 includes processing circuitry 401 connected to a radio transceiver 402 for providing an air interface over the wireless medium.
  • Each of the transceivers in the devices is connected to antennas 55.
  • LTE systems utilize orthogonal frequency division multiple access (OFDMA) based on orthogonal frequency division multiplexing (OFDM) for the downlink (DL) and a related technique, single carrier frequency division multiple access (SC-FDMA) based on DFT-precoded OFDM, for the uplink (UL).
  • OFDM orthogonal frequency division multiplexing
  • SC-FDMA single carrier frequency division multiple access
  • UL and DL communications are time-multiplexed in separate time-slots within the same frequency band
  • FDD frequency-division duplex
  • OFDMA/SC-FDMA complex modulation symbols according to a modulation scheme such as QAM (quadrature amplitude modulation) are each individually mapped to a particular orthogonal frequency division multiplexing (OFDM) subcarrier transmitted during an OFDM symbol, referred to as a resource element (RE).
  • An RE is the smallest physical resource in LTE.
  • LTE also provides for MFMO (multi-input multi-output) operation where multiple layers of data are transmitted and received by multiple antennas and where each of the complex modulation symbols is mapped into one of the multiple transmission layers and then mapped to a particular antenna port.
  • MFMO multi-input multi-output
  • Each RE is then uniquely identified by the antenna port, sub-carrier position, and OFDM symbol index within a radio frame having a duration of 10 ms.
  • Each radio frame consists of 10 sub-frames, and each sub-frame consists of two consecutive 0.5 ms slots.
  • Each slot comprises six indexed OFDM symbols for an extended cyclic prefix and seven indexed OFDM symbols for a normal cyclic prefix.
  • a group of resource elements corresponding to twelve consecutive subcarriers within a single slot is referred to as a resource block (RB) or, with reference to the physical layer, a physical resource block (PRB).
  • RB resource block
  • PRB physical resource block
  • UL data flows to and from the MAC layer via a transport channel referred to as the uplink shared channel (UL-SCH).
  • the physical layer conveys UL data via the physical uplink shared channel (PUSCH) and DL data via the physical downlink shared channel (PDSCH).
  • An eNB transmits downlink control information (DCI) to a UE via a physical downlink control channel (PDCCH).
  • DCI downlink control information
  • a UE transmits uplink control information (UCI) to an eNB via a physical uplink control channel (PUCCH) or via the PUSCH where the UCI may be multiplexed with UL data.
  • each PUSCH or PUCCH transmission is accompanied by demodulation reference signals (DMRS) to allow demodulation of the PUSCH or PUCCH symbols by the eNB.
  • DMRS demodulation reference signals
  • the UCI transmitted by a UE may include one or more of the following.
  • Hybrid automatic-request repeat acknowledgements (HARQ-ACKs) are transmitted in response to data packet reception over the DL where, depending on whether the data packet reception is correct or incorrect, the HARQ-ACK has an ACK or a NAK value, respectively.
  • a HARQ-ACK may also be referred to herein as an A/N.
  • the UE may also transmit a scheduling request (SR) signals to request UL resources for data transmission.
  • SR scheduling request
  • the UE transmits channel state information (CSI) reports either periodically or aperiodically at the request of the eNB.
  • CSI channel state information
  • a CSI report may include a channel quality indicator (CQI) signal to inform the eNB of the DL channel conditions it experiences and a precoder matrix indicator/rank indicator (PMI/RI) signal to inform the eNB how to combine the transmission of a signal to the UE from multiple eNB antennas in accordance with a Multiple-Input Multiple-Output (MEVIO) principle.
  • CQI channel quality indicator
  • PMI/RI precoder matrix indicator/rank indicator
  • LAA is based on the carrier aggregation framework of LTE.
  • the primary component carrier (referred to as the primary cell or PCell) operates in licensed spectrum and acts as an anchor and is aggregated with one or more secondary component carriers (referred to as secondary cells or SCells) operating in unlicensed spectrum.
  • An LAA system may also have one or more SCells operating in licensed spectrum as in conventional LTE carrier aggregation.
  • SCell and any PCells operate only in unlicensed spectrum.
  • LBT listen-before-talk
  • LBT provides a fair coextistence between the LAA/MF system and other technologies such as Wi-Fi utilizing the same spectrum.
  • a transmitter performs the LBT procedure by assessing whether the frequency channel is available (i.e., a clear channel assesment or CCA) and, if the channel sensed to be idle, transmitting a contiguous burst over the channel that spans one or more subframes depending on the reserved maximum channel occupancy time (MCOT).
  • CCA clear channel assesment
  • MCOT reserved maximum channel occupancy time
  • Fig. 2 shows an example of a MulteFire or LAA frame structure for time division duplex (TDD) mode according to one embodiment.
  • a DL burst from the e B is preceded by a regular LBT.
  • the subsequent DL subframes contain a PDCCH that precedes the DL data.
  • the PDCCH may contain UL grants of PUSCH resources to the UE for transmission of UL data in UL subframes and/or may grant transmission of resources for a so-called long or extended physical uplink control channel (ePUCCH).
  • the ePUCCH spans a subframe (i.e., 12 or 14 OFDM symbols) in the time domain and spans the system bandwidth in the frequency domain.
  • Transmission of the ePUCCH from a UE may be triggered by a UL grant in the PDCCH or without an UL grant via what is referred to as the common PDCCH (cPDCCH).
  • UL control signals may also be transmitted via a so-called shortened PUCCH (sPUCCH) format that is in the UL portion of the special subframe where the transition between DL and UL subframes occurs.
  • sPUCCH shortened PUCCH
  • the waveform for transmission of the PUSCH and ePUCCH in MulteFire carriers and LAA unlicensed carriers is block-interleaved frequency division multiple access (B-IFDMA) which is a generalization of DFT-precoded OFDMA with interleaved subcarrier allocation.
  • B-IFDMA waveform is an interlaced structure where each interlace is made up of one or more RBs spaced apart in frequency. In one embodiment, each interlace comprises 10 RBs distributed (equally-spaced) over the entire system bandwidth. Single or multiple interlaces can be assigned to each UE.
  • the PUSCH is made up of one or more interlaces
  • the ePUCCH is made up of one interlace.
  • FIG. 3 illustrates a B-IFDMA interlace occupied by an ePUCCH.
  • the design of a PUSCH interlace is similar.
  • the ePUCCH interlace may be frequency multiplexed with PUSCH interlaces transmitted from the same UE or from different UEs anchored at the same e B.
  • the reference signals and data symbols are time multiplexed with a DMRS located at symbol 3 of each slot for the PUSCH and at symbols 1 and 5 of each slot for the ePUCCH
  • UCI such as HARQ-ACK feedback for the PDSCH, scheduling requests (SR), and/or channel state information (CSI) feedback in the form of CSI reports may be transmitted via the sPUCCH, ePUCCH, or PUSCH.
  • HARQ-ACK feedback for the PDSCH scheduling requests (SR), and/or channel state information (CSI) feedback in the form of CSI reports
  • SR scheduling requests
  • CSI channel state information
  • One aspect of the present disclosure relates to embodiments that utilize spreading sequences to code division multiplex the UCI within an ePUCCH with UCI transmitted from other UEs.
  • Another aspect of the disclosure relates to embodiments by which an eNB triggers transmission of aperiodic CSI reports from a UE via the PUSCH.
  • each B-IFDMA interlace consists of 10 RBs in one embodiment.
  • each RB consists of 14 symbols, out of which 2 symbols are occupied by DMRSs.
  • each RB consists of 144 REs (12 REs/symbol and 12 symbols within a subframe) to result inl440 REs for each ePUCCH interlace.
  • Transmission of UCI from only one UE over one interlace can thus be wasteful, and multiplexing of the UCI from multiple UEs may more efficiently utilize the ePUCCH resources.
  • the multiplexing of UCI is performed via X orthogonal spreading sequences, where X is an integer that can be up to 144 when there 144 REs per RB.
  • Each coded quadrature phase shift keying (QPSK) symbol of the UCI is spread with a length 144 orthogonal spreading code in time and frequency domain.
  • Frequency first mapping or time first mapping may be used to map the spread symbols to each RE.
  • up to 12 orthogonal Hadamard sequences may be be used across the frequency domain and time domain (i.e., across OFDM symbols) independently to effectively allow for up to 144 UCIs multiplexed within an interlace.
  • each coded QPSK symbol is spread with a length 12 orthogonal spreading code in the time and frequency domains.
  • orthogonal sequences used for either embodiment include Zadoff-Chu sequences with different cyclic shifts, orthogonal cover codes (OCC), Hadamard sequences, or any combination thereof.
  • the information bits of the UCI may be coded with a forward error correction code such as a tail biting convolutional code (TBCC) or a Reed-Mueller code.
  • TBCC tail biting convolutional code
  • CRC cyclic redundancy check
  • each QPSK symbol (2 bits) is spread over an entire RB, and there are 10 RBs in one interlace to result in 20 bits.
  • the UCI effectively occupies 10 REs.
  • the following options may be used to transmit a larger number of coded bits.
  • the number of spreading sequences can be reduced. For example, instead of 12 orthogonal sequences in time and frequency domain, 12 orthogonal sequences in time and 6 in frequency domain could be used so that each UCI effectively occupies 20 REs to effectively increase the number of coded bits to 40 bits.
  • 12 orthogonal sequences in time and 6 in frequency domain could be used so that each UCI effectively occupies 20 REs to effectively increase the number of coded bits to 40 bits.
  • coded bits of the UCI are split and then mapped to the REs with different spreading sequences.
  • 40 coded bits are divided into 2 parts of 20 bits each.
  • the coded bits after modulation to QPSK symbols are then spread across time/frequency using two spreading sequences out of the available 144 sequences.
  • the multiplexing capability is dependent on the number of DMRS sequences that can be embedded within ePUCCH.
  • Legacy DMRS supports up to 12 different cyclic shifts so that the number of possible multiplexed UEs is limited to 12 if only multiplexing via cyclic shifts is used.
  • the number of DMRS sequences that can be multiplexed within a subframe can be increased by increasing the number of symbols containing DMRS sequences.
  • Orthogonal cover codes can also be applied over the DMRS symbols to increase the number of UEs that can be multiplexed.
  • coding and rate matching are applied to the UCI to result in a number of bits that, after modulation to QPSK symbols, may be mapped with a spreading sequence to the appropriate number of REs. For example, if the number of information bits in the UCI is 1, coding and rate-matching may be applied to result in 20 bits that can be mapped to 10 QPSK symbols as there are effectively 10 QPSK symbols available within each interlace if each QPSK symbol is maximally spread over each RB of the interlace with an orthogonal spreading sequence. If the number of coded bits exceeds the capacity allowed for one spreading sequence, then the coded bits of the UCI can be split as discussed above.
  • the e B indicates the indices of the start and end of the spreading sequence out of the available number of spreading sequences via UL grant.
  • the number of bits needed is 2*ceil(log(N)), where N is total number of spreading sequences.
  • N 144
  • the eNB separately indicates the starting and ending indices of the spreading sequence in both the frequency and time domains. The number of bits needed for this is 4*ceil(log(N)), where N is total number of spreading sequences the time and frequency domains.
  • the eNB indicates the index of the spreading sequence out of the available number of spreading sequences via UL grant, and the UE implicitly determines the number of spreading sequences needed for UCI transmission based on the type of the UCI.
  • the number of bits needed for this embodiment is ceil(log(N)), where N is total number of spreading sequences.
  • N 144, and the number of bits needed in the UL grant is 8.
  • the eNB separately indicates the starting index of the spreading sequence for both time and frequency domain spreading. The number of bits needed in this case is 2*ceil(log(N)), where N is total number of sequences in the time or frequency domains.
  • the UE may implicitly determine the number of spreading sequences needed for UCI transmission based on the type of the UCI.
  • the next spreading sequence in the frequency domain is used if needed to transmit larger UCI payload sizes.
  • next spreading sequence in the time domain is used if needed to transmit larger UCI payload sizes.
  • the ePUCCH is triggered by the cPDCCH.
  • the sequence allocation for each UE is semi-statistically configured by radio resource control (RRC) signaling.
  • RRC radio resource control
  • CRS is used for CSI measurement (CSI/PMI/RI) and demodulation of transmission modes TM1-TM7, while CRS is only used for CSI measurement in TM8.
  • CSI-RS a cell specific sparse sequence (in frequency and time domain compared to CRS) is used in transmission modes TM9 and TM10 for CSI measurements.
  • TM9 and TM10 UE specific DMRS is used for PDSCH demodulation.
  • LTE Release 12 Based on the reception of CRS/CSI-RS, LTE Release 12 supports: 1) periodic reporting wherein the UE reports CSI periodically on preconfigured PUCCH/PUSCH resources with periods configured by the higher layers; and 2) aperiodic reporting wherein, the CSI report is triggered using DCI by dynamically assigning UL resources in the PUSCH transmission.
  • a UE performs aperiodic CSI (ACSI) reporting using the PUSCH in subframe n+k, upon receiving in subframe n either a DCI format 0, or a Random Access Response Grant.
  • the eNodeB can configure the periodicity parameters, too.
  • the size of a single report is limited up to about 11 bits depending on the reporting mode.
  • Aperiodic reporting is explicitly triggered (requested) by the eNodeB using a specific bit in the PDCCH UL grant.
  • Aperiodic report can be either piggybacked with data or sent alone on PUSCH.
  • a CSI report is transmitted together with uplink data on PUSCH, it is multiplexed with the transport block by the so-called LI layer (i.e., the CSI report is not part of the uplink transport block).
  • LI layer i.e., the CSI report is not part of the uplink transport block.
  • CSI-RS based transmission modes including TM9, TM10 are supported on LAA SCell in MF systems. Embodiments described below relate to the transmission of aperiodic CSI reports for LAA and MF systems, over the interlaced structure of the uplink waveform.
  • the resources required for aperiodic CSI reporting may be much less than the resource allocation granularity for the interlaced structure of the UL waveform for operation on unlicensed spectrum.
  • aperiodic CSI reports can be transmitted via the PCell with Release 13 compliant UEs by dynamically allocating PUSCH resources on the PCell via a UL grant.
  • the aperiodic CSI reports can alternatively be transmitted via on the PUSCH on unlicensed carrier providing a scalable approach as the number of configured unlicensed carriers is increased.
  • An example of an aperiodic CSI report is shown in Fig. 4, wherein a UL grant triggers the CSI reporting event at the UE 4ms (i.e., 4 subframes) after the transmission of the UL grant.
  • an aperiodic CSI report can be piggybacked with data on the PUSCH.
  • the aperiodic CSI then needs to be sent alone on the PUSCH.
  • the way that the eNB supports this situation of only requiring the ACSI reporting is implicit by assigning small amount of resources (e.g., less than or equal to 4 PRBs) when triggering the CSI report by DCI signaling (UL grant) with MCS index set to one or the reserved values ⁇ 29, 30, 31 ⁇ .
  • small amount of resources e.g., less than or equal to 4 PRBs
  • B-IFDMA is the UL waveform for transmission of PUSCH/PUCCH on unlicensed spectrum in MF and LAA systems where each interlace consists of 10 PRBs, distributed (equally-spaced) over the entire system bandwidth.
  • each interlace consists of 10 PRBs, distributed (equally-spaced) over the entire system bandwidth.
  • Single or multiple interlaces can be assigned to each UE so the minimum resource allocation granularity is one interlace or equivalently 10 PRBs in MF and LAA systems. It is then important to consider an efficient way to transmit only the aperiodic CSI reporting, ACSI-only, (possibly with less waste of the physical resources).
  • aperiodic CSI-only reporting is explicitly indicated through the ACSI request field in the DCI.
  • two bits are considered to indicate different options for aperiodic CSI transmission with UL-SCH (or no aperiodic CSI report being triggered). It's possible to extend and/or modify the design to include the option of ACSI-only as well. There are multiple possible ways for such indication.
  • another bit in addition to the existing bits of aperiodic CSI request field is provided. The DCI with this additional bit may be sent only on the UE specific PDCCH search space.
  • Either the MSB or the LSB in the extended 3-bit field can be considered to indicate whether the aperiodic CSI request is ACSI-only without UL-SCH or ACSI with UL-SCH.
  • the mapping between the two-bit aperiodic CSI request field states and different ACSI transmission indications is redefined.
  • mapping between the ACSI request field states and different indications may be defined: 1) 00: SIB-2 linked aperiodic CSI with UL-SCH; 2) 01 : first higher layer signaling to indicate the target cells for aperiodic CSI with UL-SCH; 3) 10: second higher layer signaling to indicate the target cells for aperiodic CSI with UL-SCH; and 4) 11 : aperiodic CSI only without UL-SCH.
  • the indication of the ACSI-only is implicitly indicated.
  • One way to do this is through changing the CRS (e.g., the phase shift), wherein UE should test two hypotheses for the CRS to identify the indication.
  • One embodiment of this option is for the e B to transmit the CRS sequence ⁇ x ⁇ the same as legacy LTE when ACSI is multiplexed with UL data and to transmit ⁇ -x ⁇ for ACSI-only transmission.
  • Another way to indicate aperiodic CSI reporting- only via the PUSCH is via resource allocation signaling.
  • the method to indicate UCI-only PUSCH transmission in legacy LTE can be extended by letting the number of PRBs constraint be NPRB ⁇ Y where N ⁇ PRB is the number of PRBs allocated.
  • the following embodiments relate to the manner in which ACSI reports are transmitted.
  • the aperiodic CSI reporting may be configured to be transmitted on PCell PUSCH. Since the PCell does not use the B-IFDMA PUSCH waveform, the resource allocation granularity will not cause any problems.
  • the eNB then can support transmission of aperiodic CSI reporting with no UL data, by assigning less than or equal to 4 PRBs when triggering the CSI report by UL grant.
  • the transmission of aperiodic CSI reporting may be over the SCell PUSCH.
  • the eNB only needs the ACSI reporting, then even if the UE has UL data, it does not multiplex the data with ACSI report and only transmits the ACSI (with possible waste of remaining resources if the resource allocation granularity does not match with the size of the ACSI reporting). Otherwise, when the UE has UL data available to multiplex the CSI with, the aperiodic CSI is piggybacked with the data. If the UE does not have UL data, only ACSI is transmitted on the SCell PUSCH.
  • the multiplexing of CSI report and UL data can be done in the time and/or frequency domain. For example, the UE may first load the ACSI information bits and then load additional data bits for the remaining of the PRBs.
  • the minimum resource allocation granularity is configured to be less than 10 PRBs.
  • the configuration can be signaled by the eNB when triggering the aperiodic CSI reporting, or determined by the UE based on its UL data availability.
  • the following options may be applied.
  • One option is to partition the bandwidth into several groups, e.g., 10 groups. It is then possible to allocate one interlace in each group or to allocate one interlace in a subset of the groups (reducing the periodicity of the PRBs of one interlace).
  • Another option is to enable slot-based resource assignment. In this way, it is possible to allocate one or two slots of an interlace to the UE.
  • Another option is to assign the edge PRBs (i.e., at the edges of the system bandwidth) for transmission of ACSI-only. The rest of the PRBs of an interlace can possibly be assigned to other UEs.
  • circuitry may refer to, be part of, or include an Application Specific Integrated Circuit (ASIC), an electronic circuit, a processor (shared, dedicated, or group), and/or memory (shared, dedicated, or group) that execute one or more software or firmware programs, a combinational logic circuit, and/or other suitable hardware components that provide ASIC.
  • ASIC Application Specific Integrated Circuit
  • processor shared, dedicated, or group
  • memory shared, dedicated, or group
  • circuitry may be implemented in, or functions associated with the circuitry may be implemented by, one or more software or firmware modules.
  • circuitry may include logic, at least partially operable in hardware.
  • FIG. 5 illustrates, for one embodiment, example components of a User Equipment (UE) device 100.
  • the UE device 100 may include application circuitry 102, baseband circuitry 104, Radio Frequency (RF) circuitry 106, front- end module (FEM) circuitry 108 and one or more antennas 110, coupled together at least as shown.
  • RF Radio Frequency
  • FEM front- end module
  • the application circuitry 102 may include one or more application processors.
  • the application circuitry 102 may include circuitry such as, but not limited to, one or more single-core or multi-core processors.
  • the processor(s) may include any combination of general-purpose processors and dedicated processors (e.g., graphics processors, application processors, etc.).
  • the processors may be coupled with and/or may include memory/storage and may be configured to execute instructions stored in the memory/storage to enable various applications and/or operating systems to run on the system.
  • the baseband circuitry 104 may include circuitry such as, but not limited to, one or more single-core or multi-core processors.
  • the baseband circuitry 104 may include one or more baseband processors and/or control logic to process baseband signals received from a receive signal path of the RF circuitry 106 and to generate baseband signals for a transmit signal path of the RF circuitry 106.
  • Baseband processing circuity 104 may interface with the application circuitry 102 for generation and processing of the baseband signals and for controlling operations of the RF circuitry 106.
  • the baseband circuitry 104 may include a second generation (2G) baseband processor 104a, third generation (3G) baseband processor 104b, fourth generation (4G) baseband processor 104c, and/or other baseband processor(s) 104d for other existing generations, generations in development or to be developed in the future (e.g., fifth generation (5G), 6G, etc.).
  • the baseband circuitry 104 e.g., one or more of baseband processors 104a-d
  • the radio control functions may include, but are not limited to, signal modulation/demodulation,
  • modulation/demodulation circuitry of the baseband circuitry 104 may include Fast-Fourier Transform (FFT), precoding, and/or constellation
  • encoding/decoding circuitry of the baseband circuitry 104 may include convolution, tail-biting convolution, turbo, Viterbi, and/or Low Density Parity Check (LDPC) encoder/decoder functionality.
  • LDPC Low Density Parity Check
  • the baseband circuitry 104 may include elements of a protocol stack such as, for example, elements of an evolved universal terrestrial radio access network (EUTRAN) protocol including, for example, physical (PHY), media access control (MAC), radio link control (RLC), packet data convergence protocol (PDCP), and/or radio resource control (RRC) elements.
  • EUTRAN evolved universal terrestrial radio access network
  • a central processing unit (CPU) 104e of the baseband circuitry 104 may be configured to run elements of the protocol stack for signaling of the PHY, MAC, RLC, PDCP and/or RRC layers.
  • the baseband circuitry may include one or more audio digital signal processor(s) (DSP) 104f.
  • DSP audio digital signal processor
  • the audio DSP(s) 104f may be include elements for compression/decompression and echo cancellation and may include other suitable processing elements in other embodiments.
  • Components of the baseband circuitry may be suitably combined in a single chip, a single chipset, or disposed on a same circuit board in some embodiments.
  • some or all of the constituent components of the baseband circuitry 104 and the application circuitry 102 may be implemented together such as, for example, on a system on a chip (SOC).
  • SOC system on a chip
  • the baseband circuitry 104 may provide for communication compatible with one or more radio technologies.
  • the baseband circuitry 104 may support communication with an evolved universal terrestrial radio access network (EUTRAN) and/or other wireless metropolitan area networks (WMAN), a wireless local area network (WLAN), a wireless personal area network (WPAN).
  • EUTRAN evolved universal terrestrial radio access network
  • WMAN wireless metropolitan area networks
  • WLAN wireless local area network
  • WPAN wireless personal area network
  • multi- mode baseband circuitry communications of more than one wireless protocol may be referred to as multi- mode baseband circuitry.
  • RF circuitry 106 may enable communication with wireless networks using modulated electromagnetic radiation through a non-solid medium.
  • the RF circuitry 106 may include switches, filters, amplifiers, etc. to facilitate the communication with the wireless network.
  • RF circuitry 106 may include a receive signal path which may include circuitry to down-convert RF signals received from the FEM circuitry 108 and provide baseband signals to the baseband circuitry 104.
  • RF circuitry 106 may also include a transmit signal path which may include circuitry to up-convert baseband signals provided by the baseband circuitry 104 and provide RF output signals to the FEM circuitry 108 for transmission.
  • the RF circuitry 106 may include a receive signal path and a transmit signal path.
  • the receive signal path of the RF circuitry 106 may include mixer circuitry 106a, amplifier circuitry 106b and filter circuitry 106c.
  • the transmit signal path of the RF circuitry 106 may include filter circuitry 106c and mixer circuitry 106a.
  • RF circuitry 106 may also include synthesizer circuitry 106d for synthesizing a frequency for use by the mixer circuitry 106a of the receive signal path and the transmit signal path.
  • the mixer circuitry 106a of the receive signal path may be configured to down-convert RF signals received from the FEM circuitry 108 based on the synthesized frequency provided by synthesizer circuitry 106d.
  • the amplifier circuitry 106b may be configured to amplify the down-converted signals and the filter circuitry 106c may be a low-pass filter (LPF) or band-pass filter (BPF) configured to remove unwanted signals from the down-converted signals to generate output baseband signals.
  • LPF low-pass filter
  • BPF band-pass filter
  • Output baseband signals may be provided to the baseband circuitry 104 for further processing.
  • the output baseband signals may be zero-frequency baseband signals, although this is not a requirement.
  • mixer circuitry 106a of the receive signal path may comprise passive mixers, although the scope of the embodiments is not limited in this respect.
  • the mixer circuitry 106a of the transmit signal path may be configured to up-convert input baseband signals based on the synthesized frequency provided by the synthesizer circuitry 106d to generate RF output signals for the FEM circuitry 108.
  • the baseband signals may be provided by the baseband circuitry 104 and may be filtered by filter circuitry 106c.
  • the filter circuitry 106c may include a low-pass filter (LPF), although the scope of the embodiments is not limited in this respect.
  • the mixer circuitry 106a of the receive signal path and the mixer circuitry 106a of the transmit signal path may include two or more mixers and may be arranged for quadrature downconversion and/or upconversion respectively.
  • the mixer circuitry 106a of the receive signal path and the mixer circuitry 106a of the transmit signal path may include two or more mixers and may be arranged for image rejection (e.g.,
  • the mixer circuitry 106a of the receive signal path and the mixer circuitry 106a may be arranged for direct downconversion and/or direct upconversion, respectively. In some embodiments, the mixer circuitry 106a of the receive signal path and the mixer circuitry 106a of the transmit signal path may be configured for super-heterodyne operation.
  • the output baseband signals and the input baseband signals may be analog baseband signals, although the scope of the embodiments is not limited in this respect.
  • the output baseband signals and the input baseband signals may be digital baseband signals.
  • the RF circuitry 106 may include analog-to-digital converter (ADC) and digital-to-analog converter (DAC) circuitry and the baseband circuitry 104 may include a digital baseband interface to communicate with the RF circuitry 106.
  • ADC analog-to-digital converter
  • DAC digital-to-analog converter
  • a separate radio IC circuitry may be provided for processing signals for each spectrum, although the scope of the embodiments is not limited in this respect.
  • the synthesizer circuitry 106d may be a fractional -N synthesizer or a fractional N/N+1 synthesizer, although the scope of the embodiments is not limited in this respect as other types of frequency synthesizers may be suitable.
  • synthesizer circuitry 106d may be a delta-sigma synthesizer, a frequency multiplier, or a synthesizer comprising a phase-locked loop with a frequency divider.
  • the synthesizer circuitry 106d may be configured to synthesize an output frequency for use by the mixer circuitry 106a of the RF circuitry 106 based on a frequency input and a divider control input.
  • the synthesizer circuitry 106d may be a fractional N/N+1 synthesizer.
  • frequency input may be provided by a voltage controlled oscillator (VCO), although that is not a requirement.
  • VCO voltage controlled oscillator
  • Divider control input may be provided by either the baseband circuitry 104 or the applications processor 102 depending on the desired output frequency.
  • a divider control input (e.g., N) may be determined from a look-up table based on a channel indicated by the applications processor 102.
  • Synthesizer circuitry 106d of the RF circuitry 106 may include a divider, a delay-locked loop (DLL), a multiplexer and a phase accumulator.
  • the divider may be a dual modulus divider (DMD) and the phase accumulator may be a digital phase accumulator (DP A).
  • the DMD may be configured to divide the input signal by either N or N+l (e.g., based on a carry out) to provide a fractional division ratio.
  • the DLL may include a set of cascaded, tunable, delay elements, a phase detector, a charge pump and a D-type flip-flop.
  • the delay elements may be configured to break a VCO period up into Nd equal packets of phase, where Nd is the number of delay elements in the delay line.
  • Nd is the number of delay elements in the delay line.
  • synthesizer circuitry 106d may be configured to generate a carrier frequency as the output frequency, while in other embodiments, the output frequency may be a multiple of the carrier frequency (e.g., twice the carrier frequency, four times the carrier frequency) and used in conjunction with quadrature generator and divider circuitry to generate multiple signals at the carrier frequency with multiple different phases with respect to each other. In some embodiments, the output frequency may be a LO frequency (fix)). In some embodiments, the RF circuitry 106 may include an IQ/polar converter.
  • FEM circuitry 108 may include a receive signal path which may include circuitry configured to operate on RF signals received from one or more antennas 110, amplify the received signals and provide the amplified versions of the received signals to the RF circuitry 106 for further processing.
  • FEM circuitry 108 may also include a transmit signal path which may include circuitry configured to amplify signals for transmission provided by the RF circuitry 106 for transmission by one or more of the one or more antennas 110.
  • the FEM circuitry 108 may include a TX/RX switch to switch between transmit mode and receive mode operation.
  • the FEM circuitry may include a receive signal path and a transmit signal path.
  • the receive signal path of the FEM circuitry may include a low-noise amplifier (LNA) to amplify received RF signals and provide the amplified received RF signals as an output (e.g., to the RF circuitry 106).
  • LNA low-noise amplifier
  • the transmit signal path of the FEM circuitry 108 may include a power amplifier (PA) to amplify input RF signals (e.g., provided by RF circuitry 106), and one or more filters to generate RF signals for subsequent transmission (e.g., by one or more of the one or more antennas 110.
  • PA power amplifier
  • the UE device 100 may include additional elements such as, for example, memory/storage, display, camera, sensor, and/or input/output (I/O) interface.
  • additional elements such as, for example, memory/storage, display, camera, sensor, and/or input/output (I/O) interface.
  • Fig. 6 illustrates a block diagram of an example machine 500 upon which any one or more of the techniques (e.g., methodologies) discussed herein may perform.
  • the machine 500 may operate as a standalone device or may be connected (e.g., networked) to other machines.
  • the machine 500 may operate in the capacity of a server machine, a client machine, or both in server-client network environments.
  • the machine 500 may act as a peer machine in peer-to-peer (P2P) (or other distributed) network environment.
  • P2P peer-to-peer
  • the machine 500 may be a user equipment (UE), evolved Node B (eNB), Wi-Fi access point (AP), Wi-Fi station (STA), personal computer (PC), a tablet PC, a set-top box (STB), a personal digital assistant (PDA), a mobile telephone, a smart phone, a web appliance, a network router, switch or bridge, or any machine capable of executing instructions (sequential or otherwise) that specify actions to be taken by that machine.
  • UE user equipment
  • eNB evolved Node B
  • AP Wi-Fi access point
  • STA Wi-Fi station
  • PC personal computer
  • PDA personal digital assistant
  • STB set-top box
  • mobile telephone a smart phone
  • web appliance a web appliance
  • network router switch or bridge
  • Examples, as described herein, may include, or may operate on, logic or a number of components, modules, or mechanisms.
  • Modules are tangible entities (e.g., hardware) capable of performing specified operations and may be configured or arranged in a certain manner.
  • circuits may be arranged (e.g., internally or with respect to external entities such as other circuits) in a specified manner as a module.
  • the whole or part of one or more computer systems e.g., a standalone, client or server computer system
  • one or more hardware processors may be configured by firmware or software (e.g., instructions, an application portion, or an application) as a module that operates to perform specified operations.
  • the software may reside on a machine readable medium.
  • the software when executed by the underlying hardware of the module, causes the hardware to perform the specified operations.
  • module is understood to encompass a tangible entity, be that an entity that is physically constructed, specifically configured (e.g., hardwired), or temporarily (e.g., transitorily) configured (e.g., programmed) to operate in a specified manner or to perform part or all of any operation described herein.
  • each of the modules need not be instantiated at any one moment in time.
  • the modules comprise a general-purpose hardware processor configured using software
  • the general-purpose hardware processor may be configured as respective different modules at different times.
  • Software may accordingly configure a hardware processor, for example, to constitute a particular module at one instance of time and to constitute a different module at a different instance of time.
  • Machine 500 may include a hardware processor 502 (e.g., a central processing unit (CPU), a graphics processing unit (GPU), a hardware processor core, or any combination thereof), a main memory 504 and a static memory 506, some or all of which may communicate with each other via an interlink (e.g., bus) 508.
  • the machine 500 may further include a display unit 510, an alphanumeric input device 512 (e.g., a keyboard), and a user interface (UI) navigation device 514 (e.g., a mouse).
  • the display unit 510, input device 512 and UI navigation device 514 may be a touch screen display.
  • the machine 500 may additionally include a storage device (e.g., drive unit) 516, a signal generation device 518 (e.g., a speaker), a network interface device 520, and one or more sensors 521, such as a global positioning system (GPS) sensor, compass, accelerometer, or other sensor.
  • the machine 500 may include an output controller 528, such as a serial (e.g., universal serial bus (USB), parallel, or other wired or wireless (e.g., infrared (IR), near field communication (NFC), etc.) connection to communicate or control one or more peripheral devices (e.g., a printer, card reader, etc.).
  • a serial e.g., universal serial bus (USB), parallel, or other wired or wireless (e.g., infrared (IR), near field communication (NFC), etc.) connection to communicate or control one or more peripheral devices (e.g., a printer, card reader, etc.).
  • USB universal serial bus
  • NFC near field
  • the storage device 516 may include a machine readable medium 522 on which is stored one or more sets of data structures or instructions 524 (e.g., software) embodying or utilized by any one or more of the techniques or functions described herein.
  • the instructions 524 may also reside, completely or at least partially, within the main memory 504, within static memory 506, or within the hardware processor 502 during execution thereof by the machine 500.
  • one or any combination of the hardware processor 502, the main memory 504, the static memory 506, or the storage device 516 may constitute machine readable media.
  • machine readable medium 522 is illustrated as a single medium, the term “machine readable medium” may include a single medium or multiple media (e.g., a centralized or distributed database, and/or associated caches and servers) configured to store the one or more instructions 524.
  • machine readable medium may include a single medium or multiple media (e.g., a centralized or distributed database, and/or associated caches and servers) configured to store the one or more instructions 524.
  • machine readable medium may include any medium that is capable of storing, encoding, or carrying instructions for execution by the machine 500 and that cause the machine 500 to perform any one or more of the techniques of the present disclosure, or that is capable of storing, encoding or carrying data structures used by or associated with such instructions.
  • Non- limiting machine readable medium examples may include solid-state memories, and optical and magnetic media.
  • machine readable media may include: non-volatile memory, such as semiconductor memory devices (e.g., Electrically Programmable Read-Only Memory (EPROM), Electrically Erasable Programmable Read-Only Memory (EEPROM)) and flash memory devices; magnetic disks, such as internal hard disks and removable disks; magneto-optical disks; Random Access Memory (RAM); and CD-ROM and DVD-ROM disks.
  • non-volatile memory such as semiconductor memory devices (e.g., Electrically Programmable Read-Only Memory (EPROM), Electrically Erasable Programmable Read-Only Memory (EEPROM)) and flash memory devices
  • magnetic disks such as internal hard disks and removable disks
  • magneto-optical disks such as internal hard disks and removable disks
  • RAM Random Access Memory
  • CD-ROM and DVD-ROM disks CD-ROM and DVD-ROM disks.
  • machine readable media may include non-transitory machine readable media.
  • machine readable media may include machine readable media that is not a transitory
  • the instructions 524 may further be transmitted or received over a communications network 526 using a transmission medium via the network interface device 520 utilizing any one of a number of transfer protocols (e.g., frame relay, internet protocol (IP), transmission control protocol (TCP), user datagram protocol (UDP), hypertext transfer protocol (HTTP), etc.).
  • transfer protocols e.g., frame relay, internet protocol (IP), transmission control protocol (TCP), user datagram protocol (UDP), hypertext transfer protocol (HTTP), etc.
  • Example communication networks may include a local area network (LAN), a wide area network (WAN), a packet data network (e.g., the Internet), mobile telephone networks (e.g., cellular networks), Plain Old Telephone (POTS) networks, and wireless data networks (e.g., Institute of Electrical and Electronics Engineers (IEEE) 802.11 family of standards known as Wi-Fi®, IEEE 802.16 family of standards known as WiMax®), IEEE 802.15.4 family of standards, a Long Term Evolution (LTE) family of standards, a Universal Mobile Telecommunications System (UMTS) family of standards, peer-to-peer (P2P) networks, among others.
  • LAN local area network
  • WAN wide area network
  • POTS Plain Old Telephone
  • wireless data networks e.g., Institute of Electrical and Electronics Engineers (IEEE) 802.11 family of standards known as Wi-Fi®, IEEE 802.16 family of standards known as WiMax®
  • IEEE 802.15.4 family of standards e.g., Institute of Electrical and Electronics Engineers (IEEE
  • the network interface device 520 may include one or more physical jacks (e.g., Ethernet, coaxial, or phone jacks) or one or more antennas to connect to the communications network 526.
  • the network interface device 520 may include a plurality of antennas to wirelessly communicate using at least one of single-input multiple-output (SEVIO), multiple-input multiple-output (MEVIO), or multiple-input single-output (MISO) techniques.
  • SEVIO single-input multiple-output
  • MEVIO multiple-input multiple-output
  • MISO multiple-input single-output
  • the network interface device 520 may wirelessly communicate using Multiple User MEVIO techniques.
  • transmission medium shall be taken to include any intangible medium that is capable of storing, encoding or carrying instructions for execution by the machine 500, and includes digital or analog communications signals or other intangible medium to facilitate communication of such software.
  • an apparatus for a user equipment comprises: memory and processing circuitry; wherein the processing circuitry is to:
  • DCI downlink control information
  • eNB evolved Node B
  • DL current downlink
  • DL physical downlink control channel
  • cPDCCH common PDCCH
  • the DCI requests transmission of uplink control information (UCI) over an extended physical uplink control channel (ePUCCH) in a subsequent UL subframe
  • ePUCCH comprises a block- interleaved frequency division multiple access (B-IFDMA) interlace
  • B-IFDMA block- interleaved frequency division multiple access
  • Example 2 the subject matter of any of the examples herein may optionally include wherein the orthogonal spreading sequence is a Hadamard sequence, a Zadoff-Chu sequence, an orthogonal cover code (OCC), or any combination of orthogonal spreading sequences.
  • the orthogonal spreading sequence is a Hadamard sequence, a Zadoff-Chu sequence, an orthogonal cover code (OCC), or any combination of orthogonal spreading sequences.
  • the subject matter of any of the examples herein may optionally include wherein the B-IFDMA interlace comprises 10 resource blocks (RBs) equally spaced across a channel bandwidth.
  • RBs resource blocks
  • Example 4 the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to spread the UCI using an orthogonal spreading sequence of length less than or equal to the number of REs in an RB of the interlace that are not used to transmit demodulation reference signals (DMRSs).
  • DMRSs demodulation reference signals
  • Example 5 the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to spread the UCI in the time domain using an orthogonal spreading sequence of length less than or equal to the number of orthogonal frequency division multiplexing (OFDM) symbols in the subframe that are not used to transmit demodulation reference signals (DMRSs).
  • OFDM orthogonal frequency division multiplexing
  • Example 6 the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to spread the UCI in the frequency domain using an orthogonal spreading sequence of length less than or equal to the number of orthogonal frequency division multiplexing (OFDM) subcarriers in a resource block of the subframe that are not used to transmit demodulation reference signals (DM-RSs).
  • OFDM orthogonal frequency division multiplexing
  • Example 7 the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to spread the UCI independently across time and frequency domains using a frequency-domain orthogonal spreading sequence and a time-domain orthogonal spreading sequence.
  • Example 8 the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to: code information bits of the UCI with a forward error correction code and append a cyclic redundancy check sequence thereto; rate match the coded information bits; modulate the coded and rate-matched information bits to one or more quadrature phase shift keying (QPSK) symbols; and map the QPSK symbols to REs of the B-IFDMA interlace with the orthogonal spreading sequence.
  • QPSK quadrature phase shift keying
  • Example 9 the subject matter of any of the examples herein may optionally include wherein the memory and processing circuitry art to: split information bits of the UCI into one or more parts; code each of the information bit parts of the UCI with a forward error correction code and append a cyclic redundancy check sequence thereto; rate match each of the coded information bit parts; modulate each of the coded and rate-matched information bit parts to one or more quadrature phase shift keying (QPSK) symbols; and map the QPSK symbols of each part to REs of the B-IFDMA interlace with an orthogonal spreading sequence.
  • QPSK quadrature phase shift keying
  • Example 10 the subject matter of any of the examples herein may optionally include wherein the forward error correction code is a tail-biting convolutional code (TBCC) or a Reed-Mueller (RM) code.
  • TBCC tail-biting convolutional code
  • RM Reed-Mueller
  • Example 11 the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to map the UCI to REs of the B-IFDMA interlace with an orthogonal spreading sequence as specified by starting and ending indexes contained in the DCI.
  • Example 12 the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to map the UCI to REs of the B-IFDMA interlace with orthogonal spreading sequences as specified by starting and ending indexes of frequency-domain and time-domain orthogonal spreading sequences contained in the DCI.
  • Example 13 the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to map the UCI to REs of the B-IFDMA interlace with an orthogonal spreading sequence as specified by an index identifying one of a plurality of orthogonal spreading sequences contained in the DCI.
  • Example 14 the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to implicitly determine the number of spreading sequences needed for UCI transmission based on the type of the UC
  • Example 15 the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to map the UCI to REs of the B-IFDMA interlace with spreading sequences as specified by indices contained in the DCI identifying one of a plurality of frequency-domain orthogonal spreading sequences and identifying one of a plurality of time- domain orthogonal spreading sequences.
  • Example 16 the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to, when the ePUCCH is triggered by the cPDCCH which requests transmission of UCI, map the UCI to resource elements (REs) of the B-IFDMA interlace with an orthogonal spreading sequence as semi- statistically configured by radio resource control (RRC) signaling.
  • RRC radio resource control
  • an apparatus for an evolved Node B comprises: memory and processing circuitry configured to: encode downlink control information (DCI) for transmission to a user equipment (UE) in a current downlink (DL) subframe over a physical downlink control channel (PDCCH) with an uplink (UL) resource grant or a common PDCCH (cPDCCH), wherein the DCI requests transmission of uplink control information (UCI) from the UE over an extended physical uplink control channel (ePUCCH) in a subsequent UL subframe; wherein the ePUCCH comprises a block-interleaved frequency division multiple access (B-IFDMA) interlace; and, decode the UCI from resource elements (REs) of the B-IFDMA interlace to which the UCI has been mapped with an an orthogonal spreading sequence to allow code division multiplexing of the UCI with UCI from other UEs.
  • DCI downlink control information
  • Example 18 the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to encode the DCI to contain starting and ending indexes of an orthogonal spreading sequence for the UE to use to map the UCI to REs of the B-IFDMA interlace.
  • Example 19 the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to encode the DCI to contain starting and ending indexes of frequency-domain and time-domain orthogonal spreading sequences for the UE to use to map the UCI to REs of the B-IFDMA interlace.
  • Example 20 the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to encode the DCI to contain identifying one of a plurality of orthogonal spreading sequences for the UE to use to map the UCI to REs of the B-IFDMA interlace.
  • Example 21 the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to encode the DCI to contain indices identifying one of a plurality of frequency-domain orthogonal spreading sequences and identifying one of a plurality of time-domain orthogonal spreading sequences for the UE to use to map the UCI to REs of the B-IFDMA interlace.
  • Example 22 the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to semi-statistically configure by radio resource control (RRC) signaling a particular orthogonal spreading sequence for the UE to use in responding to a UCI request via the cPDCCH.
  • RRC radio resource control
  • an apparatus for a user equipment comprises: memory and processing circuitry configured to: demodulate downlink control information (DCI) received from an evolved Node B (eNB) in a current downlink (DL) subframe over a physical downlink control channel (PDCCH) with an uplink (UL) resource grant that requests transmission of uplink control information (UCI) over a physical uplink shared channel (PUSCH) in a subsequent UL subframe; wherein the PUSCH comprises a block-interleaved frequency division multiple access (B-IFDMA) interlace in unlicensed spectrum; and, multiplex the UCI with uplink shared channel (UL-SCH) data or not as indicated by the DCI.
  • DCI downlink control information
  • eNB evolved Node B
  • UL uplink shared channel
  • B-IFDMA block-interleaved frequency division multiple access
  • Example 24 the subject matter of any of the examples herein may optionally include wherein whether or not the UCI is to be multiplexed with UL- SCH data is indicated by one bit of a three-bit field in the DCI.
  • Example 25 the subject matter of any of the examples herein may optionally include wherein an indication that the UCI is not to be multiplexed with UL-SCH data is indicated by a particular value of a two-bit field in the DCI.
  • Example 26 the subject matter of any of the examples herein may optionally include wherein whether or not the UCI is to be multiplexed with UL- SCH data is indicated by a phase shift of cell-specific reference signals (CRSs) transmitted by the e B.
  • CRSs cell-specific reference signals
  • Example 27 the subject matter of any of the examples herein may optionally include wherein whether or not the UCI is to be multiplexed with UL- SCH data is indicated by a size of a resource granted by the UL resource grant.
  • an apparatus for an evolved Node B comprises: memory and processing circuitry configured to: encode downlink control information (DCI) for transmission to a user equipment (UE) in a current downlink (DL) subframe over a physical downlink control channel (PDCCH) with an uplink (UL) resource grant and that requests transmission of uplink control information (UCI) over a physical uplink shared channel (PUSCH) in a subsequent UL subframe; wherein the PUSCH comprises a block-interleaved frequency division multiple access (B-IFDMA) interlace in unlicensed spectrum; and, indicate in the DCI whether or not the UCI should be multiplexed with uplink shared channel (UL-SCH) data.
  • DCI downlink control information
  • UE user equipment
  • UL uplink shared channel
  • B-IFDMA block-interleaved frequency division multiple access
  • Example 29 the subject matter of any of the examples herein may optionally include wherein whether or not the UCI is to be multiplexed with UL- SCH data is indicated by one bit of a three-bit field in the DCI.
  • Example 30 the subject matter of any of the examples herein may optionally include wherein an indication that the UCI is not to be multiplexed with UL-SCH data is indicated by a particular value of a two-bit field in the DCI.
  • Example 31 the subject matter of any of the examples herein may optionally include wherein whether or not the UCI is to be multiplexed with UL- SCH data is indicated by a phase shift of cell-specific reference signals (CRSs) transmitted by the eNB.
  • CRSs cell-specific reference signals
  • Example 32 the subject matter of any of the examples herein may optionally include wherein whether or not the UCI is to be multiplexed with UL- SCH data is indicated by a size of a resource granted by the UL resource grant.
  • Example 33 a method for operating a user equipment (UE) comprising performing the functions of the memory and processing circuitry as recited in any of the examples herein.
  • UE user equipment
  • Example 34 a user equipment (UE) comprising means for performing the functions of the memory and processing circuitry as recited in any of the examples herein.
  • Example 35 a computer-readable medium comprising instructions to cause a user equipment (UE), upon execution of the instructions by processing circuitry of the UE, to perform the functions of the memory and processing circuitry as recited in any of the examples herein.
  • UE user equipment
  • Example 36 a method for operating an evolved Node B (eNB) comprising performing the functions of the memory and processing circuitry as recited in any of the examples herein.
  • eNB evolved Node B
  • Example 37 an evolved Node B (eNB) comprising means for performing the functions of the memory and processing circuitry as recited in any of the examples herein.
  • eNB evolved Node B
  • Example 38 a computer-readable medium comprising instructions to cause an evolved Node B (eNB), upon execution of the instructions by processing circuitry of the eNB, to perform the functions of the memory and processing circuitry as recited in any of the examples herein.
  • eNB evolved Node B
  • Example 39 the subject matter of any of the Examples herein may further include a radio transceiver connected to the memory and processing circuitry.
  • the embodiments as described above may be implemented in various hardware configurations that may include a processor for executing instructions that perform the techniques described. Such instructions may be contained in a machine-readable medium such as a suitable storage medium or a memory or other processor-executable medium.
  • the embodiments as described herein may be implemented in a number of environments such as part of a wireless local area network (WLAN), 3rd Generation Partnership Project (3GPP) Universal Terrestrial Radio Access Network (UTRAN), or Long-Term-Evolution (LTE) or a Long-Term-Evolution (LTE) communication system, although the scope of the invention is not limited in this respect.
  • WLAN wireless local area network
  • 3GPP 3rd Generation Partnership Project
  • UTRAN Universal Terrestrial Radio Access Network
  • LTE Long-Term-Evolution
  • LTE Long-Term-Evolution
  • LTE Long-Term-Evolution
  • LTE Long-Term-Evolution
  • Antennas referred to herein may comprise one or more directional or omnidirectional antennas, including, for example, dipole antennas, monopole antennas, patch antennas, loop antennas, microstrip antennas or other types of antennas suitable for transmission of RF signals.
  • a single antenna with multiple apertures may be used instead of two or more antennas.
  • each aperture may be considered a separate antenna.
  • antennas may be effectively separated to take advantage of spatial diversity and the different channel characteristics that may result between each of antennas and the antennas of a transmitting station.
  • antennas may be separated by up to 1/10 of a wavelength or more.
  • a receiver as described herein may be configured to receive signals in accordance with specific communication standards, such as the Institute of Electrical and Electronics Engineers (IEEE) standards including IEEE 802.11 standards and/or proposed specifications for WLANs, although the scope of the invention is not limited in this respect as they may also be suitable to transmit and/or receive communications in accordance with other techniques and standards.
  • the receiver may be configured to receive signals in accordance with the IEEE 802.16-2004, the IEEE 802.16(e) and/or IEEE 802.16(m) standards for wireless metropolitan area networks (WMANs) including variations and evolutions thereof, although the scope of the invention is not limited in this respect as they may also be suitable to transmit and/or receive communications in accordance with other techniques and standards.
  • IEEE Institute of Electrical and Electronics Engineers
  • the receiver may be configured to receive signals in accordance with the Universal Terrestrial Radio Access Network (UTRAN) LTE communication standards.
  • UTRAN Universal Terrestrial Radio Access Network
  • IEEE 802.11 and IEEE 802.16 standards please refer to "IEEE Standards for Information Technology— Telecommunications and Information Exchange between Systems” - Local Area Networks - Specific Requirements - Part 11 "Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY), ISO/IEC 8802-11 : 1999", and Metropolitan Area Networks - Specific

Abstract

Methods and apparatus are described by which a user equipment (UE) transmits uplink control information (UCI) over an unlicensed carrier that are applicable to, for example, MulteFire and Licensed-Assisted Access (LAA) systems. Embodiments are described that utilize spreading sequences to code division multiplex the UCI with UCI from other UEs in a block-interleaved frequency division multiple access (B-IFDMA) waveform.

Description

CODE DIVISION MULTIPLEXING OF UPLINK CONTROL
INFORMATION Priority Claim
[0001] This application claims priority to United States Provisional Patent Application Serial Nos. 62/307,197, filed March 11, 2016, and 62/326,409, filed April 22, 2016, which are incorporated herein by reference in their entirety
Technical Field
[0002] Embodiments described herein relate generally to wireless networks and communications systems. Some embodiments relate to cellular communication networks including 3 GPP (Third Generation Partnership Project) networks, 3GPP LTE (Long Term Evolution) networks, and 3GPP LTE-A (LTE Advanced) networks, although the scope of the embodiments is not limited in this respect.
Background
[0003] The explosive growth in wireless traffic growth has led to an urgent need for rate improvement. With mature physical layer techniques, further improvement in spectral efficiency will be marginal. On the other hand, the scarcity of licensed spectrum in the low frequency band makes spectral expansion problematic. Thus, there are emerging interests in the operation of LTE systems in unlicensed spectrum. One such technique is labeled Licensed-Assisted Access (LAA), which expands the system bandwidth by utilizing the flexible carrier aggregation (CA) framework introduced by the LTE-Advanced where a primary component carrier (termed the primary cell or PCell) is operated in licensed spectrum and one or secondary component carriers (termed secondary cells or SCells) are operated in unlicensed spectrum. Another approach is a standalone LTE system in the unlicensed spectrum, where LTE-based technology solely operates in unlicensed spectrum without requiring an "anchor" in licensed spectrum what is called MulteFire (MF).
[0004] In order to operate in unlicensed spectrum, MF and LAA systems require signal structures and signaling techniques different from those of legacy LTE systems. For example, the non-exclusive nature of unlicensed spectrum requires a mechanism for LAA/MF systems to fairly share the wireless medium with other systems including those operating with other technologies such as Wi- Fi. LAA/MF incorporate a Listen-Before-Talk (LBT) procedure where radio transmitters first sense the medium and transmit only if the medium is sensed to be idle. The present disclosure relates to procedures for triggering and transmitting uplink control information (UCI) applicable to LAA/MF systems.
Brief Description of the Drawings
[0005] Fig. 1 illustrates an example UE and e B according to some embodiments.
[0006] Fig. 2 shows an example of a MulteFire or LAA frame structure according to some embodiments.
[0007] Fig. 3 illustrates a B-IFDMA interlace.
[0008] Fig. 4 illustrates aperiodic CSI reporting on unlicensed spectrum as triggered by an uplink grant.
[0009] Fig. 5 illustrates an example of a user equipment device according to some embodiments.
[0010] Fig. 6 illustrates an example of a computing machine according to some embodiments.
Detailed Description [0011] In Long Term Evolution (LTE) systems, a mobile terminal (referred to as a User Equipment or UE) connects to the cellular network via a base station (referred to as an evolved Node B or eNB). LTE systems usually utilize licensed spectrum for both uplink (UL) and downlink (DL) transmissions between a UE and an eNB. Fig. 1 illustrates an example of the components of a UE 400 and a base station or eNB 300. The eNB 300 includes processing circuitry 301 connected to a radio transceiver 302 for providing an air interface. The UE 400 includes processing circuitry 401 connected to a radio transceiver 402 for providing an air interface over the wireless medium. Each of the transceivers in the devices is connected to antennas 55.
[0012] Current LTE systems utilize orthogonal frequency division multiple access (OFDMA) based on orthogonal frequency division multiplexing (OFDM) for the downlink (DL) and a related technique, single carrier frequency division multiple access (SC-FDMA) based on DFT-precoded OFDM, for the uplink (UL). LTE systems may operate in either time division duplex (TDD) mode, where UL and DL communications are time-multiplexed in separate time-slots within the same frequency band, or frequency-division duplex (FDD) mode with uplink and downlink communication taking place in different frequency bands. Due to the lack of a pair of frequency bands in unlicensed spectrum to which the LTE system has exclusive use, unlicensed carriers for both LAA and MF are typically operated in TDD mode.
[0013] . In OFDMA/SC-FDMA, complex modulation symbols according to a modulation scheme such as QAM (quadrature amplitude modulation) are each individually mapped to a particular orthogonal frequency division multiplexing (OFDM) subcarrier transmitted during an OFDM symbol, referred to as a resource element (RE). An RE is the smallest physical resource in LTE. LTE also provides for MFMO (multi-input multi-output) operation where multiple layers of data are transmitted and received by multiple antennas and where each of the complex modulation symbols is mapped into one of the multiple transmission layers and then mapped to a particular antenna port. Each RE is then uniquely identified by the antenna port, sub-carrier position, and OFDM symbol index within a radio frame having a duration of 10 ms. Each radio frame consists of 10 sub-frames, and each sub-frame consists of two consecutive 0.5 ms slots. Each slot comprises six indexed OFDM symbols for an extended cyclic prefix and seven indexed OFDM symbols for a normal cyclic prefix. A group of resource elements corresponding to twelve consecutive subcarriers within a single slot is referred to as a resource block (RB) or, with reference to the physical layer, a physical resource block (PRB). [0014] In LTE, DL data flows to and from the medium access control (MAC) protocol layer via a transport channel referred to as the downlink shared channel (DL-SCH). UL data flows to and from the MAC layer via a transport channel referred to as the uplink shared channel (UL-SCH). The physical layer conveys UL data via the physical uplink shared channel (PUSCH) and DL data via the physical downlink shared channel (PDSCH). An eNB transmits downlink control information (DCI) to a UE via a physical downlink control channel (PDCCH). A UE transmits uplink control information (UCI) to an eNB via a physical uplink control channel (PUCCH) or via the PUSCH where the UCI may be multiplexed with UL data. In addition, each PUSCH or PUCCH transmission is accompanied by demodulation reference signals (DMRS) to allow demodulation of the PUSCH or PUCCH symbols by the eNB.
[0015] The UCI transmitted by a UE may include one or more of the following. Hybrid automatic-request repeat acknowledgements (HARQ-ACKs) are transmitted in response to data packet reception over the DL where, depending on whether the data packet reception is correct or incorrect, the HARQ-ACK has an ACK or a NAK value, respectively. (A HARQ-ACK may also be referred to herein as an A/N.) The UE may also transmit a scheduling request (SR) signals to request UL resources for data transmission. The UE transmits channel state information (CSI) reports either periodically or aperiodically at the request of the eNB. A CSI report may include a channel quality indicator (CQI) signal to inform the eNB of the DL channel conditions it experiences and a precoder matrix indicator/rank indicator (PMI/RI) signal to inform the eNB how to combine the transmission of a signal to the UE from multiple eNB antennas in accordance with a Multiple-Input Multiple-Output (MEVIO) principle.
[0016] LAA is based on the carrier aggregation framework of LTE. The primary component carrier (referred to as the primary cell or PCell) operates in licensed spectrum and acts as an anchor and is aggregated with one or more secondary component carriers (referred to as secondary cells or SCells) operating in unlicensed spectrum. An LAA system may also have one or more SCells operating in licensed spectrum as in conventional LTE carrier aggregation. In MF systems, the SCell and any PCells operate only in unlicensed spectrum. In both LAA and MF systems, a listen-before-talk (LBT) mechanism is implemented that involves a transmitter ensuring that there are no ongoing transmissions on the carrier frequency prior to transmitting. LBT provides a fair coextistence between the LAA/MF system and other technologies such as Wi-Fi utilizing the same spectrum. A transmitter performs the LBT procedure by assessing whether the frequency channel is available (i.e., a clear channel assesment or CCA) and, if the channel sensed to be idle, transmitting a contiguous burst over the channel that spans one or more subframes depending on the reserved maximum channel occupancy time (MCOT).
[0017] Fig. 2 shows an example of a MulteFire or LAA frame structure for time division duplex (TDD) mode according to one embodiment. In this structure, a DL burst from the e B is preceded by a regular LBT. The subsequent DL subframes contain a PDCCH that precedes the DL data. Among other things, the PDCCH may contain UL grants of PUSCH resources to the UE for transmission of UL data in UL subframes and/or may grant transmission of resources for a so-called long or extended physical uplink control channel (ePUCCH). The ePUCCH spans a subframe (i.e., 12 or 14 OFDM symbols) in the time domain and spans the system bandwidth in the frequency domain. Transmission of the ePUCCH from a UE may be triggered by a UL grant in the PDCCH or without an UL grant via what is referred to as the common PDCCH (cPDCCH). UL control signals may also be transmitted via a so-called shortened PUCCH (sPUCCH) format that is in the UL portion of the special subframe where the transition between DL and UL subframes occurs.
[0018] The waveform for transmission of the PUSCH and ePUCCH in MulteFire carriers and LAA unlicensed carriers is block-interleaved frequency division multiple access (B-IFDMA) which is a generalization of DFT-precoded OFDMA with interleaved subcarrier allocation. The B-IFDMA waveform is an interlaced structure where each interlace is made up of one or more RBs spaced apart in frequency. In one embodiment, each interlace comprises 10 RBs distributed (equally-spaced) over the entire system bandwidth. Single or multiple interlaces can be assigned to each UE. In one embodiment, the PUSCH is made up of one or more interlaces, and the ePUCCH is made up of one interlace. Fig. 3 illustrates a B-IFDMA interlace occupied by an ePUCCH. The design of a PUSCH interlace is similar. The ePUCCH interlace may be frequency multiplexed with PUSCH interlaces transmitted from the same UE or from different UEs anchored at the same e B. The reference signals and data symbols are time multiplexed with a DMRS located at symbol 3 of each slot for the PUSCH and at symbols 1 and 5 of each slot for the ePUCCH
[0019] Similar to the legacy LTE as described above, various types of UCI such as HARQ-ACK feedback for the PDSCH, scheduling requests (SR), and/or channel state information (CSI) feedback in the form of CSI reports may be transmitted via the sPUCCH, ePUCCH, or PUSCH. One aspect of the present disclosure relates to embodiments that utilize spreading sequences to code division multiplex the UCI within an ePUCCH with UCI transmitted from other UEs. Another aspect of the disclosure relates to embodiments by which an eNB triggers transmission of aperiodic CSI reports from a UE via the PUSCH.
Code Division Multiplexing of UCI
[0020] For a 20 MHz system bandwidth, each B-IFDMA interlace consists of 10 RBs in one embodiment. In one embodiment, each RB consists of 14 symbols, out of which 2 symbols are occupied by DMRSs. Effectively, then, each RB consists of 144 REs (12 REs/symbol and 12 symbols within a subframe) to result inl440 REs for each ePUCCH interlace. Transmission of UCI from only one UE over one interlace can thus be wasteful, and multiplexing of the UCI from multiple UEs may more efficiently utilize the ePUCCH resources. Described below are embodiments for code division multiplexing UCI within the ePUCCH via spreading sequences. These embodiments provide the ability to multiplex UCI for large number of UEs and/or the ability to multiplex variable size UCI payload bits
[0021] In one embodiment, the multiplexing of UCI is performed via X orthogonal spreading sequences, where X is an integer that can be up to 144 when there 144 REs per RB. Each coded quadrature phase shift keying (QPSK) symbol of the UCI is spread with a length 144 orthogonal spreading code in time and frequency domain. Frequency first mapping or time first mapping may be used to map the spread symbols to each RE. In another embodiment, up to 12 orthogonal Hadamard sequences may be be used across the frequency domain and time domain (i.e., across OFDM symbols) independently to effectively allow for up to 144 UCIs multiplexed within an interlace. In this case, each coded QPSK symbol is spread with a length 12 orthogonal spreading code in the time and frequency domains. Examples of the orthogonal sequences used for either embodiment include Zadoff-Chu sequences with different cyclic shifts, orthogonal cover codes (OCC), Hadamard sequences, or any combination thereof.
[0022] In the above embodiments, the information bits of the UCI may be coded with a forward error correction code such as a tail biting convolutional code (TBCC) or a Reed-Mueller code. An 8 or 16 bit cyclic redundancy check (CRC) may be appended to the information bits before coding. The coded bits are then rate matched before modulating to QPSK symbols and spreading with the indicated spreading sequence.
[0023] When 144 total spreading sequences are used, a total number of 20 coded bits can be transmitted via QPSK over one interlace. That is, each QPSK symbol (2 bits) is spread over an entire RB, and there are 10 RBs in one interlace to result in 20 bits. Stated differently, as a result of the spreading over 10 RBs, the UCI effectively occupies 10 REs. The following options may be used to transmit a larger number of coded bits. In a first option, in order to improve the number of possible coding capacity for each interlace, the number of spreading sequences can be reduced. For example, instead of 12 orthogonal sequences in time and frequency domain, 12 orthogonal sequences in time and 6 in frequency domain could be used so that each UCI effectively occupies 20 REs to effectively increase the number of coded bits to 40 bits. In a second option,
coded bits of the UCI are split and then mapped to the REs with different spreading sequences. In one embodiment, 40 coded bits are divided into 2 parts of 20 bits each. The coded bits after modulation to QPSK symbols are then spread across time/frequency using two spreading sequences out of the available 144 sequences.
[0024] The multiplexing capability is dependent on the number of DMRS sequences that can be embedded within ePUCCH. Legacy DMRS supports up to 12 different cyclic shifts so that the number of possible multiplexed UEs is limited to 12 if only multiplexing via cyclic shifts is used. The number of DMRS sequences that can be multiplexed within a subframe can be increased by increasing the number of symbols containing DMRS sequences. Orthogonal cover codes can also be applied over the DMRS symbols to increase the number of UEs that can be multiplexed.
[0025] It is also possible to multiplex UCI with different payload sizes. In one embodiment, coding and rate matching are applied to the UCI to result in a number of bits that, after modulation to QPSK symbols, may be mapped with a spreading sequence to the appropriate number of REs. For example, if the number of information bits in the UCI is 1, coding and rate-matching may be applied to result in 20 bits that can be mapped to 10 QPSK symbols as there are effectively 10 QPSK symbols available within each interlace if each QPSK symbol is maximally spread over each RB of the interlace with an orthogonal spreading sequence. If the number of coded bits exceeds the capacity allowed for one spreading sequence, then the coded bits of the UCI can be split as discussed above.
[0026] In another aspect, which particular spreading sequence is to be used for UCI transmission by a UE may be communicated via the UL grant. In one embodiment, the e B indicates the indices of the start and end of the spreading sequence out of the available number of spreading sequences via UL grant. The number of bits needed is 2*ceil(log(N)), where N is total number of spreading sequences. In one embodiment, N = 144, and the number of bits needed in UL grant is 2*8 = 16. In another embodiment, the eNB separately indicates the starting and ending indices of the spreading sequence in both the frequency and time domains. The number of bits needed for this is 4*ceil(log(N)), where N is total number of spreading sequences the time and frequency domains. In one embodiment, N = 12, and the number of bits needed in UL grant is 4*4 = 16. In another embodiment, the eNB indicates the index of the spreading sequence out of the available number of spreading sequences via UL grant, and the UE implicitly determines the number of spreading sequences needed for UCI transmission based on the type of the UCI. The number of bits needed for this embodiment is ceil(log(N)), where N is total number of spreading sequences. In one embodiment, N = 144, and the number of bits needed in the UL grant is 8. In another embodiment, the eNB separately indicates the starting index of the spreading sequence for both time and frequency domain spreading. The number of bits needed in this case is 2*ceil(log(N)), where N is total number of sequences in the time or frequency domains. In one embodiment, N = 12, and the number of bits needed in the UL grant is 2*4 = 8. The UE may implicitly determine the number of spreading sequences needed for UCI transmission based on the type of the UCI. In one embodiment, the next spreading sequence in the frequency domain is used if needed to transmit larger UCI payload sizes. In another embodiment, next spreading sequence in the time domain is used if needed to transmit larger UCI payload sizes.
[0027] In another embodiment, the ePUCCH is triggered by the cPDCCH. In this case, the sequence allocation for each UE is semi-statistically configured by radio resource control (RRC) signaling. When a trigger for one particular interlace is sent via the cPDCCH, all UEs configured for that interlace will use the corresponding sequence to spread the UCI and transmit.
Triggering Aperiodic CSI Reports for Transmission via PUSCH
[0028] In LTE, CRS is used for CSI measurement (CSI/PMI/RI) and demodulation of transmission modes TM1-TM7, while CRS is only used for CSI measurement in TM8. CSI-RS, a cell specific sparse sequence (in frequency and time domain compared to CRS) is used in transmission modes TM9 and TM10 for CSI measurements. For TM8, TM9 and TM10, UE specific DMRS is used for PDSCH demodulation. Based on the reception of CRS/CSI-RS, LTE Release 12 supports: 1) periodic reporting wherein the UE reports CSI periodically on preconfigured PUCCH/PUSCH resources with periods configured by the higher layers; and 2) aperiodic reporting wherein, the CSI report is triggered using DCI by dynamically assigning UL resources in the PUSCH transmission. A UE performs aperiodic CSI (ACSI) reporting using the PUSCH in subframe n+k, upon receiving in subframe n either a DCI format 0, or a Random Access Response Grant. The eNodeB can configure the periodicity parameters, too. The size of a single report is limited up to about 11 bits depending on the reporting mode. Aperiodic reporting is explicitly triggered (requested) by the eNodeB using a specific bit in the PDCCH UL grant. Aperiodic report can be either piggybacked with data or sent alone on PUSCH. When a CSI report is transmitted together with uplink data on PUSCH, it is multiplexed with the transport block by the so-called LI layer (i.e., the CSI report is not part of the uplink transport block). [0029] CSI-RS based transmission modes including TM9, TM10 are supported on LAA SCell in MF systems. Embodiments described below relate to the transmission of aperiodic CSI reports for LAA and MF systems, over the interlaced structure of the uplink waveform. The resources required for aperiodic CSI reporting may be much less than the resource allocation granularity for the interlaced structure of the UL waveform for operation on unlicensed spectrum. Some embodiments discussed below deal with the problem of how to efficiently transmit the aperiodic CSI reporting in LAA and MF systems. Some embodiments relate to manner which an ACSI reporting request is indicated to the UE.
[0030] Under licensed assisted access operation, aperiodic CSI reports can be transmitted via the PCell with Release 13 compliant UEs by dynamically allocating PUSCH resources on the PCell via a UL grant. The aperiodic CSI reports can alternatively be transmitted via on the PUSCH on unlicensed carrier providing a scalable approach as the number of configured unlicensed carriers is increased. An example of an aperiodic CSI report is shown in Fig. 4, wherein a UL grant triggers the CSI reporting event at the UE 4ms (i.e., 4 subframes) after the transmission of the UL grant.
[0031] As mentioned earlier, an aperiodic CSI report can be piggybacked with data on the PUSCH. On the other hand, it is possible that in some cases, only aperiodic CSI is needed to be reported because, e.g., the e B only wants the ACSI reporting or the UE does not have any UL data to multiplex the aperiodic CSI reporting with. The aperiodic CSI then needs to be sent alone on the PUSCH. In legacy LTE systems, the way that the eNB supports this situation of only requiring the ACSI reporting is implicit by assigning small amount of resources (e.g., less than or equal to 4 PRBs) when triggering the CSI report by DCI signaling (UL grant) with MCS index set to one or the reserved values {29, 30, 31 } .
[0032] As discussed above, B-IFDMA is the UL waveform for transmission of PUSCH/PUCCH on unlicensed spectrum in MF and LAA systems where each interlace consists of 10 PRBs, distributed (equally-spaced) over the entire system bandwidth. Single or multiple interlaces can be assigned to each UE so the minimum resource allocation granularity is one interlace or equivalently 10 PRBs in MF and LAA systems. It is then important to consider an efficient way to transmit only the aperiodic CSI reporting, ACSI-only, (possibly with less waste of the physical resources). Besides the efficiency in using the resources, depending on the pattern used to allocate the resource elements for CSI reporting, it may be possible that if there is no transmission in some of the resources so that the channel may be acquired by other operators after sensing the idle media. Described below are embodiments relating to methods for indicating ACSI reporting-only transmissions, differentiating ACSI-only reporting from general ACSI reporting (with/without UL data), and improving the resource utilization efficiency of ACSI reporting-only transmission.
[0033] In one embodiment, aperiodic CSI-only reporting is explicitly indicated through the ACSI request field in the DCI. In LTE carrier-aggregation, two bits are considered to indicate different options for aperiodic CSI transmission with UL-SCH (or no aperiodic CSI report being triggered). It's possible to extend and/or modify the design to include the option of ACSI-only as well. There are multiple possible ways for such indication. In a first option, another bit in addition to the existing bits of aperiodic CSI request field is provided. The DCI with this additional bit may be sent only on the UE specific PDCCH search space. Either the MSB or the LSB in the extended 3-bit field can be considered to indicate whether the aperiodic CSI request is ACSI-only without UL-SCH or ACSI with UL-SCH. In a second option, the mapping between the two-bit aperiodic CSI request field states and different ACSI transmission indications is redefined. In one embodiment, the following mapping between the ACSI request field states and different indications (with possible implicit indication for the option of no aperiodic CSI by, e.g., changing the CRS) may be defined: 1) 00: SIB-2 linked aperiodic CSI with UL-SCH; 2) 01 : first higher layer signaling to indicate the target cells for aperiodic CSI with UL-SCH; 3) 10: second higher layer signaling to indicate the target cells for aperiodic CSI with UL-SCH; and 4) 11 : aperiodic CSI only without UL-SCH.
[0034] In one embodiment, the indication of the ACSI-only is implicitly indicated. One way to do this is through changing the CRS (e.g., the phase shift), wherein UE should test two hypotheses for the CRS to identify the indication. One embodiment of this option is for the e B to transmit the CRS sequence {x} the same as legacy LTE when ACSI is multiplexed with UL data and to transmit {-x} for ACSI-only transmission. Another way to indicate aperiodic CSI reporting- only via the PUSCH is via resource allocation signaling. For example, denoting the smallest resource allocation granularity by Y with Y<10, the method to indicate UCI-only PUSCH transmission in legacy LTE can be extended by letting the number of PRBs constraint be NPRB < Y where N^PRB is the number of PRBs allocated.
[0035] The following embodiments relate to the manner in which ACSI reports are transmitted. In one embodiment, appropriate for LAA systems, if the aperiodic CSI reporting is needed while the UE does not have any UL data, the aperiodic CSI reporting may be configured to be transmitted on PCell PUSCH. Since the PCell does not use the B-IFDMA PUSCH waveform, the resource allocation granularity will not cause any problems. The eNB then can support transmission of aperiodic CSI reporting with no UL data, by assigning less than or equal to 4 PRBs when triggering the CSI report by UL grant.
[0036] In other embodiments, applicable to both LAA systems and MF systems, the transmission of aperiodic CSI reporting may be over the SCell PUSCH. In one embodiment, if the eNB only needs the ACSI reporting, then even if the UE has UL data, it does not multiplex the data with ACSI report and only transmits the ACSI (with possible waste of remaining resources if the resource allocation granularity does not match with the size of the ACSI reporting). Otherwise, when the UE has UL data available to multiplex the CSI with, the aperiodic CSI is piggybacked with the data. If the UE does not have UL data, only ACSI is transmitted on the SCell PUSCH. The multiplexing of CSI report and UL data can be done in the time and/or frequency domain. For example, the UE may first load the ACSI information bits and then load additional data bits for the remaining of the PRBs.
[0037] In another embodiment, the minimum resource allocation granularity is configured to be less than 10 PRBs. The configuration can be signaled by the eNB when triggering the aperiodic CSI reporting, or determined by the UE based on its UL data availability. In order to reduce the resource allocation granularity, the following options may be applied. One option is to partition the bandwidth into several groups, e.g., 10 groups. It is then possible to allocate one interlace in each group or to allocate one interlace in a subset of the groups (reducing the periodicity of the PRBs of one interlace). Another option is to enable slot-based resource assignment. In this way, it is possible to allocate one or two slots of an interlace to the UE. Another option is to assign the edge PRBs (i.e., at the edges of the system bandwidth) for transmission of ACSI-only. The rest of the PRBs of an interlace can possibly be assigned to other UEs.
Example UE Description
[0038] As used herein, the term "circuitry" may refer to, be part of, or include an Application Specific Integrated Circuit (ASIC), an electronic circuit, a processor (shared, dedicated, or group), and/or memory (shared, dedicated, or group) that execute one or more software or firmware programs, a combinational logic circuit, and/or other suitable hardware components that provide
the described functionality. In some embodiments, the circuitry may be implemented in, or functions associated with the circuitry may be implemented by, one or more software or firmware modules. In some embodiments, circuitry may include logic, at least partially operable in hardware.
[0039] Embodiments described herein may be implemented into a system using any suitably configured hardware and/or software. Fig. 5 illustrates, for one embodiment, example components of a User Equipment (UE) device 100. In some embodiments, the UE device 100 may include application circuitry 102, baseband circuitry 104, Radio Frequency (RF) circuitry 106, front- end module (FEM) circuitry 108 and one or more antennas 110, coupled together at least as shown.
[0040] The application circuitry 102 may include one or more application processors. For example, the application circuitry 102 may include circuitry such as, but not limited to, one or more single-core or multi-core processors. The processor(s) may include any combination of general-purpose processors and dedicated processors (e.g., graphics processors, application processors, etc.). The processors may be coupled with and/or may include memory/storage and may be configured to execute instructions stored in the memory/storage to enable various applications and/or operating systems to run on the system.
[0041] The baseband circuitry 104 may include circuitry such as, but not limited to, one or more single-core or multi-core processors. The baseband circuitry 104 may include one or more baseband processors and/or control logic to process baseband signals received from a receive signal path of the RF circuitry 106 and to generate baseband signals for a transmit signal path of the RF circuitry 106. Baseband processing circuity 104 may interface with the application circuitry 102 for generation and processing of the baseband signals and for controlling operations of the RF circuitry 106. For example, in some embodiments, the baseband circuitry 104 may include a second generation (2G) baseband processor 104a, third generation (3G) baseband processor 104b, fourth generation (4G) baseband processor 104c, and/or other baseband processor(s) 104d for other existing generations, generations in development or to be developed in the future (e.g., fifth generation (5G), 6G, etc.). The baseband circuitry 104 (e.g., one or more of baseband processors 104a-d) may handle various radio control functions that enable communication with one or more radio networks via the RF circuitry 106. The radio control functions may include, but are not limited to, signal modulation/demodulation,
encoding/decoding, radio frequency shifting, etc. In some embodiments, modulation/demodulation circuitry of the baseband circuitry 104 may include Fast-Fourier Transform (FFT), precoding, and/or constellation
mapping/demapping functionality. In some embodiments, encoding/decoding circuitry of the baseband circuitry 104 may include convolution, tail-biting convolution, turbo, Viterbi, and/or Low Density Parity Check (LDPC) encoder/decoder functionality. Embodiments of modulation/demodulation and encoder/decoder functionality are not limited to these examples and may include other suitable functionality in other embodiments.
[0042] In some embodiments, the baseband circuitry 104 may include elements of a protocol stack such as, for example, elements of an evolved universal terrestrial radio access network (EUTRAN) protocol including, for example, physical (PHY), media access control (MAC), radio link control (RLC), packet data convergence protocol (PDCP), and/or radio resource control (RRC) elements. A central processing unit (CPU) 104e of the baseband circuitry 104 may be configured to run elements of the protocol stack for signaling of the PHY, MAC, RLC, PDCP and/or RRC layers. In some embodiments, the baseband circuitry may include one or more audio digital signal processor(s) (DSP) 104f. The audio DSP(s) 104f may be include elements for compression/decompression and echo cancellation and may include other suitable processing elements in other embodiments. Components of the baseband circuitry may be suitably combined in a single chip, a single chipset, or disposed on a same circuit board in some embodiments. In some embodiments, some or all of the constituent components of the baseband circuitry 104 and the application circuitry 102 may be implemented together such as, for example, on a system on a chip (SOC).
[0043] In some embodiments, the baseband circuitry 104 may provide for communication compatible with one or more radio technologies. For example, in some embodiments, the baseband circuitry 104 may support communication with an evolved universal terrestrial radio access network (EUTRAN) and/or other wireless metropolitan area networks (WMAN), a wireless local area network (WLAN), a wireless personal area network (WPAN). Embodiments in which the baseband circuitry 104 is configured to support radio
communications of more than one wireless protocol may be referred to as multi- mode baseband circuitry.
[0044] RF circuitry 106 may enable communication with wireless networks using modulated electromagnetic radiation through a non-solid medium. In various embodiments, the RF circuitry 106 may include switches, filters, amplifiers, etc. to facilitate the communication with the wireless network. RF circuitry 106 may include a receive signal path which may include circuitry to down-convert RF signals received from the FEM circuitry 108 and provide baseband signals to the baseband circuitry 104. RF circuitry 106 may also include a transmit signal path which may include circuitry to up-convert baseband signals provided by the baseband circuitry 104 and provide RF output signals to the FEM circuitry 108 for transmission.
[0045] In some embodiments, the RF circuitry 106 may include a receive signal path and a transmit signal path. The receive signal path of the RF circuitry 106 may include mixer circuitry 106a, amplifier circuitry 106b and filter circuitry 106c. The transmit signal path of the RF circuitry 106 may include filter circuitry 106c and mixer circuitry 106a. RF circuitry 106 may also include synthesizer circuitry 106d for synthesizing a frequency for use by the mixer circuitry 106a of the receive signal path and the transmit signal path. In some embodiments, the mixer circuitry 106a of the receive signal path may be configured to down-convert RF signals received from the FEM circuitry 108 based on the synthesized frequency provided by synthesizer circuitry 106d. The amplifier circuitry 106b may be configured to amplify the down-converted signals and the filter circuitry 106c may be a low-pass filter (LPF) or band-pass filter (BPF) configured to remove unwanted signals from the down-converted signals to generate output baseband signals. Output baseband signals may be provided to the baseband circuitry 104 for further processing. In some embodiments, the output baseband signals may be zero-frequency baseband signals, although this is not a requirement. In some embodiments, mixer circuitry 106a of the receive signal path may comprise passive mixers, although the scope of the embodiments is not limited in this respect.
[0046] In some embodiments, the mixer circuitry 106a of the transmit signal path may be configured to up-convert input baseband signals based on the synthesized frequency provided by the synthesizer circuitry 106d to generate RF output signals for the FEM circuitry 108. The baseband signals may be provided by the baseband circuitry 104 and may be filtered by filter circuitry 106c. The filter circuitry 106c may include a low-pass filter (LPF), although the scope of the embodiments is not limited in this respect.
[0047] In some embodiments, the mixer circuitry 106a of the receive signal path and the mixer circuitry 106a of the transmit signal path may include two or more mixers and may be arranged for quadrature downconversion and/or upconversion respectively. In some embodiments, the mixer circuitry 106a of the receive signal path and the mixer circuitry 106a of the transmit signal path may include two or more mixers and may be arranged for image rejection (e.g.,
Hartley image rejection). In some embodiments, the mixer circuitry 106a of the receive signal path and the mixer circuitry 106a may be arranged for direct downconversion and/or direct upconversion, respectively. In some embodiments, the mixer circuitry 106a of the receive signal path and the mixer circuitry 106a of the transmit signal path may be configured for super-heterodyne operation.
[0048] In some embodiments, the output baseband signals and the input baseband signals may be analog baseband signals, although the scope of the embodiments is not limited in this respect. In some alternate embodiments, the output baseband signals and the input baseband signals may be digital baseband signals. In these alternate embodiments, the RF circuitry 106 may include analog-to-digital converter (ADC) and digital-to-analog converter (DAC) circuitry and the baseband circuitry 104 may include a digital baseband interface to communicate with the RF circuitry 106.
[0049] In some dual-mode embodiments, a separate radio IC circuitry may be provided for processing signals for each spectrum, although the scope of the embodiments is not limited in this respect.
[0050] In some embodiments, the synthesizer circuitry 106d may be a fractional -N synthesizer or a fractional N/N+1 synthesizer, although the scope of the embodiments is not limited in this respect as other types of frequency synthesizers may be suitable. For example, synthesizer circuitry 106d may be a delta-sigma synthesizer, a frequency multiplier, or a synthesizer comprising a phase-locked loop with a frequency divider.
[0051] The synthesizer circuitry 106d may be configured to synthesize an output frequency for use by the mixer circuitry 106a of the RF circuitry 106 based on a frequency input and a divider control input. In some embodiments, the synthesizer circuitry 106d may be a fractional N/N+1 synthesizer.
[0052] In some embodiments, frequency input may be provided by a voltage controlled oscillator (VCO), although that is not a requirement. Divider control input may be provided by either the baseband circuitry 104 or the applications processor 102 depending on the desired output frequency. In some embodiments, a divider control input (e.g., N) may be determined from a look-up table based on a channel indicated by the applications processor 102.
[0053] Synthesizer circuitry 106d of the RF circuitry 106 may include a divider, a delay-locked loop (DLL), a multiplexer and a phase accumulator. In some embodiments, the divider may be a dual modulus divider (DMD) and the phase accumulator may be a digital phase accumulator (DP A). In some embodiments, the DMD may be configured to divide the input signal by either N or N+l (e.g., based on a carry out) to provide a fractional division ratio. In some example embodiments, the DLL may include a set of cascaded, tunable, delay elements, a phase detector, a charge pump and a D-type flip-flop. In these embodiments, the delay elements may be configured to break a VCO period up into Nd equal packets of phase, where Nd is the number of delay elements in the delay line. In this way, the DLL provides negative feedback to help ensure that the total delay through the delay line is one VCO cycle.
[0054] In some embodiments, synthesizer circuitry 106d may be configured to generate a carrier frequency as the output frequency, while in other embodiments, the output frequency may be a multiple of the carrier frequency (e.g., twice the carrier frequency, four times the carrier frequency) and used in conjunction with quadrature generator and divider circuitry to generate multiple signals at the carrier frequency with multiple different phases with respect to each other. In some embodiments, the output frequency may be a LO frequency (fix)). In some embodiments, the RF circuitry 106 may include an IQ/polar converter.
[0055] FEM circuitry 108 may include a receive signal path which may include circuitry configured to operate on RF signals received from one or more antennas 110, amplify the received signals and provide the amplified versions of the received signals to the RF circuitry 106 for further processing. FEM circuitry 108 may also include a transmit signal path which may include circuitry configured to amplify signals for transmission provided by the RF circuitry 106 for transmission by one or more of the one or more antennas 110.
[0056] In some embodiments, the FEM circuitry 108 may include a TX/RX switch to switch between transmit mode and receive mode operation. The FEM circuitry may include a receive signal path and a transmit signal path. The receive signal path of the FEM circuitry may include a low-noise amplifier (LNA) to amplify received RF signals and provide the amplified received RF signals as an output (e.g., to the RF circuitry 106). The transmit signal path of the FEM circuitry 108 may include a power amplifier (PA) to amplify input RF signals (e.g., provided by RF circuitry 106), and one or more filters to generate RF signals for subsequent transmission (e.g., by one or more of the one or more antennas 110.
[0057] In some embodiments, the UE device 100 may include additional elements such as, for example, memory/storage, display, camera, sensor, and/or input/output (I/O) interface. Example Machine Description
[0058] Fig. 6 illustrates a block diagram of an example machine 500 upon which any one or more of the techniques (e.g., methodologies) discussed herein may perform. In alternative embodiments, the machine 500 may operate as a standalone device or may be connected (e.g., networked) to other machines. In a networked deployment, the machine 500 may operate in the capacity of a server machine, a client machine, or both in server-client network environments. In an example, the machine 500 may act as a peer machine in peer-to-peer (P2P) (or other distributed) network environment. The machine 500 may be a user equipment (UE), evolved Node B (eNB), Wi-Fi access point (AP), Wi-Fi station (STA), personal computer (PC), a tablet PC, a set-top box (STB), a personal digital assistant (PDA), a mobile telephone, a smart phone, a web appliance, a network router, switch or bridge, or any machine capable of executing instructions (sequential or otherwise) that specify actions to be taken by that machine. Further, while only a single machine is illustrated, the term "machine" shall also be taken to include any collection of machines that individually or jointly execute a set (or multiple sets) of instructions to perform any one or more of the methodologies discussed herein, such as cloud computing, software as a service (SaaS), other computer cluster configurations.
[0059] Examples, as described herein, may include, or may operate on, logic or a number of components, modules, or mechanisms. Modules are tangible entities (e.g., hardware) capable of performing specified operations and may be configured or arranged in a certain manner. In an example, circuits may be arranged (e.g., internally or with respect to external entities such as other circuits) in a specified manner as a module. In an example, the whole or part of one or more computer systems (e.g., a standalone, client or server computer system) or one or more hardware processors may be configured by firmware or software (e.g., instructions, an application portion, or an application) as a module that operates to perform specified operations. In an example, the software may reside on a machine readable medium. In an example, the software, when executed by the underlying hardware of the module, causes the hardware to perform the specified operations. [0060] Accordingly, the term "module" is understood to encompass a tangible entity, be that an entity that is physically constructed, specifically configured (e.g., hardwired), or temporarily (e.g., transitorily) configured (e.g., programmed) to operate in a specified manner or to perform part or all of any operation described herein. Considering examples in which modules are temporarily configured, each of the modules need not be instantiated at any one moment in time. For example, where the modules comprise a general-purpose hardware processor configured using software, the general-purpose hardware processor may be configured as respective different modules at different times. Software may accordingly configure a hardware processor, for example, to constitute a particular module at one instance of time and to constitute a different module at a different instance of time.
[0061] Machine (e.g., computer system) 500 may include a hardware processor 502 (e.g., a central processing unit (CPU), a graphics processing unit (GPU), a hardware processor core, or any combination thereof), a main memory 504 and a static memory 506, some or all of which may communicate with each other via an interlink (e.g., bus) 508. The machine 500 may further include a display unit 510, an alphanumeric input device 512 (e.g., a keyboard), and a user interface (UI) navigation device 514 (e.g., a mouse). In an example, the display unit 510, input device 512 and UI navigation device 514 may be a touch screen display. The machine 500 may additionally include a storage device (e.g., drive unit) 516, a signal generation device 518 (e.g., a speaker), a network interface device 520, and one or more sensors 521, such as a global positioning system (GPS) sensor, compass, accelerometer, or other sensor. The machine 500 may include an output controller 528, such as a serial (e.g., universal serial bus (USB), parallel, or other wired or wireless (e.g., infrared (IR), near field communication (NFC), etc.) connection to communicate or control one or more peripheral devices (e.g., a printer, card reader, etc.).
[0062] The storage device 516 may include a machine readable medium 522 on which is stored one or more sets of data structures or instructions 524 (e.g., software) embodying or utilized by any one or more of the techniques or functions described herein. The instructions 524 may also reside, completely or at least partially, within the main memory 504, within static memory 506, or within the hardware processor 502 during execution thereof by the machine 500. In an example, one or any combination of the hardware processor 502, the main memory 504, the static memory 506, or the storage device 516 may constitute machine readable media.
[0063] While the machine readable medium 522 is illustrated as a single medium, the term "machine readable medium" may include a single medium or multiple media (e.g., a centralized or distributed database, and/or associated caches and servers) configured to store the one or more instructions 524.
[0064] The term "machine readable medium" may include any medium that is capable of storing, encoding, or carrying instructions for execution by the machine 500 and that cause the machine 500 to perform any one or more of the techniques of the present disclosure, or that is capable of storing, encoding or carrying data structures used by or associated with such instructions. Non- limiting machine readable medium examples may include solid-state memories, and optical and magnetic media. Specific examples of machine readable media may include: non-volatile memory, such as semiconductor memory devices (e.g., Electrically Programmable Read-Only Memory (EPROM), Electrically Erasable Programmable Read-Only Memory (EEPROM)) and flash memory devices; magnetic disks, such as internal hard disks and removable disks; magneto-optical disks; Random Access Memory (RAM); and CD-ROM and DVD-ROM disks. In some examples, machine readable media may include non-transitory machine readable media. In some examples, machine readable media may include machine readable media that is not a transitory propagating signal.
[0065] The instructions 524 may further be transmitted or received over a communications network 526 using a transmission medium via the network interface device 520 utilizing any one of a number of transfer protocols (e.g., frame relay, internet protocol (IP), transmission control protocol (TCP), user datagram protocol (UDP), hypertext transfer protocol (HTTP), etc.). Example communication networks may include a local area network (LAN), a wide area network (WAN), a packet data network (e.g., the Internet), mobile telephone networks (e.g., cellular networks), Plain Old Telephone (POTS) networks, and wireless data networks (e.g., Institute of Electrical and Electronics Engineers (IEEE) 802.11 family of standards known as Wi-Fi®, IEEE 802.16 family of standards known as WiMax®), IEEE 802.15.4 family of standards, a Long Term Evolution (LTE) family of standards, a Universal Mobile Telecommunications System (UMTS) family of standards, peer-to-peer (P2P) networks, among others. In an example, the network interface device 520 may include one or more physical jacks (e.g., Ethernet, coaxial, or phone jacks) or one or more antennas to connect to the communications network 526. In an example, the network interface device 520 may include a plurality of antennas to wirelessly communicate using at least one of single-input multiple-output (SEVIO), multiple-input multiple-output (MEVIO), or multiple-input single-output (MISO) techniques. In some examples, the network interface device 520 may wirelessly communicate using Multiple User MEVIO techniques. The term "transmission medium" shall be taken to include any intangible medium that is capable of storing, encoding or carrying instructions for execution by the machine 500, and includes digital or analog communications signals or other intangible medium to facilitate communication of such software.
Additional Notes and Examples
[0066] In Example 1, an apparatus for a user equipment (UE) comprises: memory and processing circuitry; wherein the processing circuitry is to:
demodulate downlink control information (DCI) received from an evolved Node B (eNB) in a current downlink (DL) subframe over a physical downlink control channel (PDCCH) with an uplink (UL) resource grant or over a common PDCCH (cPDCCH), wherein the DCI requests transmission of uplink control information (UCI) over an extended physical uplink control channel (ePUCCH) in a subsequent UL subframe; wherein the ePUCCH comprises a block- interleaved frequency division multiple access (B-IFDMA) interlace; and, map the UCI to resource elements (REs) of the B-IFDMA interlace with an orthogonal spreading sequence to allow code division multiplexing of the UCI with UCI from other UEs.
[0067] In Example 2, the subject matter of any of the examples herein may optionally include wherein the orthogonal spreading sequence is a Hadamard sequence, a Zadoff-Chu sequence, an orthogonal cover code (OCC), or any combination of orthogonal spreading sequences. [0068] In Example 3, the subject matter of any of the examples herein may optionally include wherein the B-IFDMA interlace comprises 10 resource blocks (RBs) equally spaced across a channel bandwidth.
[0069] In Example 4, the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to spread the UCI using an orthogonal spreading sequence of length less than or equal to the number of REs in an RB of the interlace that are not used to transmit demodulation reference signals (DMRSs).
[0070] In Example 5, the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to spread the UCI in the time domain using an orthogonal spreading sequence of length less than or equal to the number of orthogonal frequency division multiplexing (OFDM) symbols in the subframe that are not used to transmit demodulation reference signals (DMRSs).
[0071] In Example 6, the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to spread the UCI in the frequency domain using an orthogonal spreading sequence of length less than or equal to the number of orthogonal frequency division multiplexing (OFDM) subcarriers in a resource block of the subframe that are not used to transmit demodulation reference signals (DM-RSs).
[0072] In Example 7, the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to spread the UCI independently across time and frequency domains using a frequency-domain orthogonal spreading sequence and a time-domain orthogonal spreading sequence.
[0073] In Example 8, the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to: code information bits of the UCI with a forward error correction code and append a cyclic redundancy check sequence thereto; rate match the coded information bits; modulate the coded and rate-matched information bits to one or more quadrature phase shift keying (QPSK) symbols; and map the QPSK symbols to REs of the B-IFDMA interlace with the orthogonal spreading sequence. [0074] In Example 9, the subject matter of any of the examples herein may optionally include wherein the memory and processing circuitry art to: split information bits of the UCI into one or more parts; code each of the information bit parts of the UCI with a forward error correction code and append a cyclic redundancy check sequence thereto; rate match each of the coded information bit parts; modulate each of the coded and rate-matched information bit parts to one or more quadrature phase shift keying (QPSK) symbols; and map the QPSK symbols of each part to REs of the B-IFDMA interlace with an orthogonal spreading sequence.
[0075] In Example 10, the subject matter of any of the examples herein may optionally include wherein the forward error correction code is a tail-biting convolutional code (TBCC) or a Reed-Mueller (RM) code.
[0076] In Example 11, the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to map the UCI to REs of the B-IFDMA interlace with an orthogonal spreading sequence as specified by starting and ending indexes contained in the DCI.
[0077] In Example 12, the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to map the UCI to REs of the B-IFDMA interlace with orthogonal spreading sequences as specified by starting and ending indexes of frequency-domain and time-domain orthogonal spreading sequences contained in the DCI.
[0078] In Example 13, the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to map the UCI to REs of the B-IFDMA interlace with an orthogonal spreading sequence as specified by an index identifying one of a plurality of orthogonal spreading sequences contained in the DCI.
[0079] In Example 14, the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to implicitly determine the number of spreading sequences needed for UCI transmission based on the type of the UC
[0080] In Example 15, the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to map the UCI to REs of the B-IFDMA interlace with spreading sequences as specified by indices contained in the DCI identifying one of a plurality of frequency-domain orthogonal spreading sequences and identifying one of a plurality of time- domain orthogonal spreading sequences.
[0081] In Example 16, the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to, when the ePUCCH is triggered by the cPDCCH which requests transmission of UCI, map the UCI to resource elements (REs) of the B-IFDMA interlace with an orthogonal spreading sequence as semi- statistically configured by radio resource control (RRC) signaling.
[0082] In Example 17, an apparatus for an evolved Node B (e B) comprises: memory and processing circuitry configured to: encode downlink control information (DCI) for transmission to a user equipment (UE) in a current downlink (DL) subframe over a physical downlink control channel (PDCCH) with an uplink (UL) resource grant or a common PDCCH (cPDCCH), wherein the DCI requests transmission of uplink control information (UCI) from the UE over an extended physical uplink control channel (ePUCCH) in a subsequent UL subframe; wherein the ePUCCH comprises a block-interleaved frequency division multiple access (B-IFDMA) interlace; and, decode the UCI from resource elements (REs) of the B-IFDMA interlace to which the UCI has been mapped with an an orthogonal spreading sequence to allow code division multiplexing of the UCI with UCI from other UEs.
[0083] In Example 18, the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to encode the DCI to contain starting and ending indexes of an orthogonal spreading sequence for the UE to use to map the UCI to REs of the B-IFDMA interlace.
[0084] In Example 19, the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to encode the DCI to contain starting and ending indexes of frequency-domain and time-domain orthogonal spreading sequences for the UE to use to map the UCI to REs of the B-IFDMA interlace.
[0085] In Example 20, the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to encode the DCI to contain identifying one of a plurality of orthogonal spreading sequences for the UE to use to map the UCI to REs of the B-IFDMA interlace.
[0086] In Example 21, the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to encode the DCI to contain indices identifying one of a plurality of frequency-domain orthogonal spreading sequences and identifying one of a plurality of time-domain orthogonal spreading sequences for the UE to use to map the UCI to REs of the B-IFDMA interlace.
[0087] In Example 22, the subject matter of any of the examples herein may optionally include wherein the processing circuitry is to semi-statistically configure by radio resource control (RRC) signaling a particular orthogonal spreading sequence for the UE to use in responding to a UCI request via the cPDCCH.
[0088] In Example 23, an apparatus for a user equipment (UE) comprises: memory and processing circuitry configured to: demodulate downlink control information (DCI) received from an evolved Node B (eNB) in a current downlink (DL) subframe over a physical downlink control channel (PDCCH) with an uplink (UL) resource grant that requests transmission of uplink control information (UCI) over a physical uplink shared channel (PUSCH) in a subsequent UL subframe; wherein the PUSCH comprises a block-interleaved frequency division multiple access (B-IFDMA) interlace in unlicensed spectrum; and, multiplex the UCI with uplink shared channel (UL-SCH) data or not as indicated by the DCI.
[0089] In Example 24, the subject matter of any of the examples herein may optionally include wherein whether or not the UCI is to be multiplexed with UL- SCH data is indicated by one bit of a three-bit field in the DCI.
[0090] In Example 25, the subject matter of any of the examples herein may optionally include wherein an indication that the UCI is not to be multiplexed with UL-SCH data is indicated by a particular value of a two-bit field in the DCI.
[0091] In Example 26, the subject matter of any of the examples herein may optionally include wherein whether or not the UCI is to be multiplexed with UL- SCH data is indicated by a phase shift of cell-specific reference signals (CRSs) transmitted by the e B.
[0092] In Example 27, the subject matter of any of the examples herein may optionally include wherein whether or not the UCI is to be multiplexed with UL- SCH data is indicated by a size of a resource granted by the UL resource grant.
[0093] In Example 28, an apparatus for an evolved Node B (eNB) comprises: memory and processing circuitry configured to: encode downlink control information (DCI) for transmission to a user equipment (UE) in a current downlink (DL) subframe over a physical downlink control channel (PDCCH) with an uplink (UL) resource grant and that requests transmission of uplink control information (UCI) over a physical uplink shared channel (PUSCH) in a subsequent UL subframe; wherein the PUSCH comprises a block-interleaved frequency division multiple access (B-IFDMA) interlace in unlicensed spectrum; and, indicate in the DCI whether or not the UCI should be multiplexed with uplink shared channel (UL-SCH) data.
[0094] In Example 29, the subject matter of any of the examples herein may optionally include wherein whether or not the UCI is to be multiplexed with UL- SCH data is indicated by one bit of a three-bit field in the DCI.
[0095] In Example 30, the subject matter of any of the examples herein may optionally include wherein an indication that the UCI is not to be multiplexed with UL-SCH data is indicated by a particular value of a two-bit field in the DCI.
[0096] In Example 31, the subject matter of any of the examples herein may optionally include wherein whether or not the UCI is to be multiplexed with UL- SCH data is indicated by a phase shift of cell-specific reference signals (CRSs) transmitted by the eNB.
[0097] In Example 32, the subject matter of any of the examples herein may optionally include wherein whether or not the UCI is to be multiplexed with UL- SCH data is indicated by a size of a resource granted by the UL resource grant.
[0098] In Example 33, a method for operating a user equipment (UE) comprising performing the functions of the memory and processing circuitry as recited in any of the examples herein. [0099] In Example 34, a user equipment (UE) comprising means for performing the functions of the memory and processing circuitry as recited in any of the examples herein.
[00100] In Example 35, a computer-readable medium comprising instructions to cause a user equipment (UE), upon execution of the instructions by processing circuitry of the UE, to perform the functions of the memory and processing circuitry as recited in any of the examples herein.
[00101] In Example 36, a method for operating an evolved Node B (eNB) comprising performing the functions of the memory and processing circuitry as recited in any of the examples herein.
[00102] In Example 37, an evolved Node B (eNB) comprising means for performing the functions of the memory and processing circuitry as recited in any of the examples herein.
[00103] In Example 38, a computer-readable medium comprising instructions to cause an evolved Node B (eNB), upon execution of the instructions by processing circuitry of the eNB, to perform the functions of the memory and processing circuitry as recited in any of the examples herein.
[00104] In Example 39, the subject matter of any of the Examples herein may further include a radio transceiver connected to the memory and processing circuitry.
[00105] The above detailed description includes references to the
accompanying drawings, which form a part of the detailed description. The drawings show, by way of illustration, specific embodiments that may be practiced. These embodiments are also referred to herein as "examples." Such examples may include elements in addition to those shown or described.
However, also contemplated are examples that include the elements shown or described. Moreover, also contemplate are examples using any combination or permutation of those elements shown or described (or one or more aspects thereof), either with respect to a particular example (or one or more aspects thereof), or with respect to other examples (or one or more aspects thereof) shown or described herein.
[00106] Publications, patents, and patent documents referred to in this document are incorporated by reference herein in their entirety, as though individually incorporated by reference. In the event of inconsistent usages between this document and those documents so incorporated by reference, the usage in the incorporated reference(s) are supplementary to that of this document; for irreconcilable inconsistencies, the usage in this document controls.
[00107] In this document, the terms "a" or "an" are used, as is common in patent documents, to include one or more than one, independent of any other instances or usages of "at least one" or "one or more." In this document, the term "or" is used to refer to a nonexclusive or, such that "A or B" includes "A but not B," "B but not A," and "A and B," unless otherwise indicated. In the appended claims, the terms "including" and "in which" are used as the plain- English equivalents of the respective terms "comprising" and "wherein." Also, in the following claims, the terms "including" and "comprising" are open-ended, that is, a system, device, article, or process that includes elements in addition to those listed after such a term in a claim are still deemed to fall within the scope of that claim. Moreover, in the following claims, the terms "first," "second," and "third," etc. are used merely as labels, and are not intended to suggest a numerical order for their objects.
[00108] The embodiments as described above may be implemented in various hardware configurations that may include a processor for executing instructions that perform the techniques described. Such instructions may be contained in a machine-readable medium such as a suitable storage medium or a memory or other processor-executable medium.
[00109] The embodiments as described herein may be implemented in a number of environments such as part of a wireless local area network (WLAN), 3rd Generation Partnership Project (3GPP) Universal Terrestrial Radio Access Network (UTRAN), or Long-Term-Evolution (LTE) or a Long-Term-Evolution (LTE) communication system, although the scope of the invention is not limited in this respect. An example LTE system includes a number of mobile stations, defined by the LTE specification as User Equipment (UE), communicating with a base station, defined by the LTE specifications as an eNB.
[00110] Antennas referred to herein may comprise one or more directional or omnidirectional antennas, including, for example, dipole antennas, monopole antennas, patch antennas, loop antennas, microstrip antennas or other types of antennas suitable for transmission of RF signals. In some embodiments, instead of two or more antennas, a single antenna with multiple apertures may be used. In these embodiments, each aperture may be considered a separate antenna. In some multiple-input multiple-output (ΜΊΜΟ) embodiments, antennas may be effectively separated to take advantage of spatial diversity and the different channel characteristics that may result between each of antennas and the antennas of a transmitting station. In some MEVIO embodiments, antennas may be separated by up to 1/10 of a wavelength or more.
[00111] In some embodiments, a receiver as described herein may be configured to receive signals in accordance with specific communication standards, such as the Institute of Electrical and Electronics Engineers (IEEE) standards including IEEE 802.11 standards and/or proposed specifications for WLANs, although the scope of the invention is not limited in this respect as they may also be suitable to transmit and/or receive communications in accordance with other techniques and standards. In some embodiments, the receiver may be configured to receive signals in accordance with the IEEE 802.16-2004, the IEEE 802.16(e) and/or IEEE 802.16(m) standards for wireless metropolitan area networks (WMANs) including variations and evolutions thereof, although the scope of the invention is not limited in this respect as they may also be suitable to transmit and/or receive communications in accordance with other techniques and standards. In some embodiments, the receiver may be configured to receive signals in accordance with the Universal Terrestrial Radio Access Network (UTRAN) LTE communication standards. For more information with respect to the IEEE 802.11 and IEEE 802.16 standards, please refer to "IEEE Standards for Information Technology— Telecommunications and Information Exchange between Systems" - Local Area Networks - Specific Requirements - Part 11 "Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY), ISO/IEC 8802-11 : 1999", and Metropolitan Area Networks - Specific
Requirements - Part 16: "Air Interface for Fixed Broadband Wireless Access Systems," May 2005 and related amendments/versions. For more information with respect to UTRAN LTE standards, see the 3rd Generation Partnership Project (3 GPP) standards for UTRAN-LTE, including variations and evolutions thereof.
[00112] The above description is intended to be illustrative, and not restrictive. For example, the above-described examples (or one or more aspects thereof) may be used in combination with others. Other embodiments may be used, such as by one of ordinary skill in the art upon reviewing the above description. The Abstract is to allow the reader to quickly ascertain the nature of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. Also, in the above Detailed Description, various features may be grouped together to streamline the disclosure. However, the claims may not set forth every feature disclosed herein as embodiments may feature a subset of said features. Further, embodiments may include fewer features than those disclosed in a particular example. Thus, the following claims are hereby incorporated into the Detailed Description, with a claim standing on its own as a separate embodiment. The scope of the embodiments disclosed herein is to be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled.

Claims

1. An apparatus for a user equipment (UE), the apparatus comprising: memory and processing circuitry; wherein the processing circuitry is to: demodulate downlink control information (DCI) received from an evolved Node B (eNB) in a current downlink (DL) subframe over a physical downlink control channel (PDCCH) with an uplink (UL) resource grant or over a common PDCCH (cPDCCH), wherein the DCI requests transmission of uplink control information (UCI) over an extended physical uplink control channel (ePUCCH) in a subsequent UL subframe; wherein the ePUCCH comprises a block-interleaved frequency division multiple access (B-IFDMA) interlace; and, map the UCI to resource elements (REs) of the B-IFDMA interlace with an orthogonal spreading sequence to allow code division multiplexing of the UCI with UCI from other UEs.
2. The apparatus of claim 1 wherein the orthogonal spreading sequence is a Hadamard sequence, a Zadoff-Chu sequence, an orthogonal cover code (OCC), or any combination of orthogonal spreading sequences.
3. The apparatus of claim 1 wherein the B-IFDMA interlace comprises 10 resource blocks (RBs) equally spaced across a channel bandwidth.
4. The apparatus of claim 1 wherein the processing circuitry is to spread the UCI using an orthogonal spreading sequence of length less than or equal to the number of REs in an RB of the interlace that are not used to transmit
demodulation reference signals (DMRSs).
5. The apparatus of claim 1 wherein the processing circuitry is to spread the UCI in the time domain using an orthogonal spreading sequence of length less than or equal to the number of orthogonal frequency division multiplexing (OFDM) symbols in the subframe that are not used to transmit demodulation reference signals (DMRSs).
6. The apparatus of claim 1 wherein the processing circuitry is to spread the UCI in the frequency domain using an orthogonal spreading sequence of length less than or equal to the number of orthogonal frequency division multiplexing (OFDM) subcarriers in a resource block of the subframe that are not used to transmit demodulation reference signals (DMRSs).
7. The apparatus of claim 1 wherein the processing circuitry is to spread the UCI independently across time and frequency domains using a frequency- domain orthogonal spreading sequence and a time-domain orthogonal spreading sequence.
8. The apparatus of any of claims 1 through 7 wherein the processing circuitry is to: code information bits of the UCI with a forward error correction code and append a cyclic redundancy check sequence thereto; rate match the coded information bits; modulate the coded and rate-matched information bits to one or more quadrature phase shift keying (QPSK) symbols; and map the QPSK symbols to REs of the B-IFDMA interlace with the orthogonal spreading sequence.
9. The apparatus of claim 8 wherein the memory and processing circuitry art to: split information bits of the UCI into one or more parts; code each of the information bit parts of the UCI with a forward error correction code and append a cyclic redundancy check sequence thereto; rate match each of the coded information bit parts; modulate each of the coded and rate-matched information bit parts to one or more quadrature phase shift keying (QPSK) symbols; and map the QPSK symbols of each part to REs of the B-IFDMA interlace with an orthogonal spreading sequence.
10. The apparatus of claim 8 wherein the forward error correction code is a tail-biting convolutional code (TBCC) or a Reed-Mueller (RM) code.
11. The apparatus of any of claims 1 through 7 wherein the processing circuitry is to map the UCI to REs of the B-IFDMA interlace with an orthogonal spreading sequence as specified by starting and ending indexes contained in the DCI.
12. The apparatus of any of claims 1 through 7 wherein the processing circuitry is to map the UCI to REs of the B-IFDMA interlace with orthogonal spreading sequences as specified by starting and ending indexes of frequency- domain and time-domain orthogonal spreading sequences contained in the DCI.
13. The apparatus of any of claims 1 through 7 wherein the processing circuitry is to map the UCI to REs of the B-IFDMA interlace with an orthogonal spreading sequence as specified by an index identifying one of a plurality of orthogonal spreading sequences contained in the DCI.
14. The apparatus of claim 13 wherein the processing circuitry is to implicitly determine the number of spreading sequences needed for UCI transmission based on the type of the UCI.
15. The apparatus of any of claims 1 through 7 wherein the processing circuitry is to map the UCI to REs of the B-IFDMA interlace with spreading sequences as specified by indices contained in the DCI identifying one of a plurality of frequency-domain orthogonal spreading sequences and identifying one of a plurality of time-domain orthogonal spreading sequences.
16. The apparatus of any of claims 1 through 7 wherein the memory is to store an orthogonal spreading sequence as semi-statistically configured by radio resource control (RRC) signaling and wherein the processing circuitry is to, when the ePUCCH is triggered by the cPDCCH which requests transmission of UCI, map the UCI to resource elements (REs) of the B-IFDMA interlace with the stored orthogonal spreading sequence.
17. An apparatus for an evolved Node B (eNB), the apparatus comprising: memory and processing circuitry configured to: encode downlink control information (DCI) for transmission to a user equipment (UE) in a current downlink (DL) subframe over a physical downlink control channel (PDCCH) with an uplink (UL) resource grant or over a common PDCCH (cPDCCH), wherein the DCI requests transmission of uplink control information (UCI) from the UE over an extended physical uplink control channel (ePUCCH) in a subsequent UL subframe; wherein the ePUCCH comprises a block-interleaved frequency division multiple access (B-IFDMA) interlace; and, decode the UCI from resource elements (REs) of the B-IFDMA interlace to which the UCI has been mapped with an orthogonal spreading sequence to allow code division multiplexing of the UCI with UCI from other UEs.
18. The apparatus of claim 17 wherein the processing circuitry is to encode the DCI to contain starting and ending indexes of an orthogonal spreading sequence for the UE to use to map the UCI to REs of the B-IFDMA interlace.
19. The apparatus of claim 17 wherein the processing circuitry is to encode the DCI to contain starting and ending indexes of frequency-domain and time- domain orthogonal spreading sequences for the UE to use to map the UCI to REs of the B-IFDMA interlace.
20. The apparatus of claim 17 wherein the processing circuitry is to encode the DCI to contain identifying one of a plurality of orthogonal spreading sequences for the UE to use to map the UCI to REs of the B-IFDMA interlace.
21. The apparatus of claim 17 wherein the processing circuitry is to encode the DCI to contain indices identifying one of a plurality of frequency-domain orthogonal spreading sequences and identifying one of a plurality of time- domain orthogonal spreading sequences for the UE to use to map the UCI to REs of the B-IFDMA interlace.
22. The apparatus of claim 17 wherein the processing circuitry is to semi- statistically configure by radio resource control (RRC) signaling a particular orthogonal spreading sequence for the UE to use in responding to a UCI request via the cPDCCH.
23. A computer-readable medium comprising instructions to cause a user equipment (UE), upon execution of the instructions by processing circuitry of the UE, to: demodulate downlink control information (DCI) received from an evolved Node B (eNB) in a current downlink (DL) subframe over a physical downlink control channel (PDCCH) with an uplink (UL) resource grant or over a common PDCCH (cPDCCH), wherein the DCI requests transmission of uplink control information (UCI) over an extended physical uplink control channel (ePUCCH) in a subsequent UL subframe; wherein the ePUCCH comprises a block-interleaved frequency division multiple access (B-IFDMA) interlace; and, map the UCI to resource elements (REs) of the B-IFDMA interlace with an orthogonal spreading sequence to allow code division multiplexing of the UCI with UCI from other UEs.
24. The medium of claim 23, further comprising instructions to: code information bits of the UCI with a forward error correction code and append a cyclic redundancy check sequence thereto; rate match the coded information bits; modulate the coded and rate-matched information bits to one or more quadrature phase shift keying (QPSK) symbols; and map the QPSK symbols to REs of the B-IFDMA interlace with the orthogonal spreading sequence.
25. The medium of claim 23, further comprising instructions to: split information bits of the UCI into one or more parts; code each of the information bit parts of the UCI with a forward correction code and append a cyclic redundancy check sequence thereto;
PCT/US2016/068982 2016-03-11 2016-12-28 Code division multiplexing of uplink control information WO2017155591A1 (en)

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