WO2017147686A1

WO2017147686A1 - System and method for processing power

Info

Publication number: WO2017147686A1
Application number: PCT/CA2017/000041
Authority: WO
Inventors: Meir Deutsch; Shaul Ozeri
Original assignee: Nanotis Technologies Inc.
Priority date: 2016-03-01
Filing date: 2017-03-01
Publication date: 2017-09-08

Abstract

A power processing system has power controllers connected in series to form a string voltage. Each power controller has at least one switch mode power conversion stage and receives a synchronization signal, extracts power switching frequency from the signal, and generates a pulsating output voltage based on the extracted power switching frequency. At least one power controller receives electric energy from a power source, such as PV panel, groups of PV panels or substrings that each has multiple photovoltaic cells within them or any other power source known in the art. A method of processing power by synchronizing power controllers by receiving at least one synchronization signal in the power controllers, and generating a pulsating output voltage at each of the power controllers of the plurality of power controllers by receiving electric energy from at least one power source, converting the electric energy to the pulsating output voltage, extracting power switching frequency from at least one of the at least one synchronization signal, and generating the pulsating output voltage based on the extracted power switching frequency.

Description

SYSTEM AND METHOD FOR PROCESSING POWER

FIELD OF INVENTION

[0001] The invention relates to the power generation and processing field, and particularly to the photovoltaic power harvesting optimization, improving string electrical safety and connections of multiple strings. This invention may also relate to other fields such as managing charging and discharging of battery arrays, fuel cells and distributed lighting.

BACKGROUND

[0002] Photovoltaic (PV) power generation systems may have PV panels connected in series to create strings connected to a centralized DC to AC inverter that generates grid-level AC voltage. PV panels may have multiple photovoltaic cells arranged in several groups called substrings. Variations in operating conditions and/or specifications between PV panels and strings may not harvest energy for the entire system optimally. Also, high DC current and voltage on the string's electrical cables may result in safety issues due to risk of arcing. Potential induced degradation in energy harvested over time may be present in PV panels experiencing negative potential relative to the grounded panel frame.

SUMMARY OF THE INVENTION

[0003] The present invention is directed to power processing system and method.

[0004] The power processing system has power controllers and conductive connections (such as electrical wires or other conductive connections known in the art) connecting the power controllers in a series connection to form a string voltage. The power controllers have outputs that are connected in series. Each power controller has at least one switching power stage. Each power controller may be configured to receive at least one synchronization signal, extract information (such as power switching frequency and output polarity information or other information known to a person skilled in the art) from this signal or these signals, and generate a pulsating output voltage based on the extracted information. The pulsating output voltage may be uni-polar or bi-polar. At least one power controller may be configured to receive electric energy from at least one power source, such as a PV panel, groups of PV panels or substrings that each has multiple photovoltaic cells within them, or other power sources known in the art. [0005] The power processing method has a system of power controllers and conductive connections connecting the power controllers in a series connection to form a string voltage. The power controllers have power controller outputs connected in series. Each power controller has at least one switch mode power conversion stage.

[0006] The power processing method synchronizes the power controllers by receiving at least one synchronization signal in the power controllers and then generates a pulsating output voltage at each power controller by receiving electric energy from at least one power source, converting the electric energy to the pulsating output voltage, extracting information (such as power switching frequency and output polarity or other information) from at least one of the synchronization signals, and generating the pulsating output voltage based on the extracted information. The pulsating voltage may be uni-polar or bi-polar.

BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The accompanying drawings, which are incorporated in and form part of the

specification, illustrate the embodiments of the present invention and together with the description serve to explain the principles of the invention. In the drawings:

[0008] Figure 1 shows an embodiment of a system for processing power.

[0009] Figure 2 shows an embodiment of the system of Figure 1 with solar panels as power sources, DC to AC inverter as a power utilizing device and a string controller.

[0010] Figure 3 shows an embodiment of the system of Figure 2 with alternate PV panel configurations.

[0011] Figure 4 shows an embodiment of the system of Figure 2 with a power controller having a uni-polar half-bridge power switching stage implementation.

[0012] Figure 5 shows an embodiment of the uni-polar half-bridge power switching stage implementation of the power controller of the system of Figure 2.

[0013] Figure 6 illustrates a uni-polar pulsating output voltage generated by a uni-polar power controller in an embodiment of the system of Figure 2.

[0014] Figure 7 shows time-shifted pulsating output voltages generated by three uni-polar power controllers on the same string in an embodiment of the system of Figure 2. [0015] Figure 8 shows a screen print of computer simulation results for string voltage of an embodiment of the system of Figure 2 having three synchronized and interleaved power unipolar controllers connected in series, with identical solar panels.

[0016] Figure 9 shows screen prints of computer simulations results for string voltage and string current of an embodiment of the system of Figure 2 having 15 synchronized and interleaved unipolar power controllers connected in series, with identical solar panels.

[0017] Figure 10 shows a screen print of computer simulation results for string voltage of an embodiment of the system of Figure 2 having three synchronized and interleaved uni-polar power controllers connected in series, with mismatched solar panels.

[0018] Figure 1 1 shows a screen print of computer simulation results for string voltage and string current of an embodiment of the system of Figure 2 having 15 synchronized and interleaved uni-polar power controllers connected in series, with mismatched solar panels.

[0019] Figure 12 shows an embodiment of the system of Figure 2 with a power controller having a bi-polar full-bridge power switching stage implementation.

[0020] Figure 13 shows a bi-polar pulsating output voltage generated by a bi-polar power controller in an embodiment of the system of Figure 2.

[0021] Figure 14 shows screen print of computer simulation results for string voltage of an embodiment of the system of Figure 2 having 15 synchronized and interleaved bi-polar power controllers connected in series, with mismatched solar panels.

[0022] Figure 15 shows a schematic of the synchronization signal that carries both power switching frequency and polarity inversion information by using amplitude modulation in an embodiment of the system of Figures 1 and 2.

[0023] Figure 16 show three implementations of the string interface block that may be used in the power controllers and string controller, in an embodiment of the system of Figure 2.

[0024] Figure 17 shows a string with two synchronization sub-groups within one string in an embodiment of the system of Figure 2.

[0025] Figure 18 shows an auxiliary voltage and synchronization signal superimposed on the string voltage by a string controller in an embodiment of the system of Figure 2.

[0026] Figure 19 shows a block diagram of the string controller in an embodiment of the system of Figure 2. [0027] Figure 20 shows a buck-boost power switching stage implementation of a string controller in an embodiment of the system of Figure 2.

[0028] Figure 21 shows a power switching stage of a string controller with a parallel configuration of smaller power switching stages in an embodiment of the system of Figure 2.

[0029] Figure 22 shows a block diagram of an isolated partial-power switching stage of a string controller in an embodiment of the system of Figure 2.

[0030] Figure 23 shows an embodiment of the isolated partial-power switching stage within a string controller, referenced to a positive lead in an embodiment of the system of Figure 2.

[0031] Figure 24 shows an embodiment of the isolated partial -power switching stage within a string controller, referenced to a negative lead in an embodiment of the system of Figure 2.

[0032] Figure 25 shows two implementations of passive filter of a string controller in an embodiment of the system of Figure 2.

[0033] Figure 26 shows a conceptual diagram of an active current harmonics cancelling filter of a string controller in an embodiment of the system of Figure 2.

[0034] Figure 27 shows a connection of multiple strings by connecting the outputs of string controller in parallel in an embodiment of the system of Figure 2.

[0035] Figure 28 shows an embodiment of Figure 27 with a combined string controller.

[0036] Figure 29 shows an embodiment of the system of Figure 2 with a pulsating PV panel having a bi-polar full-bridge power switching stage implementation.

[0037] Figure 30 shows an embodiment of the system of Figure 2 with a pulsating PV panel having a uni-polar half-bridge power switching stage implementation.

[0038] Figure 31 shows an embodiment of the system of Figure 2 with a pulsating PV panel having a uni-polar half-bridge power switching stage implementation.

[0039] Figure 32 shows a block diagram of an integrated DC PV panel having a uni-polar half- bridge power switching stage implementation in an embodiment of the system of Figure 3.

[0040] Figure 33 shows an embodiment of the system of Figure 3 with an integrated DC PV panel having a uni-polar half-bridge power switching stage implementation.

[0041] Figure 34 shows an embodiment of the system of Figure 3 with an integrated DC PV panel having a uni-polar half-bridge power switching stage implementation.

[0042] Figure 35 shows an embodiment of the system of Figure 3 with an integrated DC PV panel having a bi-polar half-bridge power switching stage implementation. DETAILED DESCRIPTION

[0043] The detailed description set forth below is intended as a description of the embodiments of the present invention and is not intended to represent the only form in which the present invention may be constructed or utilized. The description sets forth the functions and sequences of steps for constructing and operating the invention. It is to be understood however that the same or equivalent functions and sequences may be accomplished by different embodiments and that they are also intended to be encompassed within the scope of the invention. Like reference symbols in the various drawings indicate like elements.

[0044] Figure 1 shows an embodiment of the system for processing power. In an embodiment, the system has power controllers ("PC") 3, a synchronizer 13 for synchronizing the power controllers, conductive connections (such as electrical wires 1 1) for connecting the outputs of the power controllers in a series connection to form a string voltage 4 ("Vs"), a voltage rectifier 14, and/or a filter 15. The voltage 6 ("VHV") after the rectifier 14 and/or filter 15 functionalities may be fed into a power utilizing device 29, such as a DC (Direct-Current) to AC (Alternating- Current) inverter that may generate an AC grid voltage or any other power utilizing device known in the art, a battery charging and storage system, or a DC load. The synchronizer 13 synchronizes the power controllers 3 by sending a synchronization signal 9 or synchronization signals to the power controllers 3. In an embodiment, each power controller 3 may be configured to receive the synchronization signal(s) 9 from the synchronizer 13, extract power switching frequency and output polarity from at least one of the synchronization signal(s), and generate a pulsating output voltage 8 ("Vpc") based on the extracted power switching frequency and the extracted output polarity. Each power controller 3 may have at least one switching power stage (such as, for example, the switching power stages illustrated in Figures 3, 4, and 12). Also in an embodiment, at least one power controller 3 may be configured to receive electric energy from at least one power source 2, such as a PV panel or other power source known in the art. Power sources 2 may be connected in series and then fed into power controllers 3. The outputs of power controllers 3 may also be connected in a series connection with power source outputs. The string loop may carry the string current Is 19, (which may range for example between 0-1 OA) which may be common to all the elements (such as the PCs, string controller, and PV panels or any other element known in the art) that are connected in series to create the string. [0045] Referring to Figure 1, synchronization signal(s) 9 that may be transmitted from the synchronizer functionality 13 to the PCs 3 may carry both switching frequency fs and information on polarity inversion frequency f ALT and its phases. Power controllers 3 in the string may be synchronized by the synchronization signal(s) to have the same switching frequency fs and same polarity inversion frequency f ALT and phase. The synchronization signal(s) 9 may be transmitted over separate electrical wiring, transmitted over wireless communication channel, superimposed onto the string voltage over the string electrical wires 11 (using for example methods used in power line communication), or transmitted by any other suitable transmission means known in the art.

[0046] Figure 2 shows an embodiment of the system of Figure 1 with photovoltaic (i.e. solar) panels 1 as power sources and a DC to AC inverter 12 as a power utilizing device. An embodiment of a photovoltaic ("PV") power processing system has power controllers 3 connected in series. Each PC may be connected to a PV panel 1, or to PV panels 1 connected in series or in parallel. The PV panels 1 convert the solar energy into electrical energy in the form of voltage 7 ("Vpv") at the input terminals of power controllers 3. The power controllers maximize the power harvested from the PV panels 1 connected to them by tracking the maximum power point of each panel 1. The voltage 7 fed into the power controllers (which may be a DC voltage that varies between panels, depending on the panel's operating condition and specifications) is converted by each power controller 3 to a pulsating output voltage Vpc 8 which may be a pulse train (which may have frequency in the several kHz range, for example) having its parameters (such as duty cycle or other parameters known in the art) determined by a predetermined value or the results of an algorithm, such as a maximum power point tracking (MPPT) algorithm for PV panel 1. Voltage Vpc 8 may be uni-polar pulsating voltage in one embodiment (as illustrated in Figure 6) or a bi-polar alternating voltage in another (as illustrated in Figure 13). The series connected PCs 3 may generate the high-voltage string voltage Vs 4 that may feed into voltage rectifier 14 and/or filter 15 functionalities and may be converted into AC voltage (such as grid AC voltage, for example 240V AC 60Hz or other grid AC voltages known in the art) by the DC to AC inverter 12. In an embodiment, the functionalities of the rectifier 14, filter 15, and synchronizer 13 may be implemented within one element referred to as string controller ("SC") 5. The synchronization signal(s) 9 generated by the synchronizer 9 may be distributed to the PCs 3 over the power carrying conductive connections (such as electrical wires 1 1) or by other information-carrying mediums, such as wireless (not shown), additional cables (not shown), or any other carrying medium known in the art that may be used for interconnecting the synchronizer 13 with PCs 3. The value of the string voltage 4 may vary (for example in the 200V- 1500V range), depending on the number of series connected elements composing the string voltage Vs 4 and the output voltage of each element (PCs 3 and PV panels 1). The number of series-connected elements may vary between installations and may be chosen to bring the string voltage 4 to values within the voltage range required by the DC to AC inverter

specifications. The string voltage Vs 4 may also contain superimposed signals such as synchronization signals 9 or any other signals known in the art, auxiliary power voltage, and communication messages between the SC 5 and the PCs 3.

[0047] Referring to Figure 2, in an embodiment, the photovoltaic power source 1 feeding the PCs 3 may be one or more substrings 51 that each has multiple photovoltaic cells 52 in them. The photovoltaic cells 52 within a substring 51 may be connected in series (shown in Figure 2) or in parallel (not shown). Instead of connecting all the substring within a PV panel in series to create a single pair of output terminals to the PV panel, each substring may have its own pair of output terminals that may be directly connected to a PC 3, or multiple substrings may be connected in parallel (not shown), if they all contain the same number of photovoltaic cells 52, resulting in one pair of output terminals that may be connected to a single PC 3. In an

embodiment, several substrings 51 and their respective PCs 3 may be co-located within a pulsating PV panel 53 (as shown in Figures 29-31).

[0048] Figure 3 shows an embodiment of the system of Figure 2 with an alternate PV panel configuration. The PV panels la, lb, lc, Id, le may differ from one another and may generate different voltages Vpv 7a, 7c, 7d, 7e depending on factors, such as the intensity of the solar irradiation, the angle of inclination of the panel toward the sun's orbit, the imposition of shade on the panel by surrounding objects or clouds, different aging effects among the panels or other factors known in the art. The PV panels la, lb, lc, Id, le in the system may also be generating different voltage VPV 7 due to different design specifications such as different surface area of the panel, power ratings, connection method, or photovoltaic panel technology (e.g. monocrystalline, polycrystalline, thin film, etc. or any other design specifications known in the art). Such cases of difference in the output voltage VPV 7 and electrical power between PV panels are referred to as mismatch case between panels, and may occur for example in Building Integrated PV installations due to architectural constraints or in rooftop installations where the surface area available for deployment of panels is composed also of smaller available surfaces each having different inclination angels toward the sun orbit. Each PC within the string may, independently of other PCs, maximize the power harvested from the PV panels that are directly connected to it. In an embodiment, multiple PV panels, such as the two PV panels la, lb (forming voltage 7a) as shown in Figure 3, may be connected in series and may feed a single PC 3a. In embodiments where the output voltage Vpc of the power controllers may be uni-polar voltage, the output of PV panels (such as voltage 7d) or the output of the integrated DC PV panels 56 (such as voltage 7f) may be connected directly in series with the outputs of uni-polar power controllers 3a, 3b, 3c to create the string voltage Vs 4. In such case, PV panel Id which is connected directly to the string without a PC may not work at its maximum power point. Integrated DC PV panels 56 (as also shown in Figures 32-35) may however work at their maximum power point as determined by an MPPT algorithm running on a controller (not shown) inside the integrated DC PV panel.

[0049] Referring to Figure 3, the pulsating output voltages Vpc 8a, 8b, 8c generated by the power switching stage in each power controller 3a, 3b, 3c in the string may be synchronized, having the same switching frequency fs and may be time interleaved, as shown in Figure 7. Such synchronization may be achieved by distributing a synchronization signal 9 (generated by the synchronizer 13 within the SC 5) to all PCs 3a, 3b, 3c residing on the string. Many methods for the distribution of the synchronization signal(s) may occur either over a dedicated channel (such as wireless link, dedicated wiring, or other channel known in the art) or as a superimposed signal on the string voltage running on the string electrical wiring 11 (such as a low voltage AC signal superimposed on Vs by the string controller).

[0050] Figure 4 shows an embodiment of the system of Figure 2 with a power controller PC 3 having a uni-polar half-bridge switching power stage 32 implementation. In an embodiment, the system has PV panel 1 with an output voltage Vpv 7 that feeds into the input terminals of the power controller 3. The PC may generate on its output terminals a uni-polar DC pulsating voltage Vpc 8. The power controller 3 may include a current sense element 40 for measuring the PV panel current 42, filter 30, half-bridge power switching stage 32, controller 36 (for example a microcontroller, Field Programmable Gate Array, dedicated hardware, or any other controller known in the art) and a string interface 34. The PV panel output voltage Vpv 7 may be connected to a filter 30 (for example a passive low pass filter or any other filter known in the art). The filtered voltage may then be converted by the power stage 32 into a uni-polar pulsating voltage that is coupled by the string interface 34 into the string electrical wires 1 1 (string current 19 flows through the string interface block).

[0051] In an embodiment, the PC's controller 36 may sense the panel voltage Vpv 7 and the PV panel current 42 (by means of a current sense element 40, such as shunt resistor, hall effect sensor, or other current sensing techniques known in the art) and use an algorithm such as a maximum power point tracking (MPPT) algorithm (such as any known in the art MPPT algorithms, for example "perturb and observe" algorithms) to maximize the power harvested out of a specific panel. The controller 36 inside the PC may alter the duty cycle (i.e., the width of each pulse) of the uni-polar pulsating output voltage 8 (pulses may be generated at frequency fs) thus changing the operating power point of the PV panel until the power harvested into the string is maximized. The controller may also set the duty cycle to a predetermined value in the range 0% to 100%.

[0052] Referring to Figures 2 and 4, in an embodiment, the superimposed synchronization signal(s) 9 generated by the SC 5 is extracted out of the string voltage by the string interface 34 (also shown in Figure 12) and is transferred (over interface 38) to the power controller's controller 36 that controls the operation of the power switching stage 32 (by switching the gating signals Gi and G₂ of the power switches Qi and Q₂ at switching frequency fs). Figure 4 shows a half-bridge implementation of a switching power stage 32 with output voltage generated between the negative and the middle tap. Q l and Q2 may be pulsating (alternating between states of "Q l on. Q2 off and "Ql off. Q2 on") at frequency fs, which may result in output voltage 8 of the PC toggling between voltage +V_PV (state "Q l on. Q2 off) and zero (state "Q l off. Q2 on").

[0053] Figure 5 shows an embodiment of the system of Figure 2, with a uni-polar half-bridge switching power stage 32 of the power controller 3, where the output voltage is generated between the positive and the middle tap. Ql and Q2 may be pulsating (alternating between states of "Ql off. Q2 on" and "Ql on. Q2 off) at frequency fs, which may result in output voltage 8 of the PC toggling between voltage +V_PV (state "Q l off. Q2 on") and zero (state "Ql on. Q2 off). Both half-bridge configurations shown in Figures 4 and 5 may be used in an embodiment of unipolar string voltage, and may be mixed within the same string loop. Other switching power stage implementations may be possible for achieving same uni-polar operation. [0054] Referring to Figures 4 and 5, the string interface 34 may also be used, in addition to synchronization, to implement additional functionalities, such as superimposing onto the string electrical wiring 1 1 communication signals (not shown) that may carry bidirectional messages between the string controller 5 and the PCs' controller 36 over interface 38, and extracting from the string electrical wires 1 1 low-power auxiliary voltage (not shown) that may be used to power the PC's controller 36 (for example when there is not enough energy output from the PV panel) over interface 38. Having synchronized power switching frequency fs, common to the PCs in a string, may also help reduce disturbances to superimposed communication protocol between the PCs and the SC, which may use a carrier at a frequency which is not an integer multiple of the power switching frequency.

[0055] Figure 6 illustrates a timing schematic of a uni-polar pulsating output voltage Vpc 8 generated by a uni-polar power controller in an embodiment of the system of Figure 2.

[0056] Figure 7 shows time-shifted pulsating output voltages generated by three uni-polar power controllers on the same string in an embodiment of the system of Figure 2. In an embodiment of the system of Figure 2, the resulting string voltage Vs 4 may be generated by the summation of all series-connected pulsating output voltages VPC 8 of all power controllers 3 in the string. Referring to Figure 7, the output voltage of the PV panel connected to the uni-polar PC number i (where i= 1..N, N being the number of PCs in the string) is marked as Vpvi (Vpvi, VPV₂, VPV₃) and output voltage to the uni-polar PC number i is marked as Vpci (Vpci , Vpc₂, Vpc₃). To minimize AC harmonics in the string voltage, the pulsating output voltages generated by the serially connected PCs may be time interleaved, as shown in Figure 7. Time interleaving may be possible due to the common switching frequency fs used by all PCs receiving the

synchronization information orchestrated by the synchronizer inside the SC (not shown). In an embodiment, each PC may shift its pulsating output voltage in one of the time-shift values "t_di", where, for example, tdi=(i- l)/(fs*N) i=l ..N, and where N is the number of PCs in the string, and fs is the power switching frequency (common among PCs in the string). This may allow the PCs to occupy all shift possibilities, as demonstrated by time shifts td₂, td3 in Figure 7. In an embodiment, the pulsating output voltages of the power controllers (Vpci, VPC₂, Vpc₃) may share the same switching frequency. Each pulsating output voltage may have different amplitude, depending on the voltage generated by each PV panel (VPVI, Vpv₂, VPV₃), different duty cycle and time-shifts. The power output conditions of the PV panel may impact the duty cycle selected

1 for the pulsating output voltage 8, , to match the string current 19. The time-shift value tdi may be assigned to each PC during the system deployment or assigned by the SC over communication channel (such as a dedicated wireless link, dedicated cable or a superimposed signal over the string electrical wires, or any other channel known in the art), at power up (i.e. as part of the string initialization process) or during system operation, such as when some PCs may not generate power (e.g. due to malfunction or strong shading on the PV panels, as discussed above) and the rest of the PCs on the string may need to time-shift their outputs to account for the inactive PCs. The tdi value may also be calculated locally by each PC by constantly measuring the switching period Ts. Besides using fixed shifting intervals, various shifting vector methods may be adopted in order to reduce the ripple in the string voltage, for example by time-shifting the pulsating output voltages 8 according to a Fibonacci series, or by setting tdi randomly using a random generator algorithm.

[0057] Figures 8, 9, 10, and 11 show computer simulations of the resulting string voltage and string current with interleaved uni-polar power controllers connected in series of an embodiment of the system of Figure 2. The computer simulation simulated an embodiment of PCs working at a power switching frequency of 4000 Hz and with interleaving time shifts suitable for 15 PCs in the string, while receiving 30V Vpv amplitude from all PV panels. In a certain operating conditions, when the string current may be almost equivalent to the PV panel's maximum power point current, the duty cycle of the pulsating output voltage Vpc of the PC may reach 100%. The first two simulations depict a near ideal case where there is no mismatch between PV panels' operating conditions and all PCs work at 95% (0.95) duty cycle.

[0058] Figure 8 shows a screen print of a computer simulation of simulation results for an embodiment of the system of Figure 2 with identical panels for only three series-connected PCs in the string. The lower three rows show the output voltage 8 of each individual PC (V_PCI , V_PC2, Vpc₃), while the fourth row shows the voltage sum of the first two PCs (V_PCI , VP_C2) and the top row depicts the voltage sum of all three PCs.

[0059] Figure 9 shows screen prints of computer simulations of results for an embodiment of the system of Figure 2 with identical panels resulting from 15 series-connected power controllers, synchronized and interleaved. The top graph shows resulting string voltage Vs 4 (Vs is the sum of Vpci, VPC₂ ... Vpci₅), and also shows the resulting filtered and smoothened voltage output of the string controller VF (121 in Figure 19). The lower graph in Figure 9, shows the resulting string current Is 19. The ripple amplitude of the string current Is in the system of Figure 2, due to the synchronized and interleaved operation of the PCs, may be reduced as N (the number of PCs in the string) increases and may have ripple frequency that is N times higher than the PC's switching frequency fs, which may facilitate the further filtering this ripple inside the string controller.

[0060] Figures 10 and 1 1 show screen prints of computer simulations of results for a mismatched panel case in an embodiment of the system of Figure 2. Referring to Figures 10 and 1 1, the second simulation case demonstrates a case of mismatched operating conditions between solar panels. In an embodiment, mismatch between PV panels results in different maximal power outputs of each PV panel and therefore results in difference in the duty cycle of the pulsating output voltage for each power controller. The computer simulation simulated an embodiment of PCs working at a power switching frequency of 4000 Hz and with interleaving time shifts suitable for 15 PCs in the string, while receiving 30V Vpv amplitude from all PV panels, however the duty cycle for each PC varied randomly over range of 0.27-0.99.

[0061] Figure 10 shows a screen print of a computer simulation of simulation results for an embodiment of the system of Figure 2 with mismatched panels for only three series-connected PCs in the string. The lower three rows show the output voltage 8 of each individual PC (Vpci, Vpc₂, VPC₃), while the fourth row shows the voltage sum of the first two PCs (VPCI , VPC₂) and the top row depicts the voltage sum of all three PCs. Figure 1 1 shows screen prints of computer simulations of results for an embodiment of the system of Figure 2 with mismatched panels resulting from 15 series-connected power controllers, synchronized and interleaved. The top graph shows resulting string voltage Vs 4 (Vs is the sum of Vpci, V c₂ ... VPCIS), and also shows the resulting filtered and smoothened voltage output of the string controller V_F ( 121 in Figure 19). The lower graph in Figure 1 1, shows the resulting string current Is 19, having small ripple percentage in spite of the large panel mismatch.

[0062] Figure 12 shows an embodiment of the system of Figure 2 with a power controller having a bi-polar full-bridge power switching stage implementation. In an embodiment, the system has PV panel 1 or PV panels having an output voltage Vpv 7 that feeds into the input terminals of the power controller 3. The power controller 3 may include a current sense element 40 for measuring the current of the PV panel 42, filter 30, full-bridge power switching stage 33, controller 36 and a string interface 34. The voltage 7 of the PV panel 1 may be filtered by a filter 30, and then may be converted by the full-bridge power switching stage 33 into a bi-polar Alternate-Current pulsating voltage that is coupled by the string interface 34 into the string electrical wires 1 1. In an embodiment shown in Figure 12, the half-bridge power switching stage implementations of the PC 3 shown in Figures 4 and 5 could be expanded into a full-bridge power stage

implementation 33 resulting in an alternating string voltage, as shown in Figure 13. Other power switching stage implementations may be implemented for achieving bi-polar operation.

Referring to Figure 12, in an embodiment, the full-bridge power switching stage 33 has four power switches Ql, Q2, Q3, Q4, each having a respective gating signal Gl, G2, G3, G4 (for controlling the switch by turning the switch off or on for example). The four gating signals Gl, G2, G3, G4 are driven by the controller 36 of the PC. The polarity of the pulsating output voltage Vpc 8 may alternate between +Vpv and -V_PV voltage values, as shown in Figure 13. Power controllers 3 in the string may be synchronized by the string controller 5 by providing them with switching frequency fs and polarity alternating frequency fALT. The duty cycle of the pulsating output voltage, as shown in Figure 13, may be determined by the controller 36 of each PC according to a maximum power tracking algorithm that maximizes the electrical power harvested from the PV Panel 1.

[0063] Figure 13 shows a bi-polar pulsating output voltage Vpc 8 of a power controller depicted in Figure 12 in an embodiment of the system of Figure 2. In an embodiment, the VPC 8 may have three voltage levels: positive, zero, and negative. During the first part of the polarity alternating period TALT (where TALT = 1/fALT), the pulsating output voltage Vpc may be switched at the switching frequency of fs between positive voltage (+VPV) and zero voltage, and during the complementary part of the polarity alternating period the pulsating output voltage Vpc 8 may be switched between negative voltage (-Vpv) and zero voltage. The duty cycle (i.e., the width of each pulse) of the pulsating output voltage 8 may be varied according to the operational conditions of the system, for instance to maximize the power harvested from the PV panel or be set to a predetermined value in the range 0% to 100%.

[0064] Referring to Figures 12 and 13, in an embodiment to obtain such bi-polar alternating pulsating output voltage Vpc, during the first part of the polarity alternating period TALT Q2 may be held on and Ql held off while Q3 and Q4 may be pulsating (alternating between states of "Q3 on. Q4 off and "Q3 off. Q4 on") at frequency fs, and during the complementary part of the polarity alternating period Q4 may be held on and Q3 held off, while Ql and Q2 may be pulsating (alternating between states of "Ql on. Q2 off and "Ql off. Q2 on") at frequency fs. Other control regimes for turning on or off switches Ql, Q2, Q3, Q4 may be used to achieve the pulsating alternating output V_PC, for example, during first part of the polarity alternating period Ql may be held on and Q2 held off while Q3 and Q4 may be pulsating at frequency fs, and during the complementary part of the polarity alternating period, Q3 may be held on and Q4 held off while Ql and Q2 may be pulsating at frequency fs. Embodiments splitting the polarity alternating period TALT into two phases, each with different switch control schemes as described above, may be implemented as two equal periods or as two unequal periods. An embodiment may also employ a third phase, during the polarity alternating period, during which the output of the power switching stage is maintained at a zero voltage (may be achieved by driving Q2, Q4 on and Ql, Q3 off).

[0065] Figure 14 shows the screen print of computer simulation results for string voltage Vs 4 of an embodiment of the system of Figure 2, having 15 synchronized and interleaved bi-polar power controllers connected in series, with mismatched solar panels using similar simulation parameters as those used in the simulation of Figure 10. The value of fALT in the simulation is 50 Hz. An alternating bi-polar string voltage, as shown in Figure 14, may allow for the utilization of AC circuit breakers, fuses and cables in the string electrical wiring which may be less costly than their respective DC counterparts. It may be also safer to use alternating voltage on the string as its inherent zero-crossing addresses the arcing phenomenon that may result in a DC string cabling, for instance, by discontinuity in one of the cables interconnects. An alternating bi-polar string voltage, as shown in Figure 14, may prevent also the occurrence of potential induced degradation (PID) in the photovoltaic cells as the cells would not experience negative voltage with respect to the grounded panel frame for prolonged periods. Such benefits of reducing the arcing phenomenon and PID, may also be achieved by an embodiment of the system of Figure 2 having synchronized bi-polar power controllers that are all operating at a predetermined duty cycle of 100%.

[0066] Figure 15 shows a schematic of the synchronization signal that carries both power switching frequency and polarity inversion information by using amplitude modulation in an embodiment of the system of Figures 1 and 2. In an embodiment, the synchronization signal 9 may be superimposed by the synchronizer functionality inside the string controller over string electrical wiring, using an amplitude modulation method. In this embodiment, the fALT polarity inversion signal may amplitude modulate (Amplitude Shift Keying) the power switching frequency fs such that A 1 is the amplitude of the superimposed synchronization signal during the positive polarity of Vpc, and A2 is the amplitude during the negative polarity phase of VPC. The synchronization signal's 9 carrier frequency ("fsvNc") that is being amplitude modulated, may be equal to the desired power switching frequency fs or may be equal to a pre-defined integer multiplication factor n of the desired power switching frequency fs such that fsYNC = n* fs (e.g. Figure 15 depicts an embodiment utilizing n = 2). Using higher carrier synchronization frequency fsYNC (i.e. n > 1) may enable the use of smaller size components in the string interface block.

[0067] Referring to Figures 2 and 12-15, the use of bi-polar power controllers 3 requires that all PCs 3 in the string operate in an alternating bi-polar string voltage mode.

[0068] Many other techniques known in the art may be used to convey the switching frequency and the polarity inversion information. An embodiment may use two separate synchronization signals one controlling the power switching frequency fs and the other the polarity inversion) or use other modulation techniques, such as frequency modulation where the synchronization signal carries one power switching frequency fsi during at the positive polarity phase, and a different switching frequency fs₂ is used during the negative polarity phase. Additional modulation techniques may be used such as phase modulation (Phase Shift Keying such as BPSK), QAM (Quadrature Amplitude Modulation), or any other modulation techniques known in the art.

[0069] In an embodiment, the power switching frequency fs of the power switches composing the power switching stage of the PC (Ql, Q2 in the power switching stage 32 of Figures 4 and 5 and Ql, Q2, Q3, Q4 in the power switching stage 33 of Figure 12) may be selected to be low enough (for example several kHz) to minimize switching losses at the power stage. Therefore, the dominant power loss may be conduction losses of the switches (such as MOSFET I²R and diode conduction losses). The I²R losses may be minimized to virtually zero, by using a low RDS(ON) switches, such as switches with resistance that may be lower than 1 πιΩ or other similar switches known in the art. Diode losses may be minimized at a low switching frequency because the MOSFETs bypass the diodes most of the switching period. In an embodiment, the power controllers in an embodiment of the system of Figure 1 may be highly efficient (for example, above 99% efficiency) over a wide range of PV panel power, and by achieving low power losses, the PCs may have negligible heat to dissipate. Also in an embodiment of the system of Figure 1, the PC mechanical case may be made of an insulating material which may further reduce the cost of the PC and reduce the risk of electric shock.

[0070] Figure 16 shows three implementations of the string interface block 34 of Figures 4, 5, 12 and 19 that may be used in power controllers and string controller, in an embodiment of the system of Figure 1. The string interface couples the power controllers 3 and the string controller 5 to the string current Is 19. Referring to Figure 16, the string interface 34 has LC networks 60, 61, capacitor(s) Cs, CSI, CSN, CSXI, CSX2, inductor(s) Ls, Lsi, Lsx, LSN, interface 38 for

superimposed signals, and string current Is 19. In an embodiment, the string interface 34 may employ one LC network 60 (e.g. series connected capacitor Cs and inductor Ls, as shown in Figures 16A and 16C) or several LC networks 61 in parallel (e.g. each parallel LC network is composed of a series connection of an inductor Lsi and capacitor Csi, as shown in of Figure 16B). The LC network(s) may form an electrical path also for signals (such as low-voltage synchronization signals, auxiliary power voltage, and bi-directional communication messages, or other signals known in the art) that may be superimposed on the string electrical wiring 1 1.

[0071] Referring to Figures 16A and 16B, in an embodiment, controller (not shown) that processes the superimposed signals may be isolated from the string voltage (not shown) by means of a line interface transformer 62 that may be designed to carry the string current Is without saturation and without the generation of excessive heat. Figure 16C shows schematics of the string interface 34 using a high frequency signal transformer 68 (for example the DA2320 by Coilcraft), one LC inductor-capacitor network 60, power inductor Lx 66, and capacitors Cxi, Cx₂. The signal transformer 68 may float the superimposed signals from the string voltage and capacitors Cxi, Cx₂ may block the voltage that may be created by the string current Is and the ohmic resistance of inductor Lx. Line isolation may be achieved by, for example, choosing Cxi, Cx2 to withstand the string voltage, or by utilizing the magnetic isolation of the signal transformer.

[0072] Figure 17 shows a string with two synchronization sub-groups within one string with PCs 3a, 3b, 3c, 3d, 3e, 3f, string current 19, synchronization signals 9a, 9b generated by the synchronizer 13, a string controller 5, string voltage Vs 4, and voltage VH_V 6 in an embodiment of the system of Figure 2. PCs 3a, 3b, 3c may compose one sub-group while PCs 3d, 3e, 3f may be part of another sub-group. Each synchronization sub-group may operate at a different power switching frequency (fsi and fs₂ respectively) by receiving a different synchronization signal (9a and 9b respectively) from the synchronizer block 13 within the string controller 5. An embodiment may include more than two synchronization sub-groups of power controllers within a string, and each synchronization sub-group may have its own power switching frequency. An embodiment may distribute only one synchronization signal and yet get to groups of PCs each operating at different power switching frequencies, such as if all PCs within each

synchronization sub-group use a switching frequency that is the quotient of dividing the synchronization frequency by the same number (not limited to an integer only). In an

embodiment to further reduce the electromagnetic switching noise generated by the system, a spread spectrum frequency modulation of the synchronization signal may be employed by the string controller that would periodically, slowly modulate the power switching frequency around a center frequency. As PCs are synchronized to the synchronization frequency, each PC's pulsating output voltage Vpc may follow the momentary synchronization frequency while the individual time delay (for interleaving) may be calculated locally by each PC or set by the SC as it varies the synchronization frequency. Since the switching frequency fs of the PC may be low (for example 5 kHz, but a lower or higher frequency may be selected), the rise time and fall time of the power switches may be designed to be relatively long (for example -300 ns), which may minimize radiated electromagnetic emission. Prolonging the rise and fall times may be achieved by reducing the gate drive current and/or adding a gate drain capacitance, and/or a gate source capacitance. A common mode transformer (not shown) may be added in series with the output of each power controller in order to further reduce electromagnetic emission.

[0073] Figure 18 shows an auxiliary power voltage and synchronization signals superimposed on the string voltage by a string controller in an embodiment of the system of Figure 2 with power controllers 3 connected to PV panels 1, a SC 5, a backup power connection 18, string voltage 4 and voltage signals superimposed on the string voltage 4: a synchronization signal 9 (generated by the synchronizer block 13 which may reside within the SC 5), and an auxiliary backup voltage VAUX 20 (generated by the AUX Power block 17 which may reside within the SC 5). In an embodiment, the system may have power disconnect safety features based on the existence of signals (such as the synchronization signal 9) sent by blocks within the SC 5 to the power controllers 3. The SC 5 may turn off the synchronization signal 9 upon the occurrence of certain events (such as fire) requiring assured and immediate shut off of power transfer to the string electrical wiring 1 1 without relying on exchanging communication messages between the

17 controller (not shown) of the SC 5 and the controllers (not shown) of the PCs 3. Stopping the synchronization signal 9 may signal to each PC (that may extract the synchronization frequency fs controlling the PC's power switching stage from that synchronization signal 9) to immediately and independently shut off its switching power stage. In an embodiment, the PC 3 may be designed to have different shut off levels, such as disconnecting the PC's switching power stage outputs from the string electrical wiring or shorting the outputs of the PC's switching power stage, or forcing the duty cycle of the PC's switching power stage to operate at a very low duty cycle value (for example 0.01 ). The latter case of very low duty cycle may imply a partial shut off state, generating over the string electrical wiring a series of short pulses that may not add up (due to the time interleaving between the PCs on the string) to create hazardous string voltage to installers or service technicians, even during daylight. Furthermore, in an embodiment of the system of Figure 2, superimposing the synchronization signal 9 onto the string voltage over the string electrical wiring 1 1 , may enable each PC to independently shut off its switching power stage in case of a short circuit on the string electrical wiring 1 1 , by detecting the vanishing of the synchronization signal on the string electrical wiring which may occur for example during a short circuit condition.

[0074] Referring to Figure 2, in an embodiment where the electronics within the PC is powered only from the PV panel voltage Vpv 7, the controller of the PC may not function when the Vpv is nonexistent or too low (for example during nights, panel disconnect events, or panel malfunction events), preventing the PC for example from detecting and reporting a case of panel theft during night time. In an embodiment, shown in Figure 18, the PCs may extract the power required to operate the PC's electronics from a low voltage (for example, having an amplitude in the order of 10V) AC signal VAUX 20 that may be generated inside the SC by an auxiliary power block 17. The auxiliary power voltage VAUX 20 may be superimposed on the string electrical wiring 1 1 through the string interface block (not shown). The PC 3 receiving such auxiliary power voltage 20 may extract, from voltage 20, energy that may power its electronics and may enable the PC to constantly monitor the existence of the PV panels 1 and maintain communication messages exchange (not shown) with the SC 5, even during nights or when the PV panel 1 is disconnected. The SC may be able to always generate VAUX, even when no solar energy is harvested by the system, as the SC may have a backup power connection 18, such as connection to the grid AC power, or a charge-holding device, for example a battery (rechargeable and/or non-rechargeable) or super-capacitor, to handle periods of low solar irradiance. In an embodiment, the system may use the same VAUX signal 20 also as the synchronization signal 9 to distribute switching information to the PCs' switching power stage. The energy supplied by such backup power source may ensure that safety features, for example smoke detectors or other safety features known in the art, if implemented inside the SC 5 and/or inside the PCs 3, are always powered.

[0075] In an embodiment, such as an embodiment of the system of Figure 2 with Building Integrated PV panels, the PC may contain a smoke detection sensor and/or alarm and the PC may be programmed to shut off its power switching stage and/or inform the SC about the presence of smoke through communication message exchange between the controller of the PC and the controller of the SC.

[0076] In an embodiment, each PC may have a unique serial number. During PV string deployment, the physical location of each identifiable component may be recorded by a technician on a location and string connection map. In order to simplify the process of string deployment, each PC may be automatically be given a unique string sequence number which may then be reported along with its serial number to the SC over communication message exchange channel (not shown). The process of allocating string sequence numbers during deployment may be accomplished in a distributed manner by having each PC randomly select a sequence number and broadcast it on the string. The process may be repeated for the PCs that elect the same sequence number until all of them have a unique string sequence number. The physical location of each PC in the string might be also determined automatically by the use of GPS physical location finder or wireless triangulation.

[0077] Figure 19 shows a block diagram of the string controller 5 in an embodiment of the system of Figure 2, with a backup power connection 18, string voltage Vs 4, auxiliary power block 17, string interface block 34, string overvoltage and current limit block 124, voltage rectifier 14, filter 15, filtered string voltage VF 12 1 , power switching stage block 128 and its output voltage Vo 141 , output filter and output overvoltage and current limit block 130, controller 134 (for example a microcontroller, microprocessor, or other controller known in the art), output voltage VHV 6, synchronizer 13, and communication channels 10. The SC 5 may be used to interface the power harvesting devices that may reside on the string (i.e. PCs and PV panels) to power utilizing devices 29, such as a DC to AC inverter 12 (that may be connected to an AC grid), a battery charging and storage system (not shown), or a DC load (not shown) or any other power utilizing devices known in the art. Referring to Figures 2 and 19, the SC 5 may implement any combination of the following functionalities:

1. Managing and orchestrating the synchronization and interleaving of the PCs on the string by distributing synchronization signals 9 to PCs 3.

2. Rectifying 14 the pulsating string voltage 4.

3. Filtering 15 to smooth the string current 19.

4. Providing auxiliary power voltage 20 to the PCs, and operating bi-directional message exchange communication channels (not shown) with the PCs. Such message exchange communication may be used (for example over dedicated link, wired or wireless, or by superimposing it over the string voltage 4) for configuring and monitoring the PCs' and PV panels' operation and health, and may implement communication protocols such as methods used in power-line communication or any other methods known in the art ;

5. Collecting configuration and operational information about the PCs and power harvested, and reporting it to a remote user or computer over the external communication channels 10 or by using a local user interface (not shown);

6. Reporting over the same external communication channels 10 or local user interface, the operational information and configuration of the SC itself and allowing a user to alter the configuration of both SC and PCs;

7. Implementing any safety features known in the art, such as over-current and over- voltage protection on string side 124 (for protecting the string cabling, breakers and PCs) and inverter side 130, and forcing shut off of PCs upon demand;

8. Implementing power processing functions (in the power switching stage 128) on the electrical energy flowing through the SC 5 from the string towards the DC to AC inverter 12, adjusting the output voltage V_HV 6 of the SC;

9. Enabling output voltage VHV 6 equalization between multiple string controllers 5

connected in parallel connection, connecting multiple strings to a single DC to AC inverter 12; and

10. Communicating with the DC to AC inverter 12 to enable system-level optimization of the total power harvested by controlling the value VHV 6 and the operation of the PCs.

[0078] Referring to Figures 2 and 19, in an embodiment, the input voltage to the SC 5 is the string voltage Vs 4 resulting from the series-connected PCs 3 (and, in some embodiments, PV panels without PCs). The string voltage Vs 4 may be passed through the string interface block 34 that may couple and superimpose signals onto the string voltage, such as synchronization signals 9 (may be generated by the synchronizer 13), auxiliary power voltage 20 (may be generated by the AUX power block 17 that may be powered by the backup power connection 18) and bidirectional message exchange communication with the PCs (not shown, may be generated by the controller 134). The string interface 34 may be implemented using similar string interface schematics as shown in Figure 16. The SC 5 may also implement overvoltage and over current protection towards the string 124, rectify 14 the string voltage and/or filter 15 the string current, resulting in a filtered string voltage V_F 121. This smoother DC- version of the string voltage and current may be altered by the power switching stage 128 by stepping-up or stepping-down the VF voltage 121 to create voltage Vo 141. After the power switching stage 128, the SC 5 may implement additional filtering and additional overvoltage and over current functionalities 130 towards the inverter side, resulting in the output voltage VHV 6 that may be within the optimal operating conditions for the DC to AC inverter 12 (or another power utilizing device such as a battery charging and storage system). The SC 5 may interact with the user by using either local user interface using human interfaces within the SC (not shown), for example an LCD screen, keypad, touch screen or Bluetooth connection to a smart phone, or by using remote user interfaces to communicate with to a remote host computer over the external communication channels 10 (may include for example, Ethernet, Wi-Fi, Cellular, RS485 or other communication protocols known in the art).

[0079] The SC 5 may have a variety of possible functionalities such as no/partial/full power switching stage, with/without filtering, with/without current protection, with/without overvoltage protection, with/without external communication channel, with/without local user interface, with/without auxiliary power voltage generation, with/without communication message exchange with the PCs and with/without input to output electrical isolation. The functionalities of the SC 5 may be implemented in a single physical device on the string or be split into more than a single physical device, or be integrated (partly or entirely) as a sub-system inside the DC to AC inverter 12.

[0080] In an embodiment, a minimal -functionality SC power switching stage may pass (i.e. short) the filtered string voltage VF 121 unaltered to the output terminals of the SC towards the DC to AC inverter 12. However, the filtered voltage 121 (that results from the string voltage Vs 4) may not be within the optimal range for the specific DC to AC inverter used in the system (i.e. inverter may not be able to attain its maximal efficiency point) or may even be outside the operating conditions specified for the DC to AC inverter (such as being a too low string voltage). Therefore, various embodiments of the power processing stage 128 inside the SC 5 may differ in their ability to step-up or step-down the string voltage. The power processing stage 128 may be a full-power switching stage (such as shown in Figures 20 and 21) that may handle the entire string power and shift the string voltage up or down over a wide range, or a partial-power switching stage (such as shown in Figures 22, 23 and 24) that may shift the string voltage over a smaller range and handle less than full string power. Power switching stages in string controllers may implement galvanic isolation between the string voltage Vs 4 and the VHV 6 that feeds into the DC to AC inverter 12.

[0081] Figure 20 shows a buck-boost power switching stage 128 implementation of a string controller that may be capable of full-power processing in an embodiment of the system of Figure 2 with filtered string voltage VF 121, gating signals Gl, G2, G3, G4, an output capacitor C, an inductor L, power switches Ql, Q2, Q3, Q4, and voltage Vo 141.

[0082] Figure 21 shows a switching stage 128 of a string controller that may be capable of full- power processing, arranged as a parallel configuration of smaller (that may be capable of processing partial string power) buck-boost power switching elements 129a, 129b, 129c, filtered string voltage VF 121, and voltage Vo 141 in an embodiment of the system of Figure 2.

[0083] Figures 20 and 21 shows a power switching stage 128 implementations within the SC that may fully process the entire string power in an embodiment of the system of Figure 2. Referring to Figure 20, the system may have a power switching stage 128 inside the SC, such as a Buck- Boost type, that may step up (Boost) the filtered string voltage 121, step down (Buck) the filtered string voltage 121, or short (Bypass) the input 121 to the output 141 through the inductor L when voltage alteration is not required in order to avoid power lost due to power switching stage efficiency. Such implementation of the power switching stage 128 may be made to handle the full string power and regulate its output Vo 141 over a wide range of VF input voltages 121. In an embodiment, shown in Figure 20, four power switches Ql, Q2, Q3, Q4 and inductor L and output capacitor C may be used. Each power switch Ql, Q2, Q3, Q4 may be controlled by its respective gate signal Gl, G2, G3, G4 generated by the controller 134 of the SC. Other power switching stage designs may be used in the system, such as Buck, Boost, half-bridge or full- bridge phase shift, soft switching topologies, or any other power switching stage topologies known in the art.

[0084] In an embodiment, the system may have a parallel configuration of power switching stages, as depicted in Figure 21 where a full-power switching stage may utilize a parallel configuration of smaller power switching elements 129a, 129b, 129c. The power stage 128 may be composed of an array of N identical smaller (i.e., capable of handling only part of the total string power) switching elements (in Figure 21 three elements 129a, 129b, 129c are shown), for example of buck-boost switching topology, that are all operating in the same switching frequency fssc but each switching element may be shifted in time (i.e. time interleaved by tdsci, tdsc2 ... tdscn). This configuration may handle higher than N times the power of each switching element 129, and may result in a smoother (lower ripple) current and voltage at both the input and the output of the power switching stage 128 while using smaller reactive elements.

[0085] Other embodiments of the power switching stage 128 within the SC 5 may implement partial-power processing functionality that may accommodate (by performing step-up or step- down of the filtered string voltage V_F 121) only narrower string voltage 4 range, where most of the input power (depending on the voltage difference AV between V_F 121 and the desired output voltage VHV 6 feeding the DC to AC inverter 12) flows from the input terminals of the SC to the output terminals of the SC without being processed by the power switching stage. Only the power associated with the voltage difference AV is handled by the power switching stage 128, which may result in very high overall power transfer efficiency within the SC while supplying the DC to AC inverter 12 with an optimal VHV 6 voltage range.

[0086] Figure 22 show a block diagram of an isolated partial-power switching stage of a string controller in an embodiment of the system of Figure 2 with filtered string voltage V_F 121, a current sense element 160 for measuring the filtered string current IF 162, controller 134, DC to DC module 142, voltage V_A 144, voltage VHV 6, voltage V₀ 141, control signals Gl, G2, G3, G4, and power switches Ql, Q2, Q3, Q4. In an embodiment, the rectified and filtered string voltage VF 121 may be stepped down using commercial isolated DC to DC module 142, resulting in a DC voltage VA 144 that feeds a capacitor and a full-bridge power switching stage that may implement voltage polarity reversal. The value of the four gate control lines Gl, G2, G3, G4 may determine the polarity of Vo (either positive or negative). The controller 134 controls the DC to DC module 142 and the four power switches Ql, Q2, Q3, G4 to set the output voltage Vo 141 of the full-bridge be equal to the voltage difference between the desired SC's voltage output VHV 6 and the rectified and filtered string voltage VF 121. The controller 134 may implement that based on measuring the input voltage 121 and current 162 into the isolated DC to DC module 142, and measuring VA 144 and VHV 6.

[0087] Figures 23 and 24 depict embodiments of the isolated partial-power switching stage (such as the one shown in Figure 22) within a string controller, referenced to the positive or negative leads, respectively, in an embodiment of the system of Figure 2 with filtered string voltage VF 121, an isolated partial -power switching stage 127, voltage Vo 141, output filter and output overvoltage and current limit block 130, and voltage VHV 6. In an embodiment, the output voltage Vo 141 of the isolated partial-power switching stage 127, after an additional filtering and over current / overvoltage protection stage 130, may be connected in series, as shown in Figures 23 and 24, with the rectified and filtered string voltage VF 121 to form the VHV 6 voltage that may be fed into the DC to AC inverter 12. Such series connection of VF 121 and the output voltage of SC's isolated partial-power switching stage Vo 141, may be referenced to the positive lead (as illustrated in Figure 23) or may be referenced to the negative lead (as illustrated in Figure 24).

[0088] Figure 25 shows two implementations of passive filter of a string controller in an embodiment of the system of Figure 2. In an embodiment, the resulting string voltage may contain some ripple at harmonics of the power switching frequency fs of the PCs. Filtering block 15, may be implemented inside the SC, to reflect high electrical impedance ZIN value toward the string for those ripple frequency components. In an embodiment the filter 15 may be a passive low pass filter. Figure 25A shows a single stage passive low pass filter that may have a dominant pole at a frequency much lower than the PCs' power switching frequency fs. Fig 24B shows a passive low pass filter implementation having several frequency traps that may block the discrete frequency harmonics of the string current Is 19. Other passive or active filter topologies known in the art may be implemented, for example the deliberate injection of AC harmonics into the string voltage to cancel out the harmonics generated by the PC's switching frequency.

[0089] Figure 26 shows a block diagram of an active current harmonics cancelling filter of a string controller in an embodiment of the system of Figure 2, with a controller 134, a current source element 165, and a second current sense element 166. Since the PCs derive their power switching frequency from the synchronization signal 9 that is generated by the SC, a current source element 165 injecting AC harmonics in parallel with the string voltage may lock accurately to the harmonics generated by the PCs. By using a closed loop control within the controller 134 of the SC, which senses the string current using a second current sensing element 166, an accurate map of the required signal frequency and amplitude may be calculated and injected by the current source element 165, attenuating the harmonics on the string current 19.

[0090] Figure 27 shows a connection of multiple strings by connecting the outputs of string controller in parallel in an embodiment of the system of Figure 2 with PV panels 1, PCs 3, string currents 19a, 19b, string voltages Vsi 4a Vs₂ 4b, SCs 5a, 5b, voltage VHV 6, and an inverter 12. In an embodiment, the outputs of multiple SCs (5a and 5b) may be connected in parallel and the output voltage V_HV 6 may be fed into a single DC to AC inverter 12. Due to different string configuration and/or different operating conditions, the string voltages Vsi 4a and Vs2 4b may be different (and also string currents 19a and 19b may be different), hence string controllers which implement partial power processing or full power processing may be able to efficiently parallel connect SCs, in spite of the different string voltages, by equaling the output voltages of the parallel connected SC. Such string controllers connected in parallel may be able to output the same VHV 6 by implementing techniques, in the SCs power switching stage, such as soft V-I curve (drooping characteristics) and/or by implementing bidirectional communicating channels (not shown) between all SCs connected in parallel that may be used to configure all SCs to the same target value for the output voltage VHV 6. In an embodiment, multiple SCs may also be connected in series (not shown), resulting in summation of the string voltages and resulting in higher VHV towards the DC to AC inverter. In an embodiment, bidirectional communication channels (not shown) between SCs connected in series may be implemented to ensure the SCs configure their power switching stages to achieve maximal system power extraction efficiency.

[0091] Figure 28 shows an embodiment of Figure 27 with a combined string controller 28. In an embodiment, more than one string may be connected to a single combined string controller 28. The combined string controller 28 may connect multiple strings, each having its own string voltage (such as the two string voltages 4a, 4b) to a single output voltage VHV 6 fed into a DC to AC inverter 12. The functionality of the combined string controller 28 may include the functionalities of multiple SCs, or may have some functionalities shared. For example, the combined string controller may have a single synchronizer block providing the synchronization signals to all strings, a single AUX power block providing auxiliary power to all strings, or a single set of communication channels 10 used to communicate and monitor all elements on the multiple strings.

[0092] In an embodiment of Figure 2, the SC 5 may include functionality to automatically track and lock to the voltage that yields maximum efficiency of the DC to AC inverter 12, for example by slowly shifting the DC voltage VHV 6 and monitoring the effect of this change on the output of the DC to AC inverter by having the SC communicate directly with the DC to AC inverter, or by having the SC receive updates regarding the resulting AC power produced by the DC to AC inverter (for example by receiving updates sent through the external communication channels 10 from an online Internet database that accumulates the energy and power produced by the DC to AC inverter). By periodically analyzing the system's total harvested AC energy, the SC may choose to alter its DC output voltage V_HV 6 in order to maximize the energy produced by the DC to AC inverter

[0093] In an embodiment, the SC may also implement direct control over the string voltage Vs 4 instead of letting the string voltage be determined by local decisions made by each PC. For example, instead of allowing each PC independently determine its duty cycle (for example according to a MPPT algorithm), the SC may instruct each PC to alter its locally-determined duty cycle, resulting in changes to the filtered string voltage VF inside the SC. For example, the SC may send explicit commands to the PCs over message exchange communication channels (not shown) or by providing such command indirectly, by varying the center frequency of the auxiliary voltage signal VAUX 20 or of the center frequency of the synchronization signal frequency fs 9. The PC may interpret shifting up the frequency as a command instructing the PCs to increase their duty cycle (that would result in an increase in the string voltage 4) and vice versa.

[0094] Figures 29 - 31 show embodiments of the system of Figure 2 with a pulsating PV panel. Figure 29 shows an embodiment of a pulsating PV panel having a bi-polar full-bridge power switching stage implementation. Figures 30 and 31 show embodiments of a pulsating PV panel having uni-polar half-bridge power switching stage implementations. In an embodiment of the system of Figure 2, power controllers 3 may be connected directly (by means of conductive connections, for example electrical wires or conductive ribbons, or any other conductive connection known in the art) to substrings 5 1 , each substring composed of multiple photovoltaic cells 52 connected in a combination of series connection (shown in Figures 2 and 29-31) and parallel connections (not shown).

[0095] Referring to Figures 29-31 , in an embodiment, multiple substrings 51a, 51b, 51c and the PCs (not shown) connected to them may be co-located inside a PV panel, resulting in a pulsating PV panel 53. Co-locating the functionally of several PCs 3 inside a single pulsating PV Panel 53 may enable combining some PCs' blocks into a single functional block.

[0096] Figure 29 shows an embodiment of the system of Figure 2 with a pulsating PV panel 53 having a bi-polar full-bridge power switching stage implementation for co-located power controllers (not shown) inside the pulsating PV Panel 53, a controller 54, multiple substrings 51a, 51b, 51c, each having multiple photovoltaic cells 52 within them, current sense elements 40a, 40b, 40c measuring the respective substring currents 42a, 42b, 42c , filter blocks 30a, 30b, 30c, gating signals Gla, Gib, Glc, G2a, G2b, G2c, G3a, G3b, G3c, G4a, G4b, G4c for respective power switches Qla, Qlb, Q lc, Q2a, Q2b, Q2c, Q3a, Q3b, Q3c, Q4a, Q4b, Q4c to control the operation all co-located bi-polar power switching stages 33a, 33b, 33c, a string interface block 34, and interface 38. In an embodiment, instead of having separate PC controller blocks (e.g. one controller block 36 for each PC 3, as shown in Figure 12), a single controller block 54 may be used in a pulsating PV panel 53. The single controller block 54 may sense the substring voltages 7a, 7b, 7c and currents 42a, 42b, 42c from all co-located substrings 51a, 51b, 51c, respectively, and may output the gating signals (Gla, Gib, Glc, G2a, G2b, G2c, G3a, G3b, G3c, G4a, G4b, G4c) to control the operation of all co-located bi-polar power switching stages 33a, 33b, 33c, respectively, according to information extracted from synchronization signals (generated by the synchronizer block 13 and received over interface 38) and the results of an algorithm, such as MPPT algorithm. Likewise, in an embodiment, instead of having separate string interfaces blocks (e.g. one string interface block 34 for each PC 3, as shown in Figure 12), a single string interface block 34 may be used in a pulsating PV panel 53 and its respective interface 38 may be connected to the single controller block 54. In an embodiment, the controller 54 may communicate with the string interface 34, over interface 38, to receive auxiliary power and exchange bi-directional communication messages with the SC 5 shown in Figure 2.

[0097] Figures 30 and 31 depict an embodiment of a pulsating PV panel 53 that may use the unipolar half-bridge power switching stage schemes 32a, 32b, 32c (as depicted in Figure 4 and Figure 5 respectively), instead of a full-bridge power switching stage scheme, with a controller 54, multiple substrings 51a, 51b, 51c, each having multiple photovoltaic cells 52 within them, current sense elements 40a, 40b, 40c measuring the respective substring currents 42a, 42b, 42c , filter blocks 30a, 30b, 30c, gating signals Gla, Gib, Glc, G2a, G2b, G2c for respective power switches Qla, Qlb, Q lc, Q2a, Q2b, Q2c to control the operation all co-located uni-polar power switching stages 32a, 32b, 32c, a string interface block 34, and interface 38. As each uni-polar switching stage 32a, 32b, 32c may have two power switches, the controller block 54 may generate two gating signals Gla, G2a, Gib, G2b, Glc, G2c per substring. Both half-bridge configurations of the pulsating PV Panel 53 shown in Figures 30 and 31 may be used in an embodiment where all PCs 3 in the string (referring to Figure 2) operate in uni-polar string voltage mode, and may be mixed within the same string loop. The use of the bi-polar configurations of the pulsating PV Panel 53, as shown in Figure 29 for example, requires that all PCs 3 in the string (referring to Figure 2) operate in an alternating bi-polar string voltage mode.

[0098] Figures 32-35 show embodiments of the system of Figure 3 with an integrated DC PV panel 56. In an embodiment, the integrated DC PV panel 56 co-locates several substrings 51 of photovoltaic cells 52, power controllers 3 and functional blocks of the string controller (e.g. SC 5 in Figure 3), resulting in DC output voltage of such integrated DC PV panel 56 that may be series-connected in a string like PV panel Id in Figure 3. The integrated DC PV Panel 56 may behave like a PV panel that tracks its maximum operating power point and includes a communication interface (not shown) for monitoring and controlling the operation of the integrated DC PV panel. The bi-directional communication messages exchange between the integrated DC PV panel and a remote user or computer (not shown) may be implemented using powerline communication on the string electrical wires 1 1 (such as shown in Figures 33-35) or using any other communication methods known in the art, such as Wi-Fi, Ethernet, RS232 or other wireless and wired communication protocols.

[0099] Figure 32 shows a block diagram of an embodiment of the system of Figure 3 with an integrated DC PV panel 56 having a uni-polar power switching stage implementation, a synchronizer 13 generating synchronization signal(s) 9, multiple substrings 51, each substring composed of multiple photovoltaic cells 52 connected in a combination of series connection (shown in Figures 32-35) and parallel connections (not shown), connected to several PCs 3 having uni-polar switching power stages. In an embodiment, the uni-polar PCs may be connected in series and the two output terminals of the series-connected uni-polar PCs may be fed into a filter 15. The output of the filter 15 is a DC voltage that could be series-connected in a string with PV panel(s) (such as PV panel Id shown in Figure 3) and uni -polar PCs 3. A synchronizer block 13 may distribute synchronization signals 9 to all the PCs 3 co-located within the integrated DC PV panel 56, thus ensuring the synchronized and time-interleaved operation of the PCs 3 within the integrated DC PV panel 56.

[00100] Figures 33-35 show embodiments of the system of Figure 3 with an integrated DC PV panel 56 having various power switching stage implementations. The co-location of the PCs 3 inside the integrated DC PV panel 56 may enable combining functional blocks of otherwise separate PCs, such as having a single controller block 55 and a single string interface block 34 for the integrated DC PV Panel 56, as shown in Figures 33-35, and may simplify the

synchronization of power switching stages to the synchronization signal(s) 9 by the controller 55.

[00101] Figures 33 and 34 show embodiments of the system of Figure 3 having an integrated DC PV panel 56 with a uni-polar half-bridge power switching stage implementation. In an embodiment, the system has a synchronizer 13 generating synchronization signal(s) 9, a controller 55, multiple substrings 51a, 51b, 51c, each having multiple photovoltaic cells 52 within them, current sense elements 40a, 40b, 40c measuring the respective substring currents 42a, 42b, 42c, filter blocks 30a, 30b, 30c, gating signals Gla, Gib, Glc, G2a, G2b, G2c for respective power switches Qla, Qlb, Q lc, Q2a, Q2b, Q2c to control the operation all co-located uni-polar power switching stages 32a, 32b, 32c, 33a, 33b, 33c, a string interface block 34, an interface 38, and a filter 15. The single controller block 55 may sense the substring voltages 7a, 7b, 7c and currents 42a, 42b, 42c from the co-located substrings 51a, 51b, 51c, respectively, and may output the gating signals (Gla, Gib, Glc, G2a, G2b, G2c) to control the operation of all co- located uni-polar power switching stages 32a, 32b, 32c, respectively, according to information extracted from synchronization signals (generated by the synchronizer block 13) and results of an algorithm, such as MPPT algorithm. In an embodiment, the controller 55 may communicate with the string interface 34, over interface 38, to receive auxiliary power and exchange bidirectional communication messages with a string-level controller, such as a SC 5 shown in Figure 3 or SC functionality that may be embedded within the DC to AC inverter.

[00102] Figure 35 shows an embodiment of the system of Figure 3 with an integrated DC PV panel 56 utilizing a bi-polar switching stage implementation 33 for each substring 51a, 51b, 51c. In an embodiment, the system has a synchronizer 13 generating synchronization signal(s) 9, a controller 55, multiple substrings 51a, 51b, 51c, each having multiple photovoltaic cells 52 within them, current sense elements 40a, 40b, 40c measuring the respective substring currents 42a, 42b, 42c, filter blocks 30a, 30b, 30c, gating signals Gla, Gib, Glc, G2a, G2b, G2c, G3a, G3b, G3c, G4a, G4b, G4c for respective power switches Qla, Qlb, Qlc, Q2a, Q2b, Q2c, Q3a, Q3b, Q3c, Q4a, Q4b, Q4c to control the operation of all co-located power switching stages 33a, 33b, 33c, a string interface block 34, an interface 38, a rectifier block 14, and a filter 15. The controller 55 may implement MPPT algorithm, handle auxiliary power and communication protocols, and activate the gating signals of the bi-polar power processing stage (four power switches' gating signals per substring may be required), in synchronization with the

synchronization signal(s) 9. The use of bi-polar power switching stage inside the integrated DC PV panel 56 may require the use of a rectifier block 14 to rectify the internal alternating voltage.

List of Features

1 PV panel(s)

2 power source (general)

3 power controller(s) PC

4 string voltage Vs

5 string controller(s) SC

6 voltage VHV (at the output terminals of string controllers)

7 voltage V_PV (at the input terminals of power controllers)

8 pulsating output voltage VPC (at the output terminals of power controllers)

9 synchronization signal(s)

10 communication channels

11 string electrical wires

12 DC to AC inverter

13 synchronizer block

14 voltage rectifier block

15 filter block

17 auxiliary power block

18 backup power connection

19 string current Is

20 auxiliary power voltage VAUX

28 combined string controller

29 power utilizing device (general)

30 filter block in PC

32 uni-polar switching power stage of PC

33 bi-polar switching power stage of PC

34 string interface block

36 controller block of PC

38 interface for superimposed signals of the string interface block

40 current sense element in PC

42 PV panel current

51 substring(s) within a PV panel(s) photovoltaic cell(s)

pulsating PV panel(s)

controller block of the pulsating PV panel

controller block of the integrated DC PV panel

integrated DC PV panel(s)121 filtered string voltage VF

string overvoltage and current limit block in SC

isolated partial-power power switching stage in SC

power switching stage in SC

buck-boost power switching element in SC

output filter and output overvoltage and current limit block in SC controller block of the SC

1 voltage Vo (at the output of power switching stage in the SC)

isolated DC to DC module in SC

voltage VA (at the output terminals of isolated DC to DC module in SC) first current sense element in SC (measuring the filtered string current) filtered string current IF

current source element in SC

second current sense element in SC

Claims

1. A power processing system, the system comprising:

a plurality of power controllers comprising

a plurality of power controller outputs connected in a series connection, wherein each power controller of the plurality of power controllers comprises at least one switching power stage, and

conducting connections connecting the plurality of power controllers in a series connection to form a string voltage,

wherein

each power controller of the plurality of power controllers is configured to:

receive at least one synchronization signal,

extract information from at least one synchronization signal, and generate a pulsating output voltage based on the extracted information, and

at least one of the power controllers in the plurality of power controllers is configured to receive electric energy from at least one power source.

2. The system of claim 1, further comprising a synchronizer for synchronizing the plurality of power controllers by sending at least one synchronization signal to the plurality of power controllers.

3. The system of claim 1, wherein the information is selected from the group consisting of at least one of power switching frequency, an output polarity, and a combination thereof.

4. The system of claim 1, wherein the power source comprises at least one PV panel or a plurality of photovoltaic cells.

5. The system of claim 1, further comprising an element selected from the group consisting of at least one of a voltage rectifier, a filter, and a combination thereof.

6. The system of claim 1, wherein each power controller comprises a pulsating output voltage comprising a duty cycle, and wherein the duty cycle is determined based on the results of an algorithm or a predetermined value.

7. The system of claim 1, wherein each power controller comprises a pulsating output voltage that is time interleaved with the pulsating output voltage of each other power controller.

8. The system of claim 1, wherein each power controller comprises a uni-polar pulsating output voltage or a bi-polar pulsating output voltage.

9. A method of processing power, the method comprising:

providing:

a plurality of power controllers comprising a plurality of power controller outputs connected in series, each power controller of the plurality of power controllers comprising at least one switching power stage,

conducting connections for connecting the plurality of power controllers in a series connection to form a string voltage,

string current within the conducting connections,

generating a pulsating output voltage at each of the power controllers of the plurality of power controllers by:

receiving electric energy from at least one power source,

receiving at least one synchronization signal,

converting the electric energy to the pulsating output voltage within the at least one switching power stage,

extracting information from the at least one synchronization signal, and generating the pulsating output voltage based on the extracted information.

10. The method of claim 9, further comprising

providing a synchronizer for synchronizing the plurality of power controllers, generating the at least one synchronization signal in the synchronizer,

sending the at least one synchronization signal to the plurality of power controllers, and synchronizing the plurality of power controllers based on the at least one synchronization signal.

11. The method of claim 9, wherein the information is selected from the group consisting of at least one of power switching frequency, an output polarity, or a combination thereof.

12. The method of claim 9, wherein the power source comprises at least one PV panel or a plurality of photovoltaic cells.

13. The method of claim 9, further comprising

providing at least one voltage rectifier for rectifying the string voltage, and

rectifying the string voltage in the at least one voltage rectifier.

14. The method of claim 9, further comprising

providing at least one filter for filtering the string current, and

filtering the string current in the at least one filter.

15. The method of claim 9, further comprising

providing

at least one voltage rectifier for rectifying the string voltage, and

at least one filter for filtering the string current,

rectifying the string voltage in the at least one voltage rectifier, and

filtering the string current in the at least one filter.

16. The method of claim 9, further comprising generating the pulsating output voltage

comprising a duty cycle, wherein the duty cycle is determined based on results of an algorithm or a predetermined value.

17. The method of claim 9, wherein the step of generating a pulsating output voltage at each of the power controllers of the plurality of power controllers further comprises generating the pulsating output voltage that is time interleaved with the pulsating output voltage of each other power controller.

18. The method of claim 9, wherein the step of generating a pulsating output voltage at each of the power controllers of the plurality of power controllers further comprises generating a uni-polar pulsating output voltage or a bi-polar pulsating output voltage.