WO2017144111A1

WO2017144111A1 - Communication system with latency-controlled forward error correction

Info

Publication number: WO2017144111A1
Application number: PCT/EP2016/054059
Authority: WO
Inventors: Wen Xu; Onurcan ISCAN
Original assignee: Huawei Technologies Duesseldorf Gmbh
Priority date: 2016-02-26
Filing date: 2016-02-26
Publication date: 2017-08-31

Abstract

The present invention proposes a receiver of a communication system, comprising a latency parameter (T _d) controlling a part of, or the whole system latency or/and latency requirement, and e.g. comprising a reception unit configured to receive codewords transmitted by a transmitter, and a forward error correction, FEC, channel decoder for decoding the codewords into messages, wherein one or more FEC decoding parameters of the channel decoder are adjustable depending on a latency parameter (T _d) characterizing a part of, or the whole, system latency or/and latency requirement (τmax).

Description

COMMUNICATION SYSTEM WITH

LATENCY-CONTROLLED FORWARD ERROR CORRECTION

TECHNICAL FIELD

The present invention generally relates to the field of wireless communication, and specifically relates to channel encoding and decoding as well as to forward error correction.

BACKGROUND

In each communication system, there exist a delay/latency between the generation of the message at the transmitter (Tx) and the reconstruction of that message at the receiver (Rx). Depending on the application, the delay can have a critical impact on the quality of service (QoS) and the quality of experience (QoE).

One important aspect causing the latency is the structural delay. Both the transmitter and the receiver consist of several components or processing blocks (e.g. frame building, symbol (de)mapping, (de)interleaving, modulation, channel encoding, channel decoding, etc), which can only perform their tasks, if certain (delay causing) requirements are fulfilled.

For instance, a channel encoder/decoder maps an input sequence to another sequence with some structure to combat errors in the communication channels. In order for the channel encoder to start processing, a predefined number of information bits have to be fed to the encoder, which should be supplied by the previous blocks in the transmitter chain. This kind of delay is independent of the used hardware and implementation technology and depends only on the structure of the processing blocks. It is therefore called a structural latency. Usually, structural latency exists in all communication components. Another example is the symbol (de)mapper. A symbol mapper takes as input a sequence of bits and the mapping order as a parameter, and outputs a sequence of symbols, where each symbol represents a single bit or a multiple of bits according to the mapping order. For instance, a BPSK mapper maps one bit to a single symbol, whereas a QPSK mapper maps two bits to a single symbol. Similarly, a demapper performs the inverse operation. As a consequence, a BPSK (de)mapper can start processing if only one bit is available, whereas a QPSK mapper can only start processing if at least 2 bits are available at the input. Similar property can also be shown for multicarrier (de)modulators, e.g. OFDM

(de)modulators. An OFDM (de)modulator takes as input a sequence of symbols and maps it to another sequence of symbols, and according to the chosen number of subcarriers (e.g. FFT size) the required length of the input/output can be varied. As a consequence, if a smaller FFT size is chosen, the OFDM (de)modulator can start processing earlier as compared to a case where the FFT size is chosen as a larger value.

Another example is the (de)interleaver which realigns the order of its input sequence according to some rules. In general, in order the interleaver to perform its task, the whole sequence should be available at the input, e.g. when a conventional block interleaver is employed. If an interleaver with a shorter interleaving depth (which is a metric defining the distance between the input and the output indices) is selected, the processing can start when a smaller block of data sequence (instead of the whole block of sequence in case of a conventional block interleaver) is available at the input. For example, a convolutional interleaver, or a window interleaver which will be detailed in the following, has usually a shorter interleaving depth than a conventional block interleaver, and therefore, they can be used to reduce the structural latency. Note that a deinterlever is an interleaver with an interleaving function being the inverse of the interleaving function of the corresponding interleaver. In known state-of-the art wireless systems, the latency cannot be adjusted by the transmitter or the receiver directly. The decoding latency can be adjusted by changing the message length; however the overall latency is limited by the other processing blocks, like channel interleavers, causing idle times and inefficient use of many processing blocks. In known state-of-the-art communication systems like LTE (Long-Term Evolution), there are processing elements that cause a certain amount of delay to support worst case conditions. An example for that is related to the timing advance (TA).

In LTE, TA is defined as a negative timing offset at the User Equipment (UE) between the start of a received downlink subframe and a transmitted uplink subframe. TA helps the uplink subframes of different UEs to be aligned in time during the reception at the eNodeB.

The timing difference between the UEs is mainly caused by the difference in distance of the UEs to the eNodeB. The UEs that are located closer to the eNodeB experience a smaller propagation delay, whereas the UEs far away from the eNodeB have a larger propagation delay.

The TA is equal to two times the propagation delay, assuming the same propagation delay applies for both downlink and uplink. The TA is represented with 11 bits that can indicate an index value between 0 and 1282. The value 0 represents no timing adjustment - the distance between the UE and the eNodeB is less than 78.12m -, and the value 1282 represents the maximum timing adjustment, corresponding to 0.6677ms - with a distance of 100.15km between the UE and the eNodeB.

Accordingly, a UE near the eNodeB might need to wait up to 0.6677ms more compared to another UE near the edge of a large cell. Even though the timing information is exchanged between the UE and the eNodeB, this information is not further used to increase the decoding performance in the prior art.

In known communication systems like 3G or 4G communication systems, latency is not considered as a parameter for the encoder and the decoder. One way to decrease the latency is to divide a long message into smaller messages and encode them separately, but this solution is not very flexible, and channel decoding performance degrades as the message length decreases. Another way to reduce the latency is to use special codes that support a sliding window decoder. An example for this kind of codes is LDPC Convolutional Codes (LPDC-CC) which are introduced in the document of Felstrom, Alberto Jimenez, and amil Sh Zigangirov, "Time-varying periodic convolutional codes with low-density parity-check matrix" Information Theory, IEEE Trans. 45.6 (1999): 2181-2191, and further developed in the document of Pusane, Ali E., et al., "Implementation aspects of LDPC convolutional codes" Communications, IEEE Transactions on 56.7 (2008): 1060-1069, as well in the document of Lentmaier, Michael, et al., "Iterative decoding threshold analysis for LDPC convolutional codes" IEEE Transactions on Information Theory 56.10 (2010): 5274-5289.

The LDPC-CCs are characterized by a semi-infinite diagonal type parity-check matrix H. Similar to LDPC codes, the parity check matrix of the LDPC-CCs can be derived from a protograph expansion. In such a case, the parity check matrix can be described by a convolutional protograph with base matrix like the following:

B_n

B B„ B

B wherein m is the memory of the code, each sub-matrix Bi represents a protograph matrix of size (n_c,n_v), and each element of the protograph matrix represents an M by M permutation matrix, where M is the lifting factor. As a result, the parity check matrix of an LDPC-CC has a diagonal band structure, as shown in Fig. 1.

Said Fig. 1 particularly shows a parity check matrix of an LDPC-CC where each line in the matrix represents check node (CN) constraints and each column represents a different variable node (VN). Dark areas represent zeros and yellow dots represent Is in the party check matrix.

A property of the LDPC-CC is that the band structure of the parity check matrix limits the distance between the VNs connected to the same CN. This means that as long as enough channel observations are available, the receiver can start checking the first check node constraints. This also allows using a sliding window decoder. Performance of a sliding window decoder is in general worse than the conventional decoder taking also the received symbols outside of the sliding window into account. However, the sliding window decoder permits a trade-off between latency/complexity and performance of the decoder.

For a sliding window decoder, the receiver first chooses a window size that includes a fixed number of V s and all the CNs connected to them. Within the window, the iterative decoding is performed until the targeted VNs, which are a subset of the VNs in the window, are decoded and subsequently the window is shifted to a new position, where new targeted VNs are decoded. This operation continues until reaching the end of the codeword. The advantage of this method is that the codeword is decoded in a continuous fashion, such that there is no need to receive the whole codeword before starting to decode. Fig. 2 depicts this decoding operation. Particularly, Fig. 2 shows the sliding window decoding of an LDPC-CC.

A sliding window decoder allows the receiver to start processing even if the whole codeword is not available at the receiver. It is sufficient to store the symbols corresponding to a single window to start decoding. Due to this property, the latency in terms of required symbols at the input of the decoder can be seen as the number of symbols in one window. In a conventional block code, the latency would correspond to the length of the whole codeword.

A sliding window decoder for LDPC-CC is e.g. known from Iyengar, Aravind R., et al., "Windowed decoding of protograph-based LDPC convolutional codes over erasure channels" Information Theory, IEEE Trans, on 58.4 (2012): 2303-2320. In this prior art, it is shown that a long codeword can be decoded with a smaller latency. However, that work does not deal with keeping the latency maximum below the required latency, while obtaining the best performance.

Next generation communication systems will support applications with totally distinct delay constraints. E.g. delay constraints may range from 1 ms for tactile Internet till big delay tolerable email communications. One way to adjust latency indirectly is to change the message length at the input of the channel coder, e.g. by segmenting the message into smaller messages. However, this known approach has some drawbacks.

As the message length decreases, the performance - e. g., in terms of required channel signal-to-noise ratio (SNR) at the receiver - to achieve a target reliability - e.g., in terms of block error rate (BLER) - gets worse, i.e. higher channel SNR is required to support the BLER. This phenomenon can be seen in Fig. 3, where the above line labeled "Poly. Approx." depicts the approximate performance of a theoretically optimal channel code with fixed rate for different block lengths/latencies. It can be seen that the required SNR approaches the Shannon limit with increasing block length, i.e. the longer the message, the better the channel decoding performance. Fig. 3 shows signal-to-noise ratio (SNR) as a function of latency according to the prior art, and particularly a minimum required SNR to reach a target BLER 0.01 for different block lengths or latencies. The above line labeled "Poly. Approx." shows the Gaussian approximation of the finite length bounds for a rate ½ code given by

Polyanskiy, Yury, H. Vincent Poor, and Sergio Verdii. "Channel coding rate in the finite blocklength regime" Information Theory, IEEE Trans. 56.5 (2010): 2307-2359. The below line labeled "Shannon Capacity" shows the minimum SNR to guarantee vanishing error probability for a rate ½ code according to Shannon's channel coding theorem. In this approach, the system has to support different channel codes that basically work on different operating points in the latency-performance space. The same channel code in general may not work in different operating points. This means that, in order to obtain a lower latency, a different channel code with smaller block length has to be used.

In practice, the effort is always made to minimize the processing delay of individual components in the Rx/Tx chain. As for a given channel coding rate, the system delay depends on the message length, system clock, etc., for shorter message lengths, some components - e.g. channel decoder - may have a shorter processing time, thus leave a longer time in idle. This leads to an inefficient usage of the computational resources.

It appears therefore that known communication systems are not designed to allow flexibility in terms of latency; therefore they do not provide an efficient solution for applications with different delay constraints.

SUMMARY Having recognized the above-mentioned disadvantages and problems, the present invention aims to improve the state of the art. In particular, the object of the present invention is to provide a transmitter and a receiver of a communication system with flexibility in terms of latency. The above-mentioned object of the present invention is achieved by the solution provided in the enclosed independent claims. Advantageous implementations of the present invention are further defined in the respective dependent claims.

A first aspect of the present invention provides a communication component of a communication system, in particular a FEC channel encoder, or a FEC channel decoder, or a symbol mapper, or a symbol demapper, or an interleaver, or a deinterleaver, or a multicarrier modulator, or a multicarrier demodulator. The communication component comprises a latency parameter controlling a part of, or the whole latency of the communication system. Thereby, the proposed communication component may advantageously support different latency constraints.

In an implementation form of the communication component, the latency of the communication system indicates the latency caused by structural delay of the communication component.

In an implementation form of the communication component, the communication component is a symbol mapper or demapper, wherein the latency parameter is chosen as a mapping order of the symbol mapper or demapper. In an implementation form of the communication component, the communication component is a multicarrier modulator or demodulator, wherein the latency parameter is chosen as the number of subcarriers of the multicarrier modulator or demodulator. In an implementation form of the communication component, the communication component is an interleaver or deinterleaver, wherein the latency parameter is chosen as the interleaving depth of the interleaver or the deinterleaver.

A second aspect of the present invention provides a receiver with at least one communication component according to the first aspect, wherein the receiver is configured to adjust latency of the communication system according to the latency parameter and/or a latency requirement.

The second aspect of the present invention alternatively provides a receiver with at least one communication component according to the first aspect, wherein the receiver is configured to choose, for the communication component, one or more parameters to adjust latency of the communication system according to the latency parameter and/or a latency requirement, in particular to maximize the latency while keeping the latency below the latency requirement.

In an implementation form of the receiver, it comprises a reception unit configured to receive codewords transmitted by a transmitter. The receiver comprises one or more forward error correction, FEC, channel decoders for decoding the codewords into messages. The choice of the channel code, or/and one or more FEC decoding parameters of the channel decoder are adjustable depending on the latency parameter or/and latency requirement. Thereby, the proposed invention advantageously supports multiple latency constraints simultaneously within one air interface.

In an implementation form of the receiver, the latency parameter is used to determine the choice of the channel code, or/and the one or more FEC decoding parameters of the channel decoder. Thereby, the decoding parameters may be optimized in view of the system latency or/and latency requirement. In an implementation form of the receiver, the latency parameter is derived from timing advance (TA). Thereby, this is an advantageous use of the TA to determine the FEC parameters, said TA being a parameter representing a delay measurement, already specified in e.g. GSM or LTE.

In an implementation form of the receiver the receiver is configured to choose, for the channel decoder, FEC decoding parameters that provide a maximum latency below the latency requirement. Thereby, the latency is advantageously maximized but is also kept below the required latency, such that the latency requirements are fulfilled and at the same time the performance is maximized. Since in general reducing the latency may reduce the decoding performance, the invention therefore advantageously keeps the latency below the requirements, but makes it as large as possible, such that the performance degradation can be avoided or kept minimum. In an implementation form of the receiver, the receiver is configured to identify, from channel codes supported by the FEC channel decoder or/and by the receiver, the channel codes that support the latency requirement, to choose, from the identified channel codes, the channel code that performs best for the latency requirement according to a performance metric, and to choose, for the channel decoder, FEC decoding parameters that provide a maximum latency below the latency requirement. Particularly, the channel codes supported by the FEC channel decoder may be codes of the same type - e.g. LDPC-CC - or codes of different types - e.g. convolutional code and LDPC-CC. Thereby, the receiver is advantageously able to choose its decoding parameters in such a way that the overall latency of the system is below the requirements, but is maximized, such that the best possible performance is obtained.

In an implementation form of the receiver, the receiver comprises a measurement unit configured to measure a latency in a communication between the transmitter and the receiver, wherein the measured latency is fed back to the transmitter to derive the latency parameter. Thereby, the transmitter may also derive its encoding parameters so as to optimize the performance of the system.

In an implementation form of the receiver, the receiver comprises a measurement unit configured to measure a latency in a communication between the transmitter and the receiver. If the measured latency is above the latency requirement, the receiver is configured to choose, for the channel decoder, other FEC decoding parameters so as to reduce the measured latency. Thereby, the latency may be advantageously reduced below the latency requirement, e.g. in a closed loop.

In an implementation form of the receiver, the latency requirement defines a maximum allowed overall delay between a generation of a message at a transmitter and a reconstruction of the message by the FEC channel decoder, or a maximum allowed decoder delay between a reception of a codeword at the FEC channel decoder, said codeword corresponding to an encoded message, and a reconstruction of the message by the FEC channel decoder. Thereby, an application used over the communication system between the transmitter and the receiver may advantageously define such a latency requirement to be fulfilled. In an implementation form of the receiver, the FEC channel decoder is a sliding window decoder, SWD. Thereby, the receiver may advantageously reduce the decoder latency.

Particularly, the one or more FEC decoding parameters comprises a window size of the sliding window decoder. Thereby, the window size of the sliding window decoder may be advantageously chosen depending on the latency requirement.

In an implementation form of the receiver, the FEC channel decoder is based on low- density parity-check convolutional codes, LDPC-CCs. Thereby, these codes are advantageous in that latency requirements may be fulfilled while maximizing the performance.

In an implementation form of the receiver, the FEC channel decoder is based on window-interleaved turbo, Wi-Turbo, codes. Thereby, these codes are advantageous in that latency requirements may be fulfilled while maximizing the performance.

The functions of the receiver according to the second aspect of the invention and any functions of any of its implementation forms may be performed by a processor or a computer, and any of their means may be implemented as software and/or hardware in such a processor or computer.

A third aspect of the present invention provides a method for configuring one or more parameters of one or more communication components in a receiver of a

communication system, said communication components being according to the first aspect. The parameters of the communication components are adjustable depending on a latency parameter characterizing a part of, or the whole, latency of the

communication system or/and latency requirement.

In an implementation form, the method according to the third aspect is a method for receiving codewords in the communication system. The method comprises receiving codewords transmitted by a transmitter. The method comprises decoding the codewords into messages by means of one or more forward error correction, FEC, channel decoders. The choice of the channel decoder or/and one or more FEC decoding parameters of the channel decoder are adjustable depending on a latency parameter characterizing a part of, or the whole, system latency or/and latency requirement. Further features or implementations of the method according to the third aspect of the invention may perform the functionality of the receiver according to the second aspect of the invention and its different implementation forms.

The method according to the third aspect of the invention or any of its implementation forms may be performed by a processor or a computer.

A fourth aspect of the present invention provides a transmitter with at least one communication component according to the first aspect, wherein the transmitter is configured to adjust latency of the communication system according to the latency parameter and/or a latency requirement.

The fourth aspect of the present invention alternatively provides a transmitter with at least one communication component according to the first aspect, wherein the transmitter is configured to choose, for the communication component, one or more parameters to adjust latency of the communication system according to the latency parameter and/or a latency requirement, in particular to maximize the latency while keeping the latency below the latency requirement. Thereby, the proposed invention may advantageously support different latency constraints.

In an implementation form of the transmitter, it comprises one or more forward error correction, FEC, channel encoders for encoding messages into codewords. The transmitter comprises a transmission unit configured to transmit the codewords to a receiver. The choice of the channel code, or/and one or more FEC encoding parameters of the channel encoder are adjustable depending on the latency parameter

characterizing a part of, or the whole, system latency or/and latency requirement. Thereby, the proposed invention advantageously supports multiple latency constraints.

In an implementation form of the transmitter, the latency parameter is used to determine the one or more FEC parameters of the channel encoder. Thereby, the encoding parameters may be optimized in view of the system latency or/and latency requirement.

In an implementation form of the transmitter, the latency parameter may be signaled from the transmitter to the receiver. Thereby, the transmitter may advantageously optimize its encoding parameters based on this signaled latency parameter. In an implementation form of the transmitter, the latency parameter is derived from timing advance (TA). Thereby, this is an advantageous use of the TA to determine the FEC parameters, said TA being a parameter representing a delay measurement, already specified in e.g. GSM or LTE. In an implementation form of the transmitter, the transmitter is configured to choose, for the channel encoder, FEC encoding parameters that provide a maximum latency below the latency requirement. Thereby, the invention advantageously keeps the latency below the requirements, but makes it as large as possible, such that the performance degradation can be avoided or kept minimum. In an implementation form of the transmitter, the transmitter is configured to identify, from channel codes supported by the FEC channel encoder or/and by the transmitter, the channel codes that support the latency requirement, to choose, from the identified channel codes, the channel code that performs best for the latency requirement according to a performance metric, and to choose, for the channel encoder, FEC encoding parameters that provide a maximum latency below the latency requirement. Particularly, the channel codes supported by the FEC channel encoder may be codes of the same type - e.g. LDPC-CC - or codes of different types - e.g. convolutional code and LDPC-CC. Thereby, the transmitter is advantageously able to choose its encoding parameters in such a way that the overall latency of the system is below the requirements, but is maximized, such that the best possible performance is obtained.

In an implementation form of the transmitter, the transmitter comprises a feed back unit configured to receive information regarding a latency in a communication between the transmitter and the receiver. If the measured latency is above the latency requirement, the transmitter is configured to choose, for its components the parameters so as to reduce the measured latency. Thereby, the latency may be advantageously reduced below the latency requirement, e.g. in a closed loop.

In an implementation form of the transmitter, the transmitter comprises a feed back unit configured to receive information regarding a latency in a communication between the transmitter and the receiver. If the measured latency is above the latency requirement, the transmitter is configured to choose, for the channel encoder, other FEC encoding parameters so as to reduce the measured latency. Thereby, the latency may be advantageously reduced below the latency requirement, e.g. in a closed loop.

In an implementation form of the transmitter, the latency requirement defines a maximum allowed overall delay between a generation of a message at the transmitter and a reconstruction of the message by a receiver, or a maximum allowed encoder delay between a reception of a message at the FEC channel encoder and a generation of a codeword by the FEC channel encoder. Thereby, an application used over the communication system between the transmitter and the receiver may advantageously define such a latency requirement to be fulfilled. In an implementation form of the transmitter, the FEC channel encoder is based on low-density parity-check convolutional codes, LDPC-CCs, and the one or more FEC encoding parameters comprises a lifting factor of a LDPC-CC. Thereby, these codes are advantageous in that by adjusting the lifting factor depending on latency requirement multiple latency constraints may be supported.

In an implementation form of the transmitter, the FEC channel encoder is based on window-interleaved turbo, Wi-Turbo, codes, and comprises at least one interleaver for mapping an input sequence of k indexed input symbols to an output sequence of k indexed output symbols, k being a positive integer, the interleaver being configured to map an input index of the input sequence to an output index of the output sequence according to an interleaving function. For a subset of all k input indices, comprising the input indices b, ...,k-b-\, b being a nonnegative integer smaller than k/2, a distance between the input index and the output index defined by the interleaving function is smaller than or equal to a threshold p, p being a positive integer smaller than k. The one or more FEC encoding parameters comprises the threshold p. Thereby, these codes are advantageous in that by adjusting the threshold p depending on latency requirement multiple latency constraints may be supported.

The functions of the transmitter according to the fourth aspect of the invention and any functions of any of its implementation forms may be performed by a processor or a computer, and any of their means may be implemented as software and/or hardware in such a processor or computer.

A fifth aspect of the present invention provides a method for configuring one or more parameters of one or more communication components in a transmitter of a communication system, said communication components being according to the first aspect. The parameters of the communication components are adjusted according to a latency parameter and/or a latency requirement.

In an implementation form, the method according to the fifth aspect is a method for transmitting codewords in the communication system. The method comprises encoding messages into codewords by means of one or more forward error correction, FEC, channel encoders. The method comprises transmitting the codewords to a receiver. The choice of the channel code and/or one or more FEC encoding parameters of the channel encoder are adjustable depending on a latency parameter characterizing a part of, or the whole, system latency or/and latency requirement.

Further features or implementations of the method according to the fifth aspect of the invention may perform the functionality of the transmitter according to the fourth aspect of the invention and its different implementation forms.

The method according to the fifth aspect of the invention or any of its implementation forms may be performed by a processor or a computer.

A sixth aspect of the present invention provides a computer program having a program code for performing the method according to the third or fifth aspect, when the computer program runs on a computing device.

A seventh aspect of the present invention provides a system comprising a

communication component according to the first aspect, a receiver according to the second aspect, and a transmitter according to the fourth aspect.

In general, reducing the latency may reduce the decoding performance. Therefore it is important to keep the latency below the requirements, but to make it as large as possible, such that the performance degradation can be avoided or kept minimum. The proposed invention maximizes the latency but keeps it still below the required latency, such that the latency requirements are fulfilled and at the same time the performance is maximized. This is particular advantageous for supporting different applications requiring different latency constraints simultaneously within one air interface.

The invention in particular proposes using channel encoders/decoders at the transmitter and receiver that support a range of latency requirements simultaneously instead of supporting multiple channel codes with different block lengths.

According to the latency requirement, the transmitter and receiver may choose their encoding and/or decoding parameters in such a way that the overall latency of the system is below the requirements, but is maximized, such that the best possible performance is obtained.

It has to be noted that all devices, units and means described in the present application could be implemented by software or hardware elements or any kind of combination thereof. All steps which are performed by the various entities described in the present application as well as the functionalities described to be performed by the various entities are intended to mean that the respective entity is adapted to or configured to perform the respective steps and functionalities. Even if, in the following description of specific embodiments, a specific functionality or step to be full formed by external entities not reflected in the description of a specific detailed element of that entity which performs that specific step or functionality, it should be clear for a skilled person that these methods and functionalities can be implemented in respective software or hardware elements, or any kind of combination thereof.

BRIEF DESCRIPTION OF DRAWINGS

The above aspects and implementation forms of the present invention will be explained in the following description of specific embodiments in relation to the enclosed drawings, in which

Fig. 1 shows a parity check matrix of an LDPC-CC with a diagonal band structure.

Fig. 2 shows a sliding window decoding of an LDPC-CC.

Fig. 3 shows signal-to-noise ratio (SNR) as a function of latency according to the prior art.

Fig. 4 shows a communication system according to an embodiment of the present invention.

Fig. 5 shows a communication system according to a further embodiment of the present invention. Fig. 6 shows signal-to-noise ratio (SNR) as a function of latency according to the present invention.

Fig. 7 shows a communication system based on LDPC-CC according to an embodiment of the present invention.

DETAILED DESCRIPTION OF EMBODIMENTS

The communication system comprises at least a transmitter and a receiver. The communication particularly comprises at least an encoder 401 , e.g. in the form of a forward error correction (FEC) channel encoder, and a decoder 403, e.g. in the form of a FEC channel decoder. The block 402 shown in Fig. 4 represents the wireless transmission between transmitter and receiver, i.e. between encoder and decoder.

The transmitter of a communication system according to the present invention comprises the FEC channel encoder 401 for encoding messages into codewords, and a transmission unit configured to transmit the codewords to the receiver. One or more FEC encoding parameters of the channel encoder 401 are adjustable depending on a latency parameter 7d characterizing a part of, or the whole, system latency or/and latency requirement Tmax. The receiver of a communication system according to the present invention comprises a reception unit configured to receive the codewords transmitted by the transmitter, and the FEC channel decoder 403 for decoding the received codewords into messages. One or more FEC decoding parameters of the channel decoder 403 are adjustable depending on a latency parameter 7d characterizing a part of, or the whole, system latency or/and latency requirement Tmax.

The latency requirement Tmax may define a maximum allowed overall delay between a generation of a message at the FEC channel encoder (i.e. at the transmitter) and a reconstruction of this message by the FEC channel decoder or by the receiver. Alternatively, it may define a maximum allowed decoder delay between a reception of a codeword at the FEC channel decoder, said codeword corresponding to an encoded message, and a reconstruction of the message by the FEC channel decoder.

Alternatively, it may define a maximum allowed encoder delay between a reception of a message at the FEC channel encoder and a generation of a corresponding codeword by the FEC channel encoder.

Particularly, imax is the application specific latency value which gives the maximum allowed latency, e.g. in seconds, for a certain application.

The value xa shown in Fig. 4 represents the latency value, which is preferably the duration, in seconds, between the generation of the message at a transmitter component and its reconstruction at the receiver component. In Fig. 4, 7d represents a latency parameter, which characterizes the latency/delay for the encoder, decoder or for the system comprising encoder and decoder. The latency parameter Td is used to control the encoder parameters of the encoder 401 and the decoder parameters of the decoder 403 in order to meet and approach the latency requirements imax. The encoder parameters and decoder parameters may be any parameter, or any combination of parameters, that may influence the decoding latency.

Particularly, the latency parameter Td is an indication of encoder parameter(s) and decoder parameter(s). Also the latency parameter Td may be an indication of encoder parameters and decoder parameters to be used by the encoder and decoder, as well as an indication of the channel code to be used by the encoder and decoder.

For example, if the encoder and decoder use LDPC convolutional codes, the encoder parameter may be the lifting factor M and the decoder parameter may be the window size W. If the encoder and decoder use window- interleaved turbo (Wi-Turbo) codes, the encoder parameter may be the threshold value p and the decoder parameter may be the interleaver window size or the interleaving depth which may depend on p. If the encoder and decoder use other convolutional codes, i.e. regular convolutional codes, the encoder parameter may be the memory of the convolutional codes, i.e. the latency or constraint length in the transmitter, and the decoder parameter may be the trace back window size.

The encoder parameter(s) and the decoder parameter(s) are different from the code specific parameters. Such specific parameters may comprise the message length K, i.e. the length of the input sequence or message, the length N of the output sequence or codeword, as well as the rate ratio =K/N.

For an application with a certain latency requirement x_max, the transmitter or the transmitter component, and receiver or the receiver component choose or optimize their respective encoder parameters and decoder parameters, i.e. their parameters that may influence the latency, such that the latency Xd is maximized but is still below the allowed maximum latency x_max. By increasing the latency Xd, the performance gets better. Therefore in this way, the latency requirement can be fulfilled and best possible decoding or system performance - e.g. in terms of block error rate (BLER) or bit error rate (BER) for example - may be obtained.

The advantage of the present invention may be formulated as follows. Usually, a realistic channel code corresponds to a single point above line in Fig. 3, which means that according to the prior art the channel code has to be changed in order to support a different latency. In other words, different latency requirements may only be realized by using different channel codes.

Advantageously, according to the present invention, the encoder and decoder makes use of channel codes that cover a range of latency values. This means that different operating points corresponding to different latency values may be supported with one of such kind of channel code. By using several such kind of channel codes, a larger range of latency requirements may be supported. For example, a specific embodiment may relate to a communication system with two supported channel codes Ci and C₂, where Ci and C2 may be two codes of the same type (e.g LDPC-CC) or two codes of different types (e.g., G is a convolutional code and C2 is a LDPC-CC). It is assumed that Ci may support latency values id between 0.1ms and 0.4ms and C2 may support latency values between 0.4ms and 0.8ms. For an application with x_max = 0.3ms, the encoder and decoder use the code G with encoder and decoder parameters such that the latency xa is maximized but is still below 0.3ms, so as to obtain best possible decoding performance. Similarly, for an application with Xmax = 0.5ms, the encoder and decoder use the code C2 and the encoder and decoder parameters are chosen in such a way that the latency Xd stays close to but below 0.5ms. Particularly, for this application with x_max = 0.3ms, the latency parameter Td is set in a way such that the system uses the code G with parameters such that id is maximized but is still below 0.3ms to obtain best possible decoding performance. Similarly, for an application with x_max = 0.5ms, Td is set in a way such that the system uses the code C2 and Xd stays close to but below 0.5ms.

Fig. 5 shows a communication system according to a further embodiment of the present invention. According to this embodiment, it is proposed to measure a latency e.g. a latency between the transmitter (or the transmitter component) and the receiver (or the receiver component), wherein preferably this measured latency includes structural, processing and propagation delay at the receiver. The encoder 501 and decoder 503 preferably correspond to the encoder 401 and decoder 403 of the embodiment of Fig. 4. The measurement is carried out by a latency measurement unit 504, which may be part of the receiver.

The receiver may accordingly comprise a measurement unit configured to measure a latency in a communication between the transmitter and the receiver. If the measured latency is above the latency requirement x_max, the receiver is configured to choose, for the channel decoder, other FEC decoding parameters that are suitable to reduce the measured latency preferably below the latency requirement x_max. The measured latency, or more generally information regarding this measured latency, may also be fed back to the transmitter. The transmitter accordingly may comprise a feed back unit configured to receive this measured latency or this information. If the measured latency is above the latency requirement x_max, the transmitter is configured to choose, for the channel encoder, other FEC encoding parameters that are suitable to reduce the measured latency preferably below the latency requirement x_max. A controller 505 may determine the latency parameter Td depending on the measured latency and the latency requirement imax. Preferably, the controller 505 may be part of the receiver, but may alternatively also be provided outside of the receiver like e.g. in the transmitter.

The controller 505 sends the latency parameter Td characterizing the latency to the transmitter as a feedback. The transmitter then controls the encoder parameters, e.g. via a controller to determine the relevant encoder parameter(s), such that the overall system latency id is maximized but is below the system latency requirements x_max. In this way, the best encoder/decoder performances - e.g. in terms of the required channel SNR for a target BLER - may be achieved.

In case the controller 505 is located at the transmitter side, the latency parameter Td is sent or signaled to the receiver, and to the FEC decoder 503, so that the latency parameter Td remains the same at both the transmitter and the receiver.

Particularly, the present invention may relate to a communication system containing a timing advance (TA) parameter, like in the LTE. The TA parameter may be used to evaluate the system latency. For instance, in LTE the timing advance parameter is exchanged between the user equipment (UE) or receiver and the base station (BS) or transmitter at connection setup. The maximum TA in LTE corresponds to a value of 0.6677ms. This means that a UE might need to stay in idle and wait up to 0.6677ms without any processing, since the system - incl. hardware and software - is designed to meet such a worst case scenario.

The present invention now proposes to make use of this idle time at the UE to further improve the decoding performance. As the TA is known to the BS, the BS adjusts its FEC parameters for each user by considering the TA parameter. Similarly, the UEs adjust their decoder parameters according to the TA parameter, such that the UEs increase their decoding latency by an amount equal or close to the waiting time due to the timing advance and the decoding performance is increased accordingly.

The present invention makes use of codes that support variable latency encoding and decoding. One option would be to use the convolutional codes (CCs). Alternatively, modern codes like LDPC-CC or window-interleaved turbo codes are used. Such modern codes are characterized in that their error correction capability improves with increasing encoding or decoding latency. As such, these codes with latency-dependent error correction capability are more suitable to exploit the delay/performance trade-off.

In an embodiment, the codes used by the encoder and the decoder are LDPC-CCs. In such case the encoder parameter lifting factor M and the decoder parameter window parameter W are used as parameters to adjust the latency such that it is maximized but is still below the given requirements.

In this respect, Fig. 6 shows signal-to-noise ratio (SNR) as a function of latency according to the present invention. Fig. 6 shows the performance - in terms of required SNR to achieve a target bit error probability of 0.0001 - of LDPC-CC constructed from the following protograph:

2 2

B 1 1

1 1

By using a lifting factor M and using 2MW - with W as an integer - variable nodes (VNs) in each window, the latency of this example can be seen as w=2MW symbols, i.e. the receiver can start decoding as soon as 2MW symbols are available at the receiver.

Fig. 6 shows the performance of LDPC-CC with different encoder/decoder parameters, compared with the performance of the known LTE turbo codes shown by crosses in the figure. The latency of the LDPC-CC curves correspond to the value 2MW, whereas the latency values of the Turbo code is its block length. For a given latency

requirement, the present invention proposes to choose the encoder and/or decoder parameters that firstly fulfill the delay constraints, and secondly at the same time give the best performance. It can be seen from Fig. 6 that for different choices of the encoder/decoder parameters, another latency value is obtained. Also, it may be observed that when more latency is allowed, the performance gets better. According to the given latency constraints, the encoder/decoder parameters with the best performance and fulfilling the given latency constraints are selected.

In case of the feedback embodiment of e.g. Fig. 5, the latency is measured and the encoder/decoder parameters may be set accordingly via the controller 505.

In the folio wings, an example of a procedure for implementing the present invention is shown.

In a first step, the transmitter and the receiver receive the latency requirement (maximum allowed latency T_max) of an application.

In a second step, according to Xmax the transmitter obtains the latency parameter Ta, which is e.g. an indication of the choice of the channel code and of the

encoder/decoder parameters, in the following way.

Knowing the value T_max and all the supported channel codes in the system (Ci, C₂, ..., C_n), the transmitter identifies the channel codes that can support the allowed latency Xmax. This may be achieved for example by using a look-up table showing all the supported latency ranges for each channel code.

From the identified channel codes, the transmitter chooses the code that performs best for the given latency constraint - for example by using a look-up table showing the performance metric of the code for each latency value -, and the FEC encoder parameter that provides the maximum latency below the system requirement. Thus, the performance can be maximized.

In a third step, the transmitter uses the selected code with the selected FEC encoder parameters and encodes the messages into codewords. In a fourth step, and similar to the second step, the receiver identifies the latency parameter Ta, which is e.g. an indication of the choice of the channel code and of the encoder/decoder parameters, by e.g. decoding the corresponding message signaled by the transmitter, and decodes the codeword according to the chosen channel code and decoder parameters.

If LDPC-CC is utilized, the lifting factor M and the window parameter W are the latency related parameters at the transmitter and the receiver, respectively. If a system with feedback is considered, the receiver measures the latency/delay and selects the latency parameter Td, similarly to the second step, and feeds back this information to the transmitter, such that the second step performed at the transmitter can be skipped. Alternatively, the receiver can only feed back the measured delay, and the transmitter can determine the latency parameter Ta to be used accordingly.

If the system already contains a timing advance (TA) parameter, like in LTE, this can be used by the transmitter as a measured delay/latency parameter.

Fig. 7 shows a communication system based on LDPC-CC according to an embodiment of the present invention. This embodiment utilizes LDPC-CC with sliding window decoder as channel code, using the lifting factor M and the window parameter W to adjust the latency.

The lookup table 705 is used for identifying, from the plurality of channel codes supported by the encoder and decoder, the channel codes that may support the allowed latency x_max. Correspondingly, the lookup table 705 for example shows the supported latency ranges of each of the plurality of channel codes supported by the encoder and decoder. The lookup table 705 is also used for choosing, from the identified channel codes, the code that performs best for the given latency constraint. Correspondingly, the lookup table 705 for example shows the performance metric of the code for each latency value. Once the channel code is chosen, selection unit 706 is configured to choose, the FEC encoder parameter(s) that provides the maximum latency below the system

requirement, such that the performance is maximized. Similarly, selection unit 707 is configured to choose, the FEC decoder parameter(s) that provides the maximum latency below the system requirement, such that the performance is maximized. Fig. 7 shows that the selected encoder parameter M and decoder parameter W are transmitted respectively to the encoder 701 and decoder 703. The blocks 701 to 704 of Fig. 7 preferably correspond to the blocks 501 to 504 of Fig. 5. In the above embodiments, the codes used by the encoder and the decoder are LDPC- CCs. The present invention is however not limited to LDPC-CC, and may also be used with other channel codes such as the convolutional codes or the window-interleaved turbo (Wi-Turbo) codes. In case the encoder and decoder use Wi-Turbo codes, the encoder and decoder respectively may be in the form of a turbo encoder and turbo decoder using an interleaving being a window interleaver.

The window interleaver is particularly configured to map an input sequence of k indexed input symbols to an output sequence of k indexed output symbols, k being a positive integer. The window interleaver comprises means for mapping an input index of the input sequence to an output index of the output sequence according to an interleaving function. For at least a part of all k input indices, a distance between the input index and the output index defined by the interleaving function is smaller than or equal to a threshold p. Particularly, for a subset of all k input indices, comprising the input indices b, ...,k-b-l , b being a nonnegative integer smaller than k/2, a distance between the input index and the output index defined by the interleaving function is smaller than or equal to a threshold p, p being a positive integer smaller than k. The k input symbols of the input sequence are indexed such that the order of the k input symbols in the input sequence is determined by respective input indices. In other words, the k input symbols have an order that is determined by their respective input index. Similarly, the k output symbols of the output sequence are indexed in that the order of the k output symbols in the output sequence is determined by respective output indices. In other words, the k output symbols have an order that is determined by their respective output index.

Thereby, the window interleaver shows a band structure, such that a sliding window decoder may be used for the decoder to reduce the decoder latency.

The threshold p is adjustable. If the encoder and decoder use Wi-Turbo codes, the encoder parameter may correspondingly be the threshold value p and the decoder parameter may be the interleaver window size.

Thereby, the latency caused by a decoder may be reduced or adjusted according to for example defined latency requirements. For example, if the latency should be reduced, then the adjustment of the threshold p may consist in reducing the threshold p so that a sliding window decoder with reduced window size may be used for the decoding. Also, if according to the latency requirements the latency can be increased, then the adjustment of the threshold p may consist in increasing the threshold p so that a sliding window decoder with increased window size may be used for the decoding, which in turn may improve the decoding performance. The main advantage of the Wi-Turbo codes compared to conventional turbo codes is their suitability to sliding window decoder (SWD). If an SWD is used, the decoding latency can be as small as p symbols, similar to the encoder. However to obtain good error correction performance, one usually defines a number of target symbols m - number of symbols to be decoded in each window - and chooses an interleaver window of size greater than m+p. Experimental evaluations suggest that, for example, choosing m=p and the window size w~5m usually leads to good results.

A first example of window interleaver using Wi-Turbo codes is called f_p (j) -window interleaver, or f_p j)-Wl. It is defined with the interleaving function f_p j) of length k, where the absolute difference \f_p (j)— j\ is smaller than or equal to a predefined threshold or number p for all k input indices. The interleaving function f_p (j) defines the order that the samples or values are read from the input vector or sequence, i.e., the j^th output of the interleaver is read from the location f_p (J) in the input vector. The interleaving function f_p (j) has a length k, and the values j and f_p (j) are integer values between 0 and k— 1. In this way, the distance between the input and the output indices are limited by p for ally.

The interleaver function of the first example has a band structure with a width οΐ2ρ+1 which is also the interleaving depth. Due to the structure of the f_p Q^')-WI, a sliding window decoder with the following parameters can be utilized for channel coding: window size w (w>p) and number of targeted symbols m (m < w— p), where the target symbols are the first m symbols within the window. The structure of the window interleaver prevents the extrinsic information of the targeted symbols to be interleaved to locations that are located outside the current or previous windows.

The f j) -window interleaver of length k is a constrained interleaver with the interleaving function / ( ), wherein the following condition holds, k and p being positive integers: - j\≤P j, f_p j) £ / := {0,l, ... , fc - l}

Here, / : = {0,1, ... , k— 1} means that J is defined as the set consisting of elements 0,1, ... , k— 1. Also, j, fp ( ) £ / means that j, f_p ( ) is respectively an element of the set J. The value f_p (j) is the interleaving function, and p (p = 0, 1, ... , k— 1) is the threshold or parameter defining the maximum distance between input and the output of the interleaving function. It is proportional to the interleaver size and has an influence on the possible window sizes if this interleaver is used as the turbo interleaver of a wi- turbo code. Preferably, m < w— p should hold, wherein m is the number of targeted symbols and w is the window size.

A second example of window interleaver using Wi-Turbo codes is called f_p,d (j)- window interleaver or f_{p d} (y^')-WI. It is defined with the interleaving function f_{p d} (j) of length k, wherein the absolute difference

j)— j \ is not greater than a predefined number p for the input indices b, . ..,k-b-l, b being a nonnegative integer, and d being a nonnegative integer defining the number of indices where the condition is not fulfilled. In this way, the distance between the input and the output indices is limited by the threshold p for only a subset of all possible input indices. The _d( )-window interleaver of length k is a constrained interleaver with the interleaving function _d(y) wherein the following condition holds, k and p being positive integers, d being a nonnegative integer:

wherein J_d is a subset of with cardinality k-d. Here, d is the parameter specifying the number that shows at how many input indices of the interleaving function do not fulfill the constraint given the above equation. It is desired to have a small d - because for these indices other measures have to be taken during decoding, like setting systematic bits to known values or puncturing systematic bits corresponding to these known values, as explained below -. A _d(j) -window interleaver fulfills the same conditions as a / (7) -window interleaver except for d indices. For d=0, both definitions are equivalent.

The present invention has been described in conjunction with various embodiments as examples as well as implementations. However, other variations can be understood and effected by those persons skilled in the art and practicing the claimed invention, from the studies of the drawings, this disclosure and the independent claims. In the claims as well as in the description the word "comprising" does not exclude other elements or steps and the indefinite article "a" or "an" does not exclude a plurality. A single element or other unit may fulfill the functions of several entities or items recited in the claims. The mere fact that certain measures are recited in the mutual different dependent claims does not indicate that a combination of these measures cannot be used in an advantageous implementation.

Claims

1. Communication component of a communication system, in particular a FEC channel encoder, or a FEC channel decoder, or a symbol mapper, or a symbol demapper, or an interleaver, or a deinterleaver, or a multicarrier modulator, or a multicarrier demodulator,

wherein the communication component comprises a latency parameter (7d) controlling a part of, or the whole latency of the communication system.

2. Communication component of claim 1,

wherein the latency of the communication system indicates the latency caused by structural delay of the communication component.

3. Symbol mapper or demapper according to 1 or 2, wherein the latency parameter (7d) is chosen as a mapping order of the symbol mapper or demapper.

4. Multicarrier modulator or demodulator according to 1 or 2, wherein the latency parameter (7d) is chosen as the number of subcarriers of the multicarrier modulator or demodulator.

5. Interleaver or deinterleaver according to 1 or 2, wherein the latency parameter ( d) is chosen as the interleaving depth of the interleaver or the deinterleaver.

6. Receiver with at least one communication component according to any of the preceding claims 1 to 5,

wherein the receiver is configured to adjust latency of the communication system according to the latency parameter (7d) and/or a latency requirement (x_max).

7. Receiver with at least one communication component according to any of the preceding claims 1 to 5,

wherein the receiver is configured to choose, for the communication component, one or more parameters to adjust latency of the communication system according to the latency parameter (7d) and/or a latency requirement (T_max), in particular to maximize the latency while keeping the latency below the latency requirement.

8. Receiver according to claim 6 or 7,

comprising:

- a reception unit configured to receive codewords transmitted by a transmitter, and - one or more forward error correction, FEC, channel decoders for decoding the codewords into messages,

wherein the choice of the channel code, or/and one or more FEC decoding parameters of the channel decoder are adjustable depending on the latency parameter (7d) or/and latency requirement (x_max).

9. Receiver according to claim 8,

wherein the receiver is configured to use the latency parameter (7d) to determine the choice of the channel code, or/and one or more FEC decoding parameters of the channel decoder.

10. Receiver according to any of the preceding claims,

wherein the receiver is configured to derive the latency parameter (7d) from timing advance (TA).

11. Receiver according to any of the preceding claims 8-10,

wherein the receiver is configured to choose, for the channel decoder, FEC decoding parameters that provide a maximum latency below the latency requirement (x_max).

12. Receiver according to any of the preceding claims 8-11,

wherein the receiver is configured to identify, from channel codes supported by the

FEC channel decoder or/and by the receiver, the channel codes that support the latency requirement (imax),

to choose, from the identified channel codes, the channel code that performs best for the latency requirement (imax) according to a performance metric, and

to choose, for the channel decoder, FEC decoding parameters that provide a maximum latency below the latency requirement (x_max).

13. Receiver according to any of the preceding claims,

comprising: a measurement unit configured to measure a latency in a communication between the transmitter and the receiver,

wherein the receiver is configured to feed back the measured latency to the transmitter to derive the latency parameter (7d).

14. Receiver according to any of the preceding claims 8-13,

comprising:

a measurement unit configured to measure a latency in a communication between the transmitter and the receiver,

wherein, if the measured latency is above the latency requirement (xmax), the receiver is configured to choose, for the channel decoder, other FEC decoding parameters so as to reduce the measured latency.

15. Receiver according to any of the preceding claims 8-14,

wherein the latency requirement (x_max) defines:

- a maximum allowed overall delay between a generation of a message at the transmitter and a reconstruction of the message by the FEC channel decoder, or

- a maximum allowed decoder delay between a reception of a codeword at the FEC channel decoder, said codeword corresponding to an encoded message, and a reconstruction of the message by the FEC channel decoder.

16. Receiver according to any of the preceding claims 8-15,

wherein the FEC channel decoder is a sliding window decoder, SWD, and

the one or more FEC decoding parameters comprises a window size (w) of the sliding window decoder.

17. Receiver according to any of the preceding claims 8-16,

wherein the FEC channel decoder is based on low-density parity-check convolutional codes, LDPC-CCs, or on window-interleaved turbo, Wi-Turbo, codes.

18. Method for configuring one or more parameters of one or more communication components in a receiver of a communication system,

said communication components being according to any of the preceding claims 1 to 5, wherein the parameters of the communication components are adjustable depending on a latency parameter (7d) characterizing a part of, or the whole, latency of the communication system or/and latency requirement (T_max).

19. Method according to the claim 18 for receiving codewords in the communication system,

comprising:

- receiving codewords transmitted by a transmitter, and

- decoding the codewords into messages by means of one or more forward error correction, FEC, channel decoders,

wherein the choice of the channel decoder or/and one or more FEC decoding parameters of the channel decoder are adjustable depending on a latency parameter (7d) characterizing a part of, or the whole, system latency or/and latency requirement

(Xmax) .

20. Transmitter with at least one communication component according to any of the claims 1 to 5,

wherein the transmitter is configured to adjust latency of the communication system according to the latency parameter (7d) and/or a latency requirement (x_max).

21. Transmitter with at least one communication component according to any of the claims 1 to 5,

wherein the transmitter is configured to choose, for the communication component, one or more parameters to adjust latency of the communication system according to the latency parameter (7¾ and/or a latency requirement (x_max), in particular to maximize the latency while keeping the latency below the latency requirement.

22. Transmitter according to claim 20 or 21,

comprising:

- one or more forward error correction, FEC, channel encoders for encoding messages into codewords, and

- a transmission unit configured to transmit the codewords to a receiver, wherein the choice of the channel code, or/and one or more FEC encoding parameters of the channel encoder are adjustable depending on the latency parameter (7d)

characterizing a part of, or the whole, system latency or/and latency requirement (imax).

23. Transmitter according to claim 22,

wherein the transmitter is configured to use the latency parameter (Td) to determine the one or more FEC parameters of the channel encoder.

24. Transmitter according to any of the preceding claims 20 to 23,

wherein the transmitter is configured to receive the latency parameter (7d) from the receiver.

25. Transmitter according to any of the preceding claims 20 to 24,

wherein the transmitter is configured to derive the latency parameter (7d) from timing advance (TA).

26. Transmitter according to any of the preceding claims 22 to 25,

wherein the transmitter is configured to choose, for the channel encoder, FEC encoding parameters that provide a maximum latency below the latency requirement (Xmax).

27. Transmitter according to any of the preceding claims 22 to 26,

wherein the transmitter is configured to identify, from channel codes supported by the FEC channel encoder or/and by the transmitter, the channel codes that support the latency requirement (imax),

to choose, from the identified channel codes, the channel code that performs best for the latency requirement (x_max) according to a performance metric, and

to choose, for the channel encoder, FEC encoding parameters that provide a maximum latency below the latency requirement (imax).

28. Transmitter according to any of the preceding claims 20-21,

comprising:

a feed back unit configured to receive information regarding a latency in a

communication between the transmitter and the receiver, wherein, if the measured latency is above the latency requirement (fmax), the transmitter is configured to choose, for its components the parameters so as to reduce the measured latency.

29. Transmitter according to any of the preceding claims 22-27,

comprising:

a feed back unit configured to receive information regarding a latency in a communication between the transmitter and the receiver,

wherein, if the measured latency is above the latency requirement (T_max), the transmitter is configured to choose, for the channel encoder, other FEC encoding parameters so as to reduce the measured latency.

30. Transmitter according to any of the preceding claims 20-29,

wherein the latency requirement (x_max) defines:

- a maximum allowed overall delay between a generation of a message at the transmitter and a reconstruction of the message by the receiver, or

- a maximum allowed encoder delay between a reception of a message at the FEC channel encoder and a generation of a codeword by the FEC channel encoder.

31. Transmitter according to any of claims 22-30,

wherein the FEC channel encoder is based on low-density parity-check convolutional codes, LDPC-CCs, and

the one or more FEC encoding parameters comprises a lifting factor (M) of a LDPC- CC.

32. Transmitter according to any of claims 22-30,

wherein the FEC channel encoder is based on window-interleaved turbo, Wi-Turbo, codes, and comprises at least one interleaver for mapping an input sequence of k indexed input symbols to an output sequence of k indexed output symbols, k being a positive integer,

the interleaver being configured to map an input index of the input sequence to an output index of the output sequence according to an interleaving function, wherein, for a subset of all k input indices, comprising the input indices b, ...,k-b-\, b being a nonnegative integer smaller than k/2, a distance between the input index and the output index defined by the interleaving function is smaller than or equal to a threshold p, p being a positive integer smaller than k,

wherein the one or more FEC encoding parameters comprises the threshold p.

33. Method for configuring one or more parameters of one or more communication components in a transmitter of a communication system,

said communication components being according to any of the preceding claims 1 to 5, wherein the parameter(s) of the communication components are adjusted according to a latency parameter (7d) and/or a latency requirement (x_max).

34. Method according to claim 33 for transmitting codewords in the communication system,

comprising:

- encoding messages into codewords by means of one or more forward error correction, FEC, channel encoders, and

- transmitting the codewords to a receiver,

wherein the choice of the channel code and/or one or more FEC encoding parameters of the channel encoder are adjustable depending on a latency parameter (Td)

characterizing a part of, or the whole, system latency or/and latency requirement (x_max).

35. Computer program having a program code for performing the method according to claims 18, 19, 33 or 34, when the computer program runs on a computing device.

36. System comprising a communication component according to claim 1 or 2, a receiver according to any of the claims 6 to 17 and/or a transmitter according to any of the claims 20 to 32.