WO2017144106A1 - Rf-amplifier linearization using baseband replica feedback loops - Google Patents
Rf-amplifier linearization using baseband replica feedback loops Download PDFInfo
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- WO2017144106A1 WO2017144106A1 PCT/EP2016/054013 EP2016054013W WO2017144106A1 WO 2017144106 A1 WO2017144106 A1 WO 2017144106A1 EP 2016054013 W EP2016054013 W EP 2016054013W WO 2017144106 A1 WO2017144106 A1 WO 2017144106A1
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- 230000005540 biological transmission Effects 0.000 claims description 6
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- 238000012545 processing Methods 0.000 description 11
- 238000010586 diagram Methods 0.000 description 9
- 230000004044 response Effects 0.000 description 7
- 230000003321 amplification Effects 0.000 description 6
- 238000003199 nucleic acid amplification method Methods 0.000 description 6
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- 238000007906 compression Methods 0.000 description 5
- 230000001052 transient effect Effects 0.000 description 4
- 238000004590 computer program Methods 0.000 description 3
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- 230000008569 process Effects 0.000 description 3
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3223—Modifications of amplifiers to reduce non-linear distortion using feed-forward
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/02—Transmitters
- H04B1/04—Circuits
- H04B1/0475—Circuits with means for limiting noise, interference or distortion
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/02—Transmitters
- H04B1/04—Circuits
- H04B1/0483—Transmitters with multiple parallel paths
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/336—A I/Q, i.e. phase quadrature, modulator or demodulator being used in an amplifying circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/447—Indexing scheme relating to amplifiers the amplifier being protected to temperature influence
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2201/00—Indexing scheme relating to details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements covered by H03F1/00
- H03F2201/32—Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion
- H03F2201/3221—Predistortion by overamplifying in a feedforward stage the distortion signal to have a combined main signal and "negative" distortion to form the predistorted signal for a further stage. so that after amplification in the further stage only the amplified main signal remains
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/02—Transmitters
- H04B1/04—Circuits
- H04B2001/0408—Circuits with power amplifiers
Definitions
- the solution presented herein generally relates to wireless transmitters, and more particularly to the linearization of amplified RF signals.
- Modern wireless transmitters typically use one or more amplifiers to amplify a signal so that the amplified signal, when transmitted by the transmitter and received by a remote device, is strong enough for the receiver to accurately recover the original information.
- amplifiers are Power Amplifiers (PAs). Because of the high gains of such PAs, the PAs are typically the dominant current consumers in the transmitter.
- PAs Power Amplifiers
- One exemplary PA is the Radio frequency (RF) amplifier that amplifies the RF signal before transmission.
- the transmitter typically biases the RF amplifiers with as low a quiescent current as possible.
- the linearity of the RF amplifier is typically inversely proportional to the efficiency.
- a low biasing current used to reduce power consumption will negatively impact the linearity of the amplified signal.
- Past transmitters were able to tolerate the reduced linearity of the signals amplified by such amplifiers.
- Some solutions address this problem by using digital pre-distortion.
- Such digital pre- distortion solutions identify the non-linear response of the RF amplifier, and use this knowledge to generate a pre-distortion signal representing the inverse of the non-linear response.
- the transmitter then pre-distorts the amplifier input signal by combining the inverse of the non-linear response with the amplifier input signal.
- the RF amplifier amplifies the combination signal
- the "inverse" part of the combination signal effectively reverses the nonlinear impact of the amplifier such that the RF amplifier outputs only a linearly amplified version of the desired signal.
- the solution presented herein models the distortion of the power amplifier under the same operating conditions being experienced by the power amplifier, but at a lower frequency and gain, to generate a distortion compensation signal (DCS) at the lower frequency, e.g., baseband or an intermediate frequency (IF).
- DCS distortion compensation signal
- the solution presented herein uses a DCS generator that includes a model amplifier that models the power amplifier.
- the model and power amplifiers are placed close together, e.g., on the same die.
- the model amplifier experiences the same process, voltage, and temperature (PVT) conditions as the power amplifier, and therefore is able to track the distortion of the power amplifier.
- the solution then upconverts the DCS to RF and uses the upconverted DCS to effectively remove the distortion from the output of the power amplifier.
- One embodiment comprises a method of reducing distortion caused by a power amplifier comprising separate first and second amplifiers.
- the exemplary method comprises
- the method further comprises generating a low-frequency distortion compensation signal (DCS) from the low-frequency signal, upconverting the low-frequency DCS using the upconversion frequency to an RF DCS, and amplifying the RF DCS in the second amplifier to generate an amplified RF DCS.
- DCS low-frequency distortion compensation signal
- the method comprises combining the amplified RF signal and the amplified RF DCS.
- the wireless transmitter comprises separate first and second mixers, a distortion compensation signal (DCS) circuit, and a power amplifier comprising separate first and second amplifier circuits.
- the first mixer is configured to upconvert a low-frequency signal using an upconversion frequency to an RF signal.
- the DCS circuit is configured to generate a low-frequency DCS from the low-frequency signal.
- the second mixer is configured to upconvert the low-frequency DCS using the upconversion frequency to an RF DCS.
- the first amplifier is configured to amplify the RF signal by a first gain to generate an amplified RF signal.
- the second amplifier is configured to amplify the RF DCS in the second amplifier to generate an amplified RF DCS.
- the power amplifier is configured to combine the amplified RF signal and the amplified RF DCS to reduce distortion in the amplified RF signal.
- Another exemplary embodiment comprises a computer program product stored in a non- transitory computer readable medium for controlling a processing circuit of a wireless transmitter.
- the computer program product comprising software instructions which, when run on the processing circuit, causes the processing circuit to upconvert a low-frequency signal using an upconversion frequency to a Radio Frequency (RF) signal and amplify the RF signal by a first gain in a first amplifier of a power amplifier to generate an amplified RF signal.
- RF Radio Frequency
- the software instructions when run on the processing circuit, further cause the processing circuit to generate a low-frequency distortion compensation signal (DCS) from the low-frequency signal, upconvert the low-frequency DCS using the upconversion frequency to an RF DCS, and amplify the RF DCS in a second amplifier of the power amplifier to generate an amplified RF DCS.
- the software instructions when run on the processing circuit, further cause the processing circuit to combine the amplified RF signal and the amplified RF DCS to reduce distortion in the amplified RF signal.
- the wireless transmitter apparatus comprises separate first and second mixer modules, a distortion compensation signal (DCS) module, and a power amplifier module comprising separate first and second amplifier modules.
- the first mixer module is configured to upconvert a low-frequency signal using an upconversion frequency to an RF signal.
- the DCS module is configured to generate a low-frequency DCS from the low-frequency signal.
- the second mixer module is configured to upconvert the low-frequency DCS using the upconversion frequency to an RF
- the first amplifier module is configured to amplify the RF signal by a first gain to generate an amplified RF signal.
- the second amplifier module is configured to amplify the RF DCS in the second amplifier to generate an amplified RF DCS.
- the power module is configured to combine the amplified RF signal and the amplified RF DCS to reduce distortion in the amplified RF signal.
- Figure 1 shows an exemplary method for improving the linearity of an amplified RF signal.
- Figure 2 shows a block diagram for a wireless transmitter according to one exemplary embodiment.
- Figure 3 shows another block diagram for a wireless transmitter according to another exemplary embodiment.
- Figure 4 shows a block diagram for an exemplary DCS generator according to one exemplary embodiment.
- Figure 5 shows a block diagram for another exemplary DCS generator according to another exemplary embodiment.
- Figure 6 shows a block diagram for another exemplary DCS generator according to another exemplary embodiment.
- Figure 7 shows an exemplary comparison of the distortion and output power without the linearization of the solution presented herein and the distortion and output power with the linearization solution presented herein.
- Figures 8A and 8B show exemplary model transient analyses for the low-frequency DCS signal generation, e.g., for the DCS generator of Figure 5.
- Figure 9 shows an exemplary model transient analysis for the RF signal input to the RF amplifier and the RF DCS signal input to the DCA.
- Figure 10 shows a block diagram for a wireless transmitter apparatus according to another exemplary embodiment.
- the solution presented herein reduces distortion in a Radio Frequency (RF) signal amplified by a power amplifier, e.g., an RF amplifier, before transmission to a remote device.
- RF Radio Frequency
- This distortion reduction solution enables the power amplifier to be designed to be more power efficient, despite the fact that such power efficiency results in more non-linear behavior, because the solution presented herein removes, or at least reduces, the distortion.
- the solution presented herein relies on two properties of power amplifiers. First, the solution presented herein assumes that the distortion behavior of a power amplifier is approximately the same for all frequencies. Thus, the distortion contribution of the power amplifier is substantially the same at baseband as it is at RF.
- the solution presented herein assumes the distortion behavior of devices, e.g., the transistors making up the power amplifier, that are the same size and placed in close proximity of each on the same integrated circuit are approximately the same. Based on these assumptions, the solution presented herein generates a Distortion Correction Signal (DCS) at a frequency lower than RF, e.g., baseband or an Intermediate Frequency (IF), that accounts for and compensates for the distortion caused by a power amplifier at RF.
- DCS Distortion Correction Signal
- IF Intermediate Frequency
- Figure 1 shows one exemplary method 100 for reducing the distortion of an amplified RF signal output by a power amplifier configured to amplify an input RF signal.
- the exemplary method 100 is implemented by a wireless transmitter, e.g., the transmitter 200 shown in Figure 2.
- transmitter 200 upconverts a low-frequency input signal S low from the low frequency to RF using an upconversion or mixing frequency f m!x (block
- the transmitter 200 amplifies the resulting upconverted RF signal by a gain G l to generate an amplified RF signal S ⁇ , (block 120).
- the transmitter 200 also generates a low- frequency distortion compensation signal DCS low from the low-frequency input signal S low
- DCS low is configured to compensate for the distortion introduced into by one or more amplifiers in the transmitter 200.
- the transmitter 200 After upconverting DCS low by the upconversion frequency f m!x to generate an RF distortion compensation signal DCS ⁇ (block 140), the transmitter 200 amplifies DCS ⁇ to generate an amplified RF distortion compensation signal D gp (block 150).
- the transmitter 200 then reduces the distortion present in the amplified output signal S out by combining the amplified RF signal S ⁇ , with the amplified RF distortion compensation signal 3 ⁇ 4, (block 160).
- the solution presented herein reduces the power consumption and the manufacturing costs by taking advantage of the assumption that the transmitter amplification element(s) impart substantially the same distortion at RF as they do at lower frequencies.
- FIG. 2 shows a block diagram of an exemplary wireless transmitter 200 configured to generate an amplified RF signal having reduced distortion for transmission to a remote device, e.g., using the method 100 of Figure 1 .
- transmitter 200 comprises a first mixer 210, a second mixer 220 separate from the first mixer 210, a DCS generator circuit 230, and a power amplifier circuit 240.
- the first mixer 210 mixes S low with f mjx to upconvert the input low- frequency signal S low to an RF signal .
- the DCS generator circuit 230 generates the low- frequency distortion compensation signal DCS low from the low-frequency signal S low
- the second mixer 220 mixes DCS low with f m!x to upconvert DCS low to an RF distortion
- the DCS generator circuit 230 uses a negative feedback loop to qualify the signal (i.e., the DCS) that should be combined with the amplified RF signal to linearize S out .
- Power amplifier circuit 240 separately amplifies and DCS ⁇ , and combines the amplified signals ⁇ S ⁇ and 3 ⁇ 4, ) to reduce the distortion in the amplified signal S out output by the power amplifier 240.
- power amplifier circuit 240 comprises a main amplifier circuit 242 and a separate distortion compensation amplifier circuit 244 that operate in parallel to respectively amplify and DCS ⁇ . Because the RF distortion compensation signal DCS ⁇ represents the compensation necessary to reduce/eliminate the distortion imparted by the power amplifier 240, combining the amplified RF distortion
- compensation signal 3 ⁇ 4 with the amplified RF signal S ⁇ , effectively removes the distortion from S out .
- the low-frequency input signal may comprise a differential signal having an ln-phase component S _ I low and a Quadrature component S _ Q low , as shown in Figure 3.
- the DCS generator circuit 230 comprises separate ln-phase and Quadrature DCS generator circuits, e.g., separate instances of the DCS generator circuits 230 of Figure 5 or of Figure 6, that operate in parallel to generate the ln-phase component DCS _ I low and the Quadrature component DCS _ Q low of the distortion compensation signals.
- the first and second mixers 210, 220 comprise multi-phase mixers, e.g., frequency translating quadrature mixers or four-phase mixers, configured to upconvert the corresponding multi-phase, e.g., ln-phase and Quadrature, input signals to generate the corresponding RF signals S ⁇ and DCS ⁇ input to the power amplifier circuit 240.
- multi-phase mixers e.g., frequency translating quadrature mixers or four-phase mixers, configured to upconvert the corresponding multi-phase, e.g., ln-phase and Quadrature, input signals to generate the corresponding RF signals S ⁇ and DCS ⁇ input to the power amplifier circuit 240.
- FIG. 4 shows a block diagram for a DCS generator circuit 230 according to one exemplary embodiment, where the DCS generator circuit 230 comprises three separate amplifier circuits: a linear amplifier circuit 250, a model amplifier circuit 260, and a differential amplifier circuit 270.
- the model amplifier circuit 260 is subject to the same operating conditions
- the model amplifier circuit 260 effectively models the operation (and distortion) of the power amplifier circuit 240.
- Linear amplifier circuit 250 is configured to linearly amplify the low-frequency signal S low using any known means to generate a linear amplified signal S Un , while the model amplifier circuit 260 is configured to generate a model signal S moi from S low and DCS low , where DCS low is fed back to the model amplifier circuit 260 from the output of the DCS generator circuit 230 as part of a negative feedback loop.
- the differential amplifier circuit 270 differentially amplifies S mod and S Un using a sufficiently high gain G 3 such that the model signal S mod follows the linear amplified signal S Un . In so doing, the differential amplifier circuit 270 functions in a similar manner as an operational amplifier with a negative feedback loop. As a result, the differential amplifier circuit 270 outputs the low-frequency distortion compensation signal DCS low
- the negative feedback loop of the DCS generator circuit 230 functions to keep the gain of the linear amplifier circuit 250 identical to the model amplifier circuit 260 such that with the correct scaling of the power amplifier circuit 240 with respect to the model amplifier circuit 260, the voltage gain (and distortion) of the power amplifier circuit 240 will also track the voltage gain (and distortion) of the linear amplifier circuit 250.
- FIG. 5 shows an exemplary embodiment for the DCS generator circuit 230 of Figure 4.
- linear amplifier circuit 250 comprises an amplifier configured to operate linearly. Because linear amplifier circuit 250 does not handle any RF signals and will only handle baseband (or IF) signals, linear amplifier 250 can be constructed to operate more linearly at a lower cost.
- Model amplifier circuit 260 represents a scaled version of the power amplifier circuit 240, where the main amplifier 262 and the DCA 264 in model amplifier circuit 260 respectively correspond to the main amplifier 242 and DCA 244 in power amplifier circuit 240.
- the load impedance of the model amplifier circuit 260 should also be scaled accordingly to ensure the power amplifier circuit 240 and model amplifier circuit 260 impart the same distortion.
- the operating conditions e.g., input signal amplitude, supply voltage, bias settings, etc., should be set substantially the same so that the distortion response of the power amplifier circuit 240 and the model amplifier circuit 260 is substantially the same.
- linear amplifier circuit 250 and model amplifier circuit 260 have substantially the same gain G 2 , and because the model amplifier circuit 260 imparts the same distortion as the power amplifier circuit 240, these two amplifier circuits enable the distortion to be qualified from the difference between linearly and non-linearly amplified versions of the low-frequency input signal.
- differential amplifier circuit 270 determines and amplifies the difference between S Un and S moi .
- differential amplifier circuit 270 comprises a differential combiner 272 and an error amplifier 274.
- the differential combiner 272 outputs the difference between S Un and S moi , which represents an error signal S err .
- the error amplifier 274 amplifies the error signal S err to generate the low frequency distortion compensation signal DCS low .
- the loop formed by the DCA 264, differential combiner 272, and error amplifier 274 is configured so as to form a negative feedback loop, which forces S moi to follow S Un , and therefore, forces S moi to be as linear as S Un .
- the DCS low fed back to the DCA 264 in the model amplifier 260 is the signal necessary to remove the distortion from S ml at the output of the main amplifier 262, and thus is the signal necessary to make S moi as linear as S Un .
- the main amplifier 242 of the power amplifier circuit 240 is a good replica of the main amplifier 262 in the model amplifier circuit 260 in terms of various operating conditions, e.g., process, voltage, and temperature variation, etc.
- Figure 6 shows another exemplary DCS generator circuit 230.
- the linear amplifier circuit 250 is constructed using an attenuator 252, a main amplifier 254, and optionally a second amplifier 256.
- the input to the second amplifier 256 may be zero, or may be tied to the output of the attenuator 252.
- the signal input to the amplifiers 254, 256 should be sufficiently low so as to ensure that amplifiers 254, 256 operate linearly.
- the attenuator 252 first attenuates the signal input to the main amplifier 254, the input signal to the main amplifier 254 has a lower signal level, which relaxes the linearity requirements of the main amplifier 254 (and potentially of the second amplifier 256).
- the main amplifier 254 will behave more linearly as compared to the main amplifier 262 of the model amplifier circuit 260.
- the model amplifier circuit 260 of Figure 6 further includes an attenuator 266, which applies substantially the same attenuation as the attenuator 252 in the linear amplifier circuit 250.
- the model amplifier attenuator 266 applies the 1/k attenuation to the combination of the signals S ml and S m2 respectively output by the main amplifier 262 and DCA 264.
- the differential amplifier circuit 270 in Figure 6 operates in the same manner as the differential amplifier circuit 270 in Figure 5 to produce the low frequency distortion compensation signal DCS low that substantially removes distortion from S ⁇ , to reduce the distortion in S out . Further details of a circuit related to the embodiment of Figure 6 may be found in the co-pending U.S. Application Serial No. 14/306720 titled "Power Amplifier Pre-Distortion Signal Generator Using An Analog Baseband Envelope Feedback Loop" and filed 17 June 2014.
- Figures 5 and 6 both show a single-ended differential amplifier circuit 270, it will be appreciated that the differential amplifier circuit 270 may also be configured for a differential signal.
- the error amplifier 274 can be made to operate on the differential signal, where a second loop to control the common mode of the input signal then needs to be added.
- a differential signal out from the differential combiner 272 can be treated as two individual signals that are amplified by two separate error amplifiers 274 and looped back to the corresponding branch of the DCA 264.
- the gain of the DCA circuit 244 used to generate DCS ⁇ is substantially equal to the gain of the main amplifier circuit 242 used to generate .
- the solution presented herein does not require these gains to be equivalent.
- the amplitude of D gp is set by some combination of the amplification provided by the DCS generator circuit 230 and the amplification provided by the DCA circuit 244, where the combined gain provides a 3 ⁇ 4, with sufficient amplitude to mitigate the distortion of the main amplifier circuit 242. So, as the gain of the DCA circuit 244 decreases, the output signal of the error amplifier circuit 274 increases as the gain of the DCA 264 in model amplifier circuit 260 tracks the DCA 244 of the power amplifier circuit 240.
- DCA circuit 244 would need to be sufficiently large to prevent the error amplifier circuit 274 from saturating. Further, the gain of the DCA circuit 244 should be sufficiently large to prevent the amplitude of the DCS low signal from being so large that it results in a distortion contribution from the mixers. It will be appreciated that the gains of these two amplifiers will be predetermined upon configuration of the circuit.
- Figure 7 shows a simulation of the distortion at the output of the power amplifier circuit 240 with the linearization solution presented herein (top) and without the linearization solution (bottom). As shown in Figure 7, the solution presented herein reduces the 3 rd order
- IM3 intermodulation distortion
- Figures 8A and 8B show a simulation of the transient signal responses for S Un , S moi , and DCS low for the exemplary block diagram of the DCS generator circuit 230 of Figure 6.
- Figure 8A shows the S Un , S moi , and DCS low signals separately
- Figure 8B shows the S Un , S moi , and DCS low signals on top of each other to more clearly show their relationship.
- the main amplifier 262 in the model amplifier 260 suffers from gain compression.
- extra signal is needed by the DCA 264 of the model amplifier 260, and this extra signal is provided by DCS low .
- DCS low compensates for the gain compression and thus linearizes S moi .
- Figure 9 shows a simulation of the transient signal response at the output of the power amplifier.
- the amplitude of DCS ⁇ increases to compensate for the gain compression of the main amplifier 242 of the power amplifier 240.
- the gain compression compensation achieved in the DCS generator circuit 230 translates to a gain compression compensation for the power amplifier 240, as shown in Figure 9.
- a wireless transmitter apparatus 300 as shown in Figure 10 may implement the method 100.
- Wireless transmitter apparatus 300 comprises a first mixer module 310, a second mixer module 320 separate from the first mixer module 310, a distortion generator module 330, and a power amplifier module 340.
- the first mixer module 310 mixes S low with f m!x to upconvert the input low-frequency signal S low to an RF signal .
- the DCS generator module 330 generates the low-frequency distortion compensation signal DCS low from the low-frequency signal S low using a negative feedback loop in the same manner as described above with respect to the DCS generator circuit 230.
- the DCS generator module 330 comprises a linear amplifier module 350, model amplifier module 360, and differential amplifier module 370 that function in the same manner as the corresponding linear amplifier circuit 250, model amplifier circuit 260, and differential amplifier circuit 270 described herein.
- the second mixer module 320 mixes DCS low with f m!x to upconvert DCS low to an RF distortion compensation signal DCS ⁇ .
- Power amplifier module 340 separately amplifies and DCS gp , and combines the amplified signals ⁇ S ⁇ and 3 ⁇ 4, ) to reduce the distortion in the amplified signal S out output by the power amplifier 240.
- power amplifier module 340 comprises a main amplifier module 342 and a separate distortion compensation amplifier module 344 that operate in parallel to respectively amplify and DCS ⁇ . Because the RF distortion compensation signal DCS ⁇ represents the compensation necessary to reduce/eliminate the distortion imparted by the power amplifier module 340, combining the amplified RF distortion compensation signal 3 ⁇ 4, with the amplified RF signal S ⁇ , effectively removes the distortion from S out .
- the blocks of Figures 5 and 6 used to describe different embodiments of the DCS generator circuit 230 may comprise circuits, e.g., a main amplifier circuit 262, DCA circuit 264 and/or attenuator circuit 266 of the model amplifier module 260, a differential combiner circuit 272 and error amplifier circuit 274 of differential amplifier circuit 270, and attenuator circuit 252 and main amplifier circuit 254 of linear amplifier circuit 250.
- circuits e.g., a main amplifier circuit 262, DCA circuit 264 and/or attenuator circuit 266 of the model amplifier module 260, a differential combiner circuit 272 and error amplifier circuit 274 of differential amplifier circuit 270, and attenuator circuit 252 and main amplifier circuit 254 of linear amplifier circuit 250.
- these blocks may be part of the DCS generator module 330, and therefore may be comprise modules, e.g., a main amplifier module, DCA module and/or attenuator module of the model amplifier module 360, a differential combiner module and error amplifier module of differential amplifier module 370, and attenuator module and main amplifier module of linear amplifier module 350.
- modules e.g., a main amplifier module, DCA module and/or attenuator module of the model amplifier module 360, a differential combiner module and error amplifier module of differential amplifier module 370, and attenuator module and main amplifier module of linear amplifier module 350.
- method 100 may be implemented as stored computer program instructions for execution by one or more computing devices, e.g., microprocessors, Digital Signal Processors (DSPs), FPGAs, ASICs, or other data processing circuits.
- the stored program instructions may be stored on machine-readable media, e.g., electrical, magnetic, or optical memory devices.
- the memory devices may include ROM and/or RAM modules, flash memory, hard disk drives, magnetic disc drives, optical disc drives and other storage media known in the art.
- method 100 may be implemented using a processing circuit of a wireless transmitter, where software instructions run on the processing circuit cause the processing circuit to execute the method 100 of Figure 1 .
- the solution presented herein allows for more efficient power amplification of RF signals while simultaneously reducing the distortion of the resulting amplified signals. Because the solution presented herein achieves this goal by generating a distortion compensation signal at a lower frequency, e.g., baseband, the solution presented herein achieves the desired goal without unduly increasing the cost or power consumption of the transmitter.
- circuits e.g., a transmitter, amplifier, mixer, combiner, attenuator, DCS generator, etc.
- Each of these circuits may be embodied in hardware, and in some cases in software (including firmware, resident software, microcode, etc.) executed on a controller or processor, including an application specific integrated circuit (ASIC).
- ASIC application specific integrated circuit
- a wireless communication device any device that uses power amplification to amplify an input signal
- exemplary devices include, but are not limited to, a mobile telephone, sensor, tablet, personal computer, network node (e.g., radio base station), etc.
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Abstract
A transmitter (200) with reduced distortion is presented herein. The transmitter (200) comprises a power amplifier (240), where the transmitter (200) models the distortion of the power amplifier (240) under the same operating conditions being experienced by the power amplifier (240), but at lower frequency and gain, to generate a distortion compensation signal (DCS) at the lower frequency, e.g., baseband or intermediate frequency (IF). To that end, the transmitter (200) uses a DCS generator (230) that includes a model amplifier (260) that models the power amplifier (240). In some embodiments, the model and power amplifiers are placed close together, e.g., on the same die. As such, the model amplifier (260) is able to track the distortion of the power amplifier (240). The transmitter (200) then upconverts the DCS to RF and uses the upconverted DCS to effectively remove the distortion from the output of the power amplifier (240).
Description
RF-AMPLIFIER LINEARIZATION USING BASEBAND REPLICA FEEDBACK LOOPS
TECHNICAL FIELD
The solution presented herein generally relates to wireless transmitters, and more particularly to the linearization of amplified RF signals.
BACKGROUND
Modern wireless transmitters typically use one or more amplifiers to amplify a signal so that the amplified signal, when transmitted by the transmitter and received by a remote device, is strong enough for the receiver to accurately recover the original information. Typically, such amplifiers are Power Amplifiers (PAs). Because of the high gains of such PAs, the PAs are typically the dominant current consumers in the transmitter.
One exemplary PA is the Radio frequency (RF) amplifier that amplifies the RF signal before transmission. To reduce the current consumption, the transmitter typically biases the RF amplifiers with as low a quiescent current as possible. However, the linearity of the RF amplifier is typically inversely proportional to the efficiency. Thus, a low biasing current used to reduce power consumption will negatively impact the linearity of the amplified signal. Past transmitters were able to tolerate the reduced linearity of the signals amplified by such amplifiers. The current trends towards higher bit rates and more complex modulation schemes, however, lead to more stringent linearity requirements. Such linearity requirements in turn cause the power consumption to increase.
Some solutions address this problem by using digital pre-distortion. Such digital pre- distortion solutions identify the non-linear response of the RF amplifier, and use this knowledge to generate a pre-distortion signal representing the inverse of the non-linear response. The transmitter then pre-distorts the amplifier input signal by combining the inverse of the non-linear response with the amplifier input signal. As a result, when the RF amplifier amplifies the combination signal, the "inverse" part of the combination signal effectively reverses the nonlinear impact of the amplifier such that the RF amplifier outputs only a linearly amplified version of the desired signal.
While such pre-distortion techniques look good on paper, the difficulties of accurately determining the non-linear response of the RF amplifier in practice for various process, voltage, and temperature (PVT) conditions make such pre-distortion techniques are prohibitively complicated. Thus, there remains a need for alternate RF amplification solutions that improve the linearity of amplified signals over various PVT conditions.
SUMMARY
The solution presented herein models the distortion of the power amplifier under the same operating conditions being experienced by the power amplifier, but at a lower frequency and gain, to generate a distortion compensation signal (DCS) at the lower frequency, e.g., baseband or an intermediate frequency (IF). To that end, the solution presented herein uses a DCS generator that includes a model amplifier that models the power amplifier. In some embodiments, the model and power amplifiers are placed close together, e.g., on the same die. As such, the model amplifier experiences the same process, voltage, and temperature (PVT) conditions as the power amplifier, and therefore is able to track the distortion of the power amplifier. The solution then upconverts the DCS to RF and uses the upconverted DCS to effectively remove the distortion from the output of the power amplifier.
One embodiment comprises a method of reducing distortion caused by a power amplifier comprising separate first and second amplifiers. The exemplary method comprises
upconverting a low-frequency signal using an upconversion frequency to an RF signal and amplifying the RF signal by a first gain in the first amplifier to generate an amplified RF signal. The method further comprises generating a low-frequency distortion compensation signal (DCS) from the low-frequency signal, upconverting the low-frequency DCS using the upconversion frequency to an RF DCS, and amplifying the RF DCS in the second amplifier to generate an amplified RF DCS. To reduce distortion in the amplified RF signal, the method comprises combining the amplified RF signal and the amplified RF DCS.
Another exemplary embodiment comprises a wireless transmitter configured to reduce distortion in an amplified signal for transmission to a remote device. The wireless transmitter comprises separate first and second mixers, a distortion compensation signal (DCS) circuit, and a power amplifier comprising separate first and second amplifier circuits. The first mixer is configured to upconvert a low-frequency signal using an upconversion frequency to an RF signal. The DCS circuit is configured to generate a low-frequency DCS from the low-frequency signal. The second mixer is configured to upconvert the low-frequency DCS using the upconversion frequency to an RF DCS. The first amplifier is configured to amplify the RF signal by a first gain to generate an amplified RF signal. The second amplifier is configured to amplify the RF DCS in the second amplifier to generate an amplified RF DCS. The power amplifier is configured to combine the amplified RF signal and the amplified RF DCS to reduce distortion in the amplified RF signal.
Another exemplary embodiment comprises a computer program product stored in a non- transitory computer readable medium for controlling a processing circuit of a wireless transmitter. The computer program product comprising software instructions which, when run on the processing circuit, causes the processing circuit to upconvert a low-frequency signal using an upconversion frequency to a Radio Frequency (RF) signal and amplify the RF signal by a first gain in a first amplifier of a power amplifier to generate an amplified RF signal. The
software instructions, when run on the processing circuit, further cause the processing circuit to generate a low-frequency distortion compensation signal (DCS) from the low-frequency signal, upconvert the low-frequency DCS using the upconversion frequency to an RF DCS, and amplify the RF DCS in a second amplifier of the power amplifier to generate an amplified RF DCS. The software instructions, when run on the processing circuit, further cause the processing circuit to combine the amplified RF signal and the amplified RF DCS to reduce distortion in the amplified RF signal.
Another exemplary embodiment comprises a wireless transmitter apparatus configured to reduce distortion in an amplified signal for transmission to a remote device. The wireless transmitter apparatus comprises separate first and second mixer modules, a distortion compensation signal (DCS) module, and a power amplifier module comprising separate first and second amplifier modules. The first mixer module is configured to upconvert a low-frequency signal using an upconversion frequency to an RF signal. The DCS module is configured to generate a low-frequency DCS from the low-frequency signal. The second mixer module is configured to upconvert the low-frequency DCS using the upconversion frequency to an RF
DCS. The first amplifier module is configured to amplify the RF signal by a first gain to generate an amplified RF signal. The second amplifier module is configured to amplify the RF DCS in the second amplifier to generate an amplified RF DCS. The power module is configured to combine the amplified RF signal and the amplified RF DCS to reduce distortion in the amplified RF signal.
BRIEF DESCRIPTION OF THE DRAWINGS
Figure 1 shows an exemplary method for improving the linearity of an amplified RF signal.
Figure 2 shows a block diagram for a wireless transmitter according to one exemplary embodiment.
Figure 3 shows another block diagram for a wireless transmitter according to another exemplary embodiment.
Figure 4 shows a block diagram for an exemplary DCS generator according to one exemplary embodiment.
Figure 5 shows a block diagram for another exemplary DCS generator according to another exemplary embodiment.
Figure 6 shows a block diagram for another exemplary DCS generator according to another exemplary embodiment.
Figure 7 shows an exemplary comparison of the distortion and output power without the linearization of the solution presented herein and the distortion and output power with the linearization solution presented herein.
Figures 8A and 8B show exemplary model transient analyses for the low-frequency DCS signal generation, e.g., for the DCS generator of Figure 5.
Figure 9 shows an exemplary model transient analysis for the RF signal input to the RF amplifier and the RF DCS signal input to the DCA.
Figure 10 shows a block diagram for a wireless transmitter apparatus according to another exemplary embodiment.
DETAILED DESCRIPTION
The solution presented herein reduces distortion in a Radio Frequency (RF) signal amplified by a power amplifier, e.g., an RF amplifier, before transmission to a remote device. This distortion reduction solution enables the power amplifier to be designed to be more power efficient, despite the fact that such power efficiency results in more non-linear behavior, because the solution presented herein removes, or at least reduces, the distortion. The solution presented herein relies on two properties of power amplifiers. First, the solution presented herein assumes that the distortion behavior of a power amplifier is approximately the same for all frequencies. Thus, the distortion contribution of the power amplifier is substantially the same at baseband as it is at RF. Second, the solution presented herein assumes the distortion behavior of devices, e.g., the transistors making up the power amplifier, that are the same size and placed in close proximity of each on the same integrated circuit are approximately the same. Based on these assumptions, the solution presented herein generates a Distortion Correction Signal (DCS) at a frequency lower than RF, e.g., baseband or an Intermediate Frequency (IF), that accounts for and compensates for the distortion caused by a power amplifier at RF.
It will be appreciated that the use of italics or any other emphasis markings, e.g., on variable names/labels, has no intended significance in this application or the associated drawings. For example, SRF and may both be used herein and/or in the associated drawings interchangeably to represent the upconverted RF signal.
Figure 1 shows one exemplary method 100 for reducing the distortion of an amplified RF signal output by a power amplifier configured to amplify an input RF signal. The exemplary method 100 is implemented by a wireless transmitter, e.g., the transmitter 200 shown in Figure 2. According to the exemplary method 100, transmitter 200 upconverts a low-frequency input signal Slow from the low frequency to RF using an upconversion or mixing frequency fm!x (block
1 10). The transmitter 200 amplifies the resulting upconverted RF signal by a gain Gl to generate an amplified RF signal S^, (block 120). The transmitter 200 also generates a low- frequency distortion compensation signal DCSlow from the low-frequency input signal Slow
(block 130), where DCSlow is configured to compensate for the distortion introduced into by
one or more amplifiers in the transmitter 200. After upconverting DCSlow by the upconversion frequency fm!x to generate an RF distortion compensation signal DCS^ (block 140), the transmitter 200 amplifies DCS^ to generate an amplified RF distortion compensation signal Dgp (block 150). The transmitter 200 then reduces the distortion present in the amplified output signal Sout by combining the amplified RF signal S^, with the amplified RF distortion compensation signal ¾, (block 160). By generating the DCS at a low frequency, the solution presented herein reduces the power consumption and the manufacturing costs by taking advantage of the assumption that the transmitter amplification element(s) impart substantially the same distortion at RF as they do at lower frequencies.
Figure 2 shows a block diagram of an exemplary wireless transmitter 200 configured to generate an amplified RF signal having reduced distortion for transmission to a remote device, e.g., using the method 100 of Figure 1 . To that end, transmitter 200 comprises a first mixer 210, a second mixer 220 separate from the first mixer 210, a DCS generator circuit 230, and a power amplifier circuit 240. The first mixer 210 mixes Slow with fmjx to upconvert the input low- frequency signal Slow to an RF signal . The DCS generator circuit 230 generates the low- frequency distortion compensation signal DCSlow from the low-frequency signal Slow , and the second mixer 220 mixes DCSlow with fm!x to upconvert DCSlow to an RF distortion
compensation signal DCS^ . More particularly, the DCS generator circuit 230 uses a negative feedback loop to qualify the signal (i.e., the DCS) that should be combined with the amplified RF signal to linearize Sout . Power amplifier circuit 240 separately amplifies and DCS^ , and combines the amplified signals {S^ and ¾, ) to reduce the distortion in the amplified signal Sout output by the power amplifier 240. To that end, power amplifier circuit 240 comprises a main amplifier circuit 242 and a separate distortion compensation amplifier circuit 244 that operate in parallel to respectively amplify and DCS^ . Because the RF distortion compensation signal DCS^ represents the compensation necessary to reduce/eliminate the distortion imparted by the power amplifier 240, combining the amplified RF distortion
compensation signal ¾, with the amplified RF signal S^, effectively removes the distortion from Sout .
The solution described above with respect to Figures 1 and 2 is described in terms of a single signal path. It will be appreciated, however, that the low-frequency input signal may comprise a differential signal having an ln-phase component S _ Ilow and a Quadrature component S _ Qlow , as shown in Figure 3. In this embodiment, the DCS generator circuit 230
comprises separate ln-phase and Quadrature DCS generator circuits, e.g., separate instances of the DCS generator circuits 230 of Figure 5 or of Figure 6, that operate in parallel to generate the ln-phase component DCS _ Ilow and the Quadrature component DCS _ Qlow of the distortion compensation signals. Further, in this embodiment the first and second mixers 210, 220 comprise multi-phase mixers, e.g., frequency translating quadrature mixers or four-phase mixers, configured to upconvert the corresponding multi-phase, e.g., ln-phase and Quadrature, input signals to generate the corresponding RF signals S^ and DCS^ input to the power amplifier circuit 240.
As noted above, the DCS generator circuit 230 uses a negative feedback loop to generate the DCS. Figure 4 shows a block diagram for a DCS generator circuit 230 according to one exemplary embodiment, where the DCS generator circuit 230 comprises three separate amplifier circuits: a linear amplifier circuit 250, a model amplifier circuit 260, and a differential amplifier circuit 270. The model amplifier circuit 260 is subject to the same operating
conditions/characteristics as the power amplifier circuit 240, though not necessarily operating at the same gain. Thus, while operating at a lower frequency, e.g., baseband, the model amplifier circuit 260 effectively models the operation (and distortion) of the power amplifier circuit 240. Linear amplifier circuit 250 is configured to linearly amplify the low-frequency signal Slow using any known means to generate a linear amplified signal SUn , while the model amplifier circuit 260 is configured to generate a model signal Smoi from Slow and DCSlow , where DCSlow is fed back to the model amplifier circuit 260 from the output of the DCS generator circuit 230 as part of a negative feedback loop. The differential amplifier circuit 270 differentially amplifies Smod and SUn using a sufficiently high gain G3 such that the model signal Smod follows the linear amplified signal SUn . In so doing, the differential amplifier circuit 270 functions in a similar manner as an operational amplifier with a negative feedback loop. As a result, the differential amplifier circuit 270 outputs the low-frequency distortion compensation signal DCSlow
necessary to linearize the model signal Smod , and thus necessary to linearize the amplified RF signal S^, . In other words, the negative feedback loop of the DCS generator circuit 230 functions to keep the gain of the linear amplifier circuit 250 identical to the model amplifier circuit 260 such that with the correct scaling of the power amplifier circuit 240 with respect to the model amplifier circuit 260, the voltage gain (and distortion) of the power amplifier circuit 240 will also track the voltage gain (and distortion) of the linear amplifier circuit 250.
Figure 5 shows an exemplary embodiment for the DCS generator circuit 230 of Figure 4. In this embodiment, linear amplifier circuit 250 comprises an amplifier configured to operate linearly. Because linear amplifier circuit 250 does not handle any RF signals and will only handle baseband (or IF) signals, linear amplifier 250 can be constructed to operate more
linearly at a lower cost. Model amplifier circuit 260 represents a scaled version of the power amplifier circuit 240, where the main amplifier 262 and the DCA 264 in model amplifier circuit 260 respectively correspond to the main amplifier 242 and DCA 244 in power amplifier circuit 240. For example, the power amplifier circuit 240 of Figure 2 may comprise N > 1 identical instances (e.g., unit sized active devices) operating in parallel, while the model amplifier circuit 260 of Figure 5 may only comprise one instance (e.g., N = 1 ). In this case, the load impedance of the model amplifier circuit 260 should also be scaled accordingly to ensure the power amplifier circuit 240 and model amplifier circuit 260 impart the same distortion. Further, the operating conditions, e.g., input signal amplitude, supply voltage, bias settings, etc., should be set substantially the same so that the distortion response of the power amplifier circuit 240 and the model amplifier circuit 260 is substantially the same. Because the linear amplifier circuit 250 and model amplifier circuit 260 have substantially the same gain G2 , and because the model amplifier circuit 260 imparts the same distortion as the power amplifier circuit 240, these two amplifier circuits enable the distortion to be qualified from the difference between linearly and non-linearly amplified versions of the low-frequency input signal.
More particularly, differential amplifier circuit 270 determines and amplifies the difference between SUn and Smoi . To that end, differential amplifier circuit 270 comprises a differential combiner 272 and an error amplifier 274. The differential combiner 272 outputs the difference between SUn and Smoi , which represents an error signal Serr . The error amplifier 274 amplifies the error signal Serr to generate the low frequency distortion compensation signal DCSlow . The loop formed by the DCA 264, differential combiner 272, and error amplifier 274 is configured so as to form a negative feedback loop, which forces Smoi to follow SUn , and therefore, forces Smoi to be as linear as SUn . Stated another way, the DCSlow fed back to the DCA 264 in the model amplifier 260 is the signal necessary to remove the distortion from Sml at the output of the main amplifier 262, and thus is the signal necessary to make Smoi as linear as SUn .
By performing the same frequency upconversion to DCSlow as applied to Slow to respectively generate DCS^ and , and then by amplifying DCS^ and to respectively generate ¾, and , ¾, will represent a compensation signal that removes (or reduces) the distortion from in the same way that Sm2 removed (or reduced) the distortion from Sml , which causes Sout to be as linear as SUn . This is true as long as the design of the power amplifier circuit 240 mimics the design of the model amplifier circuit 260, e.g., the power amplifier circuit 240 has substantially the same distortion characteristics as the model amplifier circuit 260 for both the low frequency of the input signal and the RF frequency after
upconversion, and as long as the main amplifier 242 of the power amplifier circuit 240 is a good
replica of the main amplifier 262 in the model amplifier circuit 260 in terms of various operating conditions, e.g., process, voltage, and temperature variation, etc.
Figure 6 shows another exemplary DCS generator circuit 230. In this embodiment, the linear amplifier circuit 250 is constructed using an attenuator 252, a main amplifier 254, and optionally a second amplifier 256. The input to the second amplifier 256 may be zero, or may be tied to the output of the attenuator 252. In any event, for the solution of Figure 6, the signal input to the amplifiers 254, 256 should be sufficiently low so as to ensure that amplifiers 254, 256 operate linearly. Thus, because the attenuator 252 first attenuates the signal input to the main amplifier 254, the input signal to the main amplifier 254 has a lower signal level, which relaxes the linearity requirements of the main amplifier 254 (and potentially of the second amplifier 256). As a result, the main amplifier 254 will behave more linearly as compared to the main amplifier 262 of the model amplifier circuit 260. Because the linear amplifier circuit 250 and the model amplifier circuit 260 receive the same input signal, and thus the same input signal level, and because the linear amplifier circuit 250 is configured to apply substantially the same gain G2 as the model amplifier circuit 260, the model amplifier circuit 260 of Figure 6 further includes an attenuator 266, which applies substantially the same attenuation as the attenuator 252 in the linear amplifier circuit 250. In this embodiment, the model amplifier attenuator 266 applies the 1/k attenuation to the combination of the signals Sml and Sm2 respectively output by the main amplifier 262 and DCA 264. The differential amplifier circuit 270 in Figure 6 operates in the same manner as the differential amplifier circuit 270 in Figure 5 to produce the low frequency distortion compensation signal DCSlow that substantially removes distortion from S^, to reduce the distortion in Sout . Further details of a circuit related to the embodiment of Figure 6 may be found in the co-pending U.S. Application Serial No. 14/306720 titled "Power Amplifier Pre-Distortion Signal Generator Using An Analog Baseband Envelope Feedback Loop" and filed 17 June 2014.
While Figures 5 and 6 both show a single-ended differential amplifier circuit 270, it will be appreciated that the differential amplifier circuit 270 may also be configured for a differential signal. In this case, the error amplifier 274 can be made to operate on the differential signal, where a second loop to control the common mode of the input signal then needs to be added. As an alternative, a differential signal out from the differential combiner 272 can be treated as two individual signals that are amplified by two separate error amplifiers 274 and looped back to the corresponding branch of the DCA 264.
In some cases, the gain of the DCA circuit 244 used to generate DCS^ is substantially equal to the gain of the main amplifier circuit 242 used to generate . However, the solution presented herein does not require these gains to be equivalent. In general, the amplitude of Dgp is set by some combination of the amplification provided by the DCS generator circuit 230
and the amplification provided by the DCA circuit 244, where the combined gain provides a ¾, with sufficient amplitude to mitigate the distortion of the main amplifier circuit 242. So, as the gain of the DCA circuit 244 decreases, the output signal of the error amplifier circuit 274 increases as the gain of the DCA 264 in model amplifier circuit 260 tracks the DCA 244 of the power amplifier circuit 240. It will be appreciated that if the error amplifier circuit 274 saturates, it will not provide a sufficiently large signal to the power amplifier 240. In this case, DCA circuit 244 would need to be sufficiently large to prevent the error amplifier circuit 274 from saturating. Further, the gain of the DCA circuit 244 should be sufficiently large to prevent the amplitude of the DCSlow signal from being so large that it results in a distortion contribution from the mixers. It will be appreciated that the gains of these two amplifiers will be predetermined upon configuration of the circuit.
Figure 7 shows a simulation of the distortion at the output of the power amplifier circuit 240 with the linearization solution presented herein (top) and without the linearization solution (bottom). As shown in Figure 7, the solution presented herein reduces the 3rd order
intermodulation distortion (IM3) by 25 dB.
Figures 8A and 8B show a simulation of the transient signal responses for SUn , Smoi , and DCSlow for the exemplary block diagram of the DCS generator circuit 230 of Figure 6. Figure 8A shows the SUn , Smoi , and DCSlow signals separately, while Figure 8B shows the SUn , Smoi , and DCSlow signals on top of each other to more clearly show their relationship. As shown in Figures 8A and 8B, for large signal amplitudes, the main amplifier 262 in the model amplifier 260 suffers from gain compression. In order to get Smoi up to the level of SUn , extra signal is needed by the DCA 264 of the model amplifier 260, and this extra signal is provided by DCSlow . Thus, as shown in Figures 8A and 8B, DCSlow compensates for the gain compression and thus linearizes Smoi .
Figure 9 shows a simulation of the transient signal response at the output of the power amplifier. As shown in Figure 9, for high input signals, the amplitude of DCS^ increases to compensate for the gain compression of the main amplifier 242 of the power amplifier 240. Thus, the gain compression compensation achieved in the DCS generator circuit 230 translates to a gain compression compensation for the power amplifier 240, as shown in Figure 9.
It will be appreciated that other devices may be used to implement the method 100 of
Figure 1. For example, a wireless transmitter apparatus 300 as shown in Figure 10 may implement the method 100. Wireless transmitter apparatus 300 comprises a first mixer module 310, a second mixer module 320 separate from the first mixer module 310, a distortion generator module 330, and a power amplifier module 340. The first mixer module 310 mixes Slow with fm!x to upconvert the input low-frequency signal Slow to an RF signal . The DCS
generator module 330 generates the low-frequency distortion compensation signal DCSlow from the low-frequency signal Slow using a negative feedback loop in the same manner as described above with respect to the DCS generator circuit 230. In particular, the DCS generator module 330 comprises a linear amplifier module 350, model amplifier module 360, and differential amplifier module 370 that function in the same manner as the corresponding linear amplifier circuit 250, model amplifier circuit 260, and differential amplifier circuit 270 described herein. The second mixer module 320 mixes DCSlow with fm!x to upconvert DCSlow to an RF distortion compensation signal DCS^ . Power amplifier module 340 separately amplifies and DCSgp , and combines the amplified signals {S^ and ¾, ) to reduce the distortion in the amplified signal Sout output by the power amplifier 240. More particularly, power amplifier module 340 comprises a main amplifier module 342 and a separate distortion compensation amplifier module 344 that operate in parallel to respectively amplify and DCS^ . Because the RF distortion compensation signal DCS^ represents the compensation necessary to reduce/eliminate the distortion imparted by the power amplifier module 340, combining the amplified RF distortion compensation signal ¾, with the amplified RF signal S^, effectively removes the distortion from Sout .
It will further be appreciated that the blocks of Figures 5 and 6 used to describe different embodiments of the DCS generator circuit 230 may comprise circuits, e.g., a main amplifier circuit 262, DCA circuit 264 and/or attenuator circuit 266 of the model amplifier module 260, a differential combiner circuit 272 and error amplifier circuit 274 of differential amplifier circuit 270, and attenuator circuit 252 and main amplifier circuit 254 of linear amplifier circuit 250. In other embodiments, these blocks may be part of the DCS generator module 330, and therefore may be comprise modules, e.g., a main amplifier module, DCA module and/or attenuator module of the model amplifier module 360, a differential combiner module and error amplifier module of differential amplifier module 370, and attenuator module and main amplifier module of linear amplifier module 350.
Those of skill in the art will also readily recognize that at least some of the method 100 described herein may be implemented as stored computer program instructions for execution by one or more computing devices, e.g., microprocessors, Digital Signal Processors (DSPs), FPGAs, ASICs, or other data processing circuits. The stored program instructions may be stored on machine-readable media, e.g., electrical, magnetic, or optical memory devices. The memory devices may include ROM and/or RAM modules, flash memory, hard disk drives, magnetic disc drives, optical disc drives and other storage media known in the art. For example, method 100 may be implemented using a processing circuit of a wireless transmitter,
where software instructions run on the processing circuit cause the processing circuit to execute the method 100 of Figure 1 .
The solution presented herein allows for more efficient power amplification of RF signals while simultaneously reducing the distortion of the resulting amplified signals. Because the solution presented herein achieves this goal by generating a distortion compensation signal at a lower frequency, e.g., baseband, the solution presented herein achieves the desired goal without unduly increasing the cost or power consumption of the transmitter.
Various elements disclosed herein are described as or represent some kind of circuit, e.g., a transmitter, amplifier, mixer, combiner, attenuator, DCS generator, etc. Each of these circuits may be embodied in hardware, and in some cases in software (including firmware, resident software, microcode, etc.) executed on a controller or processor, including an application specific integrated circuit (ASIC).
It will be appreciated that the solution presented herein may be disposed in any device that uses power amplification to amplify an input signal, e.g., a wireless communication device. Exemplary devices include, but are not limited to, a mobile telephone, sensor, tablet, personal computer, network node (e.g., radio base station), etc.
The solution presented herein may, of course, be carried out in other ways than those specifically set forth herein without departing from essential characteristics of the solution. The present embodiments are to be considered in all respects as illustrative and not restrictive, and all changes coming within the meaning and equivalency range of the appended claims are intended to be embraced therein.
Claims
1 . A method of reducing distortion caused by a power amplifier (240) comprising separate first and second amplifiers (242, 244), the method comprising:
upconverting a low-frequency signal {Slow ) using an upconversion frequency {fmix ) to a
Radio Frequency (RF) signal {S^ );
amplifying the RF signal (S^ ) by a first gain in the first amplifier (242) to generate an amplified RF signal { S^ );
generating a low-frequency distortion compensation signal (DCS) (DCSlow ) from the low- frequency signal { Slow );
upconverting the low-frequency DCS {DCSlow ) using the upconversion frequency { fmix ) to an RF DCS (DCS^ );
amplifying the RF DCS {DCS^, )in the second amplifier (244) to generate an amplified RF DCS ( ¾. ); and combining the amplified RF signal { S^ ) and the amplified RF DCS (¾, ) to reduce
distortion in an amplified output signal (Sout ) output by the power amplifier (240).
2. The method of claim 1 wherein the low-frequency signal ( Slow ) comprises:
a baseband signal; or
an intermediate frequency signal having a frequency lower than the RF.
3. The method of claims 1 -2 wherein generating the low-frequency DCS ( DCSlow ) comprises:
linearly amplifying the low-frequency signal (Slow ) by a second gain to generate a linear amplified signal (SUn );
generating a model signal {Smoi ) from the low-frequency signal {Slow ) and the low-frequency
DCS { DCSl0W ) using a model amplifier (260); and
differentially amplifying the model signal {Smoi ) and the linear amplified signal {SUn ) such that the model signal {Smoi ) follows the linear amplified signal {SUn ) to generate the low-frequency DCS { DCSlow ).
4. The method of claim 3:
wherein the model amplifier (260) comprises separate first and second model amplifiers
(262, 264); and
wherein generating the model signal { Smoi ) comprises:
amplifying the low-frequency signal ( Slow ) by the second gain in the first model amplifier (262) to generate a first model signal ( Sml );
amplifying the low-frequency DCS ( DCSlow ) by the second gain in the second model amplifier (264) to generate a second model signal ( Sm2 ); and
combining the first and second model signals to generate the model signal { Smod ).
5. The method of claim 4 wherein linearly amplifying the low-frequency signal ( Slow ) comprises linearly amplifying the low-frequency signal ( Slow ) in a linear amplifier (250) configured to operate linearly at the second gain to generate the linear amplified signal ( Sljn ).
6. The method of claim 4 wherein linearly amplifying the low-frequency signal ( Slow ) comprises:
attenuating the low-frequency signal ( Slow ) by a first attenuation to generate an attenuated low-frequency signal; and
amplifying the attenuated low-frequency signal by the second gain in a first reference
amplifier (254) to generate the linear amplified signal { SUn );
wherein generating the model signal { Smod ) further comprises attenuating the combination of the first and second model signals by the first attenuation to generate the model signal ( Smoi ).
7. The method of claims 1 -6 wherein the low-frequency signal ( Slow )and the low-frequency DCS { DCSlow ) respectively comprise a multi-phase low-frequency signal and a multi-phase low- frequency DCS, wherein upconverting the low-frequency signal { Slow ) comprises upconverting the multi-phase low-frequency signal using a first multi-phase mixer (210) using the
upconversion frequency { fmix ), and wherein upconverting the low-frequency DCS { DCSlow ) comprises upconverting the multi-phase low-frequency DCS using a second multi-phase mixer (220) using the upconversion frequency { fmix ).
8. The method of claims 1 -6 wherein the low-frequency signal (Slow ) comprises an in-phase low-frequency signal { S _ Ilow ) and a quadrature low-frequency signal { S _ Qhw ), and wherein upconverting the low-frequency signal {Slow ) comprises upconverting the in-phase and quadrature low-frequency signals using a first multi-phase mixer (210) using the upconversion frequency (fmix ).
9. The method of claim 8 wherein generating the low-frequency DCS (DCSlow ) comprises: generating an in-phase low-frequency DCS (DCS _ Ilow ) from the in-phase low-frequency signal { S _ Ilow ); and
generating a quadrature low-frequency DCS ( DCS _ Qlow ) from the quadrature low- frequency signal ( S _ Qkm )
wherein upconverting the low-frequency DCS ( DCSlow ) comprises upconverting the in- phase and quadrature low-frequency DCSs using a second multi-phase mixer (220) separate from the first multi-phase mixer using the upconversion frequency [fmix ).
10. A wireless transmitter (200) configured to reduce distortion in an amplified output signal for transmission to a remote device, the wireless transmitter (200) comprising:
a first mixer (210) configured to upconvert a low-frequency signal { Slow ) using an
upconversion frequency { fmix ) to a Radio Frequency (RF) signal {S^ ); a distortion compensation signal (DCS) circuit (230) configured to generate a low-frequency DCS { DCSl0W ) from the low-frequency signal {Slow );
a second mixer (220) separate from the first mixer (210) and configured to upconvert the low-frequency DCS { DCSlow ) using the upconversion frequency {fmix ) to an RF DCS
( £><¾. );
a power amplifier (240) comprising:
a first amplifier circuit (242) configured to amplify the RF signal (S^ ) by a first gain to generate an amplified RF signal {S^ ); and
a second amplifier circuit (244) separate from the first amplifier (242) and configured to amplify the RF DCS (DCS^ ) in the second amplifier to generate an amplified RF DCS ( ¾ );
wherein the power amplifier (240) is configured to combine the amplified RF signal (S^, ) and the amplified RF DCS (¾, ) to reduce distortion in an amplified output signal ( Sout ) output by the power amplifier (240).
1 1 . The wireless transmitter (200) of claim 10 wherein the low-frequency signal (Slow ) comprises:
a baseband signal; or
an intermediate frequency signal having a frequency lower than the RF.
12. The wireless transmitter (200) of claims 10-1 1 wherein the DCS circuit (230) comprises: a linear amplifier (250) configured to linearly amplify the low-frequency signal { Slow ) by a second gain to generate a linear amplified signal {SUn );
a model amplifier (260) separate from the linear amplifier (250) and configured to generate a model signal {Smoi ) from the low-frequency signal {Slow ) and the low-frequency DCS ( DCSl0W ); and
a differential amplifier (270) separate from the linear and model amplifiers (250, 260) and configured to differentially amplify the model signal { Smod ) and the linear amplified signal { SUn ) such that the model signal {Smoi ) follows the linear amplified signal {SUn ) to generate the low-frequency DCS {DCSlow ).
13. The wireless transmitter (200) of claim 12 wherein the model amplifier (260) comprises: a first model amplifier (262) configured to amplify the low-frequency signal (Slow ) by the
second gain to generate a first model signal ( Sml ); and
a second model amplifier (264) separate from the first model amplifier (262) and configured to amplify the low-frequency DCS {DCSlow ) by the second gain to generate a second model signal (Sm2 );
wherein the model amplifier (264) is configured to combine the first and second model
signals to generate the model signal { Smoi ).
The wireless transmitter (200) of claim 13 wherein the linear amplifier (250) comprises first attenuator (252) configured to attenuate the low-frequency signal { Slow ) by a first attenuation to generate an attenuated low-frequency signal; and
a first reference amplifier (254) configured to amplify the attenuated low-frequency signal by the second gain to generate the linear amplified signal { SUn );
wherein the model amplifier (260) further comprises a second attenuator (266) configured to attenuate the combination of the first and second model signals by the first attenuation to generate the model signal {Smoi ).
15. The wireless transmitter (200) of claims 10-14 wherein the low-frequency signal (Slow ) and the low-frequency DCS {DCSlow ) respectively comprise a multi-phase low-frequency signal and a multi-phase low-frequency DCS, and wherein the first mixer (210) comprises a first multi- phase mixer configured to upconvert the low-frequency signal (Slow ) using the upconversion frequency {fmix ) and the second mixer (220) comprises a second multi-phase mixer configured to upconvert the low-frequency DCS {DCSlow ) using the upconversion frequency {fmix ).
16. The wireless transmitter (200) of claims 10-15 wherein the low-frequency signal (Slow ) comprises an in-phase low-frequency signal {S _ Ilow ) and a quadrature low-frequency signal
( S _ Qlow ), and wherein the first mixer (210) comprises a first multi-phase mixer configured to upconvert the in-phase and quadrature low-frequency signals using the upconversion frequency
17. The wireless transmitter (200) of claim 16 wherein the DCS circuit generates the low- frequency DCS ( DCSlow ) by:
generating an in-phase low-frequency DCS (DCS _ Ilow ) from the in-phase low-frequency signal { S _ Ilow ); and
generating a quadrature low-frequency DCS ( DCS _ Qlow ) from the quadrature low- frequency signal { S _ Qlow );
wherein the second mixer (220) comprises a second multi-phase mixer configured to
upconvert the in-phase and quadrature low-frequency DCSs using the upconversion frequency (fmix ).
18. The wireless transmitter of claims 10-17 wherein the wireless transmitter is disposed in a device comprising one of a mobile telephone and a base station.
19. A wireless communication device comprising the wireless transmitter of claims 10-17.
Priority Applications (1)
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US11689166B2 (en) | 2021-02-04 | 2023-06-27 | Analog Devices International Unlimited Company | Circuitry for reducing distortion over a wide frequency range |
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US5959500A (en) * | 1998-01-26 | 1999-09-28 | Glenayre Electronics, Inc. | Model-based adaptive feedforward amplifier linearizer |
US20040001559A1 (en) * | 2002-06-28 | 2004-01-01 | Pinckley Danny Thomas | Postdistortion amplifier with predistorted postdistortion |
EP2159914A1 (en) * | 2008-08-27 | 2010-03-03 | Roke Manor Research Limited | Linearisation device and method |
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Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
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US5959500A (en) * | 1998-01-26 | 1999-09-28 | Glenayre Electronics, Inc. | Model-based adaptive feedforward amplifier linearizer |
US20040001559A1 (en) * | 2002-06-28 | 2004-01-01 | Pinckley Danny Thomas | Postdistortion amplifier with predistorted postdistortion |
EP2159914A1 (en) * | 2008-08-27 | 2010-03-03 | Roke Manor Research Limited | Linearisation device and method |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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US11689166B2 (en) | 2021-02-04 | 2023-06-27 | Analog Devices International Unlimited Company | Circuitry for reducing distortion over a wide frequency range |
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