WO2017117985A1 - 像素电路及其驱动方法和显示装置 - Google Patents

像素电路及其驱动方法和显示装置 Download PDF

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Publication number
WO2017117985A1
WO2017117985A1 PCT/CN2016/092087 CN2016092087W WO2017117985A1 WO 2017117985 A1 WO2017117985 A1 WO 2017117985A1 CN 2016092087 W CN2016092087 W CN 2016092087W WO 2017117985 A1 WO2017117985 A1 WO 2017117985A1
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Prior art keywords
node
voltage
unit
signal end
driving
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PCT/CN2016/092087
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English (en)
French (fr)
Inventor
何小祥
祁小敬
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BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
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Priority to US15/519,673 priority Critical patent/US10192486B2/en
Publication of WO2017117985A1 publication Critical patent/WO2017117985A1/zh
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/81—Anodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0852—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor being a dynamic memory with more than one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits

Definitions

  • the present disclosure relates to a pixel circuit, a driving method thereof, and a display device.
  • the organic light-emitting diode (English name: Organic Light-Emitting Diode, OLED for short) display is one of the hotspots in the field of flat panel display research.
  • OLED display Compared with the traditional liquid crystal display (English name: Liquid Crystal Display, referred to as: LCD), OLED display has the advantages of low energy consumption, low production cost, self-illumination, wide viewing angle and fast response.
  • PDAs English full name: Personal Digital Assistant, Chinese: Pocket PC
  • digital cameras and other display fields OLED displays have begun to replace traditional liquid crystal displays.
  • Pixel driver circuit design is the core technology content of OLED display, which has important research significance. Unlike a TFT that uses a stable voltage to control brightness, an OLED display is driven by a current, so a stable current is required to control the light emission.
  • the stability of the threshold voltage of the driving transistor is very poor due to the influence of the TFT process technology.
  • the threshold voltages of different driving transistors are different, so that the driving currents flowing through different organic light emitting diodes are different, and the stability of the driving current of the OLED display is very poor.
  • the threshold voltage of the driven transistor may drift, further affecting the stability of the driving current.
  • the stability of the drive current affects the stability of the display brightness of the OLED display. Therefore, how to improve the stability of the driving current and thereby improve the uniformity of the display brightness of the display device is a problem to be solved by those skilled in the art.
  • Embodiments of the present disclosure provide a pixel circuit, a driving method thereof, and a display device for improving stability of a driving current, thereby improving uniformity of display brightness of a display device.
  • the present disclosure provides a pixel circuit including a threshold compensation unit, a driving unit, a data writing unit, a reset unit, an electroluminescent unit, and a feedback unit.
  • the threshold compensation unit is connected to the first level end, the first scan signal end, the first node, the second node, and the third node, and is configured to control the first node under the control of the voltage of the first scan signal end
  • the voltage is aligned with the voltage of the first level terminal and the voltage of the third node is aligned with the voltage of the second node under the control of the voltage of the first scan signal terminal.
  • the threshold compensation unit is further configured to generate a potential change of a voltage of the first node and a voltage of the third node, and store a voltage of the first node and a voltage of the third node.
  • the driving unit is connected to the first node, the second node, the second level end, the fourth node, and the third scan signal end, for the voltage at the first node and the third scan signal end Outputting a driving current through the fourth node under control of a voltage, or adjusting a voltage of the second node to a voltage of the first node and a threshold of the driving unit under control of a voltage of the first node The voltage difference of the voltage.
  • the data writing unit is connected to the data signal end, the second scan signal end and the third node, and is configured to compare the voltage of the third node with the data signal under the control of the voltage of the second scan signal end The voltage at the end is pulled.
  • the reset unit is connected to the second scan signal end, the third level end, and the fourth node, for controlling the voltage of the fourth node and the third power under the control of the voltage of the second scan signal end
  • the flat voltage is pulled.
  • the electroluminescent unit is connected to the fourth node and the fourth level terminal; and the driving current input through the fourth node displays a gray scale.
  • the feedback unit is connected to the third node and the fourth node, configured to store a voltage of the third node and a voltage of the fourth node, and a voltage of the third node and a voltage of the fourth node An equipotential change occurs.
  • the threshold compensation unit includes a first transistor, a second transistor, and a first capacitor.
  • the first end of the first transistor is connected to the first level end, the second end of the first transistor is connected to the first node, and the gate of the first transistor is connected to the first scan signal end.
  • the first end of the second transistor is connected to the second node, the second end of the second transistor is connected to the third node, and the gate of the second transistor is connected to the first scan signal end.
  • the first pole of the first capacitor is connected to the first node, and the second pole of the first capacitor is connected to the third node.
  • the driving unit comprises a driving transistor and a third transistor.
  • a source of the driving transistor is connected to the second level terminal, and a drain of the driving transistor is connected to the second node
  • a gate of the drive transistor is coupled to the first node.
  • the first end of the third transistor is connected to the second node, the second end of the third transistor is connected to the fourth node, and the gate of the third transistor is connected to the third scan signal end.
  • the data writing unit comprises a fourth transistor.
  • the first end of the fourth transistor is connected to the data signal end, the second end of the fourth transistor is connected to the third node, and the gate of the fourth transistor is connected to the second scan signal end.
  • the reset unit comprises a fifth transistor.
  • the first end of the fifth transistor is connected to the third level terminal, the second end of the fifth transistor is connected to the fourth node, and the gate of the fifth transistor is connected to the second scan signal end.
  • the electroluminescent unit comprises a light emitting diode.
  • An anode of the light emitting diode is connected to the fourth node, and a cathode of the light emitting diode is connected to the fourth level end.
  • the feedback unit comprises a second capacitor.
  • the first pole of the second capacitor is connected to the third node, and the second pole of the second capacitor is connected to the fourth node.
  • the present disclosure provides a driving method for driving a pixel circuit according to the first aspect of the present disclosure, comprising:
  • the threshold compensation unit aligns the voltage of the first node with the voltage of the first level terminal and the voltage of the third node with the voltage of the second node under the control of the voltage of the first scan signal end,
  • the driving unit adjusts the voltage of the second node to a voltage difference between the voltage of the first node and the threshold voltage of the driving unit under the control of the voltage of the first node, and the threshold compensation unit stores the voltage of the first node and The voltage of the third node;
  • the data writing unit aligns the voltage of the third node with the voltage of the data signal end under the control of the voltage of the second scanning signal end
  • the threshold compensation unit makes the voltage of the first node
  • the reset unit compares the voltage of the fourth node with the voltage of the third level terminal under the control of the voltage of the first scan signal end
  • the feedback unit makes the third node And the voltage of the fourth node undergoes an equipotential change
  • the driving unit outputs a driving current through the fourth node under the control of the voltage of the first node and the voltage of the third scanning signal end, and the feedback unit makes the voltage of the third node A potential change occurs with a voltage of the fourth node, the threshold compensation unit causing a potential change of a voltage of the first node and a voltage of the third node, and an electroluminescence unit is input through the fourth node
  • the drive current shows the gray scale.
  • the present disclosure provides a display device including a pixel circuit according to the first aspect of the present disclosure.
  • a pixel circuit provided by an embodiment of the present disclosure includes a threshold compensation unit, a driving unit, a data writing unit, a reset unit, an electroluminescence unit, and a feedback unit.
  • the threshold compensation unit may align the voltage of the first node with the voltage of the first level terminal.
  • the voltage of the first node may control the driving unit to adjust the voltage of the second node to a voltage difference between the voltage of the first node and the threshold voltage of the driving unit.
  • the threshold compensation unit may also align the voltage of the third node with the voltage of the second node and store the voltage of the first node and the voltage of the third node.
  • the data writing unit can pull the voltage of the third node and the voltage of the data signal terminal.
  • the reset unit can pull the voltage of the fourth node and the voltage of the third level terminal.
  • the threshold compensation unit may also cause the voltage of the first node to change with the voltage of the third node.
  • the reset unit can pull the voltage of the fourth node and the voltage of the third level terminal.
  • the feedback unit may cause the voltage of the third node to change with the voltage of the fourth node.
  • the voltage of the first node can be changed to a voltage sum obtained by adding the threshold voltage of the driving unit to the voltage difference obtained by subtracting the voltage of the third level terminal from the data signal terminal voltage, so that the driving current output by the driving unit is made.
  • the size is independent of the threshold of the drive unit, thereby eliminating the effect of the drive unit threshold voltage on the drive current. Thereby, the stability of the drive current can be improved, and the uniformity of the display brightness of the display device can be improved.
  • FIG. 1 is a schematic diagram of a structure of a pixel circuit according to an embodiment of the present disclosure
  • FIG. 2 is a circuit diagram of a pixel circuit provided by an embodiment of the present disclosure
  • FIG. 3 is a flowchart of steps of a pixel circuit driving method according to an embodiment of the present disclosure
  • FIG. 4 is a timing diagram of timing signals in a pixel circuit according to an embodiment of the present disclosure.
  • FIG. 5 is an equivalent circuit diagram of a pixel circuit in a first stage according to an embodiment of the present disclosure
  • FIG. 6 is an equivalent circuit diagram of a pixel circuit in a second stage according to an embodiment of the present disclosure
  • FIG. 7 is an equivalent circuit diagram of a pixel circuit in a third stage according to an embodiment of the present disclosure.
  • the transistors used in all embodiments of the present disclosure may be thin film transistors or field effect transistors. Or use other devices with the same characteristics.
  • the transistors employed in embodiments of the present disclosure may include a switching transistor and a driving transistor.
  • the source and drain of the transistor used here are symmetrical, so the source and drain are interchangeable.
  • one of the poles is referred to as a first end, and the other pole is referred to as a second end.
  • the middle end of the transistor is the gate, the signal input is the source, and the signal output is the drain.
  • the switching transistor may include a P-type switching transistor and an N-type switching transistor, wherein the P-type switching transistor is turned on when the gate is at a low level, and is turned off when the gate is at a high level, and the N-type The switching transistor is turned on when the gate is at a high level and turned off when the gate is at a low level.
  • the driving transistor may include a P-type driving transistor and an N-type driving transistor, wherein the P-type driving transistor has a gate voltage at a low level (a gate voltage is less than a source voltage) and an absolute value of a gate-source voltage difference is greater than a threshold value When the voltage is in an amplified state or a saturated state, and the gate voltage of the N-type driving transistor is at a high level (the gate voltage is greater than the source voltage) and the absolute value of the gate-source voltage difference is greater than the threshold voltage, it is in an amplified state or Saturated state.
  • a pixel circuit provided by an embodiment of the present disclosure includes a threshold compensation unit 11 , a driving unit 12 , a data writing unit 13 , a reset unit 14 , an electroluminescence unit 15 , and a feedback unit 16 .
  • the threshold compensation unit 11 is connected to the first level terminal V1, the first scan signal terminal S1, the first node A, the second node B, and the third node C for being first under the control of the voltage of the first scan signal terminal S1.
  • the voltage of the node A is aligned with the voltage of the first level terminal V1 and the voltage of the third node C is aligned with the voltage of the second node B.
  • the threshold compensation unit 11 is further configured to cause the voltage of the first node A to change with the voltage of the third node C and store the voltage of the first node A and the voltage of the third node C.
  • the driving unit 12 connects the first node A, the second node B, the second level terminal V2, the fourth node D, and the third scanning signal terminal S3 for the voltage at the first node A and the voltage of the third scanning signal terminal S3.
  • the driving current is output through the fourth node D under the control, or the voltage of the second node B is adjusted to the voltage difference between the voltage of the first node A and the threshold voltage of the driving unit 12 under the control of the voltage of the first node A.
  • the data writing unit 13 is connected to the data signal terminal DT, the second scanning signal terminal S2 and the third node C for controlling the voltage of the third node C and the data signal terminal DT under the control of the voltage of the second scanning signal terminal S2. The voltage is pulled.
  • the reset unit 14 is connected to the second scan signal terminal S2, the third level terminal V3, and the fourth node D for controlling the voltage of the fourth node D and the third level terminal V3 under the control of the voltage of the second scan signal terminal S2. The voltage is pulled.
  • the electroluminescent unit 15 is connected to the fourth node D and the fourth level terminal V4; the driving current for input through the fourth node D displays gray scale.
  • the feedback unit 16 is connected to the third node C and the fourth node D for storing the voltage of the third node C and the voltage of the fourth node D and causing the voltage of the third node C to change with the voltage of the fourth node D.
  • a pixel circuit provided by an embodiment of the present disclosure includes a threshold compensation unit, a driving unit, a data writing unit, a reset unit, an electroluminescence unit, and a feedback unit.
  • the threshold compensation unit may align the voltage of the first node with the voltage of the first level terminal.
  • the voltage of the first node may control the driving unit to adjust the voltage of the second node to a voltage difference between the voltage of the first node and the threshold voltage of the driving unit.
  • the threshold compensation unit may also align the voltage of the third node with the voltage of the second node and store the voltage of the first node and the voltage of the third node.
  • the data writing unit can pull the voltage of the third node and the voltage of the data signal terminal.
  • the reset unit can pull the voltage of the fourth node and the voltage of the third level terminal.
  • the threshold compensation unit may also cause the voltage of the first node to change with the voltage of the third node.
  • the reset unit can pull the voltage of the fourth node and the voltage of the third level terminal.
  • the feedback unit may cause the voltage of the third node to change with the voltage of the fourth node.
  • the voltage of the first node is changed to a voltage sum obtained by adding the voltage difference between the threshold voltage of the driving unit and the voltage of the third level terminal from the data signal terminal voltage, so that the driving current output by the driving unit is made.
  • the size is independent of the threshold of the drive unit, thereby eliminating the effect of the drive unit threshold voltage on the drive current. Thereby, the stability of the drive current can be improved, and the uniformity of the display brightness of the display device can be improved.
  • the threshold compensation unit 11 may include a first transistor T1, a second transistor T2, and a first capacitor C1.
  • the first end of the first transistor T1 is connected to the first level terminal V1
  • the second end of the first transistor T1 is connected to the first node A
  • the gate of the first transistor T1 is connected to the first scan signal terminal S1.
  • the first end of the second transistor T2 is connected to the second node B
  • the second end of the second transistor T2 is connected to the third node C
  • the gate of the second transistor T2 is connected to the first scan signal terminal S1.
  • the first pole of the first capacitor C1 is connected to the first node A
  • the second pole of the first capacitor C1 is connected to the third node C.
  • the driving unit 12 may include a driving transistor DTFT and a third transistor T3.
  • the source of the driving transistor DTFT is connected to the second level terminal V2, and the driving transistor DTFT
  • the drain is connected to the second node B, and the gate of the driving transistor DTFT is connected to the first node A.
  • the first end of the third transistor T3 is connected to the second node B, the second end of the third transistor T3 is connected to the fourth node D, and the gate of the third transistor T3 is connected to the third scan signal terminal S3.
  • the data writing unit 13 may include a fourth transistor T4.
  • the first end of the fourth transistor T4 is connected to the data signal terminal DT, the second end of the fourth transistor T4 is connected to the third node C, and the gate of the fourth transistor T4 is connected to the second scan signal terminal S2.
  • the reset unit 14 may include a fifth transistor T5.
  • the first end of the fifth transistor T5 is connected to the third level terminal V3, the second end of the fifth transistor T5 is connected to the fourth node D, and the gate of the fifth transistor T5 is connected to the second scan signal terminal S2.
  • the electroluminescent unit 15 may include a light emitting diode OLED.
  • the anode of the light emitting diode OLED is connected to the fourth node D, and the cathode of the light emitting diode OLED is connected to the fourth level terminal V4.
  • the feedback unit 16 may include a second capacitor C2.
  • the first pole of the second capacitor C2 is connected to the third node C, and the second pole of the second capacitor C2 is connected to the fourth node D.
  • FIG. 3 is a flowchart of steps of a pixel circuit driving method according to an embodiment of the present disclosure.
  • the threshold compensation unit aligns the voltage of the first node with the voltage of the first level terminal and the voltage of the third node with the control of the voltage of the first scanning signal terminal.
  • the voltage of the two nodes is pulled, and the driving unit adjusts the voltage of the second node to a voltage difference between the voltage of the first node and the threshold voltage of the driving unit under the control of the voltage of the first node, and the threshold compensation unit
  • the voltage of the first node and the voltage of the third node are stored.
  • the data writing unit pulls the voltage of the third node and the voltage of the data signal end under the control of the voltage of the second scanning signal end, and the threshold compensation unit makes the voltage of the first node and the voltage of the third node
  • the reset unit pulls the voltage of the fourth node and the voltage of the third level terminal under the control of the voltage of the first scanning signal terminal
  • the feedback unit causes the voltage of the third node to generate an equipotential with the voltage of the fourth node. Variety.
  • the driving unit outputs a driving current through the fourth node under the control of the voltage of the first node and the voltage of the third scanning signal end, and the feedback unit causes the voltage of the third node to generate an equipotential with the voltage of the fourth node.
  • the threshold compensation unit causes the voltage of the first node to change with the voltage of the third node, and the electroluminescent unit displays the gray level at the driving current input through the fourth node.
  • the voltage of the first node is aligned with the voltage of the first level terminal, and the voltage of the second node is adjusted to the voltage of the first node.
  • a voltage difference of a threshold voltage of the driving unit the voltage of the third node is aligned with the voltage of the second node, and the voltage of the first node and the voltage of the third node are stored;
  • the voltage of the third node is Straightening with the voltage of the data signal terminal, aligning the voltage of the fourth node with the voltage of the third level terminal, and then causing the equipotential change of the voltage of the third node and the voltage of the fourth node, the voltage of the first node and the third
  • the voltage of the node changes with an equal potential; during the third phase, under the control of the voltage of the first node, the driving current is output through the fourth node, and the gray scale is displayed by the electroluminescent unit.
  • the voltage of the first node is changed to a voltage sum obtained by adding the threshold voltage of the driving unit to the voltage difference obtained by subtracting the voltage of the third level terminal from the voltage of the data signal terminal, so that the output of the driving unit is output.
  • the drive current is not affected by the threshold voltage of the drive unit.
  • the pixel circuit driving method provided by the embodiment of the present disclosure can improve the stability of the driving current, thereby improving the uniformity of the display brightness of the display device.
  • the transistors in the pixel circuit may be N-type transistors, and the first level terminal V1 and the third level terminal V3 provide a reference voltage (the voltage value thereof may be according to a specific use scenario of the pixel circuit.
  • the setting is not limited herein.
  • the second level terminal V2 provides a high level
  • the fourth level terminal V4 provides a low level (for example, the fourth level terminal V4 may be a ground terminal).
  • the timing state of the first scanning signal terminal S1, the second scanning signal terminal S2, the third scanning signal terminal S3, and the data signal terminal DT in the pixel circuit in this case is as shown in FIG.
  • V 1 is the voltage of the first level terminal
  • V th is the threshold voltage of the driving transistor DTFT
  • the first capacitor C1 stores the voltages of the first node A and the third node C.
  • V 3 may be a reference voltage
  • the voltage value of V 3 may be set according to a usage scenario of the pixel circuit.
  • the illuminating voltage of the OLED in the previous frame is cleared by the voltage value of V 3 so that the reset unit in the above embodiment can avoid the influence of the illuminating voltage of the OLED in the previous frame on the brightness of the gray scale of the OLED display.
  • the current flowing through the OLED is:
  • ⁇ , C ox is the process constant
  • W is the channel width of the driving transistor DTFT
  • L is the channel length of the driving transistor DTFT
  • W and L are selectively designtable constants.
  • the drive current I oled is not affected by the threshold voltage V th of the drive transistor DTFT, but is only related to the voltages of the data signal terminal DT and the third level terminal V3. Therefore, the pixel driving circuit can output a stable driving current without being affected by the threshold voltage Vth of the driving transistor DTFT.
  • first capacitor C1 and the second capacitor C2 in the above embodiment are connected in series, and the first pole of C1 is connected to the gate of the driving transistor DTFT, the second pole of C2 is connected to the drain of the driving transistor DTFT, and the gate of the driving transistor DTFT is Floating.
  • Capacitors C1 and C2 do not have a charge and discharge path. Therefore, even if the voltage of the fourth level terminal V4 or the voltage of the light emitting diode OLED changes, the gate of the driving transistor undergoes an equipotential change, that is, the gate-source voltage difference of the driving transistor can be kept constant, thereby providing stable stability. Drive current.
  • the first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor in the above embodiments may also be P-type transistors that are turned on when the gate is at a low level. If all transistors are P-type transistors, then only the timing state of each input signal needs to be re-adjusted. It is also possible to use both N-type transistors and P-type transistors. In this case, it is necessary to ensure that transistors of the same type are used by transistors with the same timing signal or voltage control. Considering the process technology of the transistor, the active layer doping materials of different types of transistors are different, so the use of a uniform type of transistor is more advantageous for the process of the pixel circuit.
  • a further embodiment of the present disclosure provides a display device including the pixel circuit provided by any of the above embodiments.
  • the display device may be any product or component having a display function such as an electronic paper, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, or the like.
  • a pixel circuit of a display device includes a threshold compensation unit, a driving unit, a data writing unit, a reset unit, an electroluminescence unit, and a feedback unit.
  • the threshold compensation unit may align the voltage of the first node with the voltage of the first level terminal.
  • the voltage of the first node may control the driving unit to adjust the voltage of the second node to a voltage difference between the voltage of the first node and the threshold voltage of the driving unit.
  • the threshold compensation unit may also align the voltage of the third node with the voltage of the second node and store the voltage of the first node and the voltage of the third node.
  • the data writing unit can pull the voltage of the third node and the voltage of the data signal terminal.
  • the reset unit can pull the voltage of the fourth node and the voltage of the third level terminal.
  • the threshold compensation unit may also cause the voltage of the first node to change with the voltage of the third node.
  • the reset unit can pull the voltage of the fourth node and the voltage of the third level terminal.
  • the feedback unit may cause the voltage of the third node to change with the voltage of the fourth node.
  • the voltage of the first node can be changed to a voltage sum obtained by adding a threshold voltage of the driving unit to a voltage difference obtained by subtracting a voltage of the third level terminal from the data signal terminal voltage, so that the driving current output by the driving unit is obtained.
  • the size is independent of the threshold of the drive unit, thereby eliminating the effect of the drive unit threshold voltage on the drive current. Thereby, the stability of the drive current can be improved, and the uniformity of the display brightness of the display device can be improved.

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Abstract

一种像素电路及其驱动方法和显示装置，以提高驱动电流的稳定性。该像素电路包括：阈值补偿单元(11)，其将第一节点(A)与第一电平端(V1)的电压拉齐，其将第三节点(C)与第二节点(B)的电压拉齐，并使第一节点(A)的电压与第三节点(C)的电压发生等电势变化；驱动单元(12)，其输出驱动电流；数据写入单元(13)，其将第三节点(C)的电压与数据信号端(DT)的电压拉齐；复位单元(14)，其将第四节点(D)的电压与第三电平端(V3)的电压拉齐；电致发光单元(15)，其通过驱动电流显示灰阶；和反馈单元(16)，其使第三节点(C)的电压与第四节点(D)的电压发生等电势变化。

Description

像素电路及其驱动方法和显示装置 技术领域
本公开涉及一种像素电路及其驱动方法和显示装置。
背景技术
有机发光二极管(英文全称：Organic Light-Emitting Diode，简称：OLED)显示器是当今平板显示器研究领域的热点之一。与传统的液晶显示器(英文全称：Liquid Crystal Display，简称：LCD)相比，OLED显示器具有低能耗、生产成本低、自发光、宽视角及响应速度快等优点。目前，在手机、PDA(英文全称：Personal Digital Assistant，中文：掌上电脑)、数码相机等显示器领域，OLED显示器已经开始取代传统的液晶显示器。
像素驱动电路设计是OLED显示器核心技术内容，具有重要的研究意义。与利用稳定的电压来控制亮度的TFT(英文全称：Thin Film Transistor，中文：薄膜场效应晶体管)LCD不同，OLED显示器利用电流驱动，因此需要稳定的电流来控制发光。然而，由于TFT制程工艺的影响，驱动晶体管的阈值电压的稳定性非常差。在输入相同的电压时，不同驱动晶体管的阈值电压不同，使得流过不同有机发光二极管的驱动电流不同，进而导致OLED显示器的驱动电流的稳定性非常差。同时，随着驱动晶体管的使用时间的增加，驱动的晶体管的阈值电压会产生漂移，进一步影响驱动电流的稳定性。驱动电流的稳定性会影响OLED显示器的显示亮度的稳定性。因此，如何提高驱动电流的稳定性，进而提高显示装置的显示亮度的均匀性，是本领域技术人员亟待解决的一个问题。
发明内容
本公开的实施例提供一种像素电路及其驱动方法和显示装置，用于提高驱动电流的稳定性，进而提高显示装置的显示亮度的均匀性。
第一方面，本公开提供一种像素电路，其包括阈值补偿单元、驱动单元、数据写入单元、复位单元、电致发光单元和反馈单元。
所述阈值补偿单元连接第一电平端、第一扫描信号端、第一节点、第二节点以及第三节点，用于在所述第一扫描信号端的电压的控制下将所述第一节点的电压与所述第一电平端的电压拉齐以及在所述第一扫描信号端的电压的控制下将所述第三节点的电压与所述第二节点的电压拉齐。所述阈值补偿单元还用于使所述第一节点的电压与所述第三节点的电压发生等电势变化以及存储所述第一节点的电压和所述第三节点的电压。
所述驱动单元连接所述第一节点、所述第二节点、第二电平端、第四节点和第三扫描信号端，用于在所述第一节点的电压和所述第三扫描信号端的电压的控制下通过所述第四节点输出驱动电流，或者在所述第一节点的电压的控制下将所述第二节点的电压调节为所述第一节点的电压与所述驱动单元的阈值电压的电压差。
所述数据写入单元连接数据信号端、第二扫描信号端和所述第三节点，用于在所述第二扫描信号端的电压的控制下将所述第三节点的电压与所述数据信号端的电压拉齐。
所述复位单元连接所述第二扫描信号端、第三电平端以及第四节点，用于在所述第二扫描信号端的电压的控制下将所述第四节点的电压与所述第三电平端的电压拉齐。
所述电致发光单元连接所述第四节点和第四电平端；用于通过所述第四节点输入的驱动电流显示灰阶。
所述反馈单元连接所述第三节点和第四节点，用于存储所述第三节点的电压和所述第四节点的电压以及使所述第三节点的电压所述与第四节点的电压发生等电势变化。
可选地，所述阈值补偿单元包括第一晶体管、第二晶体管和第一电容。
所述第一晶体管的第一端连接所述第一电平端，所述第一晶体管的第二端连接所述第一节点，所述第一晶体管的栅极连接所述第一扫描信号端。所述第二晶体管的第一端连接所述第二节点，所述第二晶体管的第二端连接所述第三节点，所述第二晶体管的栅极连接所述第一扫描信号端。所述第一电容的第一极连接所述第一节点，所述第一电容的第二极连接所述第三节点。
可选地，所述驱动单元包括驱动晶体管和第三晶体管。所述驱动晶体管的源极连接所述第二电平端，所述驱动晶体管的漏极连接所述第二节点，所 述驱动晶体管的栅极连接所述第一节点。所述第三晶体管的第一端连接所述第二节点，所述第三晶体管的第二端连接所述第四节点，所述第三晶体管的栅极连接所述第三扫描信号端。
可选地，所述数据写入单元包括第四晶体管。所述第四晶体管的第一端连接所述数据信号端，所述第四晶体管的第二端连接所述第三节点，所述第四晶体管的栅极连接所述第二扫描信号端。
可选地，所述复位单元包括第五晶体管。所述第五晶体管的第一端连接所述第三电平端，所述第五晶体管的第二端连接所述第四节点，所述第五晶体管的栅极连接所述第二扫描信号端。
可选地，所述电致发光单元包括发光二极管。所述发光二极管的阳极连接所述第四节点，所述发光二极管的阴极连接所述第四电平端。
可选地，所述反馈单元包括第二电容。所述第二电容的第一极连接所述第三节点，所述第二电容的第二极连接所述第四节点。
第二方面，本公开提供一种用于驱动根据本公开的第一方面的像素电路的驱动方法，其包括：
第一阶段，其中，阈值补偿单元在第一扫描信号端的电压的控制下将第一节点的电压与第一电平端的电压拉齐以及将第三节点的电压与第二节点的电压拉齐，驱动单元在所述第一节点的电压的控制下将第二节点的电压调节为第一节点的电压与驱动单元的阈值电压的电压差，所述阈值补偿单元存储所述第一节点的电压和所述第三节点的电压；
第二阶段，其中，数据写入单元在第二扫描信号端的电压的控制下将所述第三节点的电压与数据信号端的电压拉齐，所述阈值补偿单元使所述第一节点的电压与所述第三节点的电压发生等电势变化，复位单元在所述第一扫描信号端的电压的控制下将第四节点的电压与第三电平端的电压拉齐，反馈单元使所述第三节点的电压与所述第四节点的电压发生等电势变化；以及
第三阶段，其中，所述驱动单元在所述第一节点的电压和第三扫描信号端的电压的控制下通过第四节点输出驱动电流，所述反馈单元使所述第三节点的电压所述与第四节点的电压发生等电势变化，所述阈值补偿单元使所述第一节点的电压与所述第三节点的电压发生等电势变化，电致发光单元在通过所述第四节点输入的驱动电流显示灰阶。
第三方面，本公开提供一种显示装置，其包括根据本公开的第一方面的像素电路。
本公开的实施例提供的像素电路包括阈值补偿单元、驱动单元、数据写入单元、复位单元、电致发光单元和反馈单元。阈值补偿单元可以将第一节点的电压与第一电平端的电压拉齐。第一节点的电压可以控制驱动单元将第二节点的电压调节为第一节点的电压与驱动单元的阈值电压的电压差。阈值补偿单元还可以将第三节点的电压与第二节点的电压拉齐，并存储第一节点的电压与第三节点的电压。数据写入单元可以将第三节点的电压与数据信号端的电压拉齐。复位单元可以将第四节点的电压与第三电平端的电压拉齐。阈值补偿单元还可以使第一节点的电压与第三节点的电压发生等电势变化。复位单元可以将第四节点的电压与第三电平端的电压拉齐。反馈单元可以使第三节点的电压与第四节点的电压发生等电势变化。由此，第一节点的电压可以变化为将驱动单元阈值电压与从数据信号端电压减去第三电平端的电压所得到的电压差相加的得到的电压和，使得驱动单元输出的驱动电流大小与驱动单元的阈值无关，从而消除驱动单元阈值电压对驱动电流的影响。由此，可以提高驱动电流的稳定性，进而可以提高显示装置的显示亮度的均匀性。
附图说明
图1为本公开的实施例提供的像素电路的结构的示意图；
图2为本公开的实施例提供的像素电路的电路图；
图3为本公开的实施例提供的像素电路驱动方法的步骤的流程图；
图4为本公开的实施例提供的像素电路中时序信号的时序图；
图5为本公开的实施例提供的第一阶段时像素电路的等效电路图；
图6为本公开的实施例提供的第二阶段时像素电路的等效电路图；
图7为本公开的实施例提供的第三阶段时像素电路的等效电路图。
具体实施方式
下面将结合附图，对本公开实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本公开的一部分实施例，而不是全部的实施例。
本公开所有实施例中采用的晶体管可以为薄膜晶体管或场效应晶体管， 或者使用其他特性相同的器件。根据在电路中的作用的不同，本公开的实施例所采用的晶体管可以包括开关晶体管和驱动晶体管。
这里所采用的晶体管的源极、漏极是对称的，所以其源极、漏极是可以互换的。在本公开实施例中，为了区分晶体管的除栅极之外的两极，将其中一极称为第一端，另一极称为第二端。例如，晶体管的中间端为栅极，信号输入端为源极，信号输出端为漏极。
此外，在本公开的实施例中，开关晶体管可以包括P型开关晶体管和N型开关晶体管，其中，P型开关晶体管在栅极为低电平时导通，在栅极为高电平时截止，而N型开关晶体管为在栅极为高电平时导通，在栅极为低电平时截止。驱动晶体管可以包括P型驱动晶体管和N型驱动晶体管，其中，P型驱动晶体管在栅极电压为低电平(栅极电压小于源极电压)且栅极源极的压差的绝对值大于阈值电压时处于放大状态或饱和状态，而N型驱动晶体管的栅极电压为高电平(栅极电压大于源极电压)且栅极源极的压差的绝对值大于阈值电压时处于放大状态或饱和状态。
如图1所示，本公开的实施例提供的像素电路包括阈值补偿单元11、驱动单元12、数据写入单元13、复位单元14、电致发光单元15和反馈单元16。
阈值补偿单元11连接第一电平端V1、第一扫描信号端S1、第一节点A、第二节点B以及第三节点C，用于在第一扫描信号端S1的电压的控制下将第一节点A的电压与第一电平端V1的电压拉齐以及将第三节点C的电压与第二节点B的电压拉齐。阈值补偿单元11还用于使第一节点A的电压与第三节点C的电压发生等电势变化以及存储第一节点A的电压和第三节点C的电压。
驱动单元12连接第一节点A、第二节点B、第二电平端V2、第四节点D和第三扫描信号端S3，用于在第一节点A的电压和第三扫描信号端S3的电压的控制下通过第四节点D输出驱动电流，或者在第一节点A的电压的控制下将第二节点B的电压调节为第一节点A的电压与驱动单元12的阈值电压的电压差。
数据写入单元13连接数据信号端DT、第二扫描信号端S2和第三节点C，用于在第二扫描信号端S2的电压的控制下将第三节点C的电压与数据信号端DT的电压拉齐。
复位单元14连接第二扫描信号端S2、第三电平端V3以及第四节点D，用于在第二扫描信号端S2的电压的控制下将第四节点D的电压与第三电平端V3的电压拉齐。
电致发光单元15连接第四节点D和第四电平端V4；用于通过第四节点D输入的驱动电流显示灰阶。
反馈单元16连接第三节点C和第四节点D，用于存储第三节点C的电压和第四节点D的电压以及使第三节点C的电压与第四节点D的电压发生等电势变化。
本公开的实施例提供的像素电路包括阈值补偿单元、驱动单元、数据写入单元、复位单元、电致发光单元和反馈单元。阈值补偿单元可以将第一节点的电压与第一电平端的电压拉齐。第一节点的电压可以控制驱动单元将第二节点的电压调节为第一节点的电压与驱动单元的阈值电压的电压差。阈值补偿单元还可以将第三节点的电压与第二节点的电压拉齐，并存储第一节点的电压与第三节点的电压。数据写入单元可以将第三节点的电压与数据信号端的电压拉齐。复位单元可以将第四节点的电压与第三电平端的电压拉齐。阈值补偿单元还可以使第一节点的电压与第三节点的电压发生等电势变化。复位单元可以将第四节点的电压与第三电平端的电压拉齐。反馈单元可以使第三节点的电压与第四节点的电压发生等电势变化。由此，第一节点的电压会变化为将驱动单元阈值电压与从数据信号端电压减去第三电平端的电压所得到的电压差相加所得到的电压和，使得驱动单元输出的驱动电流大小与驱动单元的阈值无关，从而消除驱动单元阈值电压对驱动电流的影响。由此，可以提高驱动电流的稳定性，进而可以提高显示装置的显示亮度的均匀性。
可选地，如图2所示，阈值补偿单元11可以包括第一晶体管T1、第二晶体管T2和第一电容C1。第一晶体管T1的第一端连接第一电平端V1，第一晶体管T1的第二端连接第一节点A，第一晶体管T1的栅极连接第一扫描信号端S1。第二晶体管T2的第一端连接第二节点B，第二晶体管T2的第二端连接第三节点C，第二晶体管T2的栅极连接第一扫描信号端S1。第一电容C1的第一极连接第一节点A，第一电容C1的第二极连接第三节点C。
可选地，如图2所示，驱动单元12可以包括驱动晶体管DTFT和第三晶体管T3。驱动晶体管DTFT的源极连接第二电平端V2，驱动晶体管DTFT 的漏极连接第二节点B，驱动晶体管DTFT的栅极连接第一节点A。第三晶体管T3的第一端连接第二节点B，第三晶体管T3的第二端连接第四节点D，第三晶体管T3的栅极连接第三扫描信号端S3。
可选地，如图2所示，数据写入单元13可以包括第四晶体管T4。第四晶体管T4的第一端连接数据信号端DT，第四晶体管T4的第二端连接第三节点C，第四晶体管T4的栅极连接第二扫描信号端S2。
可选地，如图2所示，复位单元14可以包括第五晶体管T5。第五晶体管T5的第一端连接第三电平端V3，第五晶体管T5的第二端连接第四节点D，第五晶体管T5的栅极连接第二扫描信号端S2。
可选地，如图2所示，电致发光单元15可以包括发光二极管OLED。发光二极管OLED的阳极连接第四节点D，发光二极管OLED的阴极连接第四电平端V4。
可选地，如图2所示，反馈单元16可以包括第二电容C2。第二电容C2的第一极连接第三节点C，第二电容C2的第二极连接第四节点D。
图3为本公开的实施例提供的像素电路驱动方法的步骤的流程图。
如图3所示，在第一阶段S301中，阈值补偿单元在第一扫描信号端的电压的控制下将第一节点的电压与第一电平端的电压拉齐以及将第三节点的电压与第二节点的电压拉齐，驱动单元在第一节点的电压的控制下将所述第二节点的电压调节为所述第一节点的电压与所述驱动单元的阈值电压的电压差，阈值补偿单元存储第一节点的电压和第三节点的电压。
在第二阶段S302中，数据写入单元在第二扫描信号端的电压的控制下将第三节点的电压与数据信号端的电压拉齐，阈值补偿单元使第一节点的电压与第三节点的电压发生等电势变化，复位单元在第一扫描信号端的电压的控制下将第四节点的电压与第三电平端的电压拉齐，反馈单元使第三节点的电压与第四节点的电压发生等电势变化。
在第三阶段S303中，驱动单元在第一节点的电压和第三扫描信号端的电压的控制下通过第四节点输出驱动电流，反馈单元使第三节点的电压与第四节点的电压发生等电势变化，阈值补偿单元使第一节点的电压与第三节点的电压发生等电势变化，电致发光单元在通过第四节点输入的驱动电流显示灰阶。
通过本公开的实施例提供的像素电路的驱动方法，在第一阶段期间，将第一节点的电压与第一电平端的电压拉齐，将第二节点的电压调节为第一节点的电压与驱动单元的阈值电压的电压差，将第三节点的电压与第二节点的电压拉齐，并存储第一节点的电压和第三节点的电压；在第二阶段期间，将第三节点的电压与数据信号端的电压拉齐，将第四节点的电压与第三电平端的电压拉齐，然后使第三节点的电压与第四节点的电压发生等电势变化、第一节点的电压与第三节点的电压发生等电势变化；在第三阶段期间，在第一节点的电压的控制下，通过第四节点输出驱动电流，并通过电致发光单元显示灰阶。在第三阶段期间，第一节点的电压会变化为将驱动单元阈值电压与从数据信号端电压减去第三电平端电压所得到的电压差相加所得到的电压和，使得驱动单元输出的驱动电流不受驱动单元的阈值电压的影响。本公开的实施例提供的像素电路驱动方法可以提高驱动电流的稳定性，进而可以提高显示装置的显示亮度的均匀性。
返回到图2，在一个实施例中，像素电路中的晶体管可以均为N型晶体管，并且第一电平端V1和第三电平端V3提供基准电压(其电压值可以根据像素电路的具体使用场景设定，本文对此不做限定)，第二电平端V2提供高电平，第四电平端V4提供低电平(例如，第四电平端V4可以为接地端)。在此情况下的像素电路中的第一扫描信号端S1、第二扫描信号端S2、第三扫描信号端S3以及数据信号端DT的时序状态如图4所示。
如图4所示，在第一阶段t1期间，S1为高电平，S2、S3为低电平。因此，T1、T2导通，其余开关晶体管截止。此时的等效电路图如图5所示。
在此阶段中，第一节点A点的电压VA＝V1，并且由于第一节点A点的电压的控制，第二节点B以及第三节点C的电压VB＝VC＝V1-Vth，其中，V1为第一电平端的电压，Vth为驱动晶体管DTFT的阈值电压，第一电容C1存储第一节点A和第三节点C的电压。
在第二阶段t2期间，S1、S3为低电平，S2为高电平，数据信号端DT输入数据信号。因此，T4、T5导通，其余开关晶体管截止。此时的等效电路图如图6所示。
在此阶段中，T4晶体管导通，数据信号端DT向C点输入数据信号，第三节点C的电压Vc＝Vdt。由于在t1阶段中第一节点A的电压VA＝V1并且第 三节点C点电压Vc＝V1-Vth，并且在该t2阶段中T1截止并且第一节点A浮接，所以第一电容C1第一极连接的A点的电压与第一电容C1第二极连接的C点的电压发生等电势变化。第一节点A点的电压变化为VA＝Vdt+Vth，其中Vdt为数据信号端DT的电压。此外，由于T5导通，所以发光二极管OLED的电压Voled＝V3(其中V3为第三电平端的电压)，清除了上一帧时OLED的发光电压，电容C1存储第一节点A和第三节点C的电压。示例性地，V3可以为基准电压，V3的电压值可以根据像素电路的使用场景来设定。通过V3的电压值将上一帧时的OLED的发光电压清除使得上述实施例中的复位单元可以避免上一帧时的OLED的发光电压对OLED显示灰阶的亮度造成影响。
在第三阶段t3期间，S1、S2为低电平，S3为高电平。因此，T3导通，其余开关晶体管截止。此时的等效电路图如图7所示。驱动晶体管输出驱动电流，OLED通过驱动电流显示灰阶。
由于在本公开的实施例中的晶体管均为N型晶体管，所以驱动晶体管DTFT的栅源电压差Vgs＝VA-Voled＝Vdt+Vth-V3。
根据饱和电流公式，流过OLED的电流为：
Ioled＝K(Vgs-Vth)2
＝K[Vdt+Vth-V3-Vth]2
＝K(Vdt-V3)2
其中，
Figure PCTCN2016092087-appb-000001
μ、Cox为工艺常数，W为驱动晶体管DTFT的沟道宽度，L为驱动晶体管DTFT的沟道长度，W、L为可选择性设计的常数。
由此，驱动电流Ioled不受驱动晶体管DTFT阈值电压Vth的影响，而是只与数据信号端DT和第三电平端V3的电压有关。因此，像素驱动电路可以不受驱动晶体管DTFT阈值电压Vth的影响，输出稳定的驱动电流。
此外，上述实施例中的第一电容C1和第二电容C2串联，且C1第一极连接驱动晶体管DTFT的栅极，C2第二极连接驱动晶体管DTFT的漏极，且驱动晶体管DTFT的栅极浮接。电容C1、C2没有充放电路径。因此，即使第四电平端V4的电压或发光二极管OLED的电压发生变化，驱动晶体管的栅极也会发生等电势变化，即，驱动晶体管的栅源电压差可以保持恒定，由此可以提供稳定的驱动电流。
需要说明的是，上述实施例中的第一晶体管、第二晶体管、第三晶体管、第四晶体管以及第五晶体管也可以均为栅极低电平时导通的P型晶体管。若所有晶体管均为P型晶体管，则只需要重新调整各个输入信号的时序状态即可。也可以同时采用N型晶体管和P型晶体管，此时需保证通过同一个时序信号或电压控制的晶体管采用相同类型的晶体管。考虑到晶体管的制程工艺，不同类型的晶体管的有源层掺杂材料不相同，因此采用统一类型的晶体管更有利于像素电路的制程工艺。
本公开再一实施例提供一种显示装置，其包括上述任一实施例提供的像素电路。例如，显示装置可以为电子纸、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
本公开实施例提供的显示装置的像素电路包括阈值补偿单元、驱动单元、数据写入单元、复位单元、电致发光单元和反馈单元。阈值补偿单元可以将第一节点的电压与第一电平端的电压拉齐。第一节点的电压可以控制驱动单元将第二节点的电压调节为第一节点的电压与驱动单元的阈值电压的电压差。阈值补偿单元还可以将第三节点的电压与第二节点的电压拉齐，并存储第一节点的电压与第三节点的电压。数据写入单元可以将第三节点的电压与数据信号端的电压拉齐。复位单元可以将第四节点的电压与第三电平端的电压拉齐。阈值补偿单元还可以使第一节点的电压与第三节点的电压发生等电势变化。复位单元可以将第四节点的电压与第三电平端的电压拉齐。反馈单元可以使第三节点的电压与第四节点的电压发生等电势变化。由此，第一节点的电压可以变化为将驱动单元阈值电压与从数据信号端电压减去第三电平端的电压所得到的电压差相加所得到的电压和，使得驱动单元输出的驱动电流大小与驱动单元的阈值无关，从而消除驱动单元阈值电压对驱动电流的影响。由此，可以提高驱动电流的稳定性，进而可以提高显示装置的显示亮度的均匀性。
以上描述了本公开的一些实施例。但是，本公开的保护范围并不局限于此。本技术领域的技术人员在本公开揭露的范围内可轻易想到的变化或替换，都应涵盖在本公开的范围之内。因此，本公开的范围应以权利要求的保护范围为准。
本申请要求于2016年1月4日递交的中国专利申请第201610004113.8 号的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。

Claims (9)

  1. 一种像素电路，包括：
    阈值补偿单元，其连接第一电平端、第一扫描信号端、第一节点、第二节点以及第三节点，用于在所述第一扫描信号端的电压的控制下将所述第一节点的电压与所述第一电平端的电压拉齐以及将所述第三节点的电压与所述第二节点的电压拉齐，还用于使所述第一节点的电压与所述第三节点的电压发生等电势变化以及存储所述第一节点的电压和所述第三节点的电压；
    驱动单元，其连接所述第一节点、所述第二节点、第二电平端、第四节点和第三扫描信号端，用于在所述第一节点的电压和所述第三扫描信号端的电压的控制下通过所述第四节点输出驱动电流，或者在所述第一节点的电压的控制下将所述第二节点的电压调节为所述第一节点的电压与所述驱动单元的阈值电压的电压差；
    数据写入单元，其连接数据信号端、第二扫描信号端和所述第三节点，用于在所述第二扫描信号端的电压的控制下将所述第三节点的电压与所述数据信号端的电压拉齐；
    复位单元，其连接所述第二扫描信号端、第三电平端以及第四节点，用于在所述第二扫描信号端的电压的控制下将所述第四节点的电压与所述第三电平端的电压拉齐；
    电致发光单元，其连接所述第四节点和第四电平端，用于通过所述第四节点输入的驱动电流显示灰阶；以及
    反馈单元，其连接所述第三节点和第四节点，用于存储所述第三节点的电压和所述第四节点的电压以及使所述第三节点的电压所述与第四节点的电压发生等电势变化。
  2. 根据权利要求1所述的像素电路，其中，所述阈值补偿单元包括：
    第一晶体管，其第一端连接所述第一电平端，其第二端连接所述第一节点，并且其栅极连接所述第一扫描信号端；
    第二晶体管，其第一端连接所述第二节点，其第二端连接所述第三节点，并且其栅极连接所述第一扫描信号端；以及
    第一电容，其第一极连接所述第一节点，并且其第二极连接所述第三节 点。
  3. 根据权利要求1所述的像素电路，其中，所述驱动单元包括：
    驱动晶体管，其源极连接所述第二电平端，其漏极连接所述第二节点，并且其栅极连接所述第一节点；
    第三晶体管，其第一端连接所述第二节点，其第二端连接所述第四节点，并且其栅极连接所述第三扫描信号端。
  4. 根据权利要求1所述的像素电路，其中，所述数据写入单元包括：
    第四晶体管，其第一端连接所述数据信号端，其第二端连接所述第三节点，并且其栅极连接所述第二扫描信号端。
  5. 根据权利要求1所述的像素电路，其中，所述复位单元包括：
    第五晶体管，其第一端连接所述第三电平端，其第二端连接所述第四节点，并且其栅极连接所述第二扫描信号端。
  6. 根据权利要求1所述的像素电路，其中，所述电致发光单元包括：
    发光二极管，其阳极连接所述第四节点，并且其阴极连接所述第四电平端。
  7. 根据权利要求1所述的像素电路，其中，所述反馈单元包括：
    第二电容，其第一极连接所述第三节点，并且其第二极连接所述第四节点。
  8. 一种驱动根据权利要求1-7中的任一项所述的像素电路的驱动方法，包括：
    第一阶段，其中，阈值补偿单元在第一扫描信号端的电压的控制下将第一节点的电压与第一电平端的电压拉齐以及将第三节点的电压与第二节点的电压拉齐，驱动单元在所述第一节点的电压的控制下将所述第二节点的电压调节为所述第一节点的电压与所述驱动单元的阈值电压的电压差，所述阈值补偿单元存储所述第一节点的电压和所述第三节点的电压；
    第二阶段，其中，数据写入单元在第二扫描信号端的电压的控制下将所述第三节点的电压与数据信号端的电压拉齐，所述阈值补偿单元使所述第一节点的电压与所述第三节点的电压发生等电势变化，复位单元在所述第一扫描信号端的电压的控制下将第四节点的电压与第三电平端的电压拉齐，反馈单元使所述第三节点的电压与所述第四节点的电压发生等电势变化；以及
    第三阶段，其中，所述驱动单元在所述第一节点的电压和第三扫描信号端的电压的控制下通过第四节点输出驱动电流，所述反馈单元使所述第三节点的电压所述与第四节点的电压发生等电势变化，所述阈值补偿单元使所述第一节点的电压与所述第三节点的电压发生等电势变化，电致发光单元在通过所述第四节点输入的驱动电流显示灰阶。
  9. 一种显示装置，包括根据权利要求1-7中的任一项所述的像素电路。
PCT/CN2016/092087 2016-01-04 2016-07-28 像素电路及其驱动方法和显示装置 Ceased WO2017117985A1 (zh)

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