WO2017095408A1 - Circuit de verrouillage pour convertisseur de puissance - Google Patents

Circuit de verrouillage pour convertisseur de puissance Download PDF

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Publication number
WO2017095408A1
WO2017095408A1 PCT/US2015/063523 US2015063523W WO2017095408A1 WO 2017095408 A1 WO2017095408 A1 WO 2017095408A1 US 2015063523 W US2015063523 W US 2015063523W WO 2017095408 A1 WO2017095408 A1 WO 2017095408A1
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WO
WIPO (PCT)
Prior art keywords
clamp
switch
coupled
power switch
circuit
Prior art date
Application number
PCT/US2015/063523
Other languages
English (en)
Inventor
Arthur B. Odell
Original Assignee
Power Integrations, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Power Integrations, Inc. filed Critical Power Integrations, Inc.
Priority to PCT/US2015/063523 priority Critical patent/WO2017095408A1/fr
Publication of WO2017095408A1 publication Critical patent/WO2017095408A1/fr

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H02M1/34—Snubber circuits
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0009—Devices or circuits for detecting current in a converter
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H02M1/34—Snubber circuits
    • H02M1/342—Active non-dissipative snubbers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the present invention relates generally to switched mode power converters, and more specifically to power converters coupled in a flyback topology.
  • Switched mode power converters are commonly used due to their high efficiency, small size and low weight to power many of today's electronics.
  • Conventional wall sockets provide a high voltage alternating current.
  • ac high voltage alternating current
  • dc direct current
  • the switched mode power converter control circuit usually provides output regulation by sensing one or more inputs representative of one or more output quantities and controlling the output in a closed loop.
  • a switch is utilized to provide the desired output by varying the duty cycle (typically the ratio of the on time of the switch to the total switching period), varying the switching frequency, or varying the number of pulses per unit time of the switch in a switched mode power converter.
  • the duty cycle typically the ratio of the on time of the switch to the total switching period
  • the switching frequency typically the switching frequency
  • the number of pulses per unit time of the switch in a switched mode power converter typically the ratio of the on time of the switch to the total switching period
  • Switched mode power converters may include a clamp circuit coupled across a primary winding to prevent damage to the switch.
  • the clamp circuit includes passive components, such as diodes, resistors or capacitors.
  • a passive component may store or maintain energy in the form of voltage or current.
  • An active component may produce energy in the form of a voltage or current.
  • One example of an active component may be a transistor.
  • FIG. 1A is a functional block diagram of an example power converter and controller for controlling an active clamp circuit, in accordance with an embodiment of the disclosure.
  • FIG. IB is a diagram illustrating example waveforms of a current through a power switch, in accordance with an embodiment of the disclosure.
  • FIG. 2 is a timing diagram illustrating example waveforms of various voltages, currents, and control signals of FIG. 1A, in accordance with an embodiment of the disclosure.
  • FIG. 3 is a functional block diagram of an example controller of FIG. 1 A for controlling an active clamp circuit, in accordance with an embodiment of the disclosure.
  • clamp circuits may be used to prevent damage to components of the power converter.
  • Clamp circuits are typically coupled across the primary winding of a power converter and may limit the amount of voltage across the primary winding when the power switch of the power converter is OFF.
  • the clamp circuit includes passive components but may also include active components, such as a transistor, to control when the clamp circuit is enabled.
  • a clamp circuit that uses an active component, such as a transistor, may be referred to as an active clamp circuit.
  • Active clamp circuits may also be used to reduce losses experienced by the power converter.
  • Typical losses experienced in a power converter are conduction losses and switching losses.
  • Conduction losses and switching losses occur due to the electrical resistance in the circuit and the parasitic capacitance that is switched by the power converter, particularly when the power switch is a transistor.
  • the resistance of the circuit along with the current passing in the circuit generates conduction loss.
  • Switching losses are generally associated with the losses, which occur while the power switch of the power converter is transitioning between an ON state and an OFF state or vice versa. In one example, a switch that is ON (or closed) may conduct current while a switch that is OFF (or open) cannot conduct current.
  • an active clamp circuit may be used to reduce the switching losses through the use of zero voltage switching techniques. Similar to a passive clamp circuit, an active clamp circuit is coupled across the primary winding of a power converter and includes a switch (such as a transistor) to enable current flow through the active clamp circuit.
  • Typical active clamp circuits enable current flow through the active clamp for the entirety of the OFF time of the power switch.
  • the active clamp circuit facilitates the discharge of the parasitic capacitance associated with the power switch and the voltage across the power switch falls to substantially zero prior to the power switch turning ON and as such switching losses may be reduced.
  • flyback converter One topology for a switched mode power converter is known as a flyback converter.
  • the flyback converter can provide low output currents at low component cost and is relatively simple in comparison to other converter topologies.
  • the flyback converter may also utilize an active clamp circuit to prevent excess voltage from damaging components within the flyback converter.
  • flyback converters may be limited at higher output power ranges and use at higher switching frequencies due to leakage inductance related losses and switching losses.
  • An active clamp circuit may also be used with a flyback converter, however, typical active clamp circuits (where the clamp switch is ON when the power switch of the power converter is OFF) could result in current ringing and an increase in the RMS current.
  • the current ringing and increased RMS current generally translates to a larger output capacitor used for the flyback converter, which would increase cost for the power converter.
  • previous active clamp circuits may not work well with flyback converters.
  • Examples in accordance with teachings of the present invention includes a clamp control circuit that controls an active clamp circuit such that current flows through the active clamp circuit during portions of the OFF time of the power switch.
  • the current through the active clamp circuit is substantially equal to zero for a portion of the OFF time of the power switch.
  • the clamp switch is not turned ON until near the end of the OFF time of the power switch.
  • the active clamp circuit includes a capacitance and a clamp switch.
  • the clamp switch may be exemplified as a transistor that has an associated anti-parallel diode.
  • the anti-parallel diode of the clamp switch conducts a charge associated with the leakage inductance of the power converter is transferred to the clamp capacitance and stored.
  • the anti-parallel diode stops conducting substantially when the net charge associated with leakage inductance of the power converter has been transferred.
  • the clamp switch remains OFF until near the end of the OFF time of the power switch. Once it is determined that the power switch should turn ON, the clamp switch is turned on for a first duration of time. The transistor of the clamp switch is turned on such that the net charge previously transferred to the clamp capacitance associated with the leakage inductance is transferred to the primary winding.
  • the length of the first duration time which the transistor of the clamp switch is ON.
  • the net charge to be transferred is substantially the same as the net charge previously transferred to the clamp capacitance associated with the leakage inductance through the anti-parallel diode.
  • a shorter first duration corresponds to a larger voltage on the power switch. Too large of a voltage may damage the power switch.
  • the longer the first duration the higher the root-mean- square (RMS) current experienced by the power converter.
  • the first duration of time may be substantially equal to the duration of time that the anti-parallel diode conducts the net charge previously transferred to the clamp capacitance associated with the leakage inductance.
  • Examples in accordance with teachings of the present invention include a clamp control circuit coupled to receive an enable signal that indicates when the power switch is going to be turned ON. In response to the enable signal, the clamp control circuit turns ON the clamp switch for a first duration. Once the clamp switch turns OFF, the power switch turns ON after a second duration delay has elapsed.
  • a power converter in accordance with the teachings of the present invention includes an energy transfer element coupled between an input of the power converter and an output of the power converter.
  • a power switch is coupled to the energy transfer element, and an active clamp circuit is coupled to the energy transfer element and the power switch.
  • a controller is coupled to the active clamp circuit and the power switch to control switching a clamp switch in the active clamp circuit, as well as the power switch.
  • the controller includes a regulation control circuit coupled to generate a drive signal in response to a feedback signal representative of the output of the power converter to control switching of the power switch.
  • the switching of the power switch controls a transfer of energy from the input of the power converter through the energy transfer element to the output of power converter.
  • the regulation circuit includes an enable circuit that is coupled to generate the enable signal in response to the feedback signal.
  • a clamp control circuit is coupled to generate a clamp drive signal in response to the enable signal from the regulation control circuit to control switching of the clamp switch included in the active clamp circuit, wherein the clamp drive signal is coupled to turn on the clamp switch for a first duration near an end of an off time of the power switch to inject charge stored in the active clamp circuit into the energy transfer element to discharge a parasitic capacitance of the power switch into the energy transfer element before the power switch is turned on in response to the drive signal.
  • FIG. 1A shows a functional block diagram of an example power converter 100 is including an example active clamp circuit 104 and controller 122 in accordance with the teachings of the present invention.
  • the illustrated example of the power converter 100 includes an energy transfer element 106, a primary winding 108 of the energy transfer element 106, a secondary winding 110 of the energy transfer element 106, a power switch SI 112, an input return 111, an active clamp circuit 104, an output rectifier Dl 114 (also referred to as an output diode Dl), an output capacitor C2 116, an output return 117, a sense circuit 120, a controller 122, and a driver circuit 166.
  • an energy transfer element 106 includes an energy transfer element 106, a primary winding 108 of the energy transfer element 106, a secondary winding 110 of the energy transfer element 106, a power switch SI 112, an input return 111, an active clamp circuit 104, an output rectifier Dl 114 (also referred to as an output diode Dl), an output capacitor
  • the active clamp circuit 104 is shown including a clamp capacitance CI 128 and a clamp switch 130 (represented as a transistor with an associated anti- parallel diode).
  • Controller 122 is shown as including a regulation control circuit 124 and a clamp control circuit 126. Further illustrated is an uncoupled inductor L LK 132, which may represent the leakage inductance associated with the energy transfer element 106 or a discrete inductor.
  • a capacitance Cp 133 is shown to represent all the capacitance that couples to the power switch SI 112 and may include natural capacitance internal to the energy transfer element 106, the natural internal capacitance of power switch SI 112 and/or discrete capacitors. Also shown in FIG.
  • 1A are an input voltage Vnsr 102, an output voltage Vo 134, an output current Io 135, an output quantity Uo 136, a feedback signal U FB 137, a current sense signal 136, a switch current ID 138, a drive signal UDR 140, an enable signal UEN 141 , a clamp drive signal UCD 142, a power switch voltage VDS 143, a primary voltage Vp 144, a leakage voltage VL 145, a clamp voltage Vci 146, clamp current ICL 147, and a secondary current Is 168.
  • the power converter 100 is shown as having a flyback topology. It is appreciated that other known topologies and configurations of power converters may also benefit from the teachings of the present disclosure.
  • the power converter 100 provides output power to a load 1 18 from an
  • the input Vnsr 102 is a rectified and filtered ac line voltage. In another embodiment, the input voltage Vnsr 102 is a dc input voltage.
  • the input Vnsr 102 is coupled to the energy transfer element 106.
  • the energy transfer element 106 may be a coupled inductor, transformer, or an inductor.
  • the example energy transfer element 106 is shown as including two windings, a primary winding 108 (with Np number of turns) and secondary winding 1 10 (with Ns number of turns). However, the energy transfer element 106 may have more than two windings.
  • the voltage across the primary winding 108 is illustrated as the primary voltage Vp 144 with the positive polarity at the dot end of the primary winding 108.
  • the primary voltage Vp 144 is substantially equal to the reflected output voltage of the secondary winding 1 10.
  • the primary winding 108 of the energy transfer element is further coupled to the power switch S 1 1 12 and the power switch S I 1 12 is further coupled to input return 1 1 1.
  • the voltage across the power switched S I 1 12 is denoted as power switch voltage VDS 143 (which is also the voltage across the parasitic capacitance Cp 133).
  • the uncoupled inductance LLK 132 may be coupled between the power switch S I 1 12 and the primary winding 108.
  • the uncoupled inductance LLK 132 which may represent the leakage inductance associated with the energy transfer element 106 or a discrete inductor.
  • the voltage across the uncoupled inductance LLK 132 may be denoted as the leakage voltage VL 145.
  • the active clamp circuit 104 is shown as including clamp capacitance CI 128 and clamp switch 130 coupled in series.
  • the voltage across the clamp capacitance CI 128 is denoted as the clamp voltage Vci 128 while the current in the clamp circuit is denoted as clamp current ICL 147.
  • the active clamp circuit 104 limits the maximum voltage on the power switch S I 1 12 and control of the clamp switch 130 of the active clamp circuit 104 facilitates zero voltage switching of the power switch S I 1 12.
  • the active clamp circuit 104 may reduce RMS current in the power converter 100.
  • the active clamp circuit 104 is coupled to receive the clamp control signal UC D 142 from the controller 122.
  • the clamp control signal UC D 142 is received at a driver circuit 166 which drives the clamp switch 130 (illustrated as a transistor).
  • the transistor of the clamp switch 130 is controlled to turn ON to inject current into the primary winding 108.
  • the clamp switch 130 is turned ON for a first duration prior to the power switch SI 112 turning ON. In other words, the clamp switch 130 is not turned ON for the entire duration that the power switch SI 112 is turned off.
  • the anti-parallel diode of the clamp switch 130 conducts the charge associated with the uncoupled inductance L LK 132 of the power converter 100. This charge from the uncoupled inductance L LK 132 is transferred to the clamp capacitance CI 128 through the anti-parallel diode of clamp switch 130 and is stored. The anti-parallel diode stops conducting substantially after the net charge associated with uncoupled inductance L LK 132 of the power converter 100 has been transferred. The clamp switch 130 remains OFF until near the end of the OFF time of the power switch SI 112. Once it is determined that the power switch should turn ON, the clamp switch 130 is turned on for a first duration of time.
  • the transistor of the clamp switch 130 is turned on such that the net charge previously transferred to the clamp capacitance CI 128 associated with the uncoupled inductance L LK 132 is transferred to the primary winding 108. As such, the energy associated with the uncoupled inductance L LK 132 is returned to the system rather than being dissipated.
  • the uncoupled inductance L LK 132 represents the leakage inductance of the energy transfer element 106.
  • the clamp switch 130 is controlled such that the leakage energy is reset and returned to the power converter rather than being dissipated.
  • Secondary winding 110 is coupled to the output rectifier Dl 114, which is exemplified as a diode.
  • the output rectifier Dl 114 may be a transistor used as a synchronous rectifier.
  • the current outputted from the secondary winding 110 is illustrated as secondary current Is 168.
  • Output capacitor C2 116 is shown as being coupled to the output rectifier Dl 114 and the output return 117.
  • the power converter 100 further includes circuitry to regulate the output, which is exemplified as output quantity Uo 136.
  • the output quantity Uo 136 is an output voltage Vo 134, and output current Io 135, or a combination of the two.
  • a sense circuit 120 is coupled to sense the output quantity Uo 136 and to provide the feedback signal U FB 137, which is representative of the output quantity Uo 136.
  • the controller 122 is coupled to receive the feedback signal U FB 137.
  • the controller 122 is also coupled to receive the current sense signal 139 and provides the drive signal U DR 140 and the clamp drive signal UC D 142.
  • the current sense signal 139 may be representative of the drain current I D 138 which is received by the power switch SI 112 and may be a voltage signal or a current signal.
  • the controller 122 provides drive signal U DR 140 to the power switch SI 112 to control various switching parameters to control the transfer of energy from the input of power converter 100 through the energy transfer element 106 to the output of power converter 100.
  • Examples of such parameters may include switching frequency (or period), duty cycle, ON and OFF times of the power switch SI 112, or varying the number of pulses per unit time of the power switch SI 112.
  • the power switch SI 112 may be controlled such that it has a fixed switching frequency or a variable switching frequency.
  • variable switching frequency control the switching frequency may be reduced for light-load or no-load conditions.
  • ZVS zero voltage switching
  • the clamp current would resonate and the RMS current would increase.
  • embodiments of the present invention may be used in a converter operating with a variable switching frequency control.
  • this may be possible in part due to the clamping of the power switch voltage V D S 143 during the off-time of the power switch SI 112 and the clamp current IC L 147 being substantially equal to zero for a portion of the off-time of the power switch S 1 112.
  • Switch SI 112 is opened and closed in response to the drive signal U DR 140. In operation, the switching of the switch SI 112 produces a pulsating secondary current Is 168 at the output rectifier Dl 114. The secondary current Is 168 is filtered by the output capacitor C2 116 to produce a substantially constant output voltage Vo 134, output current Io 135, or a combination of the two.
  • the switch SI 112 may be a transistor such as a metal- oxide-semiconductor field-effect transistor (MOSFET).
  • controller 122 may be implemented as a monolithic integrated circuit or may be implemented with discrete electrical components or a combination of discrete and integrated components. Controller 122 and switch SI 112 could form part of an integrated circuit that is manufactured as either a hybrid or monolithic integrated circuit.
  • Controller 122 includes the regulation control circuit 124 and the clamp control circuit 126. As shown, the regulation control circuit 124 is coupled to receive the current sense signal 139 and the feedback signal U FB 137. The regulation control circuit 124 also outputs the drive signal U DR 140, which controls the switching of the power switch SI 112, and the enable signal U E N 141. In one example, the enable signal U E N 141 may be representative of when the power switch SI 1 12 is going to be enabled (or turned ON). Or in other words, the enable signal U E N 141 may be representative of a determination to turn ON the power switch SI 1 12.
  • Clamp control circuit 126 is coupled to receive the enable signal U E N 141 and outputs the clamp drive signal UC D 142.
  • the clamp drive signal UC D 142 controls various switching parameters of the clamp switch 130, such as the ON or OFF times of the clamp switch 130.
  • the clamp drive signal UC D 142 controls the amount of current provided to the primary winding 108 such that the net charge associated with the uncoupled inductor L LK 132 is transferred to the primary winding 108.
  • the clamp control circuit 126 in response to the enable signal U E N 141 , the clamp control circuit 126 outputs the clamp drive signal UC D 142 to turn ON the clamp switch 130 for the first duration T A .
  • the regulation control circuit 124 is further coupled to receive the clamp drive signal UC D 142. In operation, the regulation control circuit 124 does not turn ON the power switch SI 1 12 until the second duration T B has passed after the clamp switch 130 has turned OFF.
  • the first duration T A may be selected such that sufficient charge is provided from clamp circuit 104 to the primary winding 108, which will be used to discharge the parasitic capacitance Cp 133.
  • the net charge to be transferred to the primary winding 108 (and ergo current) is substantially the same as the amount of charge that was transferred from the uncoupled inductor L LK 132 to the clamp capacitance CI 128.
  • a shorter first duration T A corresponds to a larger switch voltage V D S 143 on the power switch SI 1 12. Too large of a voltage V D S 143 may damage the power switch.
  • the longer the first duration T A the higher the root-mean-square (RMS) current experienced by the power converter.
  • the first duration T A of time that the clamp switch 130 is turned on may be selected to be substantially equal to the duration of time during which the anti-parallel diode of the clamp switch 130 conducts.
  • the second duration T B of time that power switch SI 1 12 is delayed to be turned on may be selected to provide sufficient time for the power switch voltage V D S 143 to fall to substantially zero (or in other words, to provide sufficient time for the parasitic capacitance Cp 133 to discharge completely to the primary winding 108) before power switch SI 1 12 is turned on.
  • Both the drive signal U DR 140 and the clamp drive signal UC D 142 are rectangular pulse waveforms with varying lengths of logic high and logic low sections.
  • logic high may correspond to an ON switch while logic low may correspond to an OFF switch.
  • the clamp control circuit 126 may output a logic high value for the clamp drive signal UC D 142 for the first duration T A in response to the enable signal U E N 141 (indicating that the power switch SI 1 12 should be turned ON).
  • the regulation control circuit 124 transitions the drive signal U DR 140 from a logic low to a logic high value a second duration T B after the clamp drive signal UC D 142 has transitioned to a logic low value.
  • FIG. 1A Although a single controller is illustrated in FIG. 1A, it should be appreciated that multiple controllers may be utilized by the power converter 100. In addition, the regulation control circuit 124 and the clamp control circuit 126 need not be within a single controller.
  • portions of the regulation control circuit 124 need not be within a single controller.
  • the power converter 100 may have a primary controller coupled to the input side of the power converter 100 and a secondary controller coupled to the output side of the power converter 100.
  • the circuit within the regulation control circuit 124 which receives the feedback signal and generates the enable signal may be in the secondary controller.
  • FIG. IB illustrates a diagram 100 of current through the power switch SI 112 for various modes of control including a switching period Ts 148, a switch on-time toN 149, a switch off-time toEF 150, trapezoidal shape 151, and triangular shape 152.
  • FIG. IB illustrates the general waveforms of the current through the power switch SI 112 over time in both continuous conduction mode (CCM) and discontinuous conduction mode (DCM).
  • CCM continuous conduction mode
  • DCM discontinuous conduction mode
  • switch SI 112 may conduct in response to the drive signal U DR 140 from the controller 122 to regulate the output Uo 136.
  • the switching period Ts 148 may be separated into two sections of time: switch on-time toN 149 and switch off- time toFF 150.
  • Switch on-time toN 149 denotes the portion of the switching period Ts 148 which the switch SI 112 is conducting.
  • Switch off-time toFF 150 denotes the remaining portion of the switching period Ts 148 when the switch SI 110 is not conducting.
  • the current waveform of FIG. IB shows two fundamental modes of operation.
  • the trapezoidal shape 151 is characteristic of continuous conduction mode (CCM)
  • the triangular shape 152 is characteristic of discontinuous conduction mode (DCM).
  • the current through the power switch SI 112 is substantially non-zero immediately after the start of the switch on-time toN 149 and steadily increases throughout the switch on-time toN 149.
  • the current through the power switch SI 112 is substantially zero at the beginning of the switch on-time toN 149, and steadily increases from zero throughout the switch on-time toN 149.
  • the active clamp circuit 104 may be used with a controller that operates in both CCM and DCM.
  • FIG. 2 illustrates a timing diagram 200 of example waveforms of the switch current ID 238, drive signal UDR 240, enable signal UEN 241, clamp drive signal UCD 242, power switch voltage VDS 243, drain current ID 238, clamp current ICL 247, and secondary current Is 268, which correspond to the similarly named and numbered elements also shown in FIG. 1A.
  • the drive signal UDR 240, enable signal UEN 241 , and clamp drive signal UCD 242 are rectangular pulse waveforms of varying lengths of logic high and logic low sections. Logic high and logic low values for the drive signal U DR 240, and the clamp drive signal UC D 242 denote when the power switch SI 1 12 and clamp switch 130 are ON or OFF, respectively.
  • the duration of time that drive signal U DR 240 is logic high is denoted as the on-time TON 249 of the power switch, and the duration of time that the drive signal U DR 240 is logic low is denoted as the off-time TOFF 250.
  • the drive signal U DR 240 transitions to a logic high value and the power switch SI 1 12 is turned ON.
  • the switch current I D 238 begins to increase from a non-zero value (indicating that the controller and power switch SI 1 12 are operating in CCM).
  • the rate which the switch current I D 238 increases is partially determined by the input voltage Vnsr 102 and the inductance of the primary winding 108. For the example shown, the switch current I D 238 increases until the current limit I LF 267 is reached at time ti 254, which will cause the drive signal U DR 240 to turn off the power switch SI 1 12.
  • the drive signal U DR 240 transitions to a logic low value and the power switch SI 1 12 is turned OFF.
  • the enable signal UEN 241 and clamp drive signal UCD 242 are substantially logic low, while the power switch voltage V D S 243, clamp current IC L 247, and a secondary current Is 268 are substantially equal to zero.
  • the switch voltage V D S 243 increases to a high enough voltage that forward biases the anti-parallel diode of the clamp switch 130.
  • the clamp current IC L 247 is substantially non-zero (due to current which charged the parasitic capacitance Cp 133) and flows through the clamp switch 130 to the clamp capacitance CI 128.
  • the direction of the clamp current IC L 247 is indicated by the positive value of the clamp current IC L 247 shown in FIG. 2.
  • the peak value of the clamp current IC L 247 is denoted as the peak reset current I R S T 268.
  • the magnitude of the clamp current IC L 247 decreases as charge is transferred from the uncoupled inductance L LK 132 through the clamp switch 130 to the clamp capacitance CI 128.
  • the anti-parallel diode conducts the clamp current IC L 247 to the clamp capacitance C I 128 for a duration of time that is substantially equal to a reset duration T R S T 269, as shown in FIG. 2.
  • the length of time T R S T 269 is substantially equal to the first duration TA 259.
  • the duration between time t 3 256 and time t 2 255 is referred to the reset duration TRST 269.
  • the reset duration TRST 269 is substantially the conduction time of the anti-parallel diode of the clamp switch 130 when the anti-parallel diode conducts the clamp current IC L 247 to the clamp capacitance CI 128.
  • the reset duration T R S T 269 the net charge associated with the uncoupled inductance L LK 132 is transferred to and stored by clamp capacitance CI 128.
  • the clamp voltage Vci 146 increases as the leakage voltage VL 145 decreases.
  • the net charge from the uncoupled inductance L LK 132 is transferred to and stored by clamp capacitance C I 128 and the anti-parallel diode ceases conduction.
  • the switch voltage V D S 243 has reached the peak value as the charge from the uncoupled inductance L LK 132 has transferred to the clamp capacitance C I 128.
  • the clamp current IC L 247 is substantially equal to zero and the leakage voltage V L 145 is substantially zero.
  • the primary voltage Vp 144 is substantially equal to the reflected output voltage of the power converter.
  • the reflected output voltage is determined by the turns ratio between the primary winding 108 and the secondary winding 110 (Np and Ns) and the output voltage Vo 134.
  • the clamp voltage Vci 146 is high enough such that the anti-parallel diode of the clamp switch 130 is reverse biased and does not conduct.
  • the difference between the peak value of the switch voltage V D S 243 during the reset duration T R S T 269 and the clamped value of the switch voltage V D S 243 after time t 3 256 is substantially the value of the leakage voltage V L 245 at time t 2 255 (which, in some examples is the maximum value of the leakage voltage V L 245).
  • Typical active clamp circuits would turn on the clamp switch 130 (turn on the transistor shown in FIG. 1A) after the anti-parallel diode of the clamp switch 130 has stopped conducting (for this example, at time t 3 256).
  • the clamp switch 130 is not turned on until near the end of the off-time TO FF 250. As such, zero voltage switching can be achieved for a variable frequency converter and the RMS currents may be reduced.
  • the regulation control circuit 124 has determined that the power switch S I 112 should turn on. As such, the enable signal U E N 241 transitions to the logic high value, and the clamp control circuit 126 outputs a logic high value for the clamp drive signal UC D 242.
  • the clamp drive signal UC D 242 remains logic high for the first duration T A 259, which may also be referred to as a charge duration and illustrated in FIG. 2 as the duration of time between time t 4 257 and t 5 258.
  • the magnitude of the clamp current IC L 247 begins to increase as the clamp current IC L 247 flows from the clamp capacitance CI 128 through the clamp switch 130. The direction of the clamp current IC L 247 is indicated by the negative value of the clamp current IC L 247 as shown in FIG. 2.
  • the switch voltage V D S 243 also increases to the sum of the clamp voltage Vci and the input voltage V M .
  • the duration between time t 4 257 and time t 5 258 is illustrated as the first duration T A 259.
  • the first duration T A 259 charge is transferred from the clamp capacitance CI 128 to the primary winding 108.
  • the first duration T A 259 may be selected such that the net charge associated with the uncoupled inductance L LK 132 that was previously transferred to and stored by clamp capacitance C I 128 during the reset duration T R S T 269 is transferred to the primary winding 108 during first duration T A 259.
  • the switch voltage V D S 243 is substantially equal to the sum of the clamp voltage Vci 146 and the input voltage Ym and decreases as the charge on the clamp capacitance CI 128 is transferred to the primary winding 108.
  • the peak magnitude of the clamp current IC L 247 during the first duration T A 259 is substantially the peak charge current IC H G 270.
  • a spike may be present on the secondary current Is 268.
  • the switch voltage V D S 243 would increase to a value higher than the sum of the clamp voltage Vci 146 and the input voltage V I N 102. If the first duration T A 259 is greater than the conduction time of the anti-parallel diode of the clamp switch 130, the switch voltage VDS 243 would increase to a lower value than the sum of the clamp voltage Vci 146 and the input voltage Vnsr 102.
  • the net charge during the reset duration TRST 269 is substantially equal to the product of the peak reset current IRST 268 and the reset duration TRST 269.
  • the net charge during the first duration TA 259 is substantially equal to the product of the peak charge current ICHG 270 and the first duration TA 259.
  • the primary voltage Vp is substantially constant value equal to the reflected output voltage of the power converter.
  • the clamp voltage Vci is also a substantially constant value once the charge has been transferred.
  • the voltage applied to the uncoupled inductance LLK 132 is substantially the leakage voltage VL 245 and the difference between the peak value of the switch voltage VDS 243 and the clamped value of the switch voltage VDS 243 is substantially the leakage voltage VL 245. Since the amount of charge is the same during the reset duration and the first
  • the first duration TA 259 is substantially
  • Second duration TB 260 may be selected such that there is sufficient time for the parasitic capacitance Cp 133 to completely discharge and the power switch voltage VDS 243 to fall to substantially zero before the power switch S I 1 12 is turned on. Further, the secondary current Is 268 begins to decrease.
  • the drive signal UDR 240 transitions to a logic high value and the power switch S I 1 12 is turned on.
  • the primary current Ip 238 is substantially non-zero while the secondary current Is 268 is substantially equal to zero. As such, the energy associated with the uncoupled inductance (i.e. leakage inductance) is returned to the system rather than being dissipated.
  • FIG. 3 illustrates a functional block diagram of an example controller 322, which is one example of the controller 122 of FIG. 1 A, including the regulation control circuit 324 and the clamp control circuit 326.
  • the regulation control circuit 324 includes an enable circuit 361 , a latch 362, a comparator 363, and a delay circuit 364.
  • the clamp control circuit 326 is shown as including a monostable multivibrator 365, which is also referred to as a one-shot.
  • the power converter may have a primary controller coupled to the input side of the power converter and a secondary controller coupled to the output side of the power converter.
  • the enable circuit 361 may be in the secondary controller and the feedback signal U FB 337 may be received by the enable circuit 361 in the secondary controller. The enable circuit 361 may send the enable signal U E N 341 via a communication link to the primary controller.
  • the enable circuit 361 may be coupled to receive the feedback signal U FB 337 and output the enable signal U E N 341.
  • the enable signal U E N 341 may be representative of a determination to turn on (i.e., "enable") the power switch.
  • the enable circuit 361 may determine to turn on the power switch S I 1 12 in response to the feedback signal U FB 337.
  • the enable circuit 361 may include a comparator which is coupled to receive the feedback signal U FB 337 and a reference. When the feedback signal U FB 337 falls below the reference, the enable circuit 361 may determine to turn on the power switch S I 1 12 and the enable circuit may output a pulse in the enable signal U E N 341.
  • the monostable multivibrator 365 is coupled to receive the enable signal U E N 341 and output the clamp drive signal UC D 342. In response to a leading edge in the enable signal U E N 341 , the monostable multivibrator 365 outputs a pulse for the first duration T A of time. As such, the clamp switch 130 is turned on for the first duration T A , at which time the net charge associated with the uncoupled inductance L LK 132 that was previously transferred to and stored by clamp capacitance C I 128 during a previous reset duration T R S T 269 is transferred to the primary winding 108, as discussed in detail above. At the end of the first duration T A , the clamp drive signal UC D 342 transitions to a logic low value and the clamp switch 130 is turned off.
  • the latch 362 is coupled to receive the clamp drive signal UC D 342 at the set- input.
  • the small circle at the set-input of the latch 362 represents an inverter and indicates that the latch 362 is set at the falling edge of the clamp drive signal UC D 342. Or in other words, the Q-output of the latch 362 transitions to a logic high value when the clamp drive signal UC D 342 transitions to a logic low value.
  • the output of the latch 362 is further coupled to be received by the delay circuit 364.
  • the output of the delay circuit 364 is the drive signal U DR 340. As shown, the delay circuit 364 delays the output of the latch 362 for second duration, T B , of time.
  • the latch 362 is also coupled to receive the output of comparator 363 at the reset- input.
  • the comparator 363 is coupled to receive the current limit I LIM 367 (at the inverting input) and the current sense signal 339 (representative of the switch current I D at the non-inverting input).
  • the output of the comparator 363 is logic high and the latch 362 is reset.
  • the drive signal U DR 340 transitions to a logic low value and turns off the power switch S I 1 12.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

Un dispositif de commande comprend un circuit de commande de régulation couplé pour générer un signal d'entraînement en réponse à un signal de réaction afin de commander la commutation d'un commutateur de puissance pour commander un transfert d'énergie d'une entrée vers une sortie d'un convertisseur de puissance. Le circuit de régulation comprend un circuit d'activation couplé pour générer un signal d'activation qui est représentatif d'une détermination visant à mettre en marche le commutateur de puissance. Un circuit de commande de verrouillage est couplé pour générer un signal d'entraînement de verrouillage en réponse au signal d'activation visant à mettre en marche un commutateur de verrouillage couplé à un élément de transfert d'énergie pour une première durée à proximité d'une fin d'un temps d'arrêt du commutateur de puissance pour injecter dans l'élément de transfert d'énergie une charge stockée dans le circuit de verrouillage pour décharger une capacité parasite du commutateur de puissance dans l'élément de transfert d'énergie avant la mise en marche du commutateur de puissance.
PCT/US2015/063523 2015-12-02 2015-12-02 Circuit de verrouillage pour convertisseur de puissance WO2017095408A1 (fr)

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US10461626B1 (en) 2019-01-14 2019-10-29 Silanna Asia Pte Ltd Active clamp circuit
US10707766B2 (en) 2018-02-02 2020-07-07 Silanna Asia Pte Ltd Integrated self-driven active clamp
US10965218B1 (en) 2019-11-15 2021-03-30 Power Integrations, Inc. Active clamp circuit with steering network
CN113767558A (zh) * 2019-04-24 2021-12-07 电力集成公司 包括有源非耗散箝位电路以及相应控制器的功率转换器
US11258369B2 (en) 2020-02-19 2022-02-22 Power Integrations, Inc. Inductive charging circuit to provide operative power for a controller
US11418121B2 (en) 2019-12-30 2022-08-16 Power Integrations, Inc Auxiliary converter to provide operating power for a controller
TWI786845B (zh) * 2021-09-24 2022-12-11 飛宏科技股份有限公司 返馳式功率轉換器及其控制方法
US11632054B2 (en) 2019-04-24 2023-04-18 Power Integrations, Inc. Mode operation detection for control of a power converter with an active clamp switch

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Cited By (21)

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US10811986B2 (en) 2017-12-21 2020-10-20 Appulse Power Inc. Power converter with active clamp
US10418912B2 (en) 2017-12-21 2019-09-17 Silanna Asia Pte Ltd Power converter with active clamp
US11316436B2 (en) 2017-12-21 2022-04-26 Appulse Power Inc. Active clamp controller circuit
WO2019123247A1 (fr) * 2017-12-21 2019-06-27 Silanna Asia Pte Ltd Convertisseur de secteur à pince active
CN111512530A (zh) * 2017-12-21 2020-08-07 斯兰纳亚洲有限公司 带有有源箝位的功率转换器
US11095228B2 (en) 2018-02-02 2021-08-17 Appulse Power Inc. Integrated self-driven active clamp
US10707766B2 (en) 2018-02-02 2020-07-07 Silanna Asia Pte Ltd Integrated self-driven active clamp
US11671026B2 (en) 2018-02-02 2023-06-06 Appulse Power Inc. Integrated self-driven active clamp
US11038412B2 (en) 2019-01-14 2021-06-15 Appulse Power Inc. Active clamp circuit
US10461626B1 (en) 2019-01-14 2019-10-29 Silanna Asia Pte Ltd Active clamp circuit
US11456657B2 (en) 2019-01-14 2022-09-27 Appulse Power Inc. Active clamp circuit
US11632054B2 (en) 2019-04-24 2023-04-18 Power Integrations, Inc. Mode operation detection for control of a power converter with an active clamp switch
CN113767558A (zh) * 2019-04-24 2021-12-07 电力集成公司 包括有源非耗散箝位电路以及相应控制器的功率转换器
US11888405B2 (en) 2019-04-24 2024-01-30 Power Integrations, Inc. Mode operation detection for control of a power converter with an active clamp switch
US11611279B2 (en) 2019-04-24 2023-03-21 Power Integrations, Inc. Input line voltage operation for a power converter
US10965218B1 (en) 2019-11-15 2021-03-30 Power Integrations, Inc. Active clamp circuit with steering network
US11451152B2 (en) 2019-11-15 2022-09-20 Power Integrations, Inc. Active clamp circuit with steering network
US11418121B2 (en) 2019-12-30 2022-08-16 Power Integrations, Inc Auxiliary converter to provide operating power for a controller
US11258369B2 (en) 2020-02-19 2022-02-22 Power Integrations, Inc. Inductive charging circuit to provide operative power for a controller
US11563382B2 (en) 2020-02-19 2023-01-24 Power Integrations, Inc. Inductive charging circuit to provide operating power for a controller
TWI786845B (zh) * 2021-09-24 2022-12-11 飛宏科技股份有限公司 返馳式功率轉換器及其控制方法

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