WO2017085131A1 - Power semiconductor module having a glob top potting compound covering a power semiconductor - Google Patents

Power semiconductor module having a glob top potting compound covering a power semiconductor Download PDF

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Publication number
WO2017085131A1
WO2017085131A1 PCT/EP2016/077867 EP2016077867W WO2017085131A1 WO 2017085131 A1 WO2017085131 A1 WO 2017085131A1 EP 2016077867 W EP2016077867 W EP 2016077867W WO 2017085131 A1 WO2017085131 A1 WO 2017085131A1
Authority
WO
WIPO (PCT)
Prior art keywords
power semiconductor
potting compound
semiconductor module
glob top
top potting
Prior art date
Application number
PCT/EP2016/077867
Other languages
French (fr)
Inventor
Jeppe Lund
Aylin BICAKCI
Jacek Rudzki
Ronald Eisele
Frank Osterwald
Lars Paulsen
Michael Heydenreich
Klaus Olesen
Rüdiger BREDTMANN
Original Assignee
Danfoss Silicon Power Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Danfoss Silicon Power Gmbh filed Critical Danfoss Silicon Power Gmbh
Publication of WO2017085131A1 publication Critical patent/WO2017085131A1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135—Double encapsulation or coating and encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/4501—Shape
    • H01L2224/45012—Cross-sectional shape
    • H01L2224/45014—Ribbon connectors, e.g. rectangular cross-section
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909—Post-treatment of the connector or wire bonding area
    • H01L2224/8592—Applying permanent coating, e.g. protective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

Definitions

  • Power semiconductor module having a glob top potting compound
  • the invention relates to a power semiconductor module having a power semiconductor, an electrical conductor contacting the power semiconductor and a glob top potting compound covering the main surface of the power semiconductor at least partly and the electrical conductor at least partly.
  • potting compounds are often used in the shape of a so-called glob top for the protection of electronic components from moisture, dust, dirt or solvents.
  • the known glob tops also protect sensitive parts from mechanical load or scratches.
  • the object of the invention is therefore to create a power semiconductor module that is resistant to thermal stress.
  • the basic idea of the invention is to use a highly thermally conductive polymer as a glob top potting compound.
  • a highly thermally conductive polymer with high thermal capacity in the shape of a glob top By using a highly thermally conductive polymer with high thermal capacity in the shape of a glob top, a thermal buffer action for heat developed by the semiconductor and at the same time a heat spreading can be achieved that reduces the thermomechanical stress acting on the power semiconductor and on the electrical conductors.
  • the power semiconductor modules designed according to the invention are thereby less susceptible to stress and more durable.
  • a power semiconductor module having a power semiconductor, an electrical conductor contacting the power semiconductor and a glob top potting compound covering the main surface of the power semiconductor at least partly and the electrical conductor at least partly is thus provided, the glob top potting compound being a highly thermally conductive polymer.
  • the electrical conductor here is preferably a wire, heavy wire or ribbon connected to the semiconductor using a bonding method.
  • the highly thermally conductive polymer is at the same time preferably an electrically conductive polymer, wherein the electrical conductivity is given by the fact that the highly thermally conductive polymer is either an intrinsically conductive polymer or a polymer filled with a metal.
  • a metal in particular in the shape of a filling material of the type of metal flakes or particles distributed in the polymer, aluminum and/or copper may preferably be used. Care must be taken here that the metal-filled polymer only covers such surfaces that have the same electrical potential. This may for example very advantageously be applied to diodes that at the same time benefit from a thermal buffer function as well as from the protection of their top-side contacts.
  • a polymer so electrically conductive enables an even distribution of the electric current over the semiconductor surface and in particular provides a more even transition of the electric current into the contacts.
  • two or more glob top potting areas shall be applied then.
  • a particularly advantageous configuration of the power semiconductor module is given if the power semiconductor module is potted with an electrically non-conducting enclosing mass, wherein a first surface portion of the potted power semiconductor module is formed by the enclosing mass and a second surface portion of the potted power semiconductor module is formed by the glob top potting compound.
  • This configuration enables an electrical contacting of the semiconductor chip in the case of a potted semiconductor module from outside by using the electrical conductivity of the glob top potting compound for the electrical contacting of the power semiconductor to the outside.
  • thermoplastic polymer filled with filler materials a method to produce the above-mentioned glob top potting compounds lends itself in which the preproduced body of the thermoplastic polymer filled with filler materials is applied to a preheated power module, where the preproduced body is used in a size suitable for the contact surface on the power semiconductor and is fed by a tool that is also heated. In this way the thermoplastic body may melt fast and also flow around the contacts, where appropriate. By melting fast an
  • adhesive/cohesive connection is created between the polymer filled with filler materials and the power semiconductor with its contacts.
  • the hot-liquefied polymer filled with filler materials is applied in a targeted manner onto the preheated assembly drop-wise (similar to a hot inkjet) or as an endless bead (like in a 3D printing method).
  • Fig. 1 shows a schematic representation of a first exemplary embodiment according to the invention
  • Fig. 2 shows a schematic representation of a second exemplary embodiment
  • Fig. 3 shows a schematic flow chart of a particularly preferred method for the
  • Fig. 1 shows a schematic side view of a first exemplary embodiment according to the invention.
  • the power semiconductor module 10 shown in Fig. 1 has a power semiconductor 20 and an electrical conductor 30 contacting the power semiconductor 20, wherein the upper main surface of the power semiconductor 20 is nearly completely and the electrical conductor 30 is at least partly covered by a glob top potting compound 40.
  • the glob top potting compound 40 is a highly thermally conductive polymer that provides a good spreading of the heat generated by the power semiconductor 20 and acts as a heat buffer.
  • Fig. 2 shows a schematic representation of a second exemplary embodiment according to the invention.
  • the power semiconductor module 10 shown in Fig. 2 also has a power
  • the power semiconductor module 10 is in addition potted with an electrically non-conductive enclosing mass 50, wherein a first surface portion of the potted power semiconductor module 10 is formed by the enclosing mass 50 and a second surface portion of the potted power semiconductor module 10 is is formed by the glob top potting compound 40.
  • This configuration has the advantage that the overmoulded power semiconductor 20 can be contacted via the conductive glob top potting compound 40, although the complete power semiconductor module 10 is potted with an electrically non-conductive potting compound 50.
  • a preferred method for producing a power semiconductor module according to the invention exhibits the steps shown in Fig. 3, in particular 100: manufacturing a body having a glob top potting compound 40 from a highly thermally conductive polymer, 200: heating the body and/or heating the power semiconductor 20, 300: connecting the glob top potting compound 40 with the power semiconductor 20 by sealing the power semiconductor 20 with the glob top potting compound 40, and 400: cooling the power semiconductor module 10.
  • the body here is formed from the glob top potting compound 40 and one electrically non-conductive enclosing mass 50.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

A power semiconductor module (10) having a power semiconductor (20), an electrical conductor (30) contacting the power semiconductor (20) and a glob top potting compound (40) covering the power semiconductor (20) completely and the electrical conductor (30) at least partly, characterized in that the glob top potting compound (40) is a highly thermally conductive polymer.

Description

Power semiconductor module having a glob top potting compound
covering a power semiconductor The invention relates to a power semiconductor module having a power semiconductor, an electrical conductor contacting the power semiconductor and a glob top potting compound covering the main surface of the power semiconductor at least partly and the electrical conductor at least partly. In electronics, potting compounds are often used in the shape of a so-called glob top for the protection of electronic components from moisture, dust, dirt or solvents. At the same time, the known glob tops also protect sensitive parts from mechanical load or scratches.
In addition, in power electronics there is the particular problem of cooling the electrical components, wherein the heat dissipation of the power semiconductor covered by the glob top is usually achieved via the contacts usually designed as heavy wires or ribbons towards a cooling structure arranged at the bottom of the power semiconductor module.
In this setup it is disadvantageous that despite great care in the production of power semiconductor modules, in case of high dynamic thermal loads that occur material fatigue of the electrical conductors in the area of the contacts to the semiconductor chip and thus malfunctions or even failure of the complete module cannot be excluded.
The object of the invention is therefore to create a power semiconductor module that is resistant to thermal stress.
The basic idea of the invention is to use a highly thermally conductive polymer as a glob top potting compound. By using a highly thermally conductive polymer with high thermal capacity in the shape of a glob top, a thermal buffer action for heat developed by the semiconductor and at the same time a heat spreading can be achieved that reduces the thermomechanical stress acting on the power semiconductor and on the electrical conductors. The power semiconductor modules designed according to the invention are thereby less susceptible to stress and more durable. According to the invention a power semiconductor module having a power semiconductor, an electrical conductor contacting the power semiconductor and a glob top potting compound covering the main surface of the power semiconductor at least partly and the electrical conductor at least partly is thus provided, the glob top potting compound being a highly thermally conductive polymer. The electrical conductor here is preferably a wire, heavy wire or ribbon connected to the semiconductor using a bonding method.
The highly thermally conductive polymer is at the same time preferably an electrically conductive polymer, wherein the electrical conductivity is given by the fact that the highly thermally conductive polymer is either an intrinsically conductive polymer or a polymer filled with a metal. As a metal, in particular in the shape of a filling material of the type of metal flakes or particles distributed in the polymer, aluminum and/or copper may preferably be used. Care must be taken here that the metal-filled polymer only covers such surfaces that have the same electrical potential. This may for example very advantageously be applied to diodes that at the same time benefit from a thermal buffer function as well as from the protection of their top-side contacts. In addition to the thermal buffer function a polymer so electrically conductive enables an even distribution of the electric current over the semiconductor surface and in particular provides a more even transition of the electric current into the contacts.
In the case of power semiconductors whose terminal surfaces support several electrical potentials, it must be observed for the application of such electrically conductive polymers that the polymer only gets in touch with terminal surfaces of one potential. Where
appropriate, two or more glob top potting areas shall be applied then. Alternatively it is suggested, however, to only cover that terminal face partly or completely with the electrically conductive potting compound that is influenced by particular thermomechanical stress and to leave out the terminal surface areas of the control terminals from covering with the electrically conductive glob top potting compound.
A particularly advantageous configuration of the power semiconductor module is given if the power semiconductor module is potted with an electrically non-conducting enclosing mass, wherein a first surface portion of the potted power semiconductor module is formed by the enclosing mass and a second surface portion of the potted power semiconductor module is formed by the glob top potting compound. This configuration enables an electrical contacting of the semiconductor chip in the case of a potted semiconductor module from outside by using the electrical conductivity of the glob top potting compound for the electrical contacting of the power semiconductor to the outside.
In the case of polymers filled with thermoplastic filling materials a method to produce the above-mentioned glob top potting compounds lends itself in which the preproduced body of the thermoplastic polymer filled with filler materials is applied to a preheated power module, where the preproduced body is used in a size suitable for the contact surface on the power semiconductor and is fed by a tool that is also heated. In this way the thermoplastic body may melt fast and also flow around the contacts, where appropriate. By melting fast an
adhesive/cohesive connection is created between the polymer filled with filler materials and the power semiconductor with its contacts.
In an alternative method, the hot-liquefied polymer filled with filler materials is applied in a targeted manner onto the preheated assembly drop-wise (similar to a hot inkjet) or as an endless bead (like in a 3D printing method).
The invention will be described in more detail below with reference to an exemplary embodiment of particularly preferred design illustrated in the accompanying drawings. In the drawings:
Fig. 1 shows a schematic representation of a first exemplary embodiment according to the invention;
Fig. 2 shows a schematic representation of a second exemplary embodiment
according to the invention; and
Fig. 3 shows a schematic flow chart of a particularly preferred method for the
production of a power semiconductor module according to the invention.
Fig. 1 shows a schematic side view of a first exemplary embodiment according to the invention. The power semiconductor module 10 shown in Fig. 1 has a power semiconductor 20 and an electrical conductor 30 contacting the power semiconductor 20, wherein the upper main surface of the power semiconductor 20 is nearly completely and the electrical conductor 30 is at least partly covered by a glob top potting compound 40. According to the invention, the glob top potting compound 40 is a highly thermally conductive polymer that provides a good spreading of the heat generated by the power semiconductor 20 and acts as a heat buffer.
In the case the power semiconductor 20 has only one electric potential surface on its surface that is contacted by the electrical conductor 30, the use of an electrically conductive as well as an electrically non-conductive glob top potting compound 40 is possible. Fig. 2 shows a schematic representation of a second exemplary embodiment according to the invention. The power semiconductor module 10 shown in Fig. 2 also has a power
semiconductor 20 and an electrical conductor 30 contacting the power semiconductor 20, wherein also this power semiconductor 20 is covered nearly completely and the electrical conductor 30 is covered at least partly with a glob top potting compound 40.
Compared to the exemplary embodiment shown in Fig. 1, the power semiconductor module 10 is in addition potted with an electrically non-conductive enclosing mass 50, wherein a first surface portion of the potted power semiconductor module 10 is formed by the enclosing mass 50 and a second surface portion of the potted power semiconductor module 10 is is formed by the glob top potting compound 40.
This configuration has the advantage that the overmoulded power semiconductor 20 can be contacted via the conductive glob top potting compound 40, although the complete power semiconductor module 10 is potted with an electrically non-conductive potting compound 50.
A preferred method for producing a power semiconductor module according to the invention exhibits the steps shown in Fig. 3, in particular 100: manufacturing a body having a glob top potting compound 40 from a highly thermally conductive polymer, 200: heating the body and/or heating the power semiconductor 20, 300: connecting the glob top potting compound 40 with the power semiconductor 20 by sealing the power semiconductor 20 with the glob top potting compound 40, and 400: cooling the power semiconductor module 10.
In particular the body here is formed from the glob top potting compound 40 and one electrically non-conductive enclosing mass 50.

Claims

PATENT CLAIMS
A power semiconductor module (10) having a power semiconductor (20), an electrical conductor (30) contacting the power semiconductor (20) and a glob top potting compound (40) covering the main surface of the power semiconductor (20) at least partly and the electrical conductor (30) at least partly, characterized in that the glob top potting compound (40) is a highly thermally conductive polymer.
The power semiconductor module (10) according to Claim 1, characterized in that the highly thermally conductive polymer is an intrinsically electrically conductive polymer.
The power semiconductor module (10) according to Claim 1, characterized in that the highly thermally conductive polymer is a polymer filled with a metal.
The power semiconductor module (10) according to Claim 3, characterized in that the metal is aluminum (Al) and/or copper (Cu).
The power semiconductor module (10) according to one of the preceding claims, characterized in that the power semiconductor module (10) is potted with an electrically non-conductive enclosing mass (50), wherein a first surface portion of the potted power semiconductor module (10) is formed from the enclosing mass (50) and a second surface portion of the potted power semiconductor module (10) is is formed from the glob top potting compound (40).
6. The power semiconductor module (10) according to one of the preceding claims, characterized in that the electrical conductor (30) is a wire or a ribbon.
7. A method for manufacturing a power semiconductor module (10) according to one of the preceding claims, with the steps:
- manufacturing a body having a glob top potting compound (40) made of a highly thermally conductive polymer,
- heating the body and/or heating the power semiconductor (20),
- connecting the glob top potting compound (40) with the power semiconductor (20) by sealing the power semiconductor (20) with the glob top potting compound (40), and
- cooling the power semiconductor module (10).
8. The method according to Claim 7, characterized in that the body is formed from the glob top potting compound (40) and an electrically non-conducting enclosing mass (50).
PCT/EP2016/077867 2015-11-19 2016-11-16 Power semiconductor module having a glob top potting compound covering a power semiconductor WO2017085131A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102015120109.7 2015-11-19
DE102015120109.7A DE102015120109B4 (en) 2015-11-19 2015-11-19 Power semiconductor module with a power semiconductor covering Glob-top potting compound

Publications (1)

Publication Number Publication Date
WO2017085131A1 true WO2017085131A1 (en) 2017-05-26

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Cited By (2)

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Publication number Priority date Publication date Assignee Title
EP4270453A1 (en) * 2022-04-28 2023-11-01 Infineon Technologies AG Method for fabricating a power semiconductor module comprising an encapsulation material with a high thermostability and power semiconductor module
EP4270454A3 (en) * 2022-04-28 2023-11-22 Infineon Technologies AG Power semiconductor module comprising a first and a second compartment and method for fabricating the same

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DE102020134563A1 (en) 2020-12-22 2022-06-23 Danfoss Silicon Power Gmbh Power module and method of manufacturing a power module
DE102021116053A1 (en) 2021-06-22 2022-12-22 Danfoss Silicon Power Gmbh Electrical conductor, electronic assembly with an electrical conductor and method for manufacturing an electronic assembly with an electrical conductor

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EP4270454A3 (en) * 2022-04-28 2023-11-22 Infineon Technologies AG Power semiconductor module comprising a first and a second compartment and method for fabricating the same

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DE102015120109A1 (en) 2017-05-24
DE102015120109B4 (en) 2018-03-01

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