WO2017060657A1

WO2017060657A1 - Optoelectronic circuit with light-emitting diodes

Info

Publication number: WO2017060657A1
Application number: PCT/FR2016/052606
Authority: WO
Inventors: David GRAS; Thomas PEYSSON; Olivier Valorge
Original assignee: Easii Ic
Priority date: 2015-10-09
Filing date: 2016-10-07
Publication date: 2017-04-13
Also published as: FR3042378A1

Abstract

Optoelectronic circuit (20) with light-emitting diodes receiving a variable voltage (V_ALIM) containing an alternation of increasing and decreasing positive phases, the optoelectronic circuit comprising: •a plurality of light-emitting diodes (Di) mounted in series; •a node (A₃) linked to each light-emitting diode (Di) by a current conduction circuit (SWi) adapted to take at least first and second states, the conduction circuit being less electrically conducting in the first state than in the second state; •a first comparator (36) adapted for comparing the voltage (V_CS) at said node with a first voltage threshold (V_DOWN); and •a control module (34), comprising a finite automaton, linked to the first comparator and adapted, during each increasing phase and each decreasing phase, to control the conduction circuits in accordance with signals provided by the first comparator.

Description

OPTOELECTRONIC CIRCUIT WITH ELECTROLUMINESCENT DIODES

The present patent application claims the priority of the French patent application FR15 / 59617 which will be considered as an integral part of the present description.

Field

The present disclosure relates to a circuit ^¬ opto electronics, in particular an optoelectronic circuit comprising light emitting diodes.

Presentation of the prior art

It is desirable to be able to supply an optoelectronic circuit comprising light-emitting diodes with a variable voltage, for example an alternating voltage, in particular a sinusoidal voltage, for example the mains voltage.

1 shows an exemplary optoelectronic circuit 10 comprising input terminals _IN] _ and I¾ between which is applied an AC voltage V _j ^. The optoelectronic circuit 10 further comprises a rectifying circuit 12 comprising a diode bridge 14, receiving the voltage VJ and supplying a rectified voltage V ^ LIM which supplies the light-emitting diodes 16, for example connected in series with a resistor 15. called I LIM ^ ^e ^ current flowing through the light emitting diodes 16. FIG. 2 is a timing diagram of the supply voltage V V LIM and the supply current I V LIM for an example in which the AC voltage V _i corresponds to a sinusoidal voltage. When the voltage V ^ J is greater than the sum of the threshold voltages of the light-emitting diodes 16, the light-emitting diodes 16 turn on. The supply current I ^ LIM then follows the supply voltage V ^"ALIM- So there alternating OFF phases of absence of light emission and ON phases of light emission.

A disadvantage is that as long as the voltage V ^ LIM is less than the sum of the threshold voltages of the light-emitting diodes 16, no light is emitted by the optoelectronic circuit 10. An observer can perceive this absence of light emission when the duration of each OFF phase of absence of light emission between two ON phases of light emission is too important. One possibility to increase the duration of each ON phase is to reduce the number of light-emitting diodes 16. A disadvantage is that the electrical power lost in the resistance is important.

U.S. Publication 2012/0056559 discloses an optoelectronic circuit in which the number of diodes ^¬ electro luminescent receiving the supply voltage V J gradually increases during a growth phase of the supply voltage and gradually decreases at a decay phase of the supply voltage. This is achieved by a switching circuit adapted to short-circuit a larger or smaller number of light-emitting diodes according to the evolution of the voltage. This reduces the duration of each phase of absence of emission of light.

A disadvantage of the optoelectronic circuit described in the publication US 2012/0056559 is that the supply current of the light-emitting diodes does not vary continuously, that is to say that there are sudden interruptions of current flow at during the variation of the voltage. This causes variations over time in the light intensity provided by electroluminescent diodes that can be perceived by an observer. This also causes a deterioration in the harmonic distortion rate of the current supplying the light-emitting diodes of the optoelectronic circuit.

summary

An object of an embodiment is to overcome all or part of the disadvantages of the optoelectronic circuits described above.

Another object of an embodiment is to reduce the duration of the phases of absence of light emission by the optoelectronic circuit.

Another object of an embodiment is that the current supplying the light-emitting diodes varies substantially continuously.

Another object of an embodiment is that the current supplying the light-emitting diodes can be continuously monitored by a circuit external to the optoelectronic circuit.

Thus, an embodiment provides an optoelectronic circuit for receiving a variable voltage containing an alternation of positive, increasing and decreasing phases, the optoelectronic circuit comprising:

a plurality of light emitting diodes connected in series;

a node connected to each light-emitting diode, among at least some light-emitting diodes of the plurality of light-emitting diodes, by a current conduction circuit adapted to take at least first and second states, the conduction circuit in the first state being less conductive electrically only in the second state;

a first comparator adapted to compare the voltage at said node to a first voltage threshold; and

a control module, comprising a finite automaton, connected to the first comparator and adapted, during each increasing phase and each decreasing phase, to control the conduction circuits according to signals provided by the first comparator.

According to one embodiment, the circuit comprises a second comparator adapted to compare the voltage at said node with a second voltage threshold different from the first voltage threshold. The control module is further connected to the second comparator and is adapted, during each increasing phase and each decreasing phase, to control the conduction circuits as a function of signals provided by the first and second comparators.

According to one embodiment, the state machine is adapted to provide, for each conduction circuit, a first digital signal. The control module further comprises, for each conduction circuit, a binary decoder adapted to receive the first digital signal and to supply a second digital signal, and the control module further comprises, for each conduction circuit, a converter digital / analog circuit adapted to receive the second digital signal and to provide a control signal to said conduction circuit.

According to one embodiment, the control module comprises a counter and the control module is adapted to decrement the counter each time the voltage at said node increases above the first voltage threshold, and is adapted to increment the counter each time. the voltage at said node decreases below the first voltage threshold or the second voltage threshold.

According to one embodiment, each conduction circuit is a switch.

According to one embodiment, the control module is adapted, during each increasing phase, to control the opening of one of the switches each time the voltage at said node increases above the first voltage threshold, and is adapted, during each decreasing phase, to control the closing of one of the switches each time the voltage at said node decreases below the first voltage threshold or the second voltage threshold.

According to one embodiment, each conduction circuit comprises at least a third state allowing the passage of a current, the resistance of the conduction circuit being lower in the third state than in the second state.

According to one embodiment, the control module is adapted, during each increasing phase, to control the setting to the first state or the second state of one of the conduction circuits each time the voltage at said node increases above of the first voltage threshold, and is adapted, during each decreasing phase, to control the setting to the second state or the third state of one of the conduction circuits each time the voltage at said node decreases below the second threshold Of voltage.

According to one embodiment, the circuit comprises a current source connected to said node.

According to one embodiment, each light-emitting diode comprises elementary light-emitting diodes in parallel and / or in series.

Brief description of the drawings

These and other features and advantages will be set forth in detail in the following description of particular embodiments in a non-limiting manner with reference to the accompanying drawings in which:

FIG. 1, previously described, is an electrical diagram of an example of an optoelectronic circuit comprising light-emitting diodes;

FIG. 2, previously described, is a timing diagram of the voltage and the supply current of the light-emitting diodes of the optoelectronic circuit of FIG. 1;

FIG. 3 represents an electrical diagram of an embodiment of an optoelectronic circuit comprising light-emitting diodes; FIG. 4 represents an operating diagram of an embodiment of a control method of the optoelectronic circuit represented in FIG. 3;

FIG. 5 represents a more detailed embodiment of an element of the optoelectronic circuit represented in FIG. 3;

FIG. 6 represents a circuit diagram of another embodiment of an optoelectronic circuit comprising light-emitting diodes; and

FIGS. 7 to 9 are power and voltage timing diagrams of the embodiment of the optoelectronic circuit of FIG. 3 during the implementation of the embodiment of the control method illustrated in FIG. 4.

detailed description

For the sake of clarity, the same elements have been designated by the same references in the various figures and, in addition, the various figures are not drawn to scale. Unless otherwise specified, the terms "approximately", "substantially", and "of the order of" mean within 10%, preferably within 5%. In addition, a "signal binary" is a signal that alternates between a first constant state, for example a low state, denoted "0", and a second constant state, for example a high state, denoted "1". The high and low states of different binary signals of the same electronic circuit can be different. In practice, the binary signals may correspond to voltages or currents that may not be perfectly constant in the high or low state. Furthermore, in the present description, the term "connected" is used to denote a direct electrical connection, without intermediate electronic component, for example by means of a conductive track, and the term "coupled" or the term

"connected", to designate either a direct electrical connection (meaning "connected") or a connection via one or more intermediate components (resistor, capacitor, etc.).

FIG. 3 represents a circuit diagram of an embodiment of an optoelectronic circuit 20 comprising a switching device for light-emitting diodes. The elements of the optoelectronic circuit 20 common with the optoelectronic circuit 10 are designated by the same references. In particular, the optoelectronic circuit 20 includes the rectifier circuit 12 receiving the supply voltage _Vj ^ between the terminals IN] _ and I¾ and supplying the rectified voltage V J between nodes _A] _ and A2. Alternatively, the circuit 20 can directly receive a rectified voltage, the rectifier circuit may then not be present. The potential at the node A2 may correspond to the low reference potential, for example 0 V, with respect to which the voltages of the optoelectronic circuit 20 are referenced.

The optoelectronic circuit 20 comprises N series sets of elementary light-emitting diodes, called global light-emitting diodes Dj_ in the following description, where i is an integer ranging from 1 to N and where N is an integer between 2 and 200. each global light-emitting diode _D] _ to ¾ includes at least one elementary LED. Preferably, each global electroluminescent diode is composed of placing in series and / or in parallel at least two elementary light-emitting diodes. In the present example, the global N LEDs are connected in series, the cathode of the global light-emitting diode Dj being connected to the anode of the overall light-emitting diode D 1 ₊ , for i ranging from 1 to Nl. The anode of the overall light-emitting diode _D] _ is connected to the node _A] _. The global light emitting diodes D 1, i ranging from 1 to N may comprise the same number of elementary light emitting diodes or different numbers of elementary light emitting diodes.

The optoelectronic circuit 20 comprises a current source 30 or an impedance of which one terminal is connected to the node A2 and whose other terminal is connected to a node A3. The voltage at the terminals of the current source 30 and the current absorbed by the current source 30 are called V.sub.C. The optoelectronic circuit 20 may comprise a circuit, not shown, which provides a reference voltage for supplying the current source, possibly obtained from the voltage LIM LIM. The current source 30 may have any structure and may in particular correspond to a resistor. The current source 30 can be continuously controlled by a circuit external to the optoelectronic circuit 20.

The circuit 20 comprises a device 32 for switching the global light-emitting diodes Dj_, i varying from 1 to N. For example, the device 32 comprises N conduction circuits SW _] _ to Sl%. Each conduction circuit SW-1, i varying from 1 to N, is connected between the node A3 and the cathode of the global light-emitting diode D-1. Each circuit SW-1, i varying from 1 to N, is controlled by a signal Sj_ supplied by a control module 34. For i varying from 1 to N, the current flowing in the circuit SW-j_ is called Ij_. Alternatively, the circuit S1, which protects the current source from overvoltages, may not be controlled by the control module 34 and may still be on or may not be present and the cathode of the overall light emitting diode may be connected to the node A3. The control module 34 may, in whole or in part, be realized by a dedicated circuit or may comprise a microprocessor or a microcontroller adapted to execute a sequence of instructions stored in a memory.

According to another embodiment, each circuit SW-j can operate in K different conduction states, where K is an integer greater than or equal to 2. A conduction state is a state in which the circuit does not allow the current to pass or let the current flow with a resistance that can be different depending on the state. Of the K conduction states of the circuit

SW-j_, there is a state in which the circuit SW-j_ is the least electrically conductive, for example a state in which the circuit SW-j_ prevents the passage of the current and a state in which the circuit SW-j_ is the more electrically conductive. When K is equal to 2, the circuit SW-j is, for example, a switch which is either open or closed. The signal Sj_ may then be a binary signal and the switch SW-j_ is open when the signal Sj_ is at a first level, for example S-j_] _ ^or "0", and the switch SW-j_ is closed when the signal Sj_ is at a second level, for example S-2 ^or "1". For example, when K is greater than or equal to 3, the circuit SW-j can operate in a state in which it prevents the passage of the current and in at least two states in which the circuit SW-j_ allows the passage of the current with different resistances according to the signal Sj_. The signal Sj_ may then be a signal that can take several discrete values S-j_] _ S-j_ each value of the signal Sj_ controlling one of the states of the switch SW-j_. By way of example, the state of the circuit SW-j associated with the signal S-j] corresponds to the blocked state in which the circuit SW-1 prevents the current flow and the associated states of the circuit SW-1 respectively. at the signals S 2 to K 1, K correspond to the states in which the circuit SW 1 has a lower and lower resistance. As a variant, different values of the signal Sj_ can control the same conduction state of the circuit SW-j_.

The optoelectronic circuit 20 comprises a first comparator 36, for example an operational amplifier mounted as a comparator, providing a signal DOWN to the control module 34, whose non-inverting input (+) is connected to the node A3 and whose inverting input ( -) receives a voltage threshold V _Q Q provided by a circuit 38. According to one embodiment, the comparator 36 provides the DOWN signal in two states. The signal DOWN is set to the first state, for example "0", when the voltage Vcg is lower than the voltage threshold _Q QWN- The signal DOWN is set to the second state, for example "1", when the voltage Vg is greater than voltage threshold _Q QWN-

The optoelectronic circuit 20 comprises a second comparator 40, for example an operational amplifier mounted as a comparator, supplying a signal UP to the control module 34, whose inverting input (-) is connected to the node A3 and whose non-inverting input ( +) receives a voltage threshold V] _j p provided by a circuit 42. According to one embodiment, the comparator 40 provides the signal UP in two states. The signal UP is set to the first state, for example "0", when the voltage Vcg is greater than the voltage threshold Vj _j p. The signal UP is put in the second state, for example "1", when the voltage Vcg is lower than the voltage threshold Vj _j p, the voltage V] _j p being lower than the voltage ^v DO -

Each circuit SW-j_ is, for example, based on at least one transistor, in particular a field effect transistor with a metal-oxide gate or MOS transistor, enriched or depleted.

According to one embodiment, each conduction circuit SW-j_ corresponds to a MOS transistor, for example an N-channel transistor, the drain of which is connected to the cathode of the global light-emitting diode Dj_, the source of which is connected to the node A3 and whose the gate receives the signal Sj_. When the signal Sj_ is binary, it can take two values S-j_] _ (° ^u "0") ^and ¾, 2 (or "1"). The transistor SW-j may operate according to two states, an on state and a blocked state, the passing state being for example obtained for the value "1", and the off state being for example obtained for the value "0". When the signal Sj_ can take more than two values, the transistor SW-j_ can operate in more than two states including a blocked state and at least two different conduction states. According to another embodiment, the conduction circuit SW-j_ comprises two MOS transistors, for example with a channel

N between the cathode of the global light-emitting diode Dj_ and the node A3, the transistor connected to the global light-emitting diode Dj_ being a high-voltage transistor mounted in cascode and the transistor connected to the node A3 being a low-voltage transistor controlled by the signal Sj_. This advantageously makes it possible to increase the switching speed of the conduction circuit SW-j.

FIG. 4 represents, in the form of an operating diagram, an embodiment of a control method conduction circuits SW-j_ by the control module 34. The method starts at step 50.

Step 50 corresponds to an initialization step, for example at the start of the optoelectronic circuit 20, that is to say when the optoelectronic circuit 20 is turned on. By way of example, in step 50, the control module 34 supplies the signals Sj_ in the state Sj_, that is to say that all the conduction circuits SW-j_ are in the state where their resistance is the strongest. When the conduction circuits SW-j_ are switches, all the switches SW-j_ are opened in step 50. The method continues in step 52.

In step 52, the control module 34 maintains the supply of signals Sj_ at the last determined value as long as the control module 34 receives the signals DOWN and UP at "0". At the initialization step, no current flowing in the global light emitting diodes D _] _ to ¾, the voltage Vcg is naturally pulled towards 0 V, and is therefore lower than the voltage V] _j p, so that the signal UP goes to "1".

In step 54, the control module 34 receives a signal UP at "1". This means that the voltage Vcg has decreased below ^" up." The process continues at step 56.

In step 56, the control module 34 modifies the values of the signals Sj_ so as to increase the voltage Vcg. According to one embodiment, when each conduction circuit SW-j_ corresponds to a switch, the switches SW _] _ to

When the switches SW-1 are closed, an increase in the voltage Vg can be obtained by closing the switch SW. According to another embodiment, when each conduction circuit SW-j_ is in several conduction states, that the conduction circuits SW _] _ to SW-j __] _ are in the off state, that the conduction circuits SWj_ _+] _ to Sl are in the most conduction conduction state and that the conduction circuit SW-j_ is in one of the passing states, an increase of the voltage Vcg can be obtained, in the case where the state conduction circuit SW-j_ is not the most happening state, modifying the conduction state of the conduction circuit SW-j to increase its conduction, or, if the conduction state of the circuit SW-j is the most conducting state, by modifying the state of the circuit SW-j. ] _ to put it in its least conductive conduction state.

In step 58, the control module 34 receives a signal

OD to "1". This means that the voltage Vcg has risen above VQOW - the process continues at step 60.

In step 60, the control module 34 modifies the values of the signals Sj_ so as to decrease the voltage Vcg. According to one embodiment, when each conduction circuit SW-j_ corresponds to a switch, the switches SW] _ to SW-j __] _ are open and the switches SW-j_ to Sl% are closed, a decrease in the voltage Vg can be obtained by opening the switch SW-j. According to another embodiment, when each conduction circuit SW-j_ is more than two conduction states, the conduction circuits SW _] _ to SW-j __] _ are in the off state; conduction SWj_ ₊ ] _ to Sl are in the most conduction conduction state and that the conduction circuit SW-j_ is in one of the passing states, a decrease in the voltage Vcg can be obtained by changing the state of conduction of the conduction circuit SW-j_ to reduce the conduction. If the conduction circuit SW-j_ is in the off state, the state of the conduction circuit SW-j_ ₊ ] _ is modified to make the latter less conductive. The process then continues at step 52.

This produces a control voltage Vcg is left between the voltage thresholds Vjj- and VQ _Q W irrespective of the variations of J ^ -

An embodiment of the control method of the optoelectronic circuit 20 will now be described in the case where the conduction circuits SW-j_ correspond to switches. At the beginning of an ascending phase of the voltage V ^ LIM 'that is to say, in the case where the voltage V ^ LIM is obtained from a sinusoidal VJ voltage, when V ^ LIM increases from 0 V , the switches SW i, i varying from 1 to, are closed, that is to say electrically passersby.

In an ascending phase of the supply voltage V ^" ALIM" for i varying from 1 to N, while the global light-emitting diodes D _] _ to D-j __] _ are on and the global light-emitting diodes Dj_ to% are blocked when the voltage across the global light-emitting diode Dj_ becomes greater than the threshold voltage of the global light-emitting diode Dj_, the latter becomes conductive and a current begins to flow in the overall light-emitting diode D-j_. This causes an increase. the voltage Vcg. If it passes beyond the threshold voltage V _Q QW _/ I ^e module 34 then controls the opening of the lowest index switch among the switches closed.

At the beginning of a downward phase of the supply voltage V ^ LIM, that is to say, in the case where the voltage V ^" ALIM is obtained from a sinusoidal voltage VJN, when V ^" ALIM decreases from a maximum positive value, greater than the sum of threshold voltages of the light-emitting diodes _D] _ ¾ _[, the SW-j_ switches, i varying from 1 to N, are open. In a downward phase, the global light emitting diodes D _] _ to Dj_ being conducting and global light emitting diodes Dj_ _+] _ to ¾ being blocked, when the voltage Vcg decreases below the voltage Vj _j p, it means that the voltage at terminals of the current source 30 may become too weak for it to function properly and deliver its rated current. This therefore means that it is necessary to reduce the number of diodes in conduction to increase the voltage across the current source 30. The module 34 then controls the closing of the switch with the strongest index among the open switches. In the case where each switch SW-j_ is produced by an N-channel MOS transistor whose drain is connected to the cathode of the global light-emitting diode Dj_ and whose source is connected to the node A3, when the supply voltage V ^ LIM drops, the The voltage between the drain of the switch SW-j and the node A3 decreases until the operation of the transistor SW-j passes from the saturation regime to the linear regime. This causes an increase in the voltage between the gate and the source of the transistor SW-j and thus a decrease in the voltage V sg.

Advantageously, the embodiment of the SW-j_ switch control method described above does not depend on the number of elementary light-emitting diodes that make up each global light-emitting diode D-j and therefore does not depend on the threshold voltage of each diode. global electroluminescent.

An embodiment of the control method of the optoelectronic circuit will now be described in the case where each conduction circuit SW-j_ has a number of conduction states greater than or equal to 3. At the beginning of an ascending phase of the voltage V ^ LIM 'that is to say, in the case where the voltage V ^ J is obtained from a sinusoidal voltage VJN, when V ^ LIM increases from 0 V, the conduction circuits SW-j_, i varying from 1 to N, are in the most conductive conduction state. In an upward phase of the supply voltage LIM LIM, for i varying from 1 to N, while the global light emitting diodes D 1 to D 1 are on and the global light emitting diodes D 1 are blocked, when the voltage across the global light-emitting diode Dj_ becomes greater than the threshold voltage of the global light-emitting diode Dj_, the latter becomes conductive and a current begins to flow in the global light-emitting diode D-j_. This causes an increase in the voltage Vcg. If the latter passes beyond the voltage threshold V _Q QW _/ I ^E module 34 then controls the passage of the conduction circuit of the lowest index among the passing conduction circuits to a state of less and less passing each time the VCG voltage increases beyond the VQQW voltage ^until reaching the non-conductive state. At the beginning of a downward phase of the supply voltage V ^ LIM, that is, in the case where the voltage ^V ALIM ^is obtained from a sinusoidal voltage VJN, when ^ ALIM decreases from a maximum positive value, greater than the sum of the threshold voltages of the light-emitting diodes D _] _ to ¾ _[ , the conduction circuits SW-j_, i ranging from 1 to Nl, are in the off state. In a descending phase, the overall light-emitting diodes _D] _ D-j __] _ being conducting and the overall light emitting diodes D-j_ to being blocked when the voltage Vcg decreases below the voltage threshold Vj _j p, the module 34 then controls the passage of the conduction circuit of the strongest index among the conduction circuits which are not in the most passing state to a state of increasing each time the voltage Vcg decreases below the threshold voltage V] _j p until reaching the most conductive conduction state.

FIG. 5 shows a more detailed embodiment of the control module 34 in the case where the number of conduction states K of each conduction circuit SW-j_ is greater than or equal to 3. In the present embodiment, the Control module 34 comprises a finite number state machine (FSM), also called a finite state machine, at K * N states receiving the DOWN and UP signals and providing a digital signal Qj for each conduction circuit SW-j. For example, the state machine 70 can operate on UP and DOWN edges. Each value of the digital signal Qj_ codes for one of the K conduction circuit states SW-j_. The control module 34 further comprises a decoder 72-j_ (decode) for each conduction circuit SW-j_, i varying from 1 to N, each decoder 72-j_ receiving the digital signal Qj_ and providing a digital signal Q 'j_. The control module 34 further comprises a digital-to-analog converter 74 (DAC) for each conduction circuit SW-i, i varying from 1 to N, for example of the pulse width modulation type or a network which subdivides a voltage into several intermediate voltages, each digital-to-analog converter 74 receiving the digital signal Q'j_ and providing the signal Sj_. The decoder 72-j_ makes it possible to supply a digital signal Q'j_ adapted to the operation of the associated 74_ digital / analog converter. The number of bits of the digital signals Qj_ and Q'j_ depends on the type of coding used and the accuracy of the digital-to-analog converter 74-j_.

In the case where the number of conduction states K is equal to 2, the embodiment of the control module 34 represented in FIG. 5 can be simplified, the control module 34 possibly not including the decoders 72 and the digital converter. analog 74-j_ can be replaced by a level adjustment circuit.

According to one embodiment, the controller uses a finite 70 COUNT counter comprising N * (K) bits and equal to the concatenation of signals _Q] _ and to each digital signal Qj_ comprises (K) bits. At the initialization of the optoelectronic circuit, all the bits of the counter are set to "0". In operation, the state machine 70 increments the counter COMPT upon receipt of a signal UP at "1"; if all the bits are set to "1", the counter remains in its state. The state machine 70 decrement the counter COMPT on receipt of a signal D0 at "1"; if all the bits are set to "0", the counter remains in its state.

Advantageously, the maximum voltages applied to the electronic components, in particular the MOS transistors, comparators 36, 40 remain low compared with the maximum value that the voltage V L may take. It is then not necessary to provide, for the comparators 36, 40, electronic components that can support the maximum value that can take the voltage VALIM -

FIG. 6 represents a circuit diagram of another embodiment of an optoelectronic circuit 75 comprising all the elements of the optoelectronic circuit 20 with the exception of the comparator 40 and the circuit 42 for supplying the voltage threshold V] _j p who are not present. The circuit Optoelectronics 75 further comprises an inverter 76 receiving the signal DOWN and providing the control module 34 the signal DOWNb which is complementary to the signal DOWN. The signal DOWNb is equivalent to the signal UP described above for the optoelectronic circuit 20 and can be supplied to the input of the control module 34 which, for the optoelectronic circuit 20, receives the signal UP. The control module 34 may have the structure described above in relation with FIG. 5. In particular, the control module 34 may comprise a finite automaton 70 operating as has been previously described in connection with FIG. 5. As a variant comparator 36 may be a hysteresis comparator. According to another embodiment, the comparator 36 of the optoelectronic circuit 75 is replaced by a Schmitt trigger, having two intrinsic threshold voltages and VJJ, receiving the voltage Vcg and providing the signal DOWN.

For example, when the voltage Vcg increases from 0 V, the DOWN signal remains in the "0" state until the voltage Vcg exceeds the voltage threshold V ^. At this time, the signal DOWN goes to state "1". The signal DOWN remains in the state "1" until the voltage V Vg becomes lower than the voltage threshold V V. At this moment, the signal DOWN goes to the state "0". The signal DOWN remains in the state "0" until the voltage Vcg returns above the voltage threshold V ^.

FIG. 7 represents timing diagrams, obtained by simulation, of the power AL ALIM supplied by the rectifier circuit 12, of the power PLED used by the light-emitting diodes D 1 to ¾, of the voltage V g g, of the voltage thresholds VQQ N ^{and V} UP '^ es UP and DOWN signals and S] _ and S2 signals to the opto-electronic circuit 20 as shown in Figure 3. figures 8 and 9 each correspond to a part of Figure 7 on an enlarged time scale. For these simulations, the supply voltage corresponded to the voltage of the rectified sector. The conduction circuits SW-1 were conduction state circuits. The use of multiple conduction states makes it possible to have a conduction state Sj _^ ^ now the voltage Vcg between the voltage thresholds VQQW ^{and V} UP- ^The voltage threshold VQQW was equal to 4 V and the voltage threshold Vjj- was equal to 2 V. In the timing diagram of the signals UP and DOWN of FIG. the peaks appearing in the ascending phase PI of the supply voltage V ^ LIM correspond to brief passages of the signal DOWN at "1" and the peaks appearing in the falling phase PII of the supply voltage VALIM correspond to brief passages from the UP signal to "1".

Particular embodiments have been described. Various variations and modifications will be apparent to those skilled in the art. Although detailed embodiments have been described in which the least electrically conductive conduction state of each conduction circuit SW-j corresponds to a non-conducting state, it is clear that these embodiments can also be implemented. with a conduction circuit SW-j_ for which the least electrically conductive state nevertheless corresponds to a state in which current flows through the circuit SW-j_, for example a current whose intensity is less than or equal to the limit theoretical which is the maximum intensity inducing a power in the conduction circuit SW-j_ can be dissipated without causing malfunction thereof.

Claims

An optoelectronic circuit (20) for receiving a variable voltage (VR IM) containing an alternation of positive, increasing and decreasing phases, the optoelectronic circuit comprising:

a plurality of light emitting diodes (D-j) connected in series;

a node (A3) connected to each light-emitting diode (D-j_), among at least some light-emitting diodes of the plurality of light-emitting diodes, by a conduction circuit (SW-j_) of the current adapted to take at least first and second electrodes. states, the conduction circuit in the first state being less electrically conductive than in the second state;

a first comparator (36) adapted to compare the voltage (Vcg) at said node to a first voltage threshold (VQ _Q W); ^AND

a control module (34), comprising a finite automaton

(70), connected to the first comparator and adapted, during each increasing phase and each decreasing phase, to control the conduction circuits according to signals provided by the first comparator.

2. Optoelectronic circuit according to claim 1, comprising a second comparator (40) adapted to compare the voltage (Vcg) at said node to a second voltage threshold (V] _j p) different from the first voltage threshold and wherein the module control (34) is further connected to the second comparator and is adapted, during each increasing phase and each decreasing phase, to control the conduction circuits as a function of signals provided by the first and second comparators.

An optoelectronic circuit according to claim 2, wherein the state machine (70) is adapted to provide, for each conduction circuit (SW-j), a first digital signal (Q1, Q1), wherein control module (34) further comprises, for each conduction circuit (SW- _ _j), a binary decoder _(72] _, 12- ^) adapted to receive the first digital signal and providing a second digital signal ( Q '] _, Q'n) ^an d wherein the module control (34) further comprises, for each conduction circuit (SW- _j _), a digital-to-analog converter (74 _] _, adapted to receive the second digital signal and to provide a control signal (S _] _, S ^ _j ) to said conduction circuit.

Optoelectronic circuit according to any one of claims 1 to 3, wherein the control module (34) comprises a counter and wherein the control module is adapted to decrement the counter each time the voltage (Vg) at said node (A3) increases above the first voltage threshold ( ^v DOWN) ' ^{and is} adapted to increment the counter each time the voltage at said node decreases below the first voltage threshold or the second voltage threshold (Vj _j p · ·

Optoelectronic circuit according to any one of claims 1 to 4, wherein each conduction circuit (SW _j _) is a switch.

Optoelectronic circuit according to claim 5, wherein the control module (34) is adapted, during each increasing phase, to control the opening of one of the switches each time the voltage (Vg) to said node ( A3) increases above the first voltage threshold (^ OWN) r and is adapted, during each decreasing phase, to control the closing of one of the switches each time the voltage (Vg) at said node (A3) decreases below the first voltage threshold or the second voltage threshold (Vj _j p) ·

Optoelectronic circuit according to any one of claims 1 to 4, wherein each conduction circuit (SW-j) comprises at least one third state allowing the passage of a current, the resistance of the conduction circuit (SW-j_ ) being weaker in the third state than in the second state.

8. Optoelectronic circuit according to claim 7, wherein the control module (34) is adapted, during each increasing phase, to control the setting in the first state or the second state of one of the conduction circuits (SW-j_ ) whenever the voltage (Vg) at said node (A3) rises above the first voltage threshold (VQQ) ' ^{and is} adapted, at each decreasing phase, controlling the setting in the second state or the third state of one of the conduction circuits each time the voltage (Vg) at said node (A3) decreases below the second voltage threshold (Vj _j p) ·

An optoelectronic circuit according to any one of claims 1 to 8, comprising a current source (30) connected to said node (A3).

An optoelectronic circuit according to any of claims 1 to 8, wherein each light emitting diode (D-j) comprises elementary light emitting diodes in parallel and / or in series.