WO2017054737A1

WO2017054737A1 - Address mapping method and device based on mass solid-state storage

Info

Publication number: WO2017054737A1
Application number: PCT/CN2016/100631
Authority: WO
Inventors: 许璐; 孙亚萍
Original assignee: 华为技术有限公司
Priority date: 2015-09-30
Filing date: 2016-09-28
Publication date: 2017-04-06
Also published as: CN105205009A; CN105205009B

Abstract

Disclosed is an address mapping method based on a mass solid-state storage, which is characterized in that, the method comprises: obtaining a write command for writing the data to the solid-state hard disk, the write command carries the data to be written and a logical block address of the data to be written (101); inquiring, according to a global 2nd level mapping table, a 3rd level mapping table in a main memory corresponding to the logical block address (S102); if there is no 3rd level mapping table corresponding to the logical block address in the main memory, then indexing, according to the global 2nd level mapping table, the 3rd level mapping table in the solid-state hard disk, and reading the 3rd level mapping table in the solid-state hard disk corresponding to the logical block address and storing it to the main memory (S103); controlling a solid-state hard disk controller to assign a physical page number (PPN) for the logical block address, and storing the PPN to the 3rd level mapping table corresponding to the logical block address in the main memory (S104); writing the data to be written to the PPN (S105).

Description

Address mapping method and device based on large-capacity solid-state storage

Technical field

The present invention relates to the field of electronic communication technologies, and in particular, to an address mapping method and apparatus based on large-capacity solid-state storage.

Background technique

The data carriers commonly used in the storage field are mechanical hard disks and solid state drives (SSDs). The solid state drives have the advantages of small size, low power consumption, strong anti-interference ability, minimal addressing time, and high number of read/write operations per second (IOPS). Compared with traditional disks, solid state hard disk storage such as flash can achieve microsecond delay, while traditional disk intelligence achieves millisecond delay. However, due to the solid state hard disk such as flash (1), the modified data cannot be directly rewritten on the original data, resulting in non-fixed point update; (2) the basic unit of data reading and writing is the page, and the basic unit of erasing is the block; (3) Due to the life problem, each erase block can only be erased for a limited number of times and other inherent characteristics. Therefore, based on the storage system of a solid state hard disk such as flash, it is necessary to simulate the behavior of a conventional block device for reading and writing a mechanical hard disk, and shield the solid state drive from the system. characteristic.

The Flash Translation Layer (FTL) algorithm is actually a mapping of logical block address (LBA) to physical page number (PPN). When the file system sends instructions to write or update a particular logical page, the Flash Translation Layer (FTL) actually writes the data to a different free physical page and updates the mapping table, and the old data contained on the page. Set to invalid. Because of the existence of the Flash Translation Layer (FTL), the operating system can be used as a hard disk drive. Therefore, the performance of the Flash Translation Layer (FTL) algorithm directly affects the performance of solid state drives such as flash.

The early SSDs such as flash have smaller capacity and the number of pages per chip is limited. The small-grained page-level mapping strategy is an efficient and flexible mapping method that can map any logical page to any physical page. Each mapping relationship corresponds to one mapping entry. However, due to the small granularity of the mapping, when the capacity of the solid state hard disk such as flash is large, a large amount of memory is required to store the mapping table information, which is not suitable for a large-capacity solid-state storage system.

The conversion of the block-level mapped address is used to convert the logical block number into a physical block number by address mapping, and the data is written to the physical page having the same offset in the physical block according to the block number offset in the logical address. The mapping table is significantly reduced due to the coarse-grained mapping. However, if N pages form a block, the number of mapping tables of the block mapping is reduced to 1/N compared with the basic page mapping algorithm, so that the entire mapping table can be completely stored in the main memory RAM. In the block-level mapping scheme, the space utilization of the replacement block is very low, which causes waste of storage space. On the other hand, when performing the erase operation of the solid state hard disk such as flash, a large amount of data erasure and apologetic operation are required, and the system runs for a while. Time requires frequent garbage collection, causing system performance jitter.

Summary of the invention

Embodiments of the present invention provide an address mapping method and apparatus based on large-capacity solid-state storage, by searching a logical block address corresponding to data to be read or written, and searching for a logical block address corresponding to a logical level block in a 2-level mapping table. a level 3 mapping table, reading the data from the level 3 mapping table or writing a multi-level sequential mapping scheme of the data in a physical page number allocated for the logical block address, due to mapping at level 2 Only the index of the level 3 mapping table is stored in the table, and the logical block address in the solid state hard disk is corresponding only when the level 3 mapping table in the main memory does not store the data to be read or to be written. The level 3 mapping table is written to the main memory, which solves the problem that the page level mapping needs to consume a large amount of main storage space due to the small granularity of the mapping in the case of large-capacity storage, and also avoids the data involved in the block operation of the block level mapping. The resulting performance instability problem achieves a simplified mapping relationship to reduce the consumption of main memory space and maintain stable performance.

The first aspect provides an address mapping method based on large-capacity solid-state storage, which includes:

Obtaining a write command for writing data to the solid state hard disk, where the write command carries a logical block address to be written and the data to be written;

Querying, according to the global level 2 mapping table, the level 3 mapping table in the main memory corresponding to the logical block address, where the global level 2 mapping table is used to index the level 3 mapping table in the main memory and a 3-level mapping table in the solid state hard disk, wherein the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk are used to store the logical block address and a physical page number corresponding to the logical block address Mapping relations;

If the level 3 mapping table corresponding to the logical block address does not exist in the main memory, indexing the logical block according to the global level 2 mapping table indexing the level 3 mapping table in the solid state hard disk The level 3 mapping table in the solid state hard disk corresponding to the address is read out and stored in the main memory;

Controlling the SSD controller to allocate a physical page number to the logical block address, and storing the physical page number in a 3-level mapping table corresponding to the logical block address in the main memory;

In the three-level mapping table corresponding to the logical block address in the main memory, the data to be written is written into the storage space corresponding to the physical page number.

In a first possible implementation manner of the first aspect, if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, according to the global level 2 mapping table index The third-level mapping table in the SSD, before the third-level mapping table in the SSD corresponding to the logical block address is read and stored in the main storage, and further includes:

Determining whether the space in the main memory storing the level 3 mapping table reaches a preset threshold, and reaching the preset threshold In case, the cold data is removed from the main storage according to a preset cache rule and written into the solid state hard disk, so as to write a 3-level mapping table corresponding to the logical block address in the solid state hard disk. The main memory provides storage space.

With reference to the first aspect or the first possible implementation manner of the first aspect, in a second possible implementation, the control solid state hard disk controller allocates a physical page number to the logical block address, and the After the physical page number is stored in the level 3 mapping table corresponding to the logical block address in the main memory, the physical page number further includes:

Writing the physical page number into the solid state hard disk; or writing the physical page number to the solid state hard disk after writing the logical block address and the physical page number into the main memory.

With reference to the second possible implementation of the first aspect, in a third possible implementation, after the writing the physical page number into the SSD, the method further includes:

The logical block address and the physical page number are updated in the level 2 mapping table and the level 1 mapping table.

With reference to the third aspect, the third possible implementation manner of the first aspect, in the fourth possible implementation, the third level mapping table corresponding to the logical block address is not present in the main memory And reading, according to the global level 2 mapping table, the level 3 mapping table in the solid state hard disk, and reading and storing the level 3 mapping table in the solid state hard disk corresponding to the logical block address to the After the main memory, it also includes:

Adding a counter corresponding to the logical block address in the 3-level mapping table to one;

After the control solid state hard disk controller allocates a physical page number to the logical block address, and stores the physical page number in a level 3 mapping table corresponding to the logical block address in the main memory, And decrementing a counter corresponding to the logical block address in the three-level mapping table to confirm that the logical block address of the data to be written obtains a corresponding physical page number.

The second aspect provides an address mapping method based on large-capacity solid-state storage, which includes:

Obtaining a read command for reading data in the solid state hard disk, the read command carrying a logical block address of the data to be written;

Querying, by the global level 2 mapping table, the physical page number corresponding to the logical block address stored in the level 3 mapping table in the main memory, where the global level 2 mapping table is used to index the main a 3-level mapping table in the storage and a 3-level mapping table in the solid state hard disk;

If the physical page number corresponding to the logical block address is not stored in the level 3 mapping table in the main memory, indexing the level 3 mapping in the solid state hard disk according to the global level 2 mapping table a table, the logical block address stored in the 3-level mapping table in the solid state hard disk and a physical page number corresponding to the logical block address are read out;

Reading the data from the physical page.

The third aspect provides an address mapping method based on large-capacity solid-state storage, which includes:

Obtaining a command for reading or writing data in a solid state hard disk, the command including a read command or a write command;

Determining that the command is a read command or a write command;

If the command is a read command, the read command carries a logical block address, and the global logical level 2 mapping table is used in the main memory to query the logical block address stored in the level 3 mapping table in the main memory. Physical page number, the global level 2 mapping table is used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk;

Reading the data from the physical page;

If the command is a write command, the write command carries the logical block address of the data to be written and the data to be written, and queries the location corresponding to the logical block address according to the global level 2 mapping table. The level 3 mapping table in the main memory, the global level 2 mapping table is used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk, and the level 3 mapping table is used for storing a mapping relationship between the logical block address and a physical page number corresponding to the logical block address;

Controlling the SSD controller to allocate a physical page number to the logical block address, and storing the physical page number in a three-level mapping table corresponding to the logical block address in the main memory;

In a first possible implementation manner of the third aspect, if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, according to the global level 2 mapping table index The third-level mapping table in the SSD, before the third-level mapping table in the SSD corresponding to the logical block address is read and stored in the main storage, and further includes:

Determining whether the space for storing the level 3 mapping table in the main memory reaches a preset threshold. If the preset threshold is reached, the cold data is removed from the main memory and written according to a preset cache rule. To the solid state hard disk, the level 3 mapping table corresponding to the logical block address in the solid state hard disk is written into the main memory providing storage space.

With reference to the third aspect or the first possible implementation manner of the third aspect, in the second possible implementation manner, The SSD controller allocates a physical page number to the logical block address, and stores the physical page number in the third-level mapping table corresponding to the logical block address in the main memory, and further includes:

With the second possible implementation of the third aspect, in a third possible implementation, after the writing the physical page number into the solid state hard disk, the method further includes:

With reference to the third aspect to the third possible implementation manner of the third aspect, in a fourth possible implementation, the level 3 mapping table corresponding to the logical block address does not exist in the main memory And reading, according to the global level 2 mapping table, the level 3 mapping table in the solid state hard disk, and reading and storing the level 3 mapping table in the solid state hard disk corresponding to the logical block address to the After the main memory, it also includes:

After the control solid state hard disk controller allocates a physical page number to the logical block address, and stores the physical page number in a three-level mapping table corresponding to the logical block address in the main memory, And decrementing a counter corresponding to the logical block address in the three-level mapping table to confirm that the logical block address of the data to be written obtains a corresponding physical page number.

The fourth aspect provides an address mapping apparatus based on large-capacity solid-state storage, which includes:

Obtaining a module, acquiring a write command for writing data to the solid state hard disk, where the write command carries a logical block address of the data to be written and the data to be written;

a processing module, configured to query, according to the global level 2 mapping table, the level 3 mapping table in the main memory corresponding to the logical block address, where the global level 2 mapping table is used to index the main a 3-level mapping table in the storage level 3 mapping table and the solid state hard disk, wherein the level 3 mapping table is configured to store a mapping relationship between the logical block address and a physical page number corresponding to the logical block address;

The processing module is further configured to: if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, index the level 3 mapping table in the solid state hard disk according to the global level 2 mapping table The third level mapping table in the solid state hard disk corresponding to the logical block address is read out and stored in the main memory;

The processing module is further configured to control a solid state hard disk controller to allocate a physical page number to the logical block address, and store the physical page number in a third level corresponding to the logical block address in the main memory. In the mapping table;

The processing module is further configured to: in the three-level mapping table corresponding to the logical block address in the main memory, Writing data to the storage space corresponding to the physical page number;

The storage module includes the SSD module and the main storage module, configured to store the global level 2 mapping table, and store the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk.

With reference to the fourth aspect, in a first possible implementation manner of the fourth aspect, the processing module, in the third level mapping table corresponding to if the logical block address does not exist in the main memory And reading, according to the global level 2 mapping table, the level 3 mapping table in the solid state hard disk, and reading and storing the level 3 mapping table in the solid state hard disk corresponding to the logical block address to the Before the main memory, it is also used to:

With reference to the first possible implementation manner of the fourth aspect, in a second possible implementation manner of the fourth aspect, the processing module is configured to control a physical hard disk controller to allocate a physical address to the logical block address. After the page number is stored in the three-level mapping table corresponding to the logical block address in the main memory, the physical page number further includes:

With reference to the second possible implementation of the fourth aspect, in a third possible implementation, the processing module is further used after the processing is further used to write the physical page number into the solid state hard disk. to:

With reference to the third possible implementation manner of the fourth aspect, in a fourth possible implementation, the processing module, in the if the main memory does not exist, the level 3 mapping corresponding to the logical block address a table, according to the global level 2 mapping table indexing the level 3 mapping table in the solid state hard disk, reading and storing the level 3 mapping table in the solid state hard disk corresponding to the logical block address to the After the main memory, it is also used to:

A fifth aspect provides an address mapping apparatus based on a large-capacity solid-state storage, including:

Obtaining a module, acquiring a read command for reading data in the solid state hard disk, the read command carrying logic to be written data Block address

a processing module, configured to query, by using a global level 2 mapping table in the main memory, a physical page number corresponding to the logical block address stored in the level 3 mapping table in the main memory, where the global level 2 mapping table is used Indexing the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk;

The processing module is further configured to: if the physical page number corresponding to the logical block address is not stored in the level 3 mapping table in the main memory, index the solid state according to the global level 2 mapping table The level 3 mapping table in the hard disk reads the logical block address stored in the level 3 mapping table in the solid state hard disk and a physical page number corresponding to the logical block address;

The processing module is further configured to read the data from the physical page;

A sixth aspect provides an address mapping apparatus based on a large-capacity solid-state storage, comprising: an obtaining module, acquiring a command for reading or writing data in a solid state hard disk, where the command includes a read command or a write command;

a processing module, configured to determine that the command is a read command or a write command;

The processing module is further configured to: if the command is a read command, the read command carries a logical block address, and in a main memory, through a global level 2 mapping table, querying the third level mapping table stored in the main memory a physical page number corresponding to the logical block address, where the global level 2 mapping table is used to index a level 3 mapping table in the main memory and a level 3 mapping table in the solid state hard disk;

The processing module is further configured to: if the command is a write command, the write command carries a logical block address to be written data and the to-be-written data, and the query is performed according to the global level 2 mapping table. a level 3 mapping table in the main memory corresponding to the logical block address, where the global level 2 mapping table is used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk. The level 3 mapping table is configured to store a mapping relationship between the logical block address and a physical page number corresponding to the logical block address;

The processing module is further configured to: if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, And reading, according to the global level 2 mapping table, the level 3 mapping table in the solid state hard disk, and reading and storing the level 3 mapping table in the solid state hard disk corresponding to the logical block address to the main Deposit

The processing module is further configured to write the data to be written into the storage space corresponding to the physical page number in the three-level mapping table corresponding to the logical block address in the main memory;

With reference to the sixth aspect, in a first possible implementation manner of the sixth aspect, if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, according to the global level 2 Mapping the table index in the 3-level mapping table in the SSD, before reading and storing the 3-level mapping table in the SSD corresponding to the logical block address in the main storage, ,Also includes:

With reference to the sixth aspect, or the first possible implementation manner of the sixth aspect, in a second possible implementation, the processing module is configured to allocate a physical page number to the logical block address in the control solid state disk controller After the physical page number is stored in the three-level mapping table corresponding to the logical block address in the main memory, the method further includes:

With reference to the second possible implementation manner of the sixth aspect, in a third possible implementation, the processing module, after the writing the physical page number into the solid state hard disk, further includes:

With reference to the third possible implementation manner of the sixth aspect to the sixth aspect, in a fourth possible implementation, the processing module is configured to: if the logical block address does not exist in the main memory a level 3 mapping table, according to the global level 2 mapping table indexing the level 3 mapping table in the solid state hard disk, reading the level 3 mapping table in the solid state hard disk corresponding to the logical block address And after being stored in the main memory, the method further includes:

The seventh aspect provides an address mapping apparatus based on large-capacity solid-state storage, which includes:

Receiving, by the receiver, a write command for writing data to the solid state hard disk, where the write command carries the logical block address of the data to be written and the data to be written;

a processor, configured to query, according to the global level 2 mapping table, the level 3 mapping table in the main memory corresponding to the logical block address, where the global level 2 mapping table is used to index the main a 3-level mapping table in the storage level 3 mapping table and the solid state hard disk, wherein the level 3 mapping table is configured to store a mapping relationship between the logical block address and a physical page number corresponding to the logical block address;

The processor is further configured to: if a level 3 mapping table corresponding to the logical block address does not exist in the main memory, index a level 3 mapping table in the solid state hard disk according to the global level 2 mapping table. The third level mapping table in the solid state hard disk corresponding to the logical block address is read out and stored in the main memory;

The processor is further configured to control a solid state hard disk controller to allocate a physical page number to the logical block address, and store the physical page number in a third level corresponding to the logical block address in the main memory. In the mapping table;

The processor is further configured to write data to be written into a storage space corresponding to the physical page number in a three-level mapping table corresponding to the logical block address in the main memory;

The memory includes the solid state hard disk and the main memory, and is configured to store the global level 2 mapping table, and store the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk.

With reference to the seventh aspect, in a first possible implementation manner of the seventh aspect, the processor, in the third level mapping table corresponding to if the logical block address does not exist in the main memory And reading, according to the global level 2 mapping table, the level 3 mapping table in the solid state hard disk, and reading and storing the level 3 mapping table in the solid state hard disk corresponding to the logical block address to the Before the main memory, it is also used to:

With reference to the first possible implementation manner of the seventh aspect, in a second possible implementation manner of the seventh aspect, the processor is configured to control a physical hard disk controller to allocate a physical address to the logical block address. Page number and the object After the page number is stored in the three-level mapping table corresponding to the logical block address in the main memory, the page number further includes:

With reference to the second possible implementation manner of the seventh aspect, in a third possible implementation, the processor, after being used to write the physical page number into the solid state hard disk, further to:

With reference to the third possible implementation manner of the seventh aspect, in a fourth possible implementation, the processor, in the if the main memory does not exist, the level 3 mapping corresponding to the logical block address a table, according to the global level 2 mapping table indexing the level 3 mapping table in the solid state hard disk, reading and storing the level 3 mapping table in the solid state hard disk corresponding to the logical block address to the After the main memory, it is also used to:

The eighth aspect provides an address mapping apparatus based on large-capacity solid-state storage, which includes:

a receiver that acquires a read command for reading data in the solid state hard disk, the read command carrying a logical block address of the data to be written;

a processor, configured to query, by using a global level 2 mapping table in the main memory, a physical page number corresponding to the logical block address stored in the level 3 mapping table in the main memory, where the global level 2 mapping table is used Indexing the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk;

The processor is further configured to: if the physical page number corresponding to the logical block address is not stored in the level 3 mapping table in the main memory, index the solid state according to the global level 2 mapping table The level 3 mapping table in the hard disk reads the logical block address stored in the level 3 mapping table in the solid state hard disk and a physical page number corresponding to the logical block address;

The processor is further configured to read the data from the physical page;

The ninth aspect provides an address mapping apparatus based on large-capacity solid-state storage, which includes:

a receiver for obtaining a command for reading or writing data in the solid state hard disk, the command comprising a read command or a write command;

a processor, configured to determine that the command is a read command or a write command;

The processor is further configured to: if the command is a read command, the read command carries a logical block address, and in a main memory, through a global level 2 mapping table, querying the third level mapping table stored in the main memory a physical page number corresponding to the logical block address, where the global level 2 mapping table is used to index a level 3 mapping table in the main memory and a level 3 mapping table in the solid state hard disk;

The processor is further configured to read the data from the physical page;

The processor is further configured to: if the command is a write command, the write command carries a logical block address of the data to be written and the data to be written, and the query is performed according to the global level 2 mapping table. a level 3 mapping table in the main memory corresponding to the logical block address, where the global level 2 mapping table is used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk. The level 3 mapping table is configured to store a mapping relationship between the logical block address and a physical page number corresponding to the logical block address;

With reference to the ninth aspect, in a first possible implementation manner of the ninth aspect, the processor, if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, The global level 2 mapping table indexes the level 3 mapping table in the solid state hard disk, and reads and stores the level 3 mapping table in the solid state hard disk corresponding to the logical block address into the main memory. Previously, it was characterized by:

With reference to the ninth aspect, or the first possible implementation manner of the ninth aspect, in a second possible implementation, the processor, in the control solid state disk controller, assigns a physical page number to the logical block address After the physical page number is stored in the three-level mapping table corresponding to the logical block address in the main memory, the method further includes:

With reference to the second possible implementation manner of the ninth aspect, in a third possible implementation, the processor, after the writing the physical page number into the solid state hard disk, further includes:

With reference to any one of the possible implementation manners of the ninth aspect to the ninth aspect, in a fourth possible implementation, the processor does not exist in the main memory And the level 3 mapping table corresponding to the logical block address, according to the global level 2 mapping table, indexing the solid state hard disk corresponding to the logical block address in the level 3 mapping table in the solid state hard disk. After the level 3 mapping table is read out and stored in the main memory, the method further includes:

The present invention reads the 3-level mapping table corresponding to the logical block address in the 2-level mapping table by reading the logical block address of the data to be read or written, and reads the above-mentioned 3-level mapping table from the 3-level mapping table. Data or a multi-level sequential mapping scheme in which the data is written in a physical page number allocated for the logical block address, since only the index of the level 3 mapping table is stored in the level 2 mapping table, and only in the main memory When the level 3 mapping table does not store the data to be read or to be written, the level 3 mapping table corresponding to the logical block address in the solid state hard disk is written into the main memory. Because the solution does not need to traverse directly from the 3-level mapping table of the SSD to query the physical page number corresponding to the logical block address, and the main memory only has a 3-level mapping table corresponding to the hot data that is frequently accessed. Thereby solving the page level in the case of mass storage Because the mapping granularity is small, it needs to consume a large amount of main storage space. It also avoids the performance instability caused by the data involved in the block-level mapping. Therefore, the mapping relationship is simplified to reduce the consumption of the main storage space. And maintain the effect of stable performance.

DRAWINGS

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, a brief description of the drawings used in the embodiments or the prior art description will be briefly described below. Obviously, the drawings in the following description It is a certain embodiment of the present invention, and other drawings can be obtained from those skilled in the art without any inventive labor.

FIG. 1 is a flowchart of an address mapping method based on large-capacity solid-state storage according to an embodiment of the present invention;

2 is a flowchart of another address mapping method based on large-capacity solid-state storage according to an embodiment of the present invention;

FIG. 3 is a flowchart of another method for address mapping based on large-capacity solid-state storage according to an embodiment of the present invention;

4 is a flowchart of another address mapping method based on large-capacity solid-state storage according to an embodiment of the present invention;

FIG. 5 is a structural diagram of an apparatus for address mapping based on large-capacity solid-state storage according to an embodiment of the present disclosure;

FIG. 6 is a structural diagram of another apparatus for address mapping based on large-capacity solid-state storage according to an embodiment of the present disclosure;

FIG. 7 is a structural diagram of another apparatus for address mapping based on large-capacity solid-state storage according to an embodiment of the present disclosure;

FIG. 8 is a structural diagram of another apparatus for address mapping based on large-capacity solid-state storage according to an embodiment of the present disclosure;

FIG. 9 is an address mapping table based on large-capacity solid-state storage according to an embodiment of the present invention;

FIG. 10 is another address mapping table based on large-capacity solid-state storage according to an embodiment of the present invention;

detailed description

The technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the drawings in the embodiments of the present invention. It is a partial embodiment of the invention, and not all of the embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative efforts are within the scope of the present invention.

As shown in FIG. 1 , an address mapping method based on large-capacity solid-state storage provided by an embodiment of the present invention includes:

Step S101, acquiring a write command for writing data to the solid state hard disk, where the write command carries the logical block address of the data to be written and the data to be written;

Step S102, querying, according to the global level 2 mapping table, the level 3 mapping table in the main memory corresponding to the logical block address, where the global level 2 mapping table is used to index the level 3 in the main memory. Mapping table and 3-level mapping in SSD a table of the third level mapping table, configured to store a mapping relationship between the logical block address and a physical page number corresponding to the logical block address;

Step S103, if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, indexing the level 3 mapping table in the solid state hard disk according to the global level 2 mapping table, a level 3 mapping table in the solid state hard disk corresponding to the logical block address is read out and stored in the main memory;

Step S104, the SSD controller is configured to allocate a physical page number to the logical block address, and store the physical page number in a three-level mapping table corresponding to the logical block address in the main memory.

Step S105, in the three-level mapping table corresponding to the logical block address in the main memory, write the data to be written into the storage space corresponding to the physical page number.

The beneficial effect is: looking up the level 3 mapping table corresponding to the logical block address in the level 2 mapping table according to the logical block address of the data to be read or written, and reading out the level 3 mapping table from the level 3 mapping table The data or the multi-level sequential mapping scheme in which the data is written in the physical page number allocated for the logical block address, since only the index of the level 3 mapping table is stored in the level 2 mapping table, and only in the main memory When the level 3 mapping table does not store the data to be read or write, the level 3 mapping table corresponding to the logical block address in the solid state hard disk is written into the main memory, thereby solving the problem of mass storage. In the case of page-level mapping, the large amount of storage space is required due to the small granularity of the mapping, and the performance instability problem caused by the data involved in the block-level mapping is avoided, thereby simplifying the mapping relationship to reduce the main The storage space is consumed and the performance is stable.

As shown in FIG. 2, another address mapping method based on large-capacity solid-state storage provided by an embodiment of the present invention includes:

Step S201, acquiring a write command for writing data to the solid state hard disk, where the write command carries the logical block address of the data to be written and the data to be written;

Step S202, querying, according to the global level 2 mapping table, the level 3 mapping table in the main memory corresponding to the logical block address, where the global level 2 mapping table is used to index the main memory. a level 3 mapping table and a level 3 mapping table in the solid state hard disk, wherein the level 3 mapping table is configured to store a mapping relationship between the logical block address and a physical page number corresponding to the logical block address;

Step S203, if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, indexing the level 3 mapping table in the solid state hard disk according to the global level 2 mapping table, a level 3 mapping table in the solid state hard disk corresponding to the logical block address is read out and stored in the main memory;

Step S204, controlling the SSD controller to allocate a physical page number for the logical block address, and the physical page The number is stored in a three-level mapping table corresponding to the logical block address in the main memory;

Step S205, in the three-level mapping table corresponding to the logical block address in the main memory, write the data to be written into the storage space corresponding to the physical page number.

Further, in step S206, if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, indexing the level 3 mapping in the solid state hard disk according to the global level 2 mapping table In the table, before the third level mapping table in the solid state hard disk corresponding to the logical block address is read out and stored in the main memory, the method further includes:

Further, in step S207, the control solid-state hard disk controller allocates a physical page number for the logical block address, and stores the physical page number in the third corresponding to the logical block address in the main memory. After the level mapping table, it also includes:

Further, after the step of writing the physical page number into the solid state hard disk, the step S208 further includes:

Further, in step S209, if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, indexing the level 3 mapping in the solid state hard disk according to the global level 2 mapping table In the table, after reading and storing the 3-level mapping table in the SSD corresponding to the logical block address in the main storage, the method further includes:

The beneficial effect is: looking up the level 3 mapping table corresponding to the logical block address in the level 2 mapping table according to the logical block address of the data to be read or written, and reading out the level 3 mapping table from the level 3 mapping table The data or the multi-level sequential mapping scheme in which the data is written in the physical page number allocated for the logical block address, since only the index of the level 3 mapping table is stored in the level 2 mapping table, and only in the main memory The level 3 mapping table in the middle does not store the data to be read or written, The 3-level mapping table corresponding to the logical block address in the SSD is written into the main memory, thereby solving the problem that the page-level mapping needs a large amount of main storage space due to the small mapping granularity in the case of large-capacity storage. It also avoids the performance instability problem caused by the data involved in the block-level mapping block operation, thereby simplifying the mapping relationship to reduce the consumption of the main memory space and maintaining the performance stability.

As shown in FIG. 3, another address mapping method based on large-capacity solid-state storage provided by an embodiment of the present invention includes:

Step S301, acquiring a read command for reading data in the solid state hard disk, where the read command carries a logical block address of the data to be written;

In step S302, the physical page number corresponding to the logical block address stored in the level 3 mapping table in the main memory is queried through the global level 2 mapping table in the main memory, and the global level 2 mapping table is used for indexing. a level 3 mapping table in the main memory and a level 3 mapping table in the solid state hard disk;

Step S303, if the physical page number corresponding to the logical block address is not stored in the level 3 mapping table in the main memory, indexing the solid state hard disk according to the global level 2 mapping table. a level 3 mapping table, the logical block address stored in the level 3 mapping table in the solid state hard disk and a physical page number corresponding to the logical block address are read out;

Step S304, reading the data from the physical page.

As shown in FIG. 4, another address mapping method based on large-capacity solid-state storage provided by an embodiment of the present invention includes:

Step S401, acquiring a command for reading or writing data in the solid state hard disk, where the command includes a read command or a write command;

Step S402, determining that the command is a read command or a write command;

Step S403, if the command is a read command, the read command carries a logical block address, and passes through the main memory. a level 2 mapping table, which is configured to query a physical page number corresponding to the logical block address stored in the level 3 mapping table in the main memory, where the global level 2 mapping table is used to index level 3 in the main memory. Mapping table and level 3 mapping table in SSD;

Step S404, if the physical page number corresponding to the logical block address is not stored in the level 3 mapping table in the main memory, indexing the solid state hard disk according to the global level 2 mapping table. a level 3 mapping table, the logical block address stored in the level 3 mapping table in the solid state hard disk and a physical page number corresponding to the logical block address are read out;

Step S405, reading the data from the physical page;

Step S406, if the command is a write command, the write command carries a logical block address of the data to be written and the data to be written, and queries the logical block address according to the global level 2 mapping table. Corresponding to the level 3 mapping table in the main memory, the global level 2 mapping table is used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk, the level 3 mapping table a mapping relationship for storing the logical block address and a physical page number corresponding to the logical block address;

Step S407, if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, indexing the level 3 mapping table in the solid state hard disk according to the global level 2 mapping table, a level 3 mapping table in the solid state hard disk corresponding to the logical block address is read out and stored in the main memory;

Step S408, the SSD controller is configured to allocate a physical page number to the logical block address, and store the physical page number in a three-level mapping table corresponding to the logical block address in the main memory.

Step S409, in the three-level mapping table corresponding to the logical block address in the main memory, write the data to be written into the storage space corresponding to the physical page number.

As shown in FIG. 5, another address mapping device based on large-capacity solid-state storage provided by an embodiment of the present invention includes:

The obtaining module 501 is configured to obtain a write command for writing data to the solid state hard disk, where the write command carries the logical block address of the data to be written and the data to be written;

The processing module 502 is configured to query, according to the global level 2 mapping table, the level 3 mapping table in the main memory corresponding to the logical block address, where the global level 2 mapping table is used to index the a level 3 mapping table in the main memory and a level 3 mapping table in the solid state hard disk, wherein the level 3 mapping table is configured to store a mapping relationship between the logical block address and a physical page number corresponding to the logical block address;

The processing module 502 is further configured to: if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, index the level 3 mapping in the solid state hard disk according to the global level 2 mapping table In the table, the level 3 mapping table in the solid state hard disk corresponding to the logical block address is read out and stored in the main memory;

The processing module 502 is further configured to control the SSD controller to allocate a physical page number to the logical block address, and store the physical page number in the third corresponding to the logical block address in the main memory. Level mapping table;

The processing module 502 is further configured to: in the three-level mapping table corresponding to the logical block address in the main memory, write data to be written into a storage space corresponding to the physical page number;

The storage module 503 includes the solid state hard disk 505 module and the main memory module 504, configured to store the global level 2 mapping table, and store the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk. .

The obtaining module 501 is connected to the processing module 502 and the storage module 503 via a bus 506.

Further, the processing module 502 is further configured to: if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, index the solid state according to the global level 2 mapping table The level 3 mapping table in the hard disk is used to read and store the level 3 mapping table in the solid state hard disk corresponding to the logical block address before the main memory.

Further, the processing module 502 is further configured to: control a solid state hard disk controller to allocate a physical page number for the logical block address, and store the physical page number in the logical area of the main memory. After the block address corresponds to the three-level mapping table, it also includes:

Further, the processing module 502 is further configured to write the physical page number into the solid state hard disk. Later, it is also used to:

Further, the processing module 502, if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, indexing the solid state hard disk according to the global level 2 mapping table In the level 3 mapping table, after the level 3 mapping table in the solid state hard disk corresponding to the logical block address is read out and stored in the main memory, it is further used to:

After the control solid state hard disk controller allocates a physical page number to the logical block address, and stores the physical page number in a three-level mapping table corresponding to the logical block address in the main memory, And decrementing a counter corresponding to the logical block address in the three-level mapping table to confirm that the logical block address of the data to be written obtains a corresponding physical page number;

The obtaining module 501 is configured to acquire a read command for reading data in the solid state hard disk, where the read command carries a logical block address of the data to be written;

The processing module 502 is configured to query, by using a global level 2 mapping table in the main memory, a physical page number corresponding to the logical block address stored in the level 3 mapping table in the main memory, where the global level 2 mapping table Used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk;

The processing module 502 is further configured to: if the physical page number corresponding to the logical block address is not stored in the level 3 mapping table in the main memory, according to the global level 2 mapping table index The level 3 mapping table in the solid state hard disk reads the logical block address stored in the level 3 mapping table in the solid state hard disk and a physical page number corresponding to the logical block address;

The processing module 502 is further configured to read the data from the physical page;

The obtaining module 501 is configured to acquire a command for reading or writing data in the solid state hard disk, where the command includes a read command or a write command;

The processing module 502 is configured to determine that the command is a read command or a write command;

The processing module 502 is further configured to: if the command is a read command, the read command carries a logical block address, and in a main memory, the global level 2 mapping table is used to query the storage in the level 3 mapping table in the main memory. The physical page number corresponding to the logical block address, the global level 2 mapping table is used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk;

The processing module 502 is further configured to: if the command is a write command, the write command carries a logical block address to be written data and the to-be-written data, and the query is performed according to the global level 2 mapping table. The level 3 mapping table in the main memory corresponding to the logical block address, where the global level 2 mapping table is used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk. The level 3 mapping table is configured to store a mapping relationship between the logical block address and a physical page number corresponding to the logical block address;

The processing module 502 is further configured to control the SSD controller to allocate a physical page number to the logical block address, and store the physical page number in the main memory. Level mapping table;

The processing module 502 is further configured to write the data to be written into the storage space corresponding to the physical page number in the level 3 mapping table corresponding to the logical block address in the main memory;

As shown in FIG. 6, an address mapping device based on a large-capacity solid-state storage provided by an embodiment of the present invention includes:

The receiver 601 acquires a write command for writing data to the solid state hard disk, where the write command carries the logical block address of the data to be written and the data to be written;

The processor 602 is configured to query, according to the global level 2 mapping table, the primary corresponding to the logical block address And the global level 2 mapping table is used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk, where the level 3 mapping table is used to store the a mapping relationship between a logical block address and a physical page number corresponding to the logical block address;

The processor 602 is further configured to: if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, index the level 3 mapping in the solid state hard disk according to the global level 2 mapping table. In the table, the level 3 mapping table in the solid state hard disk corresponding to the logical block address is read out and stored in the main memory;

The processor 602 is further configured to control the SSD controller to allocate a physical page number to the logical block address, and store the physical page number in the third corresponding to the logical block address in the main memory. Level mapping table;

The processor 602 is further configured to write data to be written into a storage space corresponding to the physical page number in a three-level mapping table corresponding to the logical block address in the main memory;

The memory 603 includes the solid state hard disk 605 and the main memory 604, configured to store the global level 2 mapping table, and store the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk;

The receiver 601 is connected to the processor 602 and the memory 603 via a bus 606.

The beneficial effect is: looking up the level 3 mapping table corresponding to the logical block address in the level 2 mapping table according to the logical block address of the data to be read or written, and reading out the level 3 mapping table from the level 3 mapping table The data or the multi-level sequential mapping scheme in which the data is written in the physical page number allocated for the logical block address, since only the index of the level 3 mapping table is stored in the level 2 mapping table, and only in the main memory When the level 3 mapping table does not store the data to be read or write, the level 3 mapping table corresponding to the logical block address in the solid state hard disk is written into the main memory, thereby solving the problem of mass storage. In the case of page-level mapping, the large amount of storage space is required due to the small granularity of the mapping, and the performance instability problem caused by the data involved in the block-level mapping is avoided, thereby simplifying the mapping relationship to reduce the main The storage space is consumed and the performance is stable. Further, the processor 602 is further configured to: if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, index the solid state according to the global level 2 mapping table The level 3 mapping table in the hard disk is used to read and store the level 3 mapping table in the solid state hard disk corresponding to the logical block address before the main memory.

Further, the processor 602 is further configured to: control a solid state hard disk controller to allocate a physical page number for the logical block address, and store the physical page number in the logical area of the main memory. Three-level mapping corresponding to the block address After the table, it also includes:

Further, after the processor 602 is further configured to write the physical page number into the solid state hard disk, the processor 602 is further configured to:

Further, the processor 602, if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, indexing the solid state hard disk according to the global level 2 mapping table In the level 3 mapping table, after the level 3 mapping table in the solid state hard disk corresponding to the logical block address is read out and stored in the main memory, it is further used to:

After the control solid state hard disk controller allocates a physical page number to the logical block address, and stores the physical page number in a three-level mapping table corresponding to the logical block address in the main memory, And decrementing a counter corresponding to the logical block address in the three-level mapping table to confirm that the logical block address of the data to be written obtains a corresponding physical page number. As shown in FIG. 6, another address mapping device based on large-capacity solid-state storage provided by an embodiment of the present invention includes:

The receiver 601 is configured to acquire a read command for reading data in the solid state hard disk, where the read command carries a logical block address of the data to be written;

The processor 602 is configured to query, by using a global level 2 mapping table in the main memory, a physical page number corresponding to the logical block address stored in the level 3 mapping table in the main memory, where the global level 2 mapping table Used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk;

The processor 602 is further configured to: if the physical page number corresponding to the logical block address is not stored in the level 3 mapping table in the main memory, according to the global level 2 mapping table index The level 3 mapping table in the solid state hard disk reads the logical block address stored in the level 3 mapping table in the solid state hard disk and a physical page number corresponding to the logical block address;

The processor 602 is further configured to read the data from the physical page;

As shown in FIG. 6, another address mapping device based on large-capacity solid-state storage provided by an embodiment of the present invention includes:

The receiver 601 acquires a command for reading or writing data in the solid state hard disk, and the command includes a read command or a write command;

The processor 602 is configured to determine that the command is a read command or a write command.

The processor 602 is further configured to: if the command is a read command, the read command carries a logical block address, and in a main memory, through a global level 2 mapping table, querying the storage in the level 3 mapping table in the main memory. The physical page number corresponding to the logical block address, the global level 2 mapping table is used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk;

The processor 602 is further configured to: if the command is a write command, the write command carries a logical block address to be written data and the to-be-written data, and the query is performed according to the global level 2 mapping table. The level 3 mapping table in the main memory corresponding to the logical block address, where the global level 2 mapping table is used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk. The level 3 mapping table is configured to store a mapping relationship between the logical block address and a physical page number corresponding to the logical block address;

FIG. 7 is a structural diagram of another apparatus for address mapping based on large-capacity solid-state storage according to an embodiment of the present invention;

The apparatus is configured to perform the foregoing various address mapping methods based on large-capacity solid-state storage in the present application. The device includes: a server 701, a solid state hard disk 702, a bus 707, the server 701 includes a processor 702 and a main memory 703, the solid state hard disk includes a solid state hard disk control right 705 and a memory chip 706, the solid state hard disk 704, processing Both the 702 and the main memory 703 are connected to the bus 707.

FIG. 8 is a structural diagram of another apparatus for address mapping based on large-capacity solid-state storage according to an embodiment of the present invention;

The apparatus is configured to perform the foregoing various address mapping methods based on large-capacity solid-state storage in the present application. The device includes: a server 801, a solid state hard disk 802, a bus 807, and a receiver 808. The server 801 includes a processor 802 and a main memory 803. The solid state hard disk includes a solid state hard disk control right 805 and a memory chip 806. The solid state hard disk 804, the processor 802, the main memory 803, and the receiver 808 are both connected to the bus 807, and the receiver 808 is connected to the solid state hard disk 804.

Indexing the level 2 mapping table in the main memory by the level 1 mapping table in the main memory, and indexing the level 3 mapping table in the main memory by the level 2 mapping table in the main memory according to the logical block address (LBA), if The level 2 mapping table in the main memory is displayed as TRN as shown in the figure, and N is a positive integer. Then the level 3 mapping table in the main memory is directly continued to find the physical page number (PPN), and there is no need to continue indexing the solid state hard disk. The level 3 mapping table; if it is displayed as null as shown in the level 2 mapping table in the main memory, it means that there is no physical page number to be searched in the main memory, and it is necessary to continue indexing the level 3 in the solid state hard disk. Map the table to find the PPN corresponding to the logical block address.

As shown in FIG. 10, another address mapping table based on large-capacity solid-state storage provided by an embodiment of the present invention;

When the upper layer operating system issues a logical block address (LBA) = 3 read operation, hits in the main memory level 2 mapping table (the first entry LBA = 0), and obtains the address of its main memory level 3 mapping table. 100. The content 1 corresponding to the fourth entry of the main storage level 3 mapping table is the PPN address of the data to be searched, and the upper layer operating system is fed back, and the read data is obtained according to the PPN; If the table is missing, the level 3 mapping table corresponding to the logical block address in the SSD is found according to the address information of the level 3 table in the main memory mapping table, and is stored in the main memory, and the PPN is fed back to the upper operating system.

When the upper layer operating system issues a write request with a logical block address LBA=10, first query the level 2 mapping table in the main memory. Because LBA=10 (8<10<12), the index is directly indexed into the main memory. The third entry of the first table of the level table, the main memory address hit, is the hot data, that is, the third entry in the main memory level 3 table where the address of the main memory address is 200, where PPN=11 is the previous one. LBA-PPN relationship, currently, assign a new physical address 13 to the new write data, PPN=11 is rewritten to 13 in the third entry, and is stored in the log table of the SSD, and the mapping relationship 10-13 (LBA-PPN) is added. The newly obtained PPN is fed back to the upper operating system; if the query level 2 in the main memory is missed, such as a write request of LBA=13, the level 3 of the solid state hard disk is found according to the SSD address in the main storage level 2 table. The location of the mapping table, the PPN corresponding to LBA=13 is 2, the content of the entry in the table is written into the main storage level 3 table, the address space is allocated for the main storage level 3 table, and the information of the address space is written. Go to the corresponding entry of the main memory level 2 mapping table, and assign a new PP to the new write data for the entry where the LBA=13 is located. The N address (PPN=J) rewrites the value of the PPN corresponding to LBA=13 to J, and stores it in the log table of the SSD. The mapping relationship 13-J (LBA-PPN) is added, and the newly obtained PPN is added. Feedback to the upper operating system.

The present invention can be implemented by various embodiments, and the embodiments of the present invention can be implemented by specific software and hardware components, and those skilled in the art can think that various software or hardware combinations can also be applied to implement the embodiments of the present invention. The above specific operations performed by hardware can also be implemented by software.

Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention, and are not limited thereto; The present invention has been described in detail with reference to the foregoing embodiments. It will be understood by those skilled in the art that the technical solutions described in the foregoing embodiments may be modified, or some or all of the technical features may be equivalently replaced. The modifications and substitutions do not depart from the scope of the technical solutions of the embodiments of the present invention.

Claims

An address mapping method based on large-capacity solid-state storage, comprising:

Obtaining a write command for writing data to the solid state hard disk, where the write command carries a logical block address to be written and the data to be written;

Querying, according to the global level 2 mapping table, a level 3 mapping table in the main memory corresponding to the logical block address, where the global level 2 mapping table is used to index the level 3 mapping table and the solid state hard disk in the main memory. a level 3 mapping table, wherein the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk are used to store a mapping relationship between the logical block address and a physical page number corresponding to the logical block address;

If the level 3 mapping table corresponding to the logical block address does not exist in the main memory, indexing the logical block according to the global level 2 mapping table indexing the level 3 mapping table in the solid state hard disk The level 3 mapping table in the solid state hard disk corresponding to the address is read out and stored in the main memory;

Controlling the SSD controller to allocate a physical page number to the logical block address, and storing the physical page number in a 3-level mapping table corresponding to the logical block address in the main memory;

And in the three-level mapping table corresponding to the logical block address in the main memory, the to-be-written data is written into a storage space corresponding to the physical page number.
The method according to claim 1, wherein, if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, according to the global level 2 mapping table index The third-level mapping table in the SSD, before the third-level mapping table in the SSD corresponding to the logical block address is read and stored in the main storage, and further includes:

Determining whether the space for storing the level 3 mapping table in the main memory reaches a preset threshold. If the preset threshold is reached, the cold data is removed from the main memory and written according to a preset cache rule. To the solid state hard disk, the level 3 mapping table corresponding to the logical block address in the solid state hard disk is written into the main memory providing storage space.
The method according to claim 1 or 2, wherein said control solid state hard disk controller allocates a physical page number to said logical block address, and stores said physical page number in said main memory After the logical level block address corresponds to the level 3 mapping table, it also includes:

Writing the physical page number into the solid state hard disk; or writing the physical page number to the solid state hard disk after writing the logical block address and the physical page number into the main memory.
The method according to claim 3, after the writing the physical page number into the solid state hard disk, further comprising:

The logical block address and the physical page number are updated in the level 2 mapping table and the level 1 mapping table.
The method according to any one of claims 1 to 4, wherein, if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, according to the global level 2 mapping The table index of the three-level mapping table in the SSD, after reading and storing the 3-level mapping table in the SSD corresponding to the logical block address to the main storage, further includes:

Adding a counter corresponding to the logical block address in the 3-level mapping table to one;

After the control solid state hard disk controller allocates a physical page number to the logical block address, and stores the physical page number in a level 3 mapping table corresponding to the logical block address in the main memory, And decrementing a counter corresponding to the logical block address in the 3-level mapping table to confirm that the logical block address of the data to be written obtains a corresponding physical page number.
An address mapping method based on large-capacity solid-state storage, comprising:

Obtaining a read command for reading data in the solid state hard disk, the read command carrying a logical block address of the data to be written;

Querying, by the global level 2 mapping table, the physical page number corresponding to the logical block address stored in the level 3 mapping table in the main memory, where the global level 2 mapping table is used to index the main a 3-level mapping table in the storage and a 3-level mapping table in the solid state hard disk;

If the physical page number corresponding to the logical block address is not stored in the level 3 mapping table in the main memory, indexing the level 3 mapping in the solid state hard disk according to the global level 2 mapping table a table, the logical block address stored in the 3-level mapping table in the solid state hard disk and a physical page number corresponding to the logical block address are read out;

Reading the data from the physical page.
An address mapping method based on large-capacity solid-state storage, comprising:

Obtaining a command for reading or writing data in a solid state hard disk, the command including a read command or a write command;

Determining that the command is a read command or a write command;

If the command is a read command, the read command carries a logical block address, and the global logical level 2 mapping table is used in the main memory to query the logical block address stored in the level 3 mapping table in the main memory. Physical page number, the global level 2 mapping table is used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk;

If the physical page number corresponding to the logical block address is not stored in the level 3 mapping table in the main memory, indexing the level 3 mapping in the solid state hard disk according to the global level 2 mapping table a table, the logical block address stored in the 3-level mapping table in the solid state hard disk and a physical page number corresponding to the logical block address are read out;

Reading the data from the physical page;

If the command is a write command, the write command carries the logical block address of the data to be written and the data to be written, and queries the location corresponding to the logical block address according to the global level 2 mapping table. The level 3 mapping table in the main memory, the global level 2 mapping table is used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk, and the level 3 mapping table in the main memory And a 3-level mapping table 3 level mapping table in the solid state hard disk for storing a mapping relationship between the logical block address and a physical page number corresponding to the logical block address;

If the level 3 mapping table corresponding to the logical block address does not exist in the main memory, indexing the logical block according to the global level 2 mapping table indexing the level 3 mapping table in the solid state hard disk The level 3 mapping table in the solid state hard disk corresponding to the address is read out and stored in the main memory;

Controlling the SSD controller to allocate a physical page number to the logical block address, and storing the physical page number in a 3-level mapping table corresponding to the logical block address in the main memory;

And in the three-level mapping table corresponding to the logical block address in the main memory, the to-be-written data is written into a storage space corresponding to the physical page number.
An address mapping device based on large-capacity solid-state storage, comprising:

Obtaining a module, acquiring a write command for writing data to the solid state hard disk, where the write command carries a logical block address of the data to be written and the data to be written;

a processing module, configured to query, according to the global level 2 mapping table, a level 3 mapping table in the main memory corresponding to the logical block address, where the global level 2 mapping table is used to index the level 3 in the main memory a mapping table and a level 3 mapping table in the solid state hard disk, wherein the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk are used to store the logical block address and a physics corresponding to the logical block address The mapping relationship of page numbers;

The processing module is further configured to: if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, index the level 3 mapping table in the solid state hard disk according to the global level 2 mapping table The third level mapping table in the solid state hard disk corresponding to the logical block address is read out and stored in the main memory;

The processing module is further configured to control the SSD controller to allocate a physical page number to the logical block address, and store the physical page number in the third level corresponding to the logical block address in the main memory. In the mapping table;

The processing module is further configured to write the to-be-written data into a storage space corresponding to the physical page number in a 3-level mapping table corresponding to the logical block address in the main memory;

The storage module includes the solid state hard disk and the main memory, and is configured to store the global level 2 mapping table, and store the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk.
The apparatus of claim 8 wherein said processing module is further The level 3 mapping table corresponding to the logical block address does not exist in the main memory, and the logical block address is corresponding to the level 3 mapping table in the solid state hard disk according to the global level 2 mapping table. Before the level 3 mapping table in the solid state hard disk is read out and stored in the main memory, it is also used to:

Determining whether the space for storing the level 3 mapping table in the main memory reaches a preset threshold. If the preset threshold is reached, the cold data is removed from the main memory and written according to a preset cache rule. To the solid state hard disk, the level 3 mapping table corresponding to the logical block address in the solid state hard disk is written into the main memory providing storage space.
The apparatus according to claim 8 or 9, wherein said processing module further allocates a physical page number to said logical block address and further controls said physical page number After being stored in the level 3 mapping table corresponding to the logical block address in the main memory, the method further includes:

Writing the physical page number into the solid state hard disk; or writing the physical page number to the solid state hard disk after writing the logical block address and the physical page number into the main memory.
The device according to claim 10, wherein the processing module is further configured to: after the file is further used to write the physical page number into the solid state hard disk:

The logical block address and the physical page number are updated in the level 2 mapping table and the level 1 mapping table.
The apparatus according to any one of claims 8-11, wherein, if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, according to the global level 2 mapping table index The level 3 mapping table in the solid state hard disk reads and stores the level 3 mapping table in the solid state hard disk corresponding to the logical block address in the main memory, and is further used to:

Adding a counter corresponding to the logical block address in the 3-level mapping table to one;

After the control solid state hard disk controller allocates a physical page number to the logical block address, and stores the physical page number in a level 3 mapping table corresponding to the logical block address in the main memory, And decrementing a counter corresponding to the logical block address in the 3-level mapping table to confirm that the logical block address of the data to be written obtains a corresponding physical page number.
An address mapping device based on large-capacity solid-state storage, comprising:

Obtaining a module, acquiring a read command for reading data in the solid state hard disk, where the read command carries a logical block address of the data to be written;

a processing module, configured to query, by using a global level 2 mapping table in the main memory, a physical page number corresponding to the logical block address stored in the level 3 mapping table in the main memory, where the global level 2 mapping table is used Indexing the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk;

The processing module is further configured to: if the physical page number corresponding to the logical block address is not stored in the level 3 mapping table in the main memory, index the solid state according to the global level 2 mapping table The level 3 mapping table in the hard disk reads the logical block address stored in the level 3 mapping table in the solid state hard disk and a physical page number corresponding to the logical block address;

The processing module is further configured to read the data from the physical page;

The storage module includes the solid state hard disk and the main memory, and is configured to store the global level 2 mapping table, and store the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk.
An address mapping device based on large-capacity solid-state storage, comprising:

Obtaining a module, acquiring a command for reading or writing data in the solid state hard disk, where the command includes a read command or a write command;

a processing module, configured to determine that the command is a read command or a write command;

The processing module is further configured to: if the command is a read command, the read command carries a logical block address, and in a main memory, through a global level 2 mapping table, querying the third level mapping table stored in the main memory a physical page number corresponding to the logical block address, where the global level 2 mapping table is used to index a level 3 mapping table in the main memory and a level 3 mapping table in the solid state hard disk;

The processing module is further configured to: if the physical page number corresponding to the logical block address is not stored in the level 3 mapping table in the main memory, index the solid state according to the global level 2 mapping table The level 3 mapping table in the hard disk reads the logical block address stored in the level 3 mapping table in the solid state hard disk and a physical page number corresponding to the logical block address;

The processing module is further configured to read the data from the physical page;

The processing module is further configured to: if the command is a write command, the write command carries a logical block address to be written data and the to-be-written data, and the query is performed according to the global level 2 mapping table. a level 3 mapping table in the main memory corresponding to the logical block address, where the global level 2 mapping table is used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk. The level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk are used to store a mapping relationship between the logical block address and a physical page number corresponding to the logical block address;

The processing module is further configured to: if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, index the level 3 mapping table in the solid state hard disk according to the global level 2 mapping table The third level mapping table in the solid state hard disk corresponding to the logical block address is read out and stored in the main memory;

The processing module is further configured to control the SSD controller to allocate a physical page number to the logical block address, and store the physical page number in the third level corresponding to the logical block address in the main memory. In the mapping table;

The processing module is further configured to write the to-be-written data into a storage space corresponding to the physical page number in a 3-level mapping table corresponding to the logical block address in the main memory;

The storage module includes the solid state hard disk and the main memory, and is configured to store the global level 2 mapping table, and store the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk.
An address mapping device based on large-capacity solid-state storage, comprising:

Receiving, by the receiver, a write command for writing data to the solid state hard disk, where the write command carries the logical block address of the data to be written and the data to be written;

a processor, configured to query, according to the global level 2 mapping table, the level 3 mapping table in the main memory corresponding to the logical block address, where the global level 2 mapping table is used to index the main a level 3 mapping table in the storage level 3 and a level 3 mapping table in the solid state hard disk, wherein the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk are used to store the logical block address and the logical block The mapping relationship of the physical page number corresponding to the address;

The processor is further configured to: if a level 3 mapping table corresponding to the logical block address does not exist in the main memory, index a level 3 mapping table in the solid state hard disk according to the global level 2 mapping table. The third level mapping table in the solid state hard disk corresponding to the logical block address is read out and stored in the main memory;

The processor is further configured to control a solid state hard disk controller to allocate a physical page number to the logical block address, and store the physical page number in a level corresponding to the logical block address in the main memory. In the mapping table;

The processor is further configured to write the to-be-written data into a storage space corresponding to the physical page number in a 3-level mapping table corresponding to the logical block address in the main memory;

The memory includes the solid state hard disk and the main memory, and is configured to store the global level 2 mapping table, and store the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk.
The device according to claim 15, wherein the processor is further configured to: if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, according to the The global level 2 mapping table indexes the level 3 mapping table in the solid state hard disk, and reads and stores the level 3 mapping table in the solid state hard disk corresponding to the logical block address before the main memory. Also used for:

Determining whether the space for storing the level 3 mapping table in the main memory reaches a preset threshold. If the preset threshold is reached, the cold data is removed from the main memory and written according to a preset cache rule. To the solid state hard disk, the level 3 mapping table corresponding to the logical block address in the solid state hard disk is written into the main memory providing storage space.
The apparatus according to claim 15 or 16, wherein said processor is further configured to control a solid state hard disk controller to allocate a physical page number to said logical block address, and to apply said physical page number Stored in the main memory After the logical level block address corresponding to the level 3 mapping table, the method further includes:

Writing the physical page number into the solid state hard disk; or writing the physical page number to the solid state hard disk after writing the logical block address and the physical page number into the main memory.
The device according to claim 17, wherein the processor, after the writing is further used to write the physical page number into the solid state hard disk, is further configured to:

The logical block address and the physical page number are updated in the level 2 mapping table and the level 1 mapping table.
The apparatus according to any one of claims 15 to 18, wherein said processor, according to said three-level mapping table corresponding to said logical block address if said main memory is not present, according to said global The level 2 mapping table indexes the level 3 mapping table in the solid state hard disk, and after reading and storing the level 3 mapping table in the solid state hard disk corresponding to the logical block address into the main memory, Used for:

Adding a counter corresponding to the logical block address in the 3-level mapping table to one;

After the control solid state hard disk controller allocates a physical page number to the logical block address, and stores the physical page number in a level 3 mapping table corresponding to the logical block address in the main memory, And decrementing a counter corresponding to the logical block address in the 3-level mapping table to confirm that the logical block address of the data to be written obtains a corresponding physical page number.
An address mapping device based on large-capacity solid-state storage, comprising:

a receiver that acquires a read command for reading data in the solid state hard disk, the read command carrying a logical block address of the data to be written;

a processor, configured to query, by using a global level 2 mapping table in the main memory, a physical page number corresponding to the logical block address stored in the level 3 mapping table in the main memory, where the global level 2 mapping table is used Indexing the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk;

The processor is further configured to: if the physical page number corresponding to the logical block address is not stored in the level 3 mapping table in the main memory, index the solid state according to the global level 2 mapping table The level 3 mapping table in the hard disk reads the logical block address stored in the level 3 mapping table in the solid state hard disk and a physical page number corresponding to the logical block address;

The processor is further configured to read the data from the physical page;

The memory includes the solid state hard disk and the main memory, and is configured to store the global level 2 mapping table, and store the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk.
An address mapping device based on large-capacity solid-state storage, comprising:

a receiver for obtaining a command for reading or writing data in the solid state hard disk, the command comprising a read command or a write command;

a processor, configured to determine that the command is a read command or a write command;

The processor is further configured to: if the command is a read command, the read command carries a logical block address, and in a main memory, through a global level 2 mapping table, querying the third level mapping table stored in the main memory a physical page number corresponding to the logical block address, where the global level 2 mapping table is used to index a level 3 mapping table in the main memory and a level 3 mapping table in the solid state hard disk;

The processor is further configured to: if the physical page number corresponding to the logical block address is not stored in the level 3 mapping table in the main memory, index the solid state according to the global level 2 mapping table The level 3 mapping table in the hard disk reads the logical block address stored in the level 3 mapping table in the solid state hard disk and a physical page number corresponding to the logical block address;

The processor is further configured to read the data from the physical page;

The processor is further configured to: if the command is a write command, the write command carries a logical block address of the data to be written and the data to be written, and the query is performed according to the global level 2 mapping table. a level 3 mapping table in the main memory corresponding to the logical block address, where the global level 2 mapping table is used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk. The level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk are used to store a mapping relationship between the logical block address and a physical page number corresponding to the logical block address;

The processor is further configured to: if a level 3 mapping table corresponding to the logical block address does not exist in the main memory, index a level 3 mapping table in the solid state hard disk according to the global level 2 mapping table. The third level mapping table in the solid state hard disk corresponding to the logical block address is read out and stored in the main memory;

The processor is further configured to control a solid state hard disk controller to allocate a physical page number to the logical block address, and store the physical page number in a level corresponding to the logical block address in the main memory. In the mapping table;

The processor is further configured to write the to-be-written data into a storage space corresponding to the physical page number in a 3-level mapping table corresponding to the logical block address in the main memory;

The memory includes the solid state hard disk and the main memory, and is configured to store the global level 2 mapping table, and store the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk.