WO2017052467A1

WO2017052467A1 - A modulator circuit and method of forming thereof

Info

Publication number: WO2017052467A1
Application number: PCT/SG2015/050342
Authority: WO
Inventors: Ching Eng Jason PNG
Original assignee: Optic2Connect (O2C) Pte Ltd
Priority date: 2015-09-25
Filing date: 2015-09-25
Publication date: 2017-03-30

Abstract

A modulator circuit (100) for electro-optical communication is disclosed, and it comprises a semiconductor substrate (105); a first semiconductor portion (102) doped using a first dopant, and a second semiconductor portion (104) doped using a second dopant which is different to the first dopant, wherein at least the second semiconductor portion is formed on the semiconductor substrate, and at least one portion of the first semiconductor portion is stacked directly to the second semiconductor portion to form a circuit junction; and wherein the first and second semiconductor portions are respectively doped with cooperating doping concentrations of about between 5e¹⁶/cm³to 1e¹⁹/cm³ to enable a depletion region to be formed within the circuit junction when in use, to electrically insulate the first and second semiconductor portions from each other. A method of forming the modulator circuit is also disclosed.

Description

A MODULATOR CIRCUIT AND METHOD OF FORMING THEREOF

Field

The present invention relates to a modulator circuit and method of forming thereof.

Background

Datacentre infrastructure and large area networks are one of the fastest growing sectors for the IT networking industry, as a result of an ever-increasing need for a large number of high-speed networking connection links between servers and switches. Typical operating criteria for datacentres and networks revolve around the need for operations to be low cost, and also at the same time enable high performance, high density, and low power connections. In relation, it is to be appreciated, that the size, power dissipation, and cost structure of modern coherent transceivers, which were originally developed for long-haul applications, tend to limit the application of such transceivers in more cost- sensitive environments where space comes at a high premium. Thus, line-card density becomes a very important criterion under such a situation. Consequently, a need for lower-costs coherent transceivers, with a smaller component footprint, has become increasingly important.

Silicon photonics may potentially play an important role in delivering the aforementioned requirements. The potential disruption of silicon photonics lies in enabling high-speed transmission of 40G and 100G in two Multi-source agreement (MSA) form-factor families. One of the challenges is to realize a silicon optical modulator, which is a crucial device for enabling data transmission. In this regard, the plasma dispersion effect is the most common method adopted for used in a silicon optical modulator. Specifically, the real and imaginary parts of the refractive index tend to change with an available concentration of free carriers, and such changes in the real and imaginary parts of the refractive index have previously been evaluated qualitatively at a telecommunication wavelength of 1 .55μιτι. To manipulate the charge density for silicon, several common approaches, such as carrier injection, accumulation and depletion, may be adopted. One object of the present invention is therefore to address at least one of the problems of the prior art and/or to provide a choice that is useful in the art.

Summary

According to a 1 ^st aspect of the invention, there is provided a modulator circuit for electro-optical communication, comprising a semiconductor substrate; a first semiconductor portion doped using a first dopant; and a second semiconductor portion doped using a second dopant which is different to the first dopant, wherein at least the second semiconductor portion is formed on the semiconductor substrate, and at least one portion of the first semiconductor portion is stacked directly to the second semiconductor portion to form a circuit junction; and wherein the first and second semiconductor portions are respectively doped with cooperating doping concentrations of about between 5e¹⁶/cm³ to 1 e¹⁹/cm³ to enable a depletion region to be formed within the circuit junction when in use, to electrically insulate the first and second semiconductor portions from each other.

Advantageously, the proposed modulator circuit does not require a dielectric layer to be formed between the first and second semiconductor portions to be electrically insulated from each other, when in use. Instead, the electrical insulation is provided by way of using specific cooperating doping concentrations in the first and second semiconductor portions, which then beneficially allow a depletion region to consequently be formed between the first and second semiconductor portions (when the modulator circuit is in use, electrically speaking). Accordingly, the modulator circuit is characterised by substantial low absorption losses and high phase shift efficiency. This also means that it is much easier to fabricate the modulator circuit (compared to conventional solutions), thus leading to lower manufacturing costs. Preferably, the first and second semiconductor portions may electrically be couplable to a waveguide circuit, which includes a coplanar waveguide.

Preferably, the first and second semiconductor portions may be arranged to have a width of about between 400 nm to 1000 nm. Preferably, the first and second semiconductor portions may collectively be arranged to have a height of about between 220 nm to 6000 nm.

Preferably, the first and second semiconductor portions may be formed of silicon-based materials including amorphous, polycrystalline or crystalline silicone.

Preferably, the modulator circuit may further comprise third and fourth semiconductor portions respectively coupled to the first and second semiconductor portions, wherein the first and second semiconductor portions are electrically couplable to the waveguide circuit via the third and fourth semiconductor portions, and wherein the third and fourth semiconductor portions are respectively doped using the first and second dopants with a doping concentration of about 1e²⁰/cm³.

Preferably, the first and second dopants may respectively include an n-type dopant and a p-type dopant.

Optionally, the first and second dopants may respectively include a p-type dopant and an n-type dopant.

Preferably, the first and second semiconductor portions may include being electrically couplable to respectively a signal electrode and a ground electrode of the waveguide circuit.

Preferably, the modulator circuit may further comprise a fifth semiconductor portion doped using a p^"-type dopant, and arranged to abut the first and second semiconductor portions. Preferably, the fifth semiconductor portion may be arranged to have a width of about between 20 nm to 300 nm.

Preferably, the circuit junction may include being devoid of a dielectric layer. Preferably, the first and second semiconductor portions may respectively be doped with doping concentrations of about 5e¹⁷/cm³ and 4e¹⁷/cm³, or 4e¹⁷/cm³ and 5e¹⁷/cm³. According to a 2^nd aspect of the invention, there is provided a method of forming a modulator circuit for electro-optical communication, comprising: (i) providing a first semiconductor portion doped using a first dopant, and a second semiconductor portion doped using a second dopant which is different to the first dopant; (ii) forming at least the second semiconductor portion on a semiconductor substrate; and (iii) stacking directly at least one portion of the first semiconductor portion to the second semiconductor portion to form a circuit junction, wherein the first and second semiconductor portions are respectively doped with cooperating doping concentrations of about between 5e ⁶/cm³ to 1 e¹⁹/cm³ to enable a depletion region to be formed within the circuit junction when in use, to electrically insulate the first and second semiconductor portions from each other.

Preferably, the first and second dopants may respectively include an n-type dopant and a p-type dopant. Alternatively, the first and second dopants may respectively include a p-type dopant and an n-type dopant.

Preferably, the method may further comprise doping the first and second semiconductor portions respectively with doping concentrations of about 5e¹⁷/cm³ and 4e¹⁷/cm³, or 4e¹⁷/cm³ and 5e¹⁷/cm³.

It should be apparent that features relating to one aspect of the invention may also be applicable to the other aspects of the invention. These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments described hereinafter.

Brief Description of the Drawings

Embodiments of the invention are disclosed hereinafter with reference to the accompanying drawings, in which:

FIG. 1 shows the cross-sectional schematics of a modulator circuit, according to a first embodiment;

FIG. 2 shows an optical mode profile of the modulator circuit of FIG. 1 at zero biasing voltage;

FIG. 3 shows a series of photographs depicting the carrier depletion region of the modulator circuit of FIG. 1 when applied with biasing voltages ranging from 0 V to -9 V;

FIG. 4 includes FIGs. 4a and 4b, which show respective graphs depicting absorption loss and phase shift efficiency, with respect to applied voltage, of the modulator circuit of FIG. 1 ;

FIG. 5 shows the cross-sectional schematics of another modulator circuit, according to a second embodiment;

FIG. 6 shows a series of photographs depicting an overlap between the optical mode field and carrier depletion region of the modulator circuit of FIG. 5 when applied with different biasing voltages;

FIG. 7 includes FIGs. 7a and 7b, which show respective graphs depicting absorption loss and phase shift efficiency, with respect to applied voltage, of the modulator circuit of FIG. 5;

FIG. 8 includes FIGs. 8a and 8b, which show respective graphs depicting phase shift efficiency and absorption loss, with respect to applied voltage, of the modulator circuit of FIG. 1 ; and

FIG. 9 includes FIGs. 9a and 9b, which show respective graphs depicting phase shift efficiency and absorption loss, with respect to applied voltage, of the modulator circuit of FIG. 1.

Detailed Description of Preferred Embodiments

1. Design

FIG. 1 shows schematics of a first modulator circuit 100 arranged for electro- optical communication, according to a first embodiment. The first modulator circuit 100 may also be termed as a phase shifter/phase modulator. Broadly, the modulator circuit 100 comprises a first semiconductor portion 102 doped using a first dopant, and a second semiconductor portion 104 doped using a second dopant, which is different to the first dopant. The second semiconductor portion 104 is formed on a semiconductor substrate 105, which in this case includes a silicon dioxide (Si0₂) layer 105a formed on a silicon layer 105b, although it is not to be constructed as limiting. It is to be appreciated that two doping configurations are possible: (i). the first and second dopants are respectively an n-type dopant and a p-type dopant, or (ii). the first and second dopants are respectively a p-type dopant and an n-type dopant. So for configuration (i), the first and second semiconductor portions 102, 104 are respectively doped with cooperating doping concentrations of about 4e¹⁷/cm³ and 5e¹⁷/cm³, whereas for configuration (ii), the first and second semiconductor portions 102, 104 are then respectively doped with cooperating doping concentrations of about 5e¹⁷/cm³ and 4e ⁷/cm³. It is to be appreciated that there are a range of doping concentration levels that may cause a depletion region to be formed in the first modulator circuit 100, However to achieve good device characteristics and operation, a design of experiment (DOE) on different levels of doping concentrations on the first and second semiconductor portions 102, 104 are performed. Usually to achieve reasonable acceptable absorption losses, a tolerance level for the doping concentrations selected is kept to about within the 10¹⁷ atoms/cm³ range.

It is highlighted that respective thicknesses of the first and second semiconductor portions 102, 104 adopted are crucial, although dependent on the fabrication processes. For sake of discussion, assuming an ideal case, reducing the associated thicknesses of the first and second semiconductor portions 102, 104 symmetrically leads to performance improvement of the first modulator circuit 100, i.e. see graphs 800, 850 of FIGs. 8a and 8b. But in view of fabrication restrictions, asymmetrical thicknesses may instead be adopted for the first and second semiconductor portions 102, 104, in this embodiment. This means, for example, the second semiconductor portion104 may have a thickness of about 100 nm (and usually this thickness is determined by foundry design rules), whereas the first semiconductor portion 102 may have a thickness of about 20 nm, which can easily be epitaxially grown. Notably, having an asymmetrical thickness arrangement does not however degrade the device performance of the first modulator circuit 100, i.e. see graphs 900, 950 of FIGs. 9a and 9b. It is to be noted that the definition "nslab" in the graph legend areas of FIGs. 9a and 9b refers to the first semiconductor portion 102.

In addition, at least one portion of the first semiconductor portion 102 is stacked directly to the second semiconductor portion 104 to form a circuit PN junction 106, and the first and second semiconductor portions 102, 104 are electrically couplable to a waveguide circuit (not shown) to enable the electro-optical communication. The waveguide circuit (e.g. a coplanar waveguide (CPW)) is used to drive the modulator circuit 100 at high speeds. Specifically, it is not required to form a dielectric layer intermediate the first and second semiconductor portions 102, 104 to electrically insulate them from each other, when in use. Instead, the electrical insulation is advantageously provided by utilising the specific doping concentrations, as afore disclosed, which beneficially allow a depletion region to be generated between the first and second semiconductor portions 102, 104 (when the first modulator circuit 100 is in use). Also, the first and second semiconductor portions 102, 104 are formed of silicon in this case, but however not to be construed as limiting. That is, other silicon- based materials such as amorphous, polycrystalline, or crystalline silicon are also possible. For this case, the first modulator circuit 100 is formed so that the entire first semiconductor portion 102 is stacked on top of the second semiconductor portion 104 to form the circuit PN junction 106 having a ridge height of about 220 nm, and a width of about 500 nm. The first semiconductor portion 102 is in turned arranged to have an extended section which abuts a slab of third semiconductor portion 108 (which is highly n-type or p-type doped, depending on whether configuration (i) or (ii) is adopted, with doping concentration of about 10²⁰ atoms/cm³), whereas the second semiconductor portion 104 is arranged to have an extended section that abuts a slab of fourth semiconductor portion 1 10 (which is highly p-type or n-type doped, again depending on whether configuration (i) or (ii) is adopted, again with doping concentration of about 10²⁰ atoms/cm³). That is, the third semiconductor portion 108 is to be doped using the same dopant as the first semiconductor portion 102, while the fourth semiconductor portion 1 10 is to be doped using the same dopant as the second semiconductor portion 104. More specifically, the said doping concentrations used in configuration (i) or (ii) are purposefully devised so that the circuit PN junction 106 may substantially be fully depleted (when in use) to enable reduced optical loss during performance of electro-optical communication, as already explained.

The third and fourth semiconductor portions 108, 1 10 are then respectively connectable to a signal electrode 1 12 and a ground electrode 1 14 of the waveguide circuit. Specifically, the third semiconductor portion 108 is coupled to the signal electrode 1 12 via an intermediate first ground metallization portion 1 16 (e.g. made of aluminium, aluminium-based alloy, or other suitable metallisation materials), while the fourth semiconductor portion 1 10 is coupled to the ground electrode 1 14 via an intermediate second ground metallization portion 1 18 (e.g. made of aluminium, aluminium-based alloy, or other suitable metallisation materials). Any remaining spaces in the first modulator circuit 100 are then filled using a cladding material (e.g. formed from silicon dioxide, or other suitable materials that allow optical mode confinement and electrical isolation). It is to be appreciated that the external waveguide circuit is then connected to the signal electrode 1 2 and ground electrode 1 14 (e.g. via wire bonding) to be electrically coupled to the first modulator circuit 100. The first modulator circuit 100 may be incorporated into a symmetric or an asymmetric Mach-Zehnder Interferometer (MZI) structure with an arm length mismatch of about 180 pm to switch between phase and intensity modulation modes. It is to be appreciated that a key advantage of the design for the first modulator circuit 100 is the simplicity during fabricating the first modulator circuit 100, since there is no need to form a dielectric layer.

Broadly, a method of forming the first modulator circuit 100 includes: (i) providing the first semiconductor portion 102 doped using the first dopant, and the second semiconductor portion 104 doped using the second dopant which is different to the first dopant; (ii) forming at least the second semiconductor portion 104 on the semiconductor substrate 105; and (iii) stacking directly at least one portion of the first semiconductor portion 102 to the second semiconductor portion 104 to form the circuit PN junction 106. It is to be appreciated by now that the first and second semiconductor portions 102, 104 are respectively doped with cooperating doping concentrations of about 5e¹⁷/cm³ and 4e ⁷/cm³, or 4e¹⁷/cm³ and 5e¹⁷/cm³ to enable a depletion region to be formed within the circuit PN junction 106 when in use, to electrically insulate the first and second semiconductor portions 102, 104 from each other.

Specifically, by applying a negative voltage to the first modulator circuit 100 to deplete extrinsic carriers in the circuit PN junction 106, the core region becomes intrinsic (i.e. approximately 1 e¹⁵/cm³ to 1e¹⁶/cm³) and be void of extrinsic carriers. Hence, the core region of the circuit PN junction 106 is effectively an insulating region, i.e. the depletion region. Therefore there is no need to achieve the same insulating effect by including a dielectric layer, which is conventionally the case. 2. Results and Discussions

For performance evaluations of the first modulator circuit 100, propagation constants of the first modulator circuit 100 across various voltage biasing points are calculated using the finite difference beam propagation method, in which semi-vector and full-vector description of the said method are disclosed in numerous literatures (and hence not repeated here for brevity). It is to be appreciated that implementation of the method for the said performance evaluations take into consideration the eigenmodes and propagation constants of the first modulator circuit 100 calculated using the Scipy eigs function, which is based on the Implicitly Restarted Arnoldi Method (IRAM), known in the art. An optical solver (generally available from suitable related commercial/open source software) discretises the standard Wave Equation, forms a sparse matrix, and solves the eigenvalue to obtain a fundamental optical mode profile of the first modulator circuit 100, and the effective indices of the first modulator circuit 100. Accordingly, the optical mode profile of the modulator circuit of FIG. 1 at zero biasing voltage is shown in a diagram 200 of FIG. 2.

FIG. 3 shows a series 300 of photographs depicting the carrier depletion region of the first modulator circuit 100, when applied with DC biasing voltages ranging from 0 V to -10 V. Specifically, the first modulator circuit 100 is hooked up to a probing device (not shown), in which a DC biasing voltage is applied (via an anode of the device), increased from 0 V to -10 V, in gradual 1 V steps. Then the carrier concentrations/distributions of the circuit PN junction 106 at each reverse biasing voltage point are calculated. It is to be appreciated that based on the plasma dispersion effect, complex refractive indices change are known to happen with different carrier concentrations in silicon. So, according to the equations governing the plasma dispersion effect, carrier concentrations may mathematically be transformed to corresponding changes in refractive indices of the circuit PN junction 106 at each reverse biasing voltage of 0 V to -10 V. Specifically, the resulting effective refractive indices are dependent on the carrier concentrations at different reverse biasing voltages. Then, a phase difference between two biasing voltages is calculated using equation (1 ) below:

Αφ = 2TT j (% , _i - n_{R VZ}) (1 ) wherein L is a length of the circuit PN junction 106, λ is a wavelength of light used for telecommunication transmission in the waveguide circuit (which is usually in the region of 1550 nm or 1310 nm, although other different wavelengths may be used, depending on applications), Aneff = n_StV1 - n_{R :z} is the difference corresponding to a real effective index between any two biasing voltages V-, and V₂. Then, a phase shift efficiency of the circuit PN junction 106 is defined as Δφ/Δ\ , where AV represents a voltage difference.

The absorption loss of the circuit PN junction 106 is calculated using the imaginary refractive index at each reverse biasing voltage via equation (2) below: loss = e~ ^7!niL/1 (2)

Referring back to FIG. 3, it may clearly be seen from the series of photographs that there is gradual widening of the carrier depletion region when increasing biasing voltages are applied to the first modulator circuit 100. In this respect, it is to be appreciated that the wider the carrier depletion region within the core of the waveguide circuit, the better an efficiency (in terms of phase shift and absorption loss) that may be achieved by the first modulator circuit 100. This efficiency however does not extend to voltages, because at higher depletion voltages, more power is instead required to operate the first modulator circuit 100.

Next, the phase shift efficiency and absorption loss of the first modulator circuit 100 under different biasing conditions are studied, and the results obtained are shown in FIG. 4. In particular, FIG. 4 includes FIGs. 4a and 4b, which show respective graphs 400, 450 depicting the absorption loss and phase shift efficiency results. Referring to FIG. 4a, the absorption loss of the first modulator circuit 100 is simulated and obtained by way of the overlap between free carriers' concentration and optical mode distribution. The absorption loss is typically expressed as loss (dB/mm), and is calculated from the imaginary part of a complex effective index of typical optical mode solvers, while the phase efficiency is denoted as (2it/mm) and is calculated from the real part of the complex effective index. In respect of the biasing conditions, the biasing voltages from 0 V to -8 V are applied (i.e. as reverse biasing voltages), which then cause depletion of carriers from the junction of p-doped and n-doped regions as previously depicted in FIG. 3. It is to be noted that the value of An_eff increases when increasing reverse biasing voltages are applied, and hence higher phase changes are induced due to increasing carrier depletion in the core region of the first modulator circuit 100. On the other hand, a reduction in the carriers concentration consequently causes a decrease in the carrier induced absorption of the light that is propagating through the first modulator circuit 100. Therefore, the absorption losses of the first modulator circuit 100 decrease when increasing reverse biasing voltages are applied. This effect occurs likely due to the depletion region being formed closer to the centre of the first modulator circuit 100, thus allowing greater interaction between the optical mode and the depletion region. To clarify the interaction stated in the preceding sentence, it is to be appreciated that for a typical modulator circuit, the "optical mode" that can be supported and guided by a "waveguide" (which in this case is influenced by the geometry of the circuit PN junction 106) first needs to be determined, after which, the electrical content of PN junction topology is formed, based on different concentrations. The optical mode propagates along the "waveguide" having the same geometry as the modulator circuit without the PN junction and subsequently enters the modulator circuit. Hence, the optical mode will interact with the "depletion region" depending on the bias voltages applied. Based on FIG. 4, and optimising the first modulator circuit 100 to have a length of 3 mm, a -3 V peak-to-peak (p-p) is achievable, with absorption losses ranging from 0.73 dB to 2.15 dB, when a DC biasing voltage of -2 V is applied to the first modulator circuit 100. Specifically, it is to be appreciated that the voltage of -3 V peak to peak is sufficient to deplete extrinsic carriers to obtain the desired change in the refractive index of the first modulator circuit 100 to achieve a pi- phase shift. On the other hand, if the first modulator circuit 100 is instead to have a length of 4 mm, it is then possible to achieve a 2 V peak-to-peak, with absorption losses ranging from 1.42 dB to 2.85 dB, when a DC biasing voltage of -1.5 V is applied.

Hence, it is to be appreciated that the first modulator circuit 100 is characterised by substantially low absorption losses and high phase shift efficiency. Moreover, the voltage peak-to-peak of the first modulator circuit 100 may be reduced from 3 V to 2 V, while still enable high phase shift efficiency and absorption losses below 3 dB to be attained.

The remaining configurations will be described hereinafter. For the sake of brevity, description of like elements, functionalities and operations that are common between the different configurations are not repeated; reference will instead be made to similar parts of the relevant configuration(s).

According to a second embodiment, a second modulator circuit 500 is depicted in FIG. 5. Structurally, the second modulator circuit 500 is largely similar to the first modulator circuit 100, except that the first semiconductor portion 102 is now formed with a substantially L-shaped like profile. Particularly, the L-shaped like profile enables maximization of modulation efficiency for the second modulator circuit 500, and enhances the overlapping between the optical mode and carrier depletion region. Also, the second modulator circuit 500 includes a fifth semiconductor portion 502 doped using a p^"-type dopant, and is arranged to abut the first and second semiconductor portions 102, 104. Specifically, in this instance, a short edge of the fifth semiconductor portion 502 abuts the second semiconductor portion 104, while a long edge of the fifth semiconductor portion 502 abuts the first semiconductor portion 102. The short edge of the fifth semiconductor portion 502 is 50 nm wide, and the fifth semiconductor portion 502 is formed of silicon. The fifth semiconductor portion 502 is doped with a doping concentration less than that used for the second semiconductor portion 104. But, the fifth semiconductor portion 502 may also be formed of silicon- based materials such as amorphous, polycrystalline, or crystalline silicon. Alternatively, the fifth semiconductor portion 502 may be formed of intrinsic silicon, which is easier to fabricate or manufacture. Together, the first, second and fifth semiconductor portions 102, 104, 502 collectively form a circuit PN junction 504, which has a ridge height of about 220 nm, and a width of about 600 nm. The first semiconductor portion 102 now also includes an extension portion that is formed on the semiconductor substrate 105, and importantly, the extension portion is arranged to abut the third semiconductor portion 108. The extension portion in this case has a slab height of about 100 nm. It is to be appreciated that p-doped and n-doped regions in the second modulator circuit 500 are interchangeable in arrangement for variant embodiments, and certainly not limited to that shown in FIG. 5.

FIG. 6 shows a series 600 of photographs depicting an overlap between the optical mode field and carrier depletion region of the second modulator circuit 500, when applied with different biasing voltages. It may be seen from FIG. 6 that when different biasing voltages are applied, the circuit PN junction 504 induces a larger alteration in the overlap between optical mode field and the carrier depletion region, thus leading to higher modulation efficiency.

To evaluate the performance of the second modulator circuit 500, the phase shift efficiency and absorption loss performances of the second modulator circuit 500 are investigated. According, the evaluation results obtained are shown in FIG. 7, which includes FIGs. 7a and 7b respectively showing graphs 700, 750 depicting the absorption loss and phase shift efficiency, with respect to applied voltage. It is to be appreciated that from FIG. 7, if the second modulator circuit 500 is configured to have an optimised length of 3 mm, a -3 V peak to peak, with absorption losses ranging from 1 .36 dB to 2.82 dB, may be obtained at a DC biasing voltage of -1.7 V. Again, it is to be appreciated that the voltage of -3 V peak to peak is sufficient to deplete extrinsic carriers to attain the desired change in the refractive index of the second modulator circuit 500 to achieve a pi-phase shift. Then, FIG. 8 shows a comparison table 800 depicting advantages of the first and second modulator circuits 100, 500 with respect to conventional solutions.

In summary, since the first and second modulator circuits 100, 500 are advantageously configured to make use of the depletion region (generated in the first and second semiconductor portions 102, 104) for electrical insulation (as opposed to instead having a dielectric layer), which is insensitive to carrier lifetime, there is thus greater potential for enabling applications (e.g. electro- optical communications) that require high-speed transmissions (e.g. in excess of tens of Gigabits/second).

While the invention has been illustrated and described in detail in the drawings and foregoing description, such illustration and description are to be considered illustrative or exemplary, and not restrictive; the invention is not limited to the disclosed embodiments. Other variations to the disclosed embodiments can be understood and effected by those skilled in the art in practising the claimed invention. For example, the doping concentrations respectively effected to the first and second semiconductor portions 102, 104 may also be selected from a range of about 5e¹⁶/cm³ to 1 e¹⁹/cm³, although it is to be appreciated that an actual doping concentration used is carefully selected to be optimised for a specific targeted application. Also, the width of the first and second semiconductor portions 102, 104 used to form the circuit PN junction 106 may be selected to be anywhere between 400 nm to 1000 nm. Similarly, the ridge height of the circuit PN junction 106 may anywhere be between about 220 nm to 6000 nm. Then, the short edge of the fifth semiconductor portion 502 may anywhere be between about 20 nm wide to about half the width of the circuit PN junction 504. Moreover, the third and fourth semiconductor portions 108, 1 10 may be doped using a doping concentration of about 1e²⁰/cm³. The first modulator circuit 100 may also be modified to have a suitable length, e.g. 4 mm or 5 mm, based on intended applications.

For completeness, it is to be appreciated that the first and second modulator circuits 100, 500 are specifically configured in a Mach-Zehnder Interferometer (MZI) setup, and hence the doping concentrations effected to the first and second semiconductor portions 102, 104 are to be above the level of 5e ⁵/cm³. Nonetheless, if ring resonator structures or other resonant structures are however used, lower levels of doping concentrations may be possible although the device performance may degrade accordingly, as compared to instead using the MZI setup.

Claims

1. A modulator circuit for electro-optical communication, comprising:

a semiconductor substrate;

a first semiconductor portion doped using a first dopant; and

a second semiconductor portion doped using a second dopant which is different to the first dopant,

wherein at least the second semiconductor portion is formed on the semiconductor substrate, and at least one portion of the first semiconductor portion is stacked directly to the second semiconductor portion to form a circuit junction; and

wherein the first and second semiconductor portions are respectively doped with cooperating doping concentrations of about between 5e¹⁶/cm³ to 1 e¹⁹/cm³ to enable a depletion region to be formed within the circuit junction when in use, to electrically insulate the first and second semiconductor portions from each other.

2. The modulator circuit of claim 1 , wherein the first and second semiconductor portions are electrically couplable to a waveguide circuit, which includes a coplanar waveguide.

3. The modulator circuit of any preceding claims, wherein the first and second semiconductor portions are arranged to have a width of about between 400 nm to 1000 nm.

4. The modulator circuit of any preceding claims, wherein the first and second semiconductor portions are collectively arranged to have a height of about between 220 nm to 6000 nm.

5. The modulator circuit of any preceding claims, wherein the first and second semiconductor portions are formed of silicon-based materials including amorphous, polycrystalline or crystalline silicone.

6. The modulator circuit of claim 2, further comprising third and fourth semiconductor portions respectively coupled to the first and second semiconductor portions,

wherein the first and second semiconductor portions are electrically coupiable to the waveguide circuit via the third and fourth semiconductor portions, and

wherein the third and fourth semiconductor portions are respectively doped using the first and second dopants with a doping concentration of about 1 e²⁰/cm³.

7. The modulator circuit of any preceding claims, wherein the first and second dopants respectively include an n-type dopant and a p-type dopant.

8. The modulator circuit of any of claims 1 to 6, wherein the first and second dopants respectively include a p-type dopant and an n-type dopant.

9. The modulator circuit of claim 2, wherein the first and second semiconductor portions include being electrically coupiable to respectively a signal electrode and a ground electrode of the waveguide circuit.

10. The modulator circuit of any preceding claims, further comprising a fifth semiconductor portion doped using a p^"-type dopant, and arranged to abut the first and second semiconductor portions.

11 . The modulator circuit of claim 10, wherein the fifth semiconductor portion is arranged to have a width of about between 20 nm to 300 nm.

12. The modulator circuit of any preceding claims, wherein the circuit junction includes being devoid of a dielectric layer.

13. The modulator circuit of any preceding claims, wherein the first and second semiconductor portions are respectively doped with doping concentrations of about 5e¹⁷/cm³ and 4e¹⁷/cm³, or 4e¹⁷/cm³ and 5e¹⁷/cm³.

14. A method of forming a modulator circuit for electro-optical communication, comprising:

(i) providing a first semiconductor portion doped using a first dopant, and a second semiconductor portion doped using a second dopant which is different to the first dopant;

(ii) forming at least the second semiconductor portion on a semiconductor substrate; and

(iii) stacking directly at least one portion of the first semiconductor portion to the second semiconductor portion to form a circuit junction,

15. The method of claim 14, wherein the first and second semiconductor portions are formed of silicon-based materials including amorphous, polycrystalline or crystalline silicone.

16. The method of claim 14 or 15, wherein the first and second dopants respectively include an n-type dopant and a p-type dopant.

17. The method of claim 14 or 15, wherein the first and second dopants respectively include a p-type dopant and an n-type dopant.

18. The method of any of claims 14 to 17, further comprises doping the first and second semiconductor portions respectively with doping concentrations of about 5e ⁷/cm³ and 4e¹⁷/cm³, or 4e¹⁷/cm³ and 5e ⁷/cm³.