WO2017049276A3 - Methods for designing photonic devices - Google Patents

Methods for designing photonic devices Download PDF

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Publication number
WO2017049276A3
WO2017049276A3 PCT/US2016/052452 US2016052452W WO2017049276A3 WO 2017049276 A3 WO2017049276 A3 WO 2017049276A3 US 2016052452 W US2016052452 W US 2016052452W WO 2017049276 A3 WO2017049276 A3 WO 2017049276A3
Authority
WO
WIPO (PCT)
Prior art keywords
methods
photonic devices
loss
designing
designing photonic
Prior art date
Application number
PCT/US2016/052452
Other languages
French (fr)
Other versions
WO2017049276A2 (en
Inventor
Yang Liu
Michael J. Hochberg
Yangjin Ma
Ruizhi Shi
Original Assignee
Elenion Technologies, Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US14/858,519 external-priority patent/US20160012176A1/en
Application filed by Elenion Technologies, Llc filed Critical Elenion Technologies, Llc
Publication of WO2017049276A2 publication Critical patent/WO2017049276A2/en
Publication of WO2017049276A3 publication Critical patent/WO2017049276A3/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/398—Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/20—Design optimisation, verification or simulation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2119/00—Details relating to the type or aim of the analysis or the optimisation
    • G06F2119/18—Manufacturability analysis or optimisation for manufacturability
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
    • Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

Abstract

A compact, low-loss and wavelength insensitive Y-junction for submicron silicon waveguides. The design was performed using FDTD and particle swarm optimization (PSO). The device was fabricated in a 248 nm CMOS line. Measured average insertion loss is 0.28 ± 0.02 dB across an 8-inch wafer. The device footprint is less than 1.2 μm x 2 μm, orders of magnitude smaller than MMI and directional couplers.
PCT/US2016/052452 2015-09-18 2016-09-19 Methods for designing photonic devices WO2017049276A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14/858,519 US20160012176A1 (en) 2012-11-30 2015-09-18 Methods for designing photonic devices
US14/858,519 2015-09-18

Publications (2)

Publication Number Publication Date
WO2017049276A2 WO2017049276A2 (en) 2017-03-23
WO2017049276A3 true WO2017049276A3 (en) 2017-05-04

Family

ID=57223749

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2016/052452 WO2017049276A2 (en) 2015-09-18 2016-09-19 Methods for designing photonic devices

Country Status (1)

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WO (1) WO2017049276A2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108763740B (en) * 2018-05-28 2019-12-27 西北工业大学 Design method of flexible directivity pattern based on double-vibration-velocity sensor acoustic probe
CN108828934B (en) * 2018-09-26 2021-10-22 云南电网有限责任公司电力科学研究院 Fuzzy PID control method and device based on model identification
CN109635519B (en) * 2019-01-29 2022-06-28 中国电子科技集团公司第二十九研究所 Microwave photonic device modeling method based on electromagnetic field and temperature field coupling
CN114077773A (en) * 2020-08-19 2022-02-22 中兴光电子技术有限公司 Adiabatic coupling waveguide section design method of adiabatic coupler, and apparatus and equipment thereof
US11619784B2 (en) 2021-07-29 2023-04-04 Hewlett Packard Enterprise Development Lp Optical device having photonic-crystal lattice structure for optical interconnects

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140007030A1 (en) * 2012-06-28 2014-01-02 International Business Machines Corporation Integrated design environment for nanophotonics
US20140178005A1 (en) * 2012-11-30 2014-06-26 Yi Zhang Compact and low loss Y-junction for submicron silicon waveguide

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7643714B2 (en) 2005-06-28 2010-01-05 California Institute Of Technology Nanophotonic devices in silicon
US7424192B2 (en) 2005-06-28 2008-09-09 California Institute Of Technology Frequency conversion with nonlinear optical polymers and high index contrast waveguides
US7200308B2 (en) 2005-06-28 2007-04-03 California Institute Of Technology Frequency conversion with nonlinear optical polymers and high index contrast waveguides
US7480434B2 (en) 2006-07-25 2009-01-20 California Institute Of Technology Low loss terahertz waveguides, and terahertz generation with nonlinear optical systems
US7760970B2 (en) 2007-10-11 2010-07-20 California Institute Of Technology Single photon absorption all-optical modulator in silicon

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140007030A1 (en) * 2012-06-28 2014-01-02 International Business Machines Corporation Integrated design environment for nanophotonics
US20140178005A1 (en) * 2012-11-30 2014-06-26 Yi Zhang Compact and low loss Y-junction for submicron silicon waveguide

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
SANCHIS P ET AL: "Highly efficient crossing structure for silicon-on-insulator waveguides", OPTICS LETTERS, OPTICAL SOCIETY OF AMERICA, US, vol. 34, no. 18, 15 September 2009 (2009-09-15), pages 2760 - 2762, XP001548529, ISSN: 0146-9592, [retrieved on 20090909], DOI: 10.1364/OL.34.002760 *
WANG Z ET AL: "1 X 8 CASCADED MULTIMODE INTERFERENCE SPLITTER IN SILICON-ON-INSULATOR", JAPANESE JOURNAL OF APPLIED PHYSICS, JAPAN SOCIETY OF APPLIED PHYSICS, JP, vol. 43, no. 8A, 1 August 2004 (2004-08-01), pages 5085 - 5087, XP001229917, ISSN: 0021-4922, DOI: 10.1143/JJAP.43.5085 *
YI ZHANG ET AL: "A compact and low loss Y-junction for submicron silicon waveguide References and LinksHighly efficient crossing structure for silicon-on-insulator waveguides", OPT. EXPRESS, vol. 21, no. 1, 11 January 2013 (2013-01-11), pages 1310 - 1316, XP055333753 *

Also Published As

Publication number Publication date
WO2017049276A2 (en) 2017-03-23

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