WO2017024705A1 - 芯片及电子装置 - Google Patents

芯片及电子装置 Download PDF

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Publication number
WO2017024705A1
WO2017024705A1 PCT/CN2015/096644 CN2015096644W WO2017024705A1 WO 2017024705 A1 WO2017024705 A1 WO 2017024705A1 CN 2015096644 W CN2015096644 W CN 2015096644W WO 2017024705 A1 WO2017024705 A1 WO 2017024705A1
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Prior art keywords
chip
protection circuit
static electricity
pin
voltage
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PCT/CN2015/096644
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English (en)
French (fr)
Inventor
张先明
陈宥烨
陈明暐
曹丹
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to US14/904,781 priority Critical patent/US20170187183A1/en
Publication of WO2017024705A1 publication Critical patent/WO2017024705A1/zh
Anticipated expiration legal-status Critical
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/04—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
    • H02H9/045—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage adapted to a particular application and not provided for elsewhere
    • H02H9/046—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage adapted to a particular application and not provided for elsewhere responsive to excess voltage appearing at terminals of integrated circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/611—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using diodes as protective elements

Definitions

  • the present invention relates to the field of electronics, and in particular to a chip and an electronic device.
  • Static electricity is an objective natural phenomenon that occurs in a variety of ways, such as contact, friction, and electrical induction. Static electricity is characterized by long-term accumulation, high voltage, low power, small current and short acting time. The body's own actions or contact with other objects, separation, friction or induction can generate static electricity of several thousand volts or even tens of thousands of volts. Frictional electrification and human body static are two major hazards in the electronics industry, often causing unstable or even damaged chips in electronic devices, resulting in poor quality of electronic devices.
  • the invention provides a chip, the chip comprises at least one pin, and the chip is internally provided with at least one static electricity protection circuit for reducing or eliminating static electricity to other components or circuits inside the chip.
  • the electrostatic protection circuit is disposed corresponding to a pin, and the static electricity protection circuit is electrically connected to the pin.
  • the static protection circuit includes a first unidirectional conduction unit and a second unidirectional conduction unit, and the first unidirectional conduction unit includes a first end and a second end, and when the voltage of the first end is greater than the When the voltage of the second end is a preset voltage, the first unidirectional conduction unit is turned on, and the second unidirectional conduction unit includes a third end and a fourth end, when the voltage of the third end is greater than the fourth When the voltage of the terminal is a preset voltage, the second unidirectional conduction unit is turned on, the first end is grounded, the second end is connected to the third end, and the second end is electrically connected to the static electricity protection a corresponding pin of the circuit, and the second end is electrically connected to other components or circuits inside the chip, and the fourth end is loaded with a predetermined positive voltage.
  • the first unidirectional conduction unit and the second unidirectional conduction unit are diodes, the first end and the third end are positive poles of the diode, and the second end and the fourth end are The negative pole of the diode.
  • the pin electrically connected to the static electricity protection circuit is a pin that receives an external signal.
  • the pins of the chip other than the pin receiving the external signal are not electrically connected to the static electricity protection circuit.
  • the present invention also provides an electronic device, the electronic device comprising a chip, the chip comprising at least one pin, the chip is internally provided with at least one static electricity protection circuit for reducing or eliminating static electricity Damage to other components or circuits inside the chip, the static electricity protection circuit is disposed corresponding to one pin, and the static electricity protection circuit is electrically connected to the pin.
  • the static protection circuit includes a first unidirectional conduction unit and a second unidirectional conduction unit, and the first unidirectional conduction unit includes a first end and a second end, and when the voltage of the first end is greater than the When the voltage of the second end is a preset voltage, the first unidirectional conduction unit is turned on, and the second unidirectional conduction unit includes a third end and a fourth end, when the voltage of the third end is greater than the fourth When the voltage of the terminal is a preset voltage, the second unidirectional conduction unit is turned on, the first end is grounded, the second end is connected to the third end, and the second end is electrically connected to the static electricity protection a corresponding pin of the circuit, and the second end is electrically connected to other components or circuits inside the chip, and the fourth end is loaded with a predetermined positive voltage.
  • the first unidirectional conduction unit and the second unidirectional conduction unit are diodes, the first end and the third end are positive poles of the diode, and the second end and the fourth end are The negative pole of the diode.
  • the pin electrically connected to the static electricity protection circuit is a pin that receives an external signal.
  • the pins of the chip other than the pin receiving the external signal are not electrically connected to the static electricity protection circuit.
  • the chip of the present invention and the chip in the electronic device including the chip include at least one static electricity protection circuit capable of reducing or eliminating static electricity to other components or circuits inside the chip The damage thus protects the stability of the chip during operation.
  • the electrostatic protection circuit of the chip of the present invention is disposed inside the chip without providing an electrostatic protection circuit on the periphery of the chip.
  • the electrostatic protection circuit of the present invention is disposed inside the chip compared to the case where the electrostatic protection circuit is disposed on the periphery of the chip, and therefore, the function of the chip is more integrated, avoiding The trouble of externally connecting the ESD protection circuit when using it.
  • FIG. 1 is a schematic diagram showing the circuit structure of a chip according to a preferred embodiment of the present invention.
  • FIG. 2 is a circuit diagram of an electrostatic protection circuit in a chip in accordance with a preferred embodiment of the present invention.
  • FIG. 3 is a schematic diagram showing the circuit structure of an electronic device according to a preferred embodiment of the present invention.
  • FIG. 1 is a schematic structural diagram of a circuit of a chip according to a preferred embodiment of the present invention.
  • 2 is a circuit diagram of an electrostatic protection circuit in a chip in accordance with a preferred embodiment of the present invention.
  • the chip 100 can be disposed in an electronic device.
  • the electronic device includes, but is not limited to, a portable device such as a smartphone, a mobile internet device (MID), an e-book, a Play Station Portable (PSP), or a Personal Digital Assistant (PDA).
  • the chip 100 includes at least one pin 130, and the chip 100 is internally provided with at least one static electricity protection circuit 110 for reducing or eliminating static electricity to other components or circuits inside the chip 100. Damage, the electrostatic protection circuit 110 is disposed corresponding to a pin 130, and the static electricity protection circuit 110 is electrically connected to the pin 130.
  • the static electricity protection circuit 110 includes a first one-way unit 111 and a second one-way unit 112.
  • the first unidirectional conduction unit 111 includes a first end 111a and a second end 111b. When the voltage of the first end 111a is greater than a voltage of the second end 111b by a predetermined voltage, the first single guide The pass unit 111 is turned on.
  • the second unidirectional pass unit 112 includes a third end 112a and a fourth end 112b. When the voltage of the third terminal 112a is greater than the voltage of the fourth terminal 112b by a predetermined voltage, the second unidirectional conduction unit 112 is turned on.
  • the first end 111a is grounded, the second end 111b is connected to the third end 112a, and the second end 111b is electrically connected to the pin 130 corresponding to the static electricity protection circuit 110, and the second end 111b electrically connects other components or circuits within the chip 100.
  • the fourth terminal 112b is loaded with a predetermined positive voltage VCC.
  • the first unidirectional conduction unit 111 is a diode, and correspondingly, the first end 111a is a positive pole of a diode, and the second end 111b is a negative pole of a diode.
  • the voltage of the anode of the diode is greater than a voltage of a negative voltage of the diode by a predetermined voltage, the diode is turned on, otherwise, the diode is turned off.
  • the second unidirectional conduction unit 112 is a diode.
  • the third end 112a is a positive pole of a diode
  • the fourth end 112b is a negative pole of a diode.
  • the pin electrically connected to the static electricity protection circuit 110 is a pin that receives an external signal. Pins other than the pins receiving the external signals in the chip 130 are not electrically connected to the static electricity protection circuit 110. In this way, the chip 100 does not impose other burdens on the chip 100 while having electrostatic protection capability, thereby avoiding an increase in the cost of the chip 100.
  • the voltage of the signal loaded by the pin 130 connected to the static electricity protection circuit 110 is greater than or equal to zero volts, less than or equal to the positive voltage VCC, and at this time, the pin 130 connected to the static electricity protection circuit 110
  • the loaded signal does not break down the first one-way unit 111 and the second one-way unit 112 in the static electricity protection circuit 110 or cause the first one-way unit 111 and the The second one-way conduction unit 112 is turned on, and the static electricity protection circuit 110 does not affect the signal loaded on the pin connected to the static electricity protection circuit 110.
  • the signal loaded on the pin 130 includes other components or circuit signals input to the inside of the chip 100 through the pin 130, and the chip 100 is output to the chip through the pin 130. 100 external signals.
  • the chip 100 of the present invention includes at least one static electricity protection circuit 110 capable of reducing or eliminating damage to other components or circuits inside the chip 100 by static electricity, thereby protecting The stability of the chip during operation.
  • the static electricity protection circuit 110 of 100 is disposed inside the chip 100 without providing an electrostatic protection circuit on the periphery of the chip 100.
  • the electrostatic protection circuit 110 of the present invention is disposed inside the chip 100 compared to the case where the electrostatic protection circuit is disposed on the periphery of the chip 100. Therefore, the function of the chip 100 is more integrated, and the external connection is avoided when used. The trouble of the ESD protection circuit.
  • FIG. 2 is a schematic diagram showing the circuit structure of an electronic device according to a preferred embodiment of the present invention.
  • the electronic device includes, but is not limited to, a portable device such as a smart phone, an internet device, an e-book, a portable play station, or a personal digital assistant.
  • the electronic device 10 includes a chip 100, the chip 100 includes at least one pin 130, and the chip 100 is internally provided with at least one static electricity protection circuit 110 for reducing or eliminating static electricity to the The other components or circuits inside the chip 100 are damaged.
  • the electrostatic protection circuit 110 is disposed corresponding to a pin 130, and the static electricity protection circuit 110 is electrically connected to the pin 130.
  • the static electricity protection circuit 110 includes a first one-way unit 111 and a second one-way unit 112.
  • the first unidirectional conduction unit 111 includes a first end 111a and a second end 111b. When the voltage of the first end 111a is greater than a voltage of the second end 111b by a predetermined voltage, the first single guide The pass unit 111 is turned on.
  • the second unidirectional conduction unit 112 includes a third end 112a and a fourth end 112b. When the voltage of the third end 112a is greater than a voltage of the fourth end 112b by a predetermined voltage, the second single guide The pass unit 112 is turned on.
  • the first end 111a is grounded, the second end 111b is connected to the third end 112a, and the second end 111b is electrically connected to the pin 130 corresponding to the static electricity protection circuit 110, and the second end 111b electrically connects other components or circuits within the chip 100.
  • the fourth terminal 112b is loaded with a predetermined positive voltage VCC.
  • the first unidirectional conduction unit 111 is a diode, and correspondingly, the first end 111a is a positive pole of a diode, and the second end 111b is a negative pole of a diode.
  • the voltage of the anode of the diode is greater than a voltage of a negative voltage of the diode by a predetermined voltage, the diode is turned on, otherwise, the diode is turned off.
  • the second unidirectional conduction unit 112 is a diode.
  • the third end 112a is a positive pole of a diode
  • the fourth end 112b is a negative pole of a diode.
  • the pin electrically connected to the static electricity protection circuit 110 is a pin that receives an external signal. Pins other than the pins receiving the external signals in the chip 130 are not electrically connected to the static electricity protection circuit 110. In this way, the chip 100 does not impose other burdens on the chip 100 while having electrostatic protection capability, thereby avoiding an increase in the cost of the chip 100.
  • the voltage of the signal loaded by the pin 130 connected to the static electricity protection circuit 110 is greater than or equal to zero volts, less than or equal to the positive voltage VCC, and at this time, the pin 130 connected to the static electricity protection circuit 110
  • the loaded signal does not break down the first one-way unit 111 and the second one-way unit 112 in the static electricity protection circuit 110 or cause the first one-way unit 111 and the The second one-way conduction unit 112 is turned on, and the static electricity protection circuit 110 does not affect the signal loaded on the pin connected to the static electricity protection circuit 110.
  • the signal loaded on the pin 130 includes other components or circuit signals input to the inside of the chip 100 through the pin 130, and the chip 100 is output to the chip through the pin 130. 100 external signals.
  • the chip 100 in the electronic device 10 of the present invention includes at least one static electricity protection circuit 110 capable of reducing or eliminating static electricity to other components or circuits inside the chip 100. Damage, thereby protecting the stability of the chip 100 during operation, improves the quality of the electronic device 10.
  • the static electricity protection circuit 110 of the chip 100 of the present invention is disposed inside the chip 100 without providing an electrostatic protection circuit on the periphery of the chip 100.
  • the electrostatic protection circuit 110 of the present invention is disposed inside the chip 100 compared to the case where the electrostatic protection circuit is disposed on the periphery of the chip 100. Therefore, the function of the chip 100 is more integrated, and the external connection is avoided when used. The trouble of the ESD protection circuit.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

一种芯片及电子装置。该芯片(100)包括至少一个引脚(130)，芯片(100)内部设置有至少一个静电防护电路(110)，该静电防护电路(110)用于减小或消除静电对芯片(100)内部的其他元件或者电路的损害，静电防护电路(110)对应一引脚(130)设置，且静电防护电路(110)与该引脚(130)电连接。电子装置包括该芯片(100)。该芯片能够保证运行时的稳定性，并且功能更加集成化，避免外接静电防护电路。

Description

芯片及电子装置
本发明要求2015年8月7日递交的发明名称为“芯片及电子装置”的申请号2015010484331.1的在先申请优先权，上述在先申请的内容以引入的方式并入本文本中。
技术领域
本发明涉及电子领域，尤其涉及一种芯片及电子装置。
背景技术
静电是一种客观存在的自然现象，产生的方式多种，如接触、摩擦、电器间感应等。静电的特点是长时间积聚、高电压、低电量、小电流和作用时间短的特点。人体自身的动作或与其他物体的接触，分离，摩擦或感应等因素，可以产生几千伏甚至上万伏的静电。摩擦起电和人体静电是电子工业中的两大危害，常常造成电子装置中的芯片运行不稳定，甚至损坏，从而导致电子装置的品质不良。
发明内容
本发明提供一种芯片，所述芯片包括至少一个引脚，所述芯片内部设置有至少一静电防护电路，所述静电防护电路用于减小或消除静电对所述芯片内部的其他元件或者电路的损害，所述静电防护电路对应一引脚设置，且所述静电防护电路与所述引脚电连接。
其中，所述静电防护电路包括第一单向导通单元及第二单向导通单元，所述第一单向导通单元包括第一端及第二端，当所述第一端的电压大于所述第二端的电压一预设电压时，所述第一单向导通单元导通，所述第二单向导通单元包括第三端及第四端，当所述第三端的电压大于所述第四端的电压一预设电压时，所述第二单向导通单元导通，所述第一端接地，所述第二端连接所述第三端，所述第二端电连接与所述静电防护电路对应的引脚，且所述第二端电连接所述芯片内部的其他元件或者电路，所述第四端加载一预设正电压。
其中，所述第一单向导通单元及所述第二单向导通单元为二极管，所述第一端及所述第三端为二极管的正极，所述第二端及所述第四端为二极管的负极。
其中，与所述静电防护电路电连接的引脚为接收外部信号的引脚。
其中，所述芯片中除所述接收外部信号的引脚之外的其他引脚未与所述静电防护电路电连接。
本发明还提供了一种电子装置，所述电子装置包括芯片，所述芯片包括至少一个引脚，所述芯片内部设置有至少一静电防护电路，所述静电防护电路用于减小或消除静电对所述芯片内部的其他元件或者电路的损害，所述静电防护电路对应一个引脚设置，且所述静电防护电路与所述引脚电连接。
其中，所述静电防护电路包括第一单向导通单元及第二单向导通单元，所述第一单向导通单元包括第一端及第二端，当所述第一端的电压大于所述第二端的电压一预设电压时，所述第一单向导通单元导通，所述第二单向导通单元包括第三端及第四端，当所述第三端的电压大于所述第四端的电压一预设电压时，所述第二单向导通单元导通，所述第一端接地，所述第二端连接所述第三端，所述第二端电连接与所述静电防护电路对应的引脚，且所述第二端电连接所述芯片内部的其他元件或者电路，所述第四端加载一预设正电压。
其中，所述第一单向导通单元及所述第二单向导通单元为二极管，所述第一端及所述第三端为二极管的正极，所述第二端及所述第四端为二极管的负极。
其中，与所述静电防护电路电连接的引脚为接收外部信号的引脚。
其中，所述芯片中除所述接收外部信号的引脚之外的其他引脚未与所述静电防护电路电连接。
相较于现有技术，本发明的芯片及包含所述芯片的电子装置中的芯片包括至少一个静电防护电路，所述静电防护电路能够减小或消除静电对所述芯片内部的其他元件或者电路的损害，从而保护了芯片运行时的稳定性。进一步地，本发明的芯片的静电防护电路设置在芯片的内部，无需在所述芯片的外围设置静电防护电路。且相较于在芯片的外围设置静电防护电路的情况，本发明的静电防护电路设置在所述芯片的内部，因此，所述芯片的功能更加集成化，避免 了使用时再外接静电防护电路的麻烦。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明一较佳实施方式的芯片的电路结构示意图。
图2为本发明一较佳实施方式中的芯片中的静电防护电路的电路图。
图3为本发明一较佳实施方式的电子装置的电路结构示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
请一并参阅图1和图2，图1为本发明一较佳实施方式的芯片的电路结构示意图。图2为本发明一较佳实施方式中的芯片中的静电防护电路的电路图。所述芯片100可以设置在电子装置中。所述电子装置包括但不仅限于智能手机、互联网设备(mobile internet device，MID)、电子书、便携式播放站(Play Station Portable,PSP)或个人数字助理(Personal Digital Assistant，PDA)等便携式设备。所述芯片100包括至少一个引脚130，所述芯片100内部设置有至少一个静电防护电路110，所述静电防护电路110用于减小或消除静电对所述芯片100内部的其他元件或者电路的损害，所述静电保护电路110对应一引脚130设置，且所述静电防护电路110与所述引脚130电连接。
所述静电防护电路110包括第一单向导通单元111及第二单向导通单元112。所述第一单向导通单元111包括第一端111a及第二端111b，当所述第一端111a的电压大于所述第二端111b的电压一预设电压时，所述第一单向导通单元111导通。所述第二单向导通单元112包括第三端112a及第四端112b， 当所述第三端112a的电压大于所述第四端112b的电压一预设电压时，所述第二单向导通单元112导通。所述第一端111a接地，所述第二端111b连接所述第三端112a，且所述第二端111b电连接与所述静电防护电路110对应的引脚130，且所述第二端111b电连接所述芯片100内部的其他元件或电路。所述第四端112b加载一预设正电压VCC。
在一实施方式中，所述第一单向导通单元111为二极管，相应地，所述第一端111a为二极管的正极，所述第二端111b为二极管的负极。当所述二极管的正极加载的电压大于二极管的负极加载的电压一预设电压时，所述二极管导通，否则，所述二极管截止。
在一实施方式中，所述第二单向导通单元112为二极管，相应的，所述第三端112a为二极管的正极，所述第四端112b为二极管的负极。当所述二极管的正极加载的电压大于二极管的负极加载的电压一预设电压时，所述二极管导通，否则，所述二极管截止。
优选地，与所述静电防护电路110电连接的引脚为接收外部信号的引脚。所述芯片130中除所述接收外部信号的引脚之外的其他引脚未与所述静电防护电路110电连接。这样，所述芯片100在具有静电防护能力的同时，也不会给所述芯片100带来其他更多的负担，避免了所述芯片100的成本的上升。
优选地，与所述静电防护电路110相连接的引脚130加载的信号的电压大于或等于零伏，小于或等于所述正电压VCC，此时，与所述静电防护电路110相连的引脚130上加载的信号不会将所述静电防护电路110中的所述第一单向导通单元111以及所述第二单向导通单元112击穿或者使得所述第一单向导通单元111以及所述第二单向导通单元112导通，且所述静电防护电路110不会对与所述静电防护电路110相连的引脚上加载的信号造成影响。在此，所述引脚130上加载的信号包括：通过所述引脚130输入至所述芯片100内部的其他元件或电路信号，以及所述芯片100通过所述引脚130输出至所述芯片100外部的信号。
相较于现有技术，本发明的芯片100中包括至少一个静电防护电路110，所述静电防护电路110能够减小或消除静电对所述芯片100内部的其他元件或者电路的损害，从而保护了芯片运行时的稳定性。进一步地，本发明的芯片 100的静电防护电路110设置在芯片100的内部，无需在所述芯片100的外围设置静电防护电路。且相较于在芯片100的外围设置静电防护电路的情况，本发明的静电防护电路110设置在所述芯片100的内部，因此，所述芯片100的功能更加集成化，避免了使用时再外接静电防护电路的麻烦。
下面结合图1和图2对本发明的电子装置进行介绍。请参阅图3，图2为本发明一较佳实施方式的电子装置的电路结构示意图。所述电子装置包括但不仅限于智能手机、互联网设备、电子书、便携式播放站或个人数字助理等便携式设备。所述电子装置10包括芯片100，所述芯片100包括至少一个引脚130，所述芯片100内部设置有至少一个静电防护电路110，所述静电防护电路110用于减小或消除静电对所述芯片100内部的其他元件或者电路的损害，所述静电保护电路110对应一引脚130设置，且所述静电防护电路110与所述引脚130电连接。
所述静电防护电路110包括第一单向导通单元111及第二单向导通单元112。所述第一单向导通单元111包括第一端111a及第二端111b，当所述第一端111a的电压大于所述第二端111b的电压一预设电压时，所述第一单向导通单元111导通。所述第二单向导通单元112包括第三端112a及第四端112b，当所述第三端112a的电压大于所述第四端112b的电压一预设电压时，所述第二单向导通单元112导通。所述第一端111a接地，所述第二端111b连接所述第三端112a，且所述第二端111b电连接与所述静电防护电路110对应的引脚130，且所述第二端111b电连接所述芯片100内部的其他元件或电路。所述第四端112b加载一预设正电压VCC。
在一实施方式中，所述第一单向导通单元111为二极管，相应地，所述第一端111a为二极管的正极，所述第二端111b为二极管的负极。当所述二极管的正极加载的电压大于二极管的负极加载的电压一预设电压时，所述二极管导通，否则，所述二极管截止。
在一实施方式中，所述第二单向导通单元112为二极管，相应的，所述第三端112a为二极管的正极，所述第四端112b为二极管的负极。当所述二极管的正极加载的电压大于二极管的负极加载的电压一预设电压时，所述二极管导通，否则，所述二极管截止。
优选地，与所述静电防护电路110电连接的引脚为接收外部信号的引脚。所述芯片130中除所述接收外部信号的引脚之外的其他引脚未与所述静电防护电路110电连接。这样，所述芯片100在具有静电防护能力的同时，也不会给所述芯片100带来其他更多的负担，避免了所述芯片100的成本的上升。
优选地，与所述静电防护电路110相连接的引脚130加载的信号的电压大于或等于零伏，小于或等于所述正电压VCC，此时，与所述静电防护电路110相连的引脚130上加载的信号不会将所述静电防护电路110中的所述第一单向导通单元111以及所述第二单向导通单元112击穿或者使得所述第一单向导通单元111以及所述第二单向导通单元112导通，且所述静电防护电路110不会对与所述静电防护电路110相连的引脚上加载的信号造成影响。在此，所述引脚130上加载的信号包括：通过所述引脚130输入至所述芯片100内部的其他元件或电路信号，以及所述芯片100通过所述引脚130输出至所述芯片100外部的信号。
相较于现有技术，本发明的电子装置10中的芯片100中包括至少一个静电防护电路110，所述静电防护电路110能够减小或消除静电对所述芯片100内部的其他元件或者电路的损害，从而保护了芯片100运行时的稳定性，提升了所述电子装置10的品质。进一步地，本发明的芯片100的静电防护电路110设置在芯片100的内部，无需在所述芯片100的外围设置静电防护电路。且相较于在芯片100的外围设置静电防护电路的情况，本发明的静电防护电路110设置在所述芯片100的内部，因此，所述芯片100的功能更加集成化，避免了使用时再外接静电防护电路的麻烦。
以上所揭露的仅为本发明一种较佳实施例而已，当然不能以此来限定本发明之权利范围，本领域普通技术人员可以理解实现上述实施例的全部或部分流程，并依本发明权利要求所作的等同变化，仍属于发明所涵盖的范围。

Claims (10)

  1. 一种芯片，其中，所述芯片包括至少一个引脚，所述芯片内部设置有至少一静电防护电路，所述静电防护电路用于减小或消除静电对所述芯片内部的其他元件或者电路的损害，所述静电防护电路对应一引脚设置，且所述静电防护电路与所述引脚电连接。
  2. 如权利要求1所述的芯片，其中，所述静电防护电路包括第一单向导通单元及第二单向导通单元，所述第一单向导通单元包括第一端及第二端，当所述第一端的电压大于所述第二端的电压一预设电压时，所述第一单向导通单元导通，所述第二单向导通单元包括第三端及第四端，当所述第三端的电压大于所述第四端的电压一预设电压时，所述第二单向导通单元导通，所述第一端接地，所述第二端连接所述第三端，所述第二端电连接与所述静电防护电路对应的引脚，且所述第二端电连接所述芯片内部的其他元件或者电路，所述第四端加载一预设正电压。
  3. 如权利要求2所述的芯片，其中，所述第一单向导通单元及所述第二单向导通单元为二极管，所述第一端及所述第三端为二极管的正极，所述第二端及所述第四端为二极管的负极。
  4. 如权利要求1所述的芯片，其中，与所述静电防护电路电连接的引脚为接收外部信号的引脚。
  5. 如权利要求4所述的芯片，其中，所述芯片中除所述接收外部信号的引脚之外的其他引脚未与所述静电防护电路电连接。
  6. 一种电子装置，其中，所述电子装置包括芯片，所述芯片包括至少一个引脚，所述芯片内部设置有至少一静电防护电路，所述静电防护电路用于减小或消除静电对所述芯片内部的其他元件或者电路的损害，所述静电防护电路对 应一个引脚设置，且所述静电防护电路与所述引脚电连接。
  7. 如权利要求6所述的电子装置，其中，所述静电防护电路包括第一单向导通单元及第二单向导通单元，所述第一单向导通单元包括第一端及第二端，当所述第一端的电压大于所述第二端的电压一预设电压时，所述第一单向导通单元导通，所述第二单向导通单元包括第三端及第四端，当所述第三端的电压大于所述第四端的电压一预设电压时，所述第二单向导通单元导通，所述第一端接地，所述第二端连接所述第三端，所述第二端电连接与所述静电防护电路对应的引脚，且所述第二端电连接所述芯片内部的其他元件或者电路，所述第四端加载一预设正电压。
  8. 如权利要求7所述的电子装置，其中，所述第一单向导通单元及所述第二单向导通单元为二极管，所述第一端及所述第三端为二极管的正极，所述第二端及所述第四端为二极管的负极。
  9. 如权利要求6所述的电子装置，其中，与所述静电防护电路电连接的引脚为接收外部信号的引脚。
  10. 如权利要求9所述的电子装置，其中，所述芯片中除所述接收外部信号的引脚之外的其他引脚未与所述静电防护电路电连接。
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