WO2017010708A1 - Procédé et dispositif d'émission d'une rétroaction de grande capacité dans un système cellulaire de communication sans fil basé sur l'agrégation de porteuses - Google Patents

Procédé et dispositif d'émission d'une rétroaction de grande capacité dans un système cellulaire de communication sans fil basé sur l'agrégation de porteuses Download PDF

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WO2017010708A1
WO2017010708A1 PCT/KR2016/006975 KR2016006975W WO2017010708A1 WO 2017010708 A1 WO2017010708 A1 WO 2017010708A1 KR 2016006975 W KR2016006975 W KR 2016006975W WO 2017010708 A1 WO2017010708 A1 WO 2017010708A1
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symbols
slot
mapping
res
transmitter
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PCT/KR2016/006975
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English (en)
Korean (ko)
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윤찬호
고영조
신우람
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한국전자통신연구원
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path

Definitions

  • the present invention relates to a method and apparatus for transmitting high capacity feedback in a carrier aggregation based wireless communication cellular system.
  • a physical layer of a long term evolution (LTE) cellular network using carrier aggregation technology aggregates up to five carriers (ie, 100 MHz) based on a 20 MHz bandwidth to perform a response after signal transmission and signal processing. .
  • LTE long term evolution
  • the total bandwidth of the five carriers is relatively narrow compared to the specification of the 160 MHz band using current IEEE 802.11ac.
  • LTE is operated in an unlicensed band such as licensed assisted access (LAA)
  • LAA licensed assisted access
  • 5 GHz band there is a limit of increasing transmission capacity due to the limitation of 5 carriers.
  • LAA licensed assisted access
  • PCell primary cell
  • SCell secondary cell
  • the PCell transmits and receives important control information of all aggregated SCell carriers. For example, when the base station transmits signals to the terminal using five carriers, the terminal transmits (uplink transmission) responses corresponding to all five carriers only through the PCell (uplink transmission). .
  • the terminal may transmit ACK / NACK, channel state information (CSI), scheduling request, and the like.
  • the information transfer burden on the PCell is inevitably increased.
  • the maximum number of information bits for uplink transmission through physical uplink control channel (PUCCH) format 3 may be performed if spatial multiplexing is not applied. , 11 per subframe.
  • PUCCH physical uplink control channel
  • the problem to be solved by the present invention is to provide a method and apparatus for increasing the information transmission capacity.
  • a method is provided by a transmitter for transmitting feedback information through an uplink control channel.
  • the transmitting method of the transmitter may include modulating the feedback information into a plurality of symbols; Spreading the plurality of symbols using a spreading orthogonal sequence of length less than 5; And mapping the spread symbols to a plurality of resource elements.
  • the modulating may include adding first cyclic redundancy check (CRC) information to the feedback information to generate first information; Generating second information by applying tail biting convolutional channel coding (TBCC) and rate matching to the first information; And modulating the second information through at least one of quadrature phase shift keying (QPSK), phase shift keying (8-PSK), quadrature amplitude modulation (4-QAM), and 16-QAM to generate the plurality of symbols. It may include the step.
  • CRC cyclic redundancy check
  • TBCC tail biting convolutional channel coding
  • QPSK quadrature phase shift keying
  • 8-PSK phase shift keying
  • 4-QAM quadrature amplitude modulation
  • 16-QAM 16-QAM
  • the spread symbols may include a plurality of first symbols and a plurality of second symbols.
  • the mapping of the plurality of REs may include sequentially mapping the plurality of first symbols to remaining time domain symbols except for time domain symbols for a reference signal among a plurality of time domain symbols for a first slot; And sequentially mapping the plurality of second symbols to time domain symbols next to the time domain symbol to which the plurality of first symbols are mapped among the remaining time domain symbols.
  • the modulating may include grouping the plurality of symbols into a plurality of first symbol groups mapped to a plurality of PRBs for a first slot and a plurality of second symbol groups mapped to a plurality of PRBs for a second slot. It may include.
  • the mapping to the plurality of REs may include: allocating a plurality of first reference signals for the feedback information to some of the plurality of time domain symbols for a first slot; And assigning a plurality of second reference signals for the feedback information to some of the plurality of time domain symbols for the second slot.
  • a first spreading orthogonal sequence having a length of 4 among the spreading orthogonal sequences is [1 1 1 1], [1 -1 1 -1], [1 1 -1 -1], and [1 -1 -1] 1] may be at least one.
  • the mapping to the plurality of REs may include sequentially mapping the plurality of first symbols to a plurality of subcarriers for a first slot; And sequentially mapping the plurality of second symbols to subcarriers subsequent to the subcarrier to which the plurality of first symbols are mapped among the plurality of subcarriers for the first slot.
  • the first spreading orthogonal sequence having a length of 2 among the spreading orthogonal sequences may be at least one of [1 1] and [1 -1].
  • a method is provided by a transmitter for transmitting feedback information through an uplink control channel.
  • the transmitting method of the transmitter includes: modulating the feedback information into a plurality of first symbols through one of quadrature phase shift keying (QPSK) and quadrature amplitude modulation (4-QAM); Doubling the plurality of first symbols based on a spreading orthogonal sequence of length 2 to generate a plurality of second symbols; And mapping the plurality of second symbols to a plurality of resource elements (REs) based on a mapping order in which the frequency axis comes first and the time axis comes later.
  • QPSK quadrature phase shift keying
  • 4-QAM quadrature amplitude modulation
  • the plurality of REs may include a plurality of REs for a first slot and a plurality of REs for a second slot after the first slot.
  • the mapping to the plurality of REs may include: mapping a portion of the plurality of second symbols to a plurality of REs for a first time domain symbol among the plurality of REs for the first slot; And mapping another part of the plurality of second symbols to a plurality of REs for a second time domain symbol next to the first time domain symbol among a plurality of REs for the first slot.
  • the plurality of REs may include a plurality of first REs corresponding to a PRB for a first slot and a plurality of second REs corresponding to a PRB for a second slot next to the first slot.
  • the mapping of the plurality of REs may include: mapping at least one reference signal for the feedback information to a portion of the plurality of first REs; And mapping a part of the plurality of second symbols to the rest of the plurality of first REs based on the mapping order.
  • the modulating may include adding first cyclic redundancy check (CRC) information to the feedback information to generate first information; Generating second information by applying tail biting convolutional channel coding (TBCC) and rate matching to the first information; Modulating the second information through QPSK to generate the plurality of first symbols; And grouping the plurality of first symbols into a first symbol group mapped to a first slot and a second symbol group mapped to a second slot.
  • CRC cyclic redundancy check
  • TBCC tail biting convolutional channel coding
  • a method is provided by a transmitter for transmitting feedback information through an uplink control channel.
  • the transmitting method of the transmitter may include generating first information by applying a cyclic redundancy check (CRC) and tail biting convolutional channel coding (TBCC) to first feedback information larger than 22 bits of the feedback information; Generating a plurality of symbols by modulating the first information; And mapping the plurality of symbols to a plurality of resource elements.
  • CRC cyclic redundancy check
  • TBCC tail biting convolutional channel coding
  • the plurality of symbols may include a plurality of first symbols mapped to a first slot and a plurality of second symbols mapped to a second slot next to the first slot.
  • the mapping to the plurality of REs may include: applying a phase rotation to the plurality of first symbols; Applying a cyclic shift to the phase rotated symbols; And applying discrete Fourier transform (DFT) precoding to the cyclically shifted symbols.
  • DFT discrete Fourier transform
  • the terminal may deviate from the response for the carrier aggregation transmission having a limited number of carriers (eg, five) and may report a response for up to 32 carriers to the base station.
  • the present invention while using the same amount of resources as those used in the existing carrier aggregation transmission (with a limit of the number of carriers (for example, five)), it corresponds to approximately six times the existing information It is possible to transmit the information through the PUCCH which is an uplink control channel.
  • FIG. 1 is a diagram illustrating an LTE frame structure type in the FDD form.
  • FIG. 2 is a diagram illustrating a basic structure of an uplink physical resource block (PRB).
  • PRB uplink physical resource block
  • FIG. 3 is a diagram illustrating a useful resource region of a normal CP and a useful resource region of an extended CP in the FDD scheme.
  • 4 is a diagram illustrating an 8-bit CRC generator.
  • FIG. 5 is a diagram illustrating an input / output relationship between a tail biting convolutional channel coding (TBCC) unit.
  • TBCC tail biting convolutional channel coding
  • FIG. 6 is a diagram illustrating a rate matching unit.
  • FIG. 7A and 7B illustrate encoding and modulation of a 64-bit PUCCH transmission method based on an FDD scheme, a normal CP, and one DM-RS SC-FDMA symbol according to an embodiment of the present invention.
  • 8A and 8B illustrate encoding and modulation of a 64-bit PUCCH transmission method using two DM-RSs in a normal CP mode according to an embodiment of the present invention.
  • Equation 10 is applied according to an embodiment of the present invention.
  • 10A and 10B illustrate encoding and modulation of a 64-bit PUCCH transmission method for an extended CP based on FDD scheme according to an embodiment of the present invention.
  • 11A, 11B, and 11C are diagrams illustrating a 64-bit PUCCH transmission method for two PRBs and one DM-RS per slot, QPSK, and normal CP, according to an embodiment of the present invention. to be.
  • 12A, 12B, and 12C illustrate a 64-bit PUCCH transmission method for a case where two PRBs and two DM-RSs are used per slot, QPSK is used, and a normal CP is used, according to an embodiment of the present invention. to be.
  • 13A, 13B, and 13C illustrate a 64-bit PUCCH transmission method for a case in which two PRBs per slot are used, QPSK is used, and an extended CP is used according to an embodiment of the present invention.
  • Equation 11 is applied according to an embodiment of the present invention.
  • 25 is a diagram illustrating input and output relationships between a DFT unit and an IFFT unit included in a terminal according to an embodiment of the present invention.
  • FIG. 26 is a diagram illustrating a method of mapping a PUCCH to a frequency domain according to the number of PRBs used per slot according to an embodiment of the present invention.
  • FIG. 27 is a diagram illustrating a DAI mapping method for each CC for an FDD type according to an embodiment of the present invention.
  • FIG. 28 is a diagram illustrating a total and counter DAI mapping method for a TDD type according to an embodiment of the present invention.
  • 29 is a diagram illustrating a transmitter according to an embodiment of the present invention.
  • FIG. 30 is a diagram illustrating a receiver according to an embodiment of the present invention.
  • a terminal may be a mobile terminal, a mobile station, an advanced mobile station, a high reliability mobile station, a subscriber station, a portable device. It may also refer to a portable subscriber station, an access terminal, a user equipment (UE), or the like, and may include a terminal, a mobile terminal, a mobile station, an advanced mobile station, a high reliability mobile station, a subscriber station, and a mobile subscription. It may also include all or part of the functionality of a home station, access terminal, user equipment, and the like.
  • UE user equipment
  • a base station may include an advanced base station, a high reliability base station, a node B, an evolved node B, an eNodeB, an eNB, An access point, a radio access station, a base transceiver station, a mobile multihop relay (BSR) -BS, a relay station serving as a base station, and a base station It may also refer to a high reliability relay station, a repeater, a macro base station, a small base station, and the like, and may include a base station, an advanced base station, HR-BS, a Node B, an eNodeB, an access point, a wireless access station, a transceiver base station, and an MMR- It may include all or part of the functionality of a BS, repeater, high reliability repeater, repeater, macro base station, small base station, and the like.
  • 'A or B' may include 'A', 'B', or 'both A and B'.
  • Method and apparatus may belong to the physical layer of the LTE wireless mobile communication system, and specifically may be related to the configuration of the transmission signal of the terminal.
  • the terminal When a large number of downlink signals are transmitted by the base station in the form of carrier aggregation and the terminal receives the signal, the terminal transmits a response (eg acknowledgment) to the base station for the data aggregated for each carrier. Configure the link feedback signal.
  • a response eg acknowledgment
  • the structure of such an uplink feedback signal will be described.
  • a method of increasing information transmission capacity while occupying the same amount of PRB as the physical resource block (PRB) required by the PUCCH format 3, which is an existing LTE uplink control channel will be described.
  • FIG. 1 is a diagram illustrating an LTE frame structure type in the FDD form.
  • LTE includes frequency division duplexing (FDD) and time division duplexing (TDD), which are duplexing schemes.
  • FDD frequency division duplexing
  • TDD time division duplexing
  • FIG. 2 is a diagram illustrating a basic structure of an uplink physical resource block (PRB).
  • PRB uplink physical resource block
  • the uplink PRB of LTE may be defined as illustrated in FIG. 2.
  • the value is fixed to 12
  • k denotes the index of the subcarrier of the frequency
  • SC-FDMA symbol has the same transmission time as an orthogonal frequency division multiplexing (OFDM) symbol.
  • OFDM orthogonal frequency division multiplexing
  • SC-FDMA symbols may be allocated to one subframe and may be extended.
  • 12 SC-FDMA symbols may be allocated to one subframe.
  • PUCCH Physical uplink control channel
  • Types of formats for PUCCH transmission is six main (PUCCH format 1a, 1b, 2, 2a, 2b, 3), as shown in Table 1 (Supported PUCCH formats) below, the number of transmittable bits (M bit) Therefore, transmission formats are mainly divided.
  • PUCCH format Modulation scheme Number of bits per subframe, M bit One N / A N / A 1a Binary phase shift keying (BPSK) One 1b Quadrature phase shift keying (QPSK) 2 2 QPSK 20 2a QPSK + BPSK 21 2b QPSK + QPSK 22 3 QPSK 48
  • One of six types (PUCCH formats 1a, 1b, 2, 2a, 2b, and 3) is usually transmitted by the terminal through two PRBs (ie, one subframe).
  • the terminal receiving the downlink signal of the multi-band through the carrier aggregation transmits the feedback to the base station using the PUCCH format 3.
  • the transmission time point of the PUCCH format 3 is a fixed time rather than an adaptively scheduled time according to a situation, and the uplink transmission of the PUCCH format 3 is performed at a fixed time and a fixed frequency band.
  • 48 bits are modulated after channel coding is applied through PUCCH format 3, only 22 bits are actually useful information bits.
  • bit information is modulated into symbols and then mapped over two PRBs illustrated in FIG. Modulated symbols containing information are not mapped to all 168 resource elements (refer to a normal CP and one subframe). That is, when REs including a DM-RS or a demodulation reference signal (DMRS) are considered, 120 REs are provided in the case of a normal CP, and 120 REs are similarly provided in the case of an extended CP. The relationship between the actual useful RE will be described with reference to FIG. 3.
  • DMRS demodulation reference signal
  • FIG. 3 is a diagram illustrating a useful resource region of a normal CP and a useful resource region of an extended CP in the FDD scheme.
  • (a1) represents a useful resource region of a normal CP
  • (a2) represents a useful resource region of an extended CP.
  • each of slot 1 and slot 2 following slot 1 includes seven SC-FDMA symbols, and RS (reference signal) is transmitted in the second and sixth SC-FDMA symbols among the seven SC-FDMA symbols. The case is illustrated.
  • each of slot 1 and slot 2 includes six SC-FDMA symbols, and RS is transmitted in the fourth SC-FDMA symbol among the six SC-FDMA symbols.
  • tail-biting convolutional coding (TBCC) is applied.
  • 4 is a diagram illustrating an 8-bit CRC generator.
  • Equation 1 gCRC8 (D) represents a polynomial generating a CRC, and each of D, D 3 , D 4 , D 7 , and D 8 represents a point at which an XOR operation for binary operation is applied.
  • D 4 is the payload bit input bit a i value (0 or 1), the output value (0 or 1) of the fourth shift register (square box) of FIG. 4, and 8 of FIG. 4.
  • all of the shift registers of FIG. 4 may be initialized to binary bit 1.
  • There are two classification methods inverting all CRC bits, modulo 2 addition with C-RNTI).
  • the 'inverting all CRC bit' method inverts all CRC output bits to indicate scheduling request information.
  • the 'inverting all CRC bit' method may be expressed as in the following equation.
  • the 'modulo 2 addition with C-RNTI' method is a method of using a 16-bit radio network temporary identifier (RNTI) and a modulo 2 addition that a base station assigns to a terminal to display scheduling request information.
  • the UE maps the CRC bits to RNTI MSB 4 bits or RNTI LSB 4 bits, as shown in the following equation.
  • the terminal does not apply scrambling to the CRC bit as shown in the following equation.
  • the information to be transmitted by the device is generalized in the form of the following CRC is added to the TBCC unit.
  • M represents the amount of information to be transmitted (that is, payload size)
  • b k represents the input bits of the TBCC unit
  • a k represents information to be transmitted by the device (eg, the terminal)
  • a device eg, a terminal
  • M 64
  • CRC 8 bits 72 bits are finally determined as input bits of the TBCC unit.
  • FIG. 5 is a diagram illustrating an input / output relationship between a tail biting convolutional channel coding (TBCC) unit.
  • TBCC tail biting convolutional channel coding
  • the TBCC unit 20 receives a binary number b k , Outputs That is, the bits of three times the number of input bits are finally output.
  • each of G 0 , G 1 , and G 2 represents a result value when a modulo 2 addition operation is applied to binary values of a plurality of shift registers at a specific point.
  • G 0 modulo between input bit b k , the bit stored in shift register SH1b, the bit stored in shift register SH1c, the bit stored in shift register SH1e, and the bit stored in shift register SH1f. 2 Shows the result value when the addition operation is applied.
  • G 1 and G 2 are produced in a form similar to G 0 .
  • the output of the TBCC unit 20 is subjected to a rate matching unit, and receives an adjustment of a code rate.
  • FIG. 6 is a diagram illustrating a rate matching unit.
  • the rate matching unit 30 includes a subblock interleaver 31a, 31b, and 31c and a virtual circular buffer 32.
  • the virtual circular buffer 32 includes a bit collection unit 32a and a bit selection and pruning unit 32b.
  • Three bit streams output from the TBCC unit 20 Is converted into a single bit stream w k through the subblock interleavers 31a to 31c and the bit collector 32a.
  • bit stream e k is finally converted into a bit stream e k of the required length through bit selection and pruning of the bit selection & pruning unit 32b.
  • the inputs of the subblock interleavers 31a to 31c are It can be expressed as.
  • the row size of the matrix for interleaving Is Minimum integer that satisfies
  • the column size of the matrix for interleaving 32.
  • the final bit stream input to each subblock interleaver 31a to 31c Becomes In other words, Before As many dummy bits are added.
  • the matrix to which the dummy bit is added has the same form as the following matrix.
  • Permutation between columns is applied to the matrix to which the dummy bit is added, thereby creating a matrix having the following form.
  • the permutation patterns between columns may be defined as shown in Table 2 (Inter-column permutation pattern for sub-block interleaver).
  • C ⁇ CC_subblock is to be.
  • the outputs of the subblock interleavers 31a to 31c Where is the value representing the total number of elements in the matrix Is to be.
  • the length of the final stream w k input to the bit select & pruning section 32b is K w , to be.
  • the stream w k may be configured as in the following equation.
  • bit stream w k is finally input to the bit select & pruning unit 32b that satisfies the code rate and filters NULL bits.
  • the output of the bit select & pruning section 32b, e k satisfies the code rate.
  • the output bit stream is filtered and selected through the following process.
  • Equation 2 e (k) corresponds to the final bit stream e k .
  • the length E of the rate matching may be defined as 144, 192, or N in the case of a normal CP, and 120, 160, or N in the case of an extended CP.
  • N may be one of 120, 144, 160, and 192.
  • the output bit stream e k and the scrambling sequence c (i) are binary addition, which can be expressed as Equation 3 below.
  • Equation 3 i is an element index, Denotes a bit stream to which a binary addition with the scrambling sequence c (i) is applied, and e (i) corresponds to the bit stream e k .
  • the scrambling sequence c (i) may be generated through Equation 4 below.
  • the output of the scrambled bit stream through the scrambling sequence c (i) is subjected to interleaving of Equation 5 below.
  • Bits that have undergone the scrambling process and the interleaving process are mapped to resources through a modulation process and a spreading process.
  • the modulation process, spreading process, and resource mapping process vary depending on the bit length of the payload that the device (eg, terminal) intends to transmit.
  • FIG. 7A and 7B illustrate encoding and modulation of a 64-bit PUCCH transmission method based on an FDD scheme, a normal CP, and one DM-RS SC-FDMA symbol according to an embodiment of the present invention.
  • FIG. 7A and FIG. 7B illustrate a high capacity PUCCH transmission method for transmitting 64 bits.
  • the CRC process (S100), TBCC and rate matching process (S101), and the scrambling process (S102) illustrated in FIG. 7A are performed in the same or similar manner as described above with respect to CRC, TBCC, rate matching, scrambling, and interleaving. Can be.
  • 144 REs that is, one subframe for a time corresponding to one subframe 144 subcarriers
  • Equation 5 The output of the scrambled bit stream is subject to interleaving of equation (5).
  • the value of N in Equation 5 is 144 in the case of 8-PSK (phase shift keying) when the normal CP is applied and 192 in the case of 16-QAM (quadrature amplitude modulation). If extended CP is applied, the value of N is 120 for 8-PSK and 160 for 16-QAM.
  • the output of the scrambled bit stream is modulated via 8-PSK or 16-QAM (S103). Modulation mapping methods are shown in Table 3 (8-PSK modulation mapping) and Table 4 (16-QAM modulation mapping) below.
  • a total of 48 symbols are modulated via 8-PSK or 16-QAM.
  • 48 8-PSK symbols or 48 16-QAM symbols are divided into 4 symbol groups, as illustrated in FIG. 7B. Each symbol group includes 12 symbols. Two of the four symbol groups correspond to slot 1 (containing seven SC-FDMA symbols) and the rest correspond to slot 2 (containing seven SC-FDMA symbols).
  • a common phase rotation of a cell-specific length is applied in the time domain (S104). After phase rotation is commonly applied to all 12 symbols in a symbol group, each symbol is a spreading factor for PUCCH. Is spread by three times (S105).
  • Equation 6 shows the process up until the application of discrete Fourier transform (DFT) pre-coding to a signal modulated through 8-PSK or 16-QAM.
  • DFT discrete Fourier transform
  • Equation 6 s (i) represents a symbol modulated via 8-PSK or 16-QAM based on Table 3 or Table 4.
  • Equation 6 Represents one PRB bandwidth and is defined as 12 in the LTE system.
  • n s represents a slot number
  • l represents an SC-FDMA symbol number (index).
  • Equation 6, 3.
  • Equation 6 Is Corresponds to.
  • Orthogonal cover code (OCC) sequences for spreading Table 5 (The orthogonal sequence) Can be defined as
  • w_noc () is N ⁇ PUCCH_SF is And e ⁇ j2 ⁇ / 3 is And e ⁇ j4 ⁇ / 3 is to be.
  • the spreading orthogonal sequence applied to Equation 6 is a sequence index n oc defined in Table 5 Selected by one of the selected spreading orthogonal sequences is used for spreading.
  • Common phase rotation applied on the frequency axis May be used as a cyclic shift value in the time domain.
  • a cyclic shift is applied in each SC-FDMA symbol level unit to each modulation symbol group corresponding to one PRB bandwidth (S106).
  • the application method of the cyclic shift is shown in Equation 7 below.
  • Equation 7 Denotes a symbol to which a cyclic shift is applied.
  • a cyclic shift allows up to 12 different uplink signals to be multiplexed and the multiplexed signals can be received by the base station. Cyclic shift also has the function of causing the uplink signal to generate minimal interference.
  • DFT precoding is applied to each modulation symbol group that has undergone the spreading process and the cyclic shift process as shown in Equation 8 below (S107).
  • Equation 8 P represents the number of antennas for PUCCH transmission.
  • IFFT inverse fast Fourier transform
  • the signal that has undergone the IFFT process is transmitted in the corresponding bandwidth (S109).
  • DM-RS demodulating the PUCCH signal
  • the reference signal is represented by Equation 9 and Table 6 below. Can be generated by
  • SC-FDMA type When a normal CP is used, four DM-RS (SC-FDMA type) signals exist in one subframe, and when an extended CP is used, two DM-RS (SC- in one subframe) are used. FDMA type) signal is present.
  • u is a UE-specific value
  • the base station informs the terminal of the selected value as a value for having low interference between the terminals.
  • Reference signal 3 corresponds to RS (can be represented by DM-RS) and is transmitted in a bandwidth corresponding to one PRB through an IFFT process (S109).
  • 7B shows a reference signal Is transmitted through a fourth symbol of seven SC-FDMA symbols in slot 1 and is transmitted through a fourth symbol among seven SC-FDMA symbols in slot 2.
  • 8A and 8B illustrate encoding and modulation of a 64-bit PUCCH transmission method using two DM-RSs in a normal CP mode according to an embodiment of the present invention.
  • PUCCH transmission may be configured as illustrated in FIGS. 8A and 8B.
  • a device eg, a terminal
  • the PUCCH is transmitted through a process similar to that of the embodiment of FIGS. 7A and 7B.
  • the CRC process (S120), the TBCC and rate matching process (S121), and the scrambling and interleaving process (S122) illustrated in FIG. 8A are the same as or similar to those described above.
  • the output of the TBCC is converted to 120 bits (for 8-PSK) or 160 bits (for 16-QAM) via rate matching.
  • Equation 5 The output of the scrambled bit stream is subject to interleaving of equation (5).
  • the value of N in Equation 5 is 120 in case of 8-PSK and 160 in case of 16-QAM when a normal CP or extended CP is set.
  • 40 modulation symbols are generated (S123). 40 modulation symbols are divided into four symbol groups. Each symbol group includes 10 modulation symbols. Two of the four symbol groups correspond to slot 1 (containing seven SC-FDMA symbols) and the rest correspond to slot 2 (containing seven SC-FDMA symbols).
  • the frequency axis is not limited to one subcarrier, but symbols may be allocated over two subcarriers.
  • the base station requires RS (eg, a DeModulation Reference Signal (DM-RS)) to perform channel estimation.
  • RS eg, a DeModulation Reference Signal (DM-RS)
  • the DM-RS represents a frequency domain symbol generated using Equation 9.
  • the reference signal is transmitted through the 2nd and 6th symbols of the 7 SC-FDMA symbols of slot 1 and is transmitted through the 2nd and 6th symbols of the 7 SC-FDMA symbols of slot 2 (S130). ).
  • Equation 10 may be applied to the embodiment of FIGS. 8A and 8B.
  • Equation 10 represents a process up until immediately before DFT precoding is applied to a signal modulated by 8-PSK or 16-QAM modulation.
  • RE mapping is based on equation (10).
  • Equation 10 is applied according to an embodiment of the present invention.
  • the vertical axis is the frequency axis and the horizontal axis is the time axis.
  • the spreading of the transmission signal in the time domain is performed before the transmission signal is spread in the frequency domain. That is, the transmission signal is spread in the order of the time axis and the frequency axis. In FIG. 9, the frequency increases downward with respect to the frequency axis.
  • a set of three symbols (eg, ⁇ w (0) s (0), w (1) s (0), w (2) s (0)), ⁇ w (0) s (1), w (1) s (1), w (2) s (1) ⁇ , etc.) represent three symbols to which spreading is applied by the process S125 in FIG. 8B.
  • ⁇ w (0) s (0), w (1) s (0), w (2) s (0) ⁇ are the SC-FDMA symbols 0, 2, and 3 of the first subcarrier.
  • Sequentially mapped to the three REs corresponding to ⁇ w (0) s (1), w (1) s (1), w (2) s (1) ⁇ are SC-FDMA symbols 4 of the first subcarrier.
  • symbols w (0) s (0), symbols w (1) s (0), and symbols w (2) s (0) each represent SC-FDMA symbols 0, 2, and 3, respectively.
  • symbols w (0) s (2), symbols w (1) s (2), and symbols w (2) s (2), respectively, are SC-FDMA symbols 2, 3, and 4
  • symbol w (0) s (20), symbol w (1) s (20), and symbol w (2) s (20) may each be mapped to SC-FDMA symbols # 7, # 9, And number 10, respectively.
  • w () is Corresponds to.
  • 10A and 10B illustrate encoding and modulation of a 64-bit PUCCH transmission method for an extended CP based on FDD scheme according to an embodiment of the present invention.
  • a process similar to the process illustrated in FIGS. 8A and 8B may be performed. That is, as illustrated in FIGS. 10A and 10B, the coding process, the rate matching process, the modulation process, and the DFT precoding process are performed similarly to the embodiment of FIGS. 8A and 8B.
  • the CRC process (S140), TBCC and rate matching process (S141), the scrambling and interleaving process (S142), and the modulation process (S143) illustrated in FIG. 10A are each S120, S121, S122, and S123 of FIG. 8A. Similar to each of the processes.
  • each of the signal transmission processes S150 is similar to each of S124, S125, S126, S127, S128, S129, and S130 illustrated in FIG. 8B.
  • 10A and 10B differ from the embodiment of FIGS. 8A and 8B in that only one reference signal is transmitted per slot.
  • FIG. 10B a case where an RS is transmitted through a fourth symbol of six SC-FDMA symbols in slot 1 and is transmitted through a fourth symbol among six SC-FDMA symbols in slot 2 is illustrated.
  • 11A, 11B, and 11C are diagrams illustrating a 64-bit PUCCH transmission method for two PRBs and one DM-RS per slot, QPSK, and normal CP, according to an embodiment of the present invention. to be.
  • PUCCH transmission may be configured as illustrated in FIGS. 11A, 11B, and 11C.
  • the interleaving process is performed after the TBCC process, the rate matching process, and the scrambling process.
  • the interleaving process may be expressed as follows.
  • Equation 5 The output of the scrambled bit stream is subject to interleaving of equation (5).
  • the value of N in Equation 5 is 192 in the case of normal CP and 160 in the case of extended CP.
  • the CRC process (S160), TBCC and rate matching process (S161), the scrambling and interleaving process (S162), and the modulation process (S163) illustrated in FIG. 11A are each S100 process, S101 process, S102 process, and S103 of FIG. 7A. Similar to each of the processes. However, in step S163, instead of higher order modulation, a QPSK (or 4-QAM) modulation scheme defined in Table 7 may be used.
  • each of the transmission process S169 is similar to each of the S104 process, the S105 process, the S106 process, the S107 process, the S108 process, and the S109 process illustrated in FIG. 7B.
  • the 96 symbols modulated by the S163 process are divided into eight symbol groups. Each symbol group includes 12 symbols. Four of the eight symbol groups correspond to slot 1 (containing seven SC-FDMA symbols) and the rest correspond to slot 2 (containing seven SC-FDMA symbols). Specifically, two of the four symbol groups corresponding to slot 1 correspond to (mapped) one of the two PRBs for slot 1 (FIG. 11B), and the remaining two symbol groups are two PRBs for slot 1 Corresponds to the other one of (mapped) (FIG. 11C). Similarly, two of the four symbol groups corresponding to slot 2 correspond to (mapped) one of the two PRBs for slot 2 (FIG. 11B), and the remaining two symbol groups are of the two PRBs for slot 2 Corresponds to the other one (mapped) (FIG. 11C).
  • 11B and 11C illustrate an example in which an RS is transmitted through a fourth symbol of seven SC-FDMA symbols in slot 1 and is transmitted through a fourth symbol among seven SC-FDMA symbols in slot 2.
  • 12A, 12B, and 12C illustrate a 64-bit PUCCH transmission method for a case where two PRBs and two DM-RSs are used per slot, QPSK is used, and a normal CP is used, according to an embodiment of the present invention. to be.
  • the PUCCH is the same as that of the embodiment of FIGS. 11A, 11B, and 11C. It is sent through a similar process.
  • the RE is insufficient in comparison with an embodiment in which one RS is transmitted per slot (e.g., FIGS. 11A to 11C). Only 80 modulated QPSK symbols are transmitted, not 96 QPSK symbols.
  • the 160 bits output through the rate matching are interleaved. Specifically, the output of the scrambled bit scrim is subjected to the interleaving of Equation 5.
  • the value of N in Equation 5 is 160 in the case of a normal CP or an extended CP.
  • the CRC process (S180), the TBCC and rate matching process (S181), the scrambling and interleaving process (S182), and the modulation process (S183) illustrated in FIG. 12A are each S160, S161, S162, and Similar to each of the S163 process.
  • each of the transmission process S190 is similar to each of the S164 process, the S165 process, the S166 process, the S167 process, the S168 process, and the S169 process illustrated in FIGS. 11B and 11C.
  • the resource mapping process S186 is similar to the process S126 illustrated in FIG. 8B.
  • another method may be considered. Specifically, a method of spreading symbols by spreading the REs of various combinations of SC-FDMA symbols and utilizing OCC groups in all possible cases, and mapping unit bundles of OCC number of spreaded symbols to the REs (eg , The method illustrated in FIG. 9) may be applied to a process S186.
  • the 80 symbols modulated by the S183 process are divided into 8 symbol groups. Each symbol group includes ten symbols. Four of the eight symbol groups correspond to slot 1 (containing seven SC-FDMA symbols) and the rest correspond to slot 2 (containing seven SC-FDMA symbols). Specifically, two of the four symbol groups corresponding to slot 1 correspond to one of two PRBs for slot 1 (FIG. 12B), and the remaining two symbol groups are assigned to the other of the two PRBs for slot 1. Corresponding (FIG. 12C). Similarly, two of the four symbol groups corresponding to slot 2 correspond to one of the two PRBs for slot 2 (FIG. 12B), and the remaining two symbol groups correspond to the other of the two PRBs for slot 2 (FIG. 12C).
  • RS is transmitted on the second and sixth symbols of the seven SC-FDMA symbols of slot 1 and transmitted on the second and sixth symbols of the seven SC-FDMA symbols of slot 2. The case is illustrated.
  • 13A, 13B, and 13C illustrate a 64-bit PUCCH transmission method for a case in which two PRBs per slot are used, QPSK is used, and an extended CP is used according to an embodiment of the present invention.
  • a process similar to the process illustrated in FIGS. 12A to 12C may be performed. That is, as illustrated in FIGS. 13A to 13C, a coding process, a rate matching process, a modulation process, and a DFT precoding process may be performed similarly to the embodiment of FIGS. 12A to 12C.
  • the number of SC-FDMA symbols transmitted per slot is limited to 5 and only one DM-RS is transmitted per slot, which is different from the embodiments of FIGS. 12A to 12C.
  • the CRC process (S200), the TBCC and rate matching process (S201), the scrambling and interleaving process (S202), and the modulation process (S203) illustrated in FIG. 13A are each S180, S181, S182, and Similar to each of the S183 process.
  • the 80 symbols modulated by the S203 process are divided into 8 symbol groups. Each symbol group includes ten symbols. Four of the eight symbol groups correspond to slot 1 (containing six SC-FDMA symbols) and the rest correspond to slot 2 (containing six SC-FDMA symbols). Specifically, two of the four symbol groups corresponding to slot 1 correspond to one of two PRBs for slot 1 (FIG. 13B), and the remaining two symbol groups are assigned to the other of the two PRBs for slot 1. (Fig. 13C). Similarly, two of the four symbol groups corresponding to slot 2 correspond to one of the two PRBs for slot 2 (FIG. 13B), and the remaining two symbol groups correspond to the other of the two PRBs for slot 2 (FIG. 13C).
  • 13B and 13C illustrate an example in which an RS is transmitted through a fourth symbol of six SC-FDMA symbols in slot 1 and is transmitted through a fourth symbol among six SC-FDMA symbols in slot 2.
  • w_noc () is N ⁇ PUCCH_SF is to be.
  • Equation 5 The value of N in Equation 5 is 144 in the case of normal CP.
  • Equation 11 may be applied to the embodiment of FIGS. 14A to 14C.
  • Equation 11 The spreading orthogonal sequence applied to Equation 11 is selected by one of the sequence indices n oc defined in Table 8, and the selected spreading orthogonal sequence is used for spreading. Equation 11 shows the process up until the DFT precoding is applied to the QPSK modulated signal. RE mapping is based on equation (11).
  • the CRC process (S220), the TBCC and rate matching process (S221), the scrambling and interleaving process (S222), and the modulation process (S223) illustrated in FIG. 14A are respectively S180, S181, S182, and Similar to each of the S183 process. However, 144 bits are output by step S221 and 72 symbols are output by step S223.
  • the phase rotation process S224 is similar to each of the processes S184, S185, S186, S187, S188, S189, and S190 illustrated in FIGS. 12B and 12C.
  • the 72 symbols modulated by the S223 process are divided into 8 symbol groups. Each symbol group includes nine symbols. Four of the eight symbol groups correspond to slot 1 (containing seven SC-FDMA symbols) and the rest correspond to slot 2 (containing seven SC-FDMA symbols). Specifically, two of the four symbol groups corresponding to slot 1 correspond to one of two PRBs for slot 1 (FIG. 14B), and the remaining two symbol groups are assigned to the other of the two PRBs for slot 1. (Fig. 14C). Similarly, two of the four symbol groups corresponding to slot 2 correspond to one of the two PRBs for slot 2 (FIG. 14B), and the remaining two symbol groups correspond to the other of the two PRBs for slot 2 (FIG. 14C).
  • RS may be generated using Equation (9).
  • 14B and 14C illustrate an example in which an RS is transmitted through a fourth symbol of seven SC-FDMA symbols in slot 1 and is transmitted through a fourth symbol among seven SC-FDMA symbols in slot 2.
  • Equation 11 illustrated in FIG. 15 is similar to the embodiment of FIG. 9.
  • spreading the transmission signal in the time domain is performed before spreading the transmission signal in the frequency domain. That is, the transmission signal is spread in the order of the time axis and the frequency axis. In FIG. 15, the frequency increases downward with respect to the frequency axis.
  • symbol w (0) s (0), symbol w (1) s (0), symbol w (2) s (0), and symbol w (3) s (0) are each SC-FDMA symbols.
  • symbols w (0) s (2), symbols w (1) s (2), symbols w (2) s (2), and Each of the symbols w (3) s (2) may be mapped to SC-FDMA symbols 2, 4, 5, and 6, respectively, and symbols w (0) s (18) and symbol w (1) s
  • Each of (18), symbols w (2) s (18), and w (3) s (18) may be mapped to SC-FDMA symbols 7, 8, 9, and 11, respectively.
  • the PUCCH may be transmitted as in the embodiment of FIGS. 16A to 16C.
  • the following Equation 12 is applied instead of Equation 11.
  • the output of the scrambled bit stream is subjected to interleaving of Equation 5.
  • the value of N in Equation 5 is 120 in the case of a normal CP or an extended CP.
  • Equation 12 shows a process until the DFT precoding is applied to a signal to which interleaving, QPSK modulation, and spreading are applied.
  • RE mapping is based on equation (12).
  • the CRC process (S240), the TBCC and rate matching process (S241), the scrambling and interleaving process (S242), and the modulation process (S243) illustrated in FIG. 16A are respectively S180, S181, S182, and Similar to each of the S183 process. However, 120 bits are output by the S241 process, and 60 symbols are output by the S243 process.
  • each signal transmission process S250 is similar to each of processes S184, S185, S186, S187, S188, S189, and S190 illustrated in FIGS. 12B and 12C.
  • the 60 symbols modulated by the S243 process are divided into 4 symbol groups. Each symbol group contains 15 symbols. Two of the four symbol groups correspond to slot 1 (containing seven SC-FDMA symbols) and the rest correspond to slot 2 (containing seven SC-FDMA symbols). Specifically, one of the two symbol groups corresponding to slot 1 corresponds to one of the two PRBs for slot 1 (FIG. 16B), and the other one symbol group corresponds to the other of the two PRBs for slot 1 (FIG. 16C). Similarly, one of the two symbol groups corresponding to slot 2 corresponds to one of the two PRBs for slot 2 (FIG. 16B) and the other one symbol group corresponds to the other of the two PRBs for slot 2 (FIG. 16C).
  • RS is transmitted on the second and sixth symbols of the seven SC-FDMA symbols of slot 1
  • RS is transmitted on the second and sixth symbols of the seven SC-FDMA symbols of slot 2. The case is illustrated.
  • the number of DM-RSs transmitted per slot is different from the number of DM-RSs transmitted per slot in the embodiments of FIGS. 16A to 16C.
  • the signal that has undergone the resource mapping process is mapped to the SC-FDMA symbol n which finally transmits data and transmitted.
  • the CRC process (S260), TBCC and rate matching process (S261), the scrambling and interleaving process (S262), and the modulation process (S263) illustrated in FIG. 17A are each of steps S240, S241, S242, and S242 of FIG. Similar to each S243 process.
  • the signal transmission process S270 is similar to each of the processes S244, S245, S246, S247, S248, S249, and S250 illustrated in FIGS. 16B and 16C.
  • the 60 symbols modulated by the S263 process are divided into 4 symbol groups. Each symbol group contains 15 symbols. Two of the four symbol groups correspond to slot 1 (containing six SC-FDMA symbols) and the rest correspond to slot 2 (containing six SC-FDMA symbols). Specifically, one of the two symbol groups corresponding to slot 1 corresponds to one of the two PRBs for slot 1 (FIG. 17B), and the other one symbol group corresponds to the other of the two PRBs for slot 1 (FIG. 17C). Similarly, one of the two symbol groups corresponding to slot 2 corresponds to one of the two PRBs for slot 2 (FIG. 17B) and the other one symbol group corresponds to the other of the two PRBs for slot 2 (FIG. 17C).
  • 17B and 17C illustrate an example in which an RS is transmitted through a fourth symbol of six SC-FDMA symbols in slot 1 and is transmitted through a fourth symbol among six SC-FDMA symbols in slot 2.
  • a coding process As illustrated in FIGS. 18A and 18B, a coding process, a rate matching process, a modulation process, and a DFT precoding process are performed.
  • w_noc () is N ⁇ PUCCH_SF is to be.
  • the interleaving process is performed after the TBCC process, the rate matching process, and the scrambling process.
  • the output of the scrambled bit stream is subjected to interleaving of Equation 5.
  • the value of N in Equation 5 is 144 in the case of normal CP.
  • the output of the interleaved bit stream is then modulated with the QPSK symbol s ().
  • RE mapping and spreading based on Equation 13 below are applied to the QPSK symbols s (), and the symbols that have undergone resource mapping are finally mapped and transmitted to the SC-FDMA symbol n.
  • the CRC process (S280), the TBCC and rate matching process (S281), the scrambling and interleaving process (S282), and the modulation process (S283) illustrated in FIG. 18A are each S220 process, S221 process, S222 process, and Similar to each S223 process.
  • the 72 symbols modulated by the S283 process are divided into 6 symbol groups. Each symbol group includes 12 symbols. Three of the six symbol groups correspond to slot 1 (containing seven SC-FDMA symbols), and the rest correspond to slot 2 (containing seven SC-FDMA symbols).
  • 18B illustrates an example in which an RS is transmitted through a fourth symbol of seven SC-FDMA symbols in slot 1 and is transmitted through a fourth symbol among seven SC-FDMA symbols in slot 2.
  • the output of the scrambled bit stream is subjected to interleaving of Equation 5.
  • the value of N in Equation 5 is 120 in the case of a normal CP or an extended CP.
  • the QPSK modulated symbol is subjected to an RE mapping process based on Equation 14 below.
  • the CRC process (S300), TBCC and rate matching process (S301), the scrambling and interleaving process (S302), and the modulation process (S303) illustrated in FIG. 19A are respectively the S280 process, the S281 process, the S282 process, and the process of FIG. Similar to each of the S283 processes. However, 120 bits are output by the process S301 and 60 symbols are output by the process S303.
  • phase rotation process (S304), the spreading process (S305), the resource mapping process (S306), the cyclic shift process (S307), the DFT process (S308), the IFFT process (S309), and the SC-FDMA illustrated in FIG. 19B
  • Each signal transmission process S310 after symbol generation is similar to each of S284, S285, S286, S287, S288, S289, and S290 illustrated in FIG. 18B.
  • two RSs are transmitted per slot.
  • the 60 symbols modulated by the S303 process are divided into 6 symbol groups. Each symbol group includes ten symbols. Three of the six symbol groups correspond to slot 1 (containing seven SC-FDMA symbols), and the rest correspond to slot 2 (containing seven SC-FDMA symbols).
  • 19B illustrates an example in which an RS is transmitted through 2nd and 6th symbols of 7 SC-FDMA symbols of slot 1 and is transmitted through 2nd and 6th symbols of 7 SC-FDMA symbols of slot 2. It is.
  • a device eg, a terminal
  • 64 information payload bits to be transmitted by a device may be transmitted using one PRB per slot.
  • a device eg, a terminal
  • FIGS. 20A and 20B illustrate a process in which one PRB is used per slot to map a QPSK modulation symbol to one subframe.
  • an interleaving process is performed. Specifically, the output of the scrambled bit stream is subjected to the interleaving of Equation 5.
  • the value of N in Equation 5 is 144 in the case of normal CP.
  • Interleaved rate matching output is modulated via QPSK.
  • Equation 15 shows a process until the DFT precoding is applied to the signal to which QPSK modulation and spreading are applied.
  • the CRC process (S320), the TBCC and rate matching process (S321), the scrambling and interleaving process (S322), and the modulation process (S323) illustrated in FIG. 20A are each performed by the process S280, process S281, process S282, and process S282 of FIG. Similar to each of the S283 processes. However, 64 bits are input in step S320 to output 72 bits, 144 bits are output in step S321, and 72 symbols are output in step S323. In some cases, the scrambling and interleaving process S322 may be skipped.
  • the signal transmission process S330 is similar to each of the S284 process, the S285 process, the S286 process, the S287 process, the S288 process, the S289 process, and the S290 process illustrated in FIG. 18B.
  • spreading is not limited to a plurality of SC-FDMAs but is limited to one SC-FDMA symbol.
  • the phase rotation process S324 may be skipped. Used in the process S325 of Figure 20b Is to be.
  • DFT precoding is applied (S328).
  • the 72 symbols modulated through the S323 process are divided into two symbol groups. Each symbol group contains 36 symbols. One of the two symbol groups corresponds to slot 1 (containing seven SC-FDMA symbols), and the other corresponds to slot 2 (containing seven SC-FDMA symbols).
  • 20B illustrates an example in which an RS is transmitted through a fourth symbol of seven SC-FDMA symbols in slot 1 and is transmitted through a fourth symbol among seven SC-FDMA symbols in slot 2.
  • FIG. 20C when a region is divided into time and frequency, a process of mapping a bundle unit of six symbols to which spreading is applied is sequentially mapped to the frequency axis and then mapped to the time axis is illustrated. That is, FIG. 20C shows the final equation 15 It shows the mapping process for.
  • n is the time axis SC-FDMA symbol index
  • i is the frequency axis subcarrier index.
  • ⁇ w (0) s (0), w (0) s (1), ..., w (0) s (5) ⁇ are assigned to the first six subcarriers of the 12 subcarriers of the SC-FDMA symbol 0.
  • Mapped and ⁇ w (1) s (0), w (1) s (1), ..., w (1) s (5) ⁇ are the remaining 6 subcarriers out of the 12 subcarriers of SC-FDMA symbol 0. Is mapped to.
  • an interleaving process is performed. Specifically, the output of the scrambled bit stream is subjected to the interleaving of Equation 5.
  • the value of N in Equation 5 is 132 in the case of a normal CP.
  • Interleaved rate matching output is modulated via QPSK.
  • the CRC process (S340), TBCC and rate matching process (S341), the scrambling and interleaving process (S342), and the modulation process (S343) illustrated in FIG. 21A are respectively S320 process, S321 process, S322 process, and Similar to each of the S323 process. However, 66 bits are output by the S341 process and 66 symbols are output by the S343 process. In some cases, the scrambling and interleaving process S322 may be skipped.
  • phase rotation process S344, the spreading process S345, the resource mapping process S346, the cyclic shift process S347, the DFT process S348, the IFFT process S349, and the SC-FDMA illustrated in FIG. 21B Each signal transmission process (S350) after symbol generation is similar to each of S324, S325, S326, S327, S328, S329, and S330 illustrated in FIG. 20B. However, in the embodiment of FIGS. 21A and 21B, the total number of transmitted symbols is 66. In some cases, the phase rotation process S324 may be skipped. Used in the process of S345 of Figure 21b Is to be.
  • the 66 symbols modulated by the S343 process are divided into two symbol groups.
  • the first symbol group includes 36 symbols and the second symbol group includes 30 symbols.
  • One of the two symbol groups corresponds to slot 1 (containing seven SC-FDMA symbols), and the other corresponds to slot 2 (containing seven SC-FDMA symbols).
  • FIG. 21B a case where an RS is transmitted through a fourth symbol of seven SC-FDMA symbols in slot 1 and is transmitted through a fourth symbol among seven SC-FDMA symbols in slot 2 is illustrated.
  • the last SC-FDMA symbol in slot 2 is then allocated for SRS signal transmission.
  • Signals having undergone the process based on Equations 5 and 15 are mapped to the REs of the SC-FDMA symbol n for transmitting data and transmitted.
  • the mapping process of FIG. 20C may be similarly applied to the embodiment of FIGS. 22A and 22B.
  • the CRC process (S360), TBCC and rate matching process (S361), the scrambling and interleaving process (S362), and the modulation process (S363) illustrated in FIG. 22A are respectively S340 process, S341 process, S342 process, and Similar to each S343 process.
  • phase rotation process S364
  • spreading process S365
  • resource mapping process S366
  • cyclic shift process S367
  • DFT process S368
  • IFFT process S369
  • SC-FDMA SC-FDMA
  • the 60 symbols modulated by the S363 process are divided into two symbol groups. Each symbol group contains 30 symbols. One of the two symbol groups corresponds to slot 1 (containing five SC-FDMA symbols) and the other corresponds to slot 2 (containing five SC-FDMA symbols).
  • FIG. 22B a case in which an RS is transmitted through a fourth symbol of six SC-FDMA symbols in slot 1 and is transmitted through a fourth symbol among six SC-FDMA symbols in slot 2 is illustrated.
  • the spreading process is not performed after QPSK modulation.
  • the spreading process is not performed after the QPSK modulation.
  • Equation 5 The output of the scrambled bit stream is subjected to interleaving of Equation 5.
  • the value of N in Equation 5 is 288 in the case of a normal CP.
  • Interleaved rate matching output is modulated via QPSK.
  • Equation 17 shows the process up until the DFT precoding is applied to the QPSK modulated signal.
  • the CRC process (S380), TBCC and rate matching process (S381), the scrambling and interleaving process (S382), and the modulation process (S383) illustrated in FIG. 23A are each S320 process, S321 process, S322 process, and FIG. Similar to each of the S323 process.
  • 128 bits are input in step S380 to output 130 bits
  • 288 bits are output in step S381
  • 144 symbols are output in step S383.
  • each of the phase rotation process S384, the cyclic shift process S386, the DFT process S387, the IFFT process S388, and the signal transmission process S389 after generating the SC-FDMA symbol are illustrated in FIG. 20B.
  • the 144 symbols modulated by the S383 process are divided into two symbol groups. Each symbol group contains 72 symbols. One of the two symbol groups corresponds to slot 1 (containing seven SC-FDMA symbols), and the other corresponds to slot 2 (containing seven SC-FDMA symbols).
  • FIG. 23B a case in which an RS is transmitted through a fourth symbol of seven SC-FDMA symbols in slot 1 and is transmitted through a fourth symbol among seven SC-FDMA symbols in slot 2 is illustrated.
  • Equation 5 The output of the scrambled bit stream is subjected to interleaving of Equation 5.
  • the value of N in Equation 5 is 240 in the case of a normal CP.
  • Interleaved rate matching output is modulated via QPSK.
  • Equation 18 The RE mapping based on Equation 18 below is applied to the modulation symbols. Equation 18 shows the process up until the DFT precoding is applied to the QPSK modulated signal.
  • the phase rotation process (S404), the resource mapping process (S405), the cyclic shift process (S406), the DFT process (S407), the IFFT process (S408), and the signal transmission process after SC-FDMA symbol generation ( S409) are each similar to the S384 process, S385 process, S386 process, S387 process, S388 process, and S389 process illustrated in FIG. 23B.
  • the resource mapping process S405 is based on Equation 18, and two RSs are transmitted per slot.
  • 120 symbols modulated by the S403 process are divided into two symbol groups. Each symbol group contains 60 symbols. One of the two symbol groups corresponds to slot 1 (containing seven SC-FDMA symbols), and the other corresponds to slot 2 (containing seven SC-FDMA symbols).
  • 24B illustrates an example in which an RS is transmitted through 2nd and 6th symbols of 7 SC-FDMA symbols of slot 1 and is transmitted through 2nd and 6th symbols of 7 SC-FDMA symbols of slot 2. It is.
  • the ai value which is the bit size of the payload
  • having a size other than 64 bits may be similarly applied.
  • Equation 10 to 18 may be replaced by Equation 19 below.
  • Equation 19 Is Depending on the value of, use one of Tables 5, 8, and 9.
  • 25 is a diagram illustrating input and output relationships between a DFT unit and an IFFT unit included in a terminal according to an embodiment of the present invention.
  • the terminal U100 includes a modulator U110, a DFT unit U120a and U120b, an IFFT unit U130, a pulse shaping unit U140, a digital-to-analog signal conversion and an RF (radio frequency) unit U150, And an antenna U160.
  • the modulator U110 applies the above-described CRC, coding, rate matching, and modulation to a k , which is a bit stream to be transmitted by the terminal U100 through the PUCCH. Through this, the modulator U110 Is output to the DFT unit U120a.
  • the DFT unit U120a The above-described DFT precoding is applied. Through this, the DFT unit U120a Is output to the IFFT unit U130. DFT precoded signal Is mapped to a frequency band for input of the IFFT unit U130 and a designated OFDM (or SC-FDMA) symbol number (ie, (k, l)).
  • OFDM or SC-FDMA
  • the pulse shaping unit U140 applies parallel-to-serial conversion, CP insertion, and pulse shaping to the signal output from the IFFT unit U130.
  • the RF unit U150 applies a digital signal-to-analog conversion and an RF conversion to the signal output from the pulse shaping unit U140.
  • the PUCCH signal is multiplexed (frequency multiplexed) with a signal of another channel (eg, PUSCH).
  • the multiplexed signal is transmitted through the antenna U160 in the form of a single carrier via the IFFT unit U130.
  • FIG. 26 is a diagram illustrating a method of mapping a PUCCH to a frequency domain according to the number of PRBs used per slot according to an embodiment of the present invention.
  • n PRB represents an index of a plurality of frequency blocks resulting from dividing the total system bandwidth by one PRB. Specifically, n PRB represents the index from the low frequency block to the high frequency block.
  • the various payload bits a i described above are determined by the base station.
  • the base station informs the terminal of the determined payload bit a i .
  • a method (method M100, M110, M120) for determining payload bit a i will be described. At least one of the methods M100 to M120 may be used.
  • the reason of 4 bits per carrier is that in case of TDD, 1 bit of ACK / NACK for up to 4 DCIs (downlink control information) per CC is considered.
  • the method M110 is a method of determining the payload bit a i based on the number of activated CCs among the total CCs allocated by the RRC setting including the carrier aggregation function.
  • Method M110 is similar to method M100, but differs from method M100 in that method M110 considers DCI of the number of activated CCs. That is, in method M110, ACK / NACK of de-activated CC is not taken into account.
  • Method M120 is a method in which a base station informs a user equipment of a DCI of a CC actually scheduled among CCs activated by an RRC configuration including a carrier aggregation function through a downlink. That is, the base station determines the actual CC to be used out of the total possible CC, and then records the schedule information in the downlink control information (DCI) of each CC and transmits to the terminal through the downlink.
  • the terminal receives the DCI through the downlink for each CC.
  • the UE informs the base station of n ACK / NACK through the uplink.
  • the number of DCIs for each CC successfully received by the UE may be different from the total number of DCIs transmitted by the actual base station.
  • a method of inferring the total number of DCIs transmitted by the actual base station and informing the base station by determining that the terminal is equal to the sum of total DCIs transmitted by the actual base station will be described.
  • the total number of downlink assignment indexes (DAI) in the DCI information is counted, and the payload bit a i is determined based on the counted value.
  • the method M120 will be described in detail with reference to FIGS. 27 and 28.
  • FIG. 27 is a diagram illustrating a CC-specific DAI mapping method (hereinafter, referred to as a 'first DAI mapping method') for an FDD type according to an embodiment of the present invention.
  • FIG. 27 exemplifies a case where the total CCs allocated by activation of the SCell (CC) after the RRC setup is 13 (CC1 to CC13).
  • the CRC output expressed corresponding to the number of CCs actually transmitted is shown in Table 10 below. For example, as shown in FIG. 27, when nine CCs are actually used and transmitted, the CRC output value is 11011100. This value is actually bit reversed by the base station to form 00111011. As shown in FIG. 27, 00111011 is divided into 2 bits for four CCs (CC1, CC2, CC4, and CC5) and mapped to the DAI. The DAI is included in the DCI and transmitted to the terminal through downlink.
  • the CRC bit 8 bits (eg, 00111011) transmitted in reversed bit order are referred to as total DAI.
  • the remaining five CCs (eg, CC7, CC9, CC10, CC12, and CC13) for which transmission is valid are recorded in the DAI in the form of increasing the 2-bit counter value in the order of the number of CCs to be transmitted. That is, as the index for n CCs (or DCIs) increases, the 2-bit counter for n CCs (or DCIs) increases (eg, 00-> 01-> 10-> 11-> 00).
  • DAI values (eg, 0001101100) transmitted over n CCs (eg, CC7, CC9, CC10, CC12, and CC13) are referred to as a counter DAI area.
  • FIG. 27 illustrates a case where only 9 base stations (CC1, CC2, CC4, CC5, CC7, CC9, CC10, CC12, and CC13) of 13 activated CCs transmit data to the UE.
  • CCs CC1, CC2, CC4, and CC5
  • DAI the reversed CRC output bit through DAI
  • five CCs CC7, CC9, CC10, CC12, and CC13 correspond to a counter DAI region.
  • FIG. 27 illustrates a case where a reception demodulation error of two CCs CC9 and CC13 occurs when the terminal receives Total DAI and Counter DAI from the base station.
  • the terminal determines that the pattern of the counter DAI is abnormal and determines that an error exists in the counter DAI area. Through this, the terminal determines that a reception error has occurred.
  • the UE may determine that the four CCs (CC3, CC6, CC8, CC11) is not transmitted through the pattern of total DAI and counter DAI defined in Table 10.
  • the terminal determines that the codebook size is 9 at last, and the ACKnowledgement (A) or Not ACKnowledged (N) response is transmitted to the base station through the uplink in the CC index order (from small index to large index) for the valid CC. send.
  • FIG. 28 is a diagram illustrating a total and counter DAI mapping method (hereinafter, referred to as a 'second DAI mapping method') for a TDD type according to an embodiment of the present invention.
  • the second DAI mapping method is similar to the first DAI mapping method.
  • the second DAI mapping method determines a subframe range (eg, up to four subframes) and expresses the number of DCIs actually transmitted within the subframe range as total CRC (total DAI). It is different from the method.
  • FIG. 28 illustrates a case in which the number of activated CCs CC1 to CC10 is 10 and a total of 15 DCIs are allocated and transmitted to the UE during 4 subframe times.
  • the total DAI value transmitted to the terminal is 10011000.
  • the counter DAI is 0001101100011011000110 and is transmitted to the UE through 11 DAIs.
  • 29 is a diagram illustrating a transmitter according to an embodiment of the present invention.
  • the transmitter Tx100 includes a processor Tx110, a memory Tx120, and an RF converter Tx130.
  • the processor Tx110 may be configured to implement the procedures, functions, and methods described herein in connection with transmission (eg, transmission of a base station, transmission of a terminal). In addition, the processor Tx110 may control each component of the transmitter Tx100.
  • the memory Tx120 is connected to the processor Tx110 and stores various information related to the operation of the processor Tx110.
  • the RF converter Tx130 is connected to the processor Tx110 and transmits or receives a radio signal.
  • the transmitter Tx100 may have a single antenna or multiple antennas.
  • the transmitter Tx100 may be a base station or a terminal.
  • FIG. 30 is a diagram illustrating a receiver according to an embodiment of the present invention.
  • the receiver Rx200 includes a processor Rx210, a memory Rx220, and an RF converter Rx230.
  • the processor Rx210 may be configured to implement the procedures, functions, and methods described herein with respect to reception (eg, reception of a base station, reception of a terminal). In addition, the processor Rx210 may control each component of the receiver Rx200.
  • the memory Rx220 is connected to the processor Rx210 and stores various information related to the operation of the processor Rx210.
  • the RF converter Rx230 is connected to the processor Rx210 and transmits or receives a radio signal.
  • the receiver Rx200 may have a single antenna or multiple antennas.
  • the receiver Rx200 may be a terminal or a base station.
  • the embodiment of the present invention is not implemented only through the apparatus and / or method described so far, but may be implemented through a program that realizes a function corresponding to the configuration of the embodiment of the present invention or a recording medium on which the program is recorded.
  • Such implementations can be readily implemented by those skilled in the art from the description of the above-described embodiments.

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

L'invention concerne un procédé permettant à un émetteur d'émettre des informations de rétroaction par le biais d'un canal de commande de liaison montante. Cet émetteur module les informations de rétroaction en une pluralité de symboles. L'émetteur disperse la pluralité de symboles à l'aide d'une séquence orthogonale de dispersion ayant une longueur inférieure à 5. L'émetteur met la pluralité de symboles dispersés en correspondance avec une pluralité d'éléments de ressources (RE).
PCT/KR2016/006975 2015-07-10 2016-06-29 Procédé et dispositif d'émission d'une rétroaction de grande capacité dans un système cellulaire de communication sans fil basé sur l'agrégation de porteuses WO2017010708A1 (fr)

Applications Claiming Priority (12)

Application Number Priority Date Filing Date Title
KR10-2015-0098680 2015-07-10
KR20150098680 2015-07-10
KR20150116828 2015-08-19
KR10-2015-0116828 2015-08-19
KR10-2015-0120417 2015-08-26
KR20150120417 2015-08-26
KR20150121093 2015-08-27
KR10-2015-0121093 2015-08-27
KR20150142200 2015-10-12
KR10-2015-0142200 2015-10-12
KR10-2016-0081119 2016-06-28
KR1020160081119A KR20170007119A (ko) 2015-07-10 2016-06-28 캐리어 집성 기반의 무선 통신 셀룰러 시스템에서 고 용량의 피드백을 전송하는 방법 및 장치

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