WO2016197408A1 - 可进行插黑的显示装置 - Google Patents

可进行插黑的显示装置 Download PDF

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Publication number
WO2016197408A1
WO2016197408A1 PCT/CN2015/082205 CN2015082205W WO2016197408A1 WO 2016197408 A1 WO2016197408 A1 WO 2016197408A1 CN 2015082205 W CN2015082205 W CN 2015082205W WO 2016197408 A1 WO2016197408 A1 WO 2016197408A1
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WIPO (PCT)
Prior art keywords
output
circuit
gamma
control interface
level
Prior art date
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Ceased
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PCT/CN2015/082205
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English (en)
French (fr)
Inventor
纪飞林
秦杰辉
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Wuhan China Star Optoelectronics Technology Co Ltd
TCL China Star Optoelectronics Technology Co Ltd
Original Assignee
Shenzhen China Star Optoelectronics Technology Co Ltd
Wuhan China Star Optoelectronics Technology Co Ltd
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Application filed by Shenzhen China Star Optoelectronics Technology Co Ltd, Wuhan China Star Optoelectronics Technology Co Ltd filed Critical Shenzhen China Star Optoelectronics Technology Co Ltd
Priority to US14/781,434 priority Critical patent/US9898986B2/en
Publication of WO2016197408A1 publication Critical patent/WO2016197408A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3618—Control of matrices with row and column drivers with automatic refresh of the display panel using sense/write circuits
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3696—Generation of voltages supplied to electrode drivers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0245—Clearing or presetting the whole screen independently of waveforms, e.g. on power-on
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0248—Precharge or discharge of column electrodes before or after applying exact column voltages
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0297—Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G09G2310/061—Details of flat display driving waveforms for resetting or blanking
    • G09G2310/063—Waveforms for resetting the whole screen at once
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0257—Reduction of after-image effects
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0673—Adjustment of display parameters for control of gamma adjustment, e.g. selecting another gamma curve
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/04—Changes in size, position or resolution of an image
    • G09G2340/0407—Resolution change, inclusive of the use of different resolutions for different screen areas
    • G09G2340/0435—Change or adaptation of the frame rate of the video stream

Definitions

  • the present invention relates to the field of display devices, and in particular, to a display device that can perform black insertion.
  • the black insertion technology is realized by controlling the digital signal outputted by the timing control (T-CON, timing control) circuit. Inserting black through T-CON means that the data of one frame is the data of the normal picture, and the data of the other frame is 00000000 (that is, the black picture is inserted). For example, the first frame outputs the first frame under normal conditions, the second frame outputs a black frame, the third frame outputs a second frame under normal conditions, and the fourth frame outputs a black frame, which is sequentially cycled.
  • the drawback of inserting black through T-CON is that the T-CON circuit and the source drive circuit still need to perform RGB data transmission when the black screen is outputted, which increases the power consumption of the display panel.
  • the embodiment of the invention discloses a black-displayable display device, which can realize black screen output when the power consumption of the display device is reduced.
  • the black-fillable display device disclosed in the embodiment of the invention comprises a display screen, a gate driving circuit and a source driving circuit connected to the display screen, a gamma circuit and a timing control circuit, wherein the gamma circuit comprises one of two a multiplexer, the input data of one input of the two-in-one multiplexer is a VCOM voltage output by the gamma circuit, and the input data of the other input is a multiple-programmable memory storage of the gamma circuit a predetermined value is subjected to digital-to-analog conversion of the converted voltage, and one of the general-purpose input-output GPIO interfaces of the timing control circuit is configured to control a control interface of the output of the two-in-one multiplexer, in the control Under control of the interface, when the two-in-one multiplexer selects to output the VCOM voltage output by the gamma circuit, the output VCOM voltage is amplified by an operational amplifier in the gamma circuit and output to the source a pole
  • the two-in-one multiplexer selects the preset value in the multiple-programmable memory outputting the gamma circuit to undergo digital-to-analog conversion after the control of the control interface.
  • the digital-to-analog converted voltage of the output is amplified by the operational amplifier and output to the source driving circuit as a second required for the digital-to-analog conversion of the source driving circuit.
  • a gamma reference voltage the timing control circuit transmitting a normal picture when the gamma reference voltage required for the digital-to-analog conversion of the source driving circuit is the second gamma reference voltage.
  • the two-in-one multiplexer selects to output a VCOM voltage output by the gamma circuit when the control interface is set to a low level, and is set to a high power at the control interface.
  • the preset value in the plurality of programmable memories outputting the gamma circuit is subjected to digital-to-analog converted converted voltage.
  • the two-in-one multiplexer selects to output a VCOM voltage output by the gamma circuit when the control interface is set to a high level, and is set at the control interface When the level is low, the voltage converted by the digital-to-analog conversion of the preset value in the plurality of programmable memories outputting the gamma circuit is selected.
  • the timing control circuit sets a level of the control interface to a high level when the display screen needs to output an odd frame picture, and when the display screen needs to output an even frame picture, Set the level of the control interface to a low level.
  • the timing control circuit sets the level of the control interface to a low level when the display screen needs to output an odd frame picture, and when the display screen needs to output an even frame picture, Set the level of the control interface to a high level.
  • the embodiment of the present invention has the following beneficial effects: when the timing control circuit does not perform data output, the black screen output can be realized, thereby reducing the power consumption of the timing control circuit and the source driving circuit. Thereby reducing the power consumption of the entire display device.
  • FIG. 1 is a schematic structural view of a display device according to an embodiment of the present disclosure
  • FIG. 2 is a specific circuit diagram of the gamma circuit of FIG. 1 in the first embodiment of the present disclosure
  • Figure 3 is a schematic diagram of the black screen output
  • Figure 4 is another schematic diagram of the black screen output
  • FIG. 5 is a specific circuit diagram of the gamma circuit of FIG. 1 in a second embodiment of the present disclosure.
  • a display device in an embodiment of the present invention includes a display screen 11, a gate drive circuit 12 and a source drive circuit 13, and a gamma circuit 14 and a timing control circuit 15 connected to the display screen 11.
  • the timing control circuit 15 is for controlling the timing of the gate drive circuit 12 and the source drive circuit 13, and digitally processing the picture.
  • the gamma circuit 14 is used to generate a gamma corrected reference voltage required by the source drive circuit 13.
  • the gate driving circuit 12 is used to turn on a TFT (TFT, thin film transistor) row by row.
  • the source driving circuit 13 is configured to send the analog gray scale voltage converted by the digital-to-analog conversion of the picture digital signal processed by the timing control circuit 15 to the TFT opened by the gate driving circuit 12.
  • the specific circuit configurations of the gate driving circuit 12, the source driving circuit 13, and the timing control circuit 15 are the same as those in the prior art, and are not described herein again.
  • the improvement of the specific circuit structure of the present invention with respect to the prior art is mainly due to the improvement of the circuit structure of the gamma circuit 14.
  • the gamma circuit 14 includes a digital-to-analog converter 142 (shown as a DAC to represent the digital-to-analog converter 142 in FIG. 2) disposed between the gamma circuit 14 and the operational amplifier 143.
  • the two-in-one multiplexer 141 (the alternate multiplexer 141 is represented by MUX in FIG. 2).
  • the input data of the first input terminal 1411 of the selector 141 is the VCOM voltage outputted by the gamma circuit 14, and the input data of the second input terminal 1412 is a pre-MTP (MTP, multiple programmable) memory 144 in the gamma circuit 14. Set the value after the digital-to-analog conversion.
  • MTP multiple programmable
  • One of the GPIO (GPIO, General Purpose Input Output) interfaces of the timing control circuit 141 is configured to control the control interface BlACK_EN of the output of the selector 141, that is, the control terminal of the selector 141 is connected to the control interface B1ACK_EN, at the control interface BlACK_EN Under control, the selector 141 selects one of the two input data of the two inputs to be sent to the output of the selector 141.
  • GPIO General Purpose Input Output
  • the timing control circuit 15 sets the level of the control interface B1ACK_EN to a low level, that is, when the level of the control terminal of the selector 141 is a low level, the selector 141 selects and outputs the input data of the first input terminal 1411. That is, the VCOM voltage output from the gamma circuit 14 is outputted to the source drive circuit 13 by the amplification of the operational amplifier 143, and is used as the first gamma reference voltage required for the digital-to-analog conversion by the source drive circuit 13.
  • the timing control circuit 15 is in the source drive circuit 13 When the gamma reference voltage required for digital-to-analog conversion is the first gamma reference voltage, data output is not performed, thereby realizing black-out picture output.
  • timing control circuit 15 when the timing control circuit 15 does not perform data output, black screen output can be realized, thereby reducing power consumption of the timing control circuit 15 and the source driving circuit 13, thereby reducing power consumption of the entire display device. .
  • the selector 141 selects to output the input data of the second input terminal 1412, that is, the MTP memory.
  • the preset value in 144 is subjected to digital-to-analog conversion and the output voltage after the digital-to-analog conversion is amplified by the operational amplifier 143 and output to the source driving circuit 13 as a source driving circuit 13 for digital mode. Convert the required second gamma reference voltage.
  • the timing control circuit 15 transmits a frame normal picture when the second gamma reference voltage required for the digital-to-analog conversion by the source drive circuit 13 is the second gamma reference voltage.
  • the timing control circuit 15 sets the level of the control interface B1ACK_EN to a high level when the display screen 11 needs to output an odd frame picture, and controls the interface BlACK_EN when the display screen 11 needs to output an even frame picture.
  • the level is set to a low level, thereby realizing the schematic diagram of the black-out picture output shown in FIG.
  • the timing control circuit 15 may also set the level of the control interface B1ACK_EN to a low level when the display screen 11 needs to output an odd frame picture, and control when the display screen 11 needs to output an even frame picture.
  • the level of the interface BlACK_EN is set to a high level, thereby realizing the schematic diagram of the black-out picture output described in FIG.
  • FIG. 5 is a detailed circuit diagram of the gamma circuit 14 in the second embodiment of the present disclosure.
  • the input data of the first input terminal 1411 of the selector 141 is the voltage converted by the digital-to-analog conversion of the preset value in the MTP memory 144 of the gamma circuit 14.
  • the input data of the second input terminal 1412 is the VCOM voltage output by the gamma circuit 14.
  • the timing control circuit 15 sets the level of the control interface B1ACK_EN to a high level, that is, the level of the control terminal of the selector 141 is a high level, and the selector 141 selects When the input data of the second input terminal 1412 is output, the output data is a gamma circuit
  • the output VCOM voltage of 14 is outputted to the source drive circuit 13 via the amplification of the operational amplifier 143, and the first gamma reference voltage required for the digital-to-analog conversion is performed as the source drive circuit 13.
  • the timing control circuit 15 does not perform data output, thereby realizing black-out picture output.
  • the timing control circuit 15 sets the level of the control interface B1ACK_EN to a low level, that is, the level of the control terminal of the selector 14 is a low level, and the selector 141 selects and outputs the input data of the first input terminal 1411, the output is output.
  • the data is a voltage converted by the digital-to-analog conversion of a preset value in the MTP memory 144, and the output-transformed digital-to-analog converted voltage is amplified by the operational amplifier 143 and output to the source driving circuit 13 as the source driving circuit 13 A second gamma reference voltage required for digital to analog conversion.
  • the timing control circuit 15 transmits a frame normal picture when the second gamma reference voltage required for the digital-to-analog conversion by the source drive circuit 13 is the second gamma reference voltage.
  • the timing control circuit 15 can set the level of the control interface B1ACK_EN to a low level when the display screen 11 needs to output an odd frame picture, and control the interface BlACK_EN when the display screen 11 needs to output an even frame picture.
  • the level of the level is set to a high level, thereby realizing the schematic diagram of the black-out picture output shown in FIG.
  • the timing control circuit 15 may also set the level of the control interface B1ACK_EN to a high level when the display screen 11 needs to output an odd frame picture, and control when the display screen 11 needs to output an even frame picture.
  • the level of the interface BlACK_EN is set to a low level, thereby realizing the schematic diagram of the black-out picture output described in FIG.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

公开了一种可插黑的显示装置，其中的伽马电路（14）包括二选一的多路选择器（141），选择器（141）的一个输入端（1411）的输入数据为伽马电路（14）输出的VCOM电压，另一个输入端（1412）的输入数据为伽马电路（14）的多次可编程存储器（144）存储的一预设值经过数模转换器（142）转换后的电压。时序控制电路（15）的其中一个通用输入输出GPIO接口被配置为控制选择器（141）的输出的控制接口，选择器（141）在控制接口控制下，选择输入伽马电路（14）输出的VCOM电压时，输出电压经伽马电路（14）中的运算放大器（43）放大后输出至源极驱动电路，作为源极驱动电路进行数模转换时所需要的第一伽马参考电压，此时，时序控制电路（15）不进行数据输出，从而实现插黑画面的输出。该显示装置可在降低功耗的同时实现插黑画面的输出。

Description

可进行插黑的显示装置
本发明要求2015年6月8日递交的发明名称为“可进行插黑的显示装置”的申请号201510310336.2的在先申请优先权，上述在先申请的内容以引入的方式并入本文本中。
技术领域
本发明涉及显示装置技术领域，尤其涉及一种可进行插黑的显示装置。
背景技术
随着LCD显示技术的不断发展，无论是广大消费者，还是从事液晶显示行业从业者，对显示面板的画面显示效果要求越来越高，对液晶显示面板的各种规格也要求的越来越严苛。众所周知液晶显示面板最低的画面刷新率为60Hz，显示一帧画面的时长约16.7ms，但是在某些特定的画面容易看到严重的拖影。受制于液晶的响应时间较慢，很长一段时间画面刷新率都无法做到提升。随着技术的发展，液晶的响应时间也越来越快，画面刷新率的提升变成了现实。因此，为了解决之前的拖影，将画面刷新率翻倍，在原来两帧之间插入一个黑画面(即插黑)的技术变成了可能。另外，随着液晶显示技术的发展，3D显示技术也迅速地进入了人们的日常生活中。但3D显示有一个最大的问题就是左右眼的画面出现交叠(crosstalk)，影响了3D的显示效果，因此在3D显示技术中也广泛应用了插黑技术，即为了提高液晶面板的画面刷新率，在左右眼画面中间插入一个黑画面以避免crosstalk的出现。
目前，插黑技术是通过控制时序控制(T-CON，时序控制)电路输出的数字信号实现的。通过T-CON插黑就是一帧的数据是正常画面的数据，另外一帧的数据为00000000(即插黑画面)。例如，第一帧输出正常情况下的第一帧，第二帧输出一个黑画面，第三帧输出正常情况下的第二帧，第四帧又输出一个黑画面，依次循环。通过T-CON插黑的缺陷在于在输出插黑画面时，T-CON电路与源极驱动电路仍然需要进行RGB数据传输，增加了显示面板的功耗。
发明内容
本发明实施例公开了一种可插黑的显示装置，可在降低显示装置的功耗的情况下，实现插黑画面输出。
本发明实施例公开的可插黑的显示装置，包括显示屏、与所述显示屏连接的门驱动电路与源极驱动电路、伽马电路及时序控制电路，所述伽马电路包括二选一多路选择器，所述二选一多路选择器的一个输入端的输入数据为所述伽马电路输出的VCOM电压，另一个输入端的输入数据为所述伽马电路的多次可编程存储器存储的一预设值经过数模转换转换后的电压，所述时序控制电路的其中一个通用输入输出GPIO接口被配置为控制所述二选一多路选择器的输出的控制接口，在所述控制接口的控制下，所述二选一多路选择器选择输出所述伽马电路输出的VCOM电压时，所述输出的VCOM电压经所述伽马电路中的运算放大器放大后输出至所述源极驱动电路，作为所述源极驱动电路进行数模转换时所需的第一伽马参考电压，所述时序控制电路在所述源极驱动电路进行数模转换时所需的伽马参考电压为所述第一伽马参考电压时，不进行数据输出，从而实现插黑画面输出。
在一个实施例中，所述二选一多路选择器在所述控制接口的控制下，选择输出所述伽马电路的所述多次可编程存储器中所述预设值经过数模转换转换后的电压时，所述输出的经过数模转换转换后的电压经所述运算放大器放大后输出至所述源极驱动电路，作为所述源极驱动电路进行数模转换时所需的第二伽马参考电压，所述时序控制电路在所述源极驱动电路进行数模转换时所需的伽马参考电压为所述第二伽马参考电压时，传输正常画面。
在一个实施例中，所述二选一多路选择器在所述控制接口被设置为低电平时，选择输出所述伽马电路输出的VCOM电压，以及在所述控制接口被设置为高电平时，选择输出所述伽马电路的所述多次可编程存储器中所述预设值经过数模转换转换后的电压。
在一个实施例中，所述二选一多路选择器在所述控制接口被设置为高电平时，选择输出所述伽马电路输出的VCOM电压，以及在所述控制接口被设置 为低电平时，选择输出所述伽马电路的所述多次可编程存储器中所述预设值经过数模转换转换后的电压。
在一个实施例中，所述时序控制电路在所述显示屏需要输出奇数帧画面时，将所述控制接口的电平设置为高电平，以及在所述显示屏需要输出偶数帧画面时，将所述控制接口的电平设置为低电平。
在一个实施例中，所述时序控制电路在所述显示屏需要输出奇数帧画面时，将所述控制接口的电平设置为低电平，以及在所述显示屏需要输出偶数帧画面时，将所述控制接口的电平设置为高电平。
与现有技术相比，本发明实施例具有以下有益效果：在时序控制电路不进行数据输出的情况下，可实现插黑画面输出，从而可降低时序控制电路与源极驱动电路的功耗，从而降低整个显示装置的功耗。
附图说明
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明公开的一种实施例中显示装置的结构示意图；
图2为本发明公开的第一种实施例中图1中的伽马电路的具体电路图；
图3为插黑画面输出的示意图；
图4为插黑画面输出的另一示意图；
图5为本发明公开的第二种实施例中图1中的伽马电路的具体电路图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性 劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
参考图1，本发明公开的一种实施例中的显示装置包括显示屏11、与显示屏11连接的门驱动电路12与源极驱动电路13、伽马电路14及时序控制电路15。时序控制电路15用于对门驱动电路12和源极驱动电路13的时序进行控制，以及对图片进行数字信号处理。伽马电路14用于产生源极驱动电路13需要的伽马校正的参考电压。门驱动电路12用于逐行开启TFT(TFT，薄膜晶体管)。源极驱动电路13用于将时序控制电路15处理后的图片数字信号经数模转换转换成的模拟的灰阶电压送至门驱动电路12打开的TFT中。门驱动电路12、源极驱动电路13及时序控制电路15的具体电路结构与现有技术相同，在此不再赘述。本发明相对现有技术的具体电路结构的改进主要在于伽马电路14的电路结构的改进。
图2为本发明公开的第一种实施例中伽马电路14的具体电路图。相较于现有技术，本实施例中，伽马电路14包括设置于伽马电路14的数模转换器142(在图2中以DAC来表示数模转换器142)及运算放大器143之间的二选一多路选择器141(在图2中以MUX来表示二选一多路选择器141)。选择器141的第一输入端1411的输入数据为伽马电路14输出的VCOM电压，第二输入端1412的输入数据为伽马电路14中MTP(MTP，多次可编程)存储器144中一预设值经过数模转换转换后的电压。时序控制电路141的其中一个GPIO(GPIO，通用输入输出)接口被配置为控制选择器141的输出的控制接口BlACK_EN，即选择器141的控制端与该控制接口BlACK_EN连接，在该控制接口BlACK_EN的控制下，选择器141从两个输入端的两路输入数据中选择一路数据送至选择器141的输出端。
本实施例中，时序控制电路15将控制接口BlACK_EN的电平设置为低电平时，即选择器141的控制端的电平为低电平时，选择器141选择输出第一输入端1411的输入数据，即伽马电路14输出的VCOM电压，输出的VCOM电压经运算放大器143的放大后输出至源极驱动电路13，作为源极驱动电路13进行数模转换所需的第一伽马参考电压。时序控制电路15在源极驱动电路13 进行数模转换所需的伽马参考电压为上述第一伽马参考电压时，不进行数据输出，从而实现插黑画面输出。
本实施例中，在时序控制电路15不进行数据输出的情况下，可实现插黑画面输出，从而可降低时序控制电路15与源极驱动电路13的功耗，从而降低整个显示装置的功耗。
本实施例中，在控制接口BlACK_EN的电平被设置为高电平时，即选择器14的控制端的电平为高电平时，选择器141选择输出第二输入端1412的输入数据，即MTP存储器144中的该预设值经过数模转换转换后的电压，输出的经过数模转换转换后的电压经运算放大器143的放大后输出至源极驱动电路13，作为源极驱动电路13进行数模转换所需的第二伽马参考电压。时序控制电路15在源极驱动电路13进行数模转换所需的第二伽马参考电压为上述第二伽马参考电压时，传输一帧正常画面。
本实施例中，时序控制电路15在显示屏11需要输出奇数帧画面时，将控制接口BlACK_EN的电平设置为高电平，以及在显示屏11需要输出偶数帧画面时，将控制接口BlACK_EN的电平设置为低电平，从而实现图3所示的插黑画面输出的示意图。
当然，可替换地，时序控制电路15也可在显示屏11需要输出奇数帧画面时，将控制接口BlACK_EN的电平设置为低电平，以及在显示屏11需要输出偶数帧画面时，将控制接口BlACK_EN的电平设置为高电平，从而实现图4所述的插黑画面输出的示意图。
图5为本发明公开的第二种实施例中伽马电路14的具体电路图。与图2不同之处在于，本实施例中，选择器141的第一输入端1411的输入数据为伽马电路14中MTP存储器144中该预设值经过数模转换转换后的电压。第二输入端1412的输入数据为伽马电路14输出的VCOM电压。
因此，与图2不同的是，本实施例中，在时序控制电路15将控制接口BlACK_EN的电平设置为高电平，即选择器141的控制端的电平为高电平，选择器141选择输出第二输入端1412的输入数据时，输出的数据为伽马电路 14输出的VCOM电压，输出的VCOM电压经运算放大器143的放大后输出至源极驱动电路13，作为源极驱动电路13进行数模转换转换所需的第一伽马参考电压。时序控制电路15在源极驱动电路13进行数模转换所需的伽马参考电压为上述第一伽马参考电压时，不进行数据输出，从而实现插黑画面输出。
在时序控制电路15将控制接口BlACK_EN的电平被设置为低电平，即选择器14的控制端的电平为低电平，选择器141选择输出第一输入端1411的输入数据时，输出的数据为MTP存储器144中一预设值经过数模转换转换后的电压，输出的经过数模转换转换后的电压经运算放大器143的放大后输出至源极驱动电路13，作为源极驱动电路13进行数模转换所需的第二伽马参考电压。时序控制电路15在源极驱动电路13进行数模转换所需的第二伽马参考电压为上述第二伽马参考电压时，传输一帧正常画面。
本实施例中，时序控制电路15可在显示屏11需要输出奇数帧画面时，将控制接口BlACK_EN的电平设置为低电平，以及在显示屏11需要输出偶数帧画面时，将控制接口BlACK_EN的电平设置为高电平，从而实现图3所示的插黑画面输出的示意图。
当然，可替换地，时序控制电路15也可在显示屏11需要输出奇数帧画面时，将控制接口BlACK_EN的电平设置为高电平，以及在显示屏11需要输出偶数帧画面时，将控制接口BlACK_EN的电平设置为低电平，从而实现图4所述的插黑画面输出的示意图。
以上所述是本发明的优选实施例，应当指出，对于本技术领域的普通技术人员来说，在不脱离本发明原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也视为本发明的保护范围。

Claims (8)

  1. 一种可进行插黑的显示装置，包括显示屏、与所述显示屏连接的门驱动电路与源极驱动电路、伽马电路及时序控制电路，其特征在于，所述伽马电路包括二选一多路选择器，所述二选一多路选择器的一个输入端的输入数据为所述伽马电路输出的VCOM电压，另一个输入端的输入数据为所述伽马电路的多次可编程存储器存储的一预设值经过数模转换转换后的电压，所述时序控制电路的其中一个通用输入输出GPIO接口被配置为控制所述二选一多路选择器的输出的控制接口，所述二选一多路选择器在所述控制接口的控制下选择输出所述伽马电路输出的VCOM电压时，所述输出的VCOM电压经所述伽马电路中的运算放大器放大后输出至所述源极驱动电路，作为所述源极驱动电路进行数模转换时所需的第一伽马参考电压，所述时序控制电路在所述源极驱动电路进行数模转换时所需的伽马参考电压为所述第一伽马参考电压时，不进行数据输出，从而实现插黑画面输出。
  2. 如权利要求1所述的可进行插黑的显示装置，其特征在于，所述二选一多路选择器在所述控制接口的控制下，选择输出所述伽马电路的所述多次可编程存储器中的所述预设值经过数模转换转换后的电压时，所述输出的经过数模转换转换后的电压经所述运算放大器放大后输出至所述源极驱动电路，作为所述源极驱动电路进行数模转换时所需的第二伽马参考电压，所述时序控制电路在所述源极驱动电路进行数模转换时所需的伽马参考电压为所述第二伽马参考电压时，传输正常画面。
  3. 如权利要求2所述的可进行插黑的显示装置，其特征在于，所述二选一多路选择器在所述控制接口被设置为低电平时，选择输出所述伽马电路输出的VCOM电压，以及在所述控制接口被设置为高电平时，选择输出所述伽马电路的所述多次可编程存储器中所述预设值经过数模转换转换后的电压。
  4. 如权利要求2所述的可进行插黑的显示装置，其特征在于，所述二选 一多路选择器在所述控制接口被设置为高电平时，选择输出所述伽马电路输出的VCOM电压，以及在所述控制接口被设置为低电平时，选择输出所述伽马电路的所述多次可编程存储器中所述预设值经过数模转换转换后的电压。
  5. 如权利要求3所述的可进行插黑的显示装置，其特征在于，所述时序控制电路在所述显示屏需要输出奇数帧画面时，将所述控制接口的电平设置为高电平，以及在所述显示屏需要输出偶数帧画面时，将所述控制接口的电平设置为低电平。
  6. 如权利要求4所述的可进行插黑的显示装置，其特征在于，所述时序控制电路在所述显示屏需要输出奇数帧画面时，将所述控制接口的电平设置为高电平，以及在所述显示屏需要输出偶数帧画面时，将所述控制接口的电平设置为低电平。
  7. 如权利要求3所述的可进行插黑的显示装置，其特征在于，所述时序控制电路在所述显示屏需要输出奇数帧画面时，将所述控制接口的电平设置为低电平，以及在所述显示屏需要输出偶数帧画面时，将所述控制接口的电平设置为高电平。
  8. 如权利要求4所述的可进行插黑的显示装置，其特征在于，所述时序控制电路在所述显示屏需要输出奇数帧画面时，将所述控制接口的电平设置为低电平，以及在所述显示屏需要输出偶数帧画面时，将所述控制接口的电平设置为高电平。
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