WO2016187742A1 - Procédé de construction pour système de lorenz hyperchaotique de différentes rétroactions et facilitant une estimation de frontière finale et circuit - Google Patents

Procédé de construction pour système de lorenz hyperchaotique de différentes rétroactions et facilitant une estimation de frontière finale et circuit Download PDF

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WO2016187742A1
WO2016187742A1 PCT/CN2015/000575 CN2015000575W WO2016187742A1 WO 2016187742 A1 WO2016187742 A1 WO 2016187742A1 CN 2015000575 W CN2015000575 W CN 2015000575W WO 2016187742 A1 WO2016187742 A1 WO 2016187742A1
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pin
operational amplifier
resistor
multiplier
selector
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PCT/CN2015/000575
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English (en)
Chinese (zh)
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李敏
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李敏
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols

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  • the invention relates to a chaotic system and a circuit, in particular to a method and a circuit for constructing a Lorenz type hyperchaotic system with different feedbacks for facilitating ultimate boundary estimation.
  • the boundary estimation of hyperchaotic systems is of great significance in the application of chaos control and synchronization.
  • the method of constructing four-dimensional hyperchaos is based on the three-dimensional chaotic system, adding one-dimensional four-dimensional hyperchaotic systems.
  • the hyperchaotic system is not easy to perform ultimate boundary estimation.
  • the hyperchaotic system that can perform ultimate boundary estimation has the characteristic that the characteristic elements of the main diagonal of the Jacobian matrix are all negative, and the hyperchaotic system constructed by the present invention has ya The characteristic elements of the main diagonal of the comparable matrix are all negative, and the ultimate boundary estimation can be performed. This has important application prospects for the control and synchronization of hyperchaos.
  • a method for constructing a Lorenz type hyperchaotic system for facilitating ultimate boundary estimation with different feedbacks comprising the steps of:
  • x, y, and z are state variables, and a, b, c, and d are system parameters;
  • variable ii is used as a one-dimensional system variable and added to the first equation of the Lorenz-type chaotic system i.
  • a Lorenz-type hyperchaotic system iii that facilitates the final boundary estimation is obtained:
  • variable ii is used as a one-dimensional system variable and added to the second equation of the Lorenz-type chaotic system i.
  • a Lorenz-type hyperchaotic system iv that facilitates the final boundary estimation is obtained:
  • x, y, z, w are state variables, f(x), f(-x) are switching functions, and a, b, c, d, k, r are system parameters;
  • the addition and integration operations are realized by the operational amplifier U1, the operational amplifier U2, and the resistors and capacitors, and the inverse operation is realized by the operational amplifier U3 and the resistor, and the multiplier U4 and the multiplier U5 are implemented in the system.
  • the operational amplifier U1 is connected to an operational amplifier U3, an operational amplifier U6, and a multiplier U5.
  • the operational amplifier U2 is connected to a multiplier U4 and an operational amplifier U3.
  • the operational amplifier U3 is connected to the operational amplifier U1 and the operational amplifier U2.
  • An amplifier U6 and a multiplier U4 is connected to an operational amplifier U1, the multiplier U5 is connected to an operational amplifier U2; the operational amplifier U6 is connected to a selector U7, and the selector U7 is connected to an operational amplifier U1, the operation
  • the amplifiers U1, U2, U3 and U6 adopt LF347BN, the multipliers U4 and U5 adopt AD633JN, and the selector adopts ADG409;
  • the first pin of the operational amplifier U1 is connected to the sixth pin of the operational amplifier U1 via the resistor R2, and the second pin of the operational amplifier U1 is connected to the first pin of the operational amplifier U1 via the resistor Ry.
  • the third pin, the fifth pin, the tenth pin, and the twelfth pin of U1 are grounded, the fourth pin of the operational amplifier U1 is connected to VCC, the eleventh pin of the operational amplifier U1 is connected to VEE, and the operational amplifier U1 is The 6 pin is connected to the 7th pin of the operational amplifier U1 through the capacitor Cy, and the 7th pin of the operational amplifier U1 is connected to the 13th pin of the operational amplifier U1 through the resistor Rx2.
  • the seventh pin of the operational amplifier U1 is connected to the first pin of the multiplier U5, and the seventh pin of the operational amplifier U1 is connected to the sixth pin of the operational amplifier U3 via the resistor R7, and the operational amplifier U1 is connected.
  • the 7-pin is connected to the output y.
  • the 8th pin of the operational amplifier U1 is connected to the 9th pin of the operational amplifier U1 through the capacitor Cx.
  • the 8th pin of the operational amplifier U1 passes through the resistor Ry1 and the second pin of the operational amplifier U1.
  • the eighth pin of the operational amplifier U1 is connected to the second pin of the operational amplifier U3 through the resistor R5, and the eighth pin of the operational amplifier U1 is connected to the third pin of the multiplier U5, and the operational amplifier U1 is connected.
  • the 8th pin is connected to the 2nd pin of the operational amplifier U6, the 8th pin of the operational amplifier U1 is connected to the output x, and the 13th pin of the operational amplifier U1 is connected to the 14th pin of the operational amplifier U1 through the resistor Rx.
  • the 14th pin of the operational amplifier U1 is connected to the 9th pin of the operational amplifier U1 through the resistor R1;
  • the first pin of the operational amplifier U2 is connected to the sixth pin of the operational amplifier U2 via the resistor R4, and the second pin of the operational amplifier U2 is connected to the first pin of the operational amplifier U2 via the resistor Rw.
  • the 3rd pin, the 5th pin, the 10th pin, and the 12th pin of U2 are grounded, the 4th pin is connected to VCC, the 11th pin is connected to VEE, and the 6th pin of the operational amplifier U2 is connected to the capacitor Cw.
  • the 7th pin of the amplifier U2 is connected, the 7th pin of the operational amplifier U2 is connected to the 4th pin and the 12th pin of the selector U7, and the 7th pin of the operational amplifier U2 is connected to the operational amplifier U3 through the resistor R11.
  • the 13th pin is connected, the 7th pin of the operational amplifier U2 is connected to the output w, the 8th pin of the operational amplifier U2 is connected to the 9th pin of the operational amplifier U2 through the capacitor Cz, and the 8th lead of the operational amplifier U2
  • the pin is connected to the third pin of the multiplier U4, the eighth pin of the operational amplifier U2 is connected to the ninth pin of the operational amplifier U3 through the resistor R9, and the eighth pin of the operational amplifier U2 is connected to the output z, the operational amplifier
  • the 13th pin of U2 is connected to the 14th pin of the operational amplifier U2 through the resistor Rz, and the 14th pin of the operational amplifier U2 is passed.
  • the resistor R3 is connected to the ninth pin of the operational amplifier U2;
  • the first pin of the operational amplifier U3 is connected to the 13th pin of the operational amplifier U1 via the resistor Rx1, and the first pin of the operational amplifier U3 is connected to the first pin of the multiplier U4, and the first amplifier of the operational amplifier U3
  • the 2 pin is connected to the first pin of the operational amplifier U3 through the resistor R6, and the third pin, the fifth pin, the tenth pin, and the twelfth pin of the operational amplifier U3 are grounded, and the fourth pin is connected to VCC.
  • the 11th pin is connected to VEE
  • the 6th pin of the operational amplifier U3 is connected to the 7th pin of the operational amplifier U3 through the resistor R8, and the 7th pin of the operational amplifier U3 is connected to the second pin of the operational amplifier U1 through the resistor Ry2.
  • the 8th pin of the operational amplifier U3 When connected, the 8th pin of the operational amplifier U3 is connected to the 9th pin of the operational amplifier U3 through the resistor R10, and the 8th pin of the operational amplifier U3 is connected to the 13th pin of the operational amplifier U2 through the resistor Rz2, and the operation is performed.
  • the 13th pin of the amplifier U3 is connected to the 14th pin of the operational amplifier U3 through the resistor R12, and the 14th pin of the operational amplifier U3 is connected to the second pin of the operational amplifier U2 through the resistor Rw2;
  • the second pin, the fourth pin, and the sixth pin of the multiplier U4 are grounded, the fifth pin is connected to VEE, and the seventh pin is connected to the second pin of the operational amplifier U1 through the resistor Ry3, and the eighth pin Foot connected to VCC;
  • the second pin, the fourth pin, and the sixth pin of the multiplier U5 are grounded, the fifth pin is connected to VEE, and the seventh pin is connected to the 13th pin and the eighth pin of the operational amplifier U2 through the resistor Rz1. Connected to VCC;
  • the first pin of the operational amplifier U6 is connected to the first pin of the selector U7 via the resistor R13, and the first pin of the operational amplifier U6 is connected to the ground through the resistor R13 and the resistor R14, and the third of the operational amplifier U6.
  • Pin, 5th pin, 10th pin, 12th pin are grounded, the 4th pin is connected to VCC, the 11th pin is connected to VEE, and the operational amplifier U6 is 6th, 7th, and 8th.
  • the 9th pin, the 12th pin, the 13th pin, and the 14th pin are left floating.
  • the pin is connected to the second pin of the operational amplifier U2 through the resistor Rw1, and the sixth, seventh, ninth, tenth, eleventh, and twelfth pins of the selector U7.
  • the 13th pin is left floating.
  • a Lorenz-type hyperchaotic system circuit with different feedback for the ultimate boundary estimation It is characterized in that the operational amplifier U1, the operational amplifier U2 and the resistors and capacitors are used for addition and integration operations, and the operational amplifier U3 and the resistor are used to achieve the inversion.
  • Operation, multiplier U4 and multiplier U5 implement multiplication in the system, the operational amplifier U1 is connected to an operational amplifier U3, an operational amplifier U6 and a multiplier U5, which is connected to a multiplier U4 and an operational amplifier U3,
  • the operational amplifier U3 is connected to the operational amplifier U1, the operational amplifier U2, the operational amplifier U6, and the multiplier U4.
  • the multiplier U4 is connected to the operational amplifier U1, and the multiplier U5 is connected to the operational amplifier U2.
  • the operational amplifier U6 is connected to the selector U7.
  • the selector U7 is connected to the operational amplifier U1, the operational amplifiers U1, U2, U3 and U6 adopt LF347BN, the multipliers U4 and U5 adopt AD633JN, and the selector adopts ADG409;
  • the first pin of the operational amplifier U1 is connected to the sixth pin of the operational amplifier U1 via the resistor R2, and the second pin of the operational amplifier U1 is connected to the first pin of the operational amplifier U1 via the resistor Ry.
  • the third pin, the fifth pin, the tenth pin, and the twelfth pin of U1 are grounded, the fourth pin of the operational amplifier U1 is connected to VCC, the eleventh pin of the operational amplifier U1 is connected to VEE, and the operational amplifier U1 is The 6-pin is connected to the 7th pin of the operational amplifier U1 through the capacitor Cy.
  • the 7th pin of the operational amplifier U1 is connected to the 13th pin of the operational amplifier U1 through the resistor Rx2, and the 7th pin of the operational amplifier U1 is connected.
  • the first pin of the multiplier U5 is connected, the seventh pin of the operational amplifier U1 is connected to the sixth pin of the operational amplifier U3 through the resistor R7, and the seventh pin of the operational amplifier U1 is connected to the output y, and the operational amplifier U1 is
  • the 8th pin is connected to the 9th pin of the operational amplifier U1 through the capacitor Cx.
  • the 8th pin of the operational amplifier U1 is connected to the 2nd pin of the operational amplifier U1 through the resistor Ry1, and the 8th pin of the operational amplifier U1.
  • the 8th pin is connected to the output x.
  • the 13th pin of the operational amplifier U1 is connected to the 14th pin of the operational amplifier U1 through the resistor Rx.
  • the 14th pin of the operational amplifier U1 passes through the resistor R1 and the ninth lead of the operational amplifier U1. Fitting each other;
  • the first pin of the operational amplifier U2 is connected to the sixth pin of the operational amplifier U2 via the resistor R4, and the second pin of the operational amplifier U2 is connected to the first pin of the operational amplifier U2 via the resistor Rw.
  • the 3rd pin, the 5th pin, the 10th pin, and the 12th pin of U2 are grounded, the 4th pin is connected to VCC, the 11th pin is connected to VEE, and the 6th pin of the operational amplifier U2 is connected to the capacitor Cw.
  • the 7th pin of the amplifier U2 is connected, the 7th pin of the operational amplifier U2 is connected to the 4th pin and the 12th pin of the selector U7, and the 7th pin of the operational amplifier U2 is connected to the operational amplifier U3 through the resistor R11.
  • the 13th pin is connected, the 7th pin of the operational amplifier U2 is connected to the output w, the 8th pin of the operational amplifier U2 is connected to the 9th pin of the operational amplifier U2 through the capacitor Cz, and the 8th lead of the operational amplifier U2
  • the pin is connected to the third pin of the multiplier U4, the eighth pin of the operational amplifier U2 is connected to the ninth pin of the operational amplifier U3 through the resistor R9, and the eighth pin of the operational amplifier U2 is connected to the output z, the operational amplifier
  • the 13th pin of U2 is connected to the 14th pin of the operational amplifier U2 through the resistor Rz, and the 14th pin of the operational amplifier U2 is passed.
  • the resistor R3 is connected to the ninth pin of the operational amplifier U2;
  • the first pin of the operational amplifier U3 is connected to the 13th pin of the operational amplifier U1 via the resistor Rx1, and the first pin of the operational amplifier U3 is connected to the first pin of the multiplier U4, and the first amplifier of the operational amplifier U3
  • the 2 pin is connected to the first pin of the operational amplifier U3 through the resistor R6, and the third pin, the fifth pin, the tenth pin, and the twelfth pin of the operational amplifier U3 are grounded, and the fourth pin is connected to VCC.
  • the 11th pin is connected to VEE
  • the 6th pin of the operational amplifier U3 is connected to the 7th pin of the operational amplifier U3 through the resistor R8, and the 7th pin of the operational amplifier U3 is connected to the second pin of the operational amplifier U1 through the resistor Ry2.
  • the 8th pin of the operational amplifier U3 When connected, the 8th pin of the operational amplifier U3 is connected to the 9th pin of the operational amplifier U3 through the resistor R10, and the 8th pin of the operational amplifier U3 is connected to the 13th pin of the operational amplifier U2 through the resistor Rz2, and the operation is performed.
  • the 13th pin of the amplifier U3 is connected to the 14th pin of the operational amplifier U3 through the resistor R12, and the 14th pin of the operational amplifier U3 is connected to the second pin of the operational amplifier U2 through the resistor Rw2;
  • the second pin, the fourth pin, and the sixth pin of the multiplier U4 are grounded, the fifth pin is connected to VEE, and the seventh pin is connected to the second pin of the operational amplifier U1 through the resistor Ry3, and the eighth pin Foot connected to VCC;
  • the second pin, the fourth pin, and the sixth pin of the multiplier U5 are grounded, the fifth pin is connected to VEE, and the seventh pin is connected to the 13th pin and the eighth pin of the operational amplifier U2 through the resistor Rz1. Connected to VCC;
  • the first pin of the operational amplifier U6 is connected to the first pin of the selector U7 via the resistor R13, and the first pin of the operational amplifier U6 is connected to the ground through the resistor R13 and the resistor R14, and the third of the operational amplifier U6.
  • Pin, 5th pin, 10th pin, 12th pin are grounded, the 4th pin is connected to VCC, the 11th pin is connected to VEE, and the operational amplifier U6 is 6th, 7th, and 8th.
  • the 9th pin, the 12th pin, the 13th pin, and the 14th pin are left floating.
  • the pin is connected to the second pin of the operational amplifier U2 through the resistor Rw1, and the sixth, seventh, ninth, tenth, eleventh, and twelfth pins of the selector U7.
  • the 13th pin is left floating.
  • the Lorenz-type hyperchaotic system Based on the Lorenz-type chaotic system, the Lorenz-type hyperchaotic system with different feedbacks for the ultimate boundary estimation is designed and an analog circuit is designed to realize the chaotic system, which is the synchronization and control of chaos. A new hyperchaotic system signal source is provided.
  • FIG. 1 is a schematic diagram of a circuit connection structure according to a preferred embodiment of the present invention.
  • FIG. 3 is a diagram showing the actual connection of the circuit of the operational amplifier U3.
  • FIG. 5 is a circuit actual connection diagram of the selector U7 and the operational amplifier U6.
  • a method for constructing a Lorenz type hyperchaotic system for facilitating ultimate boundary estimation with different feedbacks comprising the steps of:
  • x, y, and z are state variables, and a, b, c, and d are system parameters;
  • variable ii is used as a one-dimensional system variable and added to the first equation of the Lorenz-type chaotic system i.
  • a Lorenz-type hyperchaotic system iii that facilitates the final boundary estimation is obtained:
  • variable ii is used as a one-dimensional system variable and added to the second equation of the Lorenz-type chaotic system i.
  • a Lorenz-type hyperchaotic system iv that facilitates the final boundary estimation is obtained:
  • x, y, z, w are state variables, f(x), f(-x) are switching functions, and a, b, c, d, k, r are system parameters;
  • the addition and integration operations are realized by the operational amplifier U1, the operational amplifier U2, and the resistors and capacitors, and the inverse operation is realized by the operational amplifier U3 and the resistor, and the multiplier U4 and the multiplier U5 are implemented in the system.
  • the operational amplifier U1 is connected to an operational amplifier U3, an operational amplifier U6, and a multiplier U5.
  • the operational amplifier U2 is connected to a multiplier U4 and an operational amplifier U3.
  • the operational amplifier U3 is connected to the operational amplifier U1 and the operational amplifier U2.
  • An amplifier U6 and a multiplier U4 is connected to an operational amplifier U1, the multiplier U5 is connected to an operational amplifier U2; the operational amplifier U6 is connected to a selector U7, and the selector U7 is connected to an operational amplifier U1, the operation
  • the amplifiers U1, U2, U3 and U6 adopt LF347BN, the multipliers U4 and U5 adopt AD633JN, and the selector adopts ADG409;
  • the first pin of the operational amplifier U1 is connected to the sixth pin of the operational amplifier U1 via the resistor R2, and the second pin of the operational amplifier U1 is connected to the first pin of the operational amplifier U1 via the resistor Ry.
  • the third pin, the fifth pin, the tenth pin, and the twelfth pin of U1 are grounded, the fourth pin of the operational amplifier U1 is connected to VCC, the eleventh pin of the operational amplifier U1 is connected to VEE, and the operational amplifier U1 is The 6 pin is connected to the 7th pin of the operational amplifier U1 through the capacitor Cy, and the 7th pin of the operational amplifier U1 is connected to the 13th pin of the operational amplifier U1 through the resistor Rx2.
  • the seventh pin of the operational amplifier U1 is connected to the first pin of the multiplier U5, and the seventh pin of the operational amplifier U1 is connected to the sixth pin of the operational amplifier U3 via the resistor R7, and the operational amplifier U1 is connected.
  • the 7-pin is connected to the output y.
  • the 8th pin of the operational amplifier U1 is connected to the 9th pin of the operational amplifier U1 through the capacitor Cx.
  • the 8th pin of the operational amplifier U1 passes through the resistor Ry1 and the second pin of the operational amplifier U1.
  • the eighth pin of the operational amplifier U1 is connected to the second pin of the operational amplifier U3 through the resistor R5, and the eighth pin of the operational amplifier U1 is connected to the third pin of the multiplier U5, and the operational amplifier U1 is connected.
  • the 8th pin is connected to the 2nd pin of the operational amplifier U6, the 8th pin of the operational amplifier U1 is connected to the output x, and the 13th pin of the operational amplifier U1 is connected to the 14th pin of the operational amplifier U1 through the resistor Rx.
  • the 14th pin of the operational amplifier U1 is connected to the 9th pin of the operational amplifier U1 through the resistor R1;
  • the first pin of the operational amplifier U2 is connected to the sixth pin of the operational amplifier U2 via the resistor R4, and the second pin of the operational amplifier U2 is connected to the first pin of the operational amplifier U2 via the resistor Rw.
  • the 3rd pin, the 5th pin, the 10th pin, and the 12th pin of U2 are grounded, the 4th pin is connected to VCC, the 11th pin is connected to VEE, and the 6th pin of the operational amplifier U2 is connected to the capacitor Cw.
  • the 7th pin of the amplifier U2 is connected, the 7th pin of the operational amplifier U2 is connected to the 4th pin and the 12th pin of the selector U7, and the 7th pin of the operational amplifier U2 is connected to the operational amplifier U3 through the resistor R11.
  • the 13th pin is connected, the 7th pin of the operational amplifier U2 is connected to the output w, the 8th pin of the operational amplifier U2 is connected to the 9th pin of the operational amplifier U2 through the capacitor Cz, and the 8th lead of the operational amplifier U2
  • the pin is connected to the third pin of the multiplier U4, the eighth pin of the operational amplifier U2 is connected to the ninth pin of the operational amplifier U3 through the resistor R9, and the eighth pin of the operational amplifier U2 is connected to the output z, the operational amplifier
  • the 13th pin of U2 is connected to the 14th pin of the operational amplifier U2 through the resistor Rz, and the 14th pin of the operational amplifier U2 is passed.
  • the resistor R3 is connected to the ninth pin of the operational amplifier U2;
  • the first pin of the operational amplifier U3 is connected to the 13th pin of the operational amplifier U1 via the resistor Rx1, and the first pin of the operational amplifier U3 is connected to the first pin of the multiplier U4, and the first amplifier of the operational amplifier U3
  • the 2 pin is connected to the first pin of the operational amplifier U3 through the resistor R6, and the third pin, the fifth pin, the tenth pin, and the twelfth pin of the operational amplifier U3 are grounded, and the fourth pin is connected to VCC.
  • the 11th pin is connected to VEE
  • the 6th pin of the operational amplifier U3 is connected to the 7th pin of the operational amplifier U3 through the resistor R8, and the 7th pin of the operational amplifier U3 is connected to the second pin of the operational amplifier U1 through the resistor Ry2.
  • the 8th pin of the operational amplifier U3 When connected, the 8th pin of the operational amplifier U3 is connected to the 9th pin of the operational amplifier U3 through the resistor R10, and the 8th pin of the operational amplifier U3 is connected to the 13th pin of the operational amplifier U2 through the resistor Rz2, and the operation is performed.
  • the 13th pin of the amplifier U3 is connected to the 14th pin of the operational amplifier U3 through the resistor R12, and the 14th pin of the operational amplifier U3 is connected to the second pin of the operational amplifier U2 through the resistor Rw2;
  • the second pin, the fourth pin, and the sixth pin of the multiplier U4 are grounded, the fifth pin is connected to VEE, and the seventh pin is connected to the second pin of the operational amplifier U1 through the resistor Ry3, and the eighth pin Foot connected to VCC;
  • the second pin, the fourth pin, and the sixth pin of the multiplier U5 are grounded, the fifth pin is connected to VEE, and the seventh pin is connected to the 13th pin and the eighth pin of the operational amplifier U2 through the resistor Rz1. Connected to VCC;
  • the first pin of the operational amplifier U6 is connected to the first pin of the selector U7 via the resistor R13, and the first pin of the operational amplifier U6 is connected to the ground through the resistor R13 and the resistor R14, and the third of the operational amplifier U6.
  • Pin, 5th pin, 10th pin, 12th pin are grounded, the 4th pin is connected to VCC, the 11th pin is connected to VEE, and the operational amplifier U6 is 6th, 7th, and 8th.
  • the 9th pin, the 12th pin, the 13th pin, and the 14th pin are left floating.
  • the pin is connected to the second pin of the operational amplifier U2 through the resistor Rw1, and the sixth, seventh, ninth, tenth, eleventh, and twelfth pins of the selector U7.
  • the 13th pin is left floating.
  • a Lorenz-type hyperchaotic system circuit with different feedback for the ultimate boundary estimation It is characterized in that the operational amplifier U1, the operational amplifier U2 and the resistors and capacitors are used for addition and integration operations, and the operational amplifier U3 and the resistor are used to achieve the inversion.
  • Operation, multiplier U4 and multiplier U5 implement multiplication in the system, the operational amplifier U1 is connected to an operational amplifier U3, an operational amplifier U6 and a multiplier U5, which is connected to a multiplier U4 and an operational amplifier U3,
  • the operational amplifier U3 is connected to the operational amplifier U1, the operational amplifier U2, the operational amplifier U6, and the multiplier U4.
  • the multiplier U4 is connected to the operational amplifier U1, and the multiplier U5 is connected to the operational amplifier U2.
  • the operational amplifier U6 is connected to the selector U7.
  • the selector U7 is connected to the operational amplifier U1, the operational amplifiers U1, U2, U3 and U6 adopt LF347BN, the multipliers U4 and U5 adopt AD633JN, and the selector adopts ADG409;
  • the first pin of the operational amplifier U1 is connected to the sixth pin of the operational amplifier U1 via the resistor R2, and the second pin of the operational amplifier U1 is connected to the first pin of the operational amplifier U1 via the resistor Ry.
  • the third pin, the fifth pin, the tenth pin, and the twelfth pin of U1 are grounded, the fourth pin of the operational amplifier U1 is connected to VCC, the eleventh pin of the operational amplifier U1 is connected to VEE, and the operational amplifier U1 is The 6-pin is connected to the 7th pin of the operational amplifier U1 through the capacitor Cy.
  • the 7th pin of the operational amplifier U1 is connected to the 13th pin of the operational amplifier U1 through the resistor Rx2, and the 7th pin of the operational amplifier U1 is connected.
  • the first pin of the multiplier U5 is connected, the seventh pin of the operational amplifier U1 is connected to the sixth pin of the operational amplifier U3 through the resistor R7, and the seventh pin of the operational amplifier U1 is connected to the output y, and the operational amplifier U1 is
  • the 8th pin is connected to the 9th pin of the operational amplifier U1 through the capacitor Cx.
  • the 8th pin of the operational amplifier U1 is connected to the 2nd pin of the operational amplifier U1 through the resistor Ry1, and the 8th pin of the operational amplifier U1.
  • the 8th pin is connected to the output x.
  • the 13th pin of the operational amplifier U1 is connected to the 14th pin of the operational amplifier U1 through the resistor Rx.
  • the 14th pin of the operational amplifier U1 passes through the resistor R1 and the ninth lead of the operational amplifier U1. Fitting each other;
  • the first pin of the operational amplifier U2 is connected to the sixth pin of the operational amplifier U2 via the resistor R4, and the second pin of the operational amplifier U2 is connected to the first pin of the operational amplifier U2 via the resistor Rw.
  • the 3rd pin, the 5th pin, the 10th pin, and the 12th pin of U2 are grounded, the 4th pin is connected to VCC, the 11th pin is connected to VEE, and the 6th pin of the operational amplifier U2 is connected to the capacitor Cw.
  • the 7th pin of the amplifier U2 is connected, the 7th pin of the operational amplifier U2 is connected to the 4th pin and the 12th pin of the selector U7, and the 7th pin of the operational amplifier U2 is connected to the operational amplifier U3 through the resistor R11.
  • the 13th pin is connected, the 7th pin of the operational amplifier U2 is connected to the output w, the 8th pin of the operational amplifier U2 is connected to the 9th pin of the operational amplifier U2 through the capacitor Cz, and the 8th lead of the operational amplifier U2
  • the pin is connected to the third pin of the multiplier U4, the eighth pin of the operational amplifier U2 is connected to the ninth pin of the operational amplifier U3 through the resistor R9, and the eighth pin of the operational amplifier U2 is connected to the output z, the operational amplifier
  • the 13th pin of U2 is connected to the 14th pin of the operational amplifier U2 through the resistor Rz, and the 14th pin of the operational amplifier U2 is passed.
  • the resistor R3 is connected to the ninth pin of the operational amplifier U2;
  • the first pin of the operational amplifier U3 is connected to the 13th pin of the operational amplifier U1 via the resistor Rx1, and the first pin of the operational amplifier U3 is connected to the first pin of the multiplier U4, and the first amplifier of the operational amplifier U3
  • the 2 pin is connected to the first pin of the operational amplifier U3 through the resistor R6, and the third pin, the fifth pin, the tenth pin, and the twelfth pin of the operational amplifier U3 are grounded, and the fourth pin is connected to VCC.
  • the 11th pin is connected to VEE
  • the 6th pin of the operational amplifier U3 is connected to the 7th pin of the operational amplifier U3 through the resistor R8, and the 7th pin of the operational amplifier U3 is connected to the second pin of the operational amplifier U1 through the resistor Ry2.
  • the 8th pin of the operational amplifier U3 When connected, the 8th pin of the operational amplifier U3 is connected to the 9th pin of the operational amplifier U3 through the resistor R10, and the 8th pin of the operational amplifier U3 is connected to the 13th pin of the operational amplifier U2 through the resistor Rz2, and the operation is performed.
  • the 13th pin of the amplifier U3 is connected to the 14th pin of the operational amplifier U3 through the resistor R12, and the 14th pin of the operational amplifier U3 is connected to the second pin of the operational amplifier U2 through the resistor Rw2;
  • the second pin, the fourth pin, and the sixth pin of the multiplier U4 are grounded, the fifth pin is connected to VEE, and the seventh pin is connected to the second pin of the operational amplifier U1 through the resistor Ry3, and the eighth pin Foot connected to VCC;
  • the second pin, the fourth pin, and the sixth pin of the multiplier U5 are grounded, the fifth pin is connected to VEE, and the seventh pin is connected to the 13th pin and the eighth pin of the operational amplifier U2 through the resistor Rz1. Connected to VCC;
  • the first pin of the operational amplifier U6 is connected to the first pin of the selector U7 via the resistor R13, and the first pin of the operational amplifier U6 is connected to the ground through the resistor R13 and the resistor R14, and the third of the operational amplifier U6.
  • Pin, 5th pin, 10th pin, 12th pin are grounded, the 4th pin is connected to VCC, the 11th pin is connected to VEE, and the operational amplifier U6 is 6th, 7th, and 8th.
  • the 9th pin, the 12th pin, the 13th pin, and the 14th pin are left floating.
  • the pin is connected to the second pin of the operational amplifier U2 through the resistor Rw1, and the sixth, seventh, ninth, tenth, eleventh, and twelfth pins of the selector U7.
  • the 13th pin is left floating.

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  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Amplifiers (AREA)
  • Measurement And Recording Of Electrical Phenomena And Electrical Characteristics Of The Living Body (AREA)
  • Measuring Volume Flow (AREA)

Abstract

L'invention concerne un procédé de construction d'un système de Lorenz hyperchaotique de différentes rétroactions et facilitant une estimation de frontière finale et un circuit. Un amplificateur opérationnel U1, un amplificateur opérationnel U2, une résistance, et un condensateur sont utilisés pour mettre en œuvre des opérations d'addition et d'intégration. Un amplificateur opérationnel U3 et une résistance sont utilisés pour mettre en œuvre une opération d'inversion. Un multiplicateur U4 et un multiplicateur U5 mettent en œuvre des opérations de multiplication dans le système. Les amplificateurs opérationnels U1, U2, U3, et U6 utilisent le composant LF347BN. Les multiplicateurs U4 et U5 utilisent le composant AD633JN. Le sélecteur utilise le composant ADG409. Le procédé de construction du système de Lorenz hyperchaotique de différentes rétroactions et facilitant l'estimation de frontière finale et un procédé de construction de circuit sont conçus sur la base d'un système de Lorenz chaotique, et un circuit analogique pour la mise en œuvre de ce système chaotique est également conçu, ce qui fournit une synchronisation et une commande chaotiques avec une nouvelle source de signal de système hyperchaotique.
PCT/CN2015/000575 2015-05-27 2015-08-07 Procédé de construction pour système de lorenz hyperchaotique de différentes rétroactions et facilitant une estimation de frontière finale et circuit WO2016187742A1 (fr)

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CN201510279418.5A CN104868988A (zh) 2015-05-27 2015-05-27 一种不同反馈的便于终极边界估计的Lorenz型超混沌系统构建方法及电路

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CN105119714A (zh) * 2015-09-09 2015-12-02 韩敬伟 一种便于终极边界估计的Lorenz型超混沌系统自适应同步方法及电路
CN105119710A (zh) * 2015-09-09 2015-12-02 王春梅 一种利于终极边界估计的Lorenz型超混沌系统自适应同步方法及电路

Citations (4)

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US5506795A (en) * 1992-02-21 1996-04-09 Yamakawa; Takeshi Apparatus and method for generating chaotic signals and chaos device
CN102332976A (zh) * 2011-09-15 2012-01-25 江西理工大学 异维可切换混沌系统设计方法及电路
CN102916802A (zh) * 2012-09-27 2013-02-06 滨州学院 基于Lorenz型系统的分数阶四个系统自动切换混沌系统方法及模拟电路
CN104486061A (zh) * 2014-12-03 2015-04-01 李敏 基于忆阻器的经典Lorenz超混沌系统的构建方法及电路

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5506795A (en) * 1992-02-21 1996-04-09 Yamakawa; Takeshi Apparatus and method for generating chaotic signals and chaos device
CN102332976A (zh) * 2011-09-15 2012-01-25 江西理工大学 异维可切换混沌系统设计方法及电路
CN102916802A (zh) * 2012-09-27 2013-02-06 滨州学院 基于Lorenz型系统的分数阶四个系统自动切换混沌系统方法及模拟电路
CN104486061A (zh) * 2014-12-03 2015-04-01 李敏 基于忆阻器的经典Lorenz超混沌系统的构建方法及电路

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