WO2016176336A1

WO2016176336A1 - Printed circuit board assembly with integrated circuit chip package and solid state battery

Info

Publication number: WO2016176336A1
Application number: PCT/US2016/029580
Authority: WO
Inventors: Michael Yu-Tak YOUNG
Original assignee: Applied Materials, Inc.
Priority date: 2015-04-27
Filing date: 2016-04-27
Publication date: 2016-11-03
Also published as: TW201703596A

Abstract

According to some embodiments, a printed circuit board assembly may comprise: a printed circuit board; an integrated circuit chip package mounted on the printed circuit board; and a solid state battery selected from a group consisting of thin film solid state batteries, batteries comprising stacked thin film solid state cells, and thick film solid state batteries, the solid state battery being mounted on the printed circuit board over at least 50% of the same area of the printed circuit board as the integrated circuit chip package. The solid state battery may be mounted on the printed circuit board either under or over the integrated circuit chip package. In embodiments the printed circuit board may comprise a recess configured for receiving the solid state battery, wherein the solid state battery is mounted under the integrated circuit chip package.

Description

PRINTED CIRCUIT BOARD ASSEMBLY WITH INTEGRATED CIRCUIT CHIP PACKAGE AND SOLID STATE BATTERY

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of U.S. Provisional Application No,

62/153,079 filed April 27, 2015, incorporated in its entirety herein.

FIELD

[0002] Embodiments of this disclosure relate to applications of thin or thick film solid state batteries, and more particularly to such batteries combined with integrated circuit chip packages in printed circuit board assemblies and methods of making the same.

BACKGROUND

[0003] Printed circuit boards (PCBs) are used in a wide variety of electronic devices,

In many devices, especially where device size is an issue, the availability of PCB real estate can be a limiting factor to overall device compactness. Some components mounted on a PCB require constant or fail-safe power protection. For example, constant power may be needed to sustain essential chip functions such as CMOS (complementary metal-oxide

semiconductor) latch-up power sequencing circuits, memory refresh operations, fail safe power schemes (internet phone lines, memory state refreshing), mission critical electronic circuitry, etc., even when the printed circuit substrate or board level power has been disconnected. There is a need for compact back-up power supplies for components mounted on PCBs.

SUMMARY

[0004] Embodiments of this disclosure relate generally to solid state thin or thick film batteries combined with integrated circuit (IC) chip packages in a printed circuit board (PCB) assembly. According to certain aspects, embodiments include combining a solid state battery with an integrated circuit chip package in a PCB assembly while minimizing component real estate on the PCB.

[0005] According to some embodiments, a printed circuit board assembly may comprise: a printed circuit board; an integrated circuit chip package mounted on the printed circuit board; and a solid state battery selected from a group consisting of thin film solid state batteries, batteries comprising stacked thin film solid state cells, and thick film solid state batteries, the solid state battery being mounted on the printed circuit board over at least 50% of the same area of the printed circuit board as the integrated circuit chip package.

[0006] According to some embodiments, a method for manufacturing a printed circuit board assembly may comprise: providing a printed circuit board, a solid state battery and an integrated circuit chip package, wherein the printed circuit board comprises a recess configured for receiving the solid state battery; mounting the solid state battery on the printed circuit board wherein the solid state battery is fitted partially into the recess in the printed circuit board; and mounting the integrated circuit chip package on the printed circuit board, over the solid state battery; wherein the solid state battery is selected from a group consisting of thin film solid state batteries, batteries comprising stacked thin film solid state cells, and thick film solid state batteries.

[0007] According to some embodiments, a method for manufacturing a printed circuit board assembly may comprise: providing a printed circuit board, a solid state battery and an integrated circuit chip package; mounting the integrated circuit chip package on the printed circuit board; and mounting the solid state battery on the printed circuit board over the integrated circuit chip package; wherein the solid state battery is selected from a group consisting of thin film solid state batteries, batteries comprising stacked thin film solid state cells, and thick film solid state batteries.

BRIEF DESCRIPTION OF THE DRAWINGS

[0008] These and other aspects and features of the present disclosure will become apparent to those ordinarily skilled in the art upon review of the following description of specific embodiments of the disclosure in conjunction with the accompanying figures, wherein:

[0009] FIG. 1 is a block diagram of an example PCB assembly having a TFSSB (thin film solid state battery) combined with an IC chip package, according to some embodiments;

[0010] FIGS. 2 and 3, respectively are top views illustrating an IC chip package mounted on a PCB, and an IC chip package and a TFSSB mounted on a PCB, according to some embodiments;

[001 1 ] FIGS. 4 and 5, respectively, are cross-sectional views illustrating

representations of an IC chip package mounted on a PCB, and an IC package and a TFSSB mounted on a PCB, with the TFSSB between the IC chip package and the PCB, according to some embodiments;

[0012] FIG. 6 is a cross-sectional view illustrating a representation of an IC chip package and a high capacity TFSSB mounted on a PCB, with the high capacity TFSSB between the IC chip package and the PCB, according to some embodiments;

[0013] FIG. 7 is a cross-sectional view illustrating a representation of an IC chip package and a TFSSB mounted on a PCB, with the TFSSB on top of the IC chip package, according to some embodiments;

[0014] FIG. 8 is a top view illustrating an IC chip package and a TFSSB mounted on a PCB and a switch for controlling charge flow to the IC, according to some embodiments,

DETAILED DESCRIPTION

[0015] Embodiments of the present disclosure will now be described in detail with reference to the drawings, which are provided as illustrative examples of the disclosure so as to enable those skilled in the art to practice the disclosure. Notably, the figures and examples below are not meant to limit the scope of the present disclosure to a single embodiment, but other embodiments are possible by way of interchange of some or all of the described or illustrated elements. Moreover, where certain elements of the present disclosure can be partially or fully implemented using known components, only those portions of such known components that are necessary for an understanding of the present disclosure will be described, and detailed descriptions of other portions of such known components will be omitted so as not to obscure the disclosure. In the present disclosure, an embodiment showing a singular component should not be considered limiting; rather, the disclosure is intended to encompass other embodiments including a plurality of the same component, and vice-versa, unless explicitly stated otherwise herein, Moreover, it is not intended for any term in the present disclosure to be ascribed an uncommon or special meaning unless explicitly set forth as such. Further, the present disclosure encompasses present and future known equivalents to the known components referred to herein by way of illustration.

[0016] Embodiments of this disclosure relate generally to thin or thick film solid state battery applications, and more particularly to such batteries combined with integrated circuit chip packages in printed circuit board assemblies and methods of making the same.

According to certain aspects, embodiments include incorporating a battery into a PCB assembly while minimizing component real estate. According to further aspects, embodiments can also be made backwards compatible with existing laid out PCB boards.

[0017] Herein the term thin film is used to refer to films with thicknesses less than

25.4 microns, and the term thick film is used to refer to films with a thickness greater than or equal to 25.4 microns, Note that the method of applying a thin film can be via a spin coating method, spray coating method, a vapor condensation method (as for parylene coating), PVD (physical vapor deposition) or CVD (chemical vapor deposition) coating method, etc., whereas the method of applying a thick film usually uses a different set of tools and methods, such as dip coating, painting, doctor blading, litho or gravure printing, etc. A thin film solid state battery herein refers to a battery in which all component films are thin films, and a thick film solid state battery herein refers to a battery in which one or more of the component films is a thick film.

[0018] According to certain general aspects, embodiments of the present disclosure comprise thin film solid state batteries that are placed and mounted under or over an IC chip package on a PCB which allows such IC chip packages to have access to a power supply even when the main power supply has been turned off. These embodiments requires no extra PCB area, which is an advantage over designs which may include micro-batteries in IC chip packages, which take up extra PCB area, and cannot be used in already fabricated PCBs.

[0019] FIG. 1 is a block diagram illustrating aspects of example embodiments according to the present disclosure. As shown in FIG. 1 , an example PCB assembly includes a PCB 100, a power bus 102, a ground bus 104 and a combination of an IC chip package and a thin film solid state battery 106 having connections to both the power bus 102 and ground bus 104. The supply for power bus 102 can be a power supply provided on the PCB 100 or it can be an external power supply having power connections to PCB 100. It is apparent that there can be several different power buses on a given PCB, and so the disclosure is not limited to the illustrated example.

[0020] The PCB assembly can be included in a variety of electronic devices, such as smart phones, laptop or pad computers, portable devices such as home appliances and other devices considered part of the Internet of Things (IOT), etc. Those skilled in the art will appreciate that the size and composition of the PCB assembly and arrangement of components and signal lines thereon will depend upon the particular application, and so further details thereof will be omitted here for sake of clarity of the disclosure. [0021] The IC in component 106 can be any one of a variety of ICs that would benefit from a fail-safe power supply in the event power from bus 102 is interrupted. According to certain aspects, it can be CMOS IC circuitry with sensitivity to initial power on latch up (required initial power on sequencing schemes), ICs requiring fail safe battery power schemes (e.g. internet phone lines, security tokens, cards, electronics locks and keys, medical in body electronic devices, life support monitoring circuitry, etc.), and mission critical electronic circuitry (e.g. military and aerospace applications, satellite and space electronics, etc.). It is noted that most IC packages conform to the industry IC packaging standard governed by JEDEC (Joint Electron Device Engineering Council - a provider of standards for the microelectronics industry), and the IC in some embodiments of component 106 conforms to this standard. Application areas for the described embodiments can be cell phone CPU (central processing unit) and supporting chip sets, memory chips, standard CPU chips, imaging devices, camera chips, gyroscope chips, GPS (global positioning system) chips, etc, Moreover, it should be noted that many chips include power-on sequencing schemes, and those skilled in the art will understand how to integrate a thick or thin film solid state battery for use with such devices after being taught by the present disclosure,

[0022] The TFSSBs of the present invention can be any variety of TFSSB including

TFSSBs with vertical stack and parallel current collector configurations, and TFSSBs comprising a wide range of component layers and materials. As appreciated, such TFSSBs, even when packaged, can have very small thicknesses, for example as thin as 80 microns or below. As such, those skilled in the art will understand how to design such TFSSBs in packages with a flat format such that they can be nested under (or over) existing IC chip package design footprints, as will be described in more detail below. As further described below, extra battery capacity requirements can be accomplished with thicker batteries on top of chip packages while PCB pockets can be created under IC chip packages to account for any additional battery thickness beyond the available space between the PCB and the IC chip package.

[0023] In some embodiments the TFSSB may comprise: a substrate (such as a metal, semiconductor, glass, or YSZ ceramic, with 2 to 8 weight percent yttria and other minor impurities), an adhesion layer (e.g. Ti) and current collectors (e.g. Au) on the top surface of the substrate, a cathode (a layer of L1C0O2, for example) on the cathode current collector, an electrolyte (such as LiPON) covering the cathode and portions of the cathode current collector to isolate the cathode current collector from any other electrodes, an anode (e.g. Li) on portions of the top surface of the electrolyte and the anode current collector (e.g. Au), and encapsulation layer(s) covering the exposed surfaces of the anode and electrolyte and portions of the current collectors. The TFSSBs are not limited to this specific example - many different component layers and materials can be used in TFSSBs of the present invention.

[0024] Furthermore, in some embodiments a thermal shield layer (such as a sheet of silicone) may be included between the TFSSB and the IC chip package to reduce heat flow from the IC chip package to the TFSSB.

[0025] It should be noted that although component 106 is shown singularly for ease of illustration, the IC and TFSSB are incorporated in separate packages, as will become apparent from the descriptions below, However, the illustrated component 106 clearly shows that no additional real estate on PCB 100 is required when combining a TFSSB component along with an IC component according to some embodiments of the present disclosure.

[0026] It should be further noted that, although not shown in FIG, 1 , electrical interconnections from the IC to the TFSSB can vary and can be designed to be on any side, and several examples according to various embodiments of the disclosure will be described in more detail below.

[0027] As shown in FIG. 1 , in some embodiments a battery interface line 1 08 is included. This interface line can be connected to other circuitry either on or off PCB 1 00, and can be used for such functions as monitoring a charge level of the TFSSB and transmitting a TFSSB health profile (such as state of charge, charge retention age, battery life, etc.). If the battery is smart, modularized and has redundancy to extend battery performance, commands and data can flow bi-directionally via the interface line 108 for battery reconfiguration (such as for marking bad battery cells and taking these out of service). Although only one interface line 108 is shown in the figure, in embodiments there can be several. Moreover, interface line 108 is not necessary in all embodiments. Particularly convenient electrical access points for interfaces such as interface line 108 will be the four corners of the IC chip package in the integrated component 106, where IC packages typically have substantial space without pins. IC package lead frame legs can in embodiments be adjusted as required with low incremental cost and effort.

[0028] It should be noted that, depending on the interface standard being used, in some embodiments battery interface line(s) 108 can also serve to charge the batteries in component 106. [0029] Example configurations of a TFSSB combined with an IC on a PCB, such as component 106 on PCB 100 shown in FIG. 1 , and techniques for fabricating the same, according to various embodiments will now be described in more detail.

[0030] FIG. 3 shows a top view of some embodiments where a TFSSB 320 is mounted over an IC chip package 210 with leads 21 1. FIG. 2 is provided as a comparison to illustrate how having the TFSSB mounted over the IC chip package 210 does not require any additional PCB 100 surface area to accommodate the TFSSB, according to aspects of the present disclosure. FIG. 3 further indicates how the battery 320 can have connections to the power and ground pins of the IC chip package, which are typically located adjacent to opposite corners of the IC chip package. (The battery connection leads may be formed of a copper alloy, or copper alloy coated with a thin layer of gold, and electrically connected to the PCB by solder, for example.) FIG. 3 further illustrates how interconnections to the battery such as interface lines 108 shown in FIG. 1 can be provided. For example, 321, 323, 325 and 326 can be positive connection leads and 322 and 324 can be negative ground lead connections. In some embodiments the battery connection leads can be connected through the PCB traces to the appropriate VDD and GND package leads, and in some embodiments the battery connection leads can be directly connected to the appropriate VDD and GND package leads.

[0031] Although the TFSSB 320 is shown mounted over the IC chip package 210 in

FIG. 3, the TFSSB can be mounted under the IC chip package 210 instead - between the chip package and the PCB, as shown in more detail in FIG. 5.

[0032] FIG. 5 shows a cross-sectional view of an embodiment shown in FIG. 3, but with the TFSSB 520 mounted under the IC chip package. FIG. 4 is provided as a comparison to illustrate how having the TFSSB mounted under the IC chip package does not require any additional PCB surface area to accommodate the TFSSB, according to aspects of the present disclosure.

[0033] FIG. 6 shows a cross-sectional view of an embodiment shown in FIG. 3, but with the TFSSB mounted under the IC chip package, and with a thicker TFSSB 620 mounted under the IC chip package than shown in FIG. 5. FIG. 4 is provided as a comparison to illustrate how having the TFSSB 620 mounted under the IC chip package does not require any additional PCB surface area to accommodate the TFSSB, according to aspects of the present disclosure. FIG. 6 further illustrates a pocket 601 in the PCB under the IC chip package to accommodate a TFSSB 620 having a thickness that is greater than the clearance provided between the PCB and the IC chip package when the IC chip package is mounted on the PCB. A thicker battery may be needed for applications where a higher charge capacity is required. The pocket in the PCB is formed, for example, by laser machining the PCB prior to mounting devices (the PCB material can be ablated by the laser), Furthermore, in some embodiments the pocket in the PCB may be lined by a copper sheet, or other similar sheet or coating of material with high thermal conductivity - such a lining can increase the diffusion of heat out of the battery sitting in the recess.

[0034] The TFSSBs of FIGS. 5 & 6 can have electrical connections similar to those described above for TFSSB 320. In the embodiments of FIGS. 5 & 6 the entire TFSBBs and electrical connections to the PCB and/or IC chip package will be within the area of the PCB covered by the IC chip package 210 and its leads 21 1 .

[0035] FIG. 7 shows a cross-sectional view of an embodiment shown in FIG. 3, where the TFSSB 720 is mounted on top of the IC chip package. FIG. 4 is provided as a comparison to illustrate how having the TFSSB mounted on top of the IC chip package does not require any additional PCB surface area to accommodate the TFSSB, according to aspects of the present disclosure.

[0036] FIG. 8 shows a top view of some embodiments where a TFSSB 820 is mounted either on top or under an IC chip package 210 (top mounting is actually shown in the figure) and an external switch 823 is provided between the battery and the IC chip package; electrical connections 821 , 822 and 824 complete the circuit. In some

embodiments, 822, 823 and 824 can be a switched positive connection lead and 821 can be a negative ground connection lead. In one embodiment, the switch is implemented using standard jumper pins (which can be installed or removed as desired). In another embodiment, the switch may be a standard mechanical toggle switch. In yet another embodiment, the switch can include circuitry which automatically connects the battery to IC chip in case of external power loss - an example of such circuitry designed in CMOS technology is transmission gates where the on demand gate signal controlled PMOS and NMOS transistors are electrically connected in parallel to achieve very low switch resistance.

[0037] FIGS. 1 , 3, 5, 6, 7 and 8 illustrate that the surface of the PCB may be used efficiently. For example, the solid state battery may be mounted on the PCB over at least 50% of the same area of the PCB as the IC chip package, in embodiments the solid state battery may be mounted on the PCB over at least 75% of the same area of the PCB as the IC chip package, and in some embodiments, the solid state battery may be mounted on the PCB over at least 90% of the same area of the PCB as the IC chip package.

[0038] In some embodiments a method for manufacturing a PCB assembly may comprise: (1) providing a PCB, a TFSSB and an IC chip package; (2) laser ablating a recess in the PCB; (3) mounting the TFSSB on the PCB wherein the TFSSB is fitted partially into the recess in the PCB; and (4) mounting the IC chip package on the PCB, over the TFSSB,

[0039] Furthermore, in some embodiments, a method for manufacturing a PCB assembly may comprise: (1) providing a PCB, a TFSSB and an IC chip package, wherein the PCB has a predefined recess; (2) mounting the TFSSB on the PCB wherein the TFSSB is fitted partially into the recess in the PCB; and (3) mounting the IC chip package on the PCB, over the TFSSB. Note that a recess may be predefined in the PCB by forming an opening in a Kapton sheet used to form the upper insulating layer of the PCB,

[0040] Furthermore, in some embodiments, a method for manufacturing a PCB assembly may comprise: (1 ) providing a PCB, a TFSSB and an IC chip package; (2) mounting the IC chip package on the PCB; and (3) mounting the TFSSB on the PCB over the IC chip package,

[0041] The PCB assemblies and techniques of the present disclosure may provide one or more of: significant saving of usable PCB surface area (allowing for 3D build-up of devices on the PCB); critical back up and start up power needed for IC chips; compact and portable power for Internet Of Things (IOT), and displacement of some costly power management IC chip packages, Furthermore, the PCB assemblies and techniques of the present disclosure may be: easily incorporated into various PCB designs; and compatible with board designs where compactness, portable power, and back-up power are desirable.

Furthermore, the solid state batteries may act as electrical and electromagnetic noise, including F interference, shields for the IC chips with which they are combined in the PCB assemblies.

[0042] Although described above with reference to applications having flat battery surfaces, the disclosure can be implemented with curved and deformable batteries that can be matched with a corresponding curved host surface. Such hosts can include flexible printed organic electronic (POE), display devices (OLEDs etc.), and electronic focusing arrays.

[0043] Although embodiments of the present disclosure have been particularly described with reference to PCB assemblies comprising thin film solid state batteries, in some embodiments thick film solid state batteries may be combined with the IC packages, where the thick film batteries comprise thicker layers of material (thicker than the equivalent layers in TFSSBs) for higher energy capacity. When thick film solid state batteries are utilized, it may be necessary for the recess in the PCB to be deeper to accommodate the battery when placed between the PCB and the IC chip package.

[0044] Although embodiments of the present disclosure have been particularly described with reference to PCB assemblies comprising thin film solid state batteries, in some embodiments TFSSB cells may be stacked to achieve higher energy capacity batteries, When stacked TFSSBs are utilized, it may be necessary for the recess in the PCB to be deeper to accommodate the battery when the battery is placed between the PCB and the IC chip package.

[0045] Although embodiments of the present disclosure have been particularly described with reference to certain embodiments thereof, it should be readily apparent to those of ordinary skill in the art that changes and modifications in the form and details may be made without departing from the spirit and scope of the disclosure,

Claims

WHAT IS CLAIMED IS:

1 . A printed circuit board assembly comprising:

a printed circuit board;

an integrated circuit chip package mounted on said printed circuit board; and a solid state battery selected from a group consisting of thin film solid state batteries, batteries comprising stacked thin film solid state cells, and thick film solid state batteries, said solid state battery being mounted on said printed circuit board over at least 50% of the same area of said printed circuit board as said integrated circuit chip package.

2. The printed circuit board assembly of claim 1 , wherein said solid state battery is a thin film solid state battery.

3. The printed circuit board assembly of claim 1, further comprising a heat shield layer between said solid state battery and said integrated circuit chip package.

4. The printed circuit board assembly of claim 1 , wherein said solid state battery has charge and discharge capability.

5. The printed circuit board assembly of claim 1 , wherein said solid state battery is electrically connected to said integrated circuit chip package, wherein said solid state battery is configured to provide power, when other power sources are not available, to said integrated circuit chip package to sustain essential chip functions including one or more of CMOS latch up power sequencing and memory refresh operations.

6. The printed circuit board assembly of claim 1 , further comprising a switch controlling flow of charge from said solid state battery to said integrated circuit chip package,

7. The printed circuit board assembly of claim 1 , wherein said solid state battery is mounted on said printed circuit board above said integrated circuit chip package.

8. The printed circuit board assembly of claim 1 , wherein said solid state battery is mounted on said printed circuit board below said integrated circuit chip package.

9, The printed circuit board assembly of claim 1, wherein said printed circuit board comprises a recess configured for receiving said solid state battery, and wherein said solid state battery is mounted on said printed circuit board below said integrated circuit chip package, said solid state battery being partially fitted in said recess.

] 0. A method for manufacturing a printed circuit board assembly comprising:

providing a printed circuit board, a solid state battery and an integrated circuit chip package, wherein said printed circuit board comprises a recess configured for receiving said solid state battery;

mounting said solid state battery on said printed circuit board wherein said solid state battery is fitted partially into said recess in said printed circuit board; and

mounting said integrated circuit chip package on said printed circuit board, over said solid state battery;

wherein said solid state battery is selected from a group consisting of thin film solid state batteries, batteries comprising stacked thin film solid state cells, and thick film solid state batteries.

1 1. The method as in claim 10, wherein said providing said printed circuit board comprises laser ablating said recess in said printed circuit board.

12. The method as in claim 10, wherein said solid state battery is a thin film solid state battery.

13. A method for manufacturing a printed circuit board assembly comprising:

providing a printed circuit board, a solid state battery and an integrated circuit chip package;

mounting said integrated circuit chip package on said printed circuit board; and mounting said solid state battery on said printed circuit board over said integrated circuit chip package;

14. The method as in claim 13, wherein said solid state battery is mounted on said printed circuit board over at least 50% of the same area of said printed circuit board as said integrated circuit chip package.

15. The method as in claim 13, wherein said solid state battery is mounted on said printed circuit board over at least 75% of the same area of said printed circuit board as said integrated circuit chip package.