WO2016173268A1 - 传感器芯片的空腔形成方法、制造方法、芯片及电子设备 - Google Patents

传感器芯片的空腔形成方法、制造方法、芯片及电子设备 Download PDF

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WO2016173268A1
WO2016173268A1 PCT/CN2015/097503 CN2015097503W WO2016173268A1 WO 2016173268 A1 WO2016173268 A1 WO 2016173268A1 CN 2015097503 W CN2015097503 W CN 2015097503W WO 2016173268 A1 WO2016173268 A1 WO 2016173268A1
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layer
sensor chip
cover layer
substrate
bonding
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French (fr)
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蔡孟锦
宋青林
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Goertek Inc
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Goertek Inc
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00023—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
    • B81C1/00047—Cavities
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00023—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
    • B81C1/00055—Grooves
    • B81C1/00079—Grooves not provided for in groups B81C1/00063 - B81C1/00071
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00134—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems comprising flexible or deformable structures
    • B81C1/00158—Diaphragms, membranes
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00261—Processes for packaging MEMS devices
    • B81C1/00269—Bonding of solid lids or wafers to the substrate
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00436—Shaping materials, i.e. techniques for structuring the substrate or the layers on the substrate
    • B81C1/00555—Achieving a desired geometry, i.e. controlling etch rates, anisotropy or selectivity
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2201/00—Specific applications of microelectromechanical systems
    • B81B2201/02—Sensors
    • B81B2201/0264—Pressure sensors

Definitions

  • the present invention relates to a microelectromechanical system (MEMS) pressure sensor chip, and more particularly to a method for forming a cavity in a MEMS pressure sensor chip, a method for fabricating a MEMS pressure sensor chip, A MEMS pressure sensor chip and an electronic device.
  • MEMS microelectromechanical system
  • MEMS pressure sensor chips have been widely used in industries such as biology and automobiles.
  • MEMS pressure sensor chips include a cavity to sense external pressure changes.
  • a trench is first formed on a substrate, and then a bonding layer is formed.
  • the bonding layer can be an oxide.
  • the bonding layer may be formed on the substrate or on the upper film wafer for covering the trench.
  • the groove surface may have a bonding layer (oxide layer) or may not have a bonding layer.
  • the upper film wafer is bonded to the substrate through a bonding layer to cover and seal the trench to form a cavity.
  • the upper film wafer is ground to reduce the thickness of the upper film wafer. In this manner, the thickness of the film formed by the upper film wafer cannot be less than 10 ⁇ m due to limitations of the grinding process.
  • the second way is basically the same as the first way.
  • the difference is that the upper film wafer is an SOI wafer.
  • the SOI wafer includes a thin film layer, an insulating layer, and an upper silicon layer. And after bonding the SOI wafer to the substrate, a removal process is performed from the insulating layer to remove the upper silicon layer. Thinner structures can be achieved using SOI wafers, but at a higher cost.
  • a method for forming a cavity in a MEMS pressure sensor chip includes: forming a first recess on a substrate; bonding a cover layer to the substrate, Covering the first recess to form a cavity; and etching the cover layer to reduce the thickness of the cover layer.
  • the step of bonding the cover layer to the substrate further comprises bonding the cover layer to the substrate by fusion bonding.
  • the step of bonding the cover layer to the substrate further comprises bonding the cover layer to the substrate through the bonding layer.
  • the bonding layer is an oxide layer.
  • the surface of the first groove has an oxide layer.
  • the bonding layer is formed on the substrate or on the cover layer.
  • the cover layer is a pure silicon wafer or an epitaxial wafer.
  • the step of etching the cap layer comprises: wet etching the cap layer.
  • the wet etching comprises electrochemical etching.
  • the step of etching the cap layer comprises patterning the cap layer to etch a portion of the cap layer opposite the cavity.
  • the etched cover layer has a thickness of less than 10 microns. Preferably, the etched cover layer has a thickness of less than 5 microns.
  • the substrate is a silicon substrate.
  • the cover layer is ground to reduce the thickness of the cover layer prior to etching the cover layer.
  • the method further comprises: after forming the thermal oxide layer again on the etched surface of the cover layer, removing the thermal oxide layer and reducing the thickness of the cover layer.
  • a method for fabricating a microelectromechanical system pressure sensor chip comprising using a pressure sensing device for forming a MEMS system in accordance with the present invention
  • the method of cavities in the chip forms a cavity in the MEMS pressure sensor chip.
  • a MEMS pressure sensor chip is provided that is fabricated using a method for fabricating a MEMS pressure sensor chip in accordance with the present invention.
  • an electronic device comprising a MEMS pressure sensor chip in accordance with the present invention.
  • An advantage of the technical solution of the present invention is that a thin film in a high performance MEMS pressure sensor chip can be formed at a lower cost.
  • the inventors of the present invention have found that in the prior art, the thickness of the film on the cavity in the MEMS pressure sensor chip is thinned by grinding, or a thin cavity film is realized by the SOI wafer.
  • the invention uses a different approach.
  • the thickness of the film is further thinned using an etching process instead of removing a certain layer. Therefore, the technical task to be achieved by the present invention or the technical problem to be solved is not thought of or expected by those skilled in the art, so the present invention is a new technical solution.
  • FIG. 1 is a flow chart of an illustrative embodiment of a method in accordance with the present invention.
  • FIGS. 2 through 7 are schematic views of one example of forming a cavity in a microelectromechanical system pressure sensor chip in accordance with the present invention.
  • FIGS. 8 through 13 are schematic views of another example of forming a cavity in a microelectromechanical system pressure sensor chip in accordance with the present invention.
  • FIG. 1 shows a flow diagram of an illustrative embodiment of a method for forming a cavity in a microelectromechanical system pressure sensor chip in accordance with the present invention.
  • step S1100 a first recess is formed on the substrate.
  • the substrate can be a silicon substrate.
  • step S1200 a cover layer is bonded to the substrate to cover the first recess to form a cavity.
  • the cover layer can be a pure silicon wafer or an epitaxial wafer.
  • the cover layer can be bonded to the substrate by fusion bonding.
  • the bonding layer can be formed first, and then through the key, as in the prior art.
  • the laminate layer bonds the cover layer to the substrate.
  • the bonding layer can be an oxide layer.
  • the bonding layer may be formed on the substrate or may be formed on the cover layer. In the case where the bonding layer is formed on the substrate, the surface of the first groove may have an oxide layer (bonding layer) or may not have an oxide layer.
  • step S1300 the cover layer is ground to reduce the thickness of the cover layer.
  • step S1300 can be omitted.
  • step S1400 the cover layer is etched to further reduce the thickness of the cover layer.
  • an etching technique is used to thin the thickness of the cap layer, rather than by removing the silicon layer above the insulating layer.
  • the etching process may include dry etching and wet etching.
  • wet etching for example, electrochemical etching, is employed in step S1400.
  • the cover layer can be patterned to etch the portion of the cover layer opposite the cavity.
  • only the portion of the cover layer opposite the cavity may be etched while leaving other portions.
  • This kind of processing can bring benefits.
  • the thicker portions around the film make the film more robust.
  • the film's robustness can be improved to some extent while maintaining high sensing performance.
  • it gives designers a degree of flexibility in some cases. For example, the designer may choose to etch all or part of the etch, or may select the portion to be etched.
  • the thickness of the film obtained by the grinding treatment is greater than 10 microns.
  • the thickness of the resulting cover layer after etching may be less than 10 microns, preferably, for example, less than 5 microns.
  • a thermal oxide layer may be further formed on the etched surface of the cap layer to remove the thermal oxide layer, again reducing the thickness of the cap layer. This allows precise control of the reduced thickness with an accuracy of up to 1 micron.
  • the technical solution of the present invention it is possible to avoid using a relatively expensive SOI wafer to realize a thinner thickness film, thereby enabling the sensor to maintain high sensitivity. Therefore, the technical solution of the present invention can achieve a thinner film thickness than the prior art grinding method; Compared to the method of using an SOI wafer, a general silicon wafer or an epitaxial wafer can be used in the present invention, and thus the cost is low.
  • the invention also includes a method for fabricating a microelectromechanical system pressure sensor chip.
  • the method of manufacture includes forming a cavity in a microelectromechanical system pressure sensor chip using a method for forming a cavity in a microelectromechanical system pressure sensor chip in accordance with the present invention.
  • the invention also includes a MEMS pressure sensor chip.
  • the chip is fabricated using a method for fabricating a microelectromechanical system pressure sensor chip in accordance with the present invention.
  • the MEMS pressure sensor chip can include a cavity for sensing pressure formed by a substrate, a first recess in the substrate, and a cover layer.
  • the substrate and the cover layer are joined together by bonding to close the cavity, the cover layer has a second groove formed by etching on a side opposite to the substrate, and the bottom of the second groove is empty
  • the cavity is opposite.
  • the cover layer including the film on the cavity is groove-shaped, the periphery of the film is thick. This makes the film more robust.
  • the film's robustness can be improved to some extent while maintaining high sensing performance. Additionally or alternatively, this also gives the designer a degree of flexibility. For example, the designer can select the portion to be etched as needed.
  • the bonding can be a fusion bond.
  • a bonding layer may also be included between the substrate and the cover layer.
  • the bonding layer can be, for example, an oxide layer.
  • the oxide layer may be located only between the cap layer and the substrate, while the surface of the first groove does not have an oxide layer.
  • the overlay layer can be a silicon wafer or an epitaxial wafer.
  • the cover layer has a thickness at the bottom of the second groove that is less than 10 microns, preferably less than 5 microns.
  • the substrate can be a silicon substrate.
  • an oxide layer may be formed on the surface of the second groove.
  • the invention also includes an electronic device comprising a MEMS pressure sensor chip in accordance with the present invention.
  • the electronic device can be a smartphone, tablet, vehicle, medical device, or the like.
  • FIGS. 2 through 7 An example of a cavity in a sensor chip.
  • a trench a2 is formed on the silicon substrate a1.
  • the trench a2 can be formed by etching.
  • a bonding layer a3 is deposited on the silicon substrate a1.
  • the pure silicon wafer a4 is bonded to the silicon substrate a1 via the bonding layer a3 by fusion bonding.
  • the thickness of the pure silicon wafer a4 is thinned by grinding.
  • the portion of the pure silicon wafer a4 opposite to the cavity is further thinned by wet etching such as KOH, TMAH or ECE.
  • a groove a5 is formed on the pure silicon wafer a4.
  • an oxide film is formed on the groove a5.
  • FIGS. 8 to 13 differs from the examples of FIGS. 2 to 7 in that an EPI wafer (extension wafer) is used in place of the pure silicon wafer in the examples of FIGS. 8 to 13 to form a thin film.
  • EPI wafer extension wafer
  • a trench b2 is formed on the silicon substrate b1.
  • the trench b2 can be formed by etching.
  • a bonding layer b3 is deposited on the silicon substrate b1.
  • the epitaxial wafer b4 is bonded to the silicon substrate b1 via the bonding layer b3 by fusion bonding.
  • the thickness of the epitaxial wafer b4 is thinned by grinding.
  • the portion of the epitaxial wafer b4 opposite to the cavity is further thinned by wet etching such as KOH, TMAH or ECE.
  • a groove b5 is formed on the Lei wafer b4.
  • an oxide film is formed on the groove b5.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Pressure Sensors (AREA)
  • Measuring Fluid Pressure (AREA)
  • Micromachines (AREA)

Abstract

一种传感器芯片的空腔形成方法，该方法包括在衬底(a1)上形成第一凹槽(a2)；将覆盖(a4)层键合到衬底(a1)上，以覆盖第一凹槽(a2)，从而形成空腔；对覆盖层(a4)进行蚀刻，以降低覆盖层厚度。该方法能实现更薄的薄膜厚度，增加传感器的灵敏度。

Description

传感器芯片的空腔形成方法、制造方法、芯片及电子设备 技术领域
本发明涉及微机电系统(MEMS)压力传感器芯片，更具体地，涉及一种用于形成微机电系统压力传感器芯片中的空腔的方法、一种用于制造微机电系统压力传感器芯片的方法、一种微机电系统压力传感器芯片以及电子设备。
背景技术
微机电系统压力传感器芯片已广泛应用于生物、汽车等工业领域。一般来说，微机电系统压力传感器芯片包括空腔，以便感测外界的压力变化。
在现有的微机电系统压力传感器芯片设计中，主要有两种形成空腔的方式。一种是研磨方式，另一种是使用SOI(绝缘体上硅)晶圆的方式。
在第一种方式中，首先在衬底上形成沟槽，然后形成键合层。键合层可以是氧化物。键合层可以形成在衬底上，也可以形成在用于覆盖沟槽的上层膜晶圆上。沟槽表面可以具有键合层(氧化物层)，也可以不具有键合层。接着，上层膜晶圆通过键合层键合到衬底上，以覆盖并密封所述沟槽，从而形成空腔。最后，对上层膜晶圆进行研磨，以减薄上层膜晶圆的厚度。在这种方式中，由于研磨工艺的限制，上层膜晶圆所形成的薄膜的厚度不能低于10微米。
第二种方式与第一种方式基本相同。它们的区别在于，上层膜晶圆是SOI晶圆。SOI晶圆包括薄膜层、绝缘层和上面的硅层。以及在将SOI晶圆键合到衬底上之后，从绝缘层执行去除处理，以去除所述上面的硅层。使用SOI晶圆可以实现较薄的结构，但是，它的成本比较高。
因此，需要针对现有技术中的至少一个方面进行改进。
发明内容
本发明的一个目的是提供一种用于形成微机电系统压力传感器芯片中的空腔的新技术方案。
根据本发明的一个实施例，提供了一种用于形成微机电系统压力传感器芯片中的空腔的方法，包括：在衬底上形成第一凹槽；将覆盖层键合到衬底上，以覆盖第一凹槽，从而形成空腔；以及对覆盖层进行蚀刻，以降低覆盖层厚度。
优选地，将覆盖层键合到衬底上的步骤还包括：通过熔融键合将覆盖层键合到衬底上。
优选地，将覆盖层键合到衬底上的步骤还包括：通过键合层将覆盖层键合到衬底上。优选地，键合层是氧化物层。
优选地，第一凹槽的表面具有氧化物层。
优选地，键合层被形成在衬底上或者在覆盖层上。
优选地，所述覆盖层是纯硅晶圆或者磊晶圆。
优选地，对覆盖层进行蚀刻的步骤包括：对覆盖层进行湿法蚀刻。
优选地，所述湿法蚀刻包括电化学蚀刻。
优选地，对覆盖层进行蚀刻的步骤包括：对覆盖层进行构图，以便蚀刻覆盖层中与空腔相对的部分。
优选地，经蚀刻的覆盖层的厚度小于10微米。优选地，经蚀刻的覆盖层的厚度小于5微米。
优选地，所述衬底是硅衬底。
优选地，在对覆盖层进行蚀刻之前，对覆盖层进行研磨，以降低覆盖层厚度。
优选地，所述方法还包括：在覆盖层的经蚀刻的表面上再次形成热氧化物层后，将该热氧化物层去除，再降低覆盖层的厚度。
根据本发明的另一个实施例，提供了一种用于制造微机电系统压力传感器芯片的方法，包括使用根据本发明的用于形成微机电系统压力传感 器芯片中的空腔的方法形成微机电系统压力传感器芯片中的空腔。
根据本发明的另一个实施例，提供了一种微机电系统压力传感器芯片，它使用根据本发明的用于制造微机电系统压力传感器芯片的方法被制造。
根据本发明的另一个实施例，提供了一种电子设备，包括根据本发明的微机电系统压力传感器芯片。
本发明的技术方案的一个优点在于，可以通过较低的成本来形成高性能的微机电系统压力传感器芯片中的薄膜。
本发明的发明人发现，在现有技术中，通过研磨的方式来减薄微机电系统压力传感器芯片中的空腔上的薄膜的厚度，或者，通过SOI晶圆来实现薄的空腔薄膜。本发明使用不同的方式。在本发明中，使用蚀刻工艺进一步减薄薄膜的厚度，而不是去除某一层。因此，本发明所要实现的技术任务或者所要解决的技术问题是本领域技术人员从未想到的或者没有预期到的，故本发明是一种新的技术方案。
另外，本领域技术人员应当理解，尽管现有技术中存在许多问题，但是，本发明的每个实施例或权利要求的技术方案可以仅在一个或几个方面进行改进，而不必同时解决现有技术中或者背景技术中列出的全部技术问题。本领域技术人员应当理解，对于一个权利要求中没有提到的内容不应当作为对于该权利要求的限制。
通过以下参照附图对本发明的示例性实施例的详细描述，本发明的其它特征及其优点将会变得清楚。
附图说明
被结合在说明书中并构成说明书的一部分的附图示出了本发明的实施例，并且连同其说明一起用于解释本发明的原理。
图1是根据本发明的方法的一个示意性实施例的流程图。
图2至7是根据本发明的用于形成微机电系统压力传感器芯片中的空腔的一个例子的示意图。
图8至13是根据本发明的用于形成微机电系统压力传感器芯片中的空腔的另一个例子的示意图。
具体实施方式
现在将参照附图来详细描述本发明的各种示例性实施例。应注意到：除非另外具体说明，否则在这些实施例中阐述的部件和步骤的相对布置、数字表达式和数值不限制本发明的范围。
以下对至少一个示例性实施例的描述实际上仅仅是说明性的，决不作为对本发明及其应用或使用的任何限制。
对于相关领域普通技术人员已知的技术、方法和设备可能不作详细讨论，但在适当情况下，所述技术、方法和设备应当被视为说明书的一部分。
在这里示出和讨论的所有例子中，任何具体值应被解释为仅仅是示例性的，而不是作为限制。因此，示例性实施例的其它例子可以具有不同的值。
应注意到：相似的标号和字母在下面的附图中表示类似项，因此，一旦某一项在一个附图中被定义，则在随后的附图中不需要对其进行进一步讨论。
下面参照附图来描述本发明的实施例和例子。
图1示出了根据本发明的用于形成微机电系统压力传感器芯片中的空腔的方法的一个示意性实施例的流程图。
如图1所示，在步骤S1100,在衬底上形成第一凹槽。
例如，所述衬底可以是硅衬底。
在步骤S1200，将覆盖层键合到衬底上，以覆盖第一凹槽，从而形成空腔。
例如，所述覆盖层可以是纯硅晶圆或者磊晶圆。
例如，可以通过熔融键合将将覆盖层键合到衬底上。
在一个例子中，可以像现有技术那样，先形成键合层，然后通过键 合层将覆盖层键合到衬底上。例如，键合层可以是氧化物层。键合层可以被形成在衬底上，或者也可以被形成在覆盖层上。在键合层被形成在衬底上的情况下，第一凹槽的表面可以具有氧化物层(键合层)，也可以不具有氧化物层。
可选地，在步骤S1300，对覆盖层进行研磨，以降低覆盖层厚度。在某些实施例中，可以省略步骤S1300。
在步骤S1400,对覆盖层进行蚀刻，以进一步降低覆盖层厚度。
与现有技术的SOI方式不同，在本发明中，使用蚀刻技术来减薄覆盖层的厚度，而不是通过去除绝缘层上面的硅层来实现薄膜。
蚀刻工艺可以包括干法蚀刻和湿法蚀刻。优选地，在步骤S1400中采用湿法蚀刻，例如，电化学蚀刻。
在蚀刻的过程中，可以对覆盖层进行构图，以便蚀刻覆盖层中与空腔相对的部分。
在根据本发明的一个例子中，可以仅仅蚀刻覆盖层中与空腔相对的部分，而保留其他部分。这种处理可以带来好处。例如，在某些情况下，薄膜周围较厚的部分使得薄膜更加坚固。这样，在保持高感测性能的情况下，薄膜的坚固性可以得到一定程度的提升。另外，例如，在某些情况下，它也给设计人员带来一定程度的灵活性。例如，设计人员可以选择全部蚀刻或者部分蚀刻，或者可以选择所蚀刻的部分。
在现有技术中，通过研磨处理所得到的薄膜厚度大于10微米。然而，在本发明中，在蚀刻之后最终得到的覆盖层的厚度可以小于10微米，优选地，例如小于5微米。
在蚀刻之后，还可以再在覆盖层的经蚀刻的表面上形成热氧化物层，将该热氧化物层去除，再次降低覆盖层厚度。这样可以精准控制降低厚度，其精度可以达到1微米以内。
通过本发明的技术方案，可以避免使用成本较高的SOI晶圆来实现较薄厚度的薄膜，从而使得传感器能够保持较高灵敏度。因此，与现有技术中的研磨方式相比，本发明的技术方案能够实现更薄的薄膜厚度；并且， 与使用SOI晶圆的方式相比，在本发明中可以使用一般的硅晶圆或者磊晶圆，因而成本较低。
在另一个实施例中，本发明还包括一种用于制造微机电系统压力传感器芯片的方法。该制造方法包括使用根据本发明的用于形成微机电系统压力传感器芯片中的空腔的方法，形成微机电系统压力传感器芯片中的空腔。
在另一个实施例中，本发明还包括一种微机电系统压力传感器芯片。该芯片使用根据本发明的用于制造微机电系统压力传感器芯片的方法被制造。
例如，在一个例子中，该微机电系统压力传感器芯片可以包括用于感应压力的空腔，所述空腔由衬底、衬底中的第一凹槽和覆盖层形成。所述衬底与覆盖层通过键合被连接在一起以封闭所述空腔，所述覆盖层在与衬底相对的一面具有通过蚀刻形成的第二凹槽，第二凹槽的底部与空腔相对。在这个例子中，由于包括空腔上面的薄膜的覆盖层是凹槽形状的，因此，薄膜周围较厚。这使得薄膜更加坚固。这样，在保持高感测性能的情况下，薄膜的坚固性可以得到一定程度的提升。另外或另选地，这也给设计人员带来一定程度的灵活性。例如，设计人员可以根据需要选择所要蚀刻的部分。
例如，所述键合可以是熔融键合。例如，在衬底和覆盖层之间还可以包括键合层。键合层例如可以是氧化物层。氧化物层可以仅位于覆盖层和衬底之间，而第一凹槽的表面不具有氧化物层。
例如，覆盖层可以是硅晶圆或者磊晶圆。例如，覆盖层在第二凹槽底部的厚度小于10微米，优选地，小于5微米。例如，所述衬底可以是硅衬底。例如，在第二凹槽的表面上可以形成有氧化物层。
在另一个实施例中，本发明还包括一种电子设备，包括根据本发明的微机电系统压力传感器芯片。例如，所述电子设备可以是智能手机、平板电脑、车辆、医疗装置等。
下面，参照图2至7描述根据本发明的用于形成微机电系统压力传 感器芯片中的空腔的一个例子。
如图2所示，在硅衬底a1上形成沟槽a2。例如，可以通过蚀刻来形成沟槽a2。
如图3所示，在硅衬底a1上沉积键合层a3。
如图4所示，通过熔融键合，经由键合层a3将纯硅晶圆a4键合到硅衬底a1上。
如图5所示，通过研磨来减薄纯硅晶圆a4的厚度。
如图6所示，通过诸如KOH、TMAH或ECE等的湿法蚀刻，使得纯硅晶圆a4上与空腔相对的部分进一步减薄。在纯硅晶圆a4上形成凹槽a5。
如图7所示，在凹槽a5上形成氧化物膜。
下面，参照图8至13描述根据本发明的用于形成微机电系统压力传感器芯片中的空腔的另一个例子。图8至13的例子与图2至7的例子的区别在于，在图8至13的例子中使用EPI晶圆(磊晶圆)来代替纯硅晶圆，以形成薄膜。
如图8所示，在硅衬底b1上形成沟槽b2。例如，可以通过蚀刻来形成沟槽b2。
如图9所示，在硅衬底b1上沉积键合层b3。
如图10所示，通过熔融键合，经由键合层b3将磊晶圆b4键合到硅衬底b1上。
如图11所示，通过研磨来减薄磊晶圆b4的厚度。
如图12所示，通过诸如KOH、TMAH或ECE等的湿法蚀刻，使得磊晶圆b4上与空腔相对的部分进一步减薄。在磊晶圆b4上形成凹槽b5。
如图13所示，在凹槽b5上形成氧化物膜。
虽然已经通过例子对本发明的一些特定实施例进行了详细说明，但是本领域的技术人员应该理解，以上例子仅是为了进行说明，而不是为了限制本发明的范围。本领域的技术人员应该理解，可在不脱离本发明的范围和精神的情况下，对以上实施例进行修改。本发明的范围由所附权利要求来限定。

Claims (11)

  1. 一种用于形成微机电系统压力传感器芯片中的空腔的方法，包括：
    在衬底上形成第一凹槽；
    将覆盖层键合到衬底上，以覆盖第一凹槽，从而形成空腔；以及
    对覆盖层进行蚀刻，以降低覆盖层厚度。
  2. 根据权利要求1所述的方法，其中，将覆盖层键合到衬底上的步骤还包括：通过熔融键合将覆盖层键合到衬底上。
  3. 根据权利要求1或2所述的方法，其中，将覆盖层键合到衬底上的步骤还包括：通过键合层将覆盖层键合到衬底上。
  4. 根据权利要求1-3中任意一项所述的方法，其中，对覆盖层进行蚀刻的步骤包括：对覆盖层进行湿法蚀刻。
  5. 根据权利要求1-4中任意一项所述的方法，其中，对覆盖层进行蚀刻的步骤包括：对覆盖层进行构图，以便蚀刻覆盖层中与空腔相对的部分。
  6. 根据权利要求1-5中任意一项所述的方法，其中，经蚀刻的覆盖层的厚度小于10微米。
  7. 根据权利要求1-6中任意一项所述的方法，还包括：在对覆盖层进行蚀刻之前，对覆盖层进行研磨，以降低覆盖层厚度。
  8. 根据权利要求1-7中任意一项所述的方法，还包括：在覆盖层的经蚀刻的表面上再次形成热氧化物层后，将该热氧化物层去除，再降低覆 盖层的厚度。
  9. 一种用于制造微机电系统压力传感器芯片的方法，包括使用根据权利要求1-8中任意一项所述的方法形成微机电系统压力传感器芯片中的空腔。
  10. 一种微机电系统压力传感器芯片，它使用根据权利要求9所述的方法被制造。
  11. 一种电子设备，包括根据权利要求10所述的微机电系统压力传感器芯片。
PCT/CN2015/097503 2015-04-28 2015-12-15 传感器芯片的空腔形成方法、制造方法、芯片及电子设备 Ceased WO2016173268A1 (zh)

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