WO2016166751A1 - Printing of multi-layer circuits - Google Patents

Printing of multi-layer circuits Download PDF

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Publication number
WO2016166751A1
WO2016166751A1 PCT/IL2016/050382 IL2016050382W WO2016166751A1 WO 2016166751 A1 WO2016166751 A1 WO 2016166751A1 IL 2016050382 W IL2016050382 W IL 2016050382W WO 2016166751 A1 WO2016166751 A1 WO 2016166751A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
pcb
drilling
layers
conductive
Prior art date
Application number
PCT/IL2016/050382
Other languages
French (fr)
Inventor
Yiftah Karni
Steve Daren
Original Assignee
Printcb Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Printcb Ltd. filed Critical Printcb Ltd.
Priority to US15/566,013 priority Critical patent/US10446412B2/en
Priority to EP16779707.5A priority patent/EP3284326A4/en
Publication of WO2016166751A1 publication Critical patent/WO2016166751A1/en
Priority to IL254901A priority patent/IL254901A0/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4867—Applying pastes or inks, e.g. screen printing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01B—CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B1/00—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
    • H01B1/20—Conductive material dispersed in non-conductive organic material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01B—CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B1/00—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
    • H01B1/20—Conductive material dispersed in non-conductive organic material
    • H01B1/22—Conductive material dispersed in non-conductive organic material the conductive material comprising metals or alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H01L23/49883—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials the conductive materials containing organic materials or pastes, e.g. for thick films
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092—Dispersed materials, e.g. conductive pastes or inks
    • H05K1/097—Inks comprising nanoparticles and specially adapted for being sintered at low temperature
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
    • H05K3/1283—After-treatment of the printed patterns, e.g. sintering or curing methods
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/245—Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4679—Aligning added circuit layers or via connections relative to previous circuit layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203—Fillers and particles
    • H05K2201/0263—Details about a collection of particles
    • H05K2201/0272—Mixed conductive particles, i.e. using different conductive particles, e.g. differing in shape
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0104—Tools for processing; Objects used during processing for patterning or coating
    • H05K2203/0126—Dispenser, e.g. for solder paste, for supplying conductive paste for screen printing or for filling holes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1131—Sintering, i.e. fusing of metal particles to achieve or improve electrical conductivity
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
    • H05K3/1241—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by ink-jet printing or drawing by dispensing
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4673—Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4682—Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil

Definitions

  • the present invention relates generally to the field of multilayer printed circuit boards.
  • PCBs Printed circuit boards
  • Modern consumer electronics, the automotive industry, medical devices, and industrial equipment of all varieties are controlled to an increasing degree by elect o ic circuits, which in turn require development of tens of thousands of new boards every year.
  • This trend will grow as time-to-market and innovation have become major competitive advantages.
  • a board designer will typically order 2-3 prototype versions to validate and test the electronic performance of a device.
  • Such prototypes are usually produced either by local small- medium PCB manufacturers or by Far East manufacturers (mainly China) .
  • the system consists of four main blocks; a drilling station, a patterning station, a stacking/bonding station, and a sintering zone.
  • the substrate PCB is shuttled between these various stations, to have vias drilled, to be attached to stacks of previously-processed layers, to be covered with conductive paths by means of the aforementioned ink, and to have the ink sintered under a controlled temperature and atmosphere, respectively.
  • the patterning is accomplished by means of a novel two- step method involving both high-temperature conductive elements, low-temperature conductive elements, and flux. Two such compositions are successively applied and individually sintered to form a single conductive path; the second application serves to fill the porosities of the first layer.
  • This method a highly-conductive trace is obtained without requiring high temperatures, which in turn allows use of common substrates including polymers .
  • Figs. 1,2 depict the main system elements and fabrication process flow.
  • Fig. 3 shows the conductive ink process.
  • Fig. 4 shows a printed stack of 3 layers (cross section)
  • Fig. 5 shows a treated sheet cross section and drilled sheet in reverse-side view.
  • the term 'via' is an electrical connection between layers in a multi-layer PCB, which travels through the plane of one or more adjacent layers.
  • the term 'blind via' is used to denote a via used to connect an outer PCB layer with at least one inner layer of a multi-layer PCB.
  • 'buried via' refers to a via connecting at least two inner layers of a multi-layer PCB.
  • through-hole refers to a via around a hole passing through all layers of a multilayer PCB.
  • 'trace' or 'signal trace' refers to a conducting path consisting of a flat, narrow conductive path .
  • the inventive system is a sheet-fed system designed to print multilayer PCBs using a novel conductive ink.
  • This ink is printed onto standard commercial thin insulator sheets which are widely used in the PCB industry, such as Epoxy, FR4, Polyamides, Kapton and others.
  • the system consists of several 'stations' each performing a certain operation, in the manner of an automated assembly line.
  • a drilling station, a stacking unit, a patterning station and a sintering zone are illustrated schematically in Fig. 1.
  • the feeder 101 containing multiple single-layer sheets feeds out a single PCB substrate layer 102, using roller 103 to pay out the new single PCB layer.
  • the drilling station 104 is used to form holes through single or multiple PCB layers 102 and thus allows for creation of vias.
  • the drilling station 104 is fed, either manually or automatically, with a single sheet per layer. This sheet is aligned (mechanically, optically, or otherwise) and vias (at this point simply holes, until the sheet is attached to other layers) are drilled according to their coordinates in a Gerber (or any other format) file of the layer.
  • An automatic optical inspection camera inspects the surface of the sheet upon conclusion of the drilling step, to verify the vias' integrity .
  • the mechanical drilling apparatus may be replaced by a laser drill to allow faster performance as well as smaller via dimensions .
  • the stacking unit 109 aligns and attach a drilled substrate 102 on the multilayer PCB substrate 110.
  • the multilayer PCB substrate 110 is formed from several individual layers such as 102, glued or otherwise attached to one another.
  • the conductor patterning station has two individual conductor component dispensers 105, 106 adapted to form highly conductive traces as described above, namely by dispensing a first layer (e.g. from dispenser 105), sintering it (at the next station) , and then laying down a second layer (e.g. from dispenser 106) that largely fills the porosities of the first layer.
  • the sintering station 107 allows for partially melting the conductive components laid down by the patterning station .
  • the substrate layer 102 and multilayered PCB 110 are shuttled between these various stations: drilled, stacked successively, covered with conductive paths, and sintered to form multilayer PCBsllO.
  • Fig. 2a-i The transport of the substrate between processing stations is shown schematically in Fig. 2a-i, where the successive positions of the single substrate layer 102 are shown in representative individual steps a-i.
  • the single sheet 102 is aligned with previously- processed layers 110 (assuming there are such) , in one embodiment making use of the drill pattern either mechanically or by an automatic optical system (or both) to ensure tight registration.
  • the single sheets 102 can be glued on top of previous finished layers of the processed PCB 110 either by means of thin, high temperature-compatible adhesive film (such as 3M VHB Adhesive Transfer Tape) or by means of hot-press to a prepreg intermediate layer. Pressure is applied mechanically with a roller 109 or by any other means.
  • the roller can be either cold or hot. This gluing step may be accomplished at the same station as one of the other steps, or at a dedicated station.
  • the gluing can be done in two steps. In such embodiments, a first 'soft' gluing is performed during the layering of the PCB stack 110, and a final 'hard' gluing is performed after all layers are stacked.
  • a dedicated gluing station be employed to bind the new top layer 102 to the extant processed layers 110, as shown in Figs. 1,2.
  • the conductive route patterning devices (which typically comprise a dispenser, inkjet head or any other suitable kind of injection device) then applies the conductive ink according to the patterning process to be described in detail below.
  • This step includes deposition of traces, vias, pads etc.
  • the printing algorithm can be line by line (raster) , vector, or any other method depending on the device mobility (i.e. whether the patterning device is mounted on a scanner, articulated arm or other motion assembly) .
  • the inventive process involves deposition of two
  • each ink in some embodiments has its own nozzle and cartridge, with the deposited layer paths being aligned to within a fine tolerance.
  • these two steps may be
  • the conductive ink is sintered at the sintering station 107 as in 2e. Then the layer is
  • next sheet is dispensed (Fig. 2h) , drilled (Fig. 2i) and then as before is aligned and attached on top of the already-processed PCB stack by means of a thin adhesive material or by a thin prepreg layer. Then, the next conductive features are printed at the patterning station according to the layout of the next sheet. This process is repeated N times (for a multilayer PCB of N layers) until the last (top) layer is fully printed and sintered.
  • the conductive ink is made by depositing two materials, hereinafter referred to as Ink A and Ink B - one on top of the other, in two steps, as described above and as shown in detail in Fig. 3.
  • the rationale behind this process is to enable a film that is at once thin, highly conductive, and which does not require any high-temperature
  • Ink A determines the physical dimensions of the layer (namely the width and thickness, as well as a degree of conductivity) , and these parameters can be controlled to an extent as will be familiar to one skilled in the art of 3D printing.
  • Ink B provides the high conductivity
  • sintering step may be 20-50 uOhm-cm, and after sintering of the 2 nd layer it has decreased to approx. 10 uOhm-cm. This surprising result will be explained below.
  • Ink A is composed of a mixture of a high melting point metallic powder, such as copper, silver, gold etc., and a low melting point metallic powder, such as zinc, tin, lead, alloys of such metals, etc., plus a flux paste, either organic, inorganic, or a mixture thereof.
  • the ratio of high melting point powder to low melting point powder may vary between 5:1 and 1:5, while the flux content may be 10%-20% by weight.
  • Ink B is a mixture low melting point metallic powder, such as commercial solder alloys etc., and flux paste at an appropriate ratio of 10%-20% by weight.
  • the conductivity of the printed pattern can be estimated as the weighted average of the conductive metal/alloys involved, reduced by the resistances of the mating
  • the patterning process is shown in Fig. 3a-d.
  • a first layer is printed with Ink A (by writing with head A of Figs. 1,2) on the surface of the substrate film (Fig. 3a) .
  • These traces are then sintered by means of an external heating source, such as a radiative heat source (focused IR, halogen lamp, laser beam, etc.) .
  • an external heating source such as a radiative heat source (focused IR, halogen lamp, laser beam, etc.) .
  • a radiative heat source focused IR, halogen lamp, laser beam, etc.
  • a second layer composed of Ink B is applied directly on top of ink A by printing head B, as in Fig. 3c.
  • Ink B melts and is absorbed into the pores of film A to form a more fully solid layer with outer
  • the dimensions of the final conductive layer (A+B) , as well as via filling, are largely determined by the outer dimensions of layer A so long as liquid B does not
  • the ratio between materials A and B on printing is in a range of 1/5 - 5/1; a ratio of 1/1 is a reasonable
  • the second layer serves to fill the open porosities left after sintering of the first layer, thereby dramatically increasing the conductivity of the resulting layer without requiring high sintering temperatures.
  • each sheet is aligned and stacked on top of its preceding (already printed) layer.
  • the final result of this process is shown in detail in the cross section shown in Fig. 4.
  • Printing of a layer begins only after it is stacked upon the preceding layers.
  • the bottom PCB layer 407 has had conductive ink traces 408 deposited on it as described above.
  • An adhesive layer 406 was then glued on top and a second layer 405 attached onto the first layer, after vias such as that shown at 410 were drilled at the drilling station.
  • Conductive ink paths 401 are then deposited and sintered in turn onto the second layer 405 as described above.
  • an adhesive layer 404 is deposited onto the middle PCB layer 405 and a top PCB layer 403 attached, after having been drilled with vias 402; it is then printed with conducting ink and the multilayer PCB is ready for use.
  • Vias 411 passing through the entire stack may be drilled after assembly of all the layers.
  • a high temperature adhesive is used, such as a 3M VHB Adhesive Transfer Tape or others.
  • a thin adhesive layer protected by a Mylar film is applied to the reverse side of each insulator sheet reverse sides.
  • Another alternative for layer adhesion is the use of a pre-impregnated glass-epoxy intermediate layer calledprepreg, that can be placed between 2 adjacent layers and then pressed in the presence of heat.
  • prepreg a series of registration holes and release cuts in the treated sheet are shown. These allow alignment of the sheet to the printing system coordinates and easy removal of the Mylar just before the sheet is attached to the sheet below it in the stack.
  • Such a sheet with a reverse-side Mylar film and an enclosed adhesive, allows for easy handling during drilling of the vias, protects the adhesive layer, and allows easy alignment to the preceding layer before and after removal.
  • the new sheet is attached to the stack in such a way as to ensure smooth, wrinkle-less adhesion.
  • multiple sheets can be drilled and then stacked, while only the last one is printed. This process can be performed manually or automatically.
  • Consumable parts in the system include:
  • Solder masking deposition of an insulator material to ensure that solder drops are confined and don't create a short between two adjacent pads. This also prevents contamination of the top surface.
  • Solder paste printing placing solder paste drops on the pads .
  • Reflow furnace soldering hot air oven with a defined temperature profile (according to the solder used and loaded board heat capacity) to ensure that the components are solidly connected to the board.
  • step 4 the system in accordance with an embodiment of the invention is able to perform all of these steps, or equivalent ones, to allow the creation of a fully assembled board. It is further within provision of the invention to employ a t)ick-arid- place robot to perform step 4 and thereby allow for a full end-to-end PCB prototyping device.
  • solder masking instead of insulator deposition, a thin insulating sheet can be placed on top of the upper layer, in the same way as described for our stacking process (see Fig. 5) .
  • the conductive material described (Fig. 3) is not oxidation prone and contains a significant volume of solder, which enables very good adhesion to the solder in the soldering step. This may eliminate the need for gold or silver coating when using our system.
  • Solder paste printing our system is capable of depositing solder in discrete locations as described in the System section.
  • Placement requires dedicated equipment which may be incorporated in the invention.
  • Reflow the system is capable of creating a well- defined temperature profile using the heater used for the sintering process (Fig. 1) .
  • the PCB can be made flexible. This ultimately depends on the type of adhesive used. Acrylic adhesive will give a flexible PCB while prepreg adhesion will result in a rigid one.
  • Such flexible PCBs will find use in a number of applications such as flexible displays, wearable electronics, hinged or otherwise movable parts, energy harvesting devices, and others.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Dispersion Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Ceramic Engineering (AREA)
  • Nanotechnology (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

A sheet-fed system designed to print multilayer PCBs is introduced. The system consists of four main blocks; a drilling station, a patterning station, a stacking/bonding station, and a sintering zone. The substrate PCB is shuttled between these various stations, to have vias drilled, to be attached to stacks of previously-processed layers, to be covered with conductive paths by means of the aforementioned ink, and to have the ink sintered under a controlled temperature and atmosphere. Patterning is accomplished by means of a novel two-step method involving both high-temperature conductive elements, low- temperature conductive elements, and flux. Two such compositions are successively applied and individually sintered to form a single conductive path; the second application serves to fill the porosities of the first layer. By this method, a highly-conductive trace is obtained without requiring high temperatures, which in turn allows use of common substrates including polymers.

Description

Printing of Multi-Layer Circuits Field of the Invention
This application claims priority from US provisional patent 64/146452 filed 13 April 2015.
The present invention relates generally to the field of multilayer printed circuit boards.
Background of the Invention
Printed circuit boards (hereinafter, PCBs) are the backbone of almost every electronic device. Modern consumer electronics, the automotive industry, medical devices, and industrial equipment of all varieties are controlled to an increasing degree by elect o ic circuits, which in turn require development of tens of thousands of new boards every year. This trend will grow as time-to-market and innovation have become major competitive advantages. Despite this trend, to date there are currently no efficient tools to assist production of reliable PCB prototypes which are required during the validation stages of a new product. In the course of product development, a board designer will typically order 2-3 prototype versions to validate and test the electronic performance of a device. Such prototypes are usually produced either by local small- medium PCB manufacturers or by Far East manufacturers (mainly China) . They offer relatively fast delivery depending on the board complexity, which is mainly related to the number of layers and the circuit density. Such prototypes can be very expensive and may take a few weeks to manufacture . Several attempts to deliver prototype manufacturing solutions such as CNC or Laser based machinery for accurate etching of copper have proved unsuccessful mainly due to their complexity and inability to reliably simulate "real" PCBs . Therefore these methods have not been widely adopted by the industry .
The rapid evolution of 3D printing and additive manufacturing systems during the last few years raises new opportunities. It is more than reasonable to predict that these technologies will produce some innovative solutions in the realm, of PCB and printed electronics manufacturing in the next few years. A few 3D printers featuring conductive inks for simple electronics applications have already appeared but a system that can produce a commercial multilayer PCB prototype using some type of 3D printing technology is still lacking, and would fulfill a long-felt need.
Summary of the Invention
We introduce a sheet-fed system designed to print multilayer PCBs using a novel method. The system consists of four main blocks; a drilling station, a patterning station, a stacking/bonding station, and a sintering zone. The substrate PCB is shuttled between these various stations, to have vias drilled, to be attached to stacks of previously-processed layers, to be covered with conductive paths by means of the aforementioned ink, and to have the ink sintered under a controlled temperature and atmosphere, respectively.
The patterning is accomplished by means of a novel two- step method involving both high-temperature conductive elements, low-temperature conductive elements, and flux. Two such compositions are successively applied and individually sintered to form a single conductive path; the second application serves to fill the porosities of the first layer. By this method, a highly-conductive trace is obtained without requiring high temperatures, which in turn allows use of common substrates including polymers .
The foregoing embodiments of the invention have been described and illustrated in conjunction with systems and methods thereof, which are meant to be merely illustrative, and not limiting. Furthermore just as every particular reference may embody particular methods/systems, yet not require such, ultimately such teaching is meant for all expressions notwithstanding the use of particular embodiments.
Brief Description of the Drawings
Embodiments and features of the present invention are described herein in conjunction with the following drawings :
Figs. 1,2 depict the main system elements and fabrication process flow.
Fig. 3 shows the conductive ink process.
Fig. 4 shows a printed stack of 3 layers (cross section)
Fig. 5 shows a treated sheet cross section and drilled sheet in reverse-side view.
Definitions
Hereinafter, the term 'via' , or 'vertical interconnect access', is an electrical connection between layers in a multi-layer PCB, which travels through the plane of one or more adjacent layers. The term 'blind via' is used to denote a via used to connect an outer PCB layer with at least one inner layer of a multi-layer PCB.
The term 'buried via' refers to a via connecting at least two inner layers of a multi-layer PCB.
The term through-hole refers to a via around a hole passing through all layers of a multilayer PCB.
The term 'trace' or 'signal trace' refers to a conducting path consisting of a flat, narrow conductive path .
Detailed Description of Pre erred Embodiments
The present invention will be understood from the following detailed description of preferred embodiments, which are meant to be descriptive and not limiting. For the sake of brevity, some well-known features, methods, systems, procedures, components, circuits, and so on, are not described in detail.
The inventive system is a sheet-fed system designed to print multilayer PCBs using a novel conductive ink. This ink is printed onto standard commercial thin insulator sheets which are widely used in the PCB industry, such as Epoxy, FR4, Polyamides, Kapton and others.
The system consists of several 'stations' each performing a certain operation, in the manner of an automated assembly line. A drilling station, a stacking unit, a patterning station and a sintering zone are illustrated schematically in Fig. 1.
The feeder 101 containing multiple single-layer sheets feeds out a single PCB substrate layer 102, using roller 103 to pay out the new single PCB layer. The drilling station 104 is used to form holes through single or multiple PCB layers 102 and thus allows for creation of vias.
The drilling station 104 is fed, either manually or automatically, with a single sheet per layer. This sheet is aligned (mechanically, optically, or otherwise) and vias (at this point simply holes, until the sheet is attached to other layers) are drilled according to their coordinates in a Gerber (or any other format) file of the layer.
Different drill diameters are available in order to allow for various via dimensions. An automatic optical inspection camera inspects the surface of the sheet upon conclusion of the drilling step, to verify the vias' integrity .
In some embodiments of the invention, the mechanical drilling apparatus may be replaced by a laser drill to allow faster performance as well as smaller via dimensions .
The stacking unit 109 aligns and attach a drilled substrate 102 on the multilayer PCB substrate 110. The multilayer PCB substrate 110 is formed from several individual layers such as 102, glued or otherwise attached to one another.
The conductor patterning station has two individual conductor component dispensers 105, 106 adapted to form highly conductive traces as described above, namely by dispensing a first layer (e.g. from dispenser 105), sintering it (at the next station) , and then laying down a second layer (e.g. from dispenser 106) that largely fills the porosities of the first layer. The sintering station 107 allows for partially melting the conductive components laid down by the patterning station .
The substrate layer 102 and multilayered PCB 110 are shuttled between these various stations: drilled, stacked successively, covered with conductive paths, and sintered to form multilayer PCBsllO.
The transport of the substrate between processing stations is shown schematically in Fig. 2a-i, where the successive positions of the single substrate layer 102 are shown in representative individual steps a-i. First an individual PCB layer sheet 102 is extruded or rolled from a cartridge into position, Fig. 2a. After the sheet is ready and positioned, it is moved to the drilling station as in Fig. 2b, where it is aligned (registered) and drilled. When the sheet is ready with all the vias drilled and is validated,
The single sheet 102 is aligned with previously- processed layers 110 (assuming there are such) , in one embodiment making use of the drill pattern either mechanically or by an automatic optical system (or both) to ensure tight registration. Except for the case of the very first sheet, the single sheets 102 can be glued on top of previous finished layers of the processed PCB 110 either by means of thin, high temperature-compatible adhesive film (such as 3M VHB Adhesive Transfer Tape) or by means of hot-press to a prepreg intermediate layer. Pressure is applied mechanically with a roller 109 or by any other means. The roller can be either cold or hot. This gluing step may be accomplished at the same station as one of the other steps, or at a dedicated station. In one embodiment of the invention, the gluing can be done in two steps. In such embodiments, a first 'soft' gluing is performed during the layering of the PCB stack 110, and a final 'hard' gluing is performed after all layers are stacked.
It is within provision of the invention that a dedicated gluing station be employed to bind the new top layer 102 to the extant processed layers 110, as shown in Figs. 1,2.
The conductive route patterning devices, (which typically comprise a dispenser, inkjet head or any other suitable kind of injection device) then applies the conductive ink according to the patterning process to be described in detail below. This step includes deposition of traces, vias, pads etc. The printing algorithm can be line by line (raster) , vector, or any other method depending on the device mobility (i.e. whether the patterning device is mounted on a scanner, articulated arm or other motion assembly) .
The inventive process involves deposition of two
conductive inks, overlaid in two steps. Thus each ink (in some embodiments) has its own nozzle and cartridge, with the deposited layer paths being aligned to within a fine tolerance. Alternatively, these two steps may be
consolidated into one step, for instance with different compositions being extruded from a single printhead, or by use of two passes of the same composition extruded from a single printhead.
After deposition of all the conductive features of a layer as in Fig. 2d, the conductive ink is sintered at the sintering station 107 as in 2e. Then the layer is
returned to the patterning station 105,106 for the second layer of conductive ink to be deposited, as in Fig. 2f. Subsequently it is returned for a second sintering step, Fig. 2g.
The next sheet is dispensed (Fig. 2h) , drilled (Fig. 2i) and then as before is aligned and attached on top of the already-processed PCB stack by means of a thin adhesive material or by a thin prepreg layer. Then, the next conductive features are printed at the patterning station according to the layout of the next sheet. This process is repeated N times (for a multilayer PCB of N layers) until the last (top) layer is fully printed and sintered.
When the last layer has been stacked, printed and
sintered, an additional layer after drilling is attached, acting as a solder mask for the component assembly stage. Upon completion, the entire stack is transferred back to the drilling station and the board is cut to its final external dimensions.
Additional finishing steps such as silk printing, legend printing and solder mask printing can be further
incorporated either offline or in-line with this system.
Conductive ink and patterning process
The conductive ink is made by depositing two materials, hereinafter referred to as Ink A and Ink B - one on top of the other, in two steps, as described above and as shown in detail in Fig. 3. The rationale behind this process is to enable a film that is at once thin, highly conductive, and which does not require any high-temperature
processing .
Ink A determines the physical dimensions of the layer (namely the width and thickness, as well as a degree of conductivity) , and these parameters can be controlled to an extent as will be familiar to one skilled in the art of 3D printing. Ink B provides the high conductivity
properties while maintaining the structure defined by Ink A. As an example, the resistivity after the first
sintering step may be 20-50 uOhm-cm, and after sintering of the 2ndlayer it has decreased to approx. 10 uOhm-cm. This surprising result will be explained below.
Ink A is composed of a mixture of a high melting point metallic powder, such as copper, silver, gold etc., and a low melting point metallic powder, such as zinc, tin, lead, alloys of such metals, etc., plus a flux paste, either organic, inorganic, or a mixture thereof. The ratio of high melting point powder to low melting point powder may vary between 5:1 and 1:5, while the flux content may be 10%-20% by weight.
Ink B is a mixture low melting point metallic powder, such as commercial solder alloys etc., and flux paste at an appropriate ratio of 10%-20% by weight.
Sintering powders made of materials with high electrical conductivity, such as copper or silver, on a polymeric substrate is impossible due to temperature limitations of the polymer, which will decompose at relatively low temperature. Lowering the sintering temperature can be achieved by mixing such powder with a low melting point powder such as tin alloy. However, when such sintering is done without applying pressure, the layers obtained are highly porous and their conductivity is poor. In order to lower the porosity to a minimum, the second step of the invention is applied. Densification is obtained in a capillary flow manner by melting a metal with a low melting point, such as solder alloy, over the sintered porous first layer. As in other soldering processes, use of flux is desirable to ensure the wetting of the two materials. The second layer effectively 'fills the gaps' left in the first layer, thus achieving a far higher level of conductivity without requiring high sintering
temperatures .
The conductivity of the printed pattern can be estimated as the weighted average of the conductive metal/alloys involved, reduced by the resistances of the mating
surfaces .
The patterning process is shown in Fig. 3a-d. The
patterning process proceeds as follows: a first layer is printed with Ink A (by writing with head A of Figs. 1,2) on the surface of the substrate film (Fig. 3a) . These traces are then sintered by means of an external heating source, such as a radiative heat source (focused IR, halogen lamp, laser beam, etc.) . On hardening, Ink A transforms into a somewhat conductive, porous film as in Fig. 3b.
Then, a second layer composed of Ink B is applied directly on top of ink A by printing head B, as in Fig. 3c. Upon heating, Ink B melts and is absorbed into the pores of film A to form a more fully solid layer with outer
dimensions determined by ink A (very similar to the way a sponge absorbs water), as shown in Fig. 3d.
The dimensions of the final conductive layer (A+B) , as well as via filling, are largely determined by the outer dimensions of layer A so long as liquid B does not
overfill the pores of layer A. The ratio between materials A and B on printing is in a range of 1/5 - 5/1; a ratio of 1/1 is a reasonable
example .
The second layer serves to fill the open porosities left after sintering of the first layer, thereby dramatically increasing the conductivity of the resulting layer without requiring high sintering temperatures.
The stacking process
As described above, after the drilling processes is completed, each sheet is aligned and stacked on top of its preceding (already printed) layer. The final result of this process is shown in detail in the cross section shown in Fig. 4. Printing of a layer begins only after it is stacked upon the preceding layers. Here the bottom PCB layer 407 has had conductive ink traces 408 deposited on it as described above. An adhesive layer 406 was then glued on top and a second layer 405 attached onto the first layer, after vias such as that shown at 410 were drilled at the drilling station. Conductive ink paths 401 are then deposited and sintered in turn onto the second layer 405 as described above. Once again an adhesive layer 404 is deposited onto the middle PCB layer 405 and a top PCB layer 403 attached, after having been drilled with vias 402; it is then printed with conducting ink and the multilayer PCB is ready for use.
Vias 411 passing through the entire stack may be drilled after assembly of all the layers.
In order to promote good adhesion between two adjacent layers during the entire manufacturing process and during the reflow process thereafter, by which electrical components are soldered to the PCB, a high temperature adhesive is used, such as a 3M VHB Adhesive Transfer Tape or others. In one embodiment, a thin adhesive layer protected by a Mylar film is applied to the reverse side of each insulator sheet reverse sides. Another alternative for layer adhesion is the use of a pre-impregnated glass-epoxy intermediate layer calledprepreg, that can be placed between 2 adjacent layers and then pressed in the presence of heat. In Fig. 5 a series of registration holes and release cuts in the treated sheet are shown. These allow alignment of the sheet to the printing system coordinates and easy removal of the Mylar just before the sheet is attached to the sheet below it in the stack.
Such a sheet, with a reverse-side Mylar film and an enclosed adhesive, allows for easy handling during drilling of the vias, protects the adhesive layer, and allows easy alignment to the preceding layer before and after removal. The new sheet is attached to the stack in such a way as to ensure smooth, wrinkle-less adhesion. In case a thicker insulating layer is required, multiple sheets can be drilled and then stacked, while only the last one is printed. This process can be performed manually or automatically.
Consumable parts in the system include:
1. The ink cartridges (inks A and B)
2. The sheets (various materials, with adhesive, Mylar, holes and release cuts)
Board Finishing In the traditional multilayer PCB process, a bare board undergoes several finishing processes to ensure successful component placement and attachment via solder reflow. The main process steps involved are:
1. Solder masking: deposition of an insulator material to ensure that solder drops are confined and don't create a short between two adjacent pads. This also prevents contamination of the top surface.
2. Gold or Silver coating on the exposed pads to ensure good solder-ability to the underlying copper (which oxidizes otherwise) .
3. Solder paste printing: placing solder paste drops on the pads .
4. Component placement according to the layout - usually done by a robot.
5. Reflow furnace soldering: hot air oven with a defined temperature profile (according to the solder used and loaded board heat capacity) to ensure that the components are solidly connected to the board.
With the exception of step 4, the system in accordance with an embodiment of the invention is able to perform all of these steps, or equivalent ones, to allow the creation of a fully assembled board. It is further within provision of the invention to employ a t)ick-arid- place robot to perform step 4 and thereby allow for a full end-to-end PCB prototyping device.
1. Solder masking: instead of insulator deposition, a thin insulating sheet can be placed on top of the upper layer, in the same way as described for our stacking process (see Fig. 5) . 2. The conductive material described (Fig. 3) is not oxidation prone and contains a significant volume of solder, which enables very good adhesion to the solder in the soldering step. This may eliminate the need for gold or silver coating when using our system.
3. Solder paste printing: our system is capable of depositing solder in discrete locations as described in the System section.
4. Placement: requires dedicated equipment which may be incorporated in the invention.
5. Reflow: the system is capable of creating a well- defined temperature profile using the heater used for the sintering process (Fig. 1) .
It is within provision of the invention that the PCB can be made flexible. This ultimately depends on the type of adhesive used. Acrylic adhesive will give a flexible PCB while prepreg adhesion will result in a rigid one.
Such flexible PCBswill find use in a number of applications such as flexible displays, wearable electronics, hinged or otherwise movable parts, energy harvesting devices, and others.
The foregoing description and illustrations of the embodiments of the invention has been presented for the purposes of illustration. It is not intended to be exhaustive or to limit the invention to the above description in any form.
Any term that has been defined above and used in the claims, should be interpreted according to this definition .
The reference numbers in the claims are not a part of the claims, but rather used for facilitating the reading thereof. These reference numbers should not be interpreted as limiting the claims in any form.

Claims

Claims
1. An end to end system for multi-layer PCB production comprising: a. an insulator PCB layer magazine adapted to release single insulator layers; b. a drilling station adapted to drill through-holes in said single insulator layers at precise positions; c. verification means adapted to confirm the correct placement and size of said through-holes; e. an attachment station adapted to register and attach said single insulator layer to the top of any previous layers; d. a patterning station adapted to extrude one or more of a
plurality of conductive ink compositions onto said top insulator layer; e. a sintering station adapted to sinter said conductive ink compositions ; f. and, transport means adapted to transport said insulator layers between said stations; characterized in that multilayer PCBs are produced including vias and highly conductive paths.
2. The system of claim 1 wherein said conductive ink compositions comprise a first composition and a second composition, said first composition being composed of a mixture of a high-melting-point metallic powder, a low-melting-point metallic powder, and flux paste, and said second composition being a mixture of a low melting point metallic powder and flux paste, the weight ratio of said high melting point powder to low melting point powder being between the ratios 5:1 and 1:5, and the content of said flux paste being 10%-20% by weight.
3. The system of claim 1 wherein said verification means comprises optical registration means.
4. The system of claim 1 wherein said drilling station is selected from the group consisting of: mechanical drilling; laser drilling; and ultrasonic drilling.
5. The system of claim 1 wherein said drilling and patterning stations employ positioning means selected from the group consisting of : x-y stage; articulated arm; and delta-positioning system.
6. A method for deposition and patterning of highly conductive ink on insulating materials comprising steps of: a. providing a single PCB layer at a predetermined position; b. drilling a set of holes of predetermined positions and diameters in said PCB layer; c. depositing a first conductive ink trace layer onto said PCB layer; d. sintering said first conductive ink trace layer; e. depositing a second conductive ink trace layer onto said first ink trace layer; f. sintering said second conductive ink trace layer; g. repeating steps a-f, and attaching each PCB layer to those layers already processed by means of an adhesive layer.
7. The method of claim 6 further comprising a method for via patterning including blind, buried and through hole vias comprising steps of drilling via holes in single PCB layers, attaching said layers to already-processed stacks of such PCB layers, and adding conductive traces to said layers including filling of said holes with conductive material.
8. The method of claim 6 further comprising a process for multilayer stacking consisting of steps: a. attaching a high temperature thin adhesive layer protected by a Mylar film to the reverse side of each insulator sheet, drilling
registration holes and release cuts in the treated sheet are shown; b. aligning said the sheet to the printing system coordinates; c. removing said Mylar film before said sheet is attached to the sheet below it in the stack.
9. The process of claim 8 wherein said high temperature adhesive is a 3M VHB Adhesive Transfer Tape or prepreg material.
10. A set of compositions for depositing two-layer conductive traces comprising a first and second composition, said first composition being composed of a mixture of a high-melting-point metallic powder, a low- melting-point metallic powder, and flux paste, said second composition being a mixture of a low melting point metallic powder and flux paste, the weight ratio of said high melting point powder to low melting point powder being between the ratios 5:1 and 1:5, and the flux content being 10%-20% by weight.
PCT/IL2016/050382 2015-04-13 2016-04-12 Printing of multi-layer circuits WO2016166751A1 (en)

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US20180114703A1 (en) 2018-04-26
EP3284326A4 (en) 2019-04-24

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