WO2016165542A1 - Method for analyzing cache hit rate, and device - Google Patents

Method for analyzing cache hit rate, and device Download PDF

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WO2016165542A1
WO2016165542A1 PCT/CN2016/077301 CN2016077301W WO2016165542A1 WO 2016165542 A1 WO2016165542 A1 WO 2016165542A1 CN 2016077301 W CN2016077301 W CN 2016077301W WO 2016165542 A1 WO2016165542 A1 WO 2016165542A1
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data
cache
events
read failure
event
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杨成虎
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阿里巴巴集团控股有限公司
杨成虎
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation

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  • the purpose of the present application is to provide a method and device for analyzing cache hit ratio, which can obtain an accurate reason for low cache hit ratio.
  • the present application provides a method for analyzing a cache hit ratio, which includes:
  • the reason for the low data hit hit rate is determined according to the cumulative number of read failure events and other cache events of each data in the event record of the acquired similar data, including:
  • the event record of the same type of data that the sum of the cache read failure events is higher than the first preset threshold is obtained, including:
  • a first device configured to acquire an event record of the same type of data whose cache read failure event is higher than a first preset threshold
  • the other cache events include one or any combination of a delete event, a write event, and a retirement event.
  • the second device is configured to: when the cumulative number of deletion events and read failure events of a certain data is greater than a second preset threshold, and the difference between the cumulative number of deletion events and the cumulative number of read failure events If the value is less than the third preset threshold, it is determined that the data cache hit rate is low because the data is actively deleted.
  • the second device is configured to: when the cumulative number of the elimination events and the read failure events of the certain data are greater than the sixth preset threshold, and the difference between the cumulative number of the eliminated events and the accumulated number of the read failure events If the value is less than the seventh preset threshold, it is determined that the data cache hit rate is low because the cache capacity is insufficient.
  • the second device is configured to: when the cumulative number of write events and read failure events of a certain data is less than an eighth preset threshold, and the cumulative number of write events and the cumulative number of read failure events If the difference is less than the ninth preset threshold, it is determined that the data cache hit rate is low because the accessed data has no hotspot.
  • the first four modules are used to calculate the total number of cache read failure events of each type of data
  • the first module includes:
  • the first one or two units are used to calculate the cumulative number of cache read failure events and other cache events for each data.
  • the present application generates a graph according to the total number of read failure events and other cache events in the event record of the same type of data obtained, which can be generated according to the generated graph. More intuitively, the reason for the low hit rate.
  • FIG. 8 is a block diagram showing an apparatus for cache hit ratio analysis according to another preferred embodiment of the present application.
  • the terminal, the device of the service network, and the trusted party each include one or more processors (CPUs), input/output interfaces, network interfaces, and memory.
  • processors CPUs
  • input/output interfaces network interfaces
  • memory volatile and non-volatile memory
  • the accessed data does not exist: the data does not exist in the entire business system and must not be hit.
  • Each of the data can be searched according to the corresponding Key, and Key is a unique index of the data in the cache, and is not repeated in the same cache system.
  • the threshold is set, it is determined that the data cache hit rate is low because the accessed data does not exist. For example, for the data in Table 1 whose key is misc_foot, or a set of event data of the same type with Key as the token_ prefix, here, the data of the key for misc_foot has only one type of data, namely itself, but it is read.
  • the data can be effectively determined according to the combination of the cumulative number of read failure events (GetMiss) of each data and at least one of the cumulative number of delete events (DeleteExist), write events (SetNotExist), and elimination events (Evict).
  • GetMiss the cumulative number of read failure events
  • DeleteExist the cumulative number of delete events
  • SetNotExist write events
  • Elit elimination events
  • the second threshold, the fourth threshold, and the sixth threshold may be set to the same value.
  • the Key in the cache system generally has prefix consistency, that is, the same type of function is expressed by the same prefix to distinguish: for example, session_312312, session_888544, item_box111, item_box222, therefore, as shown in FIG. 5, according to Key's lexicographic order arranges the data and condenses the same business function, that is, the same type of data color blocks.
  • the color block with a low hit rate is determined, and then the color block with a low hit rate is determined according to each color.
  • the cumulative number of other cache events on the block labeled with the color block can easily find the reason for the low hit rate.
  • the present application generates a graph according to the total number of read failure events and other cache events in the event record of the same type data obtained by the present application, and can more intuitively obtain the reason of the low hit rate according to the generated graph.
  • the present application can be implemented in software and/or a combination of software and hardware, for example, using an application specific integrated circuit (ASIC), a general purpose computer, or any other similar hardware device.
  • the software program of the present application can be executed by a processor to implement the steps or functions described above.
  • the software programs (including related data structures) of the present application can be stored in a computer readable recording medium such as a RAM memory, a magnetic or optical drive or a floppy disk and the like.
  • some of the steps or functions of the present application may be implemented in hardware, for example, as a circuit that cooperates with a processor to perform various steps or functions.

Abstract

The present application provides a method for analyzing a cache hit rate, and a device. In the present application, data of a low cache hit rate is obtained according to the total number of times of data cache read failure events, and a cause of the low cache hit rate can be effectively determined according the total quantity of the data read failure events for the low cache hit rate and the other cache events, thereby improving the quality of cache codes according to the cause, and improving the performance of the whole system.

Description

缓存命中率分析的方法及设备Method and device for analyzing cache hit rate 技术领域Technical field
本申请涉及通信及计算机领域,尤其涉及一种缓存命中率分析的方法及设备。The present application relates to the field of communications and computers, and in particular, to a method and device for analyzing cache hit ratio.
背景技术Background technique
缓存(cache)是一种临时存储数据的系统,缓存与数据库(DB)、文件系统等存储系统的区别在于,容量有限,价格贵,掉电即丢失,但访问速度快,写入速度快。缓存常常作为系统的数据缓冲,将频繁访问的数据放入缓存中,避免多次到数据库,或者文件系统的施行慢访问。在缓存系统中的一个核心指标为命中率(hit rate),命中率等于读取请求返回存在的次数/总共的读取次数。其中,命中(hit)是指读取某一数据时,假若该数据存在,则是命中;非命中(miss)是指读取某一数据时,假若该数据不存在,则是非命中。Cache is a system for temporarily storing data. The difference between cache and database (DB), file system and other storage systems is that the capacity is limited, the price is expensive, and the power loss is lost, but the access speed is fast and the writing speed is fast. Cache is often used as a data buffer for the system, putting frequently accessed data into the cache, avoiding multiple visits to the database, or slow access to the file system. One of the core metrics in the cache system is the hit rate, which is equal to the number of times the read request returns to exist/the total number of reads. Among them, a hit refers to a hit when reading a certain data, and a hit if the data exists; a miss means that when a certain data is read, if the data does not exist, it is a non-hit.
缓存命中率的高低与用户的使用逻辑关系密切。当命中率低时,是不能提升系统的性能的,所以命中率的高低直接影响系统的响应时间和整体吞吐量。而关于如何提升命中率,目前没有有效的量化方式,现有的判断方式,基本是基于开发人员对代码的理解,业务结构的熟悉成度,人为判断命中率低的原因,再进行试验验证,只能通过人为经验判断,没有可依赖的工具。The cache hit rate is closely related to the user's usage logic. When the hit rate is low, the performance of the system cannot be improved, so the hit rate directly affects the response time and overall throughput of the system. As for how to improve the hit rate, there is currently no effective quantitative method. The existing judgment method is basically based on the developer's understanding of the code, the familiarity of the business structure, and the reason for the low judgment of the man-made rate. It can only be judged by human experience and there is no tool to rely on.
发明内容Summary of the invention
本申请的目的是提供一种缓存命中率分析的方法及设备,能够得到精确的缓存命中率低的原因。The purpose of the present application is to provide a method and device for analyzing cache hit ratio, which can obtain an accurate reason for low cache hit ratio.
有鉴于此,本申请提供一种缓存命中率分析的方法,其中,包括: In view of this, the present application provides a method for analyzing a cache hit ratio, which includes:
获取缓存读取失败事件的总和次数高于第一预设阈值的同类数据的事件记录;Obtaining an event record of the same type of data whose cache read failure event is higher than the first preset threshold;
根据获取到的同类数据的事件记录中每个数据的读取失败事件和其它缓存事件的累计数量确定该数据缓存命中率低的原因。The reason why the data cache hit rate is low is determined according to the cumulative number of read failure events and other cache events of each data in the event record of the acquired similar data.
进一步的,所述其它缓存事件包括删除事件、写入事件和淘汰事件中的一种或任意组合。Further, the other cache events include one or any combination of a delete event, a write event, and a retirement event.
进一步的,根据获取到的同类数据的事件记录中每个数据的读取失败事件和其它缓存事件的累计数量确定该数据缓存命中率低的原因,包括:Further, the reason for the low data hit hit rate is determined according to the cumulative number of read failure events and other cache events of each data in the event record of the acquired similar data, including:
当某个数据的删除事件和读取失败事件的累计数量均大于第二预设阈值,且删除事件的累计数量与读取失败事件的累计数量的差值小于第三预设阈值,则确定该数据缓存命中率低的原因为数据被主动删除。When the cumulative number of deletion events and read failure events of a certain data is greater than a second preset threshold, and the difference between the cumulative number of deletion events and the cumulative number of read failure events is less than a third preset threshold, determining The reason for the low data cache hit rate is that the data is actively deleted.
进一步的,根据获取到的同类数据的事件记录中每个数据的读取失败事件和其它缓存事件的累计数量确定该数据缓存命中率低的原因,包括:Further, the reason for the low data hit hit rate is determined according to the cumulative number of read failure events and other cache events of each data in the event record of the acquired similar data, including:
当某个数据的读取失败事件的累计数量大于第四预设阈值,且读取失败事件的累计数量与写入事件的累计数量的差值大于第五预设阈值,则确定该数据缓存命中率低的原因为访问的数据不存在。When the accumulated number of read failure events of a certain data is greater than a fourth preset threshold, and the difference between the cumulative number of read failure events and the accumulated number of write events is greater than a fifth preset threshold, determining that the data cache hits The reason for the low rate is that the accessed data does not exist.
进一步的,根据获取到的同类数据的事件记录中每个数据的读取失败事件和其它缓存事件的累计数量确定该数据缓存命中率低的原因,包括:Further, the reason for the low data hit hit rate is determined according to the cumulative number of read failure events and other cache events of each data in the event record of the acquired similar data, including:
当某个数据的淘汰事件和读取失败事件的累计数量均大于第六预设阈值,且淘汰事件的累计数量和读取失败事件的累计数量的差值小于第七预设阈值,则确定该数据缓存命中率低的原因为缓存容量不足。When the cumulative number of the defunct event and the read failure event of a certain data is greater than the sixth preset threshold, and the difference between the cumulative number of the culling event and the accumulated number of the read failure event is less than the seventh preset threshold, determining the The reason for the low data cache hit rate is that the cache capacity is insufficient.
进一步的,根据获取到的同类数据的事件记录中每个数据的读取失败事件和其它缓存事件的累计数量确定该数据缓存命中率低的原因,包括:Further, the reason for the low data hit hit rate is determined according to the cumulative number of read failure events and other cache events of each data in the event record of the acquired similar data, including:
当某个数据的写入事件和读取失败事件的累计数量均小于第八预设阈值,且写入事件的累计数量与读取失败事件的累计数量差值小于第九预设阈值,则确定该数据缓存命中率低的原因为访问的数据不具有热点性。 When the cumulative number of the write event and the read failure event of a certain data is less than the eighth preset threshold, and the difference between the accumulated number of the write event and the accumulated number of the read failure event is less than the ninth preset threshold, then determining The reason why the data cache hit rate is low is that the accessed data is not hot.
进一步的,获取缓存读取失败事件的总和次数高于第一预设阈值的同类数据的事件记录,包括:Further, the event record of the same type of data that the sum of the cache read failure events is higher than the first preset threshold is obtained, including:
获取每个数据的缓存读取失败事件和其它缓存事件的累计数量;Get the cumulative number of cache read failure events and other cache events for each data;
从所有数据中筛选出读取失败事件的累计数量大于第十预设阈值的数据;Filtering data from all the data that the cumulative number of read failure events is greater than the tenth preset threshold;
按预设分类标准将筛选出的每个数据分到对应的类;Each of the filtered data is assigned to a corresponding class according to a preset classification criterion;
计算每一同类数据的缓存读取失败事件的总和次数;Calculate the total number of cache read failure events for each type of data;
获取缓存读取失败事件的总和次数高于第一预设阈值的同类数据的事件记录,其中,所述同类数据的事件记录包括该类数据中每个数据的读取失败事件和其它缓存事件的累计数量。Obtaining an event record of the same type of data whose sum of cache read failure events is higher than a first preset threshold, wherein the event record of the same type of data includes a read failure event of each data in the type of data and other cache events The cumulative quantity.
进一步的,获取每个数据的缓存读取失败事件和其它缓存事件的累计数量,包括:Further, the cumulative number of cache read failure events and other cache events for each data is obtained, including:
通过回调接口获取每个数据的缓存读取失败事件或其它缓存事件,所述回调接口设置于缓存代码的事件路径上;Obtaining a cache read failure event or other cache event for each data through a callback interface, the callback interface being disposed on an event path of the cache code;
计算每个数据的缓存读取失败事件和其它缓存事件的累计数量。Calculates the cumulative number of cache read failure events and other cache events for each data.
进一步的,所述预设分类标准包括按数据的功能或按数据的唯一标识进行分类。Further, the preset classification criteria include classification according to a function of data or a unique identifier of data.
进一步的,根据获取到的同类数据的事件记录中每个数据的读取失败事件和其它缓存事件的累计数量确定该数据缓存命中率低的原因,包括:Further, the reason for the low data hit hit rate is determined according to the cumulative number of read failure events and other cache events of each data in the event record of the acquired similar data, including:
将获取到的同类数据的事件记录中所有数据按读取失败事件和其它缓存事件的累计数量的大小生成图表;All the data in the event record of the acquired similar data is generated according to the size of the cumulative number of read failure events and other cache events;
根据所述图表确定缓存命中率低的原因。The reason for the low cache hit ratio is determined based on the chart.
根据本申请的另一方面还提供一种用于缓存命中率分析的设备,包括:According to another aspect of the present application, there is also provided an apparatus for cache hit ratio analysis, comprising:
第一装置,用于获取缓存读取失败事件的总和次数高于第一预设阈值的同类数据的事件记录;a first device, configured to acquire an event record of the same type of data whose cache read failure event is higher than a first preset threshold;
第二装置,用于根据获取到的同类数据的事件记录中每个数据的读取 失败事件和其它缓存事件的累计数量确定该数据缓存命中率低的原因。a second device for reading each data in the event record according to the acquired similar data The cumulative number of failed events and other cached events determines why the data cache hit rate is low.
进一步的,所述其它缓存事件包括删除事件、写入事件和淘汰事件中的一种或任意组合。Further, the other cache events include one or any combination of a delete event, a write event, and a retirement event.
进一步的,所述第二装置,用于当某个数据的删除事件和读取失败事件的累计数量均大于第二预设阈值,且删除事件的累计数量与读取失败事件的累计数量的差值小于第三预设阈值,则确定该数据缓存命中率低的原因为数据被主动删除。Further, the second device is configured to: when the cumulative number of deletion events and read failure events of a certain data is greater than a second preset threshold, and the difference between the cumulative number of deletion events and the cumulative number of read failure events If the value is less than the third preset threshold, it is determined that the data cache hit rate is low because the data is actively deleted.
进一步的,所述第二装置,用于当某个数据的读取失败事件的累计数量大于第四预设阈值,且读取失败事件的累计数量与写入事件的累计数量的差值大于第五预设阈值,则确定该数据缓存命中率低的原因为访问的数据不存在。Further, the second device is configured to: when the cumulative number of read failure events of a certain data is greater than a fourth preset threshold, and the difference between the cumulative number of read failure events and the accumulated number of write events is greater than The five preset thresholds determine that the data cache hit rate is low because the accessed data does not exist.
进一步的,所述第二装置,用于当某个数据的淘汰事件和读取失败事件的累计数量均大于第六预设阈值,且淘汰事件的累计数量和读取失败事件的累计数量的差值小于第七预设阈值,则确定该数据缓存命中率低的原因为缓存容量不足。Further, the second device is configured to: when the cumulative number of the elimination events and the read failure events of the certain data are greater than the sixth preset threshold, and the difference between the cumulative number of the eliminated events and the accumulated number of the read failure events If the value is less than the seventh preset threshold, it is determined that the data cache hit rate is low because the cache capacity is insufficient.
进一步的,所述第二装置,用于当某个数据的写入事件和读取失败事件的累计数量均小于第八预设阈值,且写入事件的累计数量与读取失败事件的累计数量差值小于第九预设阈值,则确定该数据缓存命中率低的原因为访问的数据不具有热点性。Further, the second device is configured to: when the cumulative number of write events and read failure events of a certain data is less than an eighth preset threshold, and the cumulative number of write events and the cumulative number of read failure events If the difference is less than the ninth preset threshold, it is determined that the data cache hit rate is low because the accessed data has no hotspot.
进一步的,所述第一装置包括:Further, the first device includes:
第一一模块,用于获取每个数据的缓存读取失败事件和其它缓存事件的累计数量;The first module is configured to obtain a cumulative number of cache read failure events and other cache events for each data;
第一二模块,用于从所有数据中筛选出读取失败事件的累计数量大于第十预设阈值的数据;The first two modules are configured to filter, from all data, data that the cumulative number of read failure events is greater than a tenth preset threshold;
第一三模块,用于按预设分类标准将筛选出的每个数据分到对应的类;The first three modules are configured to classify each of the filtered data into corresponding classes according to a preset classification criterion;
第一四模块,用于计算每一同类数据的缓存读取失败事件的总和次数; The first four modules are used to calculate the total number of cache read failure events of each type of data;
第一五模块,用于获取缓存读取失败事件的总和次数高于第一预设阈值的同类数据的事件记录,其中,所述同类数据的事件记录包括该类数据中每个数据的读取失败事件和其它缓存事件的累计数量。a first fifth module, configured to obtain an event record of the same type of data whose cache read failure event is higher than a first preset threshold, wherein the event record of the same type data includes reading of each data in the type of data The cumulative number of failed events and other cached events.
进一步的,所述第一一模块包括:Further, the first module includes:
第一一一单元,用于通过回调接口获取每个数据的缓存读取失败事件或其它缓存事件,所述回调接口设置于缓存代码的事件路径上;a first one unit for obtaining a cache read failure event or other cache event of each data through a callback interface, where the callback interface is disposed on an event path of the cache code;
第一一二单元,用于计算每个数据的缓存读取失败事件和其它缓存事件的累计数量。The first one or two units are used to calculate the cumulative number of cache read failure events and other cache events for each data.
进一步的,所述预设分类标准包括按数据的功能或按数据的唯一标识进行分类。Further, the preset classification criteria include classification according to a function of data or a unique identifier of data.
进一步的,所述第二装置,用于将获取到的同类数据的事件记录中所有数据按读取失败事件和其它缓存事件的累计数量的大小生成图表,根据所述图表确定缓存命中率低的原因。Further, the second device is configured to generate a graph according to the total number of read failure events and other cache events in the event record of the acquired similar data, and determine a cache hit ratio according to the chart. the reason.
与现有技术相比,本申请根据某类数据缓存读取失败事件的总和次数得到存在缓存命中率低的数据,根据存在缓存命中率低的数据的读取失败事件和其它缓存事件的累计数量,可以有效确定缓存命中率低的原因,有助于后续根据该原因改善缓存代码的质量,提升整体系统性能。Compared with the prior art, the present application obtains data with a low cache hit ratio according to the total number of data cache read failure events, and the cumulative number of read failure events and other cache events according to data having a low cache hit ratio. , can effectively determine the reason for the low cache hit rate, help to improve the quality of the cache code and improve the overall system performance.
进一步的,本申请根据可每个数据的读取失败事件(GetMiss)的累计数量与删除事件(DeleteExist)、写入事件(SetNotExist)和淘汰事件(Evict)的累计数量中至少一项的组合即可有效地确定该数据缓存命中率低的原因。Further, the present application is based on a combination of at least one of a cumulative number of read failure events (GetMiss) of each data and a cumulative number of delete events (DeleteExist), write events (SetNotExist), and elimination events (Evict). The reason why the data cache hit rate is low can be effectively determined.
进一步的,本申请通过回调接口能够精确地监听和记录所有数据的事件,后续可根据记录的数据的事件汇总得到每个数据的缓存读取失败事件和其它缓存事件的累计数量。Further, the present application can accurately monitor and record events of all data through a callback interface, and subsequently obtain a cumulative number of cache read failure events and other cache events for each data according to the event of the recorded data.
进一步的,本申请将获取到的同类数据的事件记录中所有数据按读取失败事件和其它缓存事件的累计数量的大小生成图表,可根据生成的图表 更直观地得到命中率低的原因。Further, the present application generates a graph according to the total number of read failure events and other cache events in the event record of the same type of data obtained, which can be generated according to the generated graph. More intuitively, the reason for the low hit rate.
附图说明DRAWINGS
通过阅读参照以下附图所作的对非限制性实施例所作的详细描述,本申请的其它特征、目的和优点将会变得更明显:Other features, objects, and advantages of the present application will become more apparent from the detailed description of the accompanying drawings.
图1示出根据本申请一个方面的缓存命中率分析的方法的流程图;1 shows a flow chart of a method of cache hit ratio analysis in accordance with an aspect of the present application;
图2示出本申请一优选实施例的缓存命中率分析的方法的流程图;2 is a flow chart showing a method of cache hit ratio analysis according to a preferred embodiment of the present application;
图3示出本申请另一优选实施例的缓存命中率分析的方法的流程图;3 is a flow chart showing a method of cache hit ratio analysis of another preferred embodiment of the present application;
图4示出本申请再一优选实施例的缓存命中率分析的方法的流程图;4 is a flow chart showing a method of cache hit ratio analysis in still another preferred embodiment of the present application;
图5示出本申请一实施例的所有数据读取失败事件和其它缓存事件的累计数量的有色图;FIG. 5 is a color diagram showing the cumulative number of all data read failure events and other cache events in an embodiment of the present application; FIG.
图6示出根据本申请另一个方面的用于缓存命中率分析的设备结构图;6 shows a block diagram of a device for cache hit ratio analysis in accordance with another aspect of the present application;
图7示出根据本申请一优选实施例的用于缓存命中率分析的设备结构图;7 shows a structural diagram of a device for cache hit ratio analysis in accordance with a preferred embodiment of the present application;
图8示出根据本申请另一优选实施例的用于缓存命中率分析的设备结构图;FIG. 8 is a block diagram showing an apparatus for cache hit ratio analysis according to another preferred embodiment of the present application; FIG.
附图中相同或相似的附图标记代表相同或相似的部件。The same or similar reference numerals in the drawings denote the same or similar components.
具体实施方式detailed description
在本申请一个典型的配置中,终端、服务网络的设备和可信方均包括一个或多个处理器(CPU)、输入/输出接口、网络接口和内存。In a typical configuration of the present application, the terminal, the device of the service network, and the trusted party each include one or more processors (CPUs), input/output interfaces, network interfaces, and memory.
内存可能包括计算机可读介质中的非永久性存储器,随机存取存储器(RAM)和/或非易失性内存等形式,如只读存储器(ROM)或闪存(flash RAM)。内存是计算机可读介质的示例。The memory may include non-persistent memory, random access memory (RAM), and/or non-volatile memory in a computer readable medium, such as read only memory (ROM) or flash memory. Memory is an example of a computer readable medium.
计算机可读介质包括永久性和非永久性、可移动和非可移动媒体可以 由任何方法或技术来实现信息存储。信息可以是计算机可读指令、数据结构、程序的模块或其他数据。计算机的存储介质的例子包括,但不限于相变内存(PRAM)、静态随机存取存储器(SRAM)、动态随机存取存储器(DRAM)、其他类型的随机存取存储器(RAM)、只读存储器(ROM)、电可擦除可编程只读存储器(EEPROM)、快闪记忆体或其他内存技术、只读光盘只读存储器(CD-ROM)、数字多功能光盘(DVD)或其他光学存储、磁盒式磁带,磁带磁盘存储或其他磁性存储设备或任何其他非传输介质,可用于存储可以被计算设备访问的信息。按照本文中的界定,计算机可读介质不包括非暂存电脑可读媒体(transitory media),如调制的数据信号和载波。Computer readable media includes both permanent and non-permanent, removable and non-removable media Information storage is implemented by any method or technique. The information can be computer readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read only memory. (ROM), electrically erasable programmable read only memory (EEPROM), flash memory or other memory technology, compact disk read only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, A magnetic tape cartridge, magnetic tape storage or other magnetic storage device or any other non-transportable medium that can be used to store information that can be accessed by a computing device. As defined herein, computer readable media does not include non-transitory computer readable media, such as modulated data signals and carrier waves.
如图1所示,本申请提供一种缓存命中率分析的方法,包括:As shown in FIG. 1 , the present application provides a method for analyzing a cache hit ratio, including:
步骤S1,获取缓存读取失败事件的总和次数高于第一预设阈值的同类数据的事件记录;其中,读取失败事件(GetMiss)由用户主动发起的Get请求产生,并且读取结果为不存在,在此,如果缓存读取失败事件的总和次数高于第一预设阈值,则可确定该类数据的缓存命中率低,进而可以在后续步骤中判断该类数据的缓存命中率低的原因;Step S1: Obtain an event record of the same type of data in which the total number of cache read failure events is higher than the first preset threshold; wherein the read failure event (GetMiss) is generated by a Get request initiated by the user, and the read result is not If the sum of the cache read failure events is higher than the first preset threshold, the cache hit ratio of the data may be determined to be low, and the cache hit ratio of the data may be determined in a subsequent step. the reason;
步骤S2,根据获取到的同类数据的事件记录中每个数据的读取失败事件和其它缓存事件的累计数量确定该数据缓存命中率低的原因。在此,某类数据的缓存读取失败事件的总和次数等于该类数据中所有数据的缓存读取失败事件的累计数量的相加之和,影响缓存命中率低的原因基本有如下几个方面的因素:In step S2, the reason why the data cache hit ratio is low is determined according to the cumulative number of read failure events and other cache events of each data in the event record of the acquired similar data. Here, the sum of the cache read failure events of a certain type of data is equal to the sum of the cumulative number of cache read failure events of all the data in the data, and the reasons for the low cache hit ratio are basically as follows. the elements of:
1.缓存容量不足:当容量不足时缓存系统会产生淘汰,导致数据在缓存中的概率降低。虽然缓存系统具有LRU算法尽量保证淘汰的数据为非热点数据,但无法从本质上确保命中率的稳定。在此,淘汰(evict)是指一般缓存系统容量有限,当存储容量不够时,缓存系统会发生淘汰,也就是删除一些数据,以释放空间,删除数据的策略一般采用LRU(Least Recently Used)算 法。其中,LRU算法既近期最少使用算法,其是一种数据结构算法,可以找出最近最少使用的元素,一般用于Cache淘汰策略里,也就是说,将最近最少使用的元素删除,达到释放空间的目的。1. Insufficient cache capacity: When the capacity is insufficient, the cache system will be eliminated, resulting in a lower probability of data being cached. Although the cache system has the LRU algorithm to ensure that the phase-out data is non-hotspot data, it cannot guarantee the stability of the hit rate in essence. Here, the elimination (evict) means that the general cache system has a limited capacity. When the storage capacity is insufficient, the cache system will be eliminated, that is, some data is deleted to release the space. The strategy for deleting data is generally calculated by LRU (Least Recently Used). law. Among them, the LRU algorithm has the least recently used algorithm, which is a data structure algorithm, which can find the least recently used element, which is generally used in the Cache elimination strategy, that is, the least recently used element is deleted to achieve the release space. the goal of.
2.数据被主动删除:按照缓存系统的典型使用场景,数据发生修改或者删除时,需要将缓存内对应的数据删除,下一次访问时必然发生不命中。2. Data is actively deleted: According to the typical usage scenario of the cache system, when the data is modified or deleted, the corresponding data in the cache needs to be deleted, and the next access will inevitably occur.
3.访问的数据不存在:整个业务系统中不具有该数据存在,必然不命中。其中每个数据可以根据对应的Key查找,Key是缓存中数据的唯一索引,同一缓存系统中不会重复。3. The accessed data does not exist: the data does not exist in the entire business system and must not be hit. Each of the data can be searched according to the corresponding Key, and Key is a unique index of the data in the cache, and is not repeated in the same cache system.
4.访问的数据不具有热点性:根据缓存系统的使用方式,第一次访问发现数据不命中时,需要从后端数据源读取数据写入缓存系统中,第二次访问则出现命中,假设极端情况下,每个数据只会被访问一次,那命中率理论数值则为0。本申请根据某类数据缓存读取失败事件的总和次数得到存在缓存命中率低的数据,根据存在缓存命中率低的数据的读取失败事件和其它缓存事件的累计数量,可以有效确定缓存命中率低的原因,有助于后续根据该原因改善缓存代码的质量,提升整体系统性能。4. The accessed data does not have hotspots: according to the usage mode of the cache system, when the first access discovery data is not hit, the data needs to be read from the backend data source to be written into the cache system, and the second access is hit. Assume that in extreme cases, each data will only be accessed once, and the theoretical hit rate is zero. The present application obtains data with a low cache hit ratio according to the total number of data cache read failure events, and can effectively determine the cache hit ratio according to the number of read failure events and other cache events with low cache hit ratio. The low reason helps to improve the quality of the cache code and improve the overall system performance.
本申请的缓存命中率分析的方法一优选的实施例中,所述其它缓存事件包括删除事件(DeleteExist)、写入事件(SetNotExist)和淘汰事件(Evict)中的一种或任意组合。其中,删除事件(DeleteExist)由用户主动发起的Delete请求产生,删除事件中所指定的数据在删除之前是存在的;写入事件(SetNotExist)由用户主动发起的Set请求产生,写入事件中所指定的数据在删除之前不存在;淘汰事件(Evict)是指当缓存容量满时,发生淘汰动作。根据每个数据的读取失败事件(GetMiss)的累计数量与删除事件(DeleteExist)、写入事件(SetNotExist)和淘汰事件(Evict)的累计数量中至少一项的组合即可有效地确定该数据缓存命中率低的原因。本领域技术人员应能理解上述其它缓存事件的描述仅为举例,其他现有的或今后可能出现的其它缓存事件的描述如可适用于本申请,也应包含在本申请保护 范围以内,并在此以引用方式包含于此。In a preferred embodiment of the cache hit ratio analysis of the present application, the other cache events include one or any combination of a delete event (DeleteExist), a write event (SetNotExist), and an eliminator event (Evict). The delete event (DeleteExist) is generated by a user-initiated Delete request, and the data specified in the delete event exists before the deletion; the write event (SetNotExist) is generated by the user-initiated Set request, and is written in the event. The specified data does not exist before deletion; the Evict event refers to the elimination action when the cache capacity is full. The data can be effectively determined according to the combination of the cumulative number of read failure events (GetMiss) of each data and at least one of the cumulative number of delete events (DeleteExist), write events (SetNotExist), and elimination events (Evict). The reason for the low cache hit rate. Those skilled in the art should be able to understand that the descriptions of the other cache events described above are merely examples, and other descriptions of other existing or future cache events may be applicable to the present application, and should also be included in the protection of the present application. It is within the scope and is hereby incorporated by reference.
本申请的缓存命中率分析的方法一优选的实施例中,步骤S2,根据获取到的同类数据的事件记录中每个数据的读取失败事件和其它缓存事件的累计数量确定该数据缓存命中率低的原因,包括:In a preferred embodiment of the cache hit ratio analysis of the present application, in step S2, the data cache hit ratio is determined according to the cumulative number of read failure events and other cache events of each data in the event record of the acquired homogeneous data. Reasons for low, including:
当某个数据的删除事件的累计数量(deleteExistCount)和读取失败事件(getMissCount)的累计数量均大于第二预设阈值,且删除事件的累计数量的累计数量(deleteExistCount)与读取失败事件的累计数量(getMissCount)的差值小于第三预设阈值,则确定该数据缓存命中率低的原因为数据被主动删除。例如,如表1所示,对于Key为MainPage的数据记录,根据MainPage的名称可以确定该Key内容是首页数据,该数据的同类数据只有一个,即其自身,但其单个的读取失败事件的累计数量(getMissCount)比较高为30,说明其是命中率低的数据,再根据其删除事件的累计数量(deleteExistCount)也比较高为30,说明此Key对应数据的修改过于频繁,造成了命中率低。本领域技术人员应能理解上述确定数据缓存命中率低的原因的描述仅为举例,其他现有的或今后可能出现的确定数据缓存命中率低的原因如可适用于本申请,也应包含在本申请保护范围以内,并在此以引用方式包含于此。When the cumulative number of delete events (deleteExistCount) and read failure events (getMissCount) of a certain data are both greater than the second preset threshold, and the cumulative number of delete events (deleteExistCount) and the read failure event If the difference of the accumulated quantity (getMissCount) is less than the third preset threshold, it is determined that the data cache hit rate is low because the data is actively deleted. For example, as shown in Table 1, for the data record whose Key is MainPage, according to the name of the MainPage, it can be determined that the Key content is the first page data, and the same type of data of the data has only one, that is, itself, but its single read failure event. The cumulative number (getMissCount) is 30, which means that it is a low hit rate data, and the cumulative number of delete events (deleteExistCount) is also higher than 30, indicating that the key data is modified too frequently, resulting in a hit rate. low. Those skilled in the art should understand that the above description of determining the reason why the data cache hit rate is low is only an example, and other existing or future possible reasons for determining the data cache hit rate are as applicable to the present application, and should also be included in The scope of the present application is intended to be included herein by reference.
-{Key:MainPage,deleteExistCount:30,evictCount:0,getMissCount:30,setNotExistCount:30}-{Key:MainPage,deleteExistCount:30,evictCount:0, getMissCount:30,setNotExistCount:30}
-{Key:item_09cdec2d,deleteExistCount:0,evictCount:11,getMissCount:8,setNotExistCount:8}-{Key:item_09cdec2d,deleteExistCount:0,evictCount:11, getMissCount:8,setNotExistCount:8}
-{Key:item_122cf833,deleteExistCount:1,evictCount:14,getMissCount:9,setNotExistCount:9}-{Key:item_122cf833,deleteExistCount:1,evictCount:14, getMissCount:9,setNotExistCount:9}
-{Key:item_14a3a03a,deleteExistCount:0,evictCount:14,getMissCount:9,setNotExistCount:9}-{Key:item_14a3a03a,deleteExistCount:0,evictCount:14, getMissCount:9,setNotExistCount:9}
-{Key:item_15ecb7bd,deleteExistCount:0,evictCount:14,getMissCount:9,setNotExistCount:9}-{Key:item_15ecb7bd,deleteExistCount:0,evictCount:14, getMissCount:9,setNotExistCount:9}
-{Key:item_17085737,deleteExistCount:0,evictCount:14,getMissCount:9,setNotExistCount:9}-{Key:item_17085737,deleteExistCount:0,evictCount:14, getMissCount:9,setNotExistCount:9}
-{Key:item_1c902fdd,deleteExistCount:2,evictCount:13,getMissCount:8,setNotExistCount:8}-{Key:item_1c902fdd,deleteExistCount:2,evictCount:13, getMissCount:8,setNotExistCount:8}
-{Key:item_1ef6c4bc,deleteExistCount:2,evictCount:13,getMissCount:8,setNotExistCount:8}-{Key:item_1ef6c4bc,deleteExistCount:2,evictCount:13, getMissCount:8,setNotExistCount:8}
-{Key:item_1fd78837,deleteExistCount:1,evictCount:12,getMissCount:9,setNotExistCount:9}-{Key:item_1fd78837,deleteExistCount:1,evictCount:12, getMissCount:9,setNotExistCount:9}
-{Key:item_1ff9b528,deleteExistCount:0,evictCount:14,getMissCount:9,setNotExistCount:9}-{Key:item_1ff9b528,deleteExistCount:0,evictCount:14, getMissCount:9,setNotExistCount:9}
-{Key:item_31c3e0a6,deleteExistCount:0,evictCount:12,getMissCount:9,setNotExistCount:9}-{Key:item_31c3e0a6,deleteExistCount:0,evictCount:12, getMissCount:9,setNotExistCount:9}
-{Key:item_3752aa0a,deleteExistCount:0,evictCount:11,getMissCount:8,setNotExistCount:8}-{Key:item_3752aa0a,deleteExistCount:0,evictCount:11, getMissCount:8,setNotExistCount:8}
-{Key:item_3c77cac2,deleteExistCount:1,evictCount:13,getMissCount:8,setNotExistCount:8}-{Key:item_3c77cac2,deleteExistCount:1,evictCount:13, getMissCount:8,setNotExistCount:8}
-{Key:item_43eaf434,deleteExistCount:0,evictCount:11,getMissCount:8,setNotExistCount:8}-{Key:item_43eaf434,deleteExistCount:0,evictCount:11, getMissCount:8,setNotExistCount:8}
-{Key:item_4511044f,deleteExistCount:0,evictCount:13,getMissCount:8,setNotExistCount:8}-{Key:item_4511044f,deleteExistCount:0,evictCount:13, getMissCount:8,setNotExistCount:8}
-{Key:item_4f8f3999,deleteExistCount:0,evictCount:14,getMissCount:9,setNotExistCount:9}-{Key:item_4f8f3999,deleteExistCount:0,evictCount:14, getMissCount:9,setNotExistCount:9}
-{Key:item_52fa54d4,deleteExistCount:2,evictCount:12,getMissCount:9,setNotExistCount:9}-{Key:item_52fa54d4,deleteExistCount:2,evictCount:12, getMissCount:9,setNotExistCount:9}
-{Key:item_55fd3295,deleteExistCount:1,evictCount:12,getMissCount:9,setNotExistCount:9}-{Key:item_55fd3295,deleteExistCount:1,evictCount:12, getMissCount:9,setNotExistCount:9}
-{Key:item_58ea547f,deleteExistCount:1,evictCount:14,getMissCount:9,setNotExistCount:9}-{Key:item_58ea547f,deleteExistCount:1,evictCount:14, getMissCount:9,setNotExistCount:9}
-{Key:item_5afffbfe,deleteExistCount:2,evictCount:14,getMissCount:9,setNotExistCount:9}-{Key:item_5afffbfe,deleteExistCount:2,evictCount:14, getMissCount:9,setNotExistCount:9}
-{Key:item_67bf2f27,deleteExistCount:0,evictCount:11,getMissCount:8,setNotExistCount:8}-{Key:item_67bf2f27,deleteExistCount:0,evictCount:11, getMissCount:8,setNotExistCount:8}
-{Key:item_69c42d6e,deleteExistCount:0,evictCount:12,getMissCount:9,setNotExistCount:9}-{Key:item_69c42d6e,deleteExistCount:0,evictCount:12, getMissCount:9,setNotExistCount:9}
-{Key:item_6bb5a7da,deleteExistCount:2,evictCount:14,getMissCount:9,setNotExistCount:9}-{Key:item_6bb5a7da,deleteExistCount:2,evictCount:14, getMissCount:9,setNotExistCount:9}
-{Key:item_7466fb35,deleteExistCount:2,evictCount:13,getMissCount:8,setNotExistCount:8}-{Key:item_7466fb35,deleteExistCount:2,evictCount:13, getMissCount:8,setNotExistCount:8}
-{Key:item_7b59ef31,deleteExistCount:2,evictCount:11,getMissCount:8,setNotExistCount:8}-{Key:item_7b59ef31,deleteExistCount:2,evictCount:11, getMissCount:8,setNotExistCount:8}
-{Key:item_7e26abc2,deleteExistCount:1,evictCount:11,getMissCount:8,setNotExistCount:8}-{Key:item_7e26abc2,deleteExistCount:1,evictCount:11, getMissCount:8,setNotExistCount:8}
-{Key:item_82a5b1a8,deleteExistCount:0,evictCount:12,getMissCount:9,setNotExistCount:9}-{Key:item_82a5b1a8,deleteExistCount:0,evictCount:12, getMissCount:9,setNotExistCount:9}
-{Key:item_842c6a4a,deleteExistCount:1,evictCount:12,getMissCount:9,setNotExistCount:9}-{Key:item_842c6a4a,deleteExistCount:1,evictCount:12, getMissCount:9,setNotExistCount:9}
-{Key:item_880242f6,deleteExistCount:2,evictCount:11,getMissCount:8,setNotExistCount:8}-{Key:item_880242f6,deleteExistCount:2,evictCount:11, getMissCount:8,setNotExistCount:8}
-{Key:item_8d446f69,deleteExistCount:0,evictCount:14,getMissCount:9,setNotExistCount:9}-{Key:item_8d446f69,deleteExistCount:0,evictCount:14, getMissCount:9,setNotExistCount:9}
-{Key:item_8df56967,deleteExistCount:0,evictCount:13,getMissCount:8,setNotExistCount:8}-{Key:item_8df56967,deleteExistCount:0,evictCount:13, getMissCount:8,setNotExistCount:8}
-{Key:item_8ebebdfd,deleteExistCount:0,evictCount:13,getMissCount:8,setNotExistCount:8}-{Key:item_8ebebdfd,deleteExistCount:0,evictCount:13, getMissCount:8,setNotExistCount:8}
-{Key:item_91096a22,deleteExistCount:2,evictCount:11,getMissCount:8,setNotExistCount:8}-{Key:item_91096a22,deleteExistCount:2,evictCount:11, getMissCount:8,setNotExistCount:8}
-{Key:item_992b919c,deleteExistCount:0,evictCount:13,getMissCount:8,setNotExistCount:8}-{Key:item_992b919c,deleteExistCount:0,evictCount:13, getMissCount:8,setNotExistCount:8}
-{Key:item_a4f1bb1e,deleteExistCount:1,evictCount:13,getMissCount:8,setNotExistCount:8}-{Key:item_a4f1bb1e,deleteExistCount:1,evictCount:13, getMissCount:8,setNotExistCount:8}
-{Key:item_aa8892f5,deleteExistCount:0,evictCount:13,getMissCount:8,setNotExistCount:8}-{Key:item_aa8892f5,deleteExistCount:0,evictCount:13, getMissCount:8,setNotExistCount:8}
-{Key:item_ac4985e3,deleteExistCount:0,evictCount:13,getMissCount:8,setNotExistCount:8}-{Key:item_ac4985e3,deleteExistCount:0,evictCount:13, getMissCount:8,setNotExistCount:8}
-{Key:item_b57baa59,deleteExistCount:0,evictCount:12,getMissCount:9,setNotExistCount:9}-{Key:item_b57baa59,deleteExistCount:0,evictCount:12, getMissCount:9,setNotExistCount:9}
-{Key:item_be813651,deleteExistCount:2,evictCount:12,getMissCount:9,setNotExistCount:9}-{Key:item_be813651,deleteExistCount:2,evictCount:12, getMissCount:9,setNotExistCount:9}
-{Key:item_c1edea98,deleteExistCount:1,evictCount:11,getMissCount:8,setNotExistCount:8}-{Key:item_c1edea98,deleteExistCount:1,evictCount:11, getMissCount:8,setNotExistCount:8}
-{Key:item_c254be5b,deleteExistCount:0,evictCount:12,getMissCount:9,setNotExistCount:9}-{Key:item_c254be5b,deleteExistCount:0,evictCount:12, getMissCount:9,setNotExistCount:9}
-{Key:item_c4385493,deleteExistCount:2,evictCount:12,getMissCount:9,setNotExistCount:9}-{Key:item_c4385493,deleteExistCount:2,evictCount:12, getMissCount:9,setNotExistCount:9}
-{Key:item_c86d52f4,deleteExistCount:0,evictCount:12,getMissCount:9,setNotExistCount:9}-{Key:item_c86d52f4,deleteExistCount:0,evictCount:12, getMissCount:9,setNotExistCount:9}
-{Key:item_cf726c32,deleteExistCount:0,evictCount:11,getMissCount:8,setNotExistCount:8}-{Key:item_cf726c32,deleteExistCount:0,evictCount:11, getMissCount:8,setNotExistCount:8}
-{Key:item_e8b98eab,deleteExistCount:1,evictCount:13,getMissCount:8,setNotExistCount:8}-{Key:item_e8b98eab,deleteExistCount:1,evictCount:13, getMissCount:8,setNotExistCount:8}
-{Key:item_e92c7bfc,deleteExistCount:1,evictCount:14,getMissCount:9,setNotExistCount:9}-{Key:item_e92c7bfc,deleteExistCount:1,evictCount:14, getMissCount:9,setNotExistCount:9}
-{Key:item_eda48d55,deleteExistCount:0,evictCount:11,getMissCount:8,setNotExistCount:8}-{Key:item_eda48d55,deleteExistCount:0,evictCount:11, getMissCount:8,setNotExistCount:8}
-{Key:item_f05b915a,deleteExistCount:0,evictCount:11,getMissCount:8,setNotExistCount:8}-{Key:item_f05b915a,deleteExistCount:0,evictCount:11, getMissCount:8,setNotExistCount:8}
-{Key:item_f220ecd9,deleteExistCount:1,evictCount:11,getMissCount:8,setNotExistCount:8}-{Key:item_f220ecd9,deleteExistCount:1,evictCount:11, getMissCount:8,setNotExistCount:8}
-{Key:item_f6087d9d,deleteExistCount:2,evictCount:14,getMissCount:9,setNotExistCount:9}-{Key:item_f6087d9d,deleteExistCount:2,evictCount:14, getMissCount:9,setNotExistCount:9}
-{Key:misc_foot,setdeleteExistCount:0,evictCount:0,getMissCount:20,NotExistCount:0}-{Key:misc_foot,setdeleteExistCount:0,evictCount:0, getMissCount:20,NotExistCount:0}
-{Key:nick_0282d81c,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:nick_0282d81c,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:nick_149a3e16,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:nick_149a3e16,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:nick_1c8768b5,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:nick_1c8768b5,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:nick_280f3dd2,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:nick_280f3dd2,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:nick_5bbecebd,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:nick_5bbecebd,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:nick_640aaa5e,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:nick_640aaa5e,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:nick_66608a9f,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:nick_66608a9f,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:nick_684b984a,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:nick_684b984a,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:nick_6da33be3,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:nick_6da33be3,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:nick_71b6db52,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:nick_71b6db52,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:nick_72341f21,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:nick_72341f21,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:nick_9a121e06,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:nick_9a121e06,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:nick_9aee2b6f,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:nick_9aee2b6f,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:nick_a592aedc,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:nick_a592aedc,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:nick_a8608f23,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:nick_a8608f23,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:nick_a91e57aa,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:nick_a91e57aa,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:nick_a9e261db,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:nick_a9e261db,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:nick_b0b76c12,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:nick_b0b76c12,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:nick_b19ae545,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:nick_b19ae545,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:nick_b44dede3,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:nick_b44dede3,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:nick_bd335833,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:nick_bd335833,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:nick_d3273f07,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:nick_d3273f07,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:nick_dd25603e,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:nick_dd25603e,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:nick_eadeaead,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:nick_eadeaead,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:nick_f21f0ce4,deleteExistCount:0,victCount:0,getMissCount:1,setNotExistCount:1}-{Key:nick_f21f0ce4,deleteExistCount:0,victCount:0, getMissCount:1,setNotExistCount:1}
-{Key:session_0197f1f9,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:session_0197f1f9,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:session_0f10bac7,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:session_0f10bac7,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:session_104ba3c7,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:session_104ba3c7,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:session_146af489,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:session_146af489,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:session_1fb8dbd7,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:session_1fb8dbd7,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:session_2410cd60,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:session_2410cd60,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:session_284dfa9a,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:session_284dfa9a,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:session_3781cdf6,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:session_3781cdf6,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:session_50e0ba1e,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:session_50e0ba1e,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:session_8ed5c998,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:session_8ed5c998,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:session_a3dc28b2,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:session_a3dc28b2,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:session_b9a9e2d2,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:session_b9a9e2d2, deleteExistCount: 0, evictCount: 0, getMissCount: 1, setNotExistCount: 1}
-{Key:session_c7936ceb,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:session_c7936ceb,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:session_ff83d040,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:1}-{Key:session_ff83d040,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:1}
-{Key:token_3a492fbc,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:0}-{Key:token_3a492fbc,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:0}
-{Key:token_4f58ca30,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:0}-{Key:token_4f58ca30,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:0}
-{Key:token_58f50b6f,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:0}-{Key:token_5e1cb9a6,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:0}-{Key:token_58f50b6f,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:0}-{Key:token_5e1cb9a6,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:0}
-{Key:token_6824fe45,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:0}-{Key:token_6824fe45,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:0}
-{Key:token_84fd1778,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:0}-{Key:token_84fd1778,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:0}
-{Key:token_ae211626,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:0}-{Key:token_ae211626,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:0}
-{Key:token_be5e931f,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:0}-{Key:token_be5e931f,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:0}
-{Key:token_d4529ce6,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:0}-{Key:token_d4529ce6,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:0}
-{Key:token_f6db4f04,deleteExistCount:0,evictCount:0,getMissCount:1,setNotExistCount:0}-{Key:token_f6db4f04,deleteExistCount:0,evictCount:0, getMissCount:1,setNotExistCount:0}
表1Table 1
本申请的缓存命中率分析的方法一优选的实施例中,步骤S2,根据获取到的同类数据的事件记录中每个数据的读取失败事件和其它缓存事件的累计数量确定该数据缓存命中率低的原因,包括:In a preferred embodiment of the cache hit ratio analysis of the present application, in step S2, the data cache hit ratio is determined according to the cumulative number of read failure events and other cache events of each data in the event record of the acquired homogeneous data. Reasons for low, including:
当某个数据的读取失败事件的累计数量(getMissCount)大于第四预设阈值,且读取失败事件的累计数量(getMissCount)与写入事件的累计数量(setNotExistCount)的差值大于第五预设阈值,则确定该数据缓存命中率低的原因为访问的数据不存在。例如,对于表1中Key为misc_foot的数据,或者一组以Key为token_前缀的同类数据的事件记录,在此,Key为misc_foot的数据的同类数据只有一个,即其自身,但其读取失败事件(getMissCount)的累计数量为20,说明该数据的缓存命中率低,而Key为token_前缀的同类数据中的每个数据的读取失败事件(getMissCount)的累计数量为1,但以 Key为token_前缀的同类数据的读取失败事件(getMissCount)的累计数量的总和次数据较高,即该同类数据中的数据个数较多,说明以Key为token_前缀的同类数据缓存命中率低,后续根据每条数据记录的详细信息发现写入事件(SetNotExistCount)数值为0,说明业务系统没有对Key为misc_foot的数据或Key为token_前缀的数据做缓存操作,造成命中率低。本领域技术人员应能理解上述确定数据缓存命中率低的原因的描述仅为举例,其他现有的或今后可能出现的确定数据缓存命中率低的原因如可适用于本申请,也应包含在本申请保护范围以内,并在此以引用方式包含于此。When the cumulative number of read failure events of a certain data (getMissCount) is greater than the fourth preset threshold, and the difference between the cumulative number of read failure events (getMissCount) and the cumulative number of write events (setNotExistCount) is greater than the fifth pre- If the threshold is set, it is determined that the data cache hit rate is low because the accessed data does not exist. For example, for the data in Table 1 whose key is misc_foot, or a set of event data of the same type with Key as the token_ prefix, here, the data of the key for misc_foot has only one type of data, namely itself, but it is read. The cumulative number of failure events (getMissCount) is 20, indicating that the cache hit rate of the data is low, and the cumulative number of read failure events (getMissCount) for each data in the same type of data whose Key is the token_ prefix is 1, but The total number of times of the cumulative number of read failure events (getMissCount) of the same data with the key of the token_ prefix is higher, that is, the number of data in the same type of data is larger, indicating that the same type of data cache hit with Key as the token_ prefix The rate is low. According to the detailed information of each data record, the value of the write event (SetNotExistCount) is 0, indicating that the service system does not cache the data whose key is misc_foot or the data whose key is token_ prefix, resulting in low hit rate. Those skilled in the art should understand that the above description of determining the reason why the data cache hit rate is low is only an example, and other existing or future possible reasons for determining the data cache hit rate are as applicable to the present application, and should also be included in The scope of the present application is intended to be included herein by reference.
本申请的缓存命中率分析的方法一优选的实施例中,步骤S2,根据获取到的同类数据的事件记录中每个数据的读取失败事件和其它缓存事件的累计数量确定该数据缓存命中率低的原因,包括:In a preferred embodiment of the cache hit ratio analysis of the present application, in step S2, the data cache hit ratio is determined according to the cumulative number of read failure events and other cache events of each data in the event record of the acquired homogeneous data. Reasons for low, including:
当某个数据的淘汰事件的累计数量(evictCount)和读取失败事件的累计数量(getMissCount)均大于第六预设阈值,且淘汰事件的累计数量(evictCount)和读取失败事件的累计数量(getMissCount)的差值小于第七预设阈值,则确定该数据缓存命中率低的原因为缓存容量不足。例如,表1中,以item为前缀的同类数据的读取失败事件的累计数量(getMissCount)的总和次数比较高,即该同类数据中的数据个数较多,且根据其详细信息发现,淘汰事件的累计数量(evictCount)的数值也偏高,说明其缓存容量不足导致的淘汰,从而引起命中率下降。本领域技术人员应能理解上述确定数据缓存命中率低的原因的描述仅为举例,其他现有的或今后可能出现的确定数据缓存命中率低的原因如可适用于本申请,也应包含在本申请保护范围以内,并在此以引用方式包含于此。When the cumulative number of elimination events (evictCount) of a certain data and the cumulative number of read failure events (getMissCount) are both greater than the sixth preset threshold, and the cumulative number of eliminated events (evictCount) and the cumulative number of read failure events ( If the difference of getMissCount) is less than the seventh preset threshold, it is determined that the data cache hit rate is low because the cache capacity is insufficient. For example, in Table 1, the total number of times of the total number of read failure events (getMissCount) of the same type of data prefixed by item is relatively high, that is, the number of data in the same type of data is large, and it is found out based on the detailed information thereof. The cumulative number of events (evictCount) is also high, indicating the elimination of the lack of cache capacity, resulting in a drop in hit rate. Those skilled in the art should understand that the above description of determining the reason why the data cache hit rate is low is only an example, and other existing or future possible reasons for determining the data cache hit rate are as applicable to the present application, and should also be included in The scope of the present application is intended to be included herein by reference.
本申请的缓存命中率分析的方法一可选的实施例中,所述第二阈值、第四阈值和第六阈值可以设置为相同的值。In an optional embodiment of the cache hit ratio analysis of the present application, the second threshold, the fourth threshold, and the sixth threshold may be set to the same value.
本申请的缓存命中率分析的方法一优选的实施例中,步骤S2,根据获 取到的同类数据的事件记录中每个数据的读取失败事件和其它缓存事件的累计数量确定该数据缓存命中率低的原因,包括:Method for Cache Hit Ratio Analysis of the Present Application In a preferred embodiment, step S2 is obtained according to The cumulative number of read failure events and other cache events for each data in the event record of the same type of data obtained determines the reason why the data cache hit rate is low, including:
当某个数据的写入事件的累计数量(setNotExistCount)和读取失败事件的累计数量(getMissCount)均小于第八预设阈值,且写入事件的累计数量的累计数量(setNotExistCount)与读取失败事件的累计数量(getMissCount)差值小于第九预设阈值,则确定该数据缓存命中率低的原因为访问的数据不具有热点性。例如,表1中以session为前缀的同类数据的读取失败事件(GetMissCount)的累计数量基本为1或者2,但读取失败事件(GetMissCount)的累计数量的总和次数较大,即该同类数据中的数据个数较多,而每个数据记录的写入事件(SetNotExistCount)基本为1,说明此类型的数据的热点性不高。本领域技术人员应能理解上述确定数据缓存命中率低的原因的描述仅为举例,其他现有的或今后可能出现的确定数据缓存命中率低的原因如可适用于本申请,也应包含在本申请保护范围以内,并在此以引用方式包含于此。When the cumulative number of write events (setNotExistCount) of a certain data and the cumulative number of read failure events (getMissCount) are both smaller than the eighth preset threshold, and the cumulative number of write events (setNotExistCount) and the read failure If the accumulated number of events (getMissCount) is less than the ninth preset threshold, it is determined that the data cache hit rate is low because the accessed data does not have hotspots. For example, the cumulative number of read failure events (GetMissCount) of the same type of data prefixed by session in Table 1 is basically 1 or 2, but the total number of totals of the read failure events (GetMissCount) is larger, that is, the same type of data. The number of data in the data is large, and the write event (SetNotExistCount) of each data record is basically 1, indicating that the hotspot of this type of data is not high. Those skilled in the art should understand that the above description of determining the reason why the data cache hit rate is low is only an example, and other existing or future possible reasons for determining the data cache hit rate are as applicable to the present application, and should also be included in The scope of the present application is intended to be included herein by reference.
如图2所示,本申请的缓存命中率分析的方法一优选的实施例中,步骤S1,获取缓存读取失败事件的总和次数高于第一预设阈值的同类数据的事件记录,包括:As shown in FIG. 2, in a preferred embodiment of the cache hit ratio analysis of the present application, in step S1, an event record of the same type of data whose sum of cache read failure events is higher than a first preset threshold is obtained, including:
步骤S11,获取每个数据的缓存读取失败事件和其它缓存事件的累计数量;如图3所示,本申请的缓存命中率分析的方法一较佳的实施例中,步骤S11,包括步骤S111和步骤S112,其中,步骤S111,通过回调接口获取每个数据的缓存读取失败事件或其它缓存事件,所述回调接口设置于缓存代码的事件路径上;在此,可以通过回调接口每个数据的缓存读取失败事件或其它缓存事件进行监听,具体可按照事件发生的先后顺序逐条记录下监听到的事件的信息,包括事件的种类是什么如读取失败事件或其它缓存事件,以及事件对应数据的Key是什么,记录方式可以采用文件追加写方式实现,可以在指定的一段时间后会生成一个事件记录文件,由于回调接口 设置于缓存代码的事件路径上,只要有事件发生,回调接口都能监听和记录该事件;步骤S112,计算每个数据的缓存读取失败事件和其它缓存事件的累计数量。在此,可根据上述步骤S111生成的事件记录文件的内容汇总计算每个数据的缓存读取失败事件(GetMissCount)的累计数量和其它缓存事件的累计数量(EvictCount,DeleteExistCount,SetNotExistCount)。例如,可以按照顺序读取事件记录文件,并在内存(或者其他存储介质)中记录对应的Key,并且累计此Key的事件记录次数,记录扫描完成后,会生成一个[Key:EvictCount,DeleteExistCount,GetMissCount,SetNotExistCount]的Key列表,本领域技术人员应能理解上述获取每个数据的缓存读取失败事件和其它缓存事件的累计数量的描述仅为举例,其他现有的或今后可能出现的获取每个数据的缓存读取失败事件和其它缓存事件的累计数量的描述如可适用于本申请,也应包含在本申请保护范围以内,并在此以引用方式包含于此;In step S11, the cumulative number of cache read failure events and other cache events of each data is obtained. As shown in FIG. 3, in a preferred embodiment of the cache hit ratio analysis method of the present application, step S11 includes step S111. And step S112, wherein, in step S111, a cache read failure event or other cache event of each data is obtained through a callback interface, where the callback interface is set on an event path of the cache code; here, each data can be returned through the interface The cache read failure event or other cache event is monitored, and the information of the monitored event may be recorded one by one according to the sequence of occurrence of the event, including what kind of event is such as a read failure event or other cache event, and the event corresponding What is the key of the data, the recording method can be implemented by file appending and writing, and an event log file can be generated after a specified period of time, due to the callback interface. Set on the event path of the cache code, the callback interface can monitor and record the event whenever an event occurs; and in step S112, calculate the cumulative number of cache read failure events and other cache events for each data. Here, the cumulative number of cache read failure events (GetMissCount) and the cumulative number of other cache events (EvictCount, DeleteExistCount, SetNotExistCount) of each data may be calculated according to the content of the event record file generated in the above step S111. For example, the event record file can be read in order, and the corresponding Key is recorded in the memory (or other storage medium), and the number of event records of the key is accumulated. After the record scan is completed, a [Key: EvictCount, DeleteExistCount, The list of Keys of GetMissCount, SetNotExistCount], those skilled in the art should be able to understand that the above description of the cumulative number of cache read failure events and other cache events for each data is only an example, other existing or future acquisitions may occur. A description of the cumulative number of cached read failure events and other cached events of the data, as applicable to the present application, is also intended to be included within the scope of the present application and is hereby incorporated by reference herein;
步骤S12,从所有数据中筛选出读取失败事件的累计数量大于第十预设阈值的数据;由于所有数据生成的如上述的Key列表规模会比较庞大,不利于后续分析的效率,所以可按照每条数据的事件记录中读取失败事件的累计数量(GetMissCount)的大小,从大到小筛选前N条大于第十预设阈值的数据,其中,N太小会影响数据准确度,N太大会影响视图展现,所以可以根据数据的大小设置N为默认的值,如100,也就是说选取最多100条数据的事件记录;In step S12, the data that the cumulative number of read failure events is greater than the tenth preset threshold is filtered out from all the data; since the size of the Key list generated by all the data is relatively large, which is not conducive to the efficiency of subsequent analysis, The cumulative number of read failure events (GetMissCount) in the event record of each data, from the largest to the smallest N data before the screening is greater than the tenth preset threshold, where N is too small will affect the accuracy of the data, N too The assembly affects the view display, so you can set N to the default value according to the size of the data, such as 100, that is, select an event record of up to 100 data;
步骤S13,按预设分类标准将筛选出的每个数据分到对应的类;Step S13, each of the filtered data is classified into a corresponding class according to a preset classification criterion;
步骤S14,计算每一同类数据的缓存读取失败事件的总和次数;Step S14, calculating the total number of cache read failure events of each type of data;
步骤S15,获取缓存读取失败事件的总和次数高于第一预设阈值的同类数据的事件记录,其中,所述同类数据的事件记录包括该类数据中每个数据的读取失败事件和其它缓存事件的累计数量。在此,如果缓存读取失 败事件的总和次数高于第一预设阈值,则可确定该类数据的缓存命中率低,进而可以在后续步骤中判断该类数据的缓存命中率低的原因。缓存读取失败事件的总和次数高于第一预设阈值有三种情况,一种情况是,某类数据中的数据的事件记录的条数很少,但每个数据的缓存读取失败事件的累计数量很高,导致这些累计数量相加后的缓存读取失败事件的总和次数高于第一预设阈值;第二种情况是,虽然某类数据中每个数据的缓存读取失败事件的累计数量很小,但该类数据中的数据的事件记录的条数很多,导致这些累计数量相加后的缓存读取失败事件的总和次数仍高于第一预设阈值;第三种情况是,综合第一和第二种情况,既有单条数据的缓存读取失败事件的累计数量很高的情形,又有多条数据的缓存读取失败事件的累计数量相加这和很高的情形,最终也导致这些累计数量相加后的缓存读取失败事件的总和次数仍高于第一预设阈值。本领域技术人员应能理解上述获取缓存读取失败事件的总和次数高于第一预设阈值的同类数据的事件记录的描述仅为举例,其他现有的或今后可能出现的获取缓存读取失败事件的总和次数高于第一预设阈值的同类数据的事件记录的描述如可适用于本申请,也应包含在本申请保护范围以内,并在此以引用方式包含于此。Step S15: Obtain an event record of the same type of data whose sum of cache read failure events is higher than a first preset threshold, where the event record of the same type data includes a read failure event of each data in the type of data and other The cumulative number of cached events. Here, if the cache is read out If the sum of the failure events is higher than the first preset threshold, it may be determined that the cache hit ratio of the data is low, and the reason why the cache hit ratio of the data is low may be determined in the subsequent step. There are three cases in which the total number of cache read failure events is higher than the first preset threshold. In one case, the number of event records of data in a certain type of data is small, but the cache read failure event of each data is The cumulative number is high, and the total number of cache read failure events after the sum of these accumulated numbers is higher than the first preset threshold; the second case is that although the cache read failure event of each data in a certain type of data The cumulative number is small, but the number of event records of the data in the data is large, and the total number of cache read failure events after the cumulative number is added is still higher than the first preset threshold; the third case is In the first and second cases, the cumulative number of cache read failure events for a single data is high, and the cumulative number of cache read failure events for multiple data is added. This is a very high case. Finally, the sum of the cache read failure events after the sum of these cumulative quantities is still higher than the first preset threshold. Those skilled in the art should be able to understand that the description of the event record of the same type of data in which the sum of the cache read failure events is higher than the first preset threshold is only an example, and other existing or future acquisition cache read failures may occur. The description of the event record of the same type of data in which the sum of the events is higher than the first predetermined threshold is applicable to the present application and is also included in the scope of the present application and is hereby incorporated by reference.
本申请的缓存命中率分析的方法一优选的实施例中,步骤S13中所述预设分类标准包括按数据的功能或按数据的唯一标识(Key)进行分类。缓存系统中的Key一般具有前缀一致性,就是说同一类型的功能会采用同一个前缀表达,以便区分:例如,表1的Key中,带同一前缀的为同一类业务,如item、session、nick等前缀就表示不同的类。本领域技术人员应能理解上述预设分类标准的描述仅为举例,其他现有的或今后可能出现的预设分类标准的描述如可适用于本申请,也应包含在本申请保护范围以内,并在此以引用方式包含于此。In a preferred embodiment of the cache hit ratio analysis of the present application, the preset classification criteria in step S13 includes classifying by function of data or by unique identifier (Key) of data. Keys in the cache system generally have prefix consistency, which means that the same type of function will be expressed by the same prefix to distinguish: for example, in the Key of Table 1, the same type of service with the same prefix, such as item, session, nick Equal prefixes indicate different classes. A person skilled in the art should understand that the description of the foregoing preset classification standard is only an example, and other existing or future possible preset classification standards may be applicable to the present application and should also be included in the scope of protection of the present application. It is hereby incorporated by reference.
如图4所示,本申请的缓存命中率分析的方法一优选的实施例中,步 骤S2,根据获取到的同类数据的事件记录中每个数据的读取失败事件和其它缓存事件的累计数量确定该数据缓存命中率低的原因,包括:As shown in FIG. 4, in a preferred embodiment of the method for cache hit ratio analysis of the present application, Step S2, determining, according to the cumulative number of read failure events and other cache events of each data in the event record of the acquired similar data, the reason why the data cache hit rate is low, including:
步骤S21,将获取到的同类数据的事件记录中所有数据按读取失败事件和其它缓存事件的累计数量的大小生成图表,如有色图、曲线图或柱状图中的任一种;例如,如图5所示,当生成有色图时,可根据数据的Key的字典顺序将Key排列,每行10个,共10行,每个Key对应绘出一个色块,色块的背景颜色深度由该Key对应的数据的读取失败事件的累计数量(GetMissCount)的数值决定;GetMissCount最大的数值定义为正红色(R255,G0,B0),GetMissCount为0的颜色定义为正绿色(R0,G255,B0),正红色和正绿色之间的中间值为黄色,GetMissCount越大颜色越偏红,公式为:Step S21, generating all the data in the event record of the acquired similar data according to the size of the cumulative number of read failure events and other cache events, such as any one of a colored map, a graph, or a histogram; for example, As shown in FIG. 5, when generating a colored map, Keys may be arranged according to the lexicographic order of the Key of the data, 10 lines per line, a total of 10 lines, and each Key correspondingly draws a color block, and the background color depth of the color block is determined by the The value of the total number of read failure events (GetMissCount) of the data corresponding to the Key is determined; the maximum value of GetMissCount is defined as positive red (R255, G0, B0), and the color of GetMissCount is 0 is defined as positive green (R0, G255, B0) ), the middle value between positive red and positive green is yellow, the larger the GetMissCount, the more reddish the color, the formula is:
假设整个数列中最大的GetMissCount为MAXAssume that the largest GetMissCount in the entire series is MAX
如果GetMIssCount>=MAX/2,那么If GetMIssCount>=MAX/2, then
R=255;G=255*2*(1-GetMissCount/MAX);B=0;R=255; G=255*2*(1-GetMissCount/MAX); B=0;
如果GetMIssCount<MAX/2,那么If GetMIssCount<MAX/2, then
R=255*(2*GetMissCount/MAX);G=255;B=0;R=255*(2*GetMissCount/MAX); G=255; B=0;
另外,需要在每个色块上标注该色块对应的数据其它缓存事件的累计数量,标注方式可以是先在每个色块上隐藏其它缓存事件的累计数量,然后在选中该色块时显示隐藏的其它缓存事件的累计数量;In addition, it is required to mark the cumulative number of other buffer events corresponding to the data of the color block on each color block, and the labeling manner may be to first hide the accumulated number of other buffer events on each color block, and then display the color block when the color block is selected. The cumulative number of hidden other cached events;
步骤S22,根据所述图表确定缓存命中率低的原因。在此,可根据生成的图表更直观地得到命中率低的原因。具体的,缓存系统中的Key一般具有前缀一致性,就是说同一类型的功能会采用同一个前缀表达,以便区分:例如,session_312312,session_888544,item_box111,item_box222,因此,如图5所示,可按照Key的字典顺序将数据进行排列,将同一业务功能即同一类的数据色块集中排放在一起。可根据GetMissCount越大,颜色越偏红的原则,或者同一类数据的色块的排列面积较大的原则,判断为命中率低的色 块,然后针对命中率低的色块,根据每个色块上标注该色块对应的数据其它缓存事件的累计数量,便可以轻松的找到命中率低的原因。本领域技术人员应能理解上述确定数据缓存命中率低的原因的描述仅为举例,其他现有的或今后可能出现的确定数据缓存命中率低的原因如可适用于本申请,也应包含在本申请保护范围以内,并在此以引用方式包含于此。Step S22, determining a reason why the cache hit ratio is low according to the chart. Here, the reason why the hit rate is low can be more intuitively obtained from the generated chart. Specifically, the Key in the cache system generally has prefix consistency, that is, the same type of function is expressed by the same prefix to distinguish: for example, session_312312, session_888544, item_box111, item_box222, therefore, as shown in FIG. 5, according to Key's lexicographic order arranges the data and condenses the same business function, that is, the same type of data color blocks. According to the principle that the larger the GetMissCount is, the more reddish the color is, or the larger the arrangement area of the color blocks of the same type of data, the color with a low hit rate is determined. The block, then for the color block with a low hit rate, can easily find the reason for the low hit rate based on the cumulative number of other cache events on the color block corresponding to the data corresponding to the color block. Those skilled in the art should understand that the above description of determining the reason why the data cache hit rate is low is only an example, and other existing or future possible reasons for determining the data cache hit rate are as applicable to the present application, and should also be included in The scope of the present application is intended to be included herein by reference.
如图6所示,根据本申请的另一面本申请还提供一种用于缓存命中率分析的设备100,其中,包括:As shown in FIG. 6, according to another aspect of the present application, the present application further provides an apparatus 100 for cache hit ratio analysis, which includes:
第一装置1,用于获取缓存读取失败事件的总和次数高于第一预设阈值的同类数据的事件记录;其中,读取失败事件(GetMiss)由用户主动发起的Get请求产生,并且读取结果为不存在,在此,如果缓存读取失败事件的总和次数高于第一预设阈值,则可确定该类数据的缓存命中率低,进而可以在后续步骤中判断该类数据的缓存命中率低的原因;The first device 1 is configured to obtain an event record of the same type of data whose cache read failure event is higher than the first preset threshold; wherein the read failure event (GetMiss) is generated by the user-initiated Get request, and is read. The result is non-existent. If the total number of cache read failure events is higher than the first preset threshold, it may be determined that the cache hit rate of the data is low, and then the cache of the data may be determined in a subsequent step. The reason for the low hit rate;
第二装置2,用于根据获取到的同类数据的事件记录中每个数据的读取失败事件和其它缓存事件的累计数量确定该数据缓存命中率低的原因。在此,某类数据的缓存读取失败事件的总和次数等于该类数据中所有数据的缓存读取失败事件的累计数量的相加之和,影响缓存命中率低的原因基本有如下几个方面的因素:The second device 2 is configured to determine, according to the cumulative number of read failure events and other cache events of each data in the event record of the acquired similar data, the reason why the data cache hit rate is low. Here, the sum of the cache read failure events of a certain type of data is equal to the sum of the cumulative number of cache read failure events of all the data in the data, and the reasons for the low cache hit ratio are basically as follows. the elements of:
1.缓存容量不足:当容量不足时缓存系统会产生淘汰,导致数据在缓存中的概率降低。虽然缓存系统具有LRU算法尽量保证淘汰的数据为非热点数据,但无法从本质上确保命中率的稳定。在此,淘汰(evict)是指一般缓存系统容量有限,当存储容量不够时,缓存系统会发生淘汰,也就是删除一些数据,以释放空间,删除数据的策略一般采用LRU(Least Recently Used)算法。其中,LRU算法既近期最少使用算法,其是一种数据结构算法,可以找出最近最少使用的元素,一般用于Cache淘汰策略里,也就是说,将最近最少使用的元素删除,达到释放空间的目的。1. Insufficient cache capacity: When the capacity is insufficient, the cache system will be eliminated, resulting in a lower probability of data being cached. Although the cache system has the LRU algorithm to ensure that the phase-out data is non-hotspot data, it cannot guarantee the stability of the hit rate in essence. Here, the elimination (evict) means that the general cache system has a limited capacity. When the storage capacity is insufficient, the cache system will be eliminated, that is, some data is deleted to release the space. The strategy for deleting data generally adopts the LRU (Least Recently Used) algorithm. . Among them, the LRU algorithm has the least recently used algorithm, which is a data structure algorithm, which can find the least recently used element, which is generally used in the Cache elimination strategy, that is, the least recently used element is deleted to achieve the release space. the goal of.
2.数据被主动删除:按照缓存系统的典型使用场景,数据发生修改或者删 除时,需要将缓存内对应的数据删除,下一次访问时必然发生不命中。2. Data is actively deleted: according to the typical usage scenario of the cache system, the data is modified or deleted. In addition, the corresponding data in the cache needs to be deleted, and the next access will inevitably occur.
3.访问的数据不存在:整个业务系统中不具有该数据存在,必然不命中。其中每个数据可以根据对应的Key查找,Key是缓存中数据的唯一索引,同一缓存系统中不会重复。3. The accessed data does not exist: the data does not exist in the entire business system and must not be hit. Each of the data can be searched according to the corresponding Key, and Key is a unique index of the data in the cache, and is not repeated in the same cache system.
4.访问的数据不具有热点性:根据缓存系统的使用方式,第一次访问发现数据不命中时,需要从后端数据源读取数据写入缓存系统中,第二次访问则出现命中,假设极端情况下,每个数据只会被访问一次,那命中率理论数值则为0。本申请根据某类数据缓存读取失败事件的总和次数得到存在缓存命中率低的数据,根据存在缓存命中率低的数据的读取失败事件和其它缓存事件的累计数量,可以有效确定缓存命中率低的原因,有助于后续根据该原因改善缓存代码的质量,提升整体系统性能。4. The accessed data does not have hotspots: according to the usage mode of the cache system, when the first access discovery data is not hit, the data needs to be read from the backend data source to be written into the cache system, and the second access is hit. Assume that in extreme cases, each data will only be accessed once, and the theoretical hit rate is zero. The present application obtains data with a low cache hit ratio according to the total number of data cache read failure events, and can effectively determine the cache hit ratio according to the number of read failure events and other cache events with low cache hit ratio. The low reason helps to improve the quality of the cache code and improve the overall system performance.
本申请的用于缓存命中率分析的设备一优选的实施例中,所述其它缓存事件包括删除事件(DeleteExist)、写入事件(SetNotExist)和淘汰事件(Evict)中的一种或任意组合。其中,删除事件(DeleteExist)由用户主动发起的Delete请求产生,删除事件中所指定的数据在删除之前是存在的;写入事件(SetNotExist)由用户主动发起的Set请求产生,写入事件中所指定的数据在删除之前不存在;淘汰事件(Evict)是指当缓存容量满时,发生淘汰动作。根据每个数据的读取失败事件(GetMiss)的累计数量与删除事件(DeleteExist)、写入事件(SetNotExist)和淘汰事件(Evict)的累计数量中至少一项的组合即可有效地确定该数据缓存命中率低的原因。本领域技术人员应能理解上述其它缓存事件的描述仅为举例,其他现有的或今后可能出现的其它缓存事件的描述如可适用于本申请,也应包含在本申请保护范围以内,并在此以引用方式包含于此。In a preferred embodiment of the apparatus for cache hit ratio analysis of the present application, the other cache events include one or any combination of a delete event (DeleteExist), a write event (SetNotExist), and a knockout event (Evict). The delete event (DeleteExist) is generated by a user-initiated Delete request, and the data specified in the delete event exists before the deletion; the write event (SetNotExist) is generated by the user-initiated Set request, and is written in the event. The specified data does not exist before deletion; the Evict event refers to the elimination action when the cache capacity is full. The data can be effectively determined according to the combination of the cumulative number of read failure events (GetMiss) of each data and at least one of the cumulative number of delete events (DeleteExist), write events (SetNotExist), and elimination events (Evict). The reason for the low cache hit rate. Those skilled in the art should understand that the descriptions of the other cache events mentioned above are only examples, and other descriptions of other existing or future cache events may be applicable to the present application, and should also be included in the scope of the present application. This is hereby incorporated by reference.
本申请的用于缓存命中率分析的设备一优选的实施例中,所述第二装置,用于当某个数据的删除事件的累计数量(deleteExistCount)和读取失败事件的累计数量(getMissCount)均大于第二预设阈值,且删除事件的累 计数量的累计数量(deleteExistCount)与读取失败事件的累计数量(getMissCount)的差值小于第三预设阈值,则确定该数据缓存命中率低的原因为数据被主动删除。例如,如表1所示,对于Key为MainPage的数据记录,根据MainPage的名称可以确定该Key内容是首页数据,该数据的同类数据只有一个,即其自身,但其单个的读取失败事件的累计数量(getMissCount)比较高为30,说明其是命中率低的数据,再根据其删除事件的累计数量(deleteExistCount)也比较高为30,说明此Key对应数据的修改过于频繁,造成了命中率低。本领域技术人员应能理解上述确定数据缓存命中率低的原因的描述仅为举例,其他现有的或今后可能出现的确定数据缓存命中率低的原因如可适用于本申请,也应包含在本申请保护范围以内,并在此以引用方式包含于此。In a preferred embodiment of the apparatus for cache hit ratio analysis, the second apparatus is configured to use a cumulative number of deletion events (deleteExistCount) and a cumulative number of read failure events (getMissCount) when a certain data is deleted. Both are greater than the second preset threshold, and the deletion of the event is tired. If the difference between the cumulative number of counts (deleteExistCount) and the cumulative number of read failure events (getMissCount) is less than the third preset threshold, it is determined that the data cache hit rate is low because the data is actively deleted. For example, as shown in Table 1, for the data record whose Key is MainPage, according to the name of the MainPage, it can be determined that the Key content is the first page data, and the same type of data of the data has only one, that is, itself, but its single read failure event. The cumulative number (getMissCount) is 30, which means that it is a low hit rate data, and the cumulative number of delete events (deleteExistCount) is also higher than 30, indicating that the key data is modified too frequently, resulting in a hit rate. low. Those skilled in the art should understand that the above description of determining the reason why the data cache hit rate is low is only an example, and other existing or future possible reasons for determining the data cache hit rate are as applicable to the present application, and should also be included in The scope of the present application is intended to be included herein by reference.
本申请的用于缓存命中率分析的设备一优选的实施例中,所述第二装置,用于当某个数据的读取失败事件的累计数量(getMissCount)大于第四预设阈值,且读取失败事件的累计数量(getMissCount)与写入事件的累计数量(setNotExistCount)的差值大于第五预设阈值,则确定该数据缓存命中率低的原因为访问的数据不存在。例如,对于表1中Key为misc_foot的数据,或者一组以Key为token_前缀的同类数据的事件记录,在此,Key为misc_foot的数据的同类数据只有一个,即其自身,但其读取失败事件(getMissCount)的累计数量为20,说明该数据的缓存命中率低,而Key为token_前缀的同类数据中的每个数据的读取失败事件(getMissCount)的累计数量为1,但以Key为token_前缀的同类数据的读取失败事件(getMissCount)的累计数量的总和次数据较高,即该同类数据中的数据个数较多,说明以Key为token_前缀的同类数据缓存命中率低,后续根据每条数据记录的详细信息发现写入事件(SetNotExistCount)数值为0,说明业务系统没有对Key为misc_foot的数据或Key为token_前缀的数据做缓存操作,造成命中率低。本领域技术人员应能理解上述确定数据缓存命中率低的原因的描述仅为举 例,其他现有的或今后可能出现的确定数据缓存命中率低的原因如可适用于本申请,也应包含在本申请保护范围以内,并在此以引用方式包含于此。In a preferred embodiment of the device for cache hit ratio analysis, the second device is configured to: when the cumulative number of read failure events of a certain data (getMissCount) is greater than a fourth preset threshold, and read If the difference between the cumulative number of failed events (getMissCount) and the accumulated number of write events (setNotExistCount) is greater than the fifth predetermined threshold, it is determined that the data cache hit rate is low because the accessed data does not exist. For example, for the data in Table 1 whose key is misc_foot, or a set of event data of the same type with Key as the token_ prefix, here, the data of the key for misc_foot has only one type of data, namely itself, but it is read. The cumulative number of failure events (getMissCount) is 20, indicating that the cache hit rate of the data is low, and the cumulative number of read failure events (getMissCount) for each data in the same type of data whose Key is the token_ prefix is 1, but The total number of times of the cumulative number of read failure events (getMissCount) of the same data with the key of the token_ prefix is higher, that is, the number of data in the same type of data is larger, indicating that the same type of data cache hit with Key as the token_ prefix The rate is low. According to the detailed information of each data record, the value of the write event (SetNotExistCount) is 0, indicating that the service system does not cache the data whose key is misc_foot or the data whose key is token_ prefix, resulting in low hit rate. Those skilled in the art should be able to understand that the above description of determining the reason why the data cache hit rate is low is only For example, other existing or future possible determinations of a low data cache hit rate are applicable to the present application and are also included in the scope of the present application and are hereby incorporated by reference.
本申请的用于缓存命中率分析的设备一优选的实施例中,所述第二装置,用于当某个数据的淘汰事件的累计数量(evictCount)和读取失败事件的累计数量(getMissCount)均大于第六预设阈值,且淘汰事件的累计数量(evictCount)和读取失败事件的累计数量(getMissCount)的差值小于第七预设阈值,则确定该数据缓存命中率低的原因为缓存容量不足。例如,表1中,以item为前缀的同类数据的读取失败事件的累计数量(getMissCount)的总和次数比较高,即该同类数据中的数据个数较多,且根据其详细信息发现,淘汰事件的累计数量(evictCount)的数值也偏高,说明其缓存容量不足导致的淘汰,从而引起命中率下降。本领域技术人员应能理解上述确定数据缓存命中率低的原因的描述仅为举例,其他现有的或今后可能出现的确定数据缓存命中率低的原因如可适用于本申请,也应包含在本申请保护范围以内,并在此以引用方式包含于此。In a preferred embodiment of the apparatus for cache hit ratio analysis of the present application, the second means is used for the cumulative number of evict counts of a certain data (evictCount) and the cumulative number of read failure events (getMissCount) If the difference between the cumulative number of elimination events (evictCount) and the cumulative number of read failure events (getMissCount) is less than the seventh preset threshold, the reason for determining that the data cache hit rate is low is cache. Insufficient capacity. For example, in Table 1, the total number of times of the total number of read failure events (getMissCount) of the same type of data prefixed by item is relatively high, that is, the number of data in the same type of data is large, and it is found out based on the detailed information thereof. The cumulative number of events (evictCount) is also high, indicating the elimination of the lack of cache capacity, resulting in a drop in hit rate. Those skilled in the art should understand that the above description of determining the reason why the data cache hit rate is low is only an example, and other existing or future possible reasons for determining the data cache hit rate are as applicable to the present application, and should also be included in The scope of the present application is intended to be included herein by reference.
本申请的用于缓存命中率分析的设备一可选的实施例中,所述第二阈值、第四阈值和第六阈值可以设置为相同的值。In an optional embodiment of the apparatus for cache hit ratio analysis, the second threshold, the fourth threshold, and the sixth threshold may be set to the same value.
本申请的用于缓存命中率分析的设备一优选的实施例中,所述第二装置,用于当某个数据的写入事件的累计数量(setNotExistCount)和读取失败事件的累计数量(getMissCount)均小于第八预设阈值,且写入事件的累计数量(setNotExistCount)与读取失败事件的累计数量(getMissCount)差值小于第九预设阈值,则确定该数据缓存命中率低的原因为访问的数据不具有热点性。例如,表1中以session为前缀的同类数据的读取失败事件(GetMissCount)的累计数量基本为1或者2,但读取失败事件(GetMissCount)的累计数量的总和次数较大,即该同类数据中的数据个数较多,而每个数据记录的写入事件(SetNotExistCount)基本为1,说明 此类型的数据的热点性不高。本领域技术人员应能理解上述确定数据缓存命中率低的原因的描述仅为举例,其他现有的或今后可能出现的确定数据缓存命中率低的原因如可适用于本申请,也应包含在本申请保护范围以内,并在此以引用方式包含于此。In a preferred embodiment of the apparatus for cache hit ratio analysis of the present application, the second means is for a cumulative number of write events of a certain data (setNotExistCount) and a cumulative number of read failure events (getMissCount) ) is less than the eighth preset threshold, and the difference between the accumulated number of write events (setNotExistCount) and the cumulative number of read failure events (getMissCount) is less than the ninth preset threshold, and the reason for determining that the data cache hit ratio is low is The data accessed is not hot. For example, the cumulative number of read failure events (GetMissCount) of the same type of data prefixed by session in Table 1 is basically 1 or 2, but the total number of totals of the read failure events (GetMissCount) is larger, that is, the same type of data. The number of data in the data is large, and the write event (SetNotExistCount) of each data record is basically 1, indicating The hotspots of this type of data are not high. Those skilled in the art should understand that the above description of determining the reason why the data cache hit rate is low is only an example, and other existing or future possible reasons for determining the data cache hit rate are as applicable to the present application, and should also be included in The scope of the present application is intended to be included herein by reference.
如图7所示,本申请的用于缓存命中率分析的设备一优选的实施例中,所述第一装置1包括:As shown in FIG. 7, in a preferred embodiment of the device for cache hit ratio analysis, the first device 1 includes:
第一一模块11,用于获取每个数据的缓存读取失败事件和其它缓存事件的累计数量;The first module 11 is configured to obtain a cumulative number of cache read failure events and other cache events for each data;
第一二模块12,用于从所有数据中筛选出读取失败事件的累计数量大于第十预设阈值的数据;由于所有数据生成的如上述的Key列表规模会比较庞大,不利于后续分析的效率,所以可按照每条数据的事件记录中读取失败事件的累计数量(GetMissCount)的大小,从大到小筛选前N条大于第十预设阈值的数据,其中,N太小会影响数据准确度,N太大会影响视图展现,所以可以根据数据的大小设置N为默认的值,如100,也就是说选取最多100条数据的事件记录;The first two modules 12 are configured to filter data from all the data that the cumulative number of read failure events is greater than the tenth preset threshold; the size of the Key list generated by all the data is relatively large, which is not conducive to subsequent analysis. Efficiency, so according to the total number of read failure events (GetMissCount) in the event record of each data, the top N data is larger than the tenth preset threshold from the largest to the smallest, where N is too small will affect the data. Accuracy, N is too large to affect the view display, so you can set N to the default value according to the size of the data, such as 100, that is, select an event record of up to 100 data;
第一三模块13,用于按预设分类标准将筛选出的每个数据分到对应的类;The first three modules 13 are configured to classify each of the filtered data into corresponding classes according to a preset classification criterion;
第一四模块14,用于计算每一同类数据的缓存读取失败事件的总和次数;The first four module 14 is configured to calculate a total number of cache read failure events of each type of data;
第一五模块15,用于获取缓存读取失败事件的总和次数高于第一预设阈值的同类数据的事件记录,其中,所述同类数据的事件记录包括该类数据中每个数据的读取失败事件和其它缓存事件的累计数量。在此,如果缓存读取失败事件的总和次数高于第一预设阈值,则可确定该类数据的缓存命中率低,进而可以在后续步骤中判断该类数据的缓存命中率低的原因。缓存读取失败事件的总和次数高于第一预设阈值有三种情况,一种情况是,某类数据中的数据的事件记录的条数很少,但每个数据的缓存读取失 败事件的累计数量很高,导致这些累计数量相加后的缓存读取失败事件的总和次数高于第一预设阈值;第二种情况是,虽然某类数据中每个数据的缓存读取失败事件的累计数量很小,但该类数据中的数据的事件记录的条数很多,导致这些累计数量相加后的缓存读取失败事件的总和次数仍高于第一预设阈值;第三种情况是,综合第一和第二种情况,既有单条数据的缓存读取失败事件的累计数量很高的情形,又有多条数据的缓存读取失败事件的累计数量相加这和很高的情形,最终也导致这些累计数量相加后的缓存读取失败事件的总和次数仍高于第一预设阈值。本领域技术人员应能理解上述获取缓存读取失败事件的总和次数高于第一预设阈值的同类数据的事件记录的描述仅为举例,其他现有的或今后可能出现的获取缓存读取失败事件的总和次数高于第一预设阈值的同类数据的事件记录的描述如可适用于本申请,也应包含在本申请保护范围以内,并在此以引用方式包含于此。The first five module 15 is configured to obtain an event record of the same type of data in which the sum of the cache read failure events is higher than the first preset threshold, wherein the event record of the same type of data includes reading of each data in the type of data. Take the cumulative number of failed events and other cached events. Here, if the total number of cache read failure events is higher than the first preset threshold, it may be determined that the cache hit ratio of the data is low, and the reason why the cache hit ratio of the data is low may be determined in the subsequent step. There are three cases in which the total number of cache read failure events is higher than the first preset threshold. In one case, the number of event records of data in a certain type of data is small, but the cache read of each data is lost. The cumulative number of defeat events is high, and the total number of cache read failure events after the sum of these cumulative numbers is higher than the first preset threshold; the second case is that although each data in a certain type of data is cached The cumulative number of failed events is small, but the number of event records of the data in the data is large, and the total number of cache read failure events after the cumulative number is added is still higher than the first preset threshold; In the case of the first and second cases, the cumulative number of cache read failure events for a single data is high, and the cumulative number of cache read failure events for multiple data is added. In the high case, the total number of cache read failure events that are eventually added to these cumulative quantities is still higher than the first preset threshold. Those skilled in the art should be able to understand that the description of the event record of the same type of data in which the sum of the cache read failure events is higher than the first preset threshold is only an example, and other existing or future acquisition cache read failures may occur. The description of the event record of the same type of data in which the sum of the events is higher than the first predetermined threshold is applicable to the present application and is also included in the scope of the present application and is hereby incorporated by reference.
如图8所示,本申请的用于缓存命中率分析的设备一优选的实施例中,所述第一一模块11包括:As shown in FIG. 8, in a preferred embodiment of the device for cache hit ratio analysis, the first module 11 includes:
第一一一单元111,用于通过回调接口获取每个数据的缓存读取失败事件或其它缓存事件,所述回调接口设置于缓存代码的事件路径上;在此,可以通过回调接口每个数据的缓存读取失败事件或其它缓存事件进行监听,具体可按照事件发生的先后顺序逐条记录下监听到的事件的信息,包括事件的种类是什么如读取失败事件或其它缓存事件,以及事件对应数据的Key是什么,记录方式可以采用文件追加写方式实现,可以在指定的一段时间后会生成一个事件记录文件,由于回调接口设置于缓存代码的事件路径上,只要有事件发生,回调接口都能监听和记录该事件;The first one-to-one unit 111 is configured to obtain a cache read failure event or other cache event of each data through a callback interface, where the callback interface is set on an event path of the cache code; here, each data can be returned through the interface The cache read failure event or other cache event is monitored, and the information of the monitored event may be recorded one by one according to the sequence of occurrence of the event, including what kind of event is such as a read failure event or other cache event, and the event corresponding What is the key of the data, the recording method can be implemented by file append and write mode, and an event log file can be generated after a specified period of time. Since the callback interface is set in the event path of the cache code, as long as an event occurs, the callback interface is Can listen to and record the event;
第一一二单元112,用于计算每个数据的缓存读取失败事件和其它缓存事件的累计数量。在此,可根据上述第一一一单元111生成的事件记录文件的内容汇总计算每个数据的缓存读取失败事件(GetMissCount)的累计 数量和其它缓存事件的累计数量(EvictCount,DeleteExistCount,SetNotExistCount)。例如,可以按照顺序读取事件记录文件,并在内存(或者其他存储介质)中记录对应的Key,并且累计此Key的事件记录次数,记录扫描完成后,会生成一个[Key:EvictCount,DeleteExistCount,GetMissCount,SetNotExistCount]的Key列表,本领域技术人员应能理解上述获取每个数据的缓存读取失败事件和其它缓存事件的累计数量的描述仅为举例,其他现有的或今后可能出现的获取每个数据的缓存读取失败事件和其它缓存事件的累计数量的描述如可适用于本申请,也应包含在本申请保护范围以内,并在此以引用方式包含于此The first one-two unit 112 is configured to calculate a cumulative number of cache read failure events and other cache events for each data. Here, the accumulation of the cache read failure event (GetMissCount) of each data can be calculated according to the content summary of the event record file generated by the first one-unit 111 described above. The cumulative number of quantities and other cached events (EvictCount, DeleteExistCount, SetNotExistCount). For example, the event record file can be read in order, and the corresponding Key is recorded in the memory (or other storage medium), and the number of event records of the key is accumulated. After the record scan is completed, a [Key: EvictCount, DeleteExistCount, The list of Keys of GetMissCount, SetNotExistCount], those skilled in the art should be able to understand that the above description of the cumulative number of cache read failure events and other cache events for each data is only an example, other existing or future acquisitions may occur. A description of the cumulative number of cached read failure events and other cached events of the data, as applicable to the present application, is also intended to be included within the scope of the present application and is incorporated herein by reference.
本申请的用于缓存命中率分析的设备一优选的实施例中,所述预设分类标准包括按数据的功能或按数据的唯一标识(Key)进行分类。缓存系统中的Key一般具有前缀一致性,就是说同一类型的功能会采用同一个前缀表达,以便区分:例如,表1的Key中,带同一前缀的为同一类业务,如item、session、nick等前缀就表示不同的类。本领域技术人员应能理解上述预设分类标准的描述仅为举例,其他现有的或今后可能出现的预设分类标准的描述如可适用于本申请,也应包含在本申请保护范围以内,并在此以引用方式包含于此。In a preferred embodiment of the apparatus for cache hit ratio analysis of the present application, the preset classification criteria include classification according to a function of data or a unique identifier (Key) of data. Keys in the cache system generally have prefix consistency, which means that the same type of function will be expressed by the same prefix to distinguish: for example, in the Key of Table 1, the same type of service with the same prefix, such as item, session, nick Equal prefixes indicate different classes. A person skilled in the art should understand that the description of the foregoing preset classification standard is only an example, and other existing or future possible preset classification standards may be applicable to the present application and should also be included in the scope of protection of the present application. It is hereby incorporated by reference.
本申请的用于缓存命中率分析的设备一优选的实施例中,所述第二装置,用于将获取到的同类数据的事件记录中所有数据按读取失败事件和其它缓存事件的累计数量的大小生成图表,根据所述图表确定缓存命中率低的原因。所图表如有色图、曲线图或柱状图中的任一种;例如,如图5所示,当生成有色图时,可根据数据的Key的字典顺序将Key排列,每行10个,共10行,每个Key对应绘出一个色块,色块的背景颜色深度由该Key对应的数据的读取失败事件的累计数量(GetMissCount)的数值决定;GetMissCount最大的数值定义为正红色(R255,G0,B0),GetMissCount为0 的颜色定义为正绿色(R0,G255,B0),正红色和正绿色之间的中间值为黄色,GetMissCount越大颜色越偏红,公式为:In a preferred embodiment of the apparatus for cache hit ratio analysis, the second apparatus is configured to press all the data in the event record of the acquired similar data according to the cumulative number of read failure events and other cache events. The size of the generated chart, based on the chart to determine the reason for the low cache hit rate. The chart is any one of a colored graph, a graph, or a histogram; for example, as shown in FIG. 5, when generating a colored graph, Keys may be arranged according to the lexicographic order of the Key of the data, 10 per line, for a total of 10 Row, each key correspondingly draws a color block, the background color depth of the color block is determined by the value of the cumulative number of read failure events (GetMissCount) of the data corresponding to the Key; the maximum value of GetMissCount is defined as positive red (R255, G0, B0), GetMissCount is 0 The color is defined as positive green (R0, G255, B0). The middle value between positive red and positive green is yellow. The larger the GetMissCount is, the more reddish the color is. The formula is:
假设整个数列中最大的GetMissCount为MAXAssume that the largest GetMissCount in the entire series is MAX
如果GetMIssCount>=MAX/2,那么If GetMIssCount>=MAX/2, then
R=255;G=255*2*(1-GetMissCount/MAX);B=0;R=255; G=255*2*(1-GetMissCount/MAX); B=0;
如果GetMIssCount<MAX/2,那么If GetMIssCount<MAX/2, then
R=255*(2*GetMissCount/MAX);G=255;B=0;R=255*(2*GetMissCount/MAX); G=255; B=0;
另外,需要在每个色块上标注该色块对应的数据其它缓存事件的累计数量,标注方式可以是先在每个色块上隐藏其它缓存事件的累计数量,然后在选中该色块时显示隐藏的其它缓存事件的累计数量;In addition, it is required to mark the cumulative number of other buffer events corresponding to the data of the color block on each color block, and the labeling manner may be to first hide the accumulated number of other buffer events on each color block, and then display the color block when the color block is selected. The cumulative number of hidden other cached events;
后续可根据生成的图表更直观地得到命中率低的原因。具体的,缓存系统中的Key一般具有前缀一致性,就是说同一类型的功能会采用同一个前缀表达,以便区分:例如,session_312312,session_888544,item_box111,item_box222,因此,如图5所示,可按照Key的字典顺序将数据进行排列,将同一业务功能即同一类的数据色块集中排放在一起。可根据GetMissCount越大,颜色越偏红的原则,或者同一类数据的色块的排列面积较大的原则,判断为命中率低的色块,然后针对命中率低的色块,根据每个色块上标注该色块对应的数据其它缓存事件的累计数量,便可以轻松的找到命中率低的原因。本领域技术人员应能理解上述确定数据缓存命中率低的原因的描述仅为举例,其他现有的或今后可能出现的确定数据缓存命中率低的原因如可适用于本申请,也应包含在本申请保护范围以内,并在此以引用方式包含于此。Subsequently, the reason for the low hit rate can be obtained more intuitively based on the generated chart. Specifically, the Key in the cache system generally has prefix consistency, that is, the same type of function is expressed by the same prefix to distinguish: for example, session_312312, session_888544, item_box111, item_box222, therefore, as shown in FIG. 5, according to Key's lexicographic order arranges the data and condenses the same business function, that is, the same type of data color blocks. According to the principle that the larger the GetMissCount is, the more reddish the color is, or the larger the arrangement area of the color blocks of the same type of data, the color block with a low hit rate is determined, and then the color block with a low hit rate is determined according to each color. The cumulative number of other cache events on the block labeled with the color block can easily find the reason for the low hit rate. Those skilled in the art should understand that the above description of determining the reason why the data cache hit rate is low is only an example, and other existing or future possible reasons for determining the data cache hit rate are as applicable to the present application, and should also be included in The scope of the present application is intended to be included herein by reference.
综上所述,本申请根据某类数据缓存读取失败事件的总和次数得到存在缓存命中率低的数据,根据存在缓存命中率低的数据的读取失败事件和其它缓存事件的累计数量,可以有效确定缓存命中率低的原因,有助于后续根据该原因改善缓存代码的质量,提升整体系统性能。In summary, the present application obtains data with a low cache hit ratio according to the total number of data cache read failure events, and according to the cumulative number of read failure events and other cache events with low cache hit ratio, Effectively determining the reason for the low cache hit rate helps to improve the quality of the cache code and improve overall system performance.
进一步的,本申请根据可每个数据的读取失败事件(GetMiss)的累计 数量与删除事件(DeleteExist)、写入事件(SetNotExist)和淘汰事件(Evict)的累计数量中至少一项的组合即可有效地确定该数据缓存命中率低的原因。Further, the present application is based on the accumulation of a read failure event (GetMiss) that can be used for each data. The combination of the quantity and the cumulative number of delete events (DeleteExist), write events (SetNotExist), and elimination events (Evict) can effectively determine the reason why the data cache hit rate is low.
进一步的,本申请通过回调接口能够精确地监听和记录所有数据的事件,后续可根据记录的数据的事件汇总得到每个数据的缓存读取失败事件和其它缓存事件的累计数量。Further, the present application can accurately monitor and record events of all data through a callback interface, and subsequently obtain a cumulative number of cache read failure events and other cache events for each data according to the event of the recorded data.
进一步的,本申请将获取到的同类数据的事件记录中所有数据按读取失败事件和其它缓存事件的累计数量的大小生成图表,可根据生成的图表更直观地得到命中率低的原因。Further, the present application generates a graph according to the total number of read failure events and other cache events in the event record of the same type data obtained by the present application, and can more intuitively obtain the reason of the low hit rate according to the generated graph.
显然,本领域的技术人员可以对本申请进行各种改动和变型而不脱离本申请的精神和范围。这样,倘若本申请的这些修改和变型属于本申请权利要求及其等同技术的范围之内,则本申请也意图包含这些改动和变型在内。It will be apparent to those skilled in the art that various modifications and changes can be made in the present application without departing from the spirit and scope of the application. Thus, it is intended that the present invention cover the modifications and variations of the present invention.
需要注意的是,本申请可在软件和/或软件与硬件的组合体中被实施,例如,可采用专用集成电路(ASIC)、通用目的计算机或任何其他类似硬件设备来实现。在一个实施例中,本申请的软件程序可以通过处理器执行以实现上文所述步骤或功能。同样地,本申请的软件程序(包括相关的数据结构)可以被存储到计算机可读记录介质中,例如,RAM存储器,磁或光驱动器或软磁盘及类似设备。另外,本申请的一些步骤或功能可采用硬件来实现,例如,作为与处理器配合从而执行各个步骤或功能的电路。It should be noted that the present application can be implemented in software and/or a combination of software and hardware, for example, using an application specific integrated circuit (ASIC), a general purpose computer, or any other similar hardware device. In one embodiment, the software program of the present application can be executed by a processor to implement the steps or functions described above. Likewise, the software programs (including related data structures) of the present application can be stored in a computer readable recording medium such as a RAM memory, a magnetic or optical drive or a floppy disk and the like. In addition, some of the steps or functions of the present application may be implemented in hardware, for example, as a circuit that cooperates with a processor to perform various steps or functions.
另外,本申请的一部分可被应用为计算机程序产品,例如计算机程序指令,当其被计算机执行时,通过该计算机的操作,可以调用或提供根据本申请的方法和/或技术方案。而调用本申请的方法的程序指令,可能被存储在固定的或可移动的记录介质中,和/或通过广播或其他信号承载媒体中的数据流而被传输,和/或被存储在根据所述程序指令运行的计算机设备的工作存储器中。在此,根据本申请的一个实施例包括一个装置,该装置包 括用于存储计算机程序指令的存储器和用于执行程序指令的处理器,其中,当该计算机程序指令被该处理器执行时,触发该装置运行基于前述根据本申请的多个实施例的方法和/或技术方案。In addition, a portion of the present application can be applied as a computer program product, such as computer program instructions, which, when executed by a computer, can invoke or provide a method and/or technical solution in accordance with the present application. The program instructions for invoking the method of the present application may be stored in a fixed or removable recording medium, and/or transmitted by a data stream in a broadcast or other signal bearing medium, and/or stored in a The working memory of the computer device in which the program instructions are run. Here, an embodiment according to the present application includes a device, the device package A memory for storing computer program instructions and a processor for executing program instructions, wherein when the computer program instructions are executed by the processor, the device is triggered to operate based on the foregoing methods and embodiments according to various embodiments of the present application / or technical solutions.
对于本领域技术人员而言,显然本申请不限于上述示范性实施例的细节,而且在不背离本申请的精神或基本特征的情况下,能够以其他的具体形式实现本申请。因此,无论从哪一点来看,均应将实施例看作是示范性的,而且是非限制性的,本申请的范围由所附权利要求而不是上述说明限定,因此旨在将落在权利要求的等同要件的含义和范围内的所有变化涵括在本申请内。不应将权利要求中的任何附图标记视为限制所涉及的权利要求。此外,显然“包括”一词不排除其他单元或步骤,单数不排除复数。装置权利要求中陈述的多个单元或装置也可以由一个单元或装置通过软件或者硬件来实现。第一,第二等词语用来表示名称,而并不表示任何特定的顺序。 It is obvious to those skilled in the art that the present application is not limited to the details of the above-described exemplary embodiments, and the present invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the present application. Therefore, the present embodiments are to be considered as illustrative and not restrictive, and the scope of the invention is defined by the appended claims instead All changes in the meaning and scope of equivalent elements are included in this application. Any reference signs in the claims should not be construed as limiting the claim. In addition, it is to be understood that the word "comprising" does not exclude other elements or steps. A plurality of units or devices recited in the device claims may also be implemented by a unit or device by software or hardware. The first, second, etc. words are used to denote names and do not denote any particular order.

Claims (20)

  1. 一种缓存命中率分析的方法,其中,包括:A method for cache hit rate analysis, which includes:
    获取缓存读取失败事件的总和次数高于第一预设阈值的同类数据的事件记录;Obtaining an event record of the same type of data whose cache read failure event is higher than the first preset threshold;
    根据获取到的同类数据的事件记录中每个数据的读取失败事件和其它缓存事件的累计数量确定该数据缓存命中率低的原因。The reason why the data cache hit rate is low is determined according to the cumulative number of read failure events and other cache events of each data in the event record of the acquired similar data.
  2. 如权利要求1所述的方法,其中,所述其它缓存事件包括删除事件、写入事件和淘汰事件中的一种或任意组合。The method of claim 1 wherein said other cache events comprise one or any combination of a delete event, a write event, and a retirement event.
  3. 如权利要求2所述的方法,其中,根据获取到的同类数据的事件记录中每个数据的读取失败事件和其它缓存事件的累计数量确定该数据缓存命中率低的原因,包括:The method according to claim 2, wherein the reason why the data cache hit rate is low is determined according to the cumulative number of read failure events and other cache events of each data in the event record of the acquired homogeneous data, including:
    当某个数据的删除事件和读取失败事件的累计数量均大于第二预设阈值,且删除事件的累计数量与读取失败事件的累计数量的差值小于第三预设阈值,则确定该数据缓存命中率低的原因为数据被主动删除。When the cumulative number of deletion events and read failure events of a certain data is greater than a second preset threshold, and the difference between the cumulative number of deletion events and the cumulative number of read failure events is less than a third preset threshold, determining The reason for the low data cache hit rate is that the data is actively deleted.
  4. 如权利要求2或3所述的方法,其中,根据获取到的同类数据的事件记录中每个数据的读取失败事件和其它缓存事件的累计数量确定该数据缓存命中率低的原因,包括:The method according to claim 2 or 3, wherein the reason why the data cache hit rate is low is determined according to the cumulative number of read failure events and other cache events of each data in the event record of the acquired homogeneous data, including:
    当某个数据的读取失败事件的累计数量大于第四预设阈值,且读取失败事件的累计数量与写入事件的累计数量的差值大于第五预设阈值,则确定该数据缓存命中率低的原因为访问的数据不存在。When the accumulated number of read failure events of a certain data is greater than a fourth preset threshold, and the difference between the cumulative number of read failure events and the accumulated number of write events is greater than a fifth preset threshold, determining that the data cache hits The reason for the low rate is that the accessed data does not exist.
  5. 如权利要求2至4任一项所述的方法,其中,根据获取到的同类数据的事件记录中每个数据的读取失败事件和其它缓存事件的累计数量确定该数据缓存命中率低的原因,包括:The method according to any one of claims 2 to 4, wherein the reason why the data cache hit rate is low is determined based on the cumulative number of read failure events and other cache events of each data in the event record of the acquired homogeneous data. ,include:
    当某个数据的淘汰事件和读取失败事件的累计数量均大于第六预设阈值,且淘汰事件的累计数量和读取失败事件的累计数量的差值小于第七预设阈值,则确定该数据缓存命中率低的原因为缓存容量不足。 When the cumulative number of the defunct event and the read failure event of a certain data is greater than the sixth preset threshold, and the difference between the cumulative number of the culling event and the accumulated number of the read failure event is less than the seventh preset threshold, determining the The reason for the low data cache hit rate is that the cache capacity is insufficient.
  6. 如权利要求2至5任一项所述的方法,其中,根据获取到的同类数据的事件记录中每个数据的读取失败事件和其它缓存事件的累计数量确定该数据缓存命中率低的原因,包括:The method according to any one of claims 2 to 5, wherein the reason why the data cache hit rate is low is determined based on the cumulative number of read failure events and other cache events of each data in the event record of the acquired homogeneous data. ,include:
    当某个数据的写入事件和读取失败事件的累计数量均小于第八预设阈值,且写入事件的累计数量与读取失败事件的累计数量差值小于第九预设阈值,则确定该数据缓存命中率低的原因为访问的数据不具有热点性。When the cumulative number of the write event and the read failure event of a certain data is less than the eighth preset threshold, and the difference between the accumulated number of the write event and the accumulated number of the read failure event is less than the ninth preset threshold, then determining The reason why the data cache hit rate is low is that the accessed data is not hot.
  7. 如权利要求1至6任一项所述的方法,其中,获取缓存读取失败事件的总和次数高于第一预设阈值的同类数据的事件记录,包括:The method according to any one of claims 1 to 6, wherein the event record of the same type of data in which the total number of times of the cache read failure event is higher than the first preset threshold is obtained, including:
    获取每个数据的缓存读取失败事件和其它缓存事件的累计数量;Get the cumulative number of cache read failure events and other cache events for each data;
    从所有数据中筛选出读取失败事件的累计数量大于第十预设阈值的数据;Filtering data from all the data that the cumulative number of read failure events is greater than the tenth preset threshold;
    按预设分类标准将筛选出的每个数据分到对应的类;Each of the filtered data is assigned to a corresponding class according to a preset classification criterion;
    计算每一同类数据的缓存读取失败事件的总和次数;Calculate the total number of cache read failure events for each type of data;
    获取缓存读取失败事件的总和次数高于第一预设阈值的同类数据的事件记录,其中,所述同类数据的事件记录包括该类数据中每个数据的读取失败事件和其它缓存事件的累计数量。Obtaining an event record of the same type of data whose sum of cache read failure events is higher than a first preset threshold, wherein the event record of the same type of data includes a read failure event of each data in the type of data and other cache events The cumulative quantity.
  8. 如权利要求7所述的方法,其中,获取每个数据的缓存读取失败事件和其它缓存事件的累计数量,包括:The method of claim 7 wherein obtaining a cumulative number of cache read failure events and other cache events for each of the data comprises:
    通过回调接口获取每个数据的缓存读取失败事件或其它缓存事件,所述回调接口设置于缓存代码的事件路径上;Obtaining a cache read failure event or other cache event for each data through a callback interface, the callback interface being disposed on an event path of the cache code;
    计算每个数据的缓存读取失败事件和其它缓存事件的累计数量。Calculates the cumulative number of cache read failure events and other cache events for each data.
  9. 如权利要求7或8所述的方法,其中,所述预设分类标准包括按数据的功能或按数据的唯一标识进行分类。The method of claim 7 or 8, wherein the predetermined classification criteria comprises classification by function of data or by unique identification of data.
  10. 如权利要求1或2任一项所述的方法,其中,根据获取到的同类数据的事件记录中每个数据的读取失败事件和其它缓存事件的累计数量确定该数据缓存命中率低的原因,包括: The method according to any one of claims 1 to 2, wherein the reason why the data cache hit rate is low is determined based on the cumulative number of read failure events and other cache events of each data in the event record of the acquired homogeneous data. , including:
    将获取到的同类数据的事件记录中所有数据按读取失败事件和其它缓存事件的累计数量的大小生成图表;All the data in the event record of the acquired similar data is generated according to the size of the cumulative number of read failure events and other cache events;
    根据所述图表确定缓存命中率低的原因。The reason for the low cache hit ratio is determined based on the chart.
  11. 一种用于缓存命中率分析的设备,其中,包括:A device for cache hit ratio analysis, including:
    第一装置,用于获取缓存读取失败事件的总和次数高于第一预设阈值的同类数据的事件记录;a first device, configured to acquire an event record of the same type of data whose cache read failure event is higher than a first preset threshold;
    第二装置,用于根据获取到的同类数据的事件记录中每个数据的读取失败事件和其它缓存事件的累计数量确定该数据缓存命中率低的原因。And a second device, configured to determine, according to the accumulated number of read failure events and other cache events of each data in the event record of the acquired similar data, the reason why the data cache hit rate is low.
  12. 如权利要求11所述的设备,其中,所述其它缓存事件包括删除事件、写入事件和淘汰事件中的一种或任意组合。The device of claim 11 wherein the other cache events comprise one or any combination of a delete event, a write event, and a retirement event.
  13. 如权利要求12所述的设备,其中,所述第二装置,用于当某个数据的删除事件和读取失败事件的累计数量均大于第二预设阈值,且删除事件的累计数量与读取失败事件的累计数量的差值小于第三预设阈值,则确定该数据缓存命中率低的原因为数据被主动删除。The device according to claim 12, wherein said second means is configured to: when the cumulative number of deletion events and read failure events of a certain data are greater than a second predetermined threshold, and the cumulative number of deletion events and reading If the difference between the cumulative number of failed events is less than the third preset threshold, it is determined that the data cache hit rate is low because the data is actively deleted.
  14. 如权利要求12或13所述的设备,其中,所述第二装置,用于当某个数据的读取失败事件的累计数量大于第四预设阈值,且读取失败事件的累计数量与写入事件的累计数量的差值大于第五预设阈值,则确定该数据缓存命中率低的原因为访问的数据不存在。The device according to claim 12 or 13, wherein the second means is configured to: when the cumulative number of read failure events of a certain data is greater than a fourth preset threshold, and the cumulative number and write of the read failure events If the difference between the accumulated number of incoming events is greater than the fifth preset threshold, it is determined that the data cache hit rate is low because the accessed data does not exist.
  15. 如权利要求12至14任一项所述的设备,其中,所述第二装置,用于当某个数据的淘汰事件和读取失败事件的累计数量均大于第六预设阈值,且淘汰事件的累计数量和读取失败事件的累计数量的差值小于第七预设阈值,则确定该数据缓存命中率低的原因为缓存容量不足。The device according to any one of claims 12 to 14, wherein the second device is configured to: when the cumulative number of the elimination events and the read failure events of a certain data are greater than a sixth preset threshold, and the elimination event The difference between the cumulative number of the cumulative number and the cumulative number of read failure events is less than the seventh predetermined threshold, and the reason for determining that the data cache hit rate is low is that the cache capacity is insufficient.
  16. 如权利要求12至15任一项所述的设备,其中,所述第二装置,用于当某个数据的写入事件和读取失败事件的累计数量均小于第八预设阈值,且写入事件的累计数量与读取失败事件的累计数量差值小于第九预设阈值,则确定该数据缓存命中率低的原因为访问的数据不具有热点性。 The device according to any one of claims 12 to 15, wherein the second means is configured to write when a cumulative number of write events and read failure events of a certain data is less than an eighth preset threshold If the difference between the cumulative number of incoming events and the cumulative number of read failed events is less than the ninth preset threshold, then the reason for determining that the data cache hit rate is low is that the accessed data does not have hotspots.
  17. 如权利要求11至16任一项所述的设备,其中,所述第一装置包括:The apparatus of any of claims 11 to 16, wherein the first device comprises:
    第一一模块,用于获取每个数据的缓存读取失败事件和其它缓存事件的累计数量;The first module is configured to obtain a cumulative number of cache read failure events and other cache events for each data;
    第一二模块,用于从所有数据中筛选出读取失败事件的累计数量大于第十预设阈值的数据;The first two modules are configured to filter, from all data, data that the cumulative number of read failure events is greater than a tenth preset threshold;
    第一三模块,用于按预设分类标准将筛选出的每个数据分到对应的类;The first three modules are configured to classify each of the filtered data into corresponding classes according to a preset classification criterion;
    第一四模块,用于计算每一同类数据的缓存读取失败事件的总和次数;The first four modules are used to calculate the total number of cache read failure events of each type of data;
    第一五模块,用于获取缓存读取失败事件的总和次数高于第一预设阈值的同类数据的事件记录,其中,所述同类数据的事件记录包括该类数据中每个数据的读取失败事件和其它缓存事件的累计数量。a first fifth module, configured to obtain an event record of the same type of data whose cache read failure event is higher than a first preset threshold, wherein the event record of the same type data includes reading of each data in the type of data The cumulative number of failed events and other cached events.
  18. 如权利要求17所述的设备,其中,所述第一一模块包括:The device of claim 17 wherein said first module comprises:
    第一一一单元,用于通过回调接口获取每个数据的缓存读取失败事件或其它缓存事件,所述回调接口设置于缓存代码的事件路径上;a first one unit for obtaining a cache read failure event or other cache event of each data through a callback interface, where the callback interface is disposed on an event path of the cache code;
    第一一二单元,用于计算每个数据的缓存读取失败事件和其它缓存事件的累计数量。The first one or two units are used to calculate the cumulative number of cache read failure events and other cache events for each data.
  19. 如权利要求17或18所述的设备,其中,所述预设分类标准包括按数据的功能或按数据的唯一标识进行分类。The device of claim 17 or 18, wherein the predetermined classification criteria comprises classification by function of data or by unique identification of data.
  20. 如权利要求11或12任一项所述的设备,其中,所述第二装置,用于将获取到的同类数据的事件记录中所有数据按读取失败事件和其它缓存事件的累计数量的大小生成图表,根据所述图表确定缓存命中率低的原因。 The device according to any one of claims 11 or 12, wherein the second means is configured to press all the data in the event record of the acquired similar data according to the cumulative number of read failure events and other cache events. Generate a chart to determine why the cache hit rate is low based on the chart.
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