WO2016161751A1 - 一种同步网的配置方法和装置 - Google Patents

一种同步网的配置方法和装置 Download PDF

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Publication number
WO2016161751A1
WO2016161751A1 PCT/CN2015/088149 CN2015088149W WO2016161751A1 WO 2016161751 A1 WO2016161751 A1 WO 2016161751A1 CN 2015088149 W CN2015088149 W CN 2015088149W WO 2016161751 A1 WO2016161751 A1 WO 2016161751A1
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WO
WIPO (PCT)
Prior art keywords
ring
node
clock
external clock
injection
Prior art date
Application number
PCT/CN2015/088149
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English (en)
French (fr)
Inventor
罗彬�
Original Assignee
中兴通讯股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 中兴通讯股份有限公司 filed Critical 中兴通讯股份有限公司
Priority to US15/565,032 priority Critical patent/US20180123717A1/en
Priority to EP15888305.8A priority patent/EP3282605B1/en
Publication of WO2016161751A1 publication Critical patent/WO2016161751A1/zh

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0635Clock or time synchronisation in a network
    • H04J3/0679Clock or time synchronisation in a network by determining clock distribution path in a network
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0635Clock or time synchronisation in a network
    • H04J3/0638Clock or time synchronisation among nodes; Internode synchronisation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/42Loop networks
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/12Discovery or management of network topologies
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/42Loop networks
    • H04L2012/421Interconnected ring systems
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W56/00Synchronisation arrangements
    • H04W56/001Synchronization between nodes
    • H04W56/002Mutual synchronization

Definitions

  • This document relates to, but is not limited to, the field of communication technologies, and in particular, to a synchronization network configuration method, apparatus, and computer readable storage medium.
  • Synchronous network one of the supporting systems for telecommunication network operation, provides synchronous control signals for the telecommunication equipment clock (or carrier) in the telecommunication network to synchronize its working speed.
  • Synchronous network is an indispensable and important part of the telecommunication network. It is the key to ensuring the network timing performance and ensuring the smooth development of the service.
  • SDH Serial Digital Hierarchy
  • ATM Asynchronous Transfer Mode
  • CDMA Code Division Multiple Access
  • IP Internet Protocol
  • the embodiment of the invention provides a method for configuring a synchronization network, including:
  • the synchronization network is clocked according to the determined information.
  • the synchronization network When the synchronization network includes a ring that is injected by a single clock, it is clocked in a ring manner, including:
  • the ring working clock extraction direction is clockwise or counterclockwise.
  • the ring is a single ring
  • the ring is interconnected with at least one other ring, and a non-interconnected node in the ring has an external clock injection;
  • the ring is interconnected with at least another ring, and the other ring has an external clock injection except for the other node of the ring, and the ring and all the interconnected nodes of the other ring are regarded as having outside the ring.
  • the synchronization network When the synchronization network includes a ring that is injected by an external clock, it is clocked in a ring manner, including:
  • the working clock of the ring is extracted clockwise or counterclockwise;
  • the usage state of the two nodes injected with the external clock in the ring is configured as a master and a standby, and the external node is configured to extract the external clock, and the clock is extracted from the adjacent node on one side thereof, and the direction and the ring working clock are extracted. Extracting a link with the opposite direction; configuring an external clock for the standby node, and extracting a clock from the adjacent node of one side and extracting a link with the same direction as the ring working clock extraction direction, the link is The pumped clock is configured as a working clock.
  • the ring is a single ring
  • the ring is interconnected with at least another ring, and the two non-interconnected nodes of the ring have an external clock injection;
  • the ring is interconnected with at least one other ring, and the other nodes have external clock injection except for the interconnected nodes, and all the interconnected nodes of the ring and the other ring are regarded as having an external clock in the ring.
  • the ring is interconnected with at least two other rings, and the other two rings have external clock injections other than the nodes interconnected with the ring, and the ring and all the interconnected nodes of each of the other two rings
  • the node is considered to have an external clock injection in the ring, and the configuration is performed on the ring; wherein each node that is considered to be in use is different in the two rings to which it belongs.
  • the method further includes:
  • the synchronization network When the synchronization network includes a ring for single-point injection of an external clock, it is clocked in the shortest path manner, including:
  • the extracted clock of the link on the shortest path is configured as the working clock.
  • the ring is a single ring
  • the ring is interconnected with at least one other ring, and a non-interconnecting node of the ring has an external clock injection;
  • the ring is interconnected with at least one other point of the ring.
  • the other ring has an external clock injection except for the other nodes of the ring, and the interconnect node is a node with an external clock injection in the ring.
  • the clock is configured in the shortest path manner, including:
  • the extracted clock of the link on the shortest path is configured as the working clock.
  • a link that draws a clock from at least one of its neighboring nodes including: when there is a common adjacent node between the two nodes, A node that only configures one link that draws clocks from non-common neighbors.
  • the ring is a single ring
  • the ring is interconnected with at least another ring, and the other ring has an external clock injection except for the other node of the ring, and the two interconnected nodes of the ring and the other ring have Two nodes injected by the external clock.
  • the synchronization network includes two rings that are interconnected. When a node other than the nodes connected to the two rings has an external clock injection, the two rings are clocked in the shortest path manner, including:
  • the node For each non-interconnecting node of the two rings, determine the node to the outer ring with the outer clock injection in the ring
  • the shortest path of the point the node is configured with two links that draw clocks from adjacent nodes on both sides, and the extracted clock of the link located on the shortest path is configured as an operating clock;
  • an external clock is configured, and two links that draw clocks from adjacent nodes on both sides are configured.
  • the clock is configured for the chain, including:
  • Each node in the chain without external clock injection is configured with a link that draws a clock from an adjacent node of the one side, and the adjacent node on the one side refers to a neighboring node that is closest to the node with the external clock injection in the ring. .
  • the embodiment of the invention further provides a synchronization network configuration apparatus, including:
  • An information collecting module is configured to determine at least the following information: a topology of the synchronous network; a number of external clocks enabled by the synchronous network;
  • the clock configuration module is configured to clock the synchronization network according to the determined information.
  • the synchronization network includes a ring when the external clock is single-point injected
  • the clock configuration module configures the ring in a ring manner, including:
  • a first configuration unit configured to configure an external clock for a node injected with an external clock in the ring
  • the second configuration unit is configured to configure, for each node that has no external clock injection in the ring, to configure two links that are clocked from adjacent nodes on both sides, and to extract the same direction as the set ring working clock extraction direction.
  • the pumping clock is configured as an operating clock, and the ring operating clock is extracted clockwise or counterclockwise.
  • the ring is a single ring
  • the ring is interconnected with at least one other ring, and a non-interconnected node in the ring has an external clock injection;
  • the ring is interconnected with at least another ring, and the other ring has an external clock injection except for the other node of the ring, and the configuration module regards the ring and all the interconnected nodes of the other ring as the Ring There is a node with an external clock injection, and the clock is configured for the ring.
  • the synchronization network includes a ring when the external clock is double-injected
  • the clock configuration module configures the ring in a ring manner, including:
  • the first configuration unit is configured to configure, for each node that has no external clock injection in the ring, to configure two links that are clocked from adjacent nodes on both sides, and to extract the same direction as the set ring working clock extraction direction.
  • the pumping clock is configured as an operating clock, and the working clock of the ring is extracted clockwise or counterclockwise;
  • the second configuration unit is configured to configure a usage state of the two nodes injected with the external clock in the ring as a master and a standby, configure an external clock to the primary node, and configure a clock from the adjacent node of the one side. And extracting a link whose direction is opposite to the direction in which the ring working clock is extracted; for the standby node, configuring the extracted external clock, and extracting a clock from the adjacent node of one side thereof and extracting a link with the same direction as the extraction direction of the ring working clock, The extracted clock of the link is configured as an operating clock.
  • the ring is a single ring
  • the ring is interconnected with at least another ring, and the two non-interconnected nodes of the ring have an external clock injection;
  • the ring is interconnected with at least one other ring, and other nodes in the two rings have external clock injection except for the interconnected nodes, and the clock configuration module regards the ring and all interconnected nodes of the other ring as the A node in the ring that has an external clock injection, and the ring is clocked; wherein the node that is considered to be in use is different in the two rings; or
  • the ring is interconnected with at least two other rings, and the other two rings have external clock injections other than the nodes interconnected with the ring, and the clock configuration module connects the ring to each of the other two rings. All the interconnected nodes of the ring are regarded as one node with external clock injection in the ring, and the configuration is performed on the ring; wherein each node that is considered to be in use is different in the two rings to which it belongs.
  • the node to be considered includes two interconnected nodes.
  • the clock configuration module further includes:
  • a third configuration unit configured to determine that the usage status of the two interconnected nodes belongs to the standby master a link between the two interconnected nodes, or a link in which the clock extraction direction is the same as the direction in which the active clock is extracted, and the direction of the extraction and the direction of the active clock of the primary ring are extracted.
  • the same pumped clock is used as the operating clock.
  • the synchronization network includes a ring when the external clock is single-point injected
  • the clock configuration module configures the ring according to the shortest path mode, including:
  • a first configuration unit configured to configure an external clock for a node injected with an external clock in the ring
  • a second configuration unit configured to determine, for each node that has no external clock injection in the ring, determine a shortest path of the node to a node with an external clock injection, and configure the node to extract two clocks from adjacent nodes on both sides thereof
  • the link configures the extracted clock of the link located on the shortest path as an operating clock.
  • the ring is a single ring
  • the ring is interconnected with at least one other ring, and a non-interconnecting node of the ring has an external clock injection;
  • the ring is interconnected with at least one other point of the ring.
  • the other ring has an external clock injection except for the other nodes of the ring, and the interconnect node is a node with an external clock injection in the ring.
  • the synchronization network includes a single ring when the external clock is double-injected
  • the clock configuration module configures the ring according to the shortest path mode, including:
  • a first configuration unit configured to configure an external clock for each node having an external clock injection in the ring, and configured at least one link that draws a clock from an adjacent node on one side thereof;
  • a second configuration unit configured to determine, for each node that has no external clock injection in the ring, determine a shortest path of the node to a node with an external clock injection, and configure the node to extract two clocks from adjacent nodes on both sides thereof
  • the link configures the extracted clock of the link located on the shortest path as an operating clock.
  • the first configuration unit configures, for each node in the ring with an external clock injection, a link that draws a clock from at least one of its adjacent nodes, including: a common adjacent node between the two nodes At the point, for each of these nodes, only one link that draws clocks from non-common neighbors is configured.
  • the ring is a single ring
  • the ring is interconnected with at least another ring, and the other ring has an external clock injection except for the other node of the ring, and the two interconnected nodes of the ring and the other ring have Two nodes injected by the external clock.
  • the synchronization network includes two rings interconnected, and one node of each ring except the node interconnected by the two rings has an external clock injection;
  • the clock configuration module performs clock configuration on the two rings in a shortest path manner, including:
  • a first configuration unit configured to determine, for each of the two interconnected nodes, a shortest path from the node to a node having an outer clock injection in the two rings, configured for the node to be drawn from each of its neighboring nodes a plurality of links of the clock, configured as a working clock of the link of the link located on the shortest path;
  • a second configuration unit configured to determine, for each non-interconnecting node of the two rings, a shortest path of the node to a node having an external clock injection in the ring, and configuring the node to extract clocks from adjacent nodes on both sides thereof
  • Two links configured as an active clock of the link of the link located on the shortest path;
  • the third configuration unit is configured to configure an external clock for each node that has an external clock injection to the two rings, and configure two links that draw clocks from adjacent nodes on both sides thereof.
  • the synchronization network includes a chain of single-point injection of an external clock
  • the clock configuration module performs clock configuration on the chain, including:
  • a first configuration unit configured to configure an external clock to a node injected with an external clock in the chain
  • a second configuration unit configured to configure, for each node in the chain without an external clock injection, a link that draws a clock from an adjacent node of the one side, and the adjacent node on the one side has an external clock injection from the ring.
  • the nearest neighbor of the node configured to configure, for each node in the chain without an external clock injection, a link that draws a clock from an adjacent node of the one side, and the adjacent node on the one side has an external clock injection from the ring. The nearest neighbor of the node.
  • the embodiment of the present invention further provides a computer readable storage medium, which stores program instructions, and when the program instructions are executed by the processor, can implement a synchronization network configuration method provided by an embodiment of the present invention.
  • the foregoing solution implements a clock configuration of a synchronous network injected into various topologies and clock sources, and has at least one of the following advantages: simple, reliable, and avoiding clock ringing.
  • FIGS. 1 to 12 are diagrams showing an example of a clock configuration of Examples 1-12 of the present invention.
  • FIG. 13 is a flow chart of a method according to an embodiment of the present invention.
  • Figure 14 is a block diagram of an apparatus in accordance with an embodiment of the present invention.
  • the synchronization network mentioned herein may be an entire network or a local network. Topologically, it may be a single ring (not interconnected with other rings) or multiple rings. , chain or combination of them, etc.
  • the method for configuring a synchronization network in this embodiment includes:
  • Step 110 Determine at least the following information: a topology of the synchronization network; a number of external clocks enabled by the synchronization network;
  • Step 120 Perform clock configuration on the synchronization network according to the determined information.
  • the embodiment further provides a configuration device for the synchronization network, as shown in FIG. 14, comprising:
  • the information collecting module 10 is configured to determine at least the following information: a topology of the synchronization network; a number of external clocks enabled by the synchronization network;
  • the clock configuration module 20 is configured to clock the synchronization network according to the determined information.
  • the ring and the chain are included, wherein the ring is further divided into a single ring or multiple rings of interconnection.
  • the enabled external clock can be injected from a single node of the ring (single-point injection) or multiple node injection (such as double-point injection).
  • the so-called external clock is a clock extracted from the outside of the ring.
  • the clock extracted by the interconnect node from one ring may be the outer clock of the other ring.
  • the synchronization network of this embodiment includes a ring for single-point injection of an external clock, and performs clock configuration on the ring, including:
  • the ring working clock extraction direction is clockwise or counterclockwise.
  • the clock configuration module in this embodiment configures the ring according to the ring mode, including:
  • a first configuration unit configured to configure an external clock for a node injected with an external clock in the ring
  • the second configuration unit is configured to configure, for each node that has no external clock injection in the ring, to configure two links that are clocked from adjacent nodes on both sides, and to extract the same direction as the set ring working clock extraction direction.
  • the pumping clock is configured as an operating clock, and the ring operating clock is extracted clockwise or counterclockwise.
  • the ring is a single ring
  • the ring is interconnected with at least one other ring, and a non-interconnected node in the ring has an external clock note.
  • the ring is interconnected with at least another ring, and the other ring has an external clock injection except for the other node of the ring, and the ring and all the interconnected nodes of the other ring are regarded as the There is a node in the ring with an external clock injection.
  • the synchronization network in this embodiment includes a ring that is injected by an external clock and is clocked in a ring manner, including:
  • the working clock of the ring is extracted clockwise or counterclockwise;
  • the usage state of the two nodes injected with the external clock in the ring is configured as a master and a standby, and the external node is configured to extract the external clock, and the clock is extracted from the adjacent node on one side thereof, and the direction and the ring working clock are extracted. Extracting a link with the opposite direction; configuring the external clock to the standby node, and extracting a clock from the adjacent node on one side and extracting a link with the same direction as the ring working clock extraction direction, and configuring the extracted clock of the link For the working clock.
  • the clock configuration module in this embodiment configures the ring according to the ring mode, including:
  • the first configuration unit is configured to configure, for each node that has no external clock injection in the ring, to configure two links that are clocked from adjacent nodes on both sides, and to extract the same direction as the set ring working clock extraction direction.
  • the pumping clock is configured as an operating clock, and the working clock of the ring is extracted clockwise or counterclockwise;
  • the second configuration unit is configured to configure a usage state of the two nodes injected with the external clock in the ring as a master and a standby, configure an external clock to the primary node, and configure a clock from the adjacent node of the one side. And extracting a link whose direction is opposite to the direction in which the ring working clock is extracted; for the standby node, configuring the extracted external clock, and extracting a clock from the adjacent node of one side thereof and extracting a link with the same direction as the extraction direction of the ring working clock, The extracted clock of the link is configured as an operating clock.
  • the ring is a single ring
  • the ring is interconnected with at least another ring, and the two non-interconnected nodes of the ring have an external clock injection;
  • the ring is interconnected with at least one other ring. All the nodes in the two rings except the interconnected nodes have external clock injection, and all the interconnected nodes of the ring and the other ring are regarded as the ring.
  • a node with an external clock injection the clock is configured for the ring; wherein the node that is considered to be in a different state of use in the two rings; the use state refers to the primary or standby;
  • the ring is interconnected with at least two other rings, and the other two rings have external clock injections other than the nodes interconnected with the ring, and the ring and each of the other two rings All interconnected nodes are considered as a node with an external clock injection in the ring, and the configuration is performed on the ring; wherein each node that is considered to be in use is different in the two rings to which it belongs.
  • the method further includes: determining that the usage state to which the two interconnected nodes belong is a standby primary ring; configuring a bidirectional clocked clock between the two interconnected nodes The two links, or a link configured with the same clock extraction direction as the active clock extraction direction of the primary ring, extracts the extracted clock with the same direction as the active clock extraction direction of the primary ring as the working clock.
  • the clock configuration module further includes: a third configuration unit, configured to determine that the usage state to which the two interconnection nodes belong is a standby primary ring; and configure two chains of the bidirectionally extracted clock between the two interconnection nodes
  • the path, or a link in which the clock extraction direction is the same as the extraction direction of the active clock of the primary ring, is used as the working clock for extracting the same clock with the same direction as the working clock of the primary ring.
  • the synchronization network of the embodiment includes a ring for single-point injection of an external clock, and clocks the clock in a shortest path manner, including:
  • the extracted clock of the link on the shortest path is configured as the working clock.
  • the shortest path can be determined by various methods.
  • the shortest path of the node to the clock injection node can mean that the number of nodes of the working clock extraction path from the node to the clock node is the smallest, or the link length is the smallest, or the number of nodes is The weighting operation result of the link length is the smallest, and so on.
  • the shortest path can mean that the number of nodes of the working clock extraction path from the node to the clock node is the smallest, or the link length is the smallest, or the number of nodes is The weighting operation result of the link length is the smallest, and so on.
  • Path in a single-injected ring, a node with no clock injection has four possible paths to the node with clock injection, and the shortest path is determined by comparison.
  • the clock configuration module in this embodiment configures the ring according to the shortest path mode, including:
  • a first configuration unit configured to configure an external clock for a node injected with an external clock in the ring
  • a second configuration unit configured to determine, for each node that has no external clock injection in the ring, determine a shortest path of the node to a node with an external clock injection, and configure the node to extract two clocks from adjacent nodes on both sides thereof
  • the link configures the extracted clock of the link located on the shortest path as an operating clock.
  • the ring is a single ring
  • the ring is interconnected with at least another ring, and a non-interconnecting node of the ring has an external clock injection;
  • the ring is interconnected with at least one other point of the ring, and the other ring has an external clock injection except for the interconnecting node of the ring, and the interconnecting node is a node injected with an external clock in the ring. .
  • the synchronization network of this embodiment includes a ring that is injected by an external clock and is clocked in a shortest path manner, including:
  • the extracted clock of the link on the shortest path is configured as the working clock.
  • the clock configuration module in this embodiment configures the ring according to the shortest path mode, including:
  • a first configuration unit configured to configure an external clock for each node having an external clock injection in the ring, and configured at least one link that draws a clock from an adjacent node on one side thereof;
  • a second configuration unit configured to determine, for each node that has no external clock injection in the ring, determine a shortest path of the node to a node with an external clock injection, and configure the node to extract two clocks from adjacent nodes on both sides thereof
  • the link configures the extracted clock of the link located on the shortest path as an operating clock.
  • each node that has an external clock injection in the ring is configured with a link that draws clocks from at least one of the adjacent nodes, including: when there is a common adjacent node between the two nodes, For each of these nodes, only one link that draws clocks from non-common neighbors is configured.
  • the first configuration unit configures, for each node of the two nodes injected with an external clock in the ring, a link that draws clocks from at least one of the adjacent nodes, including: When there is a common neighboring node, for each of the nodes, only one link that draws clocks from non-common neighboring nodes is configured.
  • the ring is a single ring
  • the ring is interconnected with at least another ring, and the other ring has an external clock injection except for the other nodes of the ring, and the two interconnected nodes of the ring and the other ring are There are two nodes in the ring that are injected by the external clock.
  • the synchronization network of this embodiment includes two loops of the interconnection. Each node in the ring except the node of the two ring interconnections has an external clock injection, and the two rings are clocked in the shortest path manner, including:
  • the extracted clock of the link located on the shortest path is configured as an operating clock
  • an external clock is configured, and two links that draw clocks from adjacent nodes on both sides are configured.
  • the clock configuration module of the embodiment performs clock configuration on the two rings in a shortest path manner, including:
  • a first configuration unit configured to determine, for each of the two interconnected nodes, a shortest path from the node to a node having an outer clock injection in the two rings, configured for the node to be drawn from each of its neighboring nodes a plurality of links of the clock, configured as a working clock of the link of the link located on the shortest path;
  • a second configuration unit configured to determine, for each non-interconnecting node of the two rings, a shortest path of the node to a node having an external clock injection in the ring, and configuring the node to extract clocks from adjacent nodes on both sides thereof
  • Two links configured as an active clock of the link of the link located on the shortest path;
  • the third configuration unit is configured to configure an external clock for each node that has an external clock injection to the two rings, and configure two links that draw clocks from adjacent nodes on both sides thereof.
  • the synchronization network of this embodiment includes a chain of single-point injection of an external clock, and the clock is configured for the chain, including:
  • Each node in the chain without external clock injection is configured with a link that draws a clock from an adjacent node of the one side, and the adjacent node on the one side refers to a neighboring node that is closest to the node with the external clock injection in the ring. .
  • the clock configuration module of the embodiment performs clock configuration on the chain, including:
  • a first configuration unit configured to configure an external clock to a node injected with an external clock in the chain
  • a second configuration unit configured to configure, for each node in the chain without an external clock injection, a link that draws a clock from an adjacent node of the one side, and the adjacent node on the one side has an external clock injection from the ring.
  • the nearest neighbor of the node configured to configure, for each node in the chain without an external clock injection, a link that draws a clock from an adjacent node of the one side, and the adjacent node on the one side has an external clock injection from the ring. The nearest neighbor of the node.
  • the embodiment of the present invention further provides a computer readable storage medium, which stores program instructions, and when the program instructions are executed by the processor, can implement a synchronization network provided by any one of Embodiments 1 to 7 of the present invention. Configuration method.
  • the core ring and/or core chain types can be divided into: single core ring, multi core ring, core chain.
  • the number of nodes of the clock source injection ring can be one or more.
  • the core ring is the core ring network specified according to user requirements.
  • the core chain is the core chain specified according to user needs.
  • the clock source is single-point injection and double-point injection.
  • the clock source (that is, the external clock) needs to distinguish between the active and standby devices.
  • the clock source does not distinguish between the active and standby devices.
  • the clock source when the clock source does not need to distinguish between active and standby, it defaults to the primary clock source.
  • the clock of the clock injection node is the injection clock source, and the line on the clock injection node extracts the backup clock.
  • the interconnecting node with the upper ring and/or the chain has been configured with a clock in the upper ring and/or the chain, it is no longer configured at this layer.
  • the rule of multi-chain decimation between nodes is as follows: If there is a bidirectional mutually-extracted clock between nodes, then at most one link is mutually pumped. If only one-way clocks are present between nodes, then up to two chains are allowed to clock.
  • the clock link adopts the principle of optical port priority and high rate port priority.
  • the ring direction (that is, the ring working clock extraction direction) as follows:
  • the direction is determined according to the following rules: a clock node or a clock injection node on the ring is selected; two network elements adjacent to the node are obtained, and the direction of the node with a large network element ID is counterclockwise.
  • a core ring consists of nodes A, B, C, D, E, and F.
  • This core ring has only one external clock source (referred to as an external clock) injected at node A, so A is a clock node (also Called the clock injection node).
  • Configure rules in ring mode :
  • Clock node A only configures the external clock, and the clock priority is the highest, which is 1.
  • the clock that surrounds the adjacent node F counterclockwise from the clock node A ie, from node A to B to C to D to E to F
  • the working clock extraction line shown by the solid line in the figure, by each line on the line
  • the link of the adjacent node pumping the working clock is composed of
  • the clock that surrounds the adjacent node B clockwise from the clock node A is a protection clock extraction line (shown by a broken line in the figure) Composed of links that protect the clock from each adjacent node on the line);
  • the extracted clock of the working clock on each node has a priority of 1 and the port with the lowest priority is the extracted port of the protected clock.
  • the configuration of the ring in FIG. 1 corresponds to the first scenario of the second embodiment.
  • a core ring is composed of nodes A, B, C, D, E, and F.
  • the core ring has two external clock sources injected at nodes A and D, respectively, so both A and D are clock nodes.
  • Configure rules in ring mode :
  • the circuit that surrounds the adjacent node F in a counterclockwise direction starting from the primary clock node A is a working clock extraction line;
  • the circuit that surrounds the adjacent node E clockwise from the standby clock node D is a protection clock extraction line;
  • the extracted clock of the working clock on each node has a priority of 1 and the port with the lowest priority is the extracted port of the protected clock.
  • the configuration of the ring in FIG. 2 corresponds to the first scenario of the third embodiment.
  • a core ring is composed of nodes A, B, C, D, E, and F. Only one external clock source of this core ring is injected at node A, so A is a clock node.
  • the link on the shortest path from Node B to Clock Node A is the working clock extraction link (ie, from Node A to B), and the reverse link of the working clock extraction link is the protection clock extraction link. (ie from node C to B);
  • the other nodes and Node B adopt the same shortest path configuration.
  • the extracted clock of the working clock on each node has a pumping priority of 1, and the second-priority (priority 2) port is the extracted port of the protection clock.
  • the configuration of the ring in FIG. 3 corresponds to the first scenario of the fourth embodiment.
  • a core ring consists of nodes A, B, C, D, E, and F.
  • This core ring has two external clock sources injected at nodes A and F, so both A and F are Clock node.
  • nodes A and F are the active clock nodes.
  • the working clocks of clock nodes A and F are external clock sources (ie, external clocks, external clocks extracted/acquired), the priority of the clock is 1, and the other link ports on the clock nodes also extract clocks.
  • node E the path from node E to clock node F is the shortest, so this link is the working clock extraction link of node E (ie, from node F to E), and the reverse link of the working clock extraction link is Protect the clock extraction link (ie from node D to E);
  • the other nodes use the same shortest path configuration as Nodes B and E;
  • the extracted clock of the working clock on each node has a priority of 1 and the port with the lower priority is the extracted port of the protected clock.
  • a core ring consists of nodes A, B, C, D, E, and F.
  • This core ring has two external clock sources injected at nodes A and D, so both A and D are Clock node.
  • nodes A and D are the active clock nodes.
  • the working clocks of the clock nodes A and D are external clock sources, and the priority of the clocked clock is 1.
  • the other link ports on the clock node also extract the clock, and the priority of the clock is sequentially followed as the protection clock extraction port.
  • node E the path from node E to clock node D is the shortest, so this link is the working clock extraction link of node E (ie, from node D to E), and the reverse link of the working clock extraction link is Protect the clock extraction link (ie from node F to E);
  • the other nodes use the same shortest path configuration as Nodes B and E;
  • the extracted clock of the working clock on each node has a priority of 1 and the port with the lower priority is the extracted port of the protected clock.
  • a core ring consists of nodes A, B, C, D, and E.
  • This core ring has two external clock sources injected at nodes A and D, so both A and D are clock nodes. .
  • nodes A and D are the active clock nodes.
  • the working clocks of clock nodes A and D are external clock sources, and the clock priority is 1; the other link ports on the clock node also extract clocks, and the clock priority is second, as the protection clock extraction port;
  • the other nodes and node B adopt the same shortest path configuration mode
  • the extracted clock of the working clock on each node has a priority of 1 and the port with the lower priority is the extracted port of the protected clock.
  • this example only takes a two-node interconnection as an example.
  • the circuit that surrounds the adjacent node F in a counterclockwise direction starting from the clock node A is a working clock extraction line;
  • the clock that surrounds the adjacent Node B clockwise from the clock node A protects the clock extraction line.
  • Ring 1 Based on Ring 1 and Ring 2 is a two-node interconnect.
  • the connected nodes E and F (including the link between them) are treated as one node EF (also called logical connection node, connection node), and two interconnections.
  • the clocks are mutually extracted between nodes E and F to achieve complete interworking;
  • Ring 2 is processed according to the lower ring of ring 1, and is configured by ring configuration, namely:
  • the circuit that connects the adjacent node J counterclockwise from the logical connection node EF is a working clock extraction line;
  • the circuit that wraps around the adjacent node G clockwise from the logical connection node EF protects the clock extraction line.
  • the extracted clock of the working clock on each node has a priority of 1 and the port with the lower priority is the extracted port of the protected clock.
  • the configuration of the ring 1 of FIG. 5 corresponds to the second scenario of the second embodiment, and the configuration of the ring 2 of FIG. 5 corresponds to the third scenario of the second embodiment.
  • the interconnect ring has two external clock sources injected at nodes A and L, so A and L are clock nodes.
  • the connection node is node F.
  • Figure 6(a) shows two two-node interconnect core rings with two external clock sources injected at nodes A and I, so A and I are clock nodes.
  • the connection nodes are nodes D and E.
  • Figure 6(b) shows three dual-node interconnect core rings with an external clock source injected at nodes A and M, so A and M are clock nodes.
  • the connection nodes are nodes D, E, H, and I.
  • Figure 6(b) uses the ring configuration rules:
  • the primary external clock source and the standby external clock source are respectively set;
  • the interconnected core ring is decomposed into multiple independent single-core rings; in Figure 6(b), for ring 4, the connected node is one.
  • the logical connection node DE, the logical connection point includes two physical interconnection nodes D and E and a physical link DE between the two nodes; similarly, in FIG. 6(c), for the ring 6, the connection node is a logic The node DE is connected, and for the ring 7, the connection node is a logical connection node HI.
  • the ring where the primary clock is located is the primary core ring.
  • the clock node of the primary core ring is the primary clock node of the network. Connection node; in this embodiment, the main core ring of FIG.
  • the primary clock node is node A, the standby clock node is the connection node F; the primary core ring of Figure 6(b) is ring 3, the primary clock node of ring 3 is node A, and the standby clock node is the logical connection node DE; (c) The primary clock node of ring 5 is node A, and the standby clock node is logical connection node DE.
  • connection node closest to the ring where the primary clock is located is the main injection clock node; in this embodiment, FIG. 6(a), because the connection node F is the closest connection node to the ring 1, the main ring of FIG. 6(a)
  • the clock injection node is the connection node F, and the clock node L is the standby clock node; similarly, the main clock injection node of the ring 4 of FIG. 6(b) is the connection node DE, and the standby clock node is the node I; FIG. 6(c) ring 7
  • the master clock injection node is the connection node HI, and the standby clock node is the node M. It can be seen from this that the connection node is in different state of use in the two rings to which it belongs.
  • connection node is a logical node (as shown in FIG. 6(b) and (c))
  • the two interconnected nodes perform clock mutual extraction to achieve complete interworking.
  • the configuration of the ring 1 of FIG. 5 corresponds to the second scenario of the second embodiment, and the configuration of the ring 2 of FIG. 5 corresponds to the third scenario of the second embodiment.
  • the arrangement of the other rings except the ring in the middle of FIG. 6(c) in FIGS. 6(a), (b), and (c) corresponds to the third scenario of the third embodiment.
  • the configuration of the ring in the middle of FIG. 6(c) corresponds to the fourth scenario of the third embodiment.
  • this example only takes a two-node interconnection as an example.
  • the clock source is configured on the ring 1 and the ring 1 is configured in the shortest path configuration mode in the single-core ring clock source scenario.
  • the link from the node B to the shortest path of the clock node A is the working clock extraction link (ie, from the node A to the B), and the reverse link of the working clock extraction link is the protection clock extraction.
  • Link ie from node C to B
  • the other nodes on ring 1 use the same shortest path configuration as Node B.
  • the extracted clock of the working clock on each node has a priority of 1 and the port with the lower priority is the extracted port of the protected clock.
  • Ring 2 is processed according to the lower ring of ring 1, ie:
  • the configuration is the same as that of the primary core ring. As the two clocks are injected into the node, the ring 2 is configured in the shortest path configuration mode of the single core ring in multiple clock source scenarios.
  • the two external clock sources do not distinguish between the primary and the secondary, and the nodes E and F are both injected into the node as the primary clock;
  • node G the path from node G to clock injection node E is the shortest, so this link is the working clock extraction link of node G (ie, from node E to G), and the reverse link of the working clock extraction link is To protect the clock extraction link (ie from node H to G);
  • node J In the case of node J, the path from node J to clock injection node F is the shortest, so this link is the working clock extraction link of node J (ie, from node F to J), and the reverse link of the working clock extraction link is To protect the clock extraction link (ie from node I to J);
  • the other nodes use the same shortest path configuration method as nodes G and J;
  • the extracted clock of the working clock on each node has a priority of 1 and the port with the lower priority is the extracted port of the protected clock.
  • the configuration of the left ring of FIG. 7 corresponds to the second scenario of the fourth embodiment, and the configuration of the right ring of FIG. 7 corresponds to the second scenario of the fifth embodiment.
  • this example only takes a single-node interconnection as an example.
  • a network consists of two single-node interconnect rings with two external clock sources injected at nodes A and L, so A and L are clock nodes.
  • the interconnect node is node F.
  • Adopt the shortest configuration rule:
  • the clock source does not distinguish between active and standby, and nodes A and L are both master clock nodes.
  • the shortest path configuration mode is the same as that of the single core ring multi-clock source scenario.
  • node M In the case of node M, the path from node M to clock node L is the shortest, so this link is the working clock extraction link of node M (ie, from node L to M), and the reverse link of the working clock extraction link is Protect the clock extraction link (ie from node F to M);
  • the path from the node F to the clock node A is the shortest, so this link is the working clock extraction link of the node F (ie, from node A to G to F), and other links (ie, nodes E to F) , the nodes H to F, and the nodes M to F) are protection clock extraction links, and the reverse link of the optional working clock extraction link (ie, nodes E to F) is the first protection clock extraction link;
  • the other nodes use the same shortest path configuration method as Nodes B and M;
  • the extracted clock of the working clock on each node has a priority of 1 and the port with the lower priority is the extracted port of the protected clock.
  • a chain network consists of nodes A, B, and C. There are three links between the nodes B and C. Only one external clock source is injected into the node A. Therefore, the node A is a clock node.
  • the configuration rules are as follows:
  • Clock node A is configured with an external clock
  • the link on the shortest path from the node B to the clock node A is the working clock extraction link of the node B.
  • the link on the shortest path from the node C to the clock node A is the working clock extraction link of the node C;
  • each node on the chain in FIG. 9 corresponds to Embodiment 7.
  • the upper ring (for example, the core ring or the non-core ring of the previous layer) adopts a ring configuration.
  • the non-core ring 1.1 is composed of nodes A, B, C, D, E, and F.
  • the access node is a clock injection node that is not a core ring.
  • the node A is an access node with an upper layer ring, and is also a clock injection node of the non-core ring 1.1, and is configured according to a ring configuration of a single point injection.
  • the nodes A and F are the access nodes with the upper ring, that is, the clock injection node, and the node A and the node F are regarded as one logical connection node AF, and are also configured according to the ring configuration of the single injection.
  • the circuit that surrounds the adjacent node F in a counterclockwise direction starting from the clock injection node A is a working clock extraction line;
  • the clock that surrounds the adjacent Node B clockwise from the clock injection node A is a protection clock extraction line.
  • the extracted clock of the working clock on each node has a priority of 1 and the port with the lowest priority is the extracted port of the protected clock.
  • the line that surrounds the adjacent node E counterclockwise from the node A is the working clock extraction line;
  • the circuit that surrounds the adjacent node B clockwise from the node F is a protection clock extraction circuit
  • the extracted clock of the working clock on each node has a priority of 1 and the port with the lowest priority is the extracted port of the protected clock.
  • the arrangement of the rings of FIGS. 10( a ) and 10 ( b ) corresponds to the third scenario of the second embodiment.
  • the upper ring (for example, the core ring or the non-core ring of the previous layer) uses the shortest path configuration.
  • the non-core ring 1.1 is composed of nodes A, B, C, D, E, and F.
  • the configuration is as follows:
  • the access node is a clock injection node that is not a core ring.
  • the node A is an access node with an upper layer ring, and is also a clock injection node of the non-core ring 1.1.
  • nodes A and F are access nodes of the upper layer ring, that is, clock injection nodes, and nodes A and F are both injected into the main clock.
  • the link from Node B to the shortest path of the clock injection node A is the working clock extraction link (ie, from node A to B), and the reverse link of the working clock extraction link is the protection clock extraction link. (ie from node C to B);
  • the other nodes and Node B adopt the same shortest path configuration.
  • the extracted clock of the working clock on each node has a priority of 1 and the port with the lower priority is the extracted port of the protected clock.
  • Nodes A and F are both injected into the node as the master clock
  • the link from Node B to the shortest path of the clock injection node A is the working clock extraction link (ie, from node A to B), and the reverse link of the working clock extraction link is the protection clock extraction link. (ie from node C to B);
  • the link from the node E to the shortest path of the clock injection node F is the working clock extraction link (ie, from node F to E), and the reverse link of the working clock extraction link is the protection clock extraction link. (ie from node D to E);
  • the other nodes use the same shortest path configuration as Nodes B and E.
  • the extracted clock of the working clock on each node has a priority of 1 and the port with the lower priority is the extracted port of the protected clock.
  • the configuration of the ring in FIG. 11(a) corresponds to the third scenario of the fourth embodiment, and the configuration of the ring in FIG. 11(b) corresponds to the second scenario of the fifth embodiment.
  • node C of the non-core chain is a clock injection node.
  • the configuration rules are as follows:
  • the configuration mode is the same as the core chain configuration mode: the shortest path of each node (A, B, D, and E) to the clock injection node C is the working clock extraction line of each node.
  • the core ring and the non-core ring are distinguished in the example in the text, for the clock configuration, the corresponding configuration mode may be adopted from the topology regardless of its type.
  • all or part of the steps of the above embodiments may also be implemented by using an integrated circuit. These steps may be separately fabricated into individual integrated circuit modules, or multiple modules or steps may be fabricated into a single integrated circuit module. achieve.
  • the devices/function modules/functional units in the above embodiments may be implemented by a general-purpose computing device, which may be centralized on a single computing device or distributed over a network of multiple computing devices.
  • each device/function module/functional unit in the above embodiment When each device/function module/functional unit in the above embodiment is implemented in the form of a software function module and sold or used as a stand-alone product, it can be stored in a computer readable storage medium.
  • the above mentioned computer readable storage medium may be a read only memory, a magnetic disk or an optical disk or the like.
  • the embodiment of the invention implements clock configuration of a synchronization network injected into various topologies and clock sources, and can avoid clock ringing.

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Abstract

一种同步网的配置方法、装置和计算机可读存储介质,其中,该同步网配置装置,包括:信息采集模块,设置为至少确定以下信息:该同步网的拓扑结构和该同步网启用的外时钟的数量;时钟配置模块,设置为根据确定的所述信息对该同步网进行时钟配置。

Description

一种同步网的配置方法和装置 技术领域
本文涉及但不限于通信技术领域,尤其涉及的是一种同步网的配置方法、装置和计算机可读存储介质。
背景技术
随着通信新技术新业务的飞速发展,通信网带宽不断增加,传输速率不断提高,网间更加融合。随着电信市场竞争局面的形成,各通信企业都需要引进新技术提高服务质量,在竞争中求发展。目前,各项新的数据业务,如电子商务、多媒体通信、IP电话等,是电信业务发展的新增长点,而传统业务也存在多家企业互连互通和网间结算问题,而通信业务所涉及的安全、认证及计费等,都展示着同步网(Synchronization Network)对于现代电信网的重要性。
同步网,电信网运行的支持系统之一,为电信网内电信设备时钟(或载波)提供同步控制信号,使其工作速率同步。同步网是电信网的一个必不可少的重要组成部分,它是保证网络定时性能进而确保业务顺利展开的关键。随着SDH(Synchronous Digital Hierarchy,同步数字体系)、ATM(Asynchronous Transfer Mode,异步传输模式)、CDMA(Code Division Multiple Access,码分多址)、IP(Internet Protocol,因特网互联协议)等技术的发展和应用,各种业务网对同步的要求也越来越高,同步的内涵已从以往的频率同步逐步发展为时钟同步(包括频率同步和/或时间同步)。
随着电信网向自动化智能化的演进,同步网的智能化也被列入需求进行研究,如何对同步网进行配置是需要解决的问题。
发明内容
以下是对本文详细描述的主题的概述。本概述并非是为了限制权利要求的保护范围。
本发明实施例提供了一种同步网的配置方法,包括:
至少确定以下信息:该同步网的拓扑结构和该同步网启用的外时钟的数量;
根据确定的所述信息对该同步网进行时钟配置。
可选地,
该同步网包括外时钟单点注入的环时,按环方式对其进行时钟配置,包括:
对该环内有外时钟注入的一个节点,配置抽外时钟;
对该环内无外时钟注入的每一节点,配置从其两侧相邻节点抽时钟的两条链路,将抽取方向与设定的环工作时钟抽取方向相同的抽时钟配置为工作时钟,该环工作时钟抽取方向为顺时针或逆时针。
可选地,
该环为单环;或者
该环至少与另一环互联,该环内的一个非互联节点有外时钟注入;或者
该环至少与另一环互联,该另一环内除与该环的互联节点之外的其他节点有外时钟注入,将该环与该另一环的所有互联节点视为该环内有外时钟注入的一个节点。
可选地,
该同步网包括外时钟双点注入的环时,按环方式对其进行时钟配置,包括:
对该环内无外时钟注入的每一节点,配置从其两侧相邻节点抽时钟的两条链路,将抽取方向与设定的环工作时钟抽取方向相同的抽时钟配置为工作时钟,该环工作时钟抽取方向为顺时针或逆时针;
将该环内有外时钟注入的两个节点的使用状态配置为一主一备,对主用节点,配置抽外时钟,并配置从其一侧相邻节点抽时钟且抽取方向与环工作时钟抽取方向相反的一条链路;对备用节点,配置抽外时钟,及从其一侧相邻节点抽时钟且抽取方向与环工作时钟抽取方向相同的一条链路,将该链路 的抽时钟配置为工作时钟。
可选地,
该环为单环;或者
该环至少与另一环互联,该环的两个非互联节点有外时钟注入;或者
该环至少与另一环互联,该两个环内除了相互互联的节点之外均有其他节点有外时钟注入,将该环与该另一环的所有互联节点视为该环内有外时钟注入的一个节点,对该环进行时钟配置;其中,该视为的一个节点在所属两个环内的使用状态不同;或者
该环至少与另两个环互联,该另两个环除了与该环互联的节点之外均有其他节点有外时钟注入,将该环与该另两个环中每一个环的所有互联节点视为该环内有外时钟注入的一个节点,对该环进行所述配置;其中,该视为的每一节点在所属的两个环内的使用状态均不同。
可选地,
将两个互联节点视为一个节点时,所述方法还包括:
确定该两个互联节点所属的使用状态为备用的主环;
在该两个互联节点之间配置双向抽时钟的两条链路,或配置时钟抽取方向与该主环工作时钟抽取方向相同的一条链路,将抽取方向与该主环工作时钟抽取方向相同的抽时钟作为工作时钟。
可选地,
该同步网包括外时钟单点注入的环时,按最短路径方式对其进行时钟配置,包括:
对该环内有外时钟注入的一个节点,配置抽外时钟;
对该环内无外时钟注入的每一节点,确定该节点到有外时钟注入的节点的最短路径,为该节点配置从其两侧相邻节点抽时钟的两条链路,将其中位于该最短路径上的链路的抽时钟配置为工作时钟。
可选地,
该环为单环;或者
该环至少与另一环互联,该环的一个非互联节点有外时钟注入;或者
该环至少与另一环单点互联,该另一环内除与该环的互联节点之外的其他节点有外时钟注入,该互联节点为该环内有外时钟注入的一个节点。
可选地,
该同步网包括外时钟双点注入的环时,按最短路径方式对其进行时钟配置,包括:
对该环内有外时钟注入的每一节点,配置抽外时钟,并至少配置从其一侧相邻节点抽时钟的一条链路;
对该环内无外时钟注入的每一节点,确定该节点到有外时钟注入的节点的最短路径,为该节点配置从其两侧相邻节点抽时钟的两条链路,将其中位于该最短路径上的链路的抽时钟配置为工作时钟。
可选地,
对该环内有外时钟注入的每一节点,配置至少从其一侧相邻节点抽时钟的一条链路,包括:该两个节点之间有一个共同的相邻节点时,对其中的每一节点,只配置从非共同的相邻节点抽时钟的一条链路。
可选地,
该环为单环;或者
该环至少与另一环双点互联,该另一环内除与该环的互联节点之外的其他节点有外时钟注入,该环与该另一环的两个互联节点为该环内有外时钟注入的两个节点。
可选地,
该同步网包括互联的两个环,每一环内除该两个环互联的节点外的一个节点有外时钟注入时,按最短路径方式对该两个环进行时钟配置,包括:
对该两个环的每一互联节点,确定该节点到该两个环内有外时钟注入的节点的最短路径,为该节点配置从其每一相邻节点抽时钟的多条链路,将其中位于该最短路径上的链路的抽时钟配置为工作时钟;
对该两个环的每一非互联节点,确定该节点到本环内有外时钟注入的节 点的最短路径,为该节点配置从其两侧相邻节点抽时钟的两条链路,将其中位于该最短路径上的链路的抽时钟配置为工作时钟;
对该两个环有外时钟注入的每一节点,配置抽外时钟,并配置从其两侧相邻节点抽时钟的两条链路。
可选地,
该同步网包括外时钟单点注入的链时,对该链进行时钟配置,包括:
对该链内有外时钟注入的一个节点,配置抽外时钟;
对该链内无外时钟注入的每一节点,配置从其一侧相邻节点抽时钟的一条链路,该一侧相邻节点指距离该环内有外时钟注入的节点最近的相邻节点。
本发明实施例还提供了一种同步网的配置装置,包括:
信息采集模块,设置为至少确定以下信息:该同步网的拓扑结构;该同步网启用的外时钟的数量;
时钟配置模块,设置为根据确定的所述信息对该同步网进行时钟配置。
可选地,
该同步网包括外时钟单点注入的环时;
所述时钟配置模块按照环方式对该环进行配置,包括:
第一配置单元,设置为对该环内有外时钟注入的一个节点,配置抽外时钟;
第二配置单元,设置为对该环内无外时钟注入的每一节点,配置从其两侧相邻节点抽时钟的两条链路,将抽取方向与设定的环工作时钟抽取方向相同的抽时钟配置为工作时钟,该环工作时钟抽取方向为顺时针或逆时针。
可选地,
该环为单环;或者
该环至少与另一环互联,该环内的一个非互联节点有外时钟注入;或者
该环至少与另一环互联,该另一环内除与该环的互联节点之外的其他节点有外时钟注入,所述配置模块将该环与该另一环的所有互联节点视为该环 内有外时钟注入的一个节点,对该环进行所述时钟配置。
可选地,
该同步网包括外时钟双点注入的环时;
所述时钟配置模块按照环方式对该环进行配置,包括:
第一配置单元,设置为对该环内无外时钟注入的每一节点,配置从其两侧相邻节点抽时钟的两条链路,将抽取方向与设定的环工作时钟抽取方向相同的抽时钟配置为工作时钟,该环工作时钟抽取方向为顺时针或逆时针;
第二配置单元,设置为将该环内有外时钟注入的两个节点的使用状态配置为一主一备,对主用节点,配置抽外时钟,并配置从其一侧相邻节点抽时钟且抽取方向与环工作时钟抽取方向相反的一条链路;对备用节点,配置抽外时钟,及从其一侧相邻节点抽时钟且抽取方向与环工作时钟抽取方向相同的一条链路,将该链路的抽时钟配置为工作时钟。
可选地,
该环为单环;或者
该环至少与另一环互联,该环的两个非互联节点有外时钟注入;或者
该环至少与另一环互联,该两个环内除了相互互联的节点之外均有其他节点有外时钟注入,所述时钟配置模块将该环与该另一环的所有互联节点视为该环内有外时钟注入的一个节点,对该环进行时钟配置;其中,该视为的一个节点在所属两个环内的使用状态不同;或者
该环至少与另两个环互联,该另两个环除了与该环互联的节点之外均有其他节点有外时钟注入,所述时钟配置模块将该环与该另两个环中每一个环的所有互联节点视为该环内有外时钟注入的一个节点,对该环进行所述配置;其中,该视为的每一节点在所属的两个环内的使用状态均不同。
可选地,
该视为的一个节点包括两个互联节点,
所述时钟配置模块还包括:
第三配置单元,设置为确定该两个互联节点所属的使用状态为备用的主 环;在该两个互联节点之间配置双向抽时钟的两条链路,或配置时钟抽取方向与该主环工作时钟抽取方向相同的一条链路,将抽取方向与该主环工作时钟抽取方向相同的抽时钟作为工作时钟。
可选地,
该同步网包括外时钟单点注入的环时;
所述时钟配置模块按照最短路径方式对该环进行配置,包括:
第一配置单元,设置为对该环内有外时钟注入的一个节点,配置抽外时钟;
第二配置单元,设置为对该环内无外时钟注入的每一节点,确定该节点到有外时钟注入的节点的最短路径,为该节点配置从其两侧相邻节点抽时钟的两条链路,将其中位于该最短路径上的链路的抽时钟配置为工作时钟。
可选地,
该环为单环;或者
该环至少与另一环互联,该环的一个非互联节点有外时钟注入;或者
该环至少与另一环单点互联,该另一环内除与该环的互联节点之外的其他节点有外时钟注入,该互联节点为该环内有外时钟注入的一个节点。
可选地,
该同步网包括外时钟双点注入的单环时;
所述时钟配置模块按照最短路径方式对该环进行配置,包括:
第一配置单元,设置为对该环内有外时钟注入的每一节点,配置抽外时钟,并至少配置从其一侧相邻节点抽时钟的一条链路;
第二配置单元,设置为对该环内无外时钟注入的每一节点,确定该节点到有外时钟注入的节点的最短路径,为该节点配置从其两侧相邻节点抽时钟的两条链路,将其中位于该最短路径上的链路的抽时钟配置为工作时钟。
可选地,
所述第一配置单元对该环内有外时钟注入的每一节点,配置至少从其一侧相邻节点抽时钟的一条链路,包括:该两个节点之间有一个共同的相邻节 点时,对其中的每一节点,只配置从非共同的相邻节点抽时钟的一条链路。
可选地,
该环为单环;或者
该环至少与另一环双点互联,该另一环内除与该环的互联节点之外的其他节点有外时钟注入,该环与该另一环的两个互联节点为该环内有外时钟注入的两个节点。
可选地,
该同步网包括互联的两个环,每一环内除该两个环互联的节点外的一个节点有外时钟注入时;
所述时钟配置模块按最短路径方式对该两个环进行时钟配置,包括:
第一配置单元,设置为对该两个环的每一互联节点,确定该节点到有该两个环内有外时钟注入的节点的最短路径,为该节点配置从其每一相邻节点抽时钟的多条链路,将其中位于该最短路径上的链路的抽时钟配置为工作时钟;
第二配置单元,设置为对该两个环的每一非互联节点,确定该节点到本环内有外时钟注入的节点的最短路径,为该节点配置从其两侧相邻节点抽时钟的两条链路,将其中位于该最短路径上的链路的抽时钟配置为工作时钟;
第三配置单元,设置为对该两个环有外时钟注入的每一节点,配置抽外时钟,并配置从其两侧相邻节点抽时钟的两条链路。
可选地,
该同步网包括外时钟单点注入的链时;
所述时钟配置模块对该链进行时钟配置,包括:
第一配置单元,设置为对该链内有外时钟注入的一个节点,配置抽外时钟;
第二配置单元,设置为对该链内无外时钟注入的每一节点,配置从其一侧相邻节点抽时钟的一条链路,该一侧相邻节点指距离该环内有外时钟注入的节点最近的相邻节点。
本发明实施例还提供一种计算机可读存储介质,存储有程序指令,当该程序指令被处理器执行时可实现本发明实施例所提供的一种同步网的配置方法。
上述方案实现了对各种拓扑、时钟源注入的同步网的时钟配置,具有以下至少一种优点:简单、可靠、可以避免时钟成环。
在阅读并理解了附图和详细描述后,可以明白其他方面。
附图概述
图1-图12为本发明示例1-12的时钟配置示例图;
图13是本发明实施例一方法的流程图;
图14是本发明实施例一装置的模块图。
本发明的较佳实施方式
为使本发明实施例的目的、技术方案和优点更加清楚明白,下文中将结合附图对本发明的实施例进行详细说明。需要说明的是,在不冲突的情况下,本申请中的实施例及实施例中的特征可以相互任意组合。
实施例一
本实施例涉及的是同步网的配置方法,本文所说的同步网可以是整个网络,也可以是局部网络;从拓扑上讲,可以是单环(不与其他环互联)、多个环互联、链式或者其组合等等。
如图13所示,本实施例的同步网的配置方法,包括:
步骤110,至少确定以下信息:该同步网的拓扑结构;该同步网启用的外时钟的数量;
步骤120,根据确定的所述信息对该同步网进行时钟配置。
相应地,本实施例还提供了一种同步网的配置装置,如图14所示,包括:
信息采集模块10,设置为至少确定以下信息:该同步网的拓扑结构;该同步网启用的外时钟的数量;
时钟配置模块20,设置为根据确定的所述信息对该同步网进行时钟配置。
从同步网的拓扑结构来说,包括环和链式,其中环又分为单环或互联的多个环。对单个的环来说,启用的外时钟可以从该环的单个节点注入(单点注入)或多个节点注入(如双点注入),所谓外时钟是从环外抽取的时钟,也可以称为抽外时钟。但对互联的多个环而言,互联节点从一个环抽取的时钟可以是另一个环的外时钟。对于环来说,可以采用环方式进行时钟配置,也可以采用最短路径方式进行时钟配置。
以下实施例将对各种情况的时钟配置展开详细说明。
实施例二
本实施例的同步网包括外时钟单点注入的环,按环方式对其进行时钟配置,包括:
对该环内有外时钟注入的一个节点,配置抽外时钟;
对该环内无外时钟注入的每一节点,配置从其两侧相邻节点抽时钟的两条链路,将抽取方向与设定的环工作时钟抽取方向相同的抽时钟配置为工作时钟,该环工作时钟抽取方向为顺时针或逆时针。
相应地,本实施例时钟配置模块按照环方式对该环进行配置,包括:
第一配置单元,设置为对该环内有外时钟注入的一个节点,配置抽外时钟;
第二配置单元,设置为对该环内无外时钟注入的每一节点,配置从其两侧相邻节点抽时钟的两条链路,将抽取方向与设定的环工作时钟抽取方向相同的抽时钟配置为工作时钟,该环工作时钟抽取方向为顺时针或逆时针。
本实施例可以分为以下不同场景:
第一种,该环为单环;
第二种,该环至少与另一环互联,该环内的一个非互联节点有外时钟注 入;
第三种,该环至少与另一环互联,该另一环内除与该环的互联节点之外的其他节点有外时钟注入,将该环与该另一环的所有互联节点视为该环内有外时钟注入的一个节点。
实施例三
本实施例的该同步网包括外时钟双点注入的环,按环方式对其进行时钟配置,包括:
对该环内无外时钟注入的每一节点,配置从其两侧相邻节点抽时钟的两条链路,将抽取方向与设定的环工作时钟抽取方向相同的抽时钟配置为工作时钟,该环工作时钟抽取方向为顺时针或逆时针;
将该环内有外时钟注入的两个节点的使用状态配置为一主一备,对主用节点,配置抽外时钟,并配置从其一侧相邻节点抽时钟且抽取方向与环工作时钟抽取方向相反的一条链路;对备用节点,配置抽外时钟,及从其一侧相邻节点抽时钟且抽取方向与环工作时钟抽取方向相同的一条链路,将该链路的抽时钟配置为工作时钟。
相应地,本实施例时钟配置模块按照环方式对该环进行配置,包括:
第一配置单元,设置为对该环内无外时钟注入的每一节点,配置从其两侧相邻节点抽时钟的两条链路,将抽取方向与设定的环工作时钟抽取方向相同的抽时钟配置为工作时钟,该环工作时钟抽取方向为顺时针或逆时针;
第二配置单元,设置为将该环内有外时钟注入的两个节点的使用状态配置为一主一备,对主用节点,配置抽外时钟,并配置从其一侧相邻节点抽时钟且抽取方向与环工作时钟抽取方向相反的一条链路;对备用节点,配置抽外时钟,及从其一侧相邻节点抽时钟且抽取方向与环工作时钟抽取方向相同的一条链路,将该链路的抽时钟配置为工作时钟。
本实施例的配置可以分为以下场景:
第一,该环为单环;
第二,该环至少与另一环互联,该环的两个非互联节点有外时钟注入;
第三,该环至少与另一环互联,该两个环内除了相互互联的节点之外均有其他节点有外时钟注入,将该环与该另一环的所有互联节点视为该环内有外时钟注入的一个节点,对该环进行时钟配置;其中,该视为的一个节点在所属两个环内的使用状态不同;所述使用状态是指主用或备用;
第四,该环至少与另两个环互联,该另两个环除了与该环互联的节点之外均有其他节点有外时钟注入,将该环与该另两个环中每一个环的所有互联节点视为该环内有外时钟注入的一个节点,对该环进行所述配置;其中,该视为的每一节点在所属的两个环内的使用状态均不同。
可选地,将两个互联节点视为一个节点时,所述方法还包括:确定该两个互联节点所属的使用状态为备用的主环;在该两个互联节点之间配置双向抽时钟的两条链路,或配置时钟抽取方向与该主环工作时钟抽取方向相同的一条链路,将抽取方向与该主环工作时钟抽取方向相同的抽时钟作为工作时钟。相应地,所述时钟配置模块还包括:第三配置单元,设置为确定该两个互联节点所属的使用状态为备用的主环;在该两个互联节点之间配置双向抽时钟的两条链路,或配置时钟抽取方向与该主环工作时钟抽取方向相同的一条链路,将抽取方向与该主环工作时钟抽取方向相同的抽时钟作为工作时钟。
实施例四
本实施例的该同步网包括外时钟单点注入的环,按最短路径方式对其进行时钟配置,包括:
对该环内有外时钟注入的一个节点,配置抽外时钟;
对该环内无外时钟注入的每一节点,确定该节点到有外时钟注入的节点的最短路径,为该节点配置从其两侧相邻节点抽时钟的两条链路,将其中位于该最短路径上的链路的抽时钟配置为工作时钟。
最短路径的确定可以有各种方法,该节点到时钟注入节点的抽取路径最短可以是指:该节点到该时钟节点的工作时钟抽取路径的节点数最小、或链路长度最小、或节点数和链路长度的加权运算结果最小,等等。例如,在单点注入的环内,一个无时钟注入的节点到有时钟注入的节点有两条可能的路 径,在双点注入的环内,一个无时钟注入的节点到有时钟注入的节点有四条可能的路径,通过比较来确定最短路径。
相应地,本实施例时钟配置模块按照最短路径方式对该环进行配置,包括:
第一配置单元,设置为对该环内有外时钟注入的一个节点,配置抽外时钟;
第二配置单元,设置为对该环内无外时钟注入的每一节点,确定该节点到有外时钟注入的节点的最短路径,为该节点配置从其两侧相邻节点抽时钟的两条链路,将其中位于该最短路径上的链路的抽时钟配置为工作时钟。
本实施例可以分为以下场景:
第一,该环为单环;
第二,该环至少与另一环互联,该环的一个非互联节点有外时钟注入;
第三,该环至少与另一环单点互联,该另一环内除与该环的互联节点之外的其他节点有外时钟注入,该互联节点为该环内有外时钟注入的一个节点。
实施例五
本实施例的同步网包括外时钟双点注入的环,按最短路径方式对其进行时钟配置,包括:
对该环内有外时钟注入的每一节点,配置抽外时钟,并至少配置从其一侧相邻节点抽时钟的一条链路;
对该环内无外时钟注入的每一节点,确定该节点到有外时钟注入的节点的最短路径,为该节点配置从其两侧相邻节点抽时钟的两条链路,将其中位于该最短路径上的链路的抽时钟配置为工作时钟。
相应地,本实施例时钟配置模块按照最短路径方式对该环进行配置,包括:
第一配置单元,设置为对该环内有外时钟注入的每一节点,配置抽外时钟,并至少配置从其一侧相邻节点抽时钟的一条链路;
第二配置单元,设置为对该环内无外时钟注入的每一节点,确定该节点到有外时钟注入的节点的最短路径,为该节点配置从其两侧相邻节点抽时钟的两条链路,将其中位于该最短路径上的链路的抽时钟配置为工作时钟。
可选地,对该环内有外时钟注入的每一节点,配置至少从其一侧相邻节点抽时钟的一条链路,包括:该两个节点之间有一个共同的相邻节点时,对其中的每一节点,只配置从非共同的相邻节点抽时钟的一条链路。相应地,所述第一配置单元对该环内有外时钟注入的两个节点中的每一节点,配置至少从其一侧相邻节点抽时钟的一条链路,包括:该两个节点之间有一个共同的相邻节点时,对其中的每一节点,只配置从非共同的相邻节点抽时钟的一条链路。
本实施例包括以下几种场景:
第一,该环为单环;
第二,该环至少与另一环双点互联,该另一环内除与该环的互联节点之外的其他节点有外时钟注入,该环与该另一环的两个互联节点为该环内有外时钟注入的两个节点。
实施例六
本实施例的同步网包括互联的两个环,每一环内除该两个环互联的节点外的一个节点有外时钟注入,按最短路径方式对该两个环进行时钟配置,包括:
对该两个环的每一互联节点,确定该节点到该两个环内有外时钟注入的节点的最短路径,为该节点配置从其每一相邻节点抽时钟的多条链路,将其中位于该最短路径上的链路的抽时钟配置为工作时钟;
对该两个环的每一非互联节点,确定该节点到本环内有外时钟注入的节点的最短路径,为该节点配置从其两侧相邻节点抽时钟的两条链路,将其中位于该最短路径上的链路的抽时钟配置为工作时钟;
对该两个环有外时钟注入的每一节点,配置抽外时钟,并配置从其两侧相邻节点抽时钟的两条链路。
相应地,本实施例时钟配置模块按最短路径方式对该两个环进行时钟配置,包括:
第一配置单元,设置为对该两个环的每一互联节点,确定该节点到有该两个环内有外时钟注入的节点的最短路径,为该节点配置从其每一相邻节点抽时钟的多条链路,将其中位于该最短路径上的链路的抽时钟配置为工作时钟;
第二配置单元,设置为对该两个环的每一非互联节点,确定该节点到本环内有外时钟注入的节点的最短路径,为该节点配置从其两侧相邻节点抽时钟的两条链路,将其中位于该最短路径上的链路的抽时钟配置为工作时钟;
第三配置单元,设置为对该两个环有外时钟注入的每一节点,配置抽外时钟,并配置从其两侧相邻节点抽时钟的两条链路。
实施例七
本实施例的同步网包括外时钟单点注入的链,对该链进行时钟配置,包括:
对该链内有外时钟注入的一个节点,配置抽外时钟;
对该链内无外时钟注入的每一节点,配置从其一侧相邻节点抽时钟的一条链路,该一侧相邻节点指距离该环内有外时钟注入的节点最近的相邻节点。
相应地,本实施例时钟配置模块对该链进行时钟配置,包括:
第一配置单元,设置为对该链内有外时钟注入的一个节点,配置抽外时钟;
第二配置单元,设置为对该链内无外时钟注入的每一节点,配置从其一侧相邻节点抽时钟的一条链路,该一侧相邻节点指距离该环内有外时钟注入的节点最近的相邻节点。
实施例八
本发明实施例还提供一种计算机可读存储介质,存储有程序指令,当该程序指令被处理器执行时可实现本发明实施例一到实施例七中任一个所提供的一种同步网的配置方法。
下面通过几个示例对各个实施例的方法进行说明。
在这些示例中,对于环方式配置,需要设定一个环工作时钟抽取方向,各个示例的图中均是逆时针方向为例,但也可以是顺时针方向。
在这些示例中,核心环和/或核心链类型可分为:单核心环、多核心环、核心链。时钟源注入环的节点数可以是一个或多个。其中,核心环,是根据用户需求指定的核心的环网。核心链,是根据用户需求指定的核心的链网。
对环配置时,分时钟源单点注入和双点注入,每种情况下,均有两种配置方式:环配置方式和最短路径配置方式。
双点注入、环配置方式时,时钟源(即外时钟)要区分主备。而在双点注入、最短路径配置方式时时钟源不区分主备。文中,时钟源不需区分主备时,均默认为主用时钟源。
时钟注入节点的工作时钟为注入时钟源,时钟注入节点上的线路都抽取备用时钟。
非核心环和/或链的配置方式时,如果与上层环和/或链的互联节点在上层环和/或链已经配置了时钟,则在本层不再配置。
配置时,节点间多链抽时钟规则如下:如果节点间存在双向互抽时钟,则最多一条链路互抽。如果节点间只存在单向抽时钟,则允许最多两条链抽时钟。时钟链路采用光口优先、高速率端口优先的原则。
配置时,设定环方向(即环工作时钟抽取方向)规则如下:对于环方式规划,需要统一规定顺时针和逆时针方向。如,按照如下规则来取定方向:选取环上一个时钟节点或时钟注入节点;获取该节点相邻的两个网元,网元ID大的节点方向为逆时针方向。
示例1
如图1所示,一个核心环由节点A、B、C、D、E和F组成,此核心环只有一个外时钟源(简称为外时钟)在节点A注入,因此A为时钟节点(也称为时钟注入节点)。采用环方式配置规则:
时钟节点A只配置抽外时钟,抽时钟优先级为最高,为1。
以时钟节点A为起点逆时针方向环绕到相邻节点F的线路(即从节点A到B到C到D到E到F)为工作时钟抽取线路(图中用实线表示,由线路上各个相邻节点抽工作时钟的链路组成);
反方向,即以时钟节点A为起点顺时针方向环绕到相邻节点B的线路(即从节点A到F到E到D到C到B)则为保护时钟抽取线路(图中用虚线表示,由线路上各个相邻节点抽保护时钟的链路组成);
各节点上工作时钟的抽取端口的抽时钟优先级为1,抽时钟优先级次之的端口为保护时钟的抽取端口。
对图1中环的配置方式对应于实施例二的第一种场景。
示例2
如图2所示,一个核心环由节点A、B、C、D、E和F组成,此核心环有两个外时钟源分别在节点A和D注入,因此A和D都为时钟节点。采用环方式配置规则:
设置节点A为主时钟节点,节点D为备用时钟节点;
以主用时钟节点A为起点逆时针方向环绕到相邻节点F的线路(即从节点A到B到C到D到E到F)为工作时钟抽取线路;
以备用时钟节点D为起点顺时针方向环绕到相邻节点E的线路(即从节点D到C到B到A到F到E)为保护时钟抽取线路;
各节点上工作时钟的抽取端口的抽时钟优先级为1,抽时钟优先级次之的端口为保护时钟的抽取端口。
对图2中环的配置方式对应于实施例三的第一种场景。
示例3
如图3所示,一个核心环由节点A、B、C、D、E和F组成,此核心环只有一个外时钟源在节点A注入,因此A为时钟节点。采用最短路径配置规则:
时钟节点A只配置抽外时钟;
以节点B来说,节点B到时钟节点A最短路径上的链路为工作时钟抽取链路(即从节点A到B),工作时钟抽取链路的反方向链路则为保护时钟抽取链路(即从节点C到B);
其他节点与节点B采用同样的最短路径配置方式。
各节点上工作时钟的抽取端口的抽时钟优先级为1,优先级次之(优先级为2)的端口为保护时钟的抽取端口。
对图3中环的配置方式对应于实施例四的第一种场景。
示例4
如图4(a)所示,一个核心环由节点A、B、C、D、E和F组成,此核心环有两个外时钟源分别在节点A和F注入,因此A和F都为时钟节点。采用最短路径配置规则:
两个外时钟源不区分主备,节点A和F均为主用时钟节点;
时钟节点A和F的工作时钟为外时钟源(即抽外时钟,抽取/获取的外时钟),抽时钟优先级为1,时钟节点上的其他链路端口也抽取时钟,抽时钟优先级依次次之,作为保护时钟抽取端口;
以节点B来说,节点B到时钟节点A的路径最短,因此此链路为节点B的工作时钟抽取链路(即从节点A到B),工作时钟抽取链路的反方向链路则为保护时钟抽取链路(即从节点C到B);
以节点E来说,节点E到时钟节点F的路径最短,因此此链路为节点E的工作时钟抽取链路(即从节点F到E),工作时钟抽取链路的反方向链路则为保护时钟抽取链路(即从节点D到E);
其他节点与节点B和E采用同样的最短路径配置方式;
各节点上工作时钟的抽取端口的抽时钟优先级为1,优先级次之的端口为保护时钟的抽取端口。
如图4(b)所示,一个核心环由节点A、B、C、D、E和F组成,此核心环有两个外时钟源分别在节点A和D注入,因此A和D都为时钟节点。采用最短路径配置规则:
两个外时钟源不区分主备,节点A和D均为主用时钟节点;
时钟节点A和D的工作时钟为外时钟源,抽时钟优先级为1,时钟节点上的其他链路端口也抽取时钟,抽时钟优先级依次次之,作为保护时钟抽取端口;
以节点B来说,节点B到时钟节点A的路径最短,因此此链路为节点B的工作时钟抽取链路(即从节点A到B),工作时钟抽取链路的反方向链路则为保护时钟抽取链路(即从节点C到B);
以节点E来说,节点E到时钟节点D的路径最短,因此此链路为节点E的工作时钟抽取链路(即从节点D到E),工作时钟抽取链路的反方向链路则为保护时钟抽取链路(即从节点F到E);
其他节点与节点B和E采用同样的最短路径配置方式;
各节点上工作时钟的抽取端口的抽时钟优先级为1,优先级次之的端口为保护时钟的抽取端口。
如图4(c)所示,一个核心环由节点A、B、C、D和E组成,此核心环有两个外时钟源分别在节点A和D注入,因此A和D都为时钟节点。采用最短路径配置规则:
两个外时钟源不区分主备,节点A和D均为主用时钟节点;
时钟节点A和D的工作时钟为外时钟源,抽时钟优先级为1;时钟节点上的其他链路端口也抽取时钟,抽时钟优先级次之,作为保护时钟抽取端口;
因为时钟节点A和D之间只有一个节点E,为了使时钟不成环(即在时钟源失效的情况下时钟抽取过程不能成环,否则网络时钟会无限循环,无法完成定时),时钟节点A和D不能从节点E抽取时钟;
以节点B来说,节点B到时钟节点A的路径最短,因此此链路为节点B的工作时钟抽取链路(即从节点A到B),工作时钟抽取链路的反方向链路则为保护时钟抽取链路(即从节点C到B);
其他节点与节点B采用同样的最短路径配置方式;
各节点上工作时钟的抽取端口的抽时钟优先级为1,优先级次之的端口为保护时钟的抽取端口。
对图4(a)-(c)中的环的配置方式对应于实施例五的第一种场景。其中,图4(c)存在两个时钟注入节点有一个共同的相邻节点的情况。
示例5
在多核心环互联中,可单节点互联或双节点互联等,本示例仅以双节点互联为例。
如图5所示,两个双节点互联核心环只有一个外时钟源在节点A注入,因此A为时钟节点。互联节点为节点E和F。采用环配置规则:
时钟节点A只配置抽外时钟;
确定外时钟源在环1,对于环1按照环配置方式进行配置,即:
以时钟节点A为起点逆时针方向环绕到相邻节点F的线路(即从节点A到B到C到D到E到F)为工作时钟抽取线路;
以时钟节点A为起点顺时针方向环绕到相邻节点B的线路(即从节点A到F到E到D到C到B)则为保护时钟抽取线路。
基于环1和环2是双节点互联,对于环2,将相接节点E和F(包括之间的链路)视为一个节点EF(也称为逻辑连接节点、连接节点),两个互联节点E和F之间进行时钟互抽取,达到完全互通;
环2按照环1的下层环来处理,采用环配置方式来配置,即:
确定逻辑连接节点EF为时钟注入节点;
以逻辑连接节点EF为起点逆时针方向绕环到相邻节点J的线路(即从节点EF到G到H到I到J)为工作时钟抽取线路;
以逻辑连接节点EF为起点顺时针方向环绕到相邻节点G的线路(即从节点EF到J到I到H到G)则为保护时钟抽取线路。
各节点上工作时钟的抽取端口的抽时钟优先级为1,优先级次之的端口为保护时钟的抽取端口。
对图5环1的配置方式对应实施例二的第二种场景,对图5环2的配置方式对应实施例二的第三种场景。
示例6
如图6所示:为两个单节点互联核心环,此互联环有两个外时钟源在节点A和L注入,因此A和L为时钟节点。连接节点为节点F。
图6(a)为两个双节点互联核心环,此互联环有两个外时钟源在节点A和I注入,因此A和I为时钟节点。连接节点为节点D和E。
图6(b)为三个双节点互联核心环,此互联环有一个外时钟源在节点A和M注入,因此A和M为时钟节点。连接节点为节点D、E、H和I。
图6(b)采用环配置规则:
在本实施例中,如图6所示,分别设置了主外时钟源和备用外时钟源;
把互联的多核心环分解为独立单核心环:
对于单节点互联核心环场景:如图6(a),分解为两个独立的单环,连接节点F为物理节点。
对于双节点互联核心环场景:如图6(b)、(c),把互联的核心环分解为多个独立的单核心环;在图6(b)中,对于环4,连接节点为一个逻辑连接节点DE,该逻辑连接点包括两个物理互联节点D和E以及这两个节点中间的物理链路D-E;同理,在图6(c)中,对于环6,连接节点为一个逻辑连接节点DE,对于环7,连接节点为一个逻辑连接节点HI。
环上有多个时钟注入节点,确定该环的主时钟节点和备时钟节点;主时钟所在环为主核心环,主核心环的时钟节点为网络的主时钟节点,备用时钟为主时钟所在环的连接节点;在本实施例中,图6(a)的主核心环为环1,环1 的主时钟节点为节点A,备用时钟节点为连接节点F;图6(b)的主核心环为环3,环3的主时钟节点为节点A,备用时钟节点为逻辑连接节点DE;图6(c)环5的主时钟节点为节点A,备用时钟节点为逻辑连接节点DE。
距离主时钟所在环最近的连接节点为主注入时钟节点;在本实施例中,图6(a),因为连接节点F为距离环1最近的连接节点,所以图6(a)环2的主时钟注入节点为连接节点F,时钟节点L为备用时钟节点;同理,图6(b)环4的主时钟注入节点为连接节点DE,备用时钟节点为节点I;图6(c)环7的主时钟注入节点为连接节点HI,备用时钟节点为节点M。从此处可以看出,连接节点在所属的两个环中的使用状态不一样。
按照单核心环的方式配置分解后的各个单环。
对于连接节点是逻辑节点的情况(如图6(b)、(c)所示),两个互联节点之间进行时钟互抽取,达到完全互通。
对图5环1的配置方式对应实施例二的第二种场景,对图5环2的配置方式对应实施例二的第三种场景。
对图6(a)、(b)、(c)中除图6(c)中间那个环外的其他环的配置方式对应于实施例三的第三种场景。对图6(c)中间那个环的配置方式对应于实施例三的第四种场景。
示例7
在多核心环互联中,可单节点互联或双节点互联等,本示例仅以双节点互联为例。
如图7所示,两个双节点互联核心环只有一个外时钟源在节点A注入,因此A为时钟节点。互联节点为节点E和F。采用最短路径配置规则:
时钟源在环1,环1按照单核心环单时钟源场景下最短路径配置方式进行配置,即;
时钟节点A只配置抽外时钟;
以节点B来说,节点B到时钟节点A最短路径的链路为工作时钟抽取链路(即从节点A到B),工作时钟抽取链路的反方向链路则为保护时钟抽取 链路(即从节点C到B);
环1上的其他节点与节点B采用同样的最短路径配置方式。
各节点上工作时钟的抽取端口的抽时钟优先级为1,优先级次之的端口为保护时钟的抽取端口。
环2按照环1的下层环来处理,即:
确定与环1的互联节点E和F均作为环2的时钟注入节点;
配置方式同主核心环,因有两个时钟注入节点,所以环2按照单核心环多时钟源场景下的最短路径配置方式进行配置,即:
两个外时钟源不区分主备,节点E和F均为主时钟注入节点;
以节点G来说,节点G到时钟注入节点E的路径最短,因此此链路为节点G的工作时钟抽取链路(即从节点E到G),工作时钟抽取链路的反方向链路则为保护时钟抽取链路(即从节点H到G);
以节点J来说,节点J到时钟注入节点F的路径最短,因此此链路为节点J的工作时钟抽取链路(即从节点F到J),工作时钟抽取链路的反方向链路则为保护时钟抽取链路(即从节点I到J);
其他节点与节点G和J采用同样的最短路径配置方式;
各节点上工作时钟的抽取端口的抽时钟优先级为1,优先级次之的端口为保护时钟的抽取端口。
对图7左环的配置方式对应于实施例四的第二种场景,对图7右环的配置方式对应于实施例五的第二种场景
示例8
在多核心环互联中,可单节点互联或双节点互联等,本示例仅以单节点互联为例。
如图8所示,一个网络由两个单节点互联环组成,此网络有两个外时钟源在节点A和L注入,因此A和L为时钟节点。互联节点为节点F。采用最短配置规则:
时钟源不区分主备,节点A和L均为主时钟节点;
配置方式同单核心环多时钟源场景下的最短路径配置方式,即:
以节点B来说,节点B到时钟节点A的路径最短,因此此链路为节点B的工作时钟抽取链路(即从节点A到B),工作时钟抽取链路的反方向链路则为保护时钟抽取链路(即从节点C到B);
以节点M来说,节点M到时钟节点L的路径最短,因此此链路为节点M的工作时钟抽取链路(即从节点L到M),工作时钟抽取链路的反方向链路则为保护时钟抽取链路(即从节点F到M);
以互联节点F来说,节点F到时钟节点A的路径最短,因此此链路为节点F的工作时钟抽取链路(即从节点A到G到F),其他链路(即节点E到F、节点H到F、节点M到F)均为保护时钟抽取链路,可选工作时钟抽取链路的反方向链路(即节点E到F)为第一保护时钟抽取链路;
其他节点与节点B和M采用同样的最短路径配置方式;
各节点上工作时钟的抽取端口的抽时钟优先级为1,优先级次之的端口为保护时钟的抽取端口。
对图8中两个环的配置方式对应于实施例六。
示例9
如图9所示,一个链型网络由节点A、B和C组成。节点B和C之间有3条链路,整个链型网络只有一个外时钟源在节点A注入,因此节点A为时钟节点,配置规则为:
时钟节点A配置抽外时钟;
节点B到时钟节点A最短路径上的链路为节点B的工作时钟抽取链路,同理,节点C到时钟节点A最短路径上的链路为节点C的工作时钟抽取链路;
节点C与节点B之间有3条链路,因只存在单向抽时钟(即只从节点B到C抽取时钟),在此种情况下允许最多两条链抽取时钟,采用光口优先、高速率端口优先的原则,一条优先级为1,另一条优先级为2。
对图9中链上各节点的配置方式对应于实施例七。
示例10
在本示例中,上层环(例如:核心环或上一层的非核心环)采用环配置方式。如图10所示,非核心环1.1由节点A、B、C、D、E和F组成。
确定接入节点为非核心环的时钟注入节点。图10(a),节点A为与上层环的接入节点,亦为非核心环1.1的时钟注入节点,按照单点注入的环配置方式配置。图10(b),节点A和F为与上层环的接入节点,即为时钟注入节点,将节点A和节点F视为一个逻辑连接节点AF,也按照单点注入的环配置方式配置。
对图10(a):
以时钟注入节点A为起点逆时针方向环绕到相邻节点F的线路(即从节点A到B到C到D到E到F)为工作时钟抽取线路;
以时钟注入节点A为起点顺时针方向环绕到相邻节点B的线路(即从节点A到F到E到D到C到B)为保护时钟抽取线路。
各节点上工作时钟的抽取端口的抽时钟优先级为1,抽时钟优先级次之的端口为保护时钟的抽取端口。
对图10(b):
以节点A为起点逆时针方向环绕到相邻节点E的线路(即从节点A到B到C到D到E)为工作时钟抽取线路;
以节点F为起点顺时针方向环绕到相邻节点B的线路(即从节点F到E到D到C到B)为保护时钟抽取线路;
各节点上工作时钟的抽取端口的抽时钟优先级为1,抽时钟优先级次之的端口为保护时钟的抽取端口。
对图10(a)、图10(b)各环的配置方式对应于实施例二的第三种场景。
示例11
在本示例中,上层环(例如:核心环或上一层的非核心环)采用最短路径配置方式。如图11所示,非核心环1.1由节点A、B、C、D、E和F组成,配置方式为:
确定接入节点为非核心环的时钟注入节点。图11(a),节点A为与上层环的接入节点,亦为非核心环1.1的时钟注入节点。图11(b),节点A和F为上层环的接入节点,即为时钟注入节点,节点A和F均为主时钟注入节点。
对图11(a):
以节点B来说,节点B到时钟注入节点A最短路径的链路为工作时钟抽取链路(即从节点A到B),工作时钟抽取链路的反方向链路则为保护时钟抽取链路(即从节点C到B);
其他节点与节点B采用同样的最短路径配置方式。
各节点上工作时钟的抽取端口的抽时钟优先级为1,优先级次之的端口为保护时钟的抽取端口。
对图11(b):
节点A和F均为主时钟注入节点;
以节点B来说,节点B到时钟注入节点A最短路径的链路为工作时钟抽取链路(即从节点A到B),工作时钟抽取链路的反方向链路则为保护时钟抽取链路(即从节点C到B);
以节点E来说,节点E到时钟注入节点F最短路径的链路为工作时钟抽取链路(即从节点F到E),工作时钟抽取链路的反方向链路则为保护时钟抽取链路(即从节点D到E);
其他节点与节点B和E采用同样的最短路径配置方式。
各节点上工作时钟的抽取端口的抽时钟优先级为1,优先级次之的端口为保护时钟的抽取端口。
对图11(a)中环的配置方式对应于实施例四的第三种场景,对图11(b)中环的配置方式对应于实施例五的第二种场景。
示例12
本示例中采用单向时钟抽取,如图12所示,非核心链的节点C为时钟注入节点,配置规则为:
确定接入节点C为非核心链的时钟注入节点;
配置方式同核心链配置方式:各节点(A、B、D和E)分别到时钟注入节点C的最短路径为各节点的工作时钟抽取线路。
对于链式结构,不存在多时钟注入情况,当多时钟注入时必然成环。
需要说明的是,虽然在文中的示例中,有核心环、非核心环的区分,但对于时钟配置来说,可以不考虑其类型,而从其拓扑结构来采用相应的配置方式。
本领域普通技术人员可以理解上述实施例的全部或部分步骤可以使用计算机程序流程来实现,所述计算机程序可以存储于一计算机可读存储介质中,所述计算机程序在相应的硬件平台上(如系统、设备、装置、器件等)执行,在执行时,包括方法实施例的步骤之一或其组合。
可选地,上述实施例的全部或部分步骤也可以使用集成电路来实现,这些步骤可以被分别制作成一个个集成电路模块,或者将它们中的多个模块或步骤制作成单个集成电路模块来实现。
上述实施例中的各装置/功能模块/功能单元可以采用通用的计算装置来实现,它们可以集中在单个的计算装置上,也可以分布在多个计算装置所组成的网络上。
上述实施例中的各装置/功能模块/功能单元以软件功能模块的形式实现并作为独立的产品销售或使用时,可以存储在一个计算机可读取存储介质中。上述提到的计算机可读取存储介质可以是只读存储器,磁盘或光盘等。
工业实用性
本发明实施例实现了对各种拓扑、时钟源注入的同步网的时钟配置,可以避免时钟成环。

Claims (27)

  1. 一种同步网的配置方法,包括:
    至少确定以下信息:该同步网的拓扑结构;该同步网启用的外时钟的数量;
    根据确定的所述信息对所述同步网进行时钟配置。
  2. 如权利要求1所述的配置方法,
    当所述同步网包括外时钟单点注入的环时,对所述同步网进行配置,包括:按环方式对所述环进行时钟配置,其中,
    对所述环内有外时钟注入的一个节点,配置抽外时钟;
    对所述环内无外时钟注入的每一节点,配置从所述每一节点两侧相邻节点抽时钟的两条链路,将抽取方向与设定的环工作时钟抽取方向相同的抽时钟配置为工作时钟,该环工作时钟抽取方向为顺时针或逆时针。
  3. 如权利要求2所述的配置方法,其中,
    所述环为单环;或者
    所述环至少与另一环互联,所述环内的一个非互联节点有外时钟注入;或者
    所述环至少与另一环互联,所述另一环内除与所述环的互联节点之外的其他节点有外时钟注入,将所述环与所述另一环的所有互联节点视为该环内有外时钟注入的一个节点。
  4. 如权利要求1所述的配置方法,
    当所述同步网包括外时钟双点注入的环时,对所述同步网进行配置,包括:按环方式对所述环进行时钟配置,其中,
    对所述环内无外时钟注入的每一节点,配置从所述每一节点两侧相邻节点抽时钟的两条链路,将抽取方向与设定的环工作时钟抽取方向相同的抽时钟配置为工作时钟,该环工作时钟抽取方向为顺时针或逆时针;
    将所述环内有外时钟注入的两个节点的使用状态配置为一主一备,对主 用节点,配置抽外时钟,并配置从所述主用节点一侧相邻节点抽时钟且抽取方向与环工作时钟抽取方向相反的一条链路;对备用节点,配置抽外时钟,并配置从所述备用节点一侧相邻节点抽时钟且抽取方向与环工作时钟抽取方向相同的一条链路,将该链路的抽时钟配置为工作时钟。
  5. 如权利要求4所述的配置方法,其中,
    所述环为单环;或者
    所述环至少与另一环互联,所述环的两个非互联节点有外时钟注入;或者
    所述环至少与另一环互联,这两个环内除了相互互联的节点之外均有其他节点有外时钟注入,将所述环与所述另一环的所有互联节点视为所述环内有外时钟注入的一个节点,对所述环进行时钟配置;其中,被视为的一个节点在所属两个环内的使用状态不同;或者
    所述环至少与另两个环互联,所述另两个环除了与所述环互联的节点之外均有其他节点有外时钟注入,将所述环与所述另两个环中每一个环的所有互联节点视为该环内有外时钟注入的一个节点,对所述环进行所述配置;其中,该视为的每一节点在所属的两个环内的使用状态均不同。
  6. 如权利要求5所述的配置方法,其中,
    将两个互联节点视为一个节点时,所述方法还包括:
    确定所述两个互联节点所属的使用状态为备用的主环;
    在所述两个互联节点之间配置双向抽时钟的两条链路,或配置时钟抽取方向与所述主环工作时钟抽取方向相同的一条链路,将抽取方向与所述主环工作时钟抽取方向相同的抽时钟作为工作时钟。
  7. 如权利要求1所述的配置方法,
    当所述同步网包括外时钟单点注入的环时,对所述同步网进行配置,包括:按最短路径方式对所述环进行时钟配置,包括:
    对所述环内有外时钟注入的一个节点,配置抽外时钟;
    对所述环内无外时钟注入的每一节点,确定所述无外时钟注入的每一节 点到有外时钟注入的节点的最短路径,为所述无外时钟注入的每一节点配置从所述无外时钟注入的每一节点两侧相邻节点抽时钟的两条链路,将其中位于该最短路径上的链路的抽时钟配置为工作时钟。
  8. 如权利要求7所述的配置方法,其中,
    所述环为单环;或者
    所述环至少与另一环互联,所述环的一个非互联节点有外时钟注入;或者
    所述环至少与另一环单点互联,所述另一环内除与所述环的互联节点之外的其他节点有外时钟注入,所述互联节点为所述环内有外时钟注入的一个节点。
  9. 如权利要求1所述的配置方法,
    当所述同步网包括外时钟双点注入的环时,对所述同步网进行配置,包括:按最短路径方式对所述环进行时钟配置,其中,:
    对所述环内有外时钟注入的每一节点,配置抽外时钟,并至少配置从所述有外时钟注入的每一节点一侧相邻节点抽时钟的一条链路;
    对所述环内无外时钟注入的每一节点,确定所述无外时钟注入的每一节点到有外时钟注入的节点的最短路径,为所述无外时钟注入的每一节点配置从所述无外时钟注入的每一节点两侧相邻节点抽时钟的两条链路,将其中位于该最短路径上的链路的抽时钟配置为工作时钟。
  10. 如权利要求9所述的配置方法,其中,
    对所述环内有外时钟注入的每一节点,配置至少从所述有外时钟注入的每一节点一侧相邻节点抽时钟的一条链路,包括:当两个有外时钟注入的节点之间有一个共同的相邻节点时,对所述有外时钟注入的每一节点只配置从非共同的相邻节点抽时钟的一条链路。
  11. 如权利要求9或10所述的配置方法,其中,
    所述环为单环;或者
    所述环至少与另一环双点互联,所述另一环内除与所述环的互联节点之 外的其他节点有外时钟注入,所述环与所述另一环的两个互联节点为该环内有外时钟注入的两个节点。
  12. 如权利要求1所述的配置方法,
    当所述同步网包括互联的两个环,每一环内除所述两个环互联的节点外的一个节点有外时钟注入时,对所述同步网进行配置,包括:按最短路径方式对所述两个环进行时钟配置,其中:
    对所述两个环的每一互联节点,确定所述每一互联节点到所述两个环内有外时钟注入的节点的最短路径,为所述每一互联节点配置从所述每一互联节点每一相邻节点抽时钟的多条链路,将其中位于该最短路径上的链路的抽时钟配置为工作时钟;
    对所述两个环的每一非互联节点,确定所述每一非互联节点到本环内有外时钟注入的节点的最短路径,为所述每一非互联节点配置从所述每一非互联节点两侧相邻节点抽时钟的两条链路,将其中位于该最短路径上的链路的抽时钟配置为工作时钟;
    对所述两个环有外时钟注入的每一节点,配置抽外时钟,并配置从所述有外时钟注入的每一节点两侧相邻节点抽时钟的两条链路。
  13. 如权利要求1所述的配置方法,
    当所述同步网包括外时钟单点注入的链时,对所述同步网进行配置,包括对所述链进行时钟配置,其中:
    对所述链内有外时钟注入的一个节点,配置抽外时钟;
    对所述链内无外时钟注入的每一节点,配置从所述无外时钟注入的每一节点一侧相邻节点抽时钟的一条链路,该一侧相邻节点指距离该环内有外时钟注入的节点最近的相邻节点。
  14. 一种同步网的配置装置,包括:
    信息采集模块,设置为至少确定以下信息:所述同步网的拓扑结构;所述同步网启用的外时钟的数量;
    时钟配置模块,设置为根据确定的所述信息对所述同步网进行时钟配置。
  15. 如权利要求14所述的配置装置,
    当所述同步网包括外时钟单点注入的环时;
    所述时钟配置模块,设置为按照环方式对所述环进行配置,包括:
    第一配置单元,设置为对所述环内有外时钟注入的一个节点,配置抽外时钟;
    第二配置单元,设置为对所述环内无外时钟注入的每一节点,配置从所述无外时钟注入的每一节点两侧相邻节点抽时钟的两条链路,将抽取方向与设定的环工作时钟抽取方向相同的抽时钟配置为工作时钟,所述环工作时钟抽取方向为顺时针或逆时针。
  16. 如权利要求15所述的配置装置,其中,
    所述环为单环;或者
    所述环至少与另一环互联,所述环内的一个非互联节点有外时钟注入;或者
    所述环至少与另一环互联,所述另一环内除与所述环的互联节点之外的其他节点有外时钟注入,所述配置模块将所述环与所述另一环的所有互联节点视为所述环内有外时钟注入的一个节点,对所述环进行所述时钟配置。
  17. 如权利要求14所述的配置装置,
    当所述同步网包括外时钟双点注入的环时,
    所述时钟配置模块,设置为按照环方式对所述环进行配置,包括:
    第一配置单元,设置为对所述环内无外时钟注入的每一节点,配置从所述无外时钟注入的每一节点两侧相邻节点抽时钟的两条链路,将抽取方向与设定的环工作时钟抽取方向相同的抽时钟配置为工作时钟,所述环工作时钟抽取方向为顺时针或逆时针;
    第二配置单元,设置为将所述环内有外时钟注入的两个节点的使用状态配置为一主一备,对主用节点,配置抽外时钟,并配置从所述主用节点一侧相邻节点抽时钟且抽取方向与环工作时钟抽取方向相反的一条链路;对备用节点,配置抽外时钟,及从所述备用节点一侧相邻节点抽时钟且抽取方向与 环工作时钟抽取方向相同的一条链路,将所述链路的抽时钟配置为工作时钟。
  18. 如权利要求17所述的配置装置,其中,
    所述环为单环;或者
    所述环至少与另一环互联,所述环的两个非互联节点有外时钟注入;或者
    所述环至少与另一环互联,这两个环内除了相互互联的节点之外均有其他节点有外时钟注入,所述时钟配置模块将所述环与所述另一环的所有互联节点视为所述环内有外时钟注入的一个节点,对所述环进行时钟配置;其中,被视为的一个节点在所属两个环内的使用状态不同;或者
    所述环至少与另两个环互联,所述另两个环除了与所述环互联的节点之外均有其他节点有外时钟注入,所述时钟配置模块将所述环与所述另两个环中每一个环的所有互联节点视为所述环内有外时钟注入的一个节点,对所述环进行所述配置;其中,被视为的每一节点在所属的两个环内的使用状态均不同。
  19. 如权利要求18所述的配置装置,其中,
    被视为的一个节点包括两个互联节点,
    所述时钟配置模块还包括:
    第三配置单元,设置为确定所述两个互联节点所属的使用状态为备用的主环;在所述两个互联节点之间配置双向抽时钟的两条链路,或配置时钟抽取方向与所述主环工作时钟抽取方向相同的一条链路,将抽取方向与所述主环工作时钟抽取方向相同的抽时钟作为工作时钟。
  20. 如权利要求14所述的配置装置,其中,
    当所述同步网包括外时钟单点注入的环时,
    所述时钟配置模块,设置为按照最短路径方式对所述环进行配置,包括:
    第一配置单元,设置为对所述环内有外时钟注入的一个节点,配置抽外时钟;
    第二配置单元,设置为对所述环内无外时钟注入的每一节点,确定所述 无外时钟注入的每一节点到有外时钟注入的节点的最短路径,为所述无外时钟注入的每一节点配置从所述无外时钟注入的每一节点两侧相邻节点抽时钟的两条链路,将其中位于所述最短路径上的链路的抽时钟配置为工作时钟。
  21. 如权利要求20所述的配置装置,其中,
    所述环为单环;或者
    所述环至少与另一环互联,所述环的一个非互联节点有外时钟注入;或者
    所述环至少与另一环单点互联,所述另一环内除与所述环的互联节点之外的其他节点有外时钟注入,所述互联节点为所述环内有外时钟注入的一个节点。
  22. 如权利要求14所述的配置装置,
    当所述同步网包括外时钟双点注入的单环时,
    所述时钟配置模块,设置为按照最短路径方式对所述环进行配置,包括:
    第一配置单元,设置为对所述环内有外时钟注入的每一节点,配置抽外时钟,并至少配置从所述有外时钟注入的每一节点一侧相邻节点抽时钟的一条链路;
    第二配置单元,设置为对所述环内无外时钟注入的每一节点,确定所述无外时钟注入的每一节点到有外时钟注入的节点的最短路径,为所述无外时钟注入的每一节点配置从所述无外时钟注入的每一节点两侧相邻节点抽时钟的两条链路,将其中位于所述最短路径上的链路的抽时钟配置为工作时钟。
  23. 如权利要求22所述的配置装置,其中,
    所述第一配置单元对所述环内有外时钟注入的每一节点,配置至少从所述有外时钟注入的每一节点一侧相邻节点抽时钟的一条链路,包括:这两个有外时钟注入的节点之间有一个共同的相邻节点时,对所述有外时钟注入的每一节点,只配置从非共同的相邻节点抽时钟的一条链路。
  24. 如权利要求22或23所述的配置装置,其中,
    所述环为单环;或者
    所述环至少与另一环双点互联,所述另一环内除与所述环的互联节点之外的其他节点有外时钟注入,所述环与所述另一环的两个互联节点为所述环内有外时钟注入的两个节点。
  25. 如权利要求14所述的配置装置,
    当所述同步网包括互联的两个环,每一环内除所述两个环互联的节点外的一个节点有外时钟注入时,
    所述时钟配置模块,设置为按最短路径方式对所述两个环进行时钟配置,包括:
    第一配置单元,设置为对所述两个环的每一互联节点,确定所述两个环的每一互联节点到有所述两个环内有外时钟注入的节点的最短路径,为所述两个环的每一互联节点配置从所述两个环的每一互联节点每一相邻节点抽时钟的多条链路,将其中位于所述最短路径上的链路的抽时钟配置为工作时钟;
    第二配置单元,设置为对所述两个环的每一非互联节点,确定所述两个环的每一非互联节点到本环内有外时钟注入的节点的最短路径,为所述两个环的每一非互联节点配置从所述两个环的每一非互联节点两侧相邻节点抽时钟的两条链路,将其中位于该最短路径上的链路的抽时钟配置为工作时钟;
    第三配置单元,设置为对所述两个环有外时钟注入的每一节点,配置抽外时钟,并配置从所述两个环有外时钟注入的每一节点两侧相邻节点抽时钟的两条链路。
  26. 如权利要求14所述的配置装置,
    当所述同步网包括外时钟单点注入的链时
    所述时钟配置模块,设置为对所述链进行时钟配置,包括:
    第一配置单元,设置为对所述链内有外时钟注入的一个节点,配置抽外时钟;
    第二配置单元,设置为对所述链内无外时钟注入的每一节点,配置从所述无外时钟注入的每一节点一侧相邻节点抽时钟的一条链路,所述一侧相邻节点指距离该环内有外时钟注入的节点最近的相邻节点。
  27. 一种计算机可读存储介质,存储有程序指令,当该程序指令被处理器执行时可实现权利要求1-13任一项所述的方法。
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