WO2016160040A1

WO2016160040A1 - Efficient packet aggregation using channel characteristics in a communication network

Info

Publication number: WO2016160040A1
Application number: PCT/US2015/028155
Authority: WO
Inventors: Zongliang WU
Original assignee: Entropic Communications, Inc.
Priority date: 2015-03-27
Filing date: 2015-04-29
Publication date: 2016-10-06

Abstract

A node for transmitting digital data over a network receives a plurality of packet data units and identifies at least two of the packet data units that have the same aggregation identifier. The aggregation identifier is assigned according to channel conditions between the transmitting and the receiving node. The transmitting node then forms an aggregate packet from the packet data units that have the same aggregation identifier and transmits the aggregate packet to a common destination node or nodes.

Description

EFFICIENT PACKET AGGREGATION USING CHANNEL CHARACTERISTICS IN A COMMUNICATION NETWORK

Field

[0001] The present invention relates generally to communication networks, and more specifically to data packet transmission in a communication network.

Background

[0002] Communication networks may be formed when multiple interoperable nodes communicate over a shared medium. One example of such a network is a network that operates in accordance to the Multi-Media over Coax Alliance ("MoCA") MAC/PHY Specification v. 1.0, 1.1, 2.0. In this network, nodes may function as "clients" or "slave" nodes, or as "master'V'network controller'V'network coordinator" ("NC") nodes. A network will typically have a single NC node and any number of client nodes, wherein the NC node may transmit beacons and other control information to manage the network.

[0003] In some networks, such as a MoCA network, a wireless communication network or an Ethernet-based network, digital data is transmitted in the form of a packet. However, overhead information is associated with each packet transmitted through the network. The overhead information, including preambles, identifiers, source and destination addresses, error control fields, etc., is added to the user data and reduces the availability of network bandwidth for user data. There is therefore a need in the art for efficient transmission of communication packets that reduce the ratio of overhead information to data.

BRIEF DESCRIPTION OF THE DRAWINGS

[0004] FIG. 1 is a block diagram of a network in accordance with an exemplary embodiment;

[0005] FIG. 2 is a functional block diagram of an exemplary node in which any one or more of the techniques (e.g., methods) discussed herein may be performed.

[0006] FIG. 3 illustrates the structure of various packets that are received and/or transmitted by network nodes in accordance with an exemplary embodiment; [0007] FIG. 4 illustrates the structure of an aggregated frame in accordance with an exemplary embodiment; and

[0008] FIG. 5 is an overview flow diagram of node functionality according to an exemplary embodiment of Efficient Packet Aggregation Using Channel Characteristics in a Communication Network.

DETAILED DESCRIPTION

[0009] The word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments.

[0010] Packet aggregation is typically used to increase network efficiency by reducing the overhead such as preambles and inter-frame gap. Unfortunately, packet aggregation cannot be effectively accomplished without causing various unwanted outcomes such as latency and increased buffering requirements during certain transmission scenarios. For example, in an Access Network, a head-end typically serves many Customer Premises Equipments (CPEs) simultaneously. If aggregation of downstream traffic from the headend to the CPEs is performed only for packets with the same destination, the aggregation must be purposely buffered to accumulate packets for that single destination over time, increasing latency and buffering resources. Latency affects an important Quality of Service (QoS) parameter, where an increase in latency decreases the QoS. An increase in latency also reduces throughput for Transfer Control Protocol/Internet Protocol (TCP/IP) based communication protocols. Increases in latency may also disable certain functionalities that are latency sensitive such as Digital Transmission Content Protection (DTCP) while increased buffer requirements proportionally increase hardware costs.

[0011] An apparatus and method to improve the effectiveness of packet aggregation by allowing aggregation of packets addressed to multiple destinations for network efficiency is disclosed. Because the channels from a given transmitter to various receivers are typically different, randomly aggregating packets to various destinations requires implementing the Greatest Common Denominator (GCD) bit-loading determined by the channel having the worst channel conditions (or lowest signal to noise ratio). Because individual channel conditions vary greatly, the GCD selected according to the weakest channel may not be optimal resulting in an overall reduced throughput, defeating the original purpose. In an Orthogonal Frequency Division Multiplex (OFDM) system, each channel comprises a number of subcarriers, with each subcarrier potentially having different bit-loading. The GCD for each subcarrier, for two or more channels, is the lowest bit-loading of all the subcarriers with the same subcarrier number.

[0012] Rather than determining a GCD, channels are grouped based on their channel similarities in terms of bit-loading for all their subcarriers, so that packets with destinations to the same group of receivers are aggregated. Each receiver will receive all aggregated packets for the group, filter out only the packets for itself, and ignore all other packets. The transmitter encrypts packets for different receivers with different encryption keys, so that each receiver can only decrypt packets destined to it. The number of channel quality groups in a given network may be a configurable parameter. In a Multiple Dwelling Unit (MDU) access network, a natural group of channels having the same channel characteristics may be all of the CPEs located on the same floor of an apartment building, where the channel path from the head-end to these CPEs typically has the same or very similar characteristics (bit-loading over OFDM subcarriers and power attenuation).

[0013] FIG. 1 is a block diagram of a network 10 in accordance with an exemplary embodiment.

Network 10 includes an NC node 12 and client nodes 13-15. In the exemplary embodiment, network 10 is a network in a home environment, and nodes 12-15 are integrated with or coupled to devices in a home that exchange digital data in the form of packets. Examples of such devices include set-top boxes, digital video recorders ("DVR"s), computers, televisions, routers, etc. Nodes 12-15 are coupled to a network media 16 that provides the media over which the digital data is transferred. In this exemplary embodiment, network media 16 is coaxial cable. However, network media 16 may be any other type of media, including other wired or wireless media. Network 10 may comprise a full mesh network so that any node 12-15 on the network 10 can communicate directly with any of the other nodes on the network 10 in any direction. Network 10 may include any number of nodes 12-15.

[0014] Network 10 may be formed by a node that scans a list of frequency channels to search for an existing network. If an existing network is found, the node will join that network as a client node 13-15. If no existing networks are found, the node will start a new network, such as network 10, as an NC node 12, and client nodes 13-15 will join the new network 10. In an exemplary embodiment, network 10 operates as a network within the allowable frequencies of Multi-Media over Coax Alliance MAC/ PHY Specification v. 1.0 (hereinafter, "MoCA 1.0"). The range of frequencies in MoCA 1.0 is 875-1500 MHz, and frequency channels exist at intervals of either 25 MHz or 50 MHz. Therefore, there is a frequency channel having a center frequency at 875 MHz, another at 900 MHz, another at 925 MHz, and so on through 1000 MHz, and then skipping to 1150 MHz with channels at 50 MHz intervals from there up to 1500 MHz with a channel centered at 1150 MHz, 1200 MHz, etc., up to 1500 MHz. In the example of FIG. 1, network 10 operates at frequency channel Bl (e.g., 900 MHz), while another network having an C node 12 and multiple client nodes 13-15 may operate at frequency channel D2 (e.g., 1200 MHz) or any other available frequency channel.

[0015] When network 10 is initially formed, or when new client nodes 13-15 are admitted, a link maintenance operation ("LMO") is performed from each node to every other node of the network. The LMO is controlled by the NC node 12, which specifies what node is to perform the LMO. An LMO generally involves transmitting probe messages formed using a predetermined bit sequence and length from one node to another node in order to estimate the channel characteristics between the nodes. The receiving node processes the probe messages as received and determines the impairment, or signal to noise ratio, present between the transmitting node and receiving node. The modulation between the transmitting node and receiving node is adapted according to the measured signal to noise ratio of the channel using a bit-loading scheme. Bit-loading is a method of allocating a higher order signal constellation to channels that have higher signal-to-noise ratios and a lower order constellation to carriers that have lower signal-to-noise ratios. A node's greatest common denominator ("GCD") modulation profile may then be calculated based on the individual point-to-point LMO results. In another embodiment, GCD probes may be sent to determine the GCD modulation profile.

[0016] A network 10 may transmit digital data between nodes 12-15 using Orthogonal Frequency- Division Multiplexing ("OFDM") modulation. Digital data communicated over a channel is transmitted on each of exemplary 256 subcarrier frequencies modulated to carry information. All subcarrier frequencies are transmitted to the same receiving node in parallel. Therefore, the exemplary network 10 includes 256 carriers, of which 224 are typically used to carry content in an exemplary embodiment. Each of the 224 content carrying subcarriers is modulated by using Binary Phase-Shift Keying ("BPSK"), Quadrature Phase-Shift Keying ("QPSK"), or other Quadrature Amplitude Modulation ("QAM") in an exemplary embodiment. A network 10 node 12-16 is detailed in FIG. 2.

[0017] FIG. 2 is a block diagram of a node 21 in accordance with an exemplary embodiment. Node 21 can function as an NC, such as node 12 of FIG. 1, or as a client node, such as nodes 13-15 of FIG. 1. Node 21 includes a processor 20, a transceiver 27, and memory 22. Processor 20 may be any type of general or specific purpose processor. Transceiver 27 can be any device that transmits and receives digital data. Memory 22 stores information and instructions to be executed by processor 20. Memory 22 can be comprised of any combination of random access memory ("RAM"), read only memory ("ROM"), static storage such as a magnetic or optical disk, or any other type of computer readable medium. A computer readable medium may be any available media that can be accessed by processor 20 and includes both volatile and nonvolatile media, removable and non-removable media, and communication media. Communication media may include computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave, or other transport mechanism, and includes any information delivery media.

[0018] In an exemplary embodiment, memory 22 stores software modules that provide functionality when executed by processor 20. The modules include an operating system 24, and a packet aggregation module 25. The functionality of these modules, although shown as software in FIG. 2, can be implemented by any combination of hardware or software in other embodiments. Operating system 24 provides the functionality that allows processor 20 to operate node 21, including controlling transceiver 27 and memory 22. Packet aggregation module 25 aggregates packets that are to be transmitted to the same destination node, as disclosed below. Digital data transmitted between nodes 12-15 in network 10 is originally received by one of the nodes 12-15 in the form of Ethernet packets (from their application layer), or "packet data units" ("PDUs") and then converted to MoCA packets before being transmitted to other nodes of network 10.

[0019] FIG. 3 illustrates the structure of various packets that are received and/or transmitted by network 10 in accordance with an exemplary embodiment. An Ethernet packet, such as Ethernet packets 32 and 36, typically include at least an Ethernet header 33, a payload 34 and Frame Check Sequence ("FCS") bits 35 also referred to as cyclic redundancy check (CRC) bits.

[0020] In an exemplary MoCA network, each Ethernet packet must be converted to a MoCA packet before being transmitted to a destination node in the network. A MoCA packet, such as MoCA packets 42 and 43, include the data from the Ethernet packet (i.e., the entire Ethernet packet, including header 33 and FCS 35), as well as a preamble 45, a MoCA MAC header 46, which provides the destination address of the packet, and a MoCA Media Access Control ("MAC") CRC 44. Therefore, in a MoCA network, in order to transmit Ethernet packets 32 and 36, each packet will be converted to a MoCA packet (such as packets 42 and 43), and each MoCA packet will be transmitted separately to a destination node. Packets are transmitted separately even when both packets are addressed to the same destination node or nodes. The transmitting node requests a transmission time slot for each packet via a Media Access Plan (MAP) message. The MAP message is transmitted by the NC node 12 to client nodes 13-15 to define assignments of nodes to time slots, and to announce the schedule of upcoming transmissions. An Interframe Gap ("IFG") 48 is inserted between the transmission of each frame.

[0021] In contrast to sending two or more separate MoCA packets to the same destination node, in an exemplary embodiment packet aggregation module 25 of node 21 aggregates Ethernet frames 32 and 36 into a single aggregated frame 50 when it is determined that frames 32 and 36 are to be transmitted to the destination node or nodes having links sharing the same channel characteristics for reducing overhead and increasing throughput. An exemplary embodiment, shown in Table 1 below, includes a 32 bit field in which 28 bits are reserved and 4 bits indicate the types of aggregation control support.

TABLE 1

Field Length Usage

AGGREGATION 32 bits Indicate if aggregation control is supported as follows: CONTROL Bits 31 :3 - Reserved

Bit 3 - Set to ' Γ if Aggregation header is inserted Bit 2 - reserved, Type III

Bit 1 - set to T if Aggregate on header checksum is enabled

Bit 0 - set to T if original FCS of each PDU is included

[0022] The format of aggregation header 55 in accordance with an exemplary embodiment is shown in Table 2 below.

TABLE 2

Parameter Name Length Description

RESERVED 16 bits Type II

NPDU 16 bits Number of PDUs in this frame

PDUO LEN 16 bits PDU 0 payload size without padding (in bytes) PDU1 LEN 16 bits PDU 1 payload size without padding (in bytes ) PDUN1 LEN 16 bits PDU (N-l) payload without padding size(in bytes) PDUN LEN 16 bits PDU N payload size without padding (in bytes) FCS 16 bits Frame Check Sequence, Aggregation header checksum RESERVED 16 bits Type III

[0023] As shown, exemplary aggregation header 55 includes the total number of PDUs to be aggregated and the length of each PDU. The maximum length of exemplary aggregate packet 50 is 8192 bytes and each PDU is padded to the nearest PDU length, which is a multiple of 4 bytes. In addition, 16 bits of padding are added to aggregation header 55 if it is not a multiple of 4 bytes. The maximum number of packets to be aggregated is independent of the packet size and the aggregation checksum is used if it is enabled in the aggregation control field in MoCA MAC header 53.

[0024] In the exemplary embodiment, the aggregated payload consists of multiple Packet PDUs, where the maximum payload of each PDU is 1518 bytes. Link control, probes, and any MAC layer management packets are not aggregated. Aggregated packets with different aggregation identifiers ("IDs") may be transmitted out-of-order. However, PDUs with the same aggregation ID should be transmitted in order. In an exemplary embodiment, an aggregation ID is a packet classifier that classifies packets into different categories according to their channel conditions. One example is to aggregate all packets having similar channel conditions transmitted to the same destination (unicast) or the same group of destinations (multicast or broadcast), so that packet aggregation and Quality of Service can be supported simultaneously. One node may support one or multiple aggregation IDs. One or multiple aggregation IDs may be defined for a network 10.

[0025] An additional packet sequence number field, as shown in Table 3 below, may be added to the packet aggregate header format or the MAC header to indicate a sequence number for the individual packets or aggregated packets. Individual or aggregated packets can be assigned a unique sequence number to facilitate detection of missing packets and proper ordering of packets if the packets are received out of order. Missing packets can be identified and requested for retransmission.

TABLE 3

Parameter Name Length Description

PACKET SEQ NUMBER 16 bits Packet Sequence number [0026] FIG. 5 is a flow diagram of the functionality of network node 21 of FIG. 2 in accordance with an exemplary embodiment when aggregating packets. In an exemplary embodiment, the functionality of the flow diagram of FIG. 5 is implemented by software, stored in memory or other computer readable or tangible medium, such as packet aggregation module 25, and executed by a processor. In other embodiments, the functionality can be performed by hardware, or any combination of hardware and software.

[0027] Beginning in operation 502, a transmit node 21 determines the channel characteristics (or conditions) between itself and each of its connected receive nodes, and associates each channel with a transmit channel group (also called a GCD Group), according to its channel bit loading characteristics. Transmit channels with similar bit-loadings are grouped into GCD Groups so that their similar bit-loading is used for packet transmissions.

At operation 504, node 21 receives multiple data packets or PDUs from its application layer(s) to transmit to another network node. A PDU may comprise an Ethernet packet, a Multimedia over Coax Alliance (MoCA) packet or other type of network data packet.

[0028] Each PDU includes a header which indicates its destination node address(es) within the network.

An aggregation ID comprising a GCD ID is assigned to each PDU according to bit-loading characteristics of the received PDUs, so that only packets with the same aggregation IDs are aggregated for transmission. Generally, an aggregation ID comprises the GCD Group ID and any combination of destination address or addresses, priority for prioritized, traffic and flow ID for parameterized Quality of Service ("QoS") traffic etc. An aggregate packet header may also comprise a media access control header, a packet priority, an aggregate control field that indicates to a destination node that aggregation control is supported, an aggregation header identifying a number of packet data units in the aggregate packet or a length of each of the packet data units in the aggregate packet. In one exemplary embodiment, the aggregation ID comprises only the GCD Group ID.

[0029] At operation 506, an aggregate packet is formed from the packets with the same aggregation IDs.

The aggregate packet may include a MoCA MAC header and an aggregation header.

At operation 508, through MAP messages, node 21 determines a time slot to transmit the aggregate packet. Determining a time slot to transmit the aggregate packet may comprise requesting a transmission time slot from a network coordinator node. In an exemplary embodiment, a reservation request is first sent to the NC node to allocate a time slot corresponding to the actual size of the aggregated packet, and later a MAP packet may be received from the NC. Packets may be encrypted for different destinations with same or different keys and a receive node may filter only the packets destined to it.

[0030] At operation 510, the aggregate packet is transmitted to the destination node or nodes if multi- casted. The destination node, when it receives the packet, disassembles aggregated packets into individual PDUs. In general, larger packets may generate a larger number of errors due to various noise and interference within the network. When packet aggregation errors occur, the following rules are employed in an exemplary embodiment at the receiving node. When a receiving node sees a "aggregation header checksum" bit enabled in the MAC header, it calculates the checksum of received aggregation header and compares it to the value of checksum in the received header. If the checksums do not match, the packet is dropped. When a receiving node sees the "original Frame Check Sequence (FCS) for each PDU included" bit set in the MAC header, the FCS is not modified while passing the PDUs to a host, but the original FCS is preserved. This allows the host data driver to determine which of the PDUs are corrupted rather than dropping the entire set of aggregated packets. By using the FCS of the original PDUs and the Aggregate Header Checksum, the packet error rate of original individual PDUs is effectively reduced.

In an exemplary embodiment, node 21 has an aggregation capability bit that can be enabled to indicate that the node can aggregate PDUs. After the node is admitted to the network, the NC node broadcasts the newly admitted node's capabilities to the other nodes in the network. As disclosed, a node within a network may aggregate two or more packets that have the same aggregation ID. Transmission of the aggregated packet reduces network overhead without increasing latency or buffer requirements.

[0031] Several embodiments are specifically illustrated and/or described herein. However, it will be appreciated that modifications and variations of the disclosed embodiments are covered by the above teachings and within the purview of the appended claims without departing from the spirit and intended scope of the invention.

[0032] Those of skill in the art would understand that information and signals may be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the above description may be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.

[0033] Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.

[0034] The various illustrative logical blocks, modules, and circuits described in connection with the embodiments disclosed herein may be implemented or performed with a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.

[0035] The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a user terminal. In the alternative, the processor and the storage medium may reside as discrete components in a user terminal. The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

WHAT IS CLAIMED IS: CLAIMS

1. A node apparatus for transmitting digital data over a network comprising: a transceiver configured to determine channel characteristics of connected receive nodes, associate each channel with a Greatest Common Denominator (GCD) group identified by a GCD Identifier (GCD ID) according to channel bit loading characteristics, and to receive a plurality of packet data units (PDUs);

a processor configured to assign an aggregation identifier comprising a GCD ID to each received PDU according to bit- loading characteristics of the received PDUs; a packet aggregator configured to form an aggregate packet from at least two of the plurality of received PDUs having same aggregation identifiers, and determining a time slot to transmit the aggregate packet; and

a transceiver configured to transmit the aggregate packet in the determined time slot on a transmit channel associated with the GCD IDs.

2. The node apparatus of claim 1 wherein the aggregate packet comprises a media access control header.

3. The apparatus of claim 1 wherein the aggregation identifier comprises a packet priority.

4. The apparatus of claim 1 wherein the aggregation identifier comprises only a GCD Group ID.

5. The apparatus of claim 1 wherein the PDUs are Ethernet packets.

6. The apparatus of claim 1 wherein the aggregate packet is a Multimedia over Coax Alliance (MoCA) packet.

7. The apparatus of claim 1 wherein the aggregate packet comprises an aggregate control field that indicates to a destination node that aggregation control is supported.

8. The apparatus of claim 1 wherein the aggregate packet comprises an aggregation header identifying a number of packet data units in the aggregate packet.

9. The apparatus of claim 1 wherein the aggregate packet comprises an aggregation header specifying a length of each of a plurality of PDUs in the aggregate packet.

10. The apparatus of claim 1 wherein the aggregate packet comprises an aggregation header specifying a length of each PDU in the aggregate packet.

11. The apparatus of claim 1 wherein the determining a time slot to transmit the aggregate packet comprises requesting a transmission time slot from a network coordinator node.

12. The apparatus of claim 1 wherein the processor encrypts packets to different destinations with different keys.

13. The apparatus of claim 1 wherein the processor encrypts packets to different destinations with same keys.

14. The apparatus of claim 1 wherein a receive node filters out only packets destined to it.

15. A non-transitory computer readable storage device including instructions stored thereon, which when executed by one or more processor(s) of a network node, causes the network node to perform operations to:

receive a plurality of packet data units from its application layer;

assign an aggregation identifier to each of the plurality of packets according to bit-loading channel conditions of a link between the network node and a destination node of the received packet;

identify at least two of the plurality of packet data units having same aggregation identifiers;

form an aggregate packet from the at least two of the plurality of packet data units; and transmit the aggregate packet.

16. The computer readable media of claim 15, wherein the aggregation identifier comprises a destination address, or a packet priority.

17. The computer readable media of claim 15, wherein the packet data units are Ethernet packets or Multimedia over Coax Alliance (MoCA) packets.

18. The computer readable media of claim 15, wherein the aggregate packet comprises an aggregate control field that indicates to at least one destination node that aggregation control is supported.

19. The computer readable media of claim 15, wherein the aggregate packet comprises an aggregation header having a number of packet data units in the aggregate packet, a length of each of the packet data units in the aggregate packet or a packet sequence number.

20. A method of transmitting digital data over a network comprising:

receiving a plurality of packet data units;

assigning an aggregation identifier to each of the plurality of packets according to channel conditions of a link between the node apparatus and a destination node; identifying at least two of the plurality of packet data units that have a same aggregation identifier;

forming an aggregate packet from the at least two of the plurality of packet data units wherein the aggregate packet comprises a media access control header;

calculating a first checksum for the aggregation header;

comparing the first checksum to a second checksum that is received in an aggregation header of the aggregated packet;

determining the presence of an original frame check sequence bit in the media access control header; and

transmitting the aggregated packet without modifying the frame check sequences when the second checksum is found to be correct for at least one destination.