WO2016156030A1

WO2016156030A1 - Circuit assembly for operating at least a first and exactly one second cascade of leds

Info

Publication number: WO2016156030A1
Application number: PCT/EP2016/055555
Authority: WO
Inventors: Meik Weckbecker
Original assignee: Osram Gmbh
Priority date: 2015-03-31
Filing date: 2016-03-15
Publication date: 2016-10-06
Also published as: DE102015205808A1

Abstract

The present invention relates to a circuit arrangement (10) for operating a plurality of cascades of LEDs connected in parallel. The latter are operated from a controllable current source, wherein the currents are regulated by n-1 cascades, wherein the nth cascade serves as an overflow valve. In the context of the regulation, PWM signals are used.

Description

description

Circuit arrangement for operating at least a first and exactly a second cascade of LEDs

The present invention relates to a circuit arrangement for operating at least a first and exactly a second cascade of LEDs. In particular, it addresses the problem of adjusting the brightness of multichannel LED modules controlled by the combination of linear dimming and PWM (pulse width modulation) dimming. In other words, the dimming is achieved by a combination of PWM and lowering the amplitude of the current through the respective LED cascade. This expands the information content of the PWM by the level of the amplitude of the signal, i. Not only the pulse width is variable, but also the amplitude of the current flowing through the respective LED cascade.

By lowering the current amplitude, the LEDs of the respective LED cascade work in a dimmed state in one

more efficient area. Within the respective, maximum permissible LED current can then additionally by means of

Pulse width modulation can be controlled. In addition to the mentioned increase in efficiency will continue to be a

Life extension of the respective LEDs achieved.

In this connection, EP 1 689 212 B1 is a

A method for dimming over a dimming range of a light source known whose brightness is a function of

average current flow through the light source, wherein the light source has a nominal current value and wherein the method comprises the connection operations over at least a portion of the dimming range: energizing the light source with a current whose intensity is switched between an on value and an off with a given duty cycle Value, and setting at least one of the on and off values to a portion of the rated current value. In an exemplary embodiment illustrated in FIG. 4, for example in a dimming range between 0% and L% dimmed over an uncontacted constant current, ie by choosing a lower current amplitude. In a range between L% and H% is a mixed form selected from amplitude-reduced constant current and PWM, while in a range between H% to 100% is dimmed only by PWM, the current amplitude on

Rated current level is.

In one of the cited document in FIG. 5

illustrated embodiment is dimmed in a range of Dimmlevels between 0% and H% by adjusting the amplitude of the current and a PWM with a constant low on-time. In a range between H% and 100% of the

Dimmlevels is the current at rated current level, the on-time increases up to 100%.

From DE 198 48 925 B4 a method for driving light emitting diodes is known in which the flow of current through the LEDs to reduce the brightness of a

Display device is reduced, wherein the amount of the current flow through the LEDs only up to a

predetermined lower limit value is reduced, and wherein for further reducing the brightness of the flow stream is clocked, wherein the amount of the flow stream during the clocking is equal to or greater than the lower limit value.

In the two known from the prior art

Procedures, however, has the disadvantage that a

Variation of the brightness in a dimming process with a variation of the color locus goes along. This is undesirable if a desired color location, for example for the provision of predetermined lighting conditions, is to be maintained. In addition, there is an undesirable influence of the temperature on the color point, which even increases with the dimming. The object of the present invention is to further develop the known methods such that a

Dimming without unwanted color shift is possible. This object is achieved by a circuit arrangement having the features of patent claim 1.

The present invention is based on the finding that this task can be optimally solved if the two subtasks, i. Dimming the current on the one hand and keeping constant the color location on the other hand, from each other

be decoupled. For this purpose, in principle, a changeover is made such that the circuit arrangement can be fed from a power source. This allows up

simple way, the amplitude of the current source

to vary output sum. In addition, current regulation takes place by means of PWM, but only in the at least one first cascade of LEDs. The second cascade of LEDs serves as a bypass strand, in other words as an overflow valve for the output signal of the power source.

In contrast to the state of the art, two levels are thus regulated: The second cascade always receives the first-level regulated current of the current source without any PWM

delivered, but reduced by the current, which is additionally regulated in the second level and through which flows at least a first cascade of LEDs. Thus, the second gets

Cascade of LEDs also the function of a master. Because it essentially determines the overall brightness of the system, because it makes sense to put the color of LEDs, which require the highest current to produce the desired white light (ie green or mint), into this second cascade. The regulation of the whole system gets a cascade structure. A circuit arrangement according to the invention for operating at least one first and exactly one second cascade of LEDs therefore comprises a controllable current source which is designed to output a summation current as a function of its output provided to the power source control signal, such as a dimming signal to provide. It further comprises a control device, which in turn comprises: at least a first PWM output for providing a first PWM signal; an output for providing the control signal to the power source; an actual value input for detecting the instantaneous actual value of the total current through all cascades of LEDs; and at least one setpoint input for receiving a signal influencing the setpoint value of the summation current through all cascades of LEDs. The circuit arrangement further comprises an adder device for providing to the control device a signal proportional to the sum of the actual values of the currents through all the cascades of LEDs, the adder device comprising a first ohmic resistor, thus forming between all cascades of LEDs, forming a summing node and a first

Reference potential is coupled, that it is flowed through by the sum of the actual values of the currents through all cascades of LEDs. Each first cascade of LEDs is one

Associated with a driving device, comprising: a serially arranged to the respective cascade of LEDs first electronic switch with a control electrode, a working electrode and a reference electrode; a

Operational amplifier circuit for controlling the current through the respective cascade of LEDs with a

Operational amplifier whose output is coupled to the control electrode of the first electronic switch and whose negative input is supplied with a signal which is proportional to the current through the respective LED cascade; one

Voltage divider between the output of the

Adding means and the first reference potential is coupled, wherein the tap of the voltage divider is coupled to the positive input of the operational amplifier; and a second electronic switch having a control electrode, a working electrode and a reference electrode, the control electrode being coupled to the first PWM output associated with the respective first LED cascade, wherein the

Working electrode with the tap of the voltage divider coupled, wherein the reference electrode with the first

Reference potential is coupled, at least the

Series circuit comprising the respective LED cascade and the distance working electrode reference electrode of the respective first switch between the output of the current source and a first input of the adder is coupled. The second cascade is coupled between the output of the current source and the summing node of the adder. By using an uncontrolled overflow string, which is exactly a second cascade, can now from a

Power source can be powered instead of a voltage source. This further results in a high efficiency of the circuit arrangement. In an inventive

Circuitry can be used during each on-time

PWM intervals, the current through the respective target channel, i. the respective first cascade, the PWM are regulated. This results in the desired decoupling between

Brightness and color location. Otherwise, the PWM would have to be converted in a complicated manner into a dependency on the respective dimming position. The present invention accordingly makes decoupling in a simple manner possible

Brightness and color space achieved, so that both sizes can be set separately.

A preferred embodiment is characterized in that each drive device as an input to the

Adding device comprises an ohmic resistance between the reference electrode of the respective first

electronic switch and the summing node is coupled. The voltage drop across the respective resistor is used to determine the current flowing through the respective first LED cascade, in particular around it

Regulate in terms of its amplitude.

The adding device preferably comprises a

Operational amplifier and a voltage divider, wherein the voltage divider between the reference potential and the output the operational amplifier is coupled, wherein the positive input of the operational amplifier is coupled to the summing node, wherein the negative input of the

Operational amplifier is coupled to the tap of the voltage divider. By using a so connected voltage divider is a negative feedback for the

Operational amplifier achieved, so this one

linear amplifier, whereby the resulting voltage at the summing node to a desired

Range of values at the actual value input of the control device

can be displayed.

The circuit arrangement preferably comprises a further voltage divider with an ohmic resistance and an NTC resistor, wherein the further voltage divider of the current source is connected in parallel, wherein the tap of the other

Voltage divider with a further actual value input of

Control device is coupled. In this way, an automatic control of the brightness and the color location as a function of the temperature is made possible.

Preferably, another setpoint input represents the

Control device is a dimming signal input for supplying a dimming signal. This allows a simple way dimming while keeping constant the color location.

Furthermore, the operational amplifier has each

Drive device to a negative reference potential terminal, said negative reference potential terminal according to a first variant with the first reference potential, according to a second variant is coupled to the summing node. In the first variant, there is the advantage that the consumption of the respective operational amplifier in the

Measurement of the total current is not included. Thus, the measurement of the LED current is not distorted by the

Consumption of the respective operational amplifier. In the second-mentioned variant, the advantage results in a more accurate and faster feedback, since the Feedback circuit comprises fewer components, so also significantly more compact and thus less susceptible to interference is formed. According to a preferred embodiment, the

Circuit arrangement two first cascades of LEDs and a second cascade of LEDs. In this case, it is particularly preferred if a cascade of LEDs comprises LEDs that are in the blue

Wavelength range, a cascade of LEDs comprises LEDs emitting in the red wavelength range, and includes a cascade of LEDs LEDs that radiate at least in the sum in the green wavelength range. In this way, almost any, in practice relevant color location can be controlled.

Particularly preferably, the control device has a

further setpoint input for feeding a color locus. In this way, the option is provided to not only separately regulate brightness and color location, but to set independently as desired.

Specifically in this context, but also independently thereof, the control device according to a particularly preferred embodiment comprises a memory device, in the rule polynomials for controlling a predetermined color location

are stored. The use of rule polynomials allows a more precise adjustment of the color locus than look-up tables known in the art. Look-up tables usually only apply to a specific stream and are limited because of this

Storage space stored in the control device for only a few streams, so that no continuous dimming under a precise observance of the color location is made possible. By depositing rule polynomials can now under stress minimum storage space for any finely resolved dimming positions, the necessary currents through the corresponding cascades to maintain the

Color accurate determined. Only in synopsis with the separate adjustment of brightness and color location made possible according to the invention, the definition of the

Farborten about rule polynomials their extraordinary importance. In this context, it is particularly preferred if the rule polynomials are at least of the second degree and the

Dependence of the currents through the respective first cascades of a first size, that of the current source

proportional to be provided, and a second size, which is proportional to the temperature of the circuit reproduce. In this way, it is not necessary to explicitly detect the currents through the individual LED cascades and supply them to the control device. Rather, the regulation of the color locus is made possible solely on the basis of temperature and total current whose actual values, as already mentioned, are already recorded in the circuit arrangement.

Further preferred embodiments emerge from the subclaims.

Hereinafter, embodiments of the present invention will be described in more detail with reference to the accompanying drawings. These show:

Fig. 1 in a schematic representation a first

Embodiment of an inventive

Circuitry;

Fig. 2 is a schematic representation of a second

Embodiment of an inventive

Circuitry;

Fig. 3 is a graph for calculating the rule polynomials for

LEDs emitting in the red or blue wavelength range, depending on the temperature at a constant color location; a graph for the calculation of the rule polynomials for LEDs emitting in the red or blue wavelength range, depending on the total current provided by the current source at a constant

Temperature; a graph showing the brightness PhiV as a function of the color locus at a constant, output from the current source total current; a graph depicting the dependence of the current through LEDs, in the blue

Wavelength range or in the red

Wavelength range or in the green

Wavelength range, from the temperature at constant color location and constant, output from the power source total current.

Fig. 1 shows a schematic representation of a first

Embodiment of an inventive

Circuitry. This includes a taxable

Current source IQ, which is designed at its output a sum current I _ges in dependence of one of

Control device 12, which may in particular represent a microcontroller, applied to the current source IQ

To provide control signal St. The already mentioned

Controller 12 includes a first PWM output PWMl for providing a first PWM signal and a second PWM output PWM2 for providing a second PWM signal. It also comprises an output IS for providing the control signal St to the current source I Q. A first actual value input ADC1 is used to detect a temperature of

Circuit arrangement 10. A second actual value input ADC2 is used to detect the instantaneous actual value of a total current through all the cascades of LEDs of the circuit arrangement 10, which will be discussed in greater detail below, which is proportional to the _total current I _ges output by the current source IQ. It also includes a setpoint input ADC3 for Receiving a dimming signal DIM. Another setpoint input ADC4 is used to receive a setpoint signal FO for the color location. The input ADC1 of the control device 12 is coupled to the tap of a voltage divider which is connected in parallel with the current source IQ and comprises an ohmic resistor RIO and a temperature-dependent resistor NTC1. In the exemplary embodiment, the circuit arrangement 10 comprises three different cascades of LEDs, wherein the

For clarity, only one LED of the respective cascade of LEDs is shown as an example. An LED cascade according to the present invention comprises

at least one LED, but usually several LEDs.

The LED cascade LEDl emits in the red wavelength range, the LED cascade LED2 in the blue wavelength range and the LED cascade LED3 in the green wavelength range. The current flowing through the first LED cascade LED1 is I DI

denotes the current flowing through the second LED cascade LED2 with I D2 and the current flowing through the third LED cascade LED3 with I D3.

The circuitry includes an adder 14 for providing a signal at the input ADC2 of FIG

Control device 12, which is proportional to the sum of the actual values of the currents I DI, I D2, I D3 through all cascades of LEDs LEDl, LED2, LED3. For this purpose, the adder 14 comprises an ohmic resistor R3, the formation of a

Summing node Nl so between all cascades of LEDs

LEDl, LED2, LED3 and a reference potential is coupled, that it is flowed through by the sum of the actual values of the currents I DI, I D2, I D3 through all cascades of LEDs LEDl, LED2, LED3, thus acting as a shunt resistor. The adder 14 further comprises an operational amplifier IC2 and a voltage divider comprising the ohmic resistors R8 and R9. The voltage divider R8, R9 is between the

Reference potential and the output of the operational amplifier IC2 coupled. The plus input of the operational amplifier IC2 is coupled to the summing node Nl, wherein the negative input of the operational amplifier IC2 with the tap of the

Voltage divider R8, R9 is coupled.

As can be seen from the illustration in FIG. 1, the LED cascade LED1 is assigned a drive device 16a, and the LED cascade LED2 is assigned a drive device 16b. The LED cascade LED3, however, has no such drive device. For other embodiments applies: Regardless of the

Number of parallel-connected LED cascades is always, as will be explained in more detail below, one of the LED cascades as overflow valve for the output signal of the current source I Q, exactly this LED cascade then

correspondingly no drive device is assigned.

For example, embodiments are conceivable with two, four, five, etc. parallel LED cascades.

The structure of the drive devices is described below using the example of the drive device 16a; for the drive device 16b the same applies.

The drive device 16a accordingly comprises a first electronic switch Tla arranged in series with the LED cascade LED1, having a control electrode, a working electrode and a reference electrode. It includes one

Operational amplifier circuit for controlling the current I _D I through the cascade LED1 with an operational amplifier ICla whose output is connected to the control electrode of the first

electronic switch Tla is coupled and whose negative input is supplied with a signal which is tapped at a resistor Ria, which is connected in series between the

Reference electrode of the electronic switch Tla and the summing node Nl is coupled. A voltage divider comprising the ohmic resistors R4a and R5a is coupled between the output of the operational amplifier IC2 of the adder 14 and the reference potential, the tap of the Voltage divider R4a, R5a is coupled to the positive input of the operational amplifier ICla.

The drive device 16a further comprises a second electronic switch T2a with a control electrode, a working electrode and a reference electrode, wherein its

Control electrode with the PWM output PWM1 the

Control device 12 is coupled, wherein its

Working electrode is coupled to the tap of the voltage divider R4a, R5a and its reference electrode with the

Reference potential. The series circuit comprising the LED cascade LED1, the distance working electrode reference electrode of the first electronic switch Tla and the ohmic resistor Ria are connected in series between the output of

Current source I Q and the positive input of the operational amplifier IC2 of the adder 14 coupled. As already mentioned, corresponding statements apply to the

Drive device 16b with respect to the LED cascade LED2. In contrast, the LED cascade LED3 is coupled without further components between the output of the current source I Q and the summing node Nl of the adder 14.

As can be seen from the illustration of FIG. 1, the negative reference potential terminals of the operational amplifiers ICla and IClb are coupled to the summing node Nl.

The voltage divider R4a, R5a, corresponding to R4b and R5b, as well as R8 and R9 can also be designed as non-linear voltage dividers, for example, in that one of the two ohmic resistors is replaced by a diode.

This has the advantage that in the form of the diode forward voltages further constants can be introduced into the control circuit, so that the operating point of such a circuit can be placed for example in the break point of a diode characteristic, resulting in a differentially high resistance, although the absolute value is much lower than the linear equivalent and thus produces fewer losses, and that by an appropriate choice of Si diodes, zener diodes or Schottky diodes the temperature dependence of

Operational amplifier and electronic switch can be compensated. For the operation of the illustrated in Fig. 1

Shooting arrangement:

The voltage divider R8, R9 is a negative feedback for the operational amplifier IC2, so that this linearly converts the voltage drop across the resistor R3 voltage to the value range of the input ADC2 of the control device 12. The actual value of the sum current proportional size at the output of the operational amplifier IC2 is provided by means of the voltage divider R4a, R5a, and R4b, R5b adapted to the value range of the above ohmic

Resistance Ria or Rlb decreasing voltage. As a result, the losses of the circuit arrangement can be significantly reduced. Assuming that at a corresponding time of the PWM signal PWM1 (PWM1 high), the transistor T2a is turned on, for example, by 6 V at its gate, the tapping point of the voltage divider R4a, R5a is pulled to the reference potential. Accordingly, if the reference potential at the positive input of the operational amplifier ICla is present, it reduces the current I DI through the LED cascade LED 1 until the latter is at zero, by driving the gate of the electronic switch Tla accordingly From the input, ie the gate of the transistor T 2 a , to the output, the current I DI

considered, thus inverts the drive device 16a. The control circuit in which the operational amplifier ICla is active, is shown in dashed lines and is, as can be seen, very compact; It is characterized by short distances and therefore reacts very fast.

When the transistor T2a non-conductive, ie PWM1 is set to "low", the tap of the voltage divider R4a, R5a is free and thus proportional to the total current I _tot. Therefore, since the Plus input of the operational amplifier ICla is applied to a potential not equal to zero, this turns on the transistor Tla, so that the current I DI begins to flow. As soon as a current I DI flows, this flows not only via the resistor Ria, but also via the resistor R3 to the reference potential. The voltage drop across Ria causes the voltage at the negative input of the operational amplifier ICla increases, so that the transistor Tla is again switched slightly less conductive. This is therefore indeed low impedance, but not fully connected. The current I DI is therefore proportional to

Product of the sum current I _tot and the inverse of the signal PWM1, ie PWMl.

The same applies to the current I D2 with respect to the

Drive device 16b.

Because the negative reference potential of the

Operational amplifier ICla and IClb is at the potential of the summing node Nl, the offset of these operational amplifiers ICla and IClb can be compensated in a simple manner. When these operational amplifiers ICla and IClb are connected to the reference potential of the control device 12 as shown below with reference to FIG. 2, and 0 V are applied to the input of the operational amplifiers ICla and IClb, the respective operational amplifiers ICla and IClb output the same Offset voltage off. This then causes an undesirable current flow through the

corresponding LED cascades LED1 and LED2. Due to the fact that in the embodiment shown in FIG. 1, the negative reference potential of the operational amplifiers ICla and IClb is now higher by the voltage drop across the shunt resistor R3, the input signal of the operational amplifiers is in

negative area and at the outputs of

Operational amplifiers are actually 0V.

In summary, a system of three adjustment knobs can be made in the embodiment of Figure 1 thus:. I _ges, PWML and PWM2. Through these three control knobs The currents I DI, I D2 and I D3 can be adjusted in terms of their amplitude, whereby the brightness and the color locus of the output from the circuit arrangement in Fig. 1

Total radiation separately adjustable.

The illustrated in Fig. 2 embodiment of a

Circuit arrangement 10 according to the invention differs from the embodiment illustrated in FIG. 1 in that the negative reference potential terminal of FIG

Op Amp ICla and IClb with the first

Reference potential is coupled, and not with the

Summing node Nl. This results in a somewhat more sluggish, although control of the currents I and I DI D2, however, so that the advantage that in the measurement of the total current I _tot means of the adder 14 is accompanied by the consumption of

Op Amp ICla and IClb is not included.

Particularly preferably, the control device 12 comprises a memory device 18, are stored in the rule polynomials for controlling a predeterminable color locus. These rule polynomials are at least of the second degree and give the dependence of the currents I DI, I D2 by the cascades LED1, LED2 of

Total current I _ges and the temperature T again. In detail:

The LEDs are measured to derive the rule polynomials. The polynomials are created from the measured values. In one embodiment, the color locus was chosen to be CCT = 3000K.

The system of current regulation is designed as follows:

I _Dl = f (T _g

^* Iges is the input current coming from the current source IQ

is delivered. IDI and ID2 are dependent on the temperature T and the magnitude of the amplitude of the total current I _ges . ID3 is unregulated and corresponds to the difference between I _tot and the sum of IDI and ID2.

In a preferred embodiment, second-order polynomials are calculated. These give the course of the currents with sufficient accuracy: y = a + b * x + c * x ²

Ι _οι = (α _{ι +} ^ * T + _Cl * T ² ) * (a ₂ + b ₂ * I _gea + c ₂ * I _g ²

I _m = (a ₃ + b ₃ * T + c ₃ * T ² ) * (a ₄ + b ₄ * I _ges + c ₄ * I _g ² .

Subsequently, polynomial interpolation is performed for the currents IDI and ID2 for a constant total current I _ges .

In the exemplary embodiment I _ge s = 700 mA was selected. The

Measurement results for IDI lead to the following term with a dependency on the temperature T (in the equation, the dependence y (x) is shown again for ease of reference to the above equation): y = 0.008213934150x ² + 0.040577739029x + 136, 408238292360

This results

I _m = (136.4082 + 0.040577 * T + 0.00821 * Γ ² ) * (Ω ₂ + b ₂ * I _ges + c ₂ * I _g

This dependence is shown in FIG. From the

corresponding measured values for ID2, the corresponding equation for ID2 likewise shown in FIG. 3 results: y = 0.00015039x ² - 0.32818158x + 58.98800033 It follows:

I _m = (58.98800033 -0.32818158Γ + 0.00015039Γ ² ) * (Ω ₄ + b ₄ * I _ges + c ₄ * I _g ²

To determine the parameters of the second half of

Equations, that is, a2, b2, C2, and a _4, b ₄ and c _4, reference is made to Fig. 4, wherein for T = constant, in

Embodiment T = constant = 80 ° C, the dependence on the total current I _{ges is} shown. It follows for I _D i: y = 0.000000016767x ² + 0.001625121097x + 0.019897160742.

It follows:

I _m = (a ₁ + b ₁ * T + c ₁ * T ^{2) * (0.019897 + 0.001625 *} 1 _tot + 0.000000016767 * I _g ²

Substituting the equation constant determined above for I s = _ge in the constant determined for T = equation, we obtain

I _m = (136.4082 + 0.040577 * T + 0.0082 l * T ² ) * (0.019897 + 0.001625 * I _ga + 0.000000016767 * I _g ² _es ) For ID2, one obtains accordingly:

I _m = (58.98800033- 0.32818158 * r + 0.00015039 * r ² ) * (0.02385204 + 0.00202625

With these two polynomials for IDI and ID2, the currents IDI, ID2 and ID3 can now be calculated continuously for all I _tot and all temperatures T.

FIG. 5 shows the distribution of the brightness PhiV over the chromaticity coordinate CCT at a constant total current I _ges . As you can see, the brightness of the 2700K color temperature initially increases as the color temperature increases. In this area, the connecting line runs between the color loci of the red-emitting LEDs of a first cascade and the greenish-emitting LEDs of the second Cascade approximately on the Planckian curve, the blue emitting LEDs are almost switched off, only the greenish emitting LEDs have to be controlled brighter. Despite constant total current leads the

uneven eye sensitivity too subjective

perceived higher brightness. On the way to higher color temperatures, the blue-emitting LEDs must be switched on from approx. 2900K. The present from here

Tri-blend to guide the mixed color spot on the CIE1931 color chart "across the color locus of the second LEDs

Cascade "reduces the efficiency of the overall circuit, and thus the brightness, but by a maximum of 2%, only when the mixed color location on the Planckian curve at very high

Color temperatures on the degrees of connection between the

Color location of the LEDs of the second cascade and the color location of the blue emitting LEDs of the second first cascade "turns", the red LEDs are virtually turned off

Overall light brighter, as the increasingly dominant blue-emitting LEDs are more efficient than those in the greenish radiant.

From the above formulation is clear that here the

Brightness is a result of the color location. To even out the brightness across all color locations, the

Control device 12 via its control output IS readjust the all-supplying current source IQ, for example, with a factor that is complementary to the color locus to Fig. 5 runs. Fig. 6 shows in addition to the representation of Fig. 3 for a color point CCT = 3000 K and I _tot = 700 mA in addition to the

Temperature dependence of the currents IDI and ID2 also that of the current ID3, which results according to I _D 3 = I ge _S - (IDI + ID2) ·

The detection of the currents IDI and ID2 takes place at the

Circuit arrangements according to the invention indirectly. With reference to IDI results: IDI flows only when the transistor T2a is turned off, that is, when: PWM1 = 0 V. The amplified sum current signal visum, see Fig. 1 and Fig. 2, is given not only to the control device 12, but through the voltage divider R4a , R5a is also divided down to the setpoint input of the operational amplifier ICla. As a result, this gate controls its output so far that the transistor Tla becomes conductive so far (in the linear range) that the voltage across the ohmic

Resistor Ria plus the voltage across the resistor R3 (ie the raw measured value of the cumulative current) is equal to the voltage across the resistor R5a.

As long as the transistor T2a does not conduct, the level is

Operational amplifier ICla the current I _DI SO, that the negative feedback voltage across the resistor Ria of the input voltage across the resistor R5a corresponds exactly. It therefore applies:

(R5a / (R4a + R5a)) * V _lSum .

Solving for IDI results: IDI = (R5a / (Ria (R4a + R5a))) * V _Lsum - (R3 / Rla) * I _ges.

Already here it can be seen that IDI linearly from I _ges

depends. With V _lSum = (R9 / (R8 + R9)) * I tot we get:

IDI = [(R5a * R9 / (Ria (R4a + R5a) (R8 + R9))) - (R3 / Rla)] * I or

IDI = [(R5a / (Ria (R4a + R5a))) - (R3 (R8 + R9) / (Rla * R9))] * Iges The factor before visa is in the control device 12

stored. Thus, as long as PWM1 = 0 V, this can calculate the current IDI which is exactly in the stored ratio to the visa applied to the input ADC2 of the control device 12. Since visa is measured permanently, so is the

Instantaneous value of IDI and PWM \ also weights the

Average value of IDI can be determined. In a corresponding manner, the factor for the calculation of ID2 as a function of I _ges or depending on visa can be determined. For ID2 follows:

ID2 = [(R5b * R9 / (RLB (R4b R5b +) (R8 + R9))) - (R3 / RLB)] * I _ges or:

ID2 = [(R5b / (RLB (R4b R5b +))) - (R3 (R8 + R9) / (RLB * R9))] * I _ges. For ID3 applies accordingly:

and thus:

I _D 3 = 1 - {[(R 5a / (Ria (R 4a + R 5a))) - ( _R 3 (R 8 + R 9) / (R a I * R 9))] +

[(R5b / (Rlb (R4b + R5b))) - (R3 (R8 + R9) / (Rlb * R9))]] + _sat .

Claims

claims

1. Circuit arrangement (10) for operating at least one first (LED1; LED2) and exactly one second cascade (LED3) of LEDs comprising:

- A controllable current source (IQ), which is designed to provide at its output a sum current (I _ges ) in response to a to the current source (IQ) applied control signal (St);

a control device (12), which in turn comprises:

at least a first PWM output (PWM1; PWM2) for

Providing a first PWM signal;

- An output (IS) for providing the control signal (ST) to the power source (IQ);

- An actual value input (ADC2) for detecting the current

Actual value (ViSum) of the total current (I _ges ) through all cascades (LED1, LED2, LED3) of LEDs; such as

at least one setpoint input (ADC3; ACD4) for

Receiving a setpoint of the total current (Iges) through all cascades (LED1, LED2, LED3) of LEDs

influencing signal;

- An adder (14) for providing a signal which is proportional to the sum of the actual values of the currents (IDI, ID2, ID3) by all cascades (LED1, LED2, LED3) of LEDs, to the control device (12), wherein the adding device

(14) comprises a first ohmic resistor (R3) which is coupled to form a summing node (Nl) between all cascades (LED1, LED2, LED3) of LEDs and a first reference potential, so that it is the sum of the actual values of the currents through all cascades (LED1, LED2, LED3) are passed through by LEDs;

- Wherein each first cascade (LED1; LED2) of LEDs one

Associated with the drive device (16a, 16b), which comprises:

a first electronic switch (Tla;

Tlb) with a control electrode, a working electrode and a reference electrode;

an operational amplifier circuit for controlling the Current (I DI, I D2) through the respective cascade (LED1;

LED2) of LEDs with an operational amplifier (ICla, IClb) whose output is coupled to the control electrode of the first electronic switch (Tla; Tlb) and whose negative input is supplied with a signal corresponding to the current through the respective LED cascade (LED1 ; LED2) is proportional;

a voltage divider (R4a, R5a; R4b, R5b) coupled between the output of the adder (14) and the first reference potential, the tap of the voltage divider (R4a, R5a; R4b, R5b) being connected to the plus input of the operational amplifier (ICla; IClb); such as

a second electronic switch (T2a, T2b) having a control electrode, a working electrode and a reference electrode, wherein the control electrode is coupled to the first PWM output (PWM1, PWM2) associated with the respective first LED cascade (LED1, LED2) the working electrode is coupled to the tap of the voltage divider (R4a, R5a; R4b, R5b), the

Reference electrode is coupled to the first reference potential,

- Wherein at least the series circuit comprising the

respective LED cascade (LED1, LED2) and the distance working electrode reference electrode of the respective first switch between the output of the current source (I Q) and a first input of the adding device (14)

coupled,

the second cascade (LED3) between the output of the current source (IQ) and the summing node (Nl) of the

Adding device (14) is coupled.

2. Circuit arrangement (10) according to claim 1,

characterized in that

each drive device (16a; 16b) comprises an ohmic resistor (Ria; Rlb) coupled between the reference electrode of the respective first electronic switch (Tla; Tlb) and the summing node (Nl).

3. Circuit arrangement (10) according to any one of claims 1 or 2, characterized in that

the adder (14) comprises an operational amplifier (IC2) and a voltage divider (R8, R9), wherein the

Voltage divider (R8, R9) is coupled between the reference potential and the output of the operational amplifier (IC2), wherein the positive input of the operational amplifier (IC2) with the

Summing node (Nl) is coupled, wherein the negative input of the operational amplifier (IC2) with the tap of the

Voltage divider (R8, R9) is coupled.

4. Circuit arrangement (10) according to one of the preceding claims,

characterized in that

the circuit arrangement (10) comprises a further voltage divider with an ohmic resistance (RIO) and an NTC resistor (NTC1), wherein the further voltage divider of the

Current source (IQ) is connected in parallel, wherein the tap of the further voltage divider is coupled to an actual value input (ADC1) of the control device (12).

5. Circuit arrangement (10) according to one of the preceding claims,

characterized in that

the or another setpoint input (ADC3) of the

Control device (12) represents a dimming signal input for supplying a dimming signal (DIM).

6. Circuit arrangement (10) according to one of the preceding claims,

characterized in that

the operational amplifier (ICla; IClb) each

Drive device (16a, 16b) a negative

Reference potential terminal, said negative reference potential terminal is coupled to the first reference potential.

7. Circuit arrangement (10) according to one of claims 1 to 5, characterized in that

the operational amplifier (ICla; IClb) each

Drive device (16a, 16b) a negative

Reference potential terminal, this negative

Reference potential terminal is coupled to the summing node (Nl).

8. Circuit arrangement (10) according to one of the preceding claims,

characterized in that

the circuit arrangement (10) comprises two first cascades (LED1; LED2) of LEDs and a second cascade (LED3) of LEDs.

9. Circuit arrangement (10) according to claim 8,

characterized in that

a cascade of LEDs includes LEDs that are blue

Radiate wavelength range, comprising a cascade of LEDs LEDs that emit in the red wavelength range and includes a cascade of LEDs LEDs that emit at least in the sum in the green wavelength range.

10. Circuit arrangement (10) according to one of the preceding claims,

characterized in that

the control device (12) has a further desired value input (ADC4) for supplying a color location (FO).

11. Circuit arrangement (10) according to one of the preceding claims,

characterized in that

the control device (12) comprises a memory device (18) in which rule polynomials for controlling a predefinable color location (FO) are stored.

12. Circuit arrangement (10) according to claim 11,

characterized in that the control polynomials are at least of the second degree and the dependence of the currents (IDI; ID2) on the respective first cascades (LED1; LED2) is of a first magnitude which corresponds to the total current (I _GES ) to be supplied by the current source (IQ).

is proportional, and a second quantity which is proportional to the temperature (T) of the circuit arrangement (10),

play.