WO2016150583A1

WO2016150583A1 - Power semiconductor device and power semiconductor module comprising a power semiconductor device

Info

Publication number: WO2016150583A1
Application number: PCT/EP2016/051137
Authority: WO
Inventors: Arnost Kopta; Venkatesh Sivasubramaniam
Original assignee: Abb Technology Ag
Priority date: 2015-03-24
Filing date: 2016-01-20
Publication date: 2016-09-29

Abstract

The present invention relates to a power semiconductor device (18), comprising a top side surface (24) and a back side surface (20), wherein the back side surface (20) is designed for connecting the power semiconductor device (18) to a substrate metallization (14) and wherein the top side surface (24) is located opposite to the back side surface (20), wherein the top side surface (24) comprises at least one migration barrier (32) such, that at least one migration barrier (32) at least partly forms the top side surface (24) of the power semiconductor device (18). The present invention provides a means for reducing electromigration and the effects accompanied therewith.

Description

Power semiconductor device and Power semiconductor module comprising a Power semiconductor device Technical Field

[0001] The present invention relates to power semiconductor devices and to power semiconductor modules comprising such power semiconductor devices. The present invention further relates to a method of forming a power semiconductor module. The present invention particularly refers to an improved power semiconductor device for forming a power semiconductor module having an improved resistance against electromigration and particularly against dendrite formation.

Background Art

[0002] Power semiconductor devices and power semiconductor modules comprising such power semiconductor devices are generally known in the art. Such power semiconductor modules often comprise the respective power semiconductor devices being located in a housing which should serve to a hermetic seal for securing the internal structure of the module.

[0003] However, perfect hermeticity is often not or only hardly obtainable. Therefore, it cannot always be prevented that humidity enters the module and negatively influences the internal structure of the module.

[0004] For example, humidity inside the module can lead to electromigration, often accompanied by dendrite formation. Such electromigration effects, in particular dendrite formation, may lead to a reduced working performance of the module or may in extreme situations damage or destroy the respective module or parts located therein.

[0005] It is therefore an object when building power semiconductor modules to prevent or at least to significantly reduce electromigration and the effects accompanied therewith. It is therefore generally known to provide structures inside the module which are designed to counteract electromigration.

[0006] Known from US 2014/0138834 A1 , for example, is an integrated circuit package, such as a radio frequency transistor package, having a first and a second electrode on a support substrate. A dendritic migration is described to be interrupted by a floating electrical barrier including a dam mounted onto the support substrate between the first and the second electrode. [0007] Known from US 2014/0264878 A1 is further a structure including a dielectric layer on a substrate; a first wire formed in a first trench in the dielectric layer, a first liner on sidewalls and a bottom of the first trench and a first copper layer filling all remaining space in the first trench; a second wire formed in a second trench in the dielectric layer, a second liner on sidewalls and a bottom of the second trench and a second copper layer filling all remaining space in the second trench; and an electromigration stop formed in a third trench in the dielectric layer, a third liner on sidewalls and a bottom of the third trench and a third copper layer filling all remaining space in the third trench, the electromigration stop between and abutting respective ends of the first and second wires. Such a structure particularly is an interconnect structure.

[0008] Further, US 6,677,647 discloses a patterned metal feature of a semiconductor device comprising: a substrate; a dielectric layer formed on the substrate; a patterned metal line formed on the dielectric layer, wherein the patterned metal line has a top surface, a bottom surface and side surfaces; and a conductive layer formed at least on the side surfaces of the patterned metal line. Such a structure, which preferably is an interconnection structure, is described to improve the electromigration behaviour.

[0009] R. Riva et al., Migration issues in sintered-silver die attaches operating at high temperature, Microelectronics Reliability, Volume 53, Issues 9-1 1 , September-

November 2013, Pages 1592-1596, describes providing a layer of parylene for reducing silver migration.

[0010] There is, however, still potential for reducing electromigration effects, especially with regard to dendritic electromigration, inside a power semiconductor module.

[001 1] US 2002/0070432 A1 discloses an electronic connection structure for electronic power devices. A die housing a bipolar gain transistor is fixed, with a first face, to a support region. A second face of the die, located opposite to the first face, is covered with a passivation layer. The latter is removed at two terminals on the second face, which allow for connection of the base region of the transistor with an electrode and for connection of the emitter region of the transistor with another electrode of the power device, respectively. Additionally, the passivation layer leaves uncovered another terminal on the second face of the die, which is formed as a metal strip extending around the entire perimeter of the second face and which is connected to the emitter region of the transistor. By means of a galvanic bath a conductive layer is formed, which extends along the side surfaces of the die and electrically connecting the metal strip to the support region. [0012] US 2005/0239259 A1 discloses a method for forming a high voltage

semiconductor power device with an isolation diffusion structure for flip chip application. The device comprises a die housing a transistor, the die being bonded to a substrate. Terminals for gate and cathode of the transistor are located at a front side of the die, which faces the substrate. The anode is located at the back side of the die, opposite to the front side; however, the anode contact is positioned at the front side. In an outer region of the die adjacent to a side surface, an isolation diffusion structure extends vertically from the front to the back side, connecting the anode contact with the anode. The isolation diffusion structure is formed in a multi-step process by diffusing aluminum from the front and the back side.

[0013] US 2006/0255407 A1 discloses a semiconductor device with suppressed

aluminium slide. To this end, an aluminium wiring layer is provided in a peripheral insulating film located in a peripheral region of the device. Due to increased frictions between the insulating layer and the aluminium wiring layer, aluminium slide is suppressed.

Disclosure of Invention

[0014] It is an object of the present invention to provide a means for reducing

electromigration effects, especially with regard to dendritic electromigration. It is particularly an object of the present invention to provide a power semiconductor module having an improved resistance against electromigration effects.

[0015] These objects are at least partly solved by a power semiconductor device

according to independent claim 1. These objects are further at least partly solved by a power semiconductor module according to claim 7. These objects are further at least partly solved by a method according to claim 8. Advantageous embodiments are given in the dependent claims.

[0016] A power semiconductor device comprises a top side surface and a back side surface, wherein the back side surface is designed for connecting the power semiconductor device to a substrate metallization and wherein the top side surface is located opposite to the back side surface, wherein the top side surface comprises at least one migration barrier such, that at least one migration barrier at least partly forms the top side surface of the power semiconductor device.

[0017] Such a power semiconductor device provides an improved measure especially when being introduced into a power semiconductor module allowing reducing electromigration and the effects accompanied therewith, in particular with regard to dendritic electromigration. [0018] Power semiconductor devices as such are generally known in the art and generally comprise a semiconductor structure having respective contacts at its top side surface and back side surface. Depending on the structure and the design of the power semiconductor device, only one contact may be provided, or more than one contact may be provided, such as two or more electrical contacts.

The electrical contact provided at the top side surface may be a first and optionally a second main contact of the power semiconductor device, such as an emitter or source and a collector or drain contact of an IGBT or MOSFET, for example, as well as control contact such as a gate of an IGBT or MOSFET. Further, at least one contact may be provided at the backside of the power semiconductor device. Such contact may be a collector or drain contact of an IGBT or MOSFET. However, the contacts provided are not strictly limited to the above-named examples.

[0019] Non-limiting examples for power semiconductor devices thus comprise inter alia thyristors, such as gate turn-off thyristors, transistors, or diodes, or BiMOS chips being designed for BiMOS packages. Therefore, power semiconductor devices are generally known to the person skilled in the art and are thus not described in detail.

[0020] The power semiconductor device as described above comprise a top side

surface and a back side surface, wherein the back side surface is designed for connecting the power semiconductor device to a substrate, or substrate metallization, respectively. The back side surface of the power semiconductor device thus is that surface which is designed to be fixed to the substrate, or substrate metallization, respectively. The top side surface is that surface, which is generally free and is located opposite to the back side surface.

[0021] Therefore, the power semiconductor device may comprise the general structure as it is known in the art and briefly described above.

[0022] According to the power semiconductor device as described above, at least one migration barrier is provided such, that at least one migration barrier at least partly forms the top side surface of the power semiconductor device. Therefore, there might be one or more than one migration barriers which are provided such, that at least one migration barrier at least partly forms the top side surface of the power semiconductor device. The at least one migration barrier is formed in such a way that there is no electrical contact with any of the electrical contacts of the power semiconductor device.

[0023] A migration barrier in the sense of the present invention is particularly a means which prevents or at least significantly reduces electro migration processes or electromigration effects which may exemplarily appear in case the power semiconductor device is present in a power semiconductor module.

[0024] In detail, power semiconductor modules generally involve various joining

materials containing, such as, for example, silver and copper. With this regard, joining techniques may be used, which comprise, inter alia, die-attach, such as

SnPbAg soldering or Ag sintering, or joining substrate ceramics to metallizations by active metal brazing (AMB). Especially in a non-hermetic power module, humidity may be introduced into the module which humidity may, e.g. due to heating and cooling cycles during operation of the module, lead to condensation of water during the operation of the module.

[0025] In case electrodes of different potentials are used during operation, such as

typically collector and emitter contacts, due to the presence of humidity or water, electromigration effects may appear. In detail, the condensed water is supposed to initiate free ions such as silver (Ag) or copper (Cu) ions from respective filler and/or brazing materials, for example. The free ions are observed to form metallic dendrites which in turn may lead to an electrical connection between respective electrodes or further electrical conducting parts having different potentials. Such an electrical connection may, of course, lead to a short circuit and to a damage or destruction of the power semiconductor module. Generally, the dendrites are detrimental to reliability as it decreases the resistance path between the electrodes leading to significant failures.

[0026] According to the invention, however, such an electromigration may be prevented especially effectively due to the fact that the migration stop is provided on a chip level and thereby at least partly forms the top side surface of the power semiconductor device. In other words, in contrast to the prior art, the present invention provides a solution according to which not the module has to be equipped with a migration barrier as an extra part, but the power semiconductor device which is part of the module is equipped with such a barrier at an especially effective position.

[0027] Therefore, it is provided that the power semiconductor device as such is secured against a failure due to electromigration. As a result of the above, the module structure may be designed without significant limitations regarding

electromigration barriers. This further allows simplifying the construction process of the power semiconductor module as no or a limited amount of additional parts such as migration barriers have to be provided. Therefore, due to the

simplification, the construction process of power semiconductor modules may be achieved especially cost-saving. [0028] Furthermore, due to the fact that the electromigration barrier is designed as part of the power semiconductor device and is thus designed in a chip level range, the security improvement may be provided especially effectively resulting in the power semiconductor module being especially reliable and having a further a very long lifetime.

[0029] Apart from that, the electromigration barrier may be designed especially cost saving as the structure may be limited to power semiconductor device which, in turn, leads to very limited material when anyhow providing an effective barrier against electromigration.

[0030] Furthermore, the power semiconductor device as described above allows the hermeticity of a module to have reduced requirements. In fact, in most cases it is rather difficult or even impossible to create a module, which has a perfect hermetic seal in order to prevent water or humidity to be introduced into the module. This often requires extensive measures in order to counteract the effects caused thereby. According to the present invention, however, simple measures on a chip level are essentially sufficient in order to counteract electromigration and dendrite formation caused by humidity being introduced into the module.

[0031] To summarize, the above-defined power semiconductor device allows preventing or at least significantly reducing electromigration and particularly electromigration being accompanied with the formation of dendrites on a chip level and thus in the range of a power semiconductor device, being especially cost-saving and effective.

[0032] The effectiveness may thereby be especially improved in case the migration barrier forms at least one top side edge of the top side surface of the power semiconductor device. In detail, power semiconductor devices often comprise a structure at which at least one or preferably a plurality, such as four, top side edges is provided. Such edges are especially those positions which are the most outer region when regarding a top side view onto the power semiconductor device and thus form the change to a side portion of the power semiconductor device. With regard to the above, it may be provided that the migration barrier may be provided at, or forms, respectively, at least one top side edge, wherein the specific location may be adjusted to the parts surrounding the power semiconductor device and to these locations. Especially the edge portions of the top side surface of the power semiconductor device may be susceptible for electromigration effects and especially for dendrite formation. Therefore, especially according to this embodiment, an especially effective barrier against electromigration effects may be achieved. With this regard, it may be provided that the migration barrier forms the top side surface of the power semiconductor device, only, or it may additionally form at least a part of the side surface of the power semiconductor device.

[0033] According to a further embodiment, it may be especially preferred that the

migration barrier is formed in a frame-like structure. Such a frame-like structure may preferably be designed such, that the migration barrier enframes especially all or a part of the active components of the power semiconductor device at least partly and may in an exemplary manner be present at all sides of the top side surface of the power semiconductor device and preferably at all top side edges of the power semiconductor device.

[0034] Especially a frame-like structure of the migration barrier may reduce dendrite formation and it may further allow that potentially formed dendrites contact the migration barrier before detrimental effects arise and thus especially before contacting further parts being located on the top side surface of the power semiconductor device. Therefore, according to this embodiment, the power semiconductor device may be provided especially secure.

[0035] According to a further embodiment, the migration barrier is located on top of a floating field ring, such on a termination region. With this regard, it may be provided that the floating field ring comprises a metallic part, such as an aluminum layer. According to this embodiment it is especially taken into consideration that especially such parts, such as metallic layers, which are often comprises by such field rings are prone to accepting or generating

electromigration effects, such as dendrite formation. Therefore, the migration barrier may be especially be preferred in case it is located as described above. Further, in case the migration barrier such as a nickel layer is provided on top of a floating field ring, no negative influences due to metallic parts are to be expected due to the fact that the electrical field at these locations potential is principally zero.

[0036] With this regard, narrow junction termination design, such as 1.7kV and lower, exhibit process challenges to enable good adhesion of exisiting passivation layers, such as durimide, as the surface area is reduced. Such terminations, however, are prone to electromigration effects. Furthermore it hypothesised that sawing processes which are used when forming the power semiconductor device can also result in initiation points of electromigration on the edge of the chip. These could be possible reason of dendrite growth observed on PI and PSiN layers. [0037] According to a further embodiment the migration barrier is formed of a metal selected from the group consisting of nickel, zinc, palladium, chrome, titanium and tungsten, or a composition comprising any of the afore-named metals.

Regarding the compositions, especially metal phosphorous compositions may be preferred, such as nickel-phosphorous. Especially the afore-named materials particularly being metals having a comparably low galvanic potential or being metal compounds provide significant advantages over solutions of the prior art. In detail, the above materials may serve as effective barriers against

electromigration. Further, especially in contrast to organic or rubber like materials, which are used in prior art solutions and which can still absorb humidity, the above-named materials are resistant against high temperatures and further do not provide any outgasing problems, so that security as well at high temperatures is given without the problem of increased porosity resulting in weak barrier properties. Furthermore, the above-named materials are obtainable at low costs.

[0038] Apart from the above, the migration barrier according to this embodiment may be provided with processes, which allow providing precise structures having very small thicknesses up to comparably large thicknesses allowing the migration barrier being adapted to the respective requirements. Further, the structures of the migration barrier may be obtained especially precisely, allowing counteracting the electromigration effects in a very effective manner.

[0039] As such, especially according to this embodiment, the migration barrier may be applied cost-saving and precisely resulting in a highly efficient barrier against electromigration effects accompanied with dendrite formation.

[0040] According to a further embodiment, the migration barrier has a thickness in the range of≤ Ι ΟΟΟμιη, particularly in the range of≥ 1 μιη. According to this embodiment, the migration barrier may be formed as an especially thin layer, which has the thickness in the range of several pm, such as small as one atom or ion, respectively of the respective material, especially metal, which may form dendrites during electromigration. For example, the migration barrier may have a thickness in the range of a single silver ion, or silver atom, respectively.

According to this embodiment, the power semiconductor device is essentially not changed with regard to its geometry and dimension, allowing producing a power semiconductor module without significant changes to the prior art. However, it may as well be provided that the respective species is comparably thick, which allows an especially effective migration barrier. [0041] With regard to further advantages or features of the power semiconductor device, it is referred to the power semiconductor module, the method, the figures as well as to the description of the figures.

[0042] The invention further relates to a power semiconductor module, comprising a substrate having a substrate metallization, wherein at least on power

semiconductor as described above is connected to the substrate metallization.

[0043] A power semiconductor module according to the present invention shall

particularly mean an arrangement which is based on one or more power semiconductor devices and which may preferably be used as a switch or rectifier in power electronics. Within the present invention, power semiconductor modules are especially those who comprise a substrate with a metallization which is joined to a die, i.e. the power semiconductor device, or a chip, respectively, with its top side and/or to a baseplate with its backside and wherein the substrate metallization may further be connected to a terminal foot.

[0044] In fact, the generated power semiconductor module generally comprises a

substrate. The substrate comprises on its top side a plurality of circuit paths like generally known in the art, the circuit paths being formed by a metallization, such as from a copper metallization. The substrate metallization may be arranged on the particularly ceramic substrate main layer by physical or chemical deposition methods, for example, like it is generally known in the art. Connected to the substrate metallization is at least one die or power semiconductor device, respectively, and further one or more terminals, or electrical connectors, respectively.

[0045] The substrate may generally be any substrate known in the art for power

semiconductor modules. For example, the substrate may comprise an insulating material, such as a ceramic material. As non-limiting examples, the main layer of the substrate may be formed from aluminium nitride (AIN), silicon nitride (S13N4) or aluminium oxide (AI2O3).

[0046] Further, in order to remove heat generated in the power semiconductor module, or especially in the power semiconductor device, the substrate may be connected to a carrier layer, such as to a baseplate. The baseplate is often formed from an ignoble metal, such as of copper, or AlSiC both of which may be coated with nickel, for example, and may act as a heat sink thereby effectively removing heat form the circuit paths. Further, the substrate may be coated with an ignoble metal, such as copper, at the area where the baseplate is joined to.

[0047] Generally, the substrate comprising its substrate metallization at its top side is connected to the carrier layer such as baseplate on its backside via a soldering process. Therefore, the arrangement comprising the substrate and the carrier layer comprises a solder layer between the substrate and the carrier layer.

[0048] Further, at least one power semiconductor device is joined to the substrate, or substrate metallization, respectively. With regard to the power semiconductor device, it is referred to the above description.

[0049] According to this, the power semiconductor module may be constructable without significant limitations regarding the migration barrier. Further due to the fact that a migration barrier is present on a chip level, the process of forming the power semiconductor module may be performed without variations as the power semiconductor devices may be equipped with the migration barrier beforehand.

[0050] Electromigration failures take time to develop and the early stages are difficult to detect. As electromigration damage is cumulative, it is best to prevent damage from occurring during the lifetime of the device, or module respectively, which is achievable especially effectively and reliably by a module as described above due the dam-like structure exemplarily on an electrical contact, such as on the junction termination.

[0051] Existing materials used in modules, such as gel, PI, AMB, nickel-coatings,

housing materials, etc. do further contain minute amount of contaminants that could significantly aggravate electromigration issues. These issues, however, are addressed with a module as described above.

[0052] To summarize, a power semiconductor module as described above may provide an effective measure against electromigration effects, especially being accompanied with dendrite formation, and may further be generated especially cost-saving.

[0053] With regard to further advantages or features of the power semiconductor

module, it is referred to the power semiconductor device, the method, the figures as well as to the description of the figures.

[0054] The present invention further relates to a method of forming a power

semiconductor module, the method comprising the steps of:

a) Providing a substrate, the substrate having a substrate metallization;

b) Providing a power semiconductor device;

c) Applying a migration barrier to the top side of the power semiconductor module such, that the migration barrier at least partly forms the top side surface of the power semiconductor device; and

d) Fixating the power semiconductor device to the substrate metallization. [0055] Such a method provides a power semiconductor module having an improved resistance against electromigration effects and being obtainable especially cost- saving.

[0056] It may thereby be provided that the steps a) to d) are performed in the order as described above, or it may be provided that the order of the method deviates from the order a) to d) as described above. As an example, it may be provided that the migration barrier is applied to the power semiconductor device before or after fixing it to the substrate metallization, as it is clear for the person skilled in the art.

[0057] According to steps a) and b), a substrate as well as a power semiconductor device is provided. With regard to these respective parts, it is referred to the above description.

[0058] According to step d), the power semiconductor device is fixated, or connected, respectively, to the substrate or its substrate metallization, respectively. This may be performed as it is generally known in the art. In an exemplary manner, the power semiconductor device is fixated to the metallization by means of Ag sintering, soldering or brazing, such as active metal brazing (AMB). According to this, it is especially taken into consideration that Ag ions could originate from chip solder or AMB material from substrates. Therefore, especially in case the power semiconductor device is fixated to the substrate, or substrate metallization, respectively, by means of the afore-named methods, the migration barrier may significantly improve the reliability and lifetime of the power semiconductor module.

[0059] Furthermore, before or after fixing the power semiconductor device to the

substrate, according to step c) of the present method, a migration barrier is applied to the top side of the power semiconductor module such, that the migration barrier at least partly forms the top side surface of the power semiconductor device.

[0060] The provision of a migration barrier forming part of the top side surface of the power semiconductor device allows a cost-saving and further especially effective measure against electromigration, especially accompanied with dendrite formation.

[0061] According to an embodiment, the migration barrier is provided by means of a deposition method, such as sputtering, CVD, such as PECVD, or electroless deposition methods, or by thick-film methods, such as screen printing. In general, the migration barrier may be formed in a front-end process and thus during the manufacturing process of the power semiconductor device. Especially the above- named processes may allow the migration barrier to be applied in a very definite manner regarding geometry and thickness. Therefore, it is allowed that due to a very defined manufacturing process, that the electromigration issues may be solved especially effectively.

[0062] Regarding step c), the thickness of the applied migration barrier may be altered in dependence of the used method. In detail, when using deposition methods, the migration barrier may be applied in a comparably small thickness, such as in the range of≥ 1 μιη to≤ 10 μιη. When using thick-film techniques, however, the migration barrier may be applied in a comparably large thickness, such as in the range of≥ 1 μιη to≤ 1000 μιη.

[0063] According to a further embodiment, the migration barrier is subjected to a

sintering process after application of the latter. According to this embodiment, the sintering process may help to evaporate potentially present unwanted solvent components in the barrier material, for example in case it was applied in the form of a metal paste. Further, this additional step may achieve improved adhesion between particles and the top surface of the power semiconductor device.

Regarding the sintering process, the latter may be realized by using temperatures above 100°C, for example in a range of≥ 100 °C to < 300°C.

[0064] With regard to further advantages or features of the method, it is referred to the power semiconductor device, the power semiconductor module, the figures as well as to the description of the figures.

Brief Description of Drawings

[0065] These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments described hereinafter.

[0066] In the drawings:

[0067] Fig. 1 shows a schematic part of a power semiconductor module according to the prior art; and

[0068] Fig. 2 shows a schematic part of an embodiment of a power

semiconductor module according to the invention.

Detailed Description of the Invention

[0069] Reference will now be made in detail to an exemplary embodiment, which is illustrated in the figures. This example is provided by way of explanation and is not meant as a limitation. It is intended that the present disclosure includes further modifications and variations. [0070] Within the following description of the drawings, the same reference numbers refer to the same components. Generally, only the differences with respect to the individual embodiments are described. When several identical items or parts appear in a figure, not all of the parts have reference numerals in order to simplify the appearance.

[0071 ] Figure 1 shows a schematic part of a power semiconductor module 10 according to the prior art. The power semiconductor module 10 comprises a substrate 12, which is provided with an upper metallization 14 and with a lower metallization 16. For example, the substrate 12 may comprise an insulating material, such as a ceramic material. As non-limiting examples, the main layer of the substrate 12 may be formed from aluminium nitride (AIN), silicon nitride (S13N4) or aluminium oxide (AI2O3). The metallization 14, 16 may be formed of a brazing material, such as copper.

[0072] Figure 1 further shows a power semiconductor device 18, which is connected to the substrate 12, or its substrate metallization 14, respectively, by means of soldering via its back side surface 20. Therefore, a solder layer 22 is provided between the substrate 12 and the power semiconductor device 18.

[0073] It is further shown that the power semiconductor device 18 comprises, at is top side surface 24, an aluminium layer 26. Said aluminium layer is located directly on top of a floating field ring which is thus located beneath the aluminium layer

26. Therefore, the aluminium layer is located outside the active area on a junction termination, however a location where the electric field potential is zero. The aluminium layer may thus enframes an active area 28 of the power

semiconductor device 18. In particular, the aluminium layer 26 may be configured as a floating field ring comprising electrical contacts, which are located on the top side surface 24.

[0074] According to figure 1 , electromigration effects are visible, as a dendrite 30 is formed which may be formed of ions, such as copper or silver ions, and which may form an electrical contact between the metallization 14 and the electrical contact 26. This may cause significant damages or may even destroy the power semiconductor module 10.

[0075] Such an effect is effectively prevented by a power semiconductor module 10 according to the invention, which is shown in figure 2.

[0076] In detail, according to figure 2, the top side surface 24 of the power

semiconductor device 18 comprises at least one migration barrier 32 such, that the migration barrier 32 at least partly forms the top side surface 24 of the power semiconductor device 18. The migration barrier 32 may be formed as a layer and/or may be formed of a metal selected from the group consisting of nickel, zinc, palladium, chrome, titanium and tungsten, or a compound comprising any of the afore-named compounds. It may further have a thickness in the range of≥ 1 μιτι to < 1000μΐΎΐ.

[0077] Figure 2 further shows that the migration barrier 32 forms at least one top side edge of the top side surface 24 of the power semiconductor device 18 and is further formed in a frame-like structure. Further, the migration barrier 32 in Fig. 2 is formed on top of aluminium layer 26, said aluminium layer forming a floating field ring around one or several electrical contacts (not shown), which contacts may be located on the top side surface 24 of the power semiconductor device. In addition to the embodiment shown in Figure 2, the migration barrier 32 can be formed such, that it covers those parts of the aluminium layer 26 building a part of the side surface of the power semiconductor device 18. However, in this case the migration barrier is not extended towards neither the substrate 14 nor the metallization 22.

[0078] While the invention has been illustrated and described in detail in the drawings and foregoing description, such illustration and description are to be considered illustrative or exemplary and not restrictive; the invention is not limited to the disclosed embodiments. Other variations to be disclosed embodiments can be understood and effected by those skilled in the art in practicing the claimed invention, from a study of the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other elements or steps, and the indefinite article "a" or "an" does not exclude a plurality. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage. Any reference signs in the claims should not be construed as limiting scope.

Reference signs list

10 power semiconductor module

12 substrate

14 metallization

16 metallization

18 power semiconductor device

20 back side surface

22 solder layer

24 top side surface

26 aluminium layer

28 active area

30 dendrite

32 migration barrier

Claims

Power semiconductor device, comprising a top side surface (24) and a back side surface (20) and comprising one or more electrical contacts, wherein the back side surface (20) is designed for connecting the power semiconductor device (18) to a substrate metallization (14) and wherein the top side surface (24) is located opposite to the back side surface (20), wherein the top side surface (24) comprises at least one migration barrier (32) such, that at least one migration barrier (32) at least partly forms the top side surface (24) of the power semiconductor device (18) and wherein the at least one migration barrier (32) is not electrically connected to any of the one or more electrical contacts of the power semiconductor device.

Power semiconductor device according to claim 1 , wherein the migration barrier (32) forms at least one top side edge of the top side surface (24) of the power

semiconductor device (18).

Power semiconductor device according to any of the preceding claims, wherein the migration barrier (32) is formed in a frame-like structure.

Power semiconductor device according to any of the preceding claims, wherein the migration barrier (32) is located on top of a floating field ring.

Power semiconductor device according to any of the preceding claims, wherein the migration barrier (32) is formed of a metal selected from the group consisting of nickel, zinc, palladium, chrome, titanium and tungsten, or a composition comprising any of the afore-named metals.

Power semiconductor device according to any of the preceding claims, wherein the migration barrier (32) has a thickness in the range of≤ Ι ΟΟΟμιτι.

Power semiconductor module, comprising a substrate (12) having a substrate metallization (14), wherein at least on power semiconductor device (18) according to any of the preceding claims is connected to the substrate metallization (14).

8. Method of forming a power semiconductor module (10), the method comprising the steps of: a) Providing a substrate (12), the substrate (12) having a substrate metallization (14);

b) Providing a power semiconductor device (18);

c) Applying a migration barrier (32) to the top side of the power semiconductor device (18) such, that the migration barrier (32) at least partly forms the top side surface (24) of the power semiconductor device (18); and d) Fixating the power semiconductor device (18) to the substrate metallization (14).

9. Method according to claim 8, wherein the migration barrier (32) is provided by means of a deposition method or by means of a thickfilm technique.

10. Method according to claim 8 or 9, wherein the migration barrier (32) is subjected to a sintering process.