WO2016117730A1 - Sdr-based communication device, and method for operating same - Google Patents

Abstract

Disclosed are an SDR-based communication device, and a method for operating same. A communication device according to one example may comprise: a memory map; a first module which generates second data by executing a first process on first data, and then stores the second data in the memory map in accordance with a first level of a flag; and a second module which reads the second data from the memory map in accordance with a second level of the flag.

Description

SDR-based communication device, and method of operation thereof

The embodiments below relate to an SDR-based communication device and a method of operation thereof.

The SDR massive MIMO system has a larger number of antennas than the conventional communication system. Compared to the conventional LTE-A system, which has been equipped with up to eight antennas, in the massive MIMO system, more than 16, for example, 1024 antennas are considered.

The increased number of antennas results in significantly increased computational complexity at the transmitter and receiver. For example, computational complexity increases with increasing number of antennas in the transmission beam forming unit, the IFFT calculating unit and the receiving terminal MIMO calculating unit, and the FFT calculating unit in the massive MIMO system.

SDR massive MIMO system based on the existing transceiver structure is difficult to operate due to the significant increase in the actual execution time.

Embodiments may implement a data input / output scheme in a memory map scheme and implement a flag between each process to provide a technique for each module to operate independently.

In addition, embodiments may provide a technique in which each module may be implemented in a pipelining structure capable of processing data in a parallel structure.

According to an embodiment, a communication device may include a memory map, a first module configured to perform a first process on first data to generate second data, and to store the second data in the memory map according to a first level of a flag. And the second module reading the second data from the memory map according to the second level of the flag.

The second module may generate third data by performing a second process on the second data.

The first module and the second module may be implemented in a pipelining structure.

The flag may be implemented between the first process and the second process.

The processing time of the first process and the second process may be the same.

According to an embodiment of the present disclosure, a method of operating a communication device includes generating a second data by performing a first process on a first data, and generating a second data by the first module according to a first level of a flag. Storing in the memory map, and reading, by the second module, the second data from the memory map according to the second level of the flag.

The method may further include generating, by the second module, third data by performing a second process on the second data.

The first module and the second module may be implemented in a pipelining structure.

The flag may be implemented between the first process and the second process.

The processing time of the first process and the second process may be the same.

1 is a schematic structural diagram of a communication device according to an embodiment;

FIG. 2 is a diagram for describing a parallel operation structure of modules included in the communication device of FIG. 1.

FIG. 3 is a flowchart for describing a method of operating the communication device illustrated in FIG. 1.

4 illustrates an example of a structure diagram of a transmitter according to an embodiment of the communication device of FIG. 1.

FIG. 5 is a diagram for describing a parallel operation structure of submodules included in the transmitter of FIG. 4.

6 illustrates an example of a structure diagram of a receiver according to another embodiment of the communication device of FIG. 1.

FIG. 7 is a diagram for describing a parallel operation structure of submodules included in the receiver of FIG. 6.

Specific structural or functional descriptions of the embodiments according to the inventive concept disclosed herein are merely illustrated for the purpose of describing the embodiments according to the inventive concept, and the embodiments according to the inventive concept. These may be embodied in various forms and are not limited to the embodiments described herein.

Embodiments according to the inventive concept may be variously modified and have various forms, so embodiments are illustrated in the drawings and described in detail herein. However, this is not intended to limit the embodiments in accordance with the concept of the present invention to specific embodiments, it includes all changes, equivalents, or substitutes included in the spirit and scope of the present invention.

Terms such as first or second may be used to describe various components, but the components should not be limited by the terms. The terms are only for the purpose of distinguishing one component from another component, for example, without departing from the scope of the rights according to the inventive concept, the first component may be called a second component, Similarly, the second component may also be referred to as the first component.

When a component is referred to as being "connected" or "connected" to another component, it may be directly connected to or connected to that other component, but it may be understood that other components may be present in between. Should be. On the other hand, when a component is said to be "directly connected" or "directly connected" to another component, it should be understood that there is no other component in between. Expressions describing relationships between components, such as "between" and "immediately between" or "neighboring to" and "directly neighboring", should be interpreted as well.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. Singular expressions include plural expressions unless the context clearly indicates otherwise. As used herein, the terms "comprise" or "having" are intended to designate that the stated feature, number, step, operation, component, part, or combination thereof is present, but one or more other features or numbers, It is to be understood that it does not exclude in advance the possibility of the presence or addition of steps, actions, components, parts or combinations thereof.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art. Terms such as those defined in the commonly used dictionaries should be construed as having meanings consistent with the meanings in the context of the related art, and are not construed in ideal or excessively formal meanings unless expressly defined herein. Do not.

Hereinafter, exemplary embodiments will be described in detail with reference to the accompanying drawings.

A module in the present specification may mean hardware capable of performing functions and operations according to each name described in the present specification, and may mean computer program code capable of performing specific functions and operations. Or an electronic recording medium, for example, a processor or a microprocessor, in which computer program code capable of performing specific functions and operations is mounted.

In other words, a module may mean a functional and / or structural combination of hardware for performing the technical idea of the present invention and / or software for driving the hardware.

FIG. 1 is a schematic structural diagram of a communication device according to an embodiment, and FIG. 2 is a view for explaining a parallel operation structure of modules included in the communication device shown in FIG. 1.

1 and 2, the communication device 10 may include a first module 110, a second module 130, a third module 150, a fourth module 170, and memory maps 191 and 193. , And 195).

The communication device 10 may be an LTE, LTE-A, or SDR massive MIMO based communication device. For example, communication device 10 may be implemented as a transmitter, receiver, or transceiver.

1 and 2 illustrate a communication device 10 implemented as four modules for convenience of description, the scope of the present invention is not limited thereto, and a communication device including two or more modules according to embodiments is illustrated. (10).

The data input / output method between the modules 110, 130, 150, and 170 may be implemented as a memory map method that delivers output data of a preceding process as input data of a subsequent process.

In this case, the flag flagA, flagB, or flagC may be implemented between the processes. For example, the first flag flagA may be implemented between the first process of the first module 110 and the second process of the second module 130. The second flag flagB may be implemented between the second process and the third process of the third module 150. The third flag flagC may be implemented between the third process and the fourth process of the fourth module 170.

The execution time of each module 110, 130, 150, and 170, for example, the processing time of each of the first to fourth processes may be substantially the same. As such, each module 110, 130, 150, and 170 may have substantially the same delay time.

After the data is processed in the preceding process and the processed data is transferred to the memory map, the level of the flag (flagA, flagB or flagC) can be changed. In addition, after the data stored from the memory map is read for processing of the subsequent process, the level of the flag flagA, flagB or flagC may be changed.

Accordingly, the communication device 10, for example, each module 110, 130, 150, and 170 may be implemented in a pipelining structure and operate independently. Hereinafter, the operation of each module 110, 130, 150, and 170 will be described in detail.

The first module 110 may receive the first data DATA1. The first module 110 may generate second data DATA2 by performing a first process on the first data DATA1.

The first module 110 may store the second data DATA2 in the first memory map 191 based on the first flag flagA. For example, when the level of the first flag flagA is a first level, for example, a low level or logic 0, the first module 110 transmits the second data DATA2 to the first memory map 191. Can be stored. When the level of the first flag flagA is a second level, for example, a high level or logic 1, the first module 110 has the second data DATA2, and the level of the first flag flagA is the first level. You can wait until you change to level 1.

After the first module 110 stores the second data DATA2 in the first memory map 191, the level of the first flag flagA may be changed, for example, changed from the first level to the second level. Can be.

The second module 130 may read the second data DATA2 stored from the first memory map 191 based on the first flag flagA. For example, when the level of the first flag flagA is the second level, the second module 130 may read the second data DATA2 stored from the first memory map 191. When the first flag flagA is at the first level, the second module 130 may wait until the level of the first flag flagA is changed to the second level.

After the second module 130 reads the second data DATA2 from the first memory map 191, the level of the first flag flagA may be changed, for example, changed from the second level to the first level. Can be.

The second module 130 may generate third data DATA3 by performing a second process on the second data DATA2.

The second module 130 may store the third data DATA3 in the second memory map 193 based on the second flag flagB. For example, when the level of the second flag flagB is the first level, the second module 130 may store the third data DATA3 in the second memory map 193. When the level of the second flag flagB is the second level, the second module 130 may have the third data DATA2 and wait until the level of the second flag flagB changes to the first level. have.

After the second module 130 stores the third data DATA3 in the second memory map 193, the level of the second flag flagB may be changed, for example, changed from the first level to the second level. Can be.

The third module 150 may read the stored third data DATA3 from the second memory map 193 based on the second flag flagB. For example, when the level of the second flag flagB is the second level, the third module 150 may read the third data DATA3 stored from the second memory map 193. When the second flag flagB is at the first level, the third module 150 may wait until the level of the second flag flagB is changed to the second level.

After the third module 150 reads the third data DATA3 from the second memory map 193, the level of the second flag flagB may be changed, for example, changed from the second level to the first level. Can be.

The third module 150 may generate fourth data DATA4 by performing a third process on the third data DATA3.

The third module 150 may store the fourth data DATA4 in the third memory map 195 based on the third flag flagC. For example, when the level of the third flag flagC is the first level, the third module 150 may store the fourth data DATA4 in the third memory map 195. When the level of the third flag flagC is the second level, the third module 150 may have the fourth data DATA4 and wait until the level of the third flag flagC changes to the first level. have.

After the third module 150 stores the fourth data DATA4 in the third memory map 195, the level of the third flag flagC may be changed, for example, changed from the first level to the second level. Can be.

The fourth module 170 may read the fourth data DATA4 stored from the third memory map 195 based on the third flag flagC. For example, when the level of the third flag flagC is the second level, the fourth module 170 may read the fourth data DATA4 stored from the third memory map 195. When the third flag flagC is at the first level, the fourth module 170 may wait until the level of the third flag flagC is changed to the second level.

After the fourth module 170 reads the fourth data DATA4 from the third memory map 195, the level of the third flag flagC may be changed, for example, changed from the second level to the first level. Can be.

The fourth module 170 may generate the fifth data DATA5 by performing a fourth process on the fourth data DATA4. The fourth module 170 may output the fifth data DATA5. For example, the fourth module 170 may output the fifth data DATA5 to different communication devices that can communicate with the communication device 10.

By implementing the data input / output scheme in a memory map scheme and implementing flags between each process, each module 110, 130, 150, and 170 may operate independently. Accordingly, as shown in FIG. 2, each module 110, 130, 150, and 170 may process data in a parallel structure.

Thus, as compared to a general communication device in which each configuration (for example, each module) is configured in series and generates a transmission signal (or a reception signal) after passing the execution time of each configuration, the entirety of the communication device 10 Execution time (or overall processing time) can be significantly reduced.

FIG. 3 is a flowchart for describing a method of operating the communication device illustrated in FIG. 1.

In FIG. 3, a method of operating the communication device 10 only for the first module 110 and the second module 130 will be described for convenience of description.

Referring to FIG. 3, the first module 110 may generate second data DATA2 by performing a first process on the first data DATA1 (S310).

The first module 110 may store the second data DATA2 in the memory map 191 according to the first level of the flag flagA (S320). For example, after the first module 110 stores the second data DATA2 in the first memory map 191, the level of the first flag flagA may be changed from the first level to the second level. have.

The second module 130 may read the second data from the memory map 191 according to the second level of the flag flagA (S330). For example, after the second module 130 reads the second data DATA2 from the first memory map 191, the level of the first flag flagA may be changed from the second level to the first level. have.

4 illustrates an example of a structure diagram of a transmitter according to an embodiment of the communication device of FIG. 1, and FIG. 5 illustrates a parallel operation structure of sub-modules included in the transmitter of FIG. 4.

4 and 5, the transmitter 20 may include a first submodule 210, a second submodule 230, a third submodule 250, and a fourth submodule 270. have.

As shown in FIG. 4, a specific portion of the structure of the transmitter 20 may be modularized so that each submodule 210, 230, 250, and 270 may operate independently in the structure of the transmitter 20. Accordingly, the sub modules 210, 230, 250, and 270 may be implemented in a pipelining structure.

In FIG. 4, a memory map and a flag between the processes are not illustrated for convenience of description, but an operation of each submodule of FIG. 4 may be substantially the same as that of each module of FIGS. 1 and 2.

The execution time of each submodule 210, 230, 250, and 270, for example, the processing time of each process may be substantially the same. That is, each module 210, 230, 250, and 270 to be implemented in the structure of the transmitter 20 may be modularized in consideration of the processing time of a process of a specific portion of the structure of the transmitter 20.

As described above with reference to FIGS. 1 and 2, by implementing a data input / output scheme in a memory map scheme and implementing a flag between each process, each submodule 210, 230, 250, and 270 may operate independently. Can be. Thus, as shown in FIG. 5, each submodule 210, 230, 250, and 270 may process data in a parallel structure.

Therefore, the overall execution time (or overall processing time) of the transmitter 20 is compared to a general transmitter in which each configuration (for example, each module) is configured in serial order to generate a transmission signal after passing the execution time of each configuration. ) Can be greatly reduced.

6 illustrates an example of a structure diagram of a receiver according to another embodiment of the communication device of FIG. 1, and FIG. 7 illustrates a parallel operation structure of sub-modules included in the receiver of FIG. 6.

6 and 7, the receiver 30 may include a fourth submodule 310, a fifth submodule 330, and a sixth submodule 350.

As shown in FIG. 6, a specific part of the structure of the receiver 30 is modularized, and thus the angle of the structure of the receiver 30

As shown in FIG. 6, a specific portion of the structure of the receiver 30 may be modularized so that each submodule 310, 330, and 350 may operate independently in the structure of the receiver 30. Accordingly, the sub modules 310, 330, and 350 may be implemented in a pipelining structure.

In FIG. 6, a memory map and a flag between the processes are not illustrated for convenience of description, but the operation of each submodule of FIG. 6 may be substantially the same as the operation of each module of FIGS. 1 and 2.

The execution time of each submodule 310, 330, and 350, for example, the processing time of each process may be substantially the same. That is, each module 310, 330, and 350 to be implemented in the structure of the receiver 30 may be modularized in consideration of the processing time of a process of a specific portion of the structure of the receiver 30.

As described above with reference to FIGS. 1 and 2, by implementing a data input / output scheme in a memory map scheme and implementing a flag between each process, each submodule 310, 330, and 350 may operate independently. . Thus, as shown in FIG. 5, each submodule 310, 330, and 350 may process data in a parallel structure.

Thus, the overall execution time (or overall processing time) of the receiver 30, as compared to a general receiver in which each configuration (e.g., each module) is serially configured to generate a received signal after passing the execution time of each configuration. ) Can be greatly reduced.

The apparatus described above may be implemented as a hardware component, a software component, and / or a combination of hardware components and software components. For example, the devices and components described in the embodiments are, for example, processors, controllers, arithmetic logic units (ALUs), digital signal processors, microcomputers, field programmable gate arrays (FPGAs). Can be implemented using one or more general purpose or special purpose computers, such as a programmable logic unit (PLU), a microprocessor, or any other device capable of executing and responding to instructions. The processing device may execute an operating system (OS) and one or more software applications running on the operating system. The processing device may also access, store, manipulate, process, and generate data in response to the execution of the software. For convenience of explanation, one processing device may be described as being used, but one of ordinary skill in the art will appreciate that the processing device includes a plurality of processing elements and / or a plurality of types of processing elements. It can be seen that it may include. For example, the processing device may include a plurality of processors or one processor and one controller. In addition, other processing configurations are possible, such as parallel processors.

The software may include a computer program, code, instructions, or a combination of one or more of the above, and configure the processing device to operate as desired, or process it independently or collectively. You can command the device. Software and / or data may be any type of machine, component, physical device, virtual equipment, computer storage medium or device in order to be interpreted by or to provide instructions or data to the processing device. Or may be permanently or temporarily embodied in a signal wave to be transmitted. The software may be distributed over networked computer systems so that they may be stored or executed in a distributed manner. Software and data may be stored on one or more computer readable recording media.

The method according to the embodiment may be embodied in the form of program instructions that can be executed by various computer means and recorded in a computer readable medium. The computer readable medium may include program instructions, data files, data structures, etc. alone or in combination. The program instructions recorded on the media may be those specially designed and constructed for the purposes of the embodiments, or they may be of the kind well-known and available to those having skill in the computer software arts. Examples of computer-readable recording media include magnetic media such as hard disks, floppy disks, and magnetic tape, optical media such as CD-ROMs, DVDs, and magnetic disks, such as floppy disks. Magneto-optical media, and hardware devices specifically configured to store and execute program instructions, such as ROM, RAM, flash memory, and the like. Examples of program instructions include not only machine code generated by a compiler, but also high-level language code that can be executed by a computer using an interpreter or the like. The hardware device described above may be configured to operate as one or more software modules to perform the operations of the embodiments, and vice versa.

Although the embodiments have been described by the limited embodiments and the drawings as described above, various modifications and variations are possible to those skilled in the art from the above description. For example, the described techniques may be performed in a different order than the described method, and / or components of the described systems, structures, devices, circuits, etc. may be combined or combined in a different form than the described method, or other components. Or even if replaced or substituted by equivalents, an appropriate result can be achieved.

Therefore, other implementations, other embodiments, and equivalents to the claims are within the scope of the claims that follow.

Claims (10)

Memory map; A first module performing a first process on first data to generate second data, and storing the second data in the memory map according to a first level of a flag; And The second module for reading the second data from the memory map according to the second level of the flag Communication device comprising a. The method of claim 1, Wherein the second module performs a second process on the second data to generate third data. The method of claim 1, The first module and the second module is a communication device implemented in a pipelining (pipelining) structure. The method of claim 2, And the flag is implemented between the first process and the second process. The method of claim 2, And a processing time of the first process and the second process is the same. Generating, by the first module, second data by performing a first process on the first data; Storing, by the first module, the second data in a memory map according to a first level of a flag; And A second module reading the second data from the memory map according to the second level of the flag Method of operation of a communication device comprising a. The method of claim 6, The second module performing a second process on the second data to generate third data Method of operation of the communication device further comprising. The method of claim 6, And the first module and the second module are implemented in a pipelining structure. The method of claim 7, wherein And wherein the flag is implemented between the first process and the second process. The method of claim 7, wherein Processing time of the first process and the second process is the same.

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