WO2016078202A1 - 一种掉电保护方法及固态硬盘 - Google Patents

一种掉电保护方法及固态硬盘 Download PDF

Info

Publication number
WO2016078202A1
WO2016078202A1 PCT/CN2015/070349 CN2015070349W WO2016078202A1 WO 2016078202 A1 WO2016078202 A1 WO 2016078202A1 CN 2015070349 W CN2015070349 W CN 2015070349W WO 2016078202 A1 WO2016078202 A1 WO 2016078202A1
Authority
WO
WIPO (PCT)
Prior art keywords
power
solid state
power supply
abnormal
data
Prior art date
Application number
PCT/CN2015/070349
Other languages
English (en)
French (fr)
Inventor
周溱
阳学仕
Original Assignee
上海宝存信息科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 上海宝存信息科技有限公司 filed Critical 上海宝存信息科技有限公司
Priority to US15/527,538 priority Critical patent/US9997209B2/en
Publication of WO2016078202A1 publication Critical patent/WO2016078202A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/148—Details of power up or power down circuits, standby circuits or recovery circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/16—Protection against loss of memory contents
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/22—Safety or protection circuits preventing unauthorised or accidental access to memory cells
    • G11C16/225—Preventing erasure, programming or reading when power supply voltages are outside the required ranges
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/143—Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels ; Switching between alternative supplies
    • G11C5/144—Detection of predetermined disconnection or reduction of power supply, e.g. power down or power standby

Definitions

  • the invention relates to a computer security technology, in particular to a power failure protection method and a solid state hard disk.
  • Flash memory NAND Flash
  • HDD hard disk drive
  • SSD Solid State Drive
  • the controller In a traditional SSD system, the controller is implemented by an embedded processor and firmware, which is vulnerable when the power is turned off or the host suddenly restarts. In order to ensure that the processor can run normally until the metadata and data cache can be stored in the medium, it usually takes a long time, often requires a battery or super capacitor to provide the required power. At the same time, the battery itself may fail, further magnifying the fragility of the system. Some SSD systems are not even protected at all, and innate is not safe.
  • the present invention aims to provide a power failure protection method and a solid state hard disk for solving the problem of incomplete system data caused by abnormal power failure in the prior art.
  • the present invention provides a power failure protection method, which includes: real-time monitoring of a power supply; when the power supply is abnormal, the device controller hardware logic is disconnected. Connected to the host system bus, the internal clock of the device is disconnected from the system bus clock and enters free running; the device controller hardware uses the internal clock of the device to perform data related operations.
  • the data related operation comprises writing data in the device cache to the device storage unit.
  • the valid data in the device cache is padded to the write unit boundary, and all the padded data is written into the device storage unit.
  • the specific implementation of the real-time monitoring of the power supply includes: detecting whether the power supply voltage is within a preset range, and when the power supply voltage is not within a preset range, determining that the power supply is abnormal, and starting the power-off protection Write operation.
  • the specific implementation of the real-time monitoring of the power source includes: detecting a reset signal on the host system bus, and when detecting that the reset signal is valid, determining that the power source is abnormal, and starting a power-off protection write operation.
  • the power-down protection method further includes: when it is detected that the power is restored to normal, the device controller resumes normal operation.
  • the invention also provides a solid state hard disk, comprising: a power failure detecting device, configured to monitor whether the power source is abnormal in real time; and a power failure protection device, configured to implement the following hardware logic when the power source is abnormally detected; Power-down protection operation: disconnecting from the host system bus; the internal hard disk internal clock is disconnected from the bus clock and enters free running, and the data in the solid-state hard disk cache is written to the SSD in the storage unit.
  • the power failure detecting device is configured to detect whether the power voltage is within a preset range, and when the power voltage is not within a preset range, the power source is abnormal.
  • the power failure detecting device is configured to detect a reset signal on the host system bus, and the power source is abnormal when it is detected that the reset signal is valid.
  • the valid data in the SSD cache is padded to the write unit boundary, and all the padded data is written into the device storage unit.
  • the SSD further includes a power failure recovery device, and the power failure recovery device is configured to restore normal operation of the SSD when the power is restored to normal.
  • the invention further provides a computer device, the computer device comprising the solid state hard disk, when the power source is abnormal, the solid state hard disk hardware logic realizes the following operations: disconnecting from the system bus; all the control processors clearing the pipeline; The SSD completes the power-down protection operation; all control processors are turned off.
  • the power-down protection method and the solid-state hard disk of the present invention have the following beneficial effects: 1. Using the remaining power, no battery is required. 2, to ensure the correct detection of various abnormal conditions. 3. After the abnormality occurs, ensure that the protection action is completed in a timely and orderly manner. 4, all functions are implemented by hardware, without any software support, further improve the robustness.
  • FIG. 1 is a schematic flow chart showing an embodiment of a power-down protection method according to the present invention.
  • FIG. 2 is a block diagram showing an embodiment of a solid state hard disk of the present invention.
  • FIG. 3 is a partial circuit diagram showing an embodiment of a solid state hard disk of the present invention.
  • the invention provides a power failure protection method.
  • the power-down protection method ensures the completion of the protection action by using the remaining power.
  • the power supply is implemented by a fairly powerful switching power supply.
  • the energy stored in each part of the capacitor inductance can still keep the computer working for a short period of time, which we call the remaining power.
  • the remaining power can be maintained for 20 milliseconds or more, which is determined by the nature of the power circuit.
  • the method for storing and storing power protection includes:
  • step S1 the power source is monitored in real time.
  • the specific implementation method for real-time monitoring of the power source includes: detecting whether the power supply voltage is within a preset range, if the power supply voltage is within a preset range, the power supply is normal; if the power supply voltage is not within the preset range, the power supply is abnormal. .
  • the specific implementation method for real-time monitoring of the power supply further includes: detecting a reset signal on the host system bus, and determining that the power supply is abnormal when detecting that the reset signal is valid, Start the power-off protection write operation.
  • the two detection methods can complement each other and back up each other. In one embodiment, it is detected simultaneously whether the supply voltage is within a predetermined range, and a reset signal on the host system bus is detected.
  • the power supply voltage is not within the preset range, or when it is detected that the reset signal is valid, it is judged that the power supply is abnormal, and the power-off protection write operation is started.
  • the power supply is normal only when the detected power supply voltage is within a preset range and no reset signal is detected on the system bus.
  • a power supply error indicates one of the following conditions: 1. The power supply is about to be lost and has started to drop. 2, the power is about to be lost, has not started to decline but the host system has detected and started the shutdown process. 3, the power supply is no problem, but for other reasons, such as system software crash or system hardware failure, the system starts to restart.
  • step S2 when the power supply abnormality is detected, the device controller hardware logic is disconnected from the system bus, and the internal clock of the device is disconnected from the system bus clock and enters free running.
  • the storage device controller no longer accepts any host data or sends any data to the host.
  • the bus clock is disconnected from the internal clock phase-locked loop (PLL: Phase Lock Loop) of the storage device.
  • PLL Phase Lock Loop
  • the PLL enters free running, and the internal clock can maintain relatively stable operation for about ten milliseconds.
  • step S3 the device controller hardware uses the internal clock of the device to complete the data related operation.
  • the data related operation includes writing data in the device cache to the device storage unit. Further, the valid data in the device cache is filled to the write unit boundary, and all the filled data is written into the device storage unit.
  • the metadata refers to the need to maintain a set of related data structures in the flash memory in order to implement the flash conversion function.
  • the power down protection method further includes: when it is detected that the power source returns to normal, the device controller resumes normal operation. Specifically, after detecting the abnormality of the power supply, detecting that the power supply returns to normal before the system is shut down, indicating that the system returns to normal, and the device controller resumes normal operation accordingly. Only when the detected power supply voltage is within the preset range and no reset signal is detected on the system bus, the power supply returns to normal.
  • the power-down protection method of the present invention can be applied not only to the SSD but also to other systems requiring power-down protection.
  • the invention also provides a solid state hard disk.
  • the solid state hard disk 1 includes, in addition to the necessary components, a power failure detecting device 11 and a power failure protection device 12. among them:
  • the power failure detecting device 11 is used to monitor whether the power source is abnormal in real time.
  • the specific implementation method for real-time monitoring of the power source includes: detecting whether the power supply voltage is within a preset range, if the power supply voltage is within a preset range, the power supply is normal; if the power supply voltage is not within the preset range, the power supply is abnormal. .
  • the specific implementation method for real-time monitoring of the power source further includes: detecting a reset signal on the system bus, and when detecting that the reset signal is valid, the power source is abnormal.
  • the two detection methods can complement each other and back up each other.
  • the power is detected simultaneously Whether the voltage is within a preset range and detecting a reset signal on the system bus.
  • the power supply is abnormal when the power supply voltage is not within the preset range, or when the reset RESET_ signal is detected.
  • the power supply is normal only when the detected power supply voltage is within a preset range and no reset RESET_ signal is detected on the system bus.
  • a power supply error indicates one of the following conditions: 1.
  • the power supply is about to be lost and has started to drop. 2, the power is about to be lost, has not started to decline but the host system has detected and started the shutdown process. 3, the power supply is no problem, but for other reasons, such as system software crash or system hardware failure, the system starts to restart.
  • part of the circuit of the brownout detecting device 11 is as shown in FIG. 3, and at the same time, a simple voltage comparator is used to output a low level when the voltage of 12V drops to 10V. And detecting the reset signal on the PCIE bus, that is, the RESET_ signal in the figure.
  • the power-down protection device 12 is connected to the power-down detection device 11 for detecting that the power supply is abnormal, the hardware logic implements the following power-down protection operation: disconnecting the system bus; the internal clock of the solid-state hard disk is disconnected from the bus clock And entering free running, using the SSD internal clock to write data in the SSD cache to the storage unit of the SSD. In one embodiment, valid data in the SSD cache is padded to the write unit boundary and all padded data is written to the device storage unit. .
  • the solid state hard disk 1 further includes a power failure recovery device, and the power failure recovery device is configured to restore normal operation of the solid state hard disk when the power source returns to normal. Specifically, after detecting that the power failure is abnormal, the power failure detecting device 11 detects that the power supply returns to normal before the system is shut down, indicating that the system returns to normal, and the power failure recovery device is configured to restore the normal state of the solid state hard disk. jobs. Only when the detected power supply voltage is within the preset range and the RESET_ signal is not detected on the system bus, the power supply returns to normal.
  • a computer device comprising the solid state hard disk 1.
  • the hardware logic implements the following operations: disconnecting from the system bus; all control processors clearing the pipeline; the solid state hard disk is powered off Protect operation; turn off all control processors.
  • the hardware logic implements the following operations: 1.
  • the system bus is disconnected and the SSD controller no longer accepts any host data or sends any data to the host.
  • the bus clock is disconnected from the internal PLL, the PLL enters free running, and the internal clock can maintain relatively stable operation for about 10ms.
  • All processor cores clear the pipeline. 4. If there is still valid data in the write buffer, it is truncated to the sector boundary. The remaining user data is filled with all 0s, and the metadata is filled with all 1.5. The data in the cache is written into the flash memory. 6. Finally, all processors are turned off.
  • the SSD automatically resumes normal operation.
  • the power-down protection method and the solid-state hard disk of the present invention can realize: 1. Simultaneously detecting the power supply voltage and the RESET_ signal to detect an abnormality. 2. Use the remaining power and free clock to protect the action. 3.
  • the protection action sequence is all implemented by hardware logic. And has the following beneficial effects: 1, using the remaining power, no battery. 2, to ensure the correct detection of various abnormal conditions. 3. After the abnormality occurs, ensure that the protection action is completed in a timely and orderly manner. 4, all functions are implemented by hardware, without any software support, further improve the robustness. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial utilization value.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Sources (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

本发明提供一种掉电保护方法及固态硬盘。所述存掉电保护方法包括：对电源进行实时监测；当监测到所述电源异常时，设备控制器硬件逻辑断开与系统总线连接，设备内部时钟与系统总线时钟断开并进入自由运行；设备控制器硬件利用设备内部时钟完成数据相关操作。所述固态硬盘包括：掉电检测装置，用于实时监测电源是否出现异常；掉电保护装置，用于在监测到所述电源出现异常时，硬件逻辑实现以下掉电保护操作：断开与主机系统总线连接；固态硬盘内部时钟与总线时钟断开并进入自由运行，利用固态硬盘内部时钟将固态硬盘缓存内的数据写入到固态硬盘的存储单元中。本发明的技术方案通过运用剩余电量来保证数据保护动作的完成，保证数据完整性。

Description

一种掉电保护方法及固态硬盘 技术领域
本发明涉及一种计算机安全技术，特别是涉及一种掉电保护方法及固态硬盘。
背景技术
基于闪存(NAND Flash)的数据存储技术在过去十几年发展迅速，在很多应用中逐渐取代了传统的磁记录硬盘(hard disk drive，HDD)。相对于传统的基于硬盘的存储系统，SSD(Solid State Drive，固态硬盘)对掉电情况的保护有显著不同，既有先天优势也有先天劣势。由于没有机械部份，也不存在磁头的紧急泊车问题，但SSD包含更复杂的元数据和数据缓存，它们也必须保证能写入介质以保证元数据和用户数据的完整性。对于企业级的应用，下列要求是需要保证的：1，断电重启后，SSD必须正常运行。2，所有写入完毕的数据必须可以正确读出。
传统SSD系统中，控制器由嵌入式处理器及固件实现，在断电或主机突然重启的时候是脆弱的。为保证处理器能正常运行至元数据和数据缓存都能保存在介质中通常需要较长的时间，常常需要电池或者超级电容提供所需电源。同时，电池本身可能失效，进一步放大系统的脆弱性。某些SSD系统甚至完全没有保护，先天就是不安全的。
鉴于此，如何在异常掉电的情况下最大限度的保证系统的数据完整性成为了本领域技术人员亟待解决的问题。
发明内容
鉴于以上所述现有技术的缺点，本发明的目的在于提供一种掉电保护方法及固态硬盘，用于解决现有技术中在异常掉电的情况下导致的系统数据不完整的问题。
为实现上述目的及其他相关目的，本发明提供一种掉电保护方法，所述存掉电保护方法包括：对电源进行实时监测；当监测到所述电源异常时，设备控制器硬件逻辑断开与主机系统总线连接，所述设备内部时钟与系统总线时钟断开并进入自由运行；设备控制器硬件利用所述设备内部时钟完成数据相关操作。
可选地，所述数据相关操作包括将所述设备缓存内的数据写入到所述设备存储单元中。
可选地，所述设备缓存内的有效数据做填充至写入单元边界，并将填充后的所有数据写入到所述设备存储单元中。
可选地，所述对电源实时监测的具体实现包括：检测电源电压是否在预设的范围内，当所述电源电压不在预设的范围内时，则判断所述电源异常，启动断电保护写入操作。
可选地，所述对电源实时监测的具体实现包括：检测主机系统总线上的重置信号，当检测到重置信号有效时，判断所述电源异常，启动断电保护写入操作。
可选地，所述掉电保护方法还包括：当监测到所述电源恢复正常时，所述设备控制器恢复正常工作。
本发明还提供一种固态硬盘，所述固态硬盘包括：掉电检测装置，用于实时监测电源是否出现异常；掉电保护装置，用于在监测到所述电源出现异常时，硬件逻辑实现以下掉电保护操作：断开与主机系统总线连接；所述固态硬盘内部时钟与总线时钟断开并进入自由运行，利用所述固态硬盘内部时钟将所述固态硬盘缓存内的数据写入到所述固态硬盘的存储单元中。
可选地，所述掉电检测装置用于检测电源电压是否在预设的范围内，当电源电压不在预设的范围内时，则所述电源异常。
可选地，所述掉电检测装置用于检测主机系统总线上的重置信号，当检测到重置信号有效时，所述电源异常。
可选地，所述固态硬盘缓存内的有效数据做填充至写入单元边界，并将并将填充后的所有数据写入到所述设备存储单元中。
可选地，所述固态硬盘还包括掉电恢复装置，所述掉电恢复装置用于当监测到所述电源恢复正常时，硬件恢复所述固态硬盘的正常工作。
本发明再提供一种计算机设备，所述计算机设备包括所述固态硬盘，当所述电源异常时，固态硬盘硬件逻辑实现以下操作：断开与系统总线连接；所有控制处理器清空流水线；所述固态硬盘完成掉电保护操作；关闭所有控制处理器。
如上所述，本发明的一种掉电保护方法及固态硬盘，具有以下有益效果：1，利用剩余电量，无须电池。2，保证各种异常情况的正确检测。3，在异常发生之后，保证保护动作的及时，有序完成。4，所有功能由硬件实现，无须任何软件支持，进一步提高强壮性。
附图说明
图1显示为本发明的掉电保护方法的一实施例的流程示意图。
图2显示为本发明的固态硬盘的一实施例的模块示意图。
图3显示为本发明的固态硬盘的一实施例的部分电路示意图。
元件标号说明
1                 固态硬盘
11                掉电监测装置
12                掉电保护装置
S1～S3            步骤
具体实施方式
以下通过特定的具体实例说明本发明的实施方式，本领域技术人员可由本说明书所揭露的内容轻易地了解本发明的其他优点与功效。本发明还可以通过另外不同的具体实施方式加以实施或应用，本说明书中的各项细节也可以基于不同观点与应用，在没有背离本发明的精神下进行各种修饰或改变。
需要说明的是，本实施例中所提供的图示仅以示意方式说明本发明的基本构想，遂图式中仅显示与本发明中有关的组件而非按照实际实施时的组件数目、形状及尺寸绘制，其实际实施时各组件的型态、数量及比例可为一种随意的改变，且其组件布局型态也可能更为复杂。
本发明提供一种掉电保护方法。所述掉电保护方法通过运用剩余电量来保证保护动作的完成。在服务器和普通计算机中，电源均是由相当功率的开关电源实现。在突然掉电的情况下，储存在各部份电容电感中的能量仍能保持计算机工作一段较短的时间，我们称之为剩余电量。对于高品质计算机电源来说，剩余电量可以维持20毫秒甚至更长时间，这是电源电路的本质决定的。在一个实施例中，如图1所示，所述存掉电保护方法包括：
步骤S1，对电源进行实时监测。所述对电源实时监测的具体实现方法包括：检测电源电压是否在预设的范围内，如果电源电压在预设的范围内，则电源正常；如果电源电压不在预设的范围内，则电源异常。所述对电源实时监测的具体实现方法还包括：检测主机系统总线上的重置信号，当检测到重置信号有效时，判断所述电源异常， 启动断电保护写入操作。两种检测手段可以相互补充，互为备份。在一个实施例中，同时检测电源电压是否在预设的范围内，以及检测主机系统总线上的重置信号。当电源电压不在预设的范围内，或者当检测到重置信号有效时，判断所述电源异常，启动断电保护写入操作。仅当检测电源电压在预设的范围内，且系统总线上未检测到重置信号时，所述电源正常。电源异常说明下列情况之一发生：1，电源即将丢失，并已开始下降。2，电源即将丢失，尚未开始下降但主机系统已检测到并开始关机过程。3，电源没问题，但由于其他原因，如系统软件崩溃或系统硬件故障，系统开始重启。
步骤S2，当监测到所述电源异常时，设备控制器硬件逻辑断开与系统总线连接，所述设备内部时钟与系统总线时钟断开并进入自由运行。对应于存储设备，断开与系统总线连接，存储设备控制器不再接受任何主机数据或发送任何数据到主机。总线时钟从存储设备内部时钟锁相环(PLL：Phase Lock Loop)断开，PLL进入自由运行，内部时钟还能维持十几毫秒左右相对稳定运行。
步骤S3，设备控制器硬件利用所述设备内部时钟完成数据相关操作。具体地，对应与存储设备，所述数据相关操作包括将所述设备缓存内的数据写入到所述设备存储单元中。进一步，所述设备缓存内的有效数据做填充至写入单元边界，并将填充后的所有数据写入到所述设备存储单元中。所述元数据是指在闪存中为了实现闪存转换功能而需要维护一套相关数据结构。
在一个实施例中，所述掉电保护方法还包括：当监测到所述电源恢复正常时，所述设备控制器恢复正常工作。具体地，当监测到所述电源异常后，在系统关机前又检测到所述电源恢复正常，则表明系统恢复正常，所述设备控制器也相应的恢复正常工作。仅当检测电源电压在预设的范围内，且系统总线上未检测到重置信号时，表明所述电源恢复正常。本发明的掉电保护方法不仅可以在SSD上采用，还可以运用到其他需掉电保护的系统中。
本发明还提供一种固态硬盘。在一个实施例中，如图2所示，所述固态硬盘1除了必要的部件外，还包括：掉电检测装置11以及掉电保护装置12。其中：
掉电检测装置11用于实时监测电源是否出现异常。所述对电源实时监测的具体实现方法包括：检测电源电压是否在预设的范围内，如果电源电压在预设的范围内，则电源正常；如果电源电压不在预设的范围内，则电源异常。所述对电源实时监测的具体实现方法还包括：检测系统总线上的重置信号，当检测到重置信号有效时，所述电源异常。两种检测手段可以相互补充，互为备份。在一个实施例中，同时检测电源 电压是否在预设的范围内，以及检测系统总线上的重置信号。当电源电压不在预设的范围内，或者当检测到重置RESET_信号时，则所述电源异常。仅当检测电源电压在预设的范围内，且系统总线上未检测到重置RESET_信号时，所述电源正常。电源异常说明下列情况之一发生：1，电源即将丢失，并已开始下降。2，电源即将丢失，尚未开始下降但主机系统已检测到并开始关机过程。3，电源没问题，但由于其他原因，如系统软件崩溃或系统硬件故障，系统开始重启。在一个实施例中，掉电检测装置11的部分电路如图3所示，同时实现用一个简单电压比较器，在12V电压降至10V时输出低电平。以及检测PCIE总线上的重置信号，即图中的RESET_信号。
掉电保护装置12与掉电检测装置11相连，用于在监测到所述电源出现异常时，硬件逻辑实现以下掉电保护操作：断开系统总线；所述固态硬盘内部时钟与总线时钟断开并进入自由运行，利用所述固态硬盘内部时钟将所述固态硬盘缓存内的数据写入到所述固态硬盘的存储单元中。在一个实施例中，所述固态硬盘缓存内的有效数据做填充至写入单元边界，并将并将填充后的所有数据写入到所述设备存储单元中。。
在一个实施例中，所述固态硬盘1还包括掉电恢复装置，所述掉电恢复装置用于当监测到所述电源恢复正常时，硬件恢复所述固态硬盘的正常工作。具体地，掉电检测装置11监测到所述电源异常后，在系统关机前又检测到所述电源恢复正常，则表明系统恢复正常，所述掉电恢复装置用于恢复所述固态硬盘的正常工作。仅当检测电源电压在预设的范围内，且系统总线上未检测到RESET_信号时，表明所述电源恢复正常。
一种计算机设备，所述计算机设备包括所述固态硬盘1，当所述电源异常时，硬件逻辑实现以下操作：断开与系统总线连接；所有控制处理器清空流水线；所述固态硬盘完成掉电保护操作；关闭所有控制处理器。在一个实施例中，当所述电源异常时，硬件逻辑实现以下操作：1，系统总线断开，SSD控制器不再接受任何主机数据或发送任何数据到主机。2，总线时钟从内部PLL断开，PLL进入自由运行，内部时钟还能维持10ms左右相对稳定运行。3，所有处理器核清空流水线。4，如果写缓存内仍有有效数据则截断至扇区边界。剩余用户数据填充全0，元数据填充全1。5，缓存内的数据写入到闪存内。6，最后，所有处理器关机。
在一个实施例中，当所述计算机设备出现电源异常后，如果又检测到电源恢复正常，即总线上的RESET_恢复高电平，总线连接恢复正常，则SSD自动恢复正常工作。
综上所述，本发明的一种掉电保护方法及固态硬盘，能够实现：1，同时检测电源电压和RESET_信号来检测异常发生。2，利用剩余电量和自由时钟进行保护动作。3，保护动作序列全部由硬件逻辑实现。并具有以下有益效果：1，利用剩余电量，无须电池。2，保证各种异常情况的正确检测。3，在异常发生之后，保证保护动作的及时，有序完成。4，所有功能由硬件实现，无须任何软件支持，进一步提高强壮性。所以，本发明有效克服了现有技术中的种种缺点而具高度产业利用价值。
上述实施例仅例示性说明本发明的原理及其功效，而非用于限制本发明。任何熟悉此技术的人士皆可在不违背本发明的精神及范畴下，对上述实施例进行修饰或改变。因此，举凡所属技术领域中具有通常知识者在未脱离本发明所揭示的精神与技术思想下所完成的一切等效修饰或改变，仍应由本发明的权利要求所涵盖。

Claims (12)

  1. 一种掉电保护方法，其特征在于，所述存掉电保护方法包括：
    对电源进行实时监测；
    当监测到所述电源异常时，设备控制器硬件逻辑断开与系统总线连接，所述设备内部时钟与系统总线时钟断开并进入自由运行；
    设备控制器硬件利用所述设备内部时钟完成数据的相关操作。
  2. 根据权利要求1所述的掉电保护方法，其特征在于：所述数据相关操作包括将所述设备缓存内的数据写入到所述设备存储单元中。
  3. 根据权利要求2所述的掉电保护方法，其特征在于：所述设备缓存内的有效数据做填充至写入单元边界，并将填充后的所有数据写入到所述设备存储单元中。
  4. 根据权利要求1所述的掉电保护方法，其特征在于：所述对电源实时监测的具体实现步骤包括：检测电源电压是否在预设的范围内，当所述电源电压不在预设的范围内时，则判断所述电源异常，启动断电保护写入操作。
  5. 根据权利要求1所述的掉电保护方法，其特征在于：检测主机系统总线上的重置信号，当检测到重置信号有效时，判断所述电源异常，启动断电保护写入操作。
  6. 根据权利要求1所述的掉电保护方法，其特征在于：所述掉电保护方法还包括：当监测到所述电源恢复正常时，所述设备控制器恢复正常工作。
  7. 一种固态硬盘，其特征在于：所述固态硬盘包括：掉电检测装置，用于实时监测电源是否出现异常；掉电保护装置，用于在监测到所述电源出现异常时，硬件逻辑实现以下掉电保护操作：断开与主机系统总线连接；所述固态硬盘内部时钟与总线时钟断开并进入自由运行，利用所述固态硬盘内部时钟将所述固态硬盘缓存内的数据写入到所述固态硬盘的存储单元中。
  8. 根据权利要求7所述的固态硬盘，其特征在于：所述掉电检测装置用于检测电源 电压是否在预设的范围内，当电源电压不在预设的范围内时，则所述电源异常。
  9. 根据权利要求7所述的固态硬盘，其特征在于：所述掉电检测装置用于检测主机系统总线上的重置信号，当检测到重置信号有效时，所述电源异常。
  10. 根据权利要求7所述的固态硬盘，其特征在于：所述固态硬盘缓存内的有效数据做填充至写入单元边界，并将并将填充后的所有数据写入到所述设备存储单元中。
  11. 根据权利要求7所述的固态硬盘，其特征在于：所述固态硬盘还包括掉电恢复装置，所述掉电恢复装置用于当监测到所述电源恢复正常时，硬件恢复所述固态硬盘的正常工作。
  12. 一种计算机设备，其特征在于：所述计算机设备包括如权利要求7至11中任一权利要求所述的固态硬盘，当所述电源异常时，固态硬盘硬件逻辑实现以下操作：断开与系统总线连接；所有控制处理器清空流水线；所述固态硬盘完成掉电保护操作；关闭所有控制处理器。
PCT/CN2015/070349 2014-11-21 2015-01-08 一种掉电保护方法及固态硬盘 WO2016078202A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US15/527,538 US9997209B2 (en) 2014-11-21 2015-01-08 Power-failure protection method and solid state drive

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201410674388.3 2014-11-21
CN201410674388.3A CN104461947B (zh) 2014-11-21 2014-11-21 一种掉电保护方法及固态硬盘

Publications (1)

Publication Number Publication Date
WO2016078202A1 true WO2016078202A1 (zh) 2016-05-26

Family

ID=52908031

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2015/070349 WO2016078202A1 (zh) 2014-11-21 2015-01-08 一种掉电保护方法及固态硬盘

Country Status (3)

Country Link
US (1) US9997209B2 (zh)
CN (1) CN104461947B (zh)
WO (1) WO2016078202A1 (zh)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106326061B (zh) * 2015-06-26 2020-06-23 伊姆西Ip控股有限责任公司 高速缓存数据处理方法及设备
US20170091042A1 (en) * 2015-09-25 2017-03-30 Quanta Computer Inc. System and method for power loss protection of storage device
CN105511978B (zh) * 2015-12-05 2019-01-29 中国航空工业集团公司洛阳电光设备研究所 一种记录设备文件系统掉电保护方法及系统
US10139884B2 (en) * 2015-12-23 2018-11-27 Toshiba Memory Corporation Power loss protection for solid state drives
KR20170076878A (ko) * 2015-12-24 2017-07-05 에스케이하이닉스 주식회사 메모리 시스템 및 메모리 시스템의 동작 방법
CN107563229A (zh) * 2017-09-14 2018-01-09 苏州恒成芯兴电子技术有限公司 一种适用于固态硬盘的掉电保护模块
CN108228097A (zh) * 2017-12-25 2018-06-29 中国航空工业集团公司洛阳电光设备研究所 一种基于fat32文件系统的掉电保护方法
US11003229B2 (en) * 2018-07-02 2021-05-11 Samsung Electronics Co., Ltd. Cost-effective solid state disk data protection method for hot removal event
US11314596B2 (en) 2018-07-20 2022-04-26 Winbond Electronics Corp. Electronic apparatus and operative method
CN110333828B (zh) * 2019-07-12 2023-07-07 四川虹美智能科技有限公司 Eeprom数据存储方法、控制器以及系统
CN111737050A (zh) * 2020-06-06 2020-10-02 苏州浪潮智能科技有限公司 一种电源掉电硬盘保护装置、方法及服务器
CN111832088B (zh) * 2020-07-13 2024-02-13 深圳忆联信息系统有限公司 固态硬盘低功耗模式数据保护方法、装置、计算机设备及存储介质
CN112433593A (zh) * 2020-12-08 2021-03-02 南京商业学校(南京市鼓楼中等专业学校) 一种用于计算机的保护电路及方法
CN117573420B (zh) * 2024-01-16 2024-06-04 武汉麓谷科技有限公司 一种zns固态硬盘掉电数据保存方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101458668A (zh) * 2008-12-19 2009-06-17 成都市华为赛门铁克科技有限公司 缓存数据块的处理方法和硬盘
CN101826060A (zh) * 2010-05-24 2010-09-08 中兴通讯股份有限公司 固态硬盘掉电数据保护方法及装置
CN102156679A (zh) * 2011-04-18 2011-08-17 苏州捷泰科信息技术有限公司 一种基于pcie接口的固态硬盘掉电保护方法及装置
US20130205065A1 (en) * 2012-02-02 2013-08-08 Lsi Corporation Methods and structure for an improved solid-state drive for use in caching applications

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5583715A (en) * 1990-09-03 1996-12-10 Canon Kabushiki Kaisha Image data communication apparatus
US8140739B2 (en) * 2008-08-08 2012-03-20 Imation Corp. Flash memory based storage devices utilizing magnetoresistive random access memory (MRAM) to store files having logical block addresses stored in a write frequency file buffer table
KR101575812B1 (ko) * 2009-01-21 2015-12-09 삼성전자주식회사 자가전원 반도체 장치를 갖는 데이터 저장장치
CN101706853B (zh) * 2009-11-10 2011-05-18 徐欣 基于固态硬盘的防失密自毁系统
EP2652623B1 (en) * 2010-12-13 2018-08-01 SanDisk Technologies LLC Apparatus, system, and method for auto-commit memory
US9218278B2 (en) * 2010-12-13 2015-12-22 SanDisk Technologies, Inc. Auto-commit memory
US20120151121A1 (en) * 2010-12-14 2012-06-14 Jose Antonio Braga Solid State Non-Volatile Storage Drives Having Self-Erase and Self-Destruct Functionality and Related Methods

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101458668A (zh) * 2008-12-19 2009-06-17 成都市华为赛门铁克科技有限公司 缓存数据块的处理方法和硬盘
CN101826060A (zh) * 2010-05-24 2010-09-08 中兴通讯股份有限公司 固态硬盘掉电数据保护方法及装置
CN102156679A (zh) * 2011-04-18 2011-08-17 苏州捷泰科信息技术有限公司 一种基于pcie接口的固态硬盘掉电保护方法及装置
US20130205065A1 (en) * 2012-02-02 2013-08-08 Lsi Corporation Methods and structure for an improved solid-state drive for use in caching applications

Also Published As

Publication number Publication date
CN104461947B (zh) 2019-07-30
CN104461947A (zh) 2015-03-25
US20170330603A1 (en) 2017-11-16
US9997209B2 (en) 2018-06-12

Similar Documents

Publication Publication Date Title
WO2016078202A1 (zh) 一种掉电保护方法及固态硬盘
US8266398B2 (en) Method and apparatus for preserving memory contents during a power outage
US8990617B2 (en) Fault-tolerant computer system, fault-tolerant computer system control method and recording medium storing control program for fault-tolerant computer system
US20150089287A1 (en) Event-triggered storage of data to non-volatile memory
US10210057B2 (en) Information processing apparatus with memory backup function for power failure
US10474618B2 (en) Debug data saving in host memory on PCIE solid state drive
US8984316B2 (en) Fast platform hibernation and resumption of computing systems providing secure storage of context data
KR20170098802A (ko) 장애 허용 자동 듀얼 인라인 메모리 모듈 리프레시
JP2004038290A (ja) 情報処理システムおよび同システムで用いられるディスク制御方法
WO2016095372A1 (zh) 实现事务日志镜像备份的方法及装置
CN110096125B (zh) 用于保存存储器数据的计算机实施方法及计算机系统
US20150095632A1 (en) Computer booting system and method for computer system
US10831657B2 (en) Debug data recovery after PLI event
US10401935B2 (en) Storage device with a power source and persistent store that provides backup power to DRAM in a power loss event
WO2008071096A1 (fr) Système et procédé à tampon multi-niveau
CN103049407B (zh) 数据存储方法、装置及系统
TW201546612A (zh) 使用狀態資訊回復系統之技術
WO2016101225A1 (zh) 一种数据备份的方法、装置及系统
US20150324248A1 (en) Information processing device, control method and recording medium for recording control program
US20130321944A1 (en) Server and method for preventing the server from vibration damage
US10528275B2 (en) Storage system, storage control device, and method of controlling a storage system
US20120054524A1 (en) Method and system for reducing power consumption of peripherals in an emergency shut-down
US10838818B2 (en) Memory persistence from a volatile memory to a non-volatile memory
US20130073792A1 (en) Electronic apparatus using nand flash and memory management method thereof
WO2014112039A1 (ja) 情報処理装置、情報処理装置制御方法及び情報処理装置制御プログラム

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 15860096

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 15527538

Country of ref document: US

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 15860096

Country of ref document: EP

Kind code of ref document: A1