WO2016078080A1 - 液晶显示面板及其阵列基板 - Google Patents

液晶显示面板及其阵列基板 Download PDF

Info

Publication number
WO2016078080A1
WO2016078080A1 PCT/CN2014/091895 CN2014091895W WO2016078080A1 WO 2016078080 A1 WO2016078080 A1 WO 2016078080A1 CN 2014091895 W CN2014091895 W CN 2014091895W WO 2016078080 A1 WO2016078080 A1 WO 2016078080A1
Authority
WO
WIPO (PCT)
Prior art keywords
region
pixel
area
electrode
electrode pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2014/091895
Other languages
English (en)
French (fr)
Inventor
陈政鸿
张天豪
郭晋波
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TCL China Star Optoelectronics Technology Co Ltd
Original Assignee
Shenzhen China Star Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen China Star Optoelectronics Technology Co Ltd filed Critical Shenzhen China Star Optoelectronics Technology Co Ltd
Priority to US14/426,363 priority Critical patent/US20160139474A1/en
Publication of WO2016078080A1 publication Critical patent/WO2016078080A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134327—Segmented, e.g. alpha numeric display
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

Definitions

  • the present invention relates to the field of liquid crystal display technologies, and in particular, to a liquid crystal display panel and an array substrate thereof.
  • a pixel structure of a VA (Vertical Alignment) type liquid crystal display panel data lines on the array substrate are distributed between adjacent pixel units and perpendicular to the scan lines, and data and data are disposed on the color filter substrate.
  • a black matrix corresponding to the line and the scan line for preventing light leakage.
  • the pixel electrode of each pixel unit is generally divided into a plurality of regions.
  • the liquid crystal molecules corresponding to the plurality of regions are subjected to different electric field strengths, the liquid crystal display panel inevitably exhibits dark lines during display, thereby reducing the transmittance and aperture ratio of the pixel unit.
  • the technical problem to be solved by the embodiments of the present invention is to provide a liquid crystal display panel and an array substrate thereof to improve the transmittance and aperture ratio of the pixel unit.
  • a technical solution adopted by the present invention is to provide an array substrate including a plurality of pixel units, and a pixel electrode of each pixel unit is connected to a scan line and at least two data lines, each pixel unit.
  • the pixel electrode includes a plurality of regions distributed in a matrix, wherein, in each pixel unit, the distance between adjacent two data lines is different, and the data lines are correspondingly disposed between the adjacent two rows, and along the In the direction of gravity, the heights of the regions of the pixel electrodes are not equal, and the widths of the regions of the pixel electrodes are equal along the direction perpendicular to the extension of the data lines.
  • a technical solution adopted by the present invention is to provide an array substrate including a plurality of pixel units, wherein pixel electrodes of each pixel unit are connected to at least one data line, and pixel electrodes of each pixel unit include A plurality of regions of the matrix distribution, wherein the data lines are correspondingly disposed between the adjacent two rows of regions.
  • the pixel electrode of each pixel unit is connected to a data line, and the pixel electrode of each pixel unit includes a first area, a second area, a third area, and a fourth area, and the first area is The second area is arranged side by side, the first area is disposed diagonally with the fourth area, the second area is diagonally disposed with the third area, the data line is correspondingly disposed between the first area and the second area, and the third area and the fourth area are Between the regions.
  • the electrode pattern of the first region is the same as the electrode pattern of the electrode pattern of the fourth region, and the electrode pattern of the second region is the same as the electrode pattern of the electrode pattern of the third region.
  • the electrode pattern of the first region and the electrode pattern of the electrode pattern of the fourth region are in a first direction
  • the electrode pattern of the electrode pattern of the second region and the electrode pattern of the third region are in a second direction
  • the first direction is The two directions are perpendicular to each other.
  • the areas of the first area, the second area, the third area, and the fourth area are equal.
  • Each of the pixel electrodes includes a plurality of strip-shaped gaps, a plurality of strip-shaped first electrode patterns, and a second electrode pattern and a third electrode pattern.
  • the gap is interlaced with the first electrode pattern, and the second electrode pattern surrounds the first
  • the region, the second region, the third region, and the fourth region are disposed, and the third electrode pattern is used to define the first region, the second region, the third region, and the fourth region.
  • the pixel electrodes of each pixel unit are connected to at least two data lines.
  • the heights of the regions of the pixel electrodes are not equal along the direction of gravity, and the widths of the regions of the pixel electrodes are equal along the extending direction perpendicular to the data lines.
  • each pixel unit the distance between two adjacent data lines is different.
  • the pixel electrode of each pixel unit is connected to a scan line.
  • a liquid crystal display panel including a liquid crystal layer, a color filter substrate, and an array substrate, and the color filter substrate and the array substrate are relatively spaced apart.
  • the liquid crystal layer is filled between the color filter substrate and the array substrate.
  • the array substrate includes a plurality of pixel units, and the pixel electrodes of each pixel unit are connected to at least one data line, and the pixel electrodes of each pixel unit are arranged in a matrix. A plurality of regions, wherein the data lines are correspondingly disposed between the adjacent two rows of regions.
  • the pixel electrode of each pixel unit is connected to a data line, and the pixel electrode of each pixel unit includes a first area, a second area, a third area, and a fourth area, and the first area and the second area are arranged side by side, One area is disposed diagonally with the fourth area, the second area is diagonally disposed with the third area, and the data line is correspondingly disposed between the first area and the second area, and between the third area and the fourth area.
  • the electrode pattern of the first region is the same as the electrode pattern of the electrode pattern of the fourth region
  • the electrode pattern of the second region is the same as the electrode pattern of the electrode pattern of the third region.
  • the electrode pattern of the first region and the electrode pattern of the electrode pattern of the fourth region are in a first direction
  • the electrode pattern of the electrode pattern of the second region and the electrode pattern of the third region are in a second direction
  • the first direction is The two directions are perpendicular to each other.
  • the areas of the first area, the second area, the third area, and the fourth area are equal.
  • Each of the pixel electrodes includes a plurality of strip-shaped gaps, a plurality of strip-shaped first electrode patterns, and a second electrode pattern and a third electrode pattern.
  • the gap is interlaced with the first electrode pattern, and the second electrode pattern surrounds the first
  • the region, the second region, the third region, and the fourth region are disposed, and the third electrode pattern is used to define the first region, the second region, the third region, and the fourth region.
  • the pixel electrodes of each pixel unit are connected to at least two data lines.
  • the heights of the regions of the pixel electrodes are not equal along the direction of gravity, and the widths of the regions of the pixel electrodes are equal along the extending direction perpendicular to the data lines.
  • each pixel unit the distance between two adjacent data lines is different.
  • the pixel electrode of each pixel unit is connected to a scan line.
  • the embodiment of the present invention sets the data lines correspondingly between the plurality of regions of the pixel electrodes of each pixel unit, so that the data lines and the opaque data lines are displayed.
  • the dark lines corresponding to the plurality of areas overlap, the corresponding shading area of the data line is reduced, and the light-transmitting area corresponding to the data line is increased, so that the transmittance and the aperture ratio of the pixel unit can be improved.
  • FIG. 1 is a cross-sectional view of a liquid crystal display panel in accordance with a preferred embodiment of the present invention
  • FIG. 2 is a schematic view showing a pixel structure of a first embodiment of a liquid crystal display panel of the present invention
  • FIG. 3 is a schematic structural view of a pixel unit in the liquid crystal display panel shown in FIG. 2;
  • FIG. 4 is a schematic structural diagram of a pixel unit of a pixel structure of a second embodiment of the liquid crystal display panel of the present invention.
  • FIG. 5 is a schematic structural view of a pixel unit of a pixel structure of a third embodiment of the liquid crystal display panel of the present invention.
  • FIG. 1 is a cross-sectional view of a liquid crystal display panel according to a preferred embodiment of the present invention
  • FIG. 2 is a schematic view showing a pixel structure of the liquid crystal display panel of FIG.
  • the liquid crystal display panel 10 includes a first substrate 11, a second substrate 12, and a liquid crystal layer 13 interposed therebetween, wherein the first substrate 11 and the second substrate 12 are relatively spaced apart.
  • the second substrate 12 is a CF (Color Filter) color filter substrate
  • the first substrate 11 is a TFT (Thin Film Transistor) array substrate, which includes a transparent substrate and each of the transparent substrates. Wiring, pixel electrodes, etc. specifically,
  • the first substrate 11 includes a plurality of data lines D 1 , D 2 , . . . , D N , a plurality of scanning lines G 1 , G 2 , . . . , G L disposed along a direction perpendicular to the data line, and a plurality of scanning lines G 1 , G 2 , . . . , G L and a plurality of pixel units P 1 , P 2 , . . . , P X defined by the plurality of data lines D 1 , D 2 , . . . , D N , each pixel unit is connected to a scan line And a data line.
  • the plurality of scan lines G 1 , G 2 , . . . , G L are connected to the gate driver 21
  • the plurality of data lines D 1 , D 2 , . . . , D N are connected to the source driver 22 .
  • the gate driver 21 is for supplying a scan voltage for a plurality of pixel units P 1 , P 2 , . . . , P X
  • the source driver 22 is for supplying a driving voltage for the plurality of pixel units P 1 , P 2 , . . . , P X .
  • FIG. 3 is a schematic structural view of a pixel unit in the liquid crystal display panel 10 of FIG.
  • the pixel electrode of one pixel unit 30 of the liquid crystal display panel 10 is connected to a scan line 31 and a data line 32.
  • the pixel electrode of the pixel unit 30 includes a plurality of strip-shaped first electrode patterns 33 and more. Strip-shaped (ITO) gaps 34, second electrode patterns 35, and third electrode patterns 36, wherein:
  • the second electrode pattern 35 defines an opening area of the pixel unit 30, and the two strip-shaped third electrode patterns 36 are vertically disposed in a cross shape, and the pixel electrode of each pixel unit 30 is defined as a first area O 1 and a second area. O 2 , the third region O 3 and the fourth region O 4 .
  • the strip-shaped second electrode pattern 35 surrounds the first region O 1 , the second region O 2 , the third region O 3 , and the fourth region O 4 such that the pixel electrodes of the pixel unit 30 are entirely rectangular.
  • the first area O 1 at the upper left is arranged side by side in the same horizontal direction as the second area O 2 at the upper right, and the fourth area O 4 at the lower right is disposed diagonally with the first area O 1 at the lower left.
  • the third region O 3 is disposed diagonally with the second region O 2 , and preferably the areas of the first region O 1 , the second region O 2 , the third region O 3 , and the fourth region O 4 are equal.
  • first electrode pattern 33 of the first region O 1 is the same as the first electrode pattern 33 of the fourth region O 4 , for example, the first direction D 1 shown in FIG. 3; the second region O 2
  • the first electrode pattern 33 is the same as the first electrode pattern 33 of the third region O 3 , for example, the second direction D 2 shown in FIG. 3 , and preferably the first direction D 1 and the second direction D 2 are perpendicular to each other.
  • the first direction D 1 may be a direction at an angle of 45° with respect to the horizontal positive direction
  • the second direction D 2 may be a direction at an angle of 45° with the horizontal positive direction
  • the horizontal positive direction Indicates a direction parallel to the direction in which the scanning line 31 is located and from the first region O 1 toward the second region O 2 or the third region O 3 toward the fourth region O 4 .
  • the data line 32 is correspondingly disposed between the first region O 1 and the second region O 2 , and between the third region O 3 and the fourth region O 4 , that is, toward the second direction D 2
  • the third electrode pattern 36 corresponds to and the insulation is disposed below it.
  • the data line 32 is correspondingly disposed between the plurality of regions of the pixel electrode of each pixel unit 30, so that the opaque data line 32 appears in multiple regions corresponding to the display (the first region O 1 and the first The dark regions between the two regions O 2 and the third region O 3 and the fourth region O 4 ) overlap, which is equivalent to reducing the light-shielding area corresponding to the data line 32 and increasing the light-transmitting region corresponding to the data line 32, thereby The transmittance and aperture ratio of the pixel unit 30 and the liquid crystal display panel 10 having the pixel unit 30 can be improved.
  • each pixel unit of the liquid crystal display panel 10 has other pixel structures, such as:
  • the pixel electrode of each pixel unit 40 includes eight regions.
  • the pixel electrode is connected to a data line 41.
  • the pixel electrode of each pixel unit 50 includes sixteen regions.
  • the pixel electrodes of each pixel unit 50 are connected to three data lines 51, and are correspondingly arranged in the direction of gravity. Between multiple areas of the cloth.
  • the distance between two adjacent data lines may be the same or different; in the direction of gravity, the heights L of the regions of the pixel electrodes may be equal or The widths H of the regions of the pixel electrodes may be equal or unequal in the direction perpendicular to the extending direction of the data lines; the scanning lines corresponding to the pixel electrodes may be one or more, the number of scanning lines, and the respective regions.
  • the orientation of the electrode pattern may depend on the structure and number of thin film transistors electrically connected to the pixel electrodes.
  • the pixel electrode of each pixel unit is connected to at least one data line, and the pixel electrode of each pixel unit includes a plurality of regions distributed in a matrix, and the data lines are correspondingly disposed in two adjacent rows. Between the regions, the opaque data lines overlap with the dark lines corresponding to the plurality of regions when displayed, which is equivalent to reducing the shading area corresponding to the data lines, and increasing the transparent areas corresponding to the data lines. Thereby, the transmittance and aperture ratio of the pixel unit can be improved.

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Liquid Crystal (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Geometry (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

提供了一种液晶显示面板（10）及其阵列基板（11）。阵列基板（11）的每一像素单元（30）的像素电极对应连接至少一条数据线（32），每一像素单元（30）的像素电极包括呈矩阵分布的多个区域（O1，O2，O3，O4），数据线（32）对应设置于相邻两排的区域（O1，O2，O3，O4）之间，因此能够提高像素单元（30）的穿透率和开口率。

Description

液晶显示面板及其阵列基板 【技术领域】
本发明涉及液晶显示技术领域，特别是涉及一种液晶显示面板及其阵列基板。
【背景技术】
在VA(Vertical Alignment，垂直调整技术)型液晶显示面板的像素结构中，阵列基板上的数据线分布于相邻像素单元之间且与扫描线相垂直，彩色滤光片基板上设置有与数据线和扫描线相对应的用于防止漏光的黑矩阵。为解决黑矩阵导致的开口率减小的问题，业界普遍将每一像素单元的像素电极划分为多个区域。然而，由于多个区域之间对应的液晶分子受到的取向电场强度不同，导致液晶显示面板在显示时会不可避免的出现暗纹，从而降低像素单元的穿透率和开口率。
【发明内容】
有鉴于此，本发明实施例所要解决的技术问题是提供一种液晶显示面板及其阵列基板，以提高像素单元的穿透率和开口率。
为解决上述技术问题，本发明采用的一个技术方案是：提供一种阵列基板，包括多个像素单元，每一像素单元的像素电极对应连接一条扫描线和至少两条数据线，每一像素单元的像素电极包括呈矩阵分布的多个区域，其中，在每一像素单元中，相邻两条数据线之间的距离不相同，数据线对应设置于相邻两排的区域之间，且沿重力方向，像素电极的各区域的高度不相等，沿垂直于数据线的延伸方向，像素电极的各区域的宽度相等。
为解决上述技术问题，本发明采用的一个技术方案是：提供一种阵列基板，包括多个像素单元，每一像素单元的像素电极对应连接至少一条数据线，每一像素单元的像素电极包括呈矩阵分布的多个区域，其中，数据线对应设置于相邻两排的区域之间。
其中，每一像素单元的像素电极对应连接一条数据线，每一像素单元的像素电极包括第一区域、第二区域、第三区域和第四区域，第一区域与 第二区域并排设置，第一区域与第四区域对角设置，第二区域与第三区域对角设置，数据线对应设置于第一区域与第二区域之间，以及第三区域和第四区域之间。
其中，第一区域的电极图案与第四区域的电极图案的电极走向相同，第二区域的电极图案与第三区域的电极图案的电极走向相同。
其中，第一区域的电极图案与第四区域的电极图案的电极走向呈第一方向，第二区域的电极图案与第三区域的电极图案的电极走向呈第二方向，且第一方向与第二方向相互垂直。
其中，第一区域、第二区域、第三区域和第四区域的面积相等。
其中，每一像素电极包括多个条状的间隙、多个条状的第一电极图案以及第二电极图案和第三电极图案，间隙与第一电极图案交错设置，第二电极图案环绕第一区域、第二区域、第三区域和第四区域设置，第三电极图案用于定义第一区域、第二区域、第三区域和第四区域。
其中，每一像素单元的像素电极对应连接至少两条数据线，沿重力方向，像素电极的各区域的高度不相等，且沿垂直于数据线的延伸方向，像素电极的各区域的宽度相等。
其中，在每一像素单元中，相邻两条数据线之间的距离不相同。
其中，每一像素单元的像素电极对应连接一条扫描线。
为解决上述技术问题，本发明采用的另一个技术方案是：提供一种液晶显示面板，该液晶显示面板包括液晶层、彩色滤光片基板以及阵列基板，彩色滤光片基板和阵列基板相对间隔设置，液晶层填充于彩色滤光片基板和阵列基板之间，阵列基板包括多个像素单元，每一像素单元的像素电极对应连接至少一条数据线，每一像素单元的像素电极包括呈矩阵分布的多个区域，其中，数据线对应设置于相邻两排的区域之间。
其中，每一像素单元的像素电极对应连接一条数据线，每一像素单元的像素电极包括第一区域、第二区域、第三区域和第四区域，第一区域与第二区域并排设置，第一区域与第四区域对角设置，第二区域与第三区域对角设置，数据线对应设置于第一区域与第二区域之间，以及第三区域和第四区域之间。
其中，第一区域的电极图案与第四区域的电极图案的电极走向相同， 第二区域的电极图案与第三区域的电极图案的电极走向相同。
其中，第一区域的电极图案与第四区域的电极图案的电极走向呈第一方向，第二区域的电极图案与第三区域的电极图案的电极走向呈第二方向，且第一方向与第二方向相互垂直。
其中，第一区域、第二区域、第三区域和第四区域的面积相等。
其中，每一像素电极包括多个条状的间隙、多个条状的第一电极图案以及第二电极图案和第三电极图案，间隙与第一电极图案交错设置，第二电极图案环绕第一区域、第二区域、第三区域和第四区域设置，第三电极图案用于定义第一区域、第二区域、第三区域和第四区域。
其中，每一像素单元的像素电极对应连接至少两条数据线，沿重力方向，像素电极的各区域的高度不相等，且沿垂直于数据线的延伸方向，像素电极的各区域的宽度相等。
其中，在每一像素单元中，相邻两条数据线之间的距离不相同。
其中，每一像素单元的像素电极对应连接一条扫描线。
通过上述技术方案，本发明实施例所产生的有益效果是：本发明实施例通过将数据线对应设置于每一像素单元的像素电极的多个区域之间，使得不透光的数据线与显示时对应出现于多个区域之间的暗纹相重叠，相当于减小了数据线对应的遮光面积，增加了数据线对应的透光区域，从而能够提高像素单元的穿透率和开口率。
【附图说明】
图1是本发明优选实施例的液晶显示面板的剖视图；
图2是本发明液晶显示面板中第一实施例的像素结构的示意图；
图3是图2所示液晶显示面板中一个像素单元的结构示意图；
图4是本发明液晶显示面板中第二实施例的像素结构的一个像素单元的结构示意图；
图5是本发明液晶显示面板中第三实施例的像素结构的一个像素单元的结构示意图。
【具体实施方式】
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，本发明以下所描述的实施例仅仅是本发明的一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其它实施例，都属于本发明保护的范围。
图1是本发明优选实施例的液晶显示面板的剖视图，图2是图1所示液晶显示面板的像素结构的示意图。请参阅图1和图2所示，液晶显示面板10包括第一基板11、第二基板12和夹设于两者之间的液晶层13，其中第一基板11和第二基板12相对间隔设置，第二基板12为CF(Color Filter，彩色滤光片)彩膜基板，第一基板11为TFT(Thin Film Transistor，薄膜晶体管)阵列基板，其包括透明基体以及设置于该透明基体上的各种配线和像素电极等。具体地，
第一基板11包括多条数据线D1，D2，…，DN、沿垂直于数据线方向设置的多条扫描线G1，G2，…，GL、以及由多条扫描线G1，G2，…，GL和多条数据线D1，D2，…，DN定义的多个像素单元P1，P2，…，PX，每一像素单元对应连接一条扫描线和一条数据线。
其中，多条扫描线G1，G2，…，GL连接于栅极驱动器21，多条数据线D1，D2，…，DN连接于源极驱动器22。栅极驱动器21用于为多个像素单元P1，P2，…，PX提供扫描电压，源极驱动器22用于为多个像素单元P1，P2，…，PX提供驱动电压。
图3是图2所示液晶显示面板10中一个像素单元的结构示意图。请结合图3所示，液晶显示面板10的一个像素单元30的像素电极对应连接一条扫描线31和一条数据线32，像素单元30的像素电极包括多个条状的第一电极图案33、多个条状的(ITO)间隙34、第二电极图案35以及第三电极图案36，其中：
第二电极图案35限定像素单元30的开口面积，两个条状的第三电极图案36垂直以呈十字形设置，将每一像素单元30的像素电极定义为第一区域O1、第二区域O2、第三区域O3和第四区域O4。条状的第二电极图案35环绕第一区域O1、第二区域O2、第三区域O3和第四区域O4，使像素单元30的像素电极整体呈矩形设置。
位于左上方的第一区域O1与位于右上方的第二区域O2在同一水平方向上并排设置，位于右下方的第四区域O4与第一区域O1对角设置，位于左下方的第三区域O3与第二区域O2对角设置，且优选第一区域O1、第二区域O2、第三区域O3和第四区域O4的面积相等。
进一步地，第一区域O1的第一电极图案33与第四区域O4的第一电极图案33的走向相同，例如为图3中所示的第一方向D1；第二区域O2的第一电极图案33与第三区域O3的第一电极图案33的走向相同，例如为图3中所示的第二方向D2，优选第一方向D1与第二方向D2相互垂直。在本实施例中，第一方向D1可以为与水平正方向呈45°夹角的方向，对应地第二方向D2可以为与水平正方向呈45°夹角的方向，其中水平正方向表示沿与扫描线31所在方向平行且从第一区域O1朝向第二区域O2或第三区域O3朝向第四区域O4的方向。
在像素单元30中，数据线32对应设置于第一区域O1与第二区域O2之间，以及第三区域O3和第四区域O4之间，即与沿第二方向D2走向的第三电极图案36相对应，且绝缘设置于其下方。
本实施例将数据线32对应设置于每一像素单元30的像素电极的多个区域之间，使得不透光的数据线32与显示时对应出现在多个区域(第一区域O1和第二区域O2以及第三区域O3和第四区域O4)之间的暗纹相重叠，相当于减小了数据线32对应的遮光面积，增加了数据线32对应的透光区域，从而能够提高像素单元30以及具有该像素单元30的液晶显示面板10的穿透率和开口率。
基于上述首要发明目的，本发明的其它实施例可以设置液晶显示面板10的每一像素单元具有其他像素结构，例如：
如图4所示，每一像素单元40的像素电极包括八个区域，对于本实施例的像素结构，像素电极对应连接一条数据线41。
如图5所示，每一像素单元50的像素电极包括十六个区域，对于本实施例的像素结构，每一像素单元50的像素电极对应连接三条数据线51，对应设置于沿重力方向排布的多个区域之间。
需要说明的是，本发明实施例中相邻两条数据线之间的距离可以相同也可以不相同；沿重力方向，像素电极的各区域的高度L可以相等也可以 不相等；沿垂直于数据线的延伸方向，像素电极的各区域的宽度H可以相等也可以不相等；像素电极对应连接的扫描线可以为一条也可以为多条，扫描线的数量以及各个区域的电极图案的走向可根据与像素电极电连接的薄膜晶体管的结构以及数量而定。
综上所述，本发明实施例设计每一像素单元的像素电极对应连接至少一条数据线，每一像素单元的像素电极包括呈矩阵分布的多个区域，并且数据线对应设置于相邻两排的区域之间，使得不透光的数据线与显示时对应出现于多个区域之间的暗纹相重叠，相当于减小了数据线对应的遮光面积，增加了数据线对应的透光区域，从而能够提高像素单元的穿透率和开口率。
再次说明，以上所述仅为本发明的实施例，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，例如各实施例之间技术特征的相互结合，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (19)

  1. 一种阵列基板，所述阵列基板包括多个像素单元，其中，每一所述像素单元的像素电极对应连接一条扫描线和至少两条数据线，每一所述像素单元的像素电极包括呈矩阵分布的多个区域，其中，在每一所述像素单元中，相邻两条所述数据线之间的距离不相同，所述数据线对应设置于相邻两排的所述区域之间，且沿重力方向，所述像素电极的各区域的高度不相等，沿垂直于所述数据线的延伸方向，所述像素电极的各区域的宽度相等。
  2. 一种阵列基板，所述阵列基板包括多个像素单元，其中，每一所述像素单元的像素电极对应连接至少一条数据线，每一所述像素单元的像素电极包括呈矩阵分布的多个区域，其中，所述数据线对应设置于相邻两排的所述区域之间。
  3. 根据权利要求2所述的阵列基板，其中，每一所述像素单元的像素电极对应连接一条所述数据线，每一所述像素单元的像素电极包括第一区域、第二区域、第三区域和第四区域，所述第一区域与所述第二区域并排设置，所述第一区域与所述第四区域对角设置，所述第二区域与所述第三区域对角设置，所述数据线对应设置于所述第一区域与所述第二区域之间，以及所述第三区域和所述第四区域之间。
  4. 根据权利要求3所述的阵列基板，其中，所述第一区域的电极图案与所述第四区域的电极图案的电极走向相同，所述第二区域的电极图案与所述第三区域的电极图案的电极走向相同。
  5. 根据权利要求3所述的阵列基板，其中，所述第一区域的电极图案与所述第四区域的电极图案的电极走向呈第一方向，所述第二区域的电极图案与所述第三区域的电极图案的电极走向呈第二方向，且所述第一方向与所述第二方向相互垂直。
  6. 根据权利要求3所述的阵列基板，其中，所述第一区域、所述第二区域、所述第三区域和所述第四区域的面积相等。
  7. 根据权利要求3所述的阵列基板，其中，每一所述像素电极包括多个条状的间隙、多个条状的第一电极图案以及第二电极图案和第三电极图 案，所述间隙与所述第一电极图案交错设置，所述第二电极图案环绕所述第一区域、所述第二区域、所述第三区域和所述第四区域设置，所述第三电极图案用于定义所述第一区域、所述第二区域、所述第三区域和所述第四区域。
  8. 根据权利要求2所述的阵列基板，其中，每一所述像素单元的像素电极对应连接至少两条所述数据线，沿重力方向，所述像素电极的各区域的高度不相等，且沿垂直于所述数据线的延伸方向，所述像素电极的各区域的宽度相等。
  9. 根据权利要求2所述的阵列基板，其中，在每一所述像素单元中，相邻两条所述数据线之间的距离不相同。
  10. 根据权利要求2所述的阵列基板，其中，每一所述像素单元的像素电极对应连接一条扫描线。
  11. 一种液晶显示面板，其中，所述液晶显示面板包括液晶层、彩色滤光片基板以及阵列基板，所述彩色滤光片基板和所述阵列基板相对间隔设置，所述液晶层填充于所述彩色滤光片基板和所述阵列基板之间，所述阵列基板包括多个像素单元，每一所述像素单元的像素电极对应连接至少一条数据线，每一所述像素单元的像素电极包括呈矩阵分布的多个区域，其中，所述数据线对应设置于相邻两排的所述区域之间。
  12. 根据权利要求11所述的液晶显示面板，其中，每一所述像素单元的像素电极对应连接一条所述数据线，每一所述像素单元的像素电极包括第一区域、第二区域、第三区域和第四区域，所述第一区域与所述第二区域并排设置，所述第一区域与所述第四区域对角设置，所述第二区域与所述第三区域对角设置，所述数据线对应设置于所述第一区域与所述第二区域之间，以及所述第三区域和所述第四区域之间。
  13. 根据权利要求12所述的液晶显示面板，其中，所述第一区域的电极图案与所述第四区域的电极图案的电极走向相同，所述第二区域的电极图案与所述第三区域的电极图案的电极走向相同。
  14. 根据权利要求12所述的液晶显示面板，其中，所述第一区域的电极图案与所述第四区域的电极图案的电极走向呈第一方向，所述第二区域的电极图案与所述第三区域的电极图案的电极走向呈第二方向，且所述第 一方向与所述第二方向相互垂直。
  15. 根据权利要求12所述的液晶显示面板，其中，所述第一区域、所述第二区域、所述第三区域和所述第四区域的面积相等。
  16. 根据权利要求12所述的液晶显示面板，其中，每一所述像素电极包括多个条状的间隙、多个条状的第一电极图案以及第二电极图案和第三电极图案，所述间隙与所述第一电极图案交错设置，所述第二电极图案环绕所述第一区域、所述第二区域、所述第三区域和所述第四区域设置，所述第三电极图案用于定义所述第一区域、所述第二区域、所述第三区域和所述第四区域。
  17. 根据权利要求11所述的液晶显示面板，其中，每一所述像素单元的像素电极对应连接至少两条所述数据线，沿重力方向，所述像素电极的各区域的高度不相等，且沿垂直于所述数据线的延伸方向，所述像素电极的各区域的宽度相等。
  18. 根据权利要求11所述的液晶显示面板，其中，在每一所述像素单元中，相邻两条所述数据线之间的距离不相同。
  19. 根据权利要求11所述的液晶显示面板，其中，每一所述像素单元的像素电极对应连接一条扫描线。
PCT/CN2014/091895 2014-11-18 2014-11-21 液晶显示面板及其阵列基板 Ceased WO2016078080A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US14/426,363 US20160139474A1 (en) 2014-11-18 2014-11-21 Liquid crystal display panel and array substrate

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201410659998.6A CN104360554B (zh) 2014-11-18 2014-11-18 液晶显示面板及其阵列基板
CN201410659998.6 2014-11-18

Publications (1)

Publication Number Publication Date
WO2016078080A1 true WO2016078080A1 (zh) 2016-05-26

Family

ID=52527830

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2014/091895 Ceased WO2016078080A1 (zh) 2014-11-18 2014-11-21 液晶显示面板及其阵列基板

Country Status (2)

Country Link
CN (1) CN104360554B (zh)
WO (1) WO2016078080A1 (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104880866B (zh) * 2015-05-12 2018-02-27 深圳市华星光电技术有限公司 显示面板及薄膜晶体管阵列基板
CN110928089B (zh) * 2019-12-09 2021-07-27 苏州华星光电技术有限公司 阵列基板及液晶显示面板

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101359141A (zh) * 2007-08-01 2009-02-04 三星电子株式会社 显示装置
CN102402078A (zh) * 2010-09-13 2012-04-04 群康科技(深圳)有限公司 液晶显示结构
US20120236245A1 (en) * 2011-03-14 2012-09-20 Samsung Electronics Co., Ltd. Liquid crystal display
CN103323992A (zh) * 2013-01-22 2013-09-25 友达光电股份有限公司 像素阵列基板及液晶显示面板
US20140043571A1 (en) * 2012-08-07 2014-02-13 Samsung Display Co., Ltd. Liquid crystal display

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI367380B (en) * 2007-11-28 2012-07-01 Au Optronics Corp Liquid crystal display element and pixel structure
US9354479B2 (en) * 2011-10-27 2016-05-31 Sharp Kabushiki Kaisha Liquid-crystal panel and manufacturing method thereof

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101359141A (zh) * 2007-08-01 2009-02-04 三星电子株式会社 显示装置
CN102402078A (zh) * 2010-09-13 2012-04-04 群康科技(深圳)有限公司 液晶显示结构
US20120236245A1 (en) * 2011-03-14 2012-09-20 Samsung Electronics Co., Ltd. Liquid crystal display
US20140043571A1 (en) * 2012-08-07 2014-02-13 Samsung Display Co., Ltd. Liquid crystal display
CN103323992A (zh) * 2013-01-22 2013-09-25 友达光电股份有限公司 像素阵列基板及液晶显示面板

Also Published As

Publication number Publication date
CN104360554B (zh) 2017-07-07
CN104360554A (zh) 2015-02-18

Similar Documents

Publication Publication Date Title
US10013938B2 (en) Display panel and display device, and fabrication method thereof
CN103048838B (zh) 一种阵列基板、液晶显示面板及驱动方法
US20120033149A1 (en) Array substrate, liquid crystal panel and liquid crystal display
CN102854674A (zh) 一种显示面板及液晶显示装置
US9772522B2 (en) Curved display device
WO2016107098A1 (zh) 触控基板以及触控装置
WO2019071813A1 (zh) 阵列基板及其应用的显示装置
TWI631402B (zh) 陣列基板與顯示面板
CN104880852A (zh) 一种阵列基板及其制备方法、显示面板和显示装置
JP2020523637A (ja) インセルタッチパネル
CN103728801A (zh) 像素结构及具有该像素结构的液晶显示面板
CN102629047B (zh) 像素单元、阵列基板、液晶面板及显示设备
CN107407843B (zh) 液晶显示装置
CN105319784B (zh) 显示面板
CN102834772A (zh) 液晶显示装置
WO2016194269A1 (ja) 液晶表示装置
CN102778797A (zh) 一种阵列基板及液晶显示面板
US9558697B2 (en) Display device driving sub-pixels of a plurality of colors
WO2016078080A1 (zh) 液晶显示面板及其阵列基板
CN104267549B (zh) 液晶显示面板及其阵列基板
CN104166283B (zh) 液晶显示面板及其阵列基板
WO2017124790A1 (zh) 像素结构、显示面板及显示装置
US8976329B2 (en) Array substrate and LCD panel
WO2016194270A1 (ja) 液晶表示装置
WO2016090657A1 (zh) 液晶显示器及其阵列基板

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 14426363

Country of ref document: US

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 14906295

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 14906295

Country of ref document: EP

Kind code of ref document: A1