WO2016056061A1 - Storage device, computer, and computer system - Google Patents

Storage device, computer, and computer system Download PDF

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Publication number
WO2016056061A1
WO2016056061A1 PCT/JP2014/076786 JP2014076786W WO2016056061A1 WO 2016056061 A1 WO2016056061 A1 WO 2016056061A1 JP 2014076786 W JP2014076786 W JP 2014076786W WO 2016056061 A1 WO2016056061 A1 WO 2016056061A1
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area
server
storage
computer
cache
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PCT/JP2014/076786
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French (fr)
Japanese (ja)
Inventor
智広 西本
義仁 中川
晋太郎 工藤
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株式会社日立製作所
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Priority to PCT/JP2014/076786 priority Critical patent/WO2016056061A1/en
Publication of WO2016056061A1 publication Critical patent/WO2016056061A1/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers

Definitions

  • the present invention generally relates to control of memory in at least one of a storage device and a computer.
  • a storage device has a cache memory in addition to a nonvolatile storage device, and stores I / O target data in accordance with an I / O (Input / Output) request from a computer in a temporary memory.
  • the storage apparatus has two controllers each including a cache memory, and one controller uses the cache memory in the other controller as its own cache memory.
  • the storage device has a second cache memory, and is an address space of a logical cache memory of a computer having the first cache memory. Allocate at least a part of the second cache memory. A set of one or more areas assigned to the logical address space in the second cache memory is a shared area accessible by both the computer and the storage apparatus.
  • the cache memory of the storage device can be handled as the cache memory of the computer itself. Further, the capacity of the cache memory of the computer can be increased without increasing the cache memory of the computer, and improvement of the computer performance can be expected.
  • FIG. 1 shows a configuration example of an information processing system according to an embodiment.
  • the example of a software configuration of a server module is shown.
  • the example of a software configuration of a storage module is shown.
  • the structural example of a logical address space is shown.
  • the structural example of a 1st management table is shown.
  • the structural example of a 2nd management table is shown.
  • the structural example of a 3rd management table is shown.
  • An example of the flow of a server module load acquisition process is shown.
  • a part of an example of the flow of a shared area size change process is shown.
  • the remainder of an example of the flow of a shared area size change process is shown.
  • An example of the flow of a server data read process is shown.
  • An example of the flow of a server data write process is shown.
  • server module 200 a common code among the reference codes is used (for example, described as “server module 200”), and the same type of elements are distinguished and described. Reference numerals are used (for example, described as “server module 200-1”).
  • the storage module 300-1 has a cache memory (hereinafter referred to as storage CM) 331, and the logical address space 490 (address space of the logical cache memory) of the server module 200-1 having the cache memory (hereinafter referred to as server CM) 221. And at least a part of the storage CM 331 is allocated to an address space to which at least a part of the server CM 221 is allocated.
  • a set of one or more areas allocated to the logical address space 490 in the storage CM 331 is a shared area 413P accessible by both the server module 200-1 and the storage module 300-1.
  • the presence of the shared area 413P increases the cache memory capacity that can be used by the server processor 210.
  • the shared area 413P can be used by the server processor 210 for data caches and programs, so that processing for reusing the server CM 221 becomes unnecessary, and an improvement in the performance of the server module 200-1 is expected. it can.
  • FIG. 1 shows a configuration example of an information processing system according to an embodiment.
  • the information processing system includes a computer system 100, a server module 200, and a storage module 300.
  • the computer system 100 includes a plurality (or one) of server modules 200, one (or a plurality of) storage modules 300, and a backplane 400.
  • the computer system 100 includes two server modules 200-1 and 200-2 as the server module 200 and one storage module 300-1 as the storage module 300.
  • the server module 200 and the storage module 300 the server module 200-1 and the storage module 300-1 in the computer system 100 are taken as representative examples.
  • the server module 200-1 described below can be applied to another server module 200-2 in the computer system 100, or can be applied to a server module 200-3 outside the computer system 100.
  • the storage module 300-1 described below can also be applied to the storage module 300-2 outside the computer system 100.
  • the server module 200-1 is an example of a computer
  • the storage module 300-1 is an example of a storage device.
  • the server module 200-1 is a computer that executes a predetermined job.
  • the storage module 300-1 is a storage device that stores data used by the server module 200-1.
  • the storage module 300-1 provides one or more LUs (Logical Units) to the server modules 200-1 and 200-2.
  • An LU is a logical storage device.
  • the LU may be a virtual LU, for example, an LU according to Thin Provisioning, or an LU to which a storage resource of an external storage (not shown) is allocated (for example, an LU according to storage virtualization technology).
  • the server module 200-1 includes a processor (hereinafter referred to as server processor) 210, a memory (hereinafter referred to as server memory) 220, a transfer module 230, an HBA (Host Bus Adapter) 240, a NIC (Network Interface Card) 250, and an I / F ( Communication interface device) 260.
  • the components included in the server module 200-1 are connected to each other via an I / O bus.
  • the I / O bus may include a PCI (Peripheral Components Interconnect) bus, a PCIe (PCI-Express) bus, a system bus, and the like.
  • the server processor 210 executes a program stored in the server memory 220.
  • the server processor 210 executes a program stored in the server memory 220, the function of the server module 200-1 can be realized.
  • the server memory 220 is a physical memory, and stores a program executed by the server processor 210 and information necessary for executing the program.
  • the program and information stored in the server memory 220 may be stored in an LU or the like provided by the storage module 300-1.
  • the server processor 210 can acquire a program and information from a storage area in which a program such as an LU is stored, and can load the acquired program and information into the server memory 220.
  • the server memory 220 includes a cache memory (hereinafter, server CM) 221 in which data input / output by the server processor 210 is temporarily stored.
  • server CM cache memory
  • the transfer module 230 controls data transfer between the server module 200-1 and the storage module 300-1.
  • the HBA 240 is an interface for connecting to an external device via a network such as a SAN (Storage Area Network).
  • the NIC 250 is an interface for connecting to an external device via a network such as a LAN (Local Area Network).
  • the I / F 260 is a connector for connecting to the backplane 400.
  • the I / F 260 is, for example, an NTB (Non Transparent Bridge).
  • NTB is an example of a memory allocation providing device.
  • the “memory allocation providing device” in the present embodiment refers to at least a part of the physical memory of the second device of the first and second devices connected to the memory allocation providing device as a logical address of the first device.
  • the storage module 300-1 can store the memory 330 in the storage module 300-1 in the logical address space of the server module 200-1. At least some of them can be assigned.
  • the storage module 300-1 includes a storage controller 310 (310-1 and 310-2), a TBA (Target Bus Adapter) 350, an I / F 360 (360-1 and 360-2), and a storage device 370 (370-1, 370-2, ).
  • the components included in the storage module 300-1 are connected to each other via an I / O bus.
  • the I / O bus may include a PCI bus, a PCIe bus, a SAS (Serial Attached SCSI) interface, a system bus, and the like.
  • the storage module 300-1 has two storage controllers 310-1 and 310-2. This is to improve fault tolerance by making the storage controller redundant.
  • the storage controller 310-1 is taken as a representative example.
  • the storage controller 310-1 described below can be applied to another storage controller 310-2.
  • the storage controller 310-1 controls the storage area and controls the correspondence between the server modules 200-1 and 200-2 and the storage area.
  • the storage controller 310 includes a processor (hereinafter referred to as storage processor) 320 and a memory (hereinafter referred to as storage memory) 330.
  • the storage controller 310-1 is connected to the I / F 360-1, and the storage controller 310-2 is connected to the I / F 360-2.
  • the storage controllers 310-1 and 310-2 are connected to the TBA 350 and the storage devices 370 (370-1, 370-2,%), Respectively.
  • the storage processor 320 executes a program stored in the storage memory 330.
  • the storage processor 320 executes a program stored in the storage memory 330, the function of the storage module 300-1 can be realized.
  • the storage memory 330 is a physical memory, and stores a program executed by the storage processor 320 and information necessary for executing the program.
  • the program and information stored in the storage memory 330 may be stored in the storage device 370 or the like.
  • the storage processor 320 can acquire the program and information from the storage device 370 and the like, and can load the acquired program and information into the storage memory 330.
  • the storage memory 330 includes a cache memory (hereinafter referred to as storage CM) 331 in which data input / output to / from the storage device 370 is temporarily stored by the storage processor 320.
  • storage CM cache memory
  • TBA350 is an interface for connecting to an external device via a network such as SAN.
  • the I / F 360 is a connector for connecting to the backplane 400.
  • the I / F 360 is, for example, NTB.
  • the storage device 370 is a physical storage device (typically a nonvolatile storage device) for storing data.
  • a physical storage device typically a nonvolatile storage device
  • an HDD Hard Disk Drive
  • an SSD Solid State Drive
  • the storage module 300-1 generates an LU from a RAID (Redundant Arrays of Inexpensive (or Independent) Disks group configured by a plurality of storage devices 370, and further provides the LU to the server module 200-1. can do.
  • the backplane 400 connects the server modules 200-1 and 200-2 and the storage module 300-1.
  • the backplane 400 includes a plurality of I / Fs 410 (410-1 to 410-4) for connecting the server modules 200-1 and 200-2 and the storage module 300-1. Further, the backplane 400 has an I / O bus that connects each I / F 410.
  • the backplane 400 is, for example, an ASIC (Application Specific Integrated Circuit).
  • the server module 200-1 of the computer system 100 and the backplane 400 are connected via two connection lines.
  • the server module 200-1 is connected to the I / F 360-1 and I / F 360-2 of the storage module 300-1 via the two connection lines.
  • Each I / F 360 of the storage module 300-1 is configured to be connected to a different storage controller 310-2, the I / F 360-1 is connected to the storage controller 310-1, and the I / F 360-2 is It is connected to the storage controller 310-2. Therefore, the server module 200-1 is connected to the two storage controllers 310-1 and 310-2.
  • the two storage controllers 310-1 and 310-2 are both active. Therefore, the processing performance is improved by each of the two storage controllers 310-1 and 310-2 executing the I / O processing. Further, even if a failure occurs in the storage controller 310-1, the storage controller 310-2 can continue the I / O processing.
  • connection between the server module 200-1 and the storage module 300-1 is a connection by the backplane 400, and can be accessed at a higher speed than the network connection of the SAN 500 or the like.
  • the server module 200-1 has a root complex
  • the storage module 300-1 also has a root complex
  • the backplane 400 may be an end point of those root complexes.
  • the backplane 400 has a DMAC (Direct Memory Access Controller), and may transfer data between the server CM 221 and the storage CM 331 by DMA.
  • the DMAC may exist in each of the server module 200-1 and the storage module 300-1 instead of or in addition to the backplane 400.
  • the server modules 200-1 and 200-2 in the computer system 100 may be connected to the external server module 200-3 via the LAN 600, and may be connected to the external storage module 300-2 via the SAN 500. .
  • the storage module 300-1 in the computer system 100 may be connected to an external server module 200-3 via the SAN 500.
  • FIG. 2 shows a software configuration example of the server module 200-1.
  • the server memory 220 stores an OS (Operating System) 221 and an application 224.
  • the application 224 executes a predetermined job.
  • the OS 221 manages the server module 200-1.
  • the OS 221 includes a server memory control unit 222 that controls the server memory 220 and a server I / O control unit 223 that controls I / O of the server module 200-1.
  • Each of the server memory control unit 222 and the server I / O control unit 223 may exist as a module independent from the OS 221 or may be incorporated in the application 224.
  • At least one of the server memory control unit 222 and the server I / O control unit 223 may be divided into a plurality of components, and the server memory control unit 222 and the server I / O control unit 223 are configured as one component. It may be integrated.
  • FIG. 3 shows a software configuration example of the storage module 300-1.
  • the storage memory 330 stores an OS (Operating System) 321 and an application 324.
  • the application 324 executes a predetermined job.
  • the OS 321 manages the storage module 300-1.
  • the OS 321 includes a storage memory control unit 322 that controls the storage memory 330 and a storage I / O control unit 323 that controls I / O of the storage module 300-1.
  • Each of the storage memory control unit 322 and the storage I / O control unit 323 may exist as a module independent of the OS 321 or may be incorporated in the application 324.
  • At least one of the storage memory control unit 322 and the storage I / O control unit 323 may be divided into a plurality of components, and the storage memory control unit 322 and the storage I / O control unit 323 are configured as one component. It may be integrated.
  • FIG. 4 shows a configuration example of the logical address space.
  • the logical address space 490 is a cache memory address space recognized by the server processor 210.
  • the cache memory recognized by the server processor 210 is a logical cache memory, and is an example of a logical memory.
  • At least a part of the server memory 220 and at least a part of the storage memory 330 are allocated to the logical address space 490.
  • at least a part of the server CM 221 and at least a part of the storage CM 331 are allocated to the logical address space 490.
  • the logical address space 490 includes a server area 411L, a storage area 412L, a shared area 413L, and an unmounted area 414L.
  • the server area 411L is an area in the logical cache memory, and is an address range to which at least a part of the server CM 221 is allocated.
  • the server area 411L is a dedicated area for the server processor 210. That is, the server area 411L is an area that the server processor 210 can access and the storage processor 320 cannot access.
  • the storage area 412L is an area in the logical cache memory, and is an address range to which at least a part of the storage CM 331 is allocated.
  • the area in the storage CM 331 allocated as the storage area 412L is a dedicated area 412P of the storage processor 320. That is, the storage area 412L is an area that the server processor 210 cannot access and the storage processor 320 can access.
  • the shared area 413L is an area in the logical cache memory, and is an address range to which a part of the storage CM 331 is allocated.
  • the area in the storage CM 331 allocated as the shared area 413L is the shared area 413P of the server processor 210 and the storage processor 320. That is, the shared area 413L is an area accessible by both the server processor 210 and the storage processor 320.
  • the size of the shared area 413L (413P) is variable, and the minimum value of the size of the shared area 413L (413P) may be 0 (that is, there is no shared area 413L (413P)).
  • the server processor 210 can distinguish between the server area 411L and the shared area 413L, and therefore can select whether to use the server area 411L or the shared area 413L.
  • the unmounted area 414L is an area in the logical cache memory, and is an address range to which neither the server CM 221 nor the storage CM 331 is allocated.
  • the unmounted area 414L is an area accessible by the server processor 210.
  • the unmounted area 414L is assigned to at least a part of the added CM (cache memory). Since the unmounted area 414L is prepared in advance, the address range accessible to the server processor 210 can be increased without rebooting the server module 200-1.
  • the storage processor 320 can properly use the dedicated area 412P and the shared area 413P as follows.
  • the storage processor 320 may store data input / output to / from the LU (for example, the storage device 370) in the dedicated area 412P.
  • the storage processor 320 temporarily stores data in the dedicated area 412P without writing (destaged) data from the shared area 413P to the LU or reading data directly from the LU to the shared area 413P. Good.
  • Data to be written in accordance with a write request from the server processor 210 is written to the shared area 413P as a cache operation by the server processor 210, and the storage processor 320 copies the data to be written from the shared area 413P to the dedicated area 412P ( At that time, the write target data may be duplicated in the dedicated area 412P), and then the write target data may be written from the dedicated area 412P to the LU (for example, the storage device 370) at an arbitrary timing. Further, the storage processor 320 temporarily stores data to be read in accordance with the read request from the server processor 210 in the dedicated area 412P, and then copies the data to be read from the dedicated area 412P to the shared area 413P or the server CM 221. By doing so, the data to be read may be provided to the server module 200-1. That is, the shared area 413P is provided only as an extension area of the server CM 221 and may not be used as one of the dedicated areas used by the storage processor 320.
  • the first management table 421 and the second management table 422 are prepared in the shared area 413P by the storage processor 320. These tables 421 and 422 are accessible by both the server processor 210 and the storage processor 320.
  • the third management table 423 is prepared by the storage processor 320 in the dedicated area 412P.
  • the first to third management tables 421 to 423 will be described with reference to FIGS. Note that at least one of the first to third management tables 421 to 423 may be information in a format other than the table.
  • FIG. 5 shows a configuration example of the first management table 421.
  • the first management table 421 represents information related to the shared area 413L (413P).
  • the first management table 421 includes a lock flag 501, a shared area position 502, and a valid flag 503.
  • the lock flag 501 indicates whether or not the lock of the shared area 413L (413P) has been acquired, and who has acquired the lock of the shared area 413L (413P) if the lock has been acquired.
  • SE means that the server module 200-1 has acquired the lock
  • ST means that the storage module 300-1 has already acquired the lock
  • 00 indicates that the lock has been acquired. Means that has not been acquired.
  • the shared area position 502 represents one or a plurality of address ranges constituting the shared area 413P.
  • the valid flag 503 indicates whether the shared area 413L (413P) is valid or invalid.
  • An example in which the shared area 413L (413P) is invalid is a failure.
  • FIG. 6 shows a configuration example of the second management table 422.
  • the second management table 422 represents information regarding the capacity of the server CM 221 and the load of the server module 200-1.
  • the first management table 421 has a server CM capacity 601 and a server processor usage rate 602.
  • the server CM capacity 601 represents the capacity of the server CM 221.
  • the server processor usage rate 602 represents the usage rate of the server processor 210 (an example of the load of the server module 200-1).
  • FIG. 7 shows a configuration example of the third management table 423.
  • the third management table 423 is information that is referenced only by the storage processor 320, and is therefore arranged in the dedicated area 412P.
  • the third management table 423 is a value calculated by the storage processor 320 and represents information related to the load of at least one of the server module 200-1 and the storage module 300-1.
  • the third management table 423 includes a server processor usage rate average value 701, a write rate average value 702, an I / O frequency average value 703, a storage processor usage rate average value 704, and a storage CM configuration 705.
  • the server processor usage rate average value 701 represents an average value of one or more server processor usage rates acquired from the server module 200-1.
  • the write ratio average value 702 represents an average value of one or more write ratios (write ratios of accesses to the storage CM 331) measured in the storage module 300-1.
  • the I / O frequency average value 703 is one or more I / O frequencies measured by the storage module 300-1 (the number of I / O requests received per unit time (for example, 1 second) from the server module 200-1).
  • the storage processor usage rate average value 704 represents an average value of one or more storage processor usage rates measured in the storage module 300-1.
  • the storage CM configuration 705 represents information related to the configuration of the storage CM 331, and includes, for example, information indicating the capacity of the shared area 413P and the allocation address range (address range in the logical address space) of the shared area 413P.
  • server cache hit miss ratio is a ratio at which a server cache hit miss has occurred in the server module 200-1.
  • server cache hit miss means that the read target data does not exist in the server area 411L (and the shared area 413L), and the temporary storage destination of the write target data is secured from the shared area 413L (and the server area 411L). It can't be done.
  • a server data read process which will be described later, reserves a temporary area for the server processor 210 preferentially from the server area 411L over the shared area 413L, and a server data write process performs a shared area 413L over the server area 411L.
  • the temporary area for the server processor 210 is secured with priority.
  • the “server data” is data input / output to / from the LU recognized by the server module 200-1, for example, data used by the application 224 of the server module 200-1.
  • all values are “average values”, but instead of or in addition to the average values, values other than the average value based on a plurality of values may be used, or the maximum of the plurality of values It may be a value or a minimum value.
  • the first to third management tables 421 to 423 have been described above. However, these tables 421 to 423 may be divided into more tables and managed, or may be managed by being aggregated into fewer tables. Also good.
  • both the server processor 210 and the storage processor 320 are set to turn on the lock flag 501 when accessing the shared area 413P, and the lock flag 501 has already been turned on by another person. If it is, access to the shared area 413P is put on hold until the value of the lock flag 501 is turned off.
  • FIG. 8 shows an example of the flow of server module load acquisition processing.
  • the server processor 210 repeatedly measures the server processor usage rate (for example, periodically) and stores the measured load in the server memory 220. Accordingly, it is assumed that the server memory usage rate measured by the server processor 210 is stored in the server memory 220.
  • the storage processor 320 When acquiring the server module load from the server module 200-1 for the first time, the storage processor 320 turns on the value of the lock flag 501 ("ST") (S801), and the first management table 421 with the lock flag 501 "on”. And the storage area of the second management table 422 is secured from the shared area 413P in the storage CM 331 (S802). Thereafter, the storage processor 320 turns off the value of the lock flag 501 (“00”) (S803). Then, the storage processor 320 notifies the server module 200-1 of the address of the area secured in S802 (that is, the address indicating the location where the first management table 421 and the second management table 422 exist) (S804).
  • the server processor 210 Upon receiving the notification in S804, the server processor 210 identifies the locations of the first management table 421 and the second management table 422, and turns on the value of the lock flag 501 in the first management table 421 (“SE”) ( S805).
  • the server processor 210 acquires the server processor usage rate from the server memory 220 (S806).
  • the server processor 210 writes the acquired server module load as the server processor usage rate 602 in the second management table 422 (S807), turns off the value of the lock flag 501 (S808), and writes the write completion to the storage module 300-1. Notification is made (S809).
  • the server processor usage rate may be stored in the area of the server processor usage rate 602 from the server memory 220 by DMA transfer via the backplane 400.
  • the capacity of the area in the server CM 221 allocated to the logical address space 490 as the server CM capacity 601 may be written in the second management table 422.
  • the storage processor 320 Upon receiving the notification in S809, the storage processor 320 turns on the value of the lock flag 501 (S810), acquires the server processor usage rate 602 from the second management table 422 (S811), and turns off the value of the lock flag 501. (S812).
  • the storage processor 320 updates the server processor usage rate average value 701 in the third management table 423 based on the server processor usage rate 602 acquired in S811 (S813).
  • S813 may be performed once every time S805 to S812 are performed N times (N is an integer equal to or greater than 1).
  • the storage processor 320 also repeatedly (for example, periodically) measures the storage module load (write ratio, I / O frequency, and storage processor usage rate) and stores the measured load in the storage memory 330. .
  • the storage processor 320 appropriately updates the values 702 to 705 in the third management table 423 based on the storage module load stored in the storage memory 330.
  • the shared area size change process is repeated.
  • the shared area size changing process may be started periodically or when a predetermined change event occurs.
  • the predetermined change event means that the priority of the server module 200-1 in which the above-described server cache hit miss has occurred is relatively changed (for example, another server module connected to the storage module 300-1). The priority has been changed).
  • the priority of each server module 200 connected to the storage module 300-1 may be managed, and the change of the priority of the server module 200 may be performed by the server processor 210, It may be performed by a management computer (not shown) connected to the storage module 300-1.
  • the storage processor 320 obtains the values 701 to 705 from the third management table 423, and whether or not the shared area size represented by the value 705 needs to be increased or decreased based on at least one of the values 701 to 704 Make a size change decision.
  • the storage processor 320 calculates an expanded size (capacity of a memory area newly allocated to the logical address space), and when decreasing the shared area size, the storage processor 320 reduces the reduced size (logical address space). The capacity of the memory area released from The expanded size and the reduced size are determined based on the shared area size represented by the value 705 and at least one of the values 701 to 704.
  • the predetermined size may be calculated as the expanded size, while the value 701 is the first threshold or the second threshold (The predetermined size may be calculated as the reduced size if the threshold is lower than the first threshold (that is, if the server module load is low).
  • the expansion size or the reduction size may be adjusted based on at least one of the values 702 to 704 (that is, the height of the storage module load).
  • the storage processor 320 performs expansion control (S906).
  • the extension control in S906 for example, the following processing is performed. That is, the storage processor 320 determines one or more areas corresponding to the expansion size as the allocation target area group from the dedicated area 412P. At this time, the storage processor 320 may determine the free area and the clean area as the allocation target area with priority over the dirty area. Since it is not necessary to destage the data in the free area and the clean area to the LU (for example, the storage device 370), the occurrence frequency of the destage can be suppressed.
  • the storage processor 320 may determine the dirty area as the allocation target area. When the dirty area is determined as the allocation target area, the storage processor 320 writes the data in the dirty area to the LU (for example, the storage device 370), thereby making the dirty area a clean area. Thereafter, the storage processor 320 allocates the allocation target area group to the logical address space.
  • the “dirty area” is a cache area in which data from the server processor 210 and not yet written in the LU (for example, the storage device 370) is stored, and the “clean area” is the server processor 210.
  • a cache area for example, an area in which no data is stored).
  • the storage processor 320 transmits a memory change notification to the server module 200-1 (S907).
  • the memory change notification may include, for example, information indicating allocation and an allocation destination address range (address range in the logical address space) of the allocation target area group.
  • the allocation address range is an address range that can be accessed from the server processor 210 in the address range of the storage area 412L.
  • the address of the allocation target area group may be added to the shared area position 502 of the first management table 421.
  • the server processor 210 can know the physical address of the shared area by referring to the shared area position 502.
  • the server processor 210 Upon receiving the memory change notification, the server processor 210 recognizes that the allocated address range in the memory change notification is accessible (S908), and returns a completion notification to the storage module 300-1 (S909). As a result, the server processor 210 can subsequently access the allocation address range (allocation target area group). Further, the storage processor 320 can handle the allocation target area group as a part (or all) of the shared area 413P after receiving the completion notification.
  • the storage processor 320 when the size of the shared area is reduced as a result of the size change determination (S904: Yes and S905: No), the storage processor 320 performs reduction control as shown in FIG. 10 (S1011). In the reduction control in S1011, for example, the following processing is performed. That is, the storage processor 320 determines one or more areas corresponding to the reduced size as a release target area group from the shared area 413P.
  • the storage processor 320 transmits a memory change notification to the server module 200-1 (S1012).
  • the memory change notification may include, for example, information indicating release and a release address range (address range in the logical address space of the release target area group).
  • the release address range may be an address range that cannot be accessed from the server processor 210 in the address range of the shared area 413L, or may be a reduced size.
  • the server processor 210 receives the memory change notification and performs memory control (S1013).
  • memory control for example, if the server processor 210 uses at least one area of the release target area group corresponding to the release address range in the memory change notification as a cache area, The data is saved in the server CM 221 or the storage module 300-1 (for example, a write request using the data in the cache area as the write target data is transmitted to the storage module 300-1).
  • the server processor 210 recognizes the release address range in the memory change notification as an inaccessible range.
  • the server processor 210 After S1013, the server processor 210 returns a completion notification to the storage module 300-1 (S1014). Thereby, thereafter, the server processor 210 does not access the release address range. In addition, after receiving the completion notification, the storage processor 320 can handle the release target area group as a part of the dedicated area 412P.
  • expansion (expansion size) or reduction (reduction size) of the shared area size is controlled based on at least the server module load.
  • the server processor 210 it is possible to provide the server processor 210 with a cache capacity appropriate for the server module load, and to avoid wasting a lot of area from the storage CM 331 to the logical address space. Therefore, it is possible to expect both the performance improvement of the server module 200-1 and the suppression of the performance drop of the storage module 300-1.
  • the size of the logical address space recognized by the server processor 210 is not changed, and a part of the address range of the logical address space is newly accessed from the server processor 210. Possible or inaccessible.
  • the shared area size changing process may be performed without stopping the storage module 300-1 from receiving I / O requests from the server modules 200-1 and 200-2.
  • the storage processor 320 does not select (reserve) the allocation target area group as the cache area of the storage processor 320, and sets the release target area group of the storage processor 320 until the shared area size change processing is completed.
  • the cache area may not be selected (secured).
  • FIG. 11 shows an example of the flow of server data read processing.
  • the server processor 210 performs a cache hit determination that is a determination as to whether or not the server data to be read exists in the logical cache memory (specifically, the server area 411L and the shared area 413L) (S1111).
  • the server processor 210 reads the server data to be read from the cache hit target area (server CM 221 or shared area 413P) (S1112).
  • the solid line in S1112 indicates that server data has been read from the server CM 221, and the broken line in S1112 indicates that server data has been read from the shared area 413P.
  • the server processor 210 secures a cache area as a storage area for the read target server data (S1121).
  • the server processor 210 secures the cache area preferentially from the server CM 221 (server area 411L) over the shared area 413P (413L) (the solid line in S1121 indicates priority, and the broken line in S1121 indicates non-priority. Show). This is because the read processing performance is higher when the server data to be read is cached at a location closer to the server processor 210.
  • the server processor 210 may update the count value of the number of cache hit misses, and update the cache hit miss ratio based on the updated count value.
  • the cache hit miss ratio may be an example of a server module load.
  • the server processor 210 transmits a read request to the storage module 300-1 (S1122).
  • the read request includes, for example, a read source address (for example, an LU number and an LBA (Logical Block Address) in the LU) and the address of the cache area secured in S1121.
  • a read source address for example, an LU number and an LBA (Logical Block Address) in the LU
  • LBA Logical Block Address
  • the storage processor 320 makes a cache hit determination, which is a determination as to whether or not the read-target server data exists in the dedicated area 412P (S1223).
  • the storage processor 320 transfers the server data from the cache hit target area to the cache area secured in S1121 (S1124). Specifically, for example, the storage processor 320 sets a transfer source address (address of a cache hit target area) and a transfer destination address (cache area secured in S1121) in the DMAC (not shown) of the backplane 400. The server data may be transferred from the transfer source address to the transfer destination address by DMA.
  • the storage processor 320 transmits a completion notification to the server module 200-1 (S1125). Upon receiving the completion notification, the server processor 210 reads the server data to be read from the cache area secured in S1121 (S1126).
  • the storage processor 320 reads the server data to be read from the LU (storage device 370) based on the read source address in the read request (S1131).
  • the storage processor 320 transfers the server data to the cache area secured in S1121 (S1132).
  • the storage processor 320 may secure a cache area from the dedicated area 412P and write the read server data to the secured cache area as indicated by a broken line.
  • the storage processor 320 transmits a completion notification to the server module 200-1 (S1133).
  • the server processor 210 reads server data to be read from the cache area secured in S1121 (S1134).
  • FIG. 12 shows an example of the flow of server data write processing.
  • the server processor 210 performs a cache hit determination which is a determination as to whether or not the data updated by the server data to be written exists in the logical cache memory (specifically, the server area 411L and the shared area 413L), and the cache hit A cache area is secured according to the determination result (S1201). If the result of the cache hit determination is affirmative, a cache hit target area is secured. If the result of the cache hit determination is negative, the server processor 210 preferentially secures the cache area as the storage destination area for the write target server data from the shared area 413P (413L) rather than the server CM 221 (server area 411L). (A solid line in S1201 indicates priority, and a broken line in S1201 indicates non-priority).
  • the server processor 210 may update the cache hit miss count value and update the cache hit miss ratio based on the updated count value.
  • the cache hit miss ratio may be an example of a server module load.
  • the server processor 210 writes the server data to be written into the secured cache area (S1202). If the cache area exists in the shared area 413P (413L), the server data is written to the shared area 413P (413L) (solid line), and if the cache area exists in the server CM 221 (server area 411L), the server data is stored in the server CM 221. (Dashed line). For example, DMA transfer by the DMAC of the backplane 400 may be used for writing the server data to the shared area 413P (413L).
  • the server processor 210 transmits a write request to the storage module 300-1 (S1203).
  • the write request includes, for example, a write destination address (for example, LU number and LBA in the LU) and the address of the cache area secured in S1203.
  • the storage processor 320 performs memory control (S1204).
  • the storage processor 320 makes a cache hit determination, which is a determination as to whether or not the data updated by the server data to be written exists in the dedicated area 412P. If the result of the cache hit determination is affirmative, the storage processor 320 secures a cache hit target area, and if the result of the cache hit determination is negative, the storage processor 320 secures an area from the dedicated area 412P. Two areas may be secured in the dedicated area 412P so that the server data to be written is duplicated in the dedicated area 412P. After S1204, the storage processor 320 transmits a completion notification to the server module 200-1 (S1205).
  • the server data to be written is copied from the cache area secured in S1201 to the area secured in S1204 (S1206).
  • the completion notification in S1205 may include the address of the area secured in S1204. If the cache area secured in S1201 is an area in the shared area 413P, for example, the server data is copied from the shared area 413P to the dedicated area 412P by the storage processor 320 (or the server processor 210) instructed by the server processor 210. (Solid line).
  • the cache area secured in S1201 is an area in the server CM 221
  • server data is copied from the server CM 221 to the dedicated area 412P by the storage processor 320 (or the server processor 210) that has received an instruction from the server processor 210. (Dashed line).
  • FIG. 4 shows the case of the server module 200-1 and the storage module 300-1 (case where the server module and the storage module are one-to-one) for the sake of clarity.
  • a shared area 413P may exist for each of the server modules 200-1 and 200-2 in the storage CM 331.
  • the first to third management tables 421 to 423 may also exist for each of the server modules 200-1 and 200-2.
  • the size of the shared area 413P of each of the server modules 200-1 and 200-2 is variable.
  • the storage processor 320 uses the target server based on at least one of a plurality of server module loads and a plurality of priorities (priorities of the server modules 200) respectively corresponding to the plurality of server modules 200-1 and 200-2.
  • the size of the shared area 413P corresponding to the module can be determined.
  • the storage processor 320 has a relative relationship (typically large and small) between the target load ratio (the ratio of the load of the target server module to the total of the plurality of server module loads) and the load ratio of each of the other server modules.
  • the size of the shared area for the target server module may be determined according to the relationship), and the target may be determined according to the relative relationship between the priority of the target server module and the priority of each of the other server modules.
  • the size of the shared area for the server module may be determined.
  • the load of the target server module may include a cache hit miss ratio in the target server module.
  • a physical memory area accessible from the server processor 210 may be allocated to the logical address space.
  • the logical memory may be a logical memory other than the logical cache memory, and the area allocated to the address space of the logical memory may be an area of a memory other than the cache memory instead of or in addition to the area in the cache memory. Good.

Abstract

　A storage device has a second cache memory, and allocates at least a portion of the second cache memory to a logical address space that is the address space of the logical cache memory of a computer having a first cache memory and is the address space to which at least a portion of the first cache memory is allocated. A set of one or more areas in the second cache memory that have been allocated to the logical address space is a shared area which both the computer and the storage device can access.

Description

ストレージ装置、計算機及び計算機システムStorage device, computer and computer system
　本発明は、概して、ストレージ装置及び計算機の少なくとも一方の装置内のメモリの制御に関する。 The present invention generally relates to control of memory in at least one of a storage device and a computer.
　一般に、ストレージ装置は、不揮発性の記憶装置の他に、キャッシュメモリを有し、計算機からのＩ／Ｏ（Input/Output）要求に従うＩ／Ｏ対象のデータを一時メモリに格納する。特許文献１によれば、ストレージ装置が、それぞれキャッシュメモリを備える２つのコントローラを有し、一方のコントローラが、他方のコントローラ内のキャッシュメモリを自分のキャッシュメモリとして利用する。 Generally, a storage device has a cache memory in addition to a nonvolatile storage device, and stores I / O target data in accordance with an I / O (Input / Output) request from a computer in a temporary memory. According to Patent Document 1, the storage apparatus has two controllers each including a cache memory, and one controller uses the cache memory in the other controller as its own cache memory.
US2013/0311685US2013 / 0311685
　近年の爆発的なデータ量増大に伴い、ストレージ装置の容量は増加の一途をたどっている。また、ストレージ装置に接続される計算機（典型的には、サーバのようなホスト計算機）の数も増加し、各計算機の処理負荷も増大している。特に計算機のキャッシュメモリ不足により、データの入れ替えが発生し、その負荷による処理性能低下が発生する。 With the recent explosive increase in data volume, the capacity of storage devices is steadily increasing. In addition, the number of computers (typically host computers such as servers) connected to the storage apparatus has increased, and the processing load on each computer has also increased. In particular, due to a shortage of the cache memory of the computer, data replacement occurs, and processing performance decreases due to the load.
　この問題の解決として、特許文献１のコントローラを計算機に置換することで、計算機間でキャッシュメモリを共有することが考えられる。しかし、計算機の種類が異なると互換性がなく、計算機間でキャッシュメモリを共有することは困難である。 As a solution to this problem, it is conceivable to share the cache memory between computers by replacing the controller of Patent Document 1 with a computer. However, different types of computers are not compatible, and it is difficult to share a cache memory between computers.
　ストレージ装置が、第２キャッシュメモリを有しており、第１キャッシュメモリを有する計算機の論理キャッシュメモリのアドレス空間であり前記第１キャッシュメモリの少なくとも一部が割り当てられるアドレス空間である論理アドレス空間に、第２キャッシュメモリの少なくとも一部を割り当てる。第２キャッシュメモリにおける、論理アドレス空間に割り当てられた１以上の領域の集合が、計算機とストレージ装置の両方がアクセス可能な共有領域である。 The storage device has a second cache memory, and is an address space of a logical cache memory of a computer having the first cache memory. Allocate at least a part of the second cache memory. A set of one or more areas assigned to the logical address space in the second cache memory is a shared area accessible by both the computer and the storage apparatus.
　ストレージ装置のキャッシュメモリを計算機自身のキャッシュメモリとして扱うことができる。また、計算機のキャッシュメモリを増設しなくても、計算機のキャッシュメモリの容量を大きくすることができ、計算機の性能の向上が期待できる。 The cache memory of the storage device can be handled as the cache memory of the computer itself. Further, the capacity of the cache memory of the computer can be increased without increasing the cache memory of the computer, and improvement of the computer performance can be expected.
一実施形態に係る情報処理システムの構成例を示す。1 shows a configuration example of an information processing system according to an embodiment. サーバモジュールのソフトウェア構成例を示す。The example of a software configuration of a server module is shown. ストレージモジュールのソフトウェア構成例を示す。The example of a software configuration of a storage module is shown. 論理アドレス空間の構成例を示す。The structural example of a logical address space is shown. 第１管理テーブルの構成例を示す。The structural example of a 1st management table is shown. 第２管理テーブルの構成例を示す。The structural example of a 2nd management table is shown. 第３管理テーブルの構成例を示す。The structural example of a 3rd management table is shown. サーバモジュール負荷取得処理の流れの一例を示す。An example of the flow of a server module load acquisition process is shown. 共有領域サイズ変更処理の流れの一例の一部を示す。A part of an example of the flow of a shared area size change process is shown. 共有領域サイズ変更処理の流れの一例の残りを示す。The remainder of an example of the flow of a shared area size change process is shown. サーバデータ読出し処理の流れの一例を示す。An example of the flow of a server data read process is shown. サーバデータ書込み処理の流れの一例を示す。An example of the flow of a server data write process is shown.
　一実施形態を、図面を参照して説明する。以下の説明では、同種の要素を区別しないで説明する場合には、参照符号のうちの共通符号を用い（例えば「サーバモジュール２００」と記載し）、同種の要素を区別して説明する場合には、参照符号を用いる（例えば「サーバモジュール２００－１」と記載する。 One embodiment will be described with reference to the drawings. In the following description, when a description is given without distinguishing the same type of elements, a common code among the reference codes is used (for example, described as “server module 200”), and the same type of elements are distinguished and described. Reference numerals are used (for example, described as “server module 200-1”).
　まず、図４を参照して、一実施形態の概要を説明する。 First, an outline of an embodiment will be described with reference to FIG.
　ストレージモジュール３００－１が、キャッシュメモリ（以下、ストレージＣＭ）３３１を有しており、キャッシュメモリ（以下、サーバＣＭ）２２１を有するサーバモジュール２００－１の論理アドレス空間４９０（論理キャッシュメモリのアドレス空間でありサーバＣＭ２２１の少なくとも一部が割り当てられるアドレス空間）に、ストレージＣＭ３３１の少なくとも一部を割り当てる。ストレージＣＭ３３１における、論理アドレス空間４９０に割り当てられた１以上の領域の集合が、サーバモジュール２００－１とストレージモジュール３００－１の両方がアクセス可能な共有領域４１３Ｐである。 The storage module 300-1 has a cache memory (hereinafter referred to as storage CM) 331, and the logical address space 490 (address space of the logical cache memory) of the server module 200-1 having the cache memory (hereinafter referred to as server CM) 221. And at least a part of the storage CM 331 is allocated to an address space to which at least a part of the server CM 221 is allocated. A set of one or more areas allocated to the logical address space 490 in the storage CM 331 is a shared area 413P accessible by both the server module 200-1 and the storage module 300-1.
　共有領域４１３Ｐの存在により、サーバプロセッサ２１０が使用可能なキャッシュメモリ容量が増えることになる。これにより、共有領域４１３Ｐを、サーバプロセッサ２１０が、データキャッシュ用及びプログラム用に利用可能となるので、サーバＣＭ２２１を使いまわすための処理が不要になり、サーバモジュール２００－１の性能の向上が期待できる。 The presence of the shared area 413P increases the cache memory capacity that can be used by the server processor 210. As a result, the shared area 413P can be used by the server processor 210 for data caches and programs, so that processing for reusing the server CM 221 becomes unnecessary, and an improvement in the performance of the server module 200-1 is expected. it can.
　以下、本実施形態を詳細に説明する。 Hereinafter, this embodiment will be described in detail.
　図１は、一実施形態に係る情報処理システムの構成例を示す。 FIG. 1 shows a configuration example of an information processing system according to an embodiment.
　情報処理システムは、計算機システム１００、サーバモジュール２００、及びストレージモジュール３００を有する。計算機システム１００は、複数（又は１つ）のサーバモジュール２００、１つ（又は複数）のストレージモジュール３００、及び、バックプレーン４００を有する。図１に示す例では、計算機システム１００は、サーバモジュール２００として、２つのサーバモジュール２００－１及び２００－２を有し、ストレージモジュール３００として、１つのストレージモジュール３００－１を有する。以下、サーバモジュール２００及びストレージモジュール３００として、計算機システム１００内のサーバモジュール２００－１及びストレージモジュール３００－１を代表的に例に取る。以下に説明するサーバモジュール２００－１は、計算機システム１００内の他のサーバモジュール２００－２に適用することもできるし、計算機システム１００外のサーバモジュール２００－３に適用することもできる。また、以下に説明するストレージモジュール３００－１は、計算機システム１００外のストレージモジュール３００－２に適用することもできる。サーバモジュール２００－１が、計算機の一例であり、ストレージモジュール３００－１が、ストレージ装置の一例である。 The information processing system includes a computer system 100, a server module 200, and a storage module 300. The computer system 100 includes a plurality (or one) of server modules 200, one (or a plurality of) storage modules 300, and a backplane 400. In the example illustrated in FIG. 1, the computer system 100 includes two server modules 200-1 and 200-2 as the server module 200 and one storage module 300-1 as the storage module 300. Hereinafter, as the server module 200 and the storage module 300, the server module 200-1 and the storage module 300-1 in the computer system 100 are taken as representative examples. The server module 200-1 described below can be applied to another server module 200-2 in the computer system 100, or can be applied to a server module 200-3 outside the computer system 100. Further, the storage module 300-1 described below can also be applied to the storage module 300-2 outside the computer system 100. The server module 200-1 is an example of a computer, and the storage module 300-1 is an example of a storage device.
　サーバモジュール２００－１は、所定の業務を実行する計算機である。ストレージモジュール３００－１は、サーバモジュール２００－１が利用するデータを格納するストレージ装置である。本実施形態では、ストレージモジュール３００－１は、サーバモジュール２００－１及び２００－２に１以上のＬＵ（Logical　Unit）を提供する。ＬＵは、論理的な記憶デバイスである。なお、ＬＵは、仮想的なＬＵ、例えばThin　Provisioningに従うＬＵであってもよいし、図示しない外部のストレージの記憶資源が割り当てられたＬＵ（例えばストレージ仮想化技術に従うＬＵ）でもよい。 The server module 200-1 is a computer that executes a predetermined job. The storage module 300-1 is a storage device that stores data used by the server module 200-1. In this embodiment, the storage module 300-1 provides one or more LUs (Logical Units) to the server modules 200-1 and 200-2. An LU is a logical storage device. The LU may be a virtual LU, for example, an LU according to Thin Provisioning, or an LU to which a storage resource of an external storage (not shown) is allocated (for example, an LU according to storage virtualization technology).
　サーバモジュール２００－１は、プロセッサ（以下、サーバプロセッサ）２１０、メモリ（以下、サーバメモリ）２２０、転送モジュール２３０、ＨＢＡ（Host　Bus　Adapter）２４０、ＮＩＣ（Network　Interface　Card）２５０、及びＩ／Ｆ（通信インターフェイスデバイス）２６０を有する。サーバモジュール２００－１が有する各構成は、Ｉ／Ｏバスを介して互いに接続される。Ｉ／Ｏバスには、ＰＣＩ（Peripheral　Components　Interconnect）バス、ＰＣＩｅ（PCI-Express）バス、及びシステムバス等が含まれてよい。 The server module 200-1 includes a processor (hereinafter referred to as server processor) 210, a memory (hereinafter referred to as server memory) 220, a transfer module 230, an HBA (Host Bus Adapter) 240, a NIC (Network Interface Card) 250, and an I / F ( Communication interface device) 260. The components included in the server module 200-1 are connected to each other via an I / O bus. The I / O bus may include a PCI (Peripheral Components Interconnect) bus, a PCIe (PCI-Express) bus, a system bus, and the like.
　サーバプロセッサ２１０は、サーバメモリ２２０に格納されるプログラムを実行する。サーバプロセッサ２１０がサーバメモリ２２０に格納されるプログラムを実行することによって、サーバモジュール２００－１が有する機能を実現できる。 The server processor 210 executes a program stored in the server memory 220. When the server processor 210 executes a program stored in the server memory 220, the function of the server module 200-1 can be realized.
　サーバメモリ２２０は、物理メモリであり、サーバプロセッサ２１０によって実行されるプログラム及び当該プログラムの実行に必要な情報を格納する。サーバメモリ２２０に格納されるプログラム及び情報は、ストレージモジュール３００－１によって提供されるＬＵ等に格納されてもよい。この場合、サーバプロセッサ２１０が、ＬＵ等のプログラムが格納される記憶領域からプログラム及び情報を取得し、取得されたプログラム及び情報をサーバメモリ２２０にロードすることができる。 The server memory 220 is a physical memory, and stores a program executed by the server processor 210 and information necessary for executing the program. The program and information stored in the server memory 220 may be stored in an LU or the like provided by the storage module 300-1. In this case, the server processor 210 can acquire a program and information from a storage area in which a program such as an LU is stored, and can load the acquired program and information into the server memory 220.
　サーバメモリ２２０は、サーバプロセッサ２１０により入出力されるデータが一時的に格納されるキャッシュメモリ（以下、サーバＣＭ）２２１を含む。 The server memory 220 includes a cache memory (hereinafter, server CM) 221 in which data input / output by the server processor 210 is temporarily stored.
　転送モジュール２３０は、サーバモジュール２００－１とストレージモジュール３００－１との間のデータ転送を制御する。 The transfer module 230 controls data transfer between the server module 200-1 and the storage module 300-1.
　ＨＢＡ２４０は、ＳＡＮ（Storage　Area　Network）等のネットワークを介して外部の装置と接続するためのインターフェイスである。ＮＩＣ２５０は、ＬＡＮ（Local　Area　Network）等のネットワークを介して外部の装置と接続するためのインターフェイスである。Ｉ／Ｆ２６０は、バックプレーン４００と接続するためのコネクタである。Ｉ／Ｆ２６０は、例えば、ＮＴＢ（Non　Transparent　Bridge）である。ＮＴＢは、メモリ割当て提供デバイスの一例である。本実施形態で言う「メモリ割当て提供デバイス」とは、メモリ割当て提供デバイスに接続された第１及び第２装置のうちの第２装置の物理メモリの少なくとも一部の領域を第１装置の論理アドレス空間（論理メモリのアドレス空間）に割り当てることを第２装置により行うことを可能とし第１及び第２装置の両方がその割り当てられた領域にアクセス可能にすることを第１及び第２装置に提供するデバイスである。このようなデバイスがサーバモジュール２００－１及びストレージモジュール３００－１間に介在することで、ストレージモジュール３００－１が、サーバモジュール２００－１の論理アドレス空間にストレージモジュール３００－１内のメモリ３３０のうちの少なくとも一部を割り当てることができる。 The HBA 240 is an interface for connecting to an external device via a network such as a SAN (Storage Area Network). The NIC 250 is an interface for connecting to an external device via a network such as a LAN (Local Area Network). The I / F 260 is a connector for connecting to the backplane 400. The I / F 260 is, for example, an NTB (Non Transparent Bridge). NTB is an example of a memory allocation providing device. The “memory allocation providing device” in the present embodiment refers to at least a part of the physical memory of the second device of the first and second devices connected to the memory allocation providing device as a logical address of the first device. Provides the first and second devices to allow the second device to assign to a space (logical memory address space) and to allow both the first and second devices to access the assigned area Device. Since such a device is interposed between the server module 200-1 and the storage module 300-1, the storage module 300-1 can store the memory 330 in the storage module 300-1 in the logical address space of the server module 200-1. At least some of them can be assigned.
　ストレージモジュール３００－１は、ストレージコントローラ３１０（３１０－１及び３１０－２）、ＴＢＡ（Target　Bus　Adapter）３５０、Ｉ／Ｆ３６０（３６０－１及び３６０－２）、及び記憶デバイス３７０（３７０－１、３７０－２、…）を有する。ストレージモジュール３００－１が有する各構成は、Ｉ／Ｏバスを介して互いに接続される。Ｉ／Ｏバスには、ＰＣＩバス、ＰＣＩｅバス、ＳＡＳ（Serial　Attached　SCSI）インターフェイス、及びシステムバス等が含まれてよい。 The storage module 300-1 includes a storage controller 310 (310-1 and 310-2), a TBA (Target Bus Adapter) 350, an I / F 360 (360-1 and 360-2), and a storage device 370 (370-1, 370-2, ...). The components included in the storage module 300-1 are connected to each other via an I / O bus. The I / O bus may include a PCI bus, a PCIe bus, a SAS (Serial Attached SCSI) interface, a system bus, and the like.
　本実施形態では、ストレージモジュール３００－１は、２つのストレージコントローラ３１０－１及び３１０－２を有する。これは、ストレージコントローラを冗長化することによって、耐障害性を向上させるためである。以下、ストレージコントローラ３１０－１を代表的に例に取る。以下に説明するストレージコントローラ３１０－１は、他のストレージコントローラ３１０－２に適用することができる。 In the present embodiment, the storage module 300-1 has two storage controllers 310-1 and 310-2. This is to improve fault tolerance by making the storage controller redundant. Hereinafter, the storage controller 310-1 is taken as a representative example. The storage controller 310-1 described below can be applied to another storage controller 310-2.
　ストレージコントローラ３１０－１は、記憶領域の管理、及びサーバモジュール２００－１及び２００－２と記憶領域との対応関係等を制御する。ストレージコントローラ３１０は、プロセッサ（以下、ストレージプロセッサ）３２０及びメモリ（以下、ストレージメモリ）３３０を有する。 The storage controller 310-1 controls the storage area and controls the correspondence between the server modules 200-1 and 200-2 and the storage area. The storage controller 310 includes a processor (hereinafter referred to as storage processor) 320 and a memory (hereinafter referred to as storage memory) 330.
　ストレージコントローラ３１０－１は、Ｉ／Ｆ３６０－１と接続され、ストレージコントローラ３１０－２は、Ｉ／Ｆ３６０－２と接続される。また、ストレージコントローラ３１０－１及び３１０－２は、それぞれ、ＴＢＡ３５０及び記憶デバイス３７０（３７０－１、３７０－２、…）に接続される。 The storage controller 310-1 is connected to the I / F 360-1, and the storage controller 310-2 is connected to the I / F 360-2. The storage controllers 310-1 and 310-2 are connected to the TBA 350 and the storage devices 370 (370-1, 370-2,...), Respectively.
　ストレージプロセッサ３２０は、ストレージメモリ３３０に格納されるプログラムを実行する。ストレージプロセッサ３２０がストレージメモリ３３０に格納されるプログラムを実行することによって、ストレージモジュール３００－１が有する機能を実現できる。 The storage processor 320 executes a program stored in the storage memory 330. When the storage processor 320 executes a program stored in the storage memory 330, the function of the storage module 300-1 can be realized.
　ストレージメモリ３３０は、物理メモリであり、ストレージプロセッサ３２０によって実行されるプログラム及び当該プログラムの実行に必要な情報を格納する。ストレージメモリ３３０に格納されるプログラム及び情報は、記憶デバイス３７０等に格納されてもよい。この場合、ストレージプロセッサ３２０が、記憶デバイス３７０等からプログラム及び情報を取得し、取得されたプログラム及び情報をストレージメモリ３３０にロードすることができる。 The storage memory 330 is a physical memory, and stores a program executed by the storage processor 320 and information necessary for executing the program. The program and information stored in the storage memory 330 may be stored in the storage device 370 or the like. In this case, the storage processor 320 can acquire the program and information from the storage device 370 and the like, and can load the acquired program and information into the storage memory 330.
　ストレージメモリ３３０は、記憶デバイス３７０に入出力されるデータがストレージプロセッサ３２０により一時的に格納されるキャッシュメモリ（以下、ストレージＣＭ）３３１を含む。 The storage memory 330 includes a cache memory (hereinafter referred to as storage CM) 331 in which data input / output to / from the storage device 370 is temporarily stored by the storage processor 320.
　ＴＢＡ３５０は、ＳＡＮ等のネットワークを介して外部の装置と接続するためのインターフェイスである。 TBA350 is an interface for connecting to an external device via a network such as SAN.
　Ｉ／Ｆ３６０は、バックプレーン４００と接続するためのコネクタである。Ｉ／Ｆ３６０は、例えばＮＴＢである。 The I / F 360 is a connector for connecting to the backplane 400. The I / F 360 is, for example, NTB.
　記憶デバイス３７０は、データを格納するための物理記憶デバイス（典型的には不揮発性の記憶デバイス）であり、例えば、ＨＤＤ（Hard　Disk　Drive）及びＳＳＤ（Solid　State　Drive）等が考えられる。本実施形態では、ストレージモジュール３００－１は、複数の記憶デバイス３７０により構成されたＲＡＩＤ（Redundant　Arrays　of　Inexpensive　(or　 Independent)　DisksグループからＬＵを生成し、さらに、サーバモジュール２００－１にＬＵを提供することができる。 The storage device 370 is a physical storage device (typically a nonvolatile storage device) for storing data. For example, an HDD (Hard Disk Drive), an SSD (Solid State Drive), or the like is conceivable. In this embodiment, the storage module 300-1 generates an LU from a RAID (Redundant Arrays of Inexpensive (or Independent) Disks group configured by a plurality of storage devices 370, and further provides the LU to the server module 200-1. can do.
　バックプレーン４００は、サーバモジュール２００－１、２００－２、及びストレージモジュール３００－１を接続する。バックプレーン４００は、サーバモジュール２００－１、２００－２及びストレージモジュール３００－１を接続するための複数のＩ／Ｆ４１０（４１０－１～４１０－４）を有する。また、バックプレーン４００は、各Ｉ／Ｆ４１０を接続するＩ／Ｏバスを有する。バックプレーン４００は、例えばＡＳＩＣ（Application　Specific　Integrated　Circuit）である。 The backplane 400 connects the server modules 200-1 and 200-2 and the storage module 300-1. The backplane 400 includes a plurality of I / Fs 410 (410-1 to 410-4) for connecting the server modules 200-1 and 200-2 and the storage module 300-1. Further, the backplane 400 has an I / O bus that connects each I / F 410. The backplane 400 is, for example, an ASIC (Application Specific Integrated Circuit).
　ここで、計算機システム１００における接続関係の一例を説明する。 Here, an example of a connection relationship in the computer system 100 will be described.
　計算機システム１００のサーバモジュール２００－１とバックプレーン４００との間は２つの接続線を介して接続される。サーバモジュール２００－１は、当該２つの接続線を介して、ストレージモジュール３００－１のＩ／Ｆ３６０－１及びＩ／Ｆ３６０－２にそれぞれ接続される。ストレージモジュール３００－１の各Ｉ／Ｆ３６０は、異なるストレージコントローラ３１０－２と接続されるように構成されており、Ｉ／Ｆ３６０－１はストレージコントローラ３１０－１と接続され、Ｉ／Ｆ３６０－２はストレージコントローラ３１０－２と接続される。したがって、サーバモジュール２００－１は、２つのストレージコントローラ３１０－１及び３１０－２に接続される。本実施形態では、２つのストレージコントローラ３１０－１及び３１０－２は、いずれもアクティブな状態となっている。そのため、２つのストレージコントローラ３１０－１及び３１０－２のそれぞれがＩ／Ｏ処理を実行することによって処理性能が向上する。また、ストレージコントローラ３１０－１に障害が発生した場合であっても、ストレージコントローラ３１０－２がＩ／Ｏ処理を継続することができる。 The server module 200-1 of the computer system 100 and the backplane 400 are connected via two connection lines. The server module 200-1 is connected to the I / F 360-1 and I / F 360-2 of the storage module 300-1 via the two connection lines. Each I / F 360 of the storage module 300-1 is configured to be connected to a different storage controller 310-2, the I / F 360-1 is connected to the storage controller 310-1, and the I / F 360-2 is It is connected to the storage controller 310-2. Therefore, the server module 200-1 is connected to the two storage controllers 310-1 and 310-2. In this embodiment, the two storage controllers 310-1 and 310-2 are both active. Therefore, the processing performance is improved by each of the two storage controllers 310-1 and 310-2 executing the I / O processing. Further, even if a failure occurs in the storage controller 310-1, the storage controller 310-2 can continue the I / O processing.
　このように、サーバモジュール２００－１とストレージモジュール３００－１の接続は、バックプレーン４００による接続であり、ＳＡＮ５００等のネットワーク接続と比べて高速にアクセス可能である。 As described above, the connection between the server module 200-1 and the storage module 300-1 is a connection by the backplane 400, and can be accessed at a higher speed than the network connection of the SAN 500 or the like.
　また、図示しないが、サーバモジュール２００－１はルートコンプレックスを有し、ストレージモジュール３００－１もルートコンプレックスを有し、バックプレーン４００は、それらのルートコンプレックスのエンドポイントとなってよい。バックプレーン４００は、ＤＭＡＣ（Direct　Memory　Access　Controller）を有し、サーバＣＭ２２１及びストレージＣＭ３３１間でデータをＤＭＡにより転送してよい。ＤＭＡＣは、バックプレーン４００に代えて又は加えて、サーバモジュール２００－１及びストレージモジュール３００－１の各々に存在してもよい。 Although not shown, the server module 200-1 has a root complex, the storage module 300-1 also has a root complex, and the backplane 400 may be an end point of those root complexes. The backplane 400 has a DMAC (Direct Memory Access Controller), and may transfer data between the server CM 221 and the storage CM 331 by DMA. The DMAC may exist in each of the server module 200-1 and the storage module 300-1 instead of or in addition to the backplane 400.
　計算機システム１００内のサーバモジュール２００－１及び２００－２は、ＬＡＮ６００を介して、外部のサーバモジュール２００－３と接続され、また、ＳＡＮ５００を介して外部のストレージモジュール３００－２と接続されてよい。計算機システム１００内のストレージモジュール３００－１は、ＳＡＮ５００を介して外部のサーバモジュール２００－３と接続されてよい。 The server modules 200-1 and 200-2 in the computer system 100 may be connected to the external server module 200-3 via the LAN 600, and may be connected to the external storage module 300-2 via the SAN 500. . The storage module 300-1 in the computer system 100 may be connected to an external server module 200-3 via the SAN 500.
　図２は、サーバモジュール２００－１のソフトウェア構成例を示す。 FIG. 2 shows a software configuration example of the server module 200-1.
　サーバメモリ２２０は、ＯＳ（Operating　System）２２１及びアプリケーション２２４を格納する。アプリケーション２２４は、所定の業務を実行する。ＯＳ２２１は、サーバモジュール２００－１を管理する。ＯＳ２２１は、サーバメモリ２２０を制御するサーバメモリ制御部２２２と、サーバモジュール２００－１のＩ／Ｏを制御するサーバＩ／Ｏ制御部２２３とを有する。サーバメモリ制御部２２２及びサーバＩ／Ｏ制御部２２３は、それぞれ、ＯＳ２２１からは独立したモジュールとして存在してもよいし、アプリケーション２２４に組み込まれていてもよい。サーバメモリ制御部２２２及びサーバＩ／Ｏ制御部２２３の少なくとも１つが、複数の構成要素に分割されていてもよいし、サーバメモリ制御部２２２及びサーバＩ／Ｏ制御部２２３が１つの構成要素として統合されていてもよい。 The server memory 220 stores an OS (Operating System) 221 and an application 224. The application 224 executes a predetermined job. The OS 221 manages the server module 200-1. The OS 221 includes a server memory control unit 222 that controls the server memory 220 and a server I / O control unit 223 that controls I / O of the server module 200-1. Each of the server memory control unit 222 and the server I / O control unit 223 may exist as a module independent from the OS 221 or may be incorporated in the application 224. At least one of the server memory control unit 222 and the server I / O control unit 223 may be divided into a plurality of components, and the server memory control unit 222 and the server I / O control unit 223 are configured as one component. It may be integrated.
　図３は、ストレージモジュール３００－１のソフトウェア構成例を示す。 FIG. 3 shows a software configuration example of the storage module 300-1.
　ストレージメモリ３３０は、ＯＳ（Operating　System）３２１及びアプリケーション３２４を格納する。アプリケーション３２４は、所定の業務を実行する。ＯＳ３２１は、ストレージモジュール３００－１を管理する。ＯＳ３２１は、ストレージメモリ３３０を制御するストレージメモリ制御部３２２と、ストレージモジュール３００－１のＩ／Ｏを制御するストレージＩ／Ｏ制御部３２３とを有する。ストレージメモリ制御部３２２及びストレージＩ／Ｏ制御部３２３は、それぞれ、ＯＳ３２１からは独立したモジュールとして存在してもよいし、アプリケーション３２４に組み込まれていてもよい。ストレージメモリ制御部３２２及びストレージＩ／Ｏ制御部３２３の少なくとも１つが、複数の構成要素に分割されていてもよいし、ストレージメモリ制御部３２２及びストレージＩ／Ｏ制御部３２３が１つの構成要素として統合されていてもよい。 The storage memory 330 stores an OS (Operating System) 321 and an application 324. The application 324 executes a predetermined job. The OS 321 manages the storage module 300-1. The OS 321 includes a storage memory control unit 322 that controls the storage memory 330 and a storage I / O control unit 323 that controls I / O of the storage module 300-1. Each of the storage memory control unit 322 and the storage I / O control unit 323 may exist as a module independent of the OS 321 or may be incorporated in the application 324. At least one of the storage memory control unit 322 and the storage I / O control unit 323 may be divided into a plurality of components, and the storage memory control unit 322 and the storage I / O control unit 323 are configured as one component. It may be integrated.
　図４は、論理アドレス空間の構成例を示す。 FIG. 4 shows a configuration example of the logical address space.
　論理アドレス空間４９０は、サーバプロセッサ２１０が認識するキャッシュメモリのアドレス空間である。サーバプロセッサ２１０が認識するキャッシュメモリは、論理キャッシュメモリであり、論理メモリの一例である。論理アドレス空間４９０には、サーバメモリ２２０の少なくとも一部とストレージメモリ３３０の少なくとも一部が割り当てられる。本実施形態では、論理アドレス空間４９０には、サーバＣＭ２２１の少なくとも一部と、ストレージＣＭ３３１の少なくとも一部とが割り当てられる。論理アドレス空間４９０は、論理アドレス空間４９０は、サーバ領域４１１Ｌと、ストレージ領域４１２Ｌと、共有領域４１３Ｌと、未実装領域４１４Ｌとを含む。 The logical address space 490 is a cache memory address space recognized by the server processor 210. The cache memory recognized by the server processor 210 is a logical cache memory, and is an example of a logical memory. At least a part of the server memory 220 and at least a part of the storage memory 330 are allocated to the logical address space 490. In the present embodiment, at least a part of the server CM 221 and at least a part of the storage CM 331 are allocated to the logical address space 490. The logical address space 490 includes a server area 411L, a storage area 412L, a shared area 413L, and an unmounted area 414L.
　サーバ領域４１１Ｌは、論理キャッシュメモリにおける一領域であり、サーバＣＭ２２１の少なくとも一部の領域が割り当てられたアドレス範囲である。サーバ領域４１１Ｌは、サーバプロセッサ２１０の専用領域である。すなわち、サーバ領域４１１Ｌは、サーバプロセッサ２１０がアクセス可能な領域であり、ストレージプロセッサ３２０がアクセス不可能な領域である。 The server area 411L is an area in the logical cache memory, and is an address range to which at least a part of the server CM 221 is allocated. The server area 411L is a dedicated area for the server processor 210. That is, the server area 411L is an area that the server processor 210 can access and the storage processor 320 cannot access.
　ストレージ領域４１２Ｌは、論理キャッシュメモリにおける一領域であり、ストレージＣＭ３３１の少なくとも一部の領域が割り当てられたアドレス範囲である。ストレージ領域４１２Ｌとして割り当てられている、ストレージＣＭ３３１における領域は、ストレージプロセッサ３２０の専用領域４１２Ｐである。すなわち、ストレージ領域４１２Ｌは、サーバプロセッサ２１０がアクセス不可能な領域であり、ストレージプロセッサ３２０がアクセス可能な領域である。 The storage area 412L is an area in the logical cache memory, and is an address range to which at least a part of the storage CM 331 is allocated. The area in the storage CM 331 allocated as the storage area 412L is a dedicated area 412P of the storage processor 320. That is, the storage area 412L is an area that the server processor 210 cannot access and the storage processor 320 can access.
　共有領域４１３Ｌは、論理キャッシュメモリにおける一領域であり、ストレージＣＭ３３１の一部の領域が割り当てられたアドレス範囲である。共有領域４１３Ｌとして割り当てられている、ストレージＣＭ３３１における領域は、サーバプロセッサ２１０とストレージプロセッサ３２０の共有領域４１３Ｐである。すなわち、共有領域４１３Ｌは、サーバプロセッサ２１０もストレージプロセッサ３２０もアクセス可能な領域である。共有領域４１３Ｌ（４１３Ｐ）のサイズは可変であり、共有領域４１３Ｌ（４１３Ｐ）のサイズの最低値が０（つまり共有領域４１３Ｌ（４１３Ｐ）が無い）となることもある。サーバプロセッサ２１０は、サーバ領域４１１Ｌと共有領域４１３Ｌを区別することができ、故に、サーバ領域４１１Ｌを使用するか共有領域４１３Ｌを使用するかを選択することができる。 The shared area 413L is an area in the logical cache memory, and is an address range to which a part of the storage CM 331 is allocated. The area in the storage CM 331 allocated as the shared area 413L is the shared area 413P of the server processor 210 and the storage processor 320. That is, the shared area 413L is an area accessible by both the server processor 210 and the storage processor 320. The size of the shared area 413L (413P) is variable, and the minimum value of the size of the shared area 413L (413P) may be 0 (that is, there is no shared area 413L (413P)). The server processor 210 can distinguish between the server area 411L and the shared area 413L, and therefore can select whether to use the server area 411L or the shared area 413L.
　未実装領域４１４Ｌは、論理キャッシュメモリにおける一領域であり、サーバＣＭ２２１及びストレージＣＭ３３１のいずれの領域も割り当てられていないアドレス範囲である。未実装領域４１４Ｌは、サーバプロセッサ２１０がアクセス可能な領域である。未実装領域４１４Ｌは、サーバＣＭ２２１及びストレージＣＭ３３１の少なくとも１つが増設された場合に、増設されたＣＭ（キャッシュメモリ）の少なくとも一部の割当て先とされる。予め未実装領域４１４Ｌが用意されていることで、サーバモジュール２００－１のリブート無しに、サーバプロセッサ２１０がアクセス可能なアドレス範囲を増やすことができる。 The unmounted area 414L is an area in the logical cache memory, and is an address range to which neither the server CM 221 nor the storage CM 331 is allocated. The unmounted area 414L is an area accessible by the server processor 210. When at least one of the server CM 221 and the storage CM 331 is added, the unmounted area 414L is assigned to at least a part of the added CM (cache memory). Since the unmounted area 414L is prepared in advance, the address range accessible to the server processor 210 can be increased without rebooting the server module 200-1.
　ストレージプロセッサ３２０は、専用領域４１２Ｐと共有領域４１３Ｐを、以下のように使い分けることができる。例えば、ストレージプロセッサ３２０は、ＬＵ（例えば記憶デバイス３７０）に対して入出力されるデータを、専用領域４１２Ｐに格納してよい。言い換えれば、ストレージプロセッサ３２０は、共有領域４１３ＰからＬＵにデータを書き込んだり（デステージしたり）、ＬＵから直接共有領域４１３Ｐにデータを読み出したりせずに、一旦専用領域４１２Ｐにデータを格納してよい。サーバプロセッサ２１０からの書込み要求に従う書込み対象のデータがサーバプロセッサ２１０によるキャッシュ動作として共有領域４１３Ｐに書き込まれて、ストレージプロセッサ３２０は、共有領域４１３Ｐから専用領域４１２Ｐにその書込み対象のデータをコピーし（その際、専用領域４１２Ｐにおいて、その書込み対象のデータが二重化されてもよい）、その後、任意のタイミングで、専用領域４１２Ｐから書込み対象のデータをＬＵ（例えば記憶デバイス３７０）に書き込んでもよい。また、ストレージプロセッサ３２０は、サーバプロセッサ２１０からの読出し要求に従う読出し対象のデータを、専用領域４１２Ｐに一時格納し、その後、その読出し対象のデータを、専用領域４１２Ｐから共有領域４１３Ｐ又はサーバＣＭ２２１にコピーすることで、読出し対象のデータをサーバモジュール２００－１に提供してよい。つまり、共有領域４１３Ｐは、あくまで、サーバＣＭ２２１の拡張領域として提供され、ストレージプロセッサ３２０が使用する専用領域の１つとして使用されないでよい。 The storage processor 320 can properly use the dedicated area 412P and the shared area 413P as follows. For example, the storage processor 320 may store data input / output to / from the LU (for example, the storage device 370) in the dedicated area 412P. In other words, the storage processor 320 temporarily stores data in the dedicated area 412P without writing (destaged) data from the shared area 413P to the LU or reading data directly from the LU to the shared area 413P. Good. Data to be written in accordance with a write request from the server processor 210 is written to the shared area 413P as a cache operation by the server processor 210, and the storage processor 320 copies the data to be written from the shared area 413P to the dedicated area 412P ( At that time, the write target data may be duplicated in the dedicated area 412P), and then the write target data may be written from the dedicated area 412P to the LU (for example, the storage device 370) at an arbitrary timing. Further, the storage processor 320 temporarily stores data to be read in accordance with the read request from the server processor 210 in the dedicated area 412P, and then copies the data to be read from the dedicated area 412P to the shared area 413P or the server CM 221. By doing so, the data to be read may be provided to the server module 200-1. That is, the shared area 413P is provided only as an extension area of the server CM 221 and may not be used as one of the dedicated areas used by the storage processor 320.
　ところで、共有領域４１３Ｐが設けられる場合、第１管理テーブル４２１及び第２管理テーブル４２２が共有領域４１３Ｐにストレージプロセッサ３２０により用意される。これらのテーブル４２１及び４２２は、サーバプロセッサ２１０及びストレージプロセッサ３２０の両方がアクセス可能である。また、第３管理テーブル４２３が専用領域４１２Ｐにストレージプロセッサ３２０により用意される。以下、図５～図７を参照して、第１～第３管理テーブル４２１～４２３を説明する。なお、第１～第３管理テーブル４２１～４２３のうちの少なくとも１つは、テーブル以外の形式の情報でもよい。 Incidentally, when the shared area 413P is provided, the first management table 421 and the second management table 422 are prepared in the shared area 413P by the storage processor 320. These tables 421 and 422 are accessible by both the server processor 210 and the storage processor 320. The third management table 423 is prepared by the storage processor 320 in the dedicated area 412P. Hereinafter, the first to third management tables 421 to 423 will be described with reference to FIGS. Note that at least one of the first to third management tables 421 to 423 may be information in a format other than the table.
　図５は、第１管理テーブル４２１の構成例を示す。 FIG. 5 shows a configuration example of the first management table 421.
　第１管理テーブル４２１は、共有領域４１３Ｌ（４１３Ｐ）に関する情報を表す。例えば、第１管理テーブル４２１は、ロックフラグ５０１、共有領域位置５０２及び有効フラグ５０３を有する。 The first management table 421 represents information related to the shared area 413L (413P). For example, the first management table 421 includes a lock flag 501, a shared area position 502, and a valid flag 503.
　ロックフラグ５０１は、共有領域４１３Ｌ（４１３Ｐ）のロックが取得されているか否か、ロックが取得されているのであれば誰が共有領域４１３Ｌ（４１３Ｐ）のロックを取得しているかを表す。例えば、「ＳＥ」が、サーバモジュール２００－１がロック取得済であることを意味し、「ＳＴ」が、ストレージモジュール３００－１がロック取得済であることを意味し、「００」が、ロックが取得されていないことを意味する。 The lock flag 501 indicates whether or not the lock of the shared area 413L (413P) has been acquired, and who has acquired the lock of the shared area 413L (413P) if the lock has been acquired. For example, “SE” means that the server module 200-1 has acquired the lock, “ST” means that the storage module 300-1 has already acquired the lock, and “00” indicates that the lock has been acquired. Means that has not been acquired.
　共有領域位置５０２は、共有領域４１３Ｐを構成する１又は複数のアドレス範囲を表す。 The shared area position 502 represents one or a plurality of address ranges constituting the shared area 413P.
　有効フラグ５０３は、共有領域４１３Ｌ（４１３Ｐ）が有効か無効かを表す。共有領域４１３Ｌ（４１３Ｐ）が無効の例として、障害がある。 The valid flag 503 indicates whether the shared area 413L (413P) is valid or invalid. An example in which the shared area 413L (413P) is invalid is a failure.
　図６は、第２管理テーブル４２２の構成例を示す。 FIG. 6 shows a configuration example of the second management table 422.
　第２管理テーブル４２２は、サーバＣＭ２２１の容量とサーバモジュール２００－１の負荷とに関する情報を表す。例えば、第１管理テーブル４２１は、サーバＣＭ容量６０１及びサーバプロセッサ使用率６０２を有する。サーバＣＭ容量６０１は、サーバＣＭ２２１の容量を表す。サーバプロセッサ使用率６０２は、サーバプロセッサ２１０の使用率（サーバモジュール２００－１の負荷の一例）を表す。 The second management table 422 represents information regarding the capacity of the server CM 221 and the load of the server module 200-1. For example, the first management table 421 has a server CM capacity 601 and a server processor usage rate 602. The server CM capacity 601 represents the capacity of the server CM 221. The server processor usage rate 602 represents the usage rate of the server processor 210 (an example of the load of the server module 200-1).
　図７は、第３管理テーブル４２３の構成例を示す。 FIG. 7 shows a configuration example of the third management table 423.
　第３管理テーブル４２３は、ストレージプロセッサ３２０のみが参照する情報であるため、専用領域４１２Ｐに配置される。第３管理テーブル４２３は、ストレージプロセッサ３２０により算出された値であって、サーバモジュール２００－１及びストレージモジュール３００－１のうちの少なくとも一方の負荷に関する情報を表す。例えば、第３管理テーブル４２３は、サーバプロセッサ使用率平均値７０１、書込み割合平均値７０２、Ｉ／Ｏ頻度平均値７０３、ストレージプロセッサ使用率平均値７０４、及びストレージＣＭ構成７０５を有する。 The third management table 423 is information that is referenced only by the storage processor 320, and is therefore arranged in the dedicated area 412P. The third management table 423 is a value calculated by the storage processor 320 and represents information related to the load of at least one of the server module 200-1 and the storage module 300-1. For example, the third management table 423 includes a server processor usage rate average value 701, a write rate average value 702, an I / O frequency average value 703, a storage processor usage rate average value 704, and a storage CM configuration 705.
　サーバプロセッサ使用率平均値７０１は、サーバモジュール２００－１から取得された１以上のサーバプロセッサ使用率の平均値を表す。書込み割合平均値７０２は、ストレージモジュール３００－１において測定された１以上の書込み割合（ストレージＣＭ３３１に対するアクセスのうちの書込みの割合）の平均値を表す。Ｉ／Ｏ頻度平均値７０３は、ストレージモジュール３００－１において測定された１以上のＩ／Ｏ頻度（サーバモジュール２００－１から単位時間（例えば１秒間）当たりに受信したＩ／Ｏ要求の数）の平均値を表す。ストレージプロセッサ使用率平均値７０４は、ストレージモジュール３００－１において測定された１以上のストレージプロセッサ使用率の平均値を表す。ストレージＣＭ構成７０５は、ストレージＣＭ３３１の構成に関する情報を表し、例えば、共有領域４１３Ｐの容量、及び、共有領域４１３Ｐの割当先アドレス範囲（論理アドレス空間におけるアドレス範囲）を表す情報を含む。 The server processor usage rate average value 701 represents an average value of one or more server processor usage rates acquired from the server module 200-1. The write ratio average value 702 represents an average value of one or more write ratios (write ratios of accesses to the storage CM 331) measured in the storage module 300-1. The I / O frequency average value 703 is one or more I / O frequencies measured by the storage module 300-1 (the number of I / O requests received per unit time (for example, 1 second) from the server module 200-1). The average value of. The storage processor usage rate average value 704 represents an average value of one or more storage processor usage rates measured in the storage module 300-1. The storage CM configuration 705 represents information related to the configuration of the storage CM 331, and includes, for example, information indicating the capacity of the shared area 413P and the allocation address range (address range in the logical address space) of the shared area 413P.
　サーバプロセッサ使用率、書込み割合、Ｉ／Ｏ頻度及びストレージプロセッサ使用率のうちの少なくとも１つに代えて又は加えて、他種のサーバモジュール負荷又はストレージモジュール負荷が採用されてよい。例えば、サーバモジュール負荷として、サーバキャッシュヒットミス割合（例えばそれの平均値）が採用されてよい。「サーバキャッシュヒットミス割合」とは、サーバモジュール２００－１においてサーバキャッシュヒットミスが発生した割合である。「サーバキャッシュヒットミス」とは、読出し対象のデータがサーバ領域４１１Ｌ（及び共有領域４１３Ｌ）に存在しないこと、及び、書込み対象のデータの一時格納先を共有領域４１３Ｌ（及びサーバ領域４１１Ｌ）から確保できないこと、である。本実施形態では、後述のサーバデータ読出し処理では、共有領域４１３Ｌよりもサーバ領域４１１Ｌから優先的にサーバプロセッサ２１０用の一時領域が確保され、サーバデータ書込み処理では、サーバ領域４１１Ｌよりも共有領域４１３Ｌから優先的にサーバプロセッサ２１０用の一時領域が確保される。なお、「サーバデータ」とは、サーバモジュール２００－１が認識しているＬＵに対して入出力されるデータであり、例えば、サーバモジュール２００－１のアプリケーション２２４により使用されるデータである。 Instead of or in addition to at least one of the server processor usage rate, write rate, I / O frequency, and storage processor usage rate, other types of server module loads or storage module loads may be employed. For example, a server cache hit miss ratio (for example, an average value thereof) may be employed as the server module load. The “server cache hit miss ratio” is a ratio at which a server cache hit miss has occurred in the server module 200-1. “Server cache hit miss” means that the read target data does not exist in the server area 411L (and the shared area 413L), and the temporary storage destination of the write target data is secured from the shared area 413L (and the server area 411L). It can't be done. In the present embodiment, a server data read process, which will be described later, reserves a temporary area for the server processor 210 preferentially from the server area 411L over the shared area 413L, and a server data write process performs a shared area 413L over the server area 411L. The temporary area for the server processor 210 is secured with priority. The “server data” is data input / output to / from the LU recognized by the server module 200-1, for example, data used by the application 224 of the server module 200-1.
　また、各種負荷について、いずれの値も「平均値」であるが、平均値に代えて又は加えて、複数の値に基づく、平均値以外の値、でもよいし、複数の値のうちの最大値又は最小値でもよい。 Also, for various loads, all values are “average values”, but instead of or in addition to the average values, values other than the average value based on a plurality of values may be used, or the maximum of the plurality of values It may be a value or a minimum value.
　以上、第１～第３管理テーブル４２１～４２３を説明したが、これらのテーブル４２１～４２３は、より多くのテーブルに分割されて管理されてもよいし、より少ないテーブルに集約されて管理されてもよい。 The first to third management tables 421 to 423 have been described above. However, these tables 421 to 423 may be divided into more tables and managed, or may be managed by being aggregated into fewer tables. Also good.
　以下、図８～図１２を参照して、本実施形態で行われる処理の一例を説明する。以下の説明の前提として、サーバプロセッサ２１０及びストレージプロセッサ３２０のいずれも、共有領域４１３Ｐにアクセスする場合にはロックフラグ５０１をオンとするようになっており、既にロックフラグ５０１が他者によりオンとなっている場合には、ロックフラグ５０１の値がオフにされるまで共有領域４１３Ｐへのアクセスを保留にするとする。 Hereinafter, an example of processing performed in the present embodiment will be described with reference to FIGS. As a premise of the following description, both the server processor 210 and the storage processor 320 are set to turn on the lock flag 501 when accessing the shared area 413P, and the lock flag 501 has already been turned on by another person. If it is, access to the shared area 413P is put on hold until the value of the lock flag 501 is turned off.
　図８は、サーバモジュール負荷取得処理の流れの一例を示す。なお、以下の説明の前提として、サーバプロセッサ２１０が、繰り返し（例えば定期的に）サーバプロセッサ使用率を測定し測定された負荷をサーバメモリ２２０に格納するものとする。従って、サーバメモリ２２０には、サーバプロセッサ２１０により測定されたサーバプロセッサ使用率が格納されているものとする。 FIG. 8 shows an example of the flow of server module load acquisition processing. As a premise of the following description, it is assumed that the server processor 210 repeatedly measures the server processor usage rate (for example, periodically) and stores the measured load in the server memory 220. Accordingly, it is assumed that the server memory usage rate measured by the server processor 210 is stored in the server memory 220.
　初めてサーバモジュール２００－１からサーバモジュール負荷を取得する場合、ストレージプロセッサ３２０が、ロックフラグ５０１の値をオン（「ＳＴ」）とする（Ｓ８０１）、ロックフラグ５０１「オン」の第１管理テーブル４２１と、第２管理テーブル４２２との格納先領域を、ストレージＣＭ３３１における共有領域４１３Ｐから確保する（Ｓ８０２）。その後、ストレージプロセッサ３２０が、ロックフラグ５０１の値をオフ（「００」）とする（Ｓ８０３）。そして、ストレージプロセッサ３２０は、Ｓ８０２で確保した領域のアドレス（つまり第１管理テーブル４２１と第２管理テーブル４２２が存在する場所を示すアドレス）をサーバモジュール２００－１に通知する（Ｓ８０４）。 When acquiring the server module load from the server module 200-1 for the first time, the storage processor 320 turns on the value of the lock flag 501 ("ST") (S801), and the first management table 421 with the lock flag 501 "on". And the storage area of the second management table 422 is secured from the shared area 413P in the storage CM 331 (S802). Thereafter, the storage processor 320 turns off the value of the lock flag 501 (“00”) (S803). Then, the storage processor 320 notifies the server module 200-1 of the address of the area secured in S802 (that is, the address indicating the location where the first management table 421 and the second management table 422 exist) (S804).
　サーバプロセッサ２１０は、Ｓ８０４の通知を受けて、第１管理テーブル４２１及び第２管理テーブル４２２の場所を特定し、第１管理テーブル４２１におけるロックフラグ５０１の値をオン（「ＳＥ」）とする（Ｓ８０５）。サーバプロセッサ２１０は、サーバメモリ２２０から、サーバプロセッサ使用率を取得する（Ｓ８０６）。サーバプロセッサ２１０は、取得したサーバモジュール負荷を、第２管理テーブル４２２にサーバプロセッサ使用率６０２として書き込み（Ｓ８０７）、ロックフラグ５０１の値をオフとし（Ｓ８０８）、書込み完了をストレージモジュール３００－１に通知する（Ｓ８０９）。なお、サーバプロセッサ使用率は、バックプレーン４００を介したＤＭＡ転送により、サーバメモリ２２０からサーバプロセッサ使用率６０２の領域に格納されてよい。また、Ｓ８０７で、第２管理テーブル４２２に、サーバＣＭ容量６０１として、論理アドレス空間４９０に割り当てられている、サーバＣＭ２２１における領域の容量が、書き込まれてもよい。 Upon receiving the notification in S804, the server processor 210 identifies the locations of the first management table 421 and the second management table 422, and turns on the value of the lock flag 501 in the first management table 421 (“SE”) ( S805). The server processor 210 acquires the server processor usage rate from the server memory 220 (S806). The server processor 210 writes the acquired server module load as the server processor usage rate 602 in the second management table 422 (S807), turns off the value of the lock flag 501 (S808), and writes the write completion to the storage module 300-1. Notification is made (S809). The server processor usage rate may be stored in the area of the server processor usage rate 602 from the server memory 220 by DMA transfer via the backplane 400. In S807, the capacity of the area in the server CM 221 allocated to the logical address space 490 as the server CM capacity 601 may be written in the second management table 422.
　ストレージプロセッサ３２０は、Ｓ８０９の通知を受けて、ロックフラグ５０１の値をオンとし（Ｓ８１０）、第２管理テーブル４２２からサーバプロセッサ使用率６０２を取得し（Ｓ８１１）、ロックフラグ５０１の値をオフとする（Ｓ８１２）。ストレージプロセッサ３２０は、Ｓ８１１で取得されたサーバプロセッサ使用率６０２を基に、第３管理テーブル４２３におけるサーバプロセッサ使用率平均値７０１を更新する（Ｓ８１３）。 Upon receiving the notification in S809, the storage processor 320 turns on the value of the lock flag 501 (S810), acquires the server processor usage rate 602 from the second management table 422 (S811), and turns off the value of the lock flag 501. (S812). The storage processor 320 updates the server processor usage rate average value 701 in the third management table 423 based on the server processor usage rate 602 acquired in S811 (S813).
　以後、Ｓ８０５～Ｓ８１３の処理が繰り返し（例えば定期的に）行われる。Ｓ８１３は、Ｓ８０５～Ｓ８１２がＮ回（Ｎは１以上の整数）行われる都度に１回行われるようになっていてもよい。 Thereafter, the processing of S805 to S813 is repeated (for example, periodically). S813 may be performed once every time S805 to S812 are performed N times (N is an integer equal to or greater than 1).
　また、図示しないが、ストレージプロセッサ３２０も、繰り返し（例えば定期的に）ストレージモジュール負荷（書込み割合、Ｉ／Ｏ頻度及びストレージプロセッサ使用率）を測定し測定された負荷をストレージメモリ３３０に格納するとする。また、ストレージプロセッサ３２０は、適宜、ストレージメモリ３３０に格納されたストレージモジュール負荷に基づき、第３管理テーブル４２３における値７０２～７０５を更新するとする。 Although not shown, the storage processor 320 also repeatedly (for example, periodically) measures the storage module load (write ratio, I / O frequency, and storage processor usage rate) and stores the measured load in the storage memory 330. . The storage processor 320 appropriately updates the values 702 to 705 in the third management table 423 based on the storage module load stored in the storage memory 330.
　図９及び図１０は、共有領域サイズ変更処理の流れの一例を示す。なお、以下、共有領域４１３Ｐ（４１３Ｌ）へのアクセスの際に行うロックフラグのオン／オフの表記と説明を省略する。 9 and 10 show an example of the flow of shared area size change processing. Hereinafter, the description and description of the lock flag ON / OFF performed when accessing the shared area 413P (413L) will be omitted.
　共有領域サイズ変更処理は、繰り返し行われる。共有領域サイズ変更処理は、定期的に開始されてもよいし、所定の変更イベントが発生したときに開始されてもよい。所定の変更イベントとは、上述したサーバキャッシュヒットミスが発生した、サーバモジュール２００－１の優先度が相対的に変更された（例えば、ストレージモジュール３００－１に接続されている他のサーバモジュールの優先度が変更された）等でよい。ストレージメモリ３３０において、ストレージモジュール３００－１に接続されている各サーバモジュール２００の優先度が管理されていてよく、サーバモジュール２００の優先度の変更は、サーバプロセッサ２１０により行われてもよいし、ストレージモジュール３００－１に接続されている管理計算機（図示せず）により行われてもよい。 The shared area size change process is repeated. The shared area size changing process may be started periodically or when a predetermined change event occurs. The predetermined change event means that the priority of the server module 200-1 in which the above-described server cache hit miss has occurred is relatively changed (for example, another server module connected to the storage module 300-1). The priority has been changed). In the storage memory 330, the priority of each server module 200 connected to the storage module 300-1 may be managed, and the change of the priority of the server module 200 may be performed by the server processor 210, It may be performed by a management computer (not shown) connected to the storage module 300-1.
　ストレージプロセッサ３２０が、第３管理テーブル４２３から値７０１～７０５を取得し、値７０１～７０４のうちの少なくとも１つを基に、値７０５が表す共有領域サイズを増やす又は減らす必要があるか否かのサイズ変更判断を行う。共有領域サイズを増やす場合、ストレージプロセッサ３２０は、拡張サイズ（論理アドレス空間に新たに割り当てられるメモリ領域の容量）を算出し、共有領域サイズを減らす場合、ストレージプロセッサ３２０は、縮小サイズ（論理アドレス空間から解放されるメモリ領域の容量）を算出する。拡張サイズ及び縮小サイズは、値７０５が表す共有領域サイズと、値７０１～７０４のうちの少なくとも１つとを基に決定される。例えば、値７０１が第１の閾値を超えていれば（つまりサーバモジュール負荷が高ければ）、所定サイズが拡張サイズとして算出されてよく、一方、値７０１が第１の閾値又は第２の閾値（第１の閾値より低い閾値）を下回っていれば（つまりサーバモジュール負荷が低ければ）、所定サイズが縮小サイズとして算出されてよい。また、更に、値７０２～７０４のうちの少なくとも１つ（つまりストレージモジュール負荷の高さ）を基に、拡張サイズ又は縮小サイズが調整されてよい。 Whether the storage processor 320 obtains the values 701 to 705 from the third management table 423, and whether or not the shared area size represented by the value 705 needs to be increased or decreased based on at least one of the values 701 to 704 Make a size change decision. When increasing the shared area size, the storage processor 320 calculates an expanded size (capacity of a memory area newly allocated to the logical address space), and when decreasing the shared area size, the storage processor 320 reduces the reduced size (logical address space). The capacity of the memory area released from The expanded size and the reduced size are determined based on the shared area size represented by the value 705 and at least one of the values 701 to 704. For example, if the value 701 exceeds the first threshold (that is, if the server module load is high), the predetermined size may be calculated as the expanded size, while the value 701 is the first threshold or the second threshold ( The predetermined size may be calculated as the reduced size if the threshold is lower than the first threshold (that is, if the server module load is low). Furthermore, the expansion size or the reduction size may be adjusted based on at least one of the values 702 to 704 (that is, the height of the storage module load).
　サイズ変更判断の結果、共有領域のサイズの変更が不要の場合（Ｓ９０４：Ｎｏ）、共有領域サイズ変更処理が終了する。 If it is not necessary to change the size of the shared area as a result of the size change determination (S904: No), the shared area size changing process ends.
　サイズ変更判断の結果、共有領域のサイズの拡大の場合（Ｓ９０４：Ｙｅｓ、且つ、Ｓ９０５：Ｙｅｓ）、ストレージプロセッサ３２０が、拡張制御を行なう（Ｓ９０６）。Ｓ９０６の拡張制御では、例えば以下の処理が行われる。すなわち、ストレージプロセッサ３２０は、専用領域４１２Ｐから、拡張サイズ分の１以上の領域を、割当て対象領域群として決定する。その際、ストレージプロセッサ３２０は、ダーティ領域よりも優先的に空き領域及びクリーン領域を割当て対象領域として決定してよい。空き領域及びクリーン領域内のデータをＬＵ（例えば記憶デバイス３７０）にデステージする必要は無いので、デステージの発生頻度を抑えることができる。空き領域及びクリーン領域の総量が拡張サイズに満たない等の場合に、ストレージプロセッサ３２０は、ダーティ領域を割当て対象領域として決定してよい。ダーティ領域が割当て対象領域として決定された場合、ストレージプロセッサ３２０は、ダーティ領域内のデータをＬＵ（例えば記憶デバイス３７０）に書き込むことで、そのダーティ領域をクリーン領域とする。その後、ストレージプロセッサ３２０は、割当て対象領域群を論理アドレス空間に割り当てる。なお、「ダーティ領域」は、サーバプロセッサ２１０からのデータであってＬＵ（例えば記憶デバイス３７０）に未だ書き込まれていないデータが格納されているキャッシュ領域であり、「クリーン領域」は、サーバプロセッサ２１０からのデータであってＬＵ（例えば記憶デバイス３７０）に既に存在するデータが格納されているキャッシュ領域であり、「空き領域」は、ダーティ領域でもクリーン領域でも無く確保可能な領域として管理されているキャッシュ領域（例えばデータが格納されていない領域）である。 If the size of the shared area is increased as a result of the size change determination (S904: Yes and S905: Yes), the storage processor 320 performs expansion control (S906). In the extension control in S906, for example, the following processing is performed. That is, the storage processor 320 determines one or more areas corresponding to the expansion size as the allocation target area group from the dedicated area 412P. At this time, the storage processor 320 may determine the free area and the clean area as the allocation target area with priority over the dirty area. Since it is not necessary to destage the data in the free area and the clean area to the LU (for example, the storage device 370), the occurrence frequency of the destage can be suppressed. When the total amount of the free area and the clean area is less than the expansion size, the storage processor 320 may determine the dirty area as the allocation target area. When the dirty area is determined as the allocation target area, the storage processor 320 writes the data in the dirty area to the LU (for example, the storage device 370), thereby making the dirty area a clean area. Thereafter, the storage processor 320 allocates the allocation target area group to the logical address space. The “dirty area” is a cache area in which data from the server processor 210 and not yet written in the LU (for example, the storage device 370) is stored, and the “clean area” is the server processor 210. Is a cache area in which data that already exists in the LU (for example, the storage device 370) is stored, and the “free area” is managed as an area that can be secured without being a dirty area or a clean area A cache area (for example, an area in which no data is stored).
　拡張制御（Ｓ９０６）の後、ストレージプロセッサ３２０が、メモリ変更通知をサーバモジュール２００－１に送信する（Ｓ９０７）。メモリ変更通知は、例えば、割当てを意味する情報と、割当て対象領域群の割当て先アドレス範囲（論理アドレス空間におけるアドレス範囲）とを含んでよい。割当て先アドレス範囲は、言い換えれば、ストレージ領域４１２Ｌのアドレス範囲のうち、サーバプロセッサ２１０からアクセス可能とするアドレス範囲である。また、割当て対象領域群のアドレスは、第１管理テーブル４２１の共有領域位置５０２に追加されてよい。サーバプロセッサ２１０は、共有領域位置５０２を参照することにより、共有領域の物理的なアドレスを知ることができる。 After the expansion control (S906), the storage processor 320 transmits a memory change notification to the server module 200-1 (S907). The memory change notification may include, for example, information indicating allocation and an allocation destination address range (address range in the logical address space) of the allocation target area group. In other words, the allocation address range is an address range that can be accessed from the server processor 210 in the address range of the storage area 412L. The address of the allocation target area group may be added to the shared area position 502 of the first management table 421. The server processor 210 can know the physical address of the shared area by referring to the shared area position 502.
　サーバプロセッサ２１０は、メモリ変更通知を受けて、メモリ変更通知内の割当て先アドレス範囲がアクセス可能になったことを認識し（Ｓ９０８）、完了通知をストレージモジュール３００－１に返す（Ｓ９０９）。これにより、以後、サーバプロセッサ２１０は、割当て先アドレス範囲（割当て対象領域群）にアクセス可能となる。また、ストレージプロセッサ３２０は、完了通知を受けて、以後、割当て対象領域群を共有領域４１３Ｐの一部（又は全部）として扱うことができる。 Upon receiving the memory change notification, the server processor 210 recognizes that the allocated address range in the memory change notification is accessible (S908), and returns a completion notification to the storage module 300-1 (S909). As a result, the server processor 210 can subsequently access the allocation address range (allocation target area group). Further, the storage processor 320 can handle the allocation target area group as a part (or all) of the shared area 413P after receiving the completion notification.
　図９において、サイズ変更判断の結果、共有領域のサイズの縮小の場合（Ｓ９０４：Ｙｅｓ、且つ、Ｓ９０５：Ｎｏ）、ストレージプロセッサ３２０が、図１０に示すように、縮小制御を行なう（Ｓ１０１１）。Ｓ１０１１の縮小制御では、例えば以下の処理が行われる。すなわち、ストレージプロセッサ３２０は、共有領域４１３Ｐから、縮小サイズ分の１以上の領域を、解放対象領域群として決定する。 In FIG. 9, when the size of the shared area is reduced as a result of the size change determination (S904: Yes and S905: No), the storage processor 320 performs reduction control as shown in FIG. 10 (S1011). In the reduction control in S1011, for example, the following processing is performed. That is, the storage processor 320 determines one or more areas corresponding to the reduced size as a release target area group from the shared area 413P.
　縮小制御（Ｓ１０１１）の後、ストレージプロセッサ３２０が、メモリ変更通知をサーバモジュール２００－１に送信する（Ｓ１０１２）。メモリ変更通知は、例えば、解放を意味する情報と、解放アドレス範囲（解放対象領域群の論理アドレス空間におけるアドレス範囲）とを含んでよい。解放アドレス範囲は、共有領域４１３Ｌのアドレス範囲のうちのサーバプロセッサ２１０からアクセス不可能とするアドレス範囲でもよいし、縮小されるサイズでもよい。 After the reduction control (S1011), the storage processor 320 transmits a memory change notification to the server module 200-1 (S1012). The memory change notification may include, for example, information indicating release and a release address range (address range in the logical address space of the release target area group). The release address range may be an address range that cannot be accessed from the server processor 210 in the address range of the shared area 413L, or may be a reduced size.
　サーバプロセッサ２１０は、メモリ変更通知を受け、メモリ制御を行なう（Ｓ１０１３）。Ｓ１０１３のメモリ制御では、例えば、サーバプロセッサ２１０は、メモリ変更通知内の解放アドレス範囲に対応した解放対象領域群のうちの少なくとも１つの領域をキャッシュ領域として使用していれば、そのキャッシュ領域内のデータをサーバＣＭ２２１又はストレージモジュール３００－１に退避（例えばキャッシュ領域内のデータを書込み対象データとした書込み要求をストレージモジュール３００－１に送信）する。サーバプロセッサ２１０は、メモリ変更通知内の解放アドレス範囲をアクセス不可の範囲として認識する。 The server processor 210 receives the memory change notification and performs memory control (S1013). In the memory control in S1013, for example, if the server processor 210 uses at least one area of the release target area group corresponding to the release address range in the memory change notification as a cache area, The data is saved in the server CM 221 or the storage module 300-1 (for example, a write request using the data in the cache area as the write target data is transmitted to the storage module 300-1). The server processor 210 recognizes the release address range in the memory change notification as an inaccessible range.
　Ｓ１０１３の後、サーバプロセッサ２１０は、完了通知をストレージモジュール３００－１に返す（Ｓ１０１４）。これにより、以後、サーバプロセッサ２１０は、解放アドレス範囲にアクセスしない。また、ストレージプロセッサ３２０は、完了通知を受けて、以後、解放対象領域群を専用領域４１２Ｐの一部として扱うことができる。 After S1013, the server processor 210 returns a completion notification to the storage module 300-1 (S1014). Thereby, thereafter, the server processor 210 does not access the release address range. In addition, after receiving the completion notification, the storage processor 320 can handle the release target area group as a part of the dedicated area 412P.
　共有領域サイズ変更処理によれば、少なくともサーバモジュール負荷に基づいて、共有領域サイズの拡張（拡張サイズ）又は縮小（縮小サイズ）が制御される。これにより、サーバモジュール負荷に適切なキャッシュ容量をサーバプロセッサ２１０に提供でき、且つ、無駄に多くの領域がストレージＣＭ３３１から論理アドレス空間に割り当てられることを回避できる。従って、サーバモジュール２００－１の性能向上と、ストレージモジュール３００－１の性能低下抑制の両方が期待できる。また、共有領域サイズ変更処理によれば、サーバプロセッサ２１０が認識している論理アドレス空間のサイズそれ自体は変更されず、その論理アドレス空間の一部のアドレス範囲が、サーバプロセッサ２１０から新たにアクセス可能又はアクセス不可能とされる。これにより、サーバモジュール２００－１のリブート無しにサーバプロセッサ２１０がアクセス可能な範囲を増やす又は減らすことができる。なお、共有領域サイズ変更処理は、ストレージモジュール３００－１がサーバモジュール２００－１及び２００－２からＩ／Ｏ要求を受け付けることを止めることなく行われてよい。その場合、例えば、ストレージプロセッサ３２０は、割当て対象領域群を、ストレージプロセッサ３２０のキャッシュ領域として選択（確保）しないようにし、解放対象領域群を、共有領域サイズ変更処理が完了するまでストレージプロセッサ３２０のキャッシュ領域として選択（確保）しないようにしてよい。 According to the shared area size changing process, expansion (expansion size) or reduction (reduction size) of the shared area size is controlled based on at least the server module load. As a result, it is possible to provide the server processor 210 with a cache capacity appropriate for the server module load, and to avoid wasting a lot of area from the storage CM 331 to the logical address space. Therefore, it is possible to expect both the performance improvement of the server module 200-1 and the suppression of the performance drop of the storage module 300-1. Further, according to the shared area size changing process, the size of the logical address space recognized by the server processor 210 is not changed, and a part of the address range of the logical address space is newly accessed from the server processor 210. Possible or inaccessible. As a result, it is possible to increase or decrease the accessible range of the server processor 210 without rebooting the server module 200-1. Note that the shared area size changing process may be performed without stopping the storage module 300-1 from receiving I / O requests from the server modules 200-1 and 200-2. In this case, for example, the storage processor 320 does not select (reserve) the allocation target area group as the cache area of the storage processor 320, and sets the release target area group of the storage processor 320 until the shared area size change processing is completed. The cache area may not be selected (secured).
　図１１は、サーバデータ読出し処理の流れの一例を示す。 FIG. 11 shows an example of the flow of server data read processing.
　サーバプロセッサ２１０が、読出し対象のサーバデータが論理キャッシュメモリ（具体的にはサーバ領域４１１Ｌと共有領域４１３Ｌ）に存在するか否かの判断であるキャッシュヒット判断を行う（Ｓ１１１１）。 The server processor 210 performs a cache hit determination that is a determination as to whether or not the server data to be read exists in the logical cache memory (specifically, the server area 411L and the shared area 413L) (S1111).
　Ｓ１１１１の判断結果が肯定の場合（Ｓ１１１１：Ｙｅｓ）、サーバプロセッサ２１０が、キャッシュヒット対象の領域（サーバＣＭ２２１又は共有領域４１３Ｐ）から読出し対象のサーバデータを読み出す（Ｓ１１１２）。Ｓ１１１２の実線は、サーバＣＭ２２１からサーバデータが読み出されたことを示し、Ｓ１１１２の破線は、共有領域４１３Ｐからサーバデータが読み出されたことを示す。 If the determination result in S1111 is affirmative (S1111: Yes), the server processor 210 reads the server data to be read from the cache hit target area (server CM 221 or shared area 413P) (S1112). The solid line in S1112 indicates that server data has been read from the server CM 221, and the broken line in S1112 indicates that server data has been read from the shared area 413P.
　Ｓ１１１１の判断結果が否定の場合（Ｓ１１１１：Ｎｏ）、サーバプロセッサ２１０が、読出し対象サーバデータの格納先領域とするキャッシュ領域を確保する（Ｓ１１２１）。なお、サーバプロセッサ２１０は、キャッシュ領域を、共有領域４１３Ｐ（４１３Ｌ）よりもサーバＣＭ２２１（サーバ領域４１１Ｌ）から優先的に確保する（Ｓ１１２１の実線は、優先は示し、Ｓ１１２１の破線は、非優先を示す）。なぜなら、読出し対象のサーバデータがサーバプロセッサ２１０により近い場所にキャッシュされている方が、読出し処理の性能が高いからである。また、サーバプロセッサ２１０は、Ｓ１１１１：Ｎｏの場合、キャッシュヒットミス回数のカウント値を更新し、更新後のカウント値を基に、キャッシュヒットミス割合を更新してよい。上述したように、キャッシュヒットミス割合は、サーバモジュール負荷の一例とされてよい。 If the determination result in S1111 is negative (S1111: No), the server processor 210 secures a cache area as a storage area for the read target server data (S1121). The server processor 210 secures the cache area preferentially from the server CM 221 (server area 411L) over the shared area 413P (413L) (the solid line in S1121 indicates priority, and the broken line in S1121 indicates non-priority. Show). This is because the read processing performance is higher when the server data to be read is cached at a location closer to the server processor 210. Further, in the case of S1111: No, the server processor 210 may update the count value of the number of cache hit misses, and update the cache hit miss ratio based on the updated count value. As described above, the cache hit miss ratio may be an example of a server module load.
　サーバプロセッサ２１０が、読出し要求をストレージモジュール３００－１に送信する（Ｓ１１２２）。その読出し要求は、例えば、読出し元アドレス（例えばＬＵ番号及びＬＵにおけるＬＢＡ（Logical　Block　Address））と、Ｓ１１２１で確保したキャッシュ領域のアドレスとを含む。 The server processor 210 transmits a read request to the storage module 300-1 (S1122). The read request includes, for example, a read source address (for example, an LU number and an LBA (Logical Block Address) in the LU) and the address of the cache area secured in S1121.
　ストレージプロセッサ３２０が、読出し要求を受けて、読出し対象のサーバデータが専用領域４１２Ｐに存在するか否かの判断であるキャッシュヒット判断を行う（Ｓ１２２３）。 In response to the read request, the storage processor 320 makes a cache hit determination, which is a determination as to whether or not the read-target server data exists in the dedicated area 412P (S1223).
　Ｓ１２２３の判断結果が肯定の場合（Ｓ１１２３：Ｙｅｓ）、ストレージプロセッサ３２０が、キャッシュヒット対象の領域から、Ｓ１１２１で確保したキャッシュ領域に、サーバデータを転送する（Ｓ１１２４）。具体的には、例えば、ストレージプロセッサ３２０が、バックプレーン４００のＤＭＡＣ（図示せず）に、転送元アドレス（キャッシュヒット対象の領域のアドレス）と転送先アドレス（Ｓ１１２１で確保したキャッシュ領域）を設定し、ＤＭＡにより、サーバデータが転送元アドレスから転送先アドレスに転送されてよい。Ｓ１１２４の後、ストレージプロセッサ３２０が、完了通知をサーバモジュール２００－１に送信する（Ｓ１１２５）。サーバプロセッサ２１０が、完了通知を受けて、Ｓ１１２１で確保したキャッシュ領域から読出し対象のサーバデータを読み出す（Ｓ１１２６）。 If the determination result in S1223 is affirmative (S1123: Yes), the storage processor 320 transfers the server data from the cache hit target area to the cache area secured in S1121 (S1124). Specifically, for example, the storage processor 320 sets a transfer source address (address of a cache hit target area) and a transfer destination address (cache area secured in S1121) in the DMAC (not shown) of the backplane 400. The server data may be transferred from the transfer source address to the transfer destination address by DMA. After S1124, the storage processor 320 transmits a completion notification to the server module 200-1 (S1125). Upon receiving the completion notification, the server processor 210 reads the server data to be read from the cache area secured in S1121 (S1126).
　Ｓ１１２３の判断結果が否定の場合（Ｓ１１２３：Ｙｅｓ）、ストレージプロセッサ３２０が、読出し要求内の読出し元アドレスに基づきＬＵ（記憶デバイス３７０）から読出し対象のサーバデータを読み出す（Ｓ１１３１）。ストレージプロセッサ３２０は、そのサーバデータを、Ｓ１１２１で確保したキャッシュ領域に転送する（Ｓ１１３２）。その際、ストレージプロセッサ３２０は、破線で示すように、専用領域４１２Ｐからキャッシュ領域を確保し、確保したキャッシュ領域に、読み出したサーバデータを書き込んでよい。Ｓ１１３２の後、ストレージプロセッサ３２０が、完了通知をサーバモジュール２００－１に送信する（Ｓ１１３３）。サーバプロセッサ２１０が、完了通知を受けて、Ｓ１１２１で確保したキャッシュ領域から読出し対象のサーバデータを読み出す（Ｓ１１３４）。 If the determination result in S1123 is negative (S1123: Yes), the storage processor 320 reads the server data to be read from the LU (storage device 370) based on the read source address in the read request (S1131). The storage processor 320 transfers the server data to the cache area secured in S1121 (S1132). At this time, the storage processor 320 may secure a cache area from the dedicated area 412P and write the read server data to the secured cache area as indicated by a broken line. After S1132, the storage processor 320 transmits a completion notification to the server module 200-1 (S1133). Upon receiving the completion notification, the server processor 210 reads server data to be read from the cache area secured in S1121 (S1134).
　図１２は、サーバデータ書込み処理の流れの一例を示す。 FIG. 12 shows an example of the flow of server data write processing.
　サーバプロセッサ２１０が、書込み対象のサーバデータにより更新されるデータが論理キャッシュメモリ（具体的にはサーバ領域４１１Ｌと共有領域４１３Ｌ）に存在するか否かの判断であるキャッシュヒット判断を行い、キャッシュヒット判断の結果に応じてキャッシュ領域を確保する（Ｓ１２０１）。キャッシュヒット判断の結果が肯定の場合、キャッシュヒット対象の領域が確保される。キャッシュヒット判断の結果が否定の場合、サーバプロセッサ２１０が、書込み対象サーバデータの格納先領域とするキャッシュ領域を、サーバＣＭ２２１（サーバ領域４１１Ｌ）よりも共有領域４１３Ｐ（４１３Ｌ）から優先的に確保する（Ｓ１２０１の実線は、優先は示し、Ｓ１２０１の破線は、非優先を示す）。なぜなら、書込み対象のサーバデータがストレージプロセッサ３２０により近い場所にキャッシュされた方が、書込み処理の性能が高いからである。なお、サーバプロセッサ２１０は、キャッシュヒット判断の結果が否定の場合、キャッシュヒットミス回数のカウント値を更新し、更新後のカウント値を基に、キャッシュヒットミス割合を更新してよい。上述したように、キャッシュヒットミス割合は、サーバモジュール負荷の一例とされてよい。 The server processor 210 performs a cache hit determination which is a determination as to whether or not the data updated by the server data to be written exists in the logical cache memory (specifically, the server area 411L and the shared area 413L), and the cache hit A cache area is secured according to the determination result (S1201). If the result of the cache hit determination is affirmative, a cache hit target area is secured. If the result of the cache hit determination is negative, the server processor 210 preferentially secures the cache area as the storage destination area for the write target server data from the shared area 413P (413L) rather than the server CM 221 (server area 411L). (A solid line in S1201 indicates priority, and a broken line in S1201 indicates non-priority). This is because the write processing performance is higher when the server data to be written is cached at a location closer to the storage processor 320. If the result of the cache hit determination is negative, the server processor 210 may update the cache hit miss count value and update the cache hit miss ratio based on the updated count value. As described above, the cache hit miss ratio may be an example of a server module load.
　サーバプロセッサ２１０が、確保したキャッシュ領域に、書込み対象のサーバデータを書き込む（Ｓ１２０２）。キャッシュ領域が共有領域４１３Ｐ（４１３Ｌ）に存在すれば、サーバデータは共有領域４１３Ｐ（４１３Ｌ）に書き込まれ（実線）、キャッシュ領域がサーバＣＭ２２１（サーバ領域４１１Ｌ）に存在すれば、サーバデータはサーバＣＭ２２１に書き込まれる（破線）。共有領域４１３Ｐ（４１３Ｌ）へのサーバデータの書き込みには、例えば、バックプレーン４００のＤＭＡＣによるＤＭＡ転送が使用されてよい。 The server processor 210 writes the server data to be written into the secured cache area (S1202). If the cache area exists in the shared area 413P (413L), the server data is written to the shared area 413P (413L) (solid line), and if the cache area exists in the server CM 221 (server area 411L), the server data is stored in the server CM 221. (Dashed line). For example, DMA transfer by the DMAC of the backplane 400 may be used for writing the server data to the shared area 413P (413L).
　サーバプロセッサ２１０が、書込み要求をストレージモジュール３００－１に送信する（Ｓ１２０３）。その書込み要求は、例えば、書込み先アドレス（例えばＬＵ番号及びＬＵにおけるＬＢＡ）と、Ｓ１２０３で確保したキャッシュ領域のアドレスとを含む。 The server processor 210 transmits a write request to the storage module 300-1 (S1203). The write request includes, for example, a write destination address (for example, LU number and LBA in the LU) and the address of the cache area secured in S1203.
　ストレージプロセッサ３２０が、書込み要求を受けて、メモリ制御を行う（Ｓ１２０４）。Ｓ１２０４のメモリ制御では、例えば以下の処理が行われる。ストレージプロセッサ３２０が、書込み対象のサーバデータにより更新されるデータが専用領域４１２Ｐに存在するか否かの判断であるキャッシュヒット判断を行う。ストレージプロセッサ３２０は、キャッシュヒット判断の結果が肯定であれば、キャッシュヒット対象の領域を確保し、キャッシュヒット判断の結果が否定であれば、専用領域４１２Ｐから領域を確保する。専用領域４１２Ｐにおいて書込み対象のサーバデータが二重化されるよう、専用領域４１２Ｐにおいて２つの領域が確保されてよい。Ｓ１２０４の後、ストレージプロセッサ３２０が、完了通知をサーバモジュール２００－１に送信する（Ｓ１２０５）。 In response to the write request, the storage processor 320 performs memory control (S1204). In the memory control in S1204, for example, the following processing is performed. The storage processor 320 makes a cache hit determination, which is a determination as to whether or not the data updated by the server data to be written exists in the dedicated area 412P. If the result of the cache hit determination is affirmative, the storage processor 320 secures a cache hit target area, and if the result of the cache hit determination is negative, the storage processor 320 secures an area from the dedicated area 412P. Two areas may be secured in the dedicated area 412P so that the server data to be written is duplicated in the dedicated area 412P. After S1204, the storage processor 320 transmits a completion notification to the server module 200-1 (S1205).
　サーバプロセッサ２１０が完了通知を受けて、Ｓ１２０１で確保したキャッシュ領域からＳ１２０４で確保された領域へ書込み対象のサーバデータがコピーされる（Ｓ１２０６）。Ｓ１２０５の完了通知が、Ｓ１２０４で確保された領域のアドレスを含んでよい。Ｓ１２０１で確保したキャッシュ領域が共有領域４１３Ｐ内の領域であれば、例えば、サーバプロセッサ２１０より指示を受けたストレージプロセッサ３２０（又はサーバプロセッサ２１０）により、共有領域４１３Ｐから専用領域４１２Ｐにサーバデータがコピーされる（実線）。一方、Ｓ１２０１で確保したキャッシュ領域がサーバＣＭ２２１内の領域であれば、サーバプロセッサ２１０より指示を受けたストレージプロセッサ３２０（又はサーバプロセッサ２１０）により、サーバＣＭ２２１から専用領域４１２Ｐにサーバデータがコピーされる（破線）。 When the server processor 210 receives the completion notification, the server data to be written is copied from the cache area secured in S1201 to the area secured in S1204 (S1206). The completion notification in S1205 may include the address of the area secured in S1204. If the cache area secured in S1201 is an area in the shared area 413P, for example, the server data is copied from the shared area 413P to the dedicated area 412P by the storage processor 320 (or the server processor 210) instructed by the server processor 210. (Solid line). On the other hand, if the cache area secured in S1201 is an area in the server CM 221, server data is copied from the server CM 221 to the dedicated area 412P by the storage processor 320 (or the server processor 210) that has received an instruction from the server processor 210. (Dashed line).
　以上、一実施形態を説明したが、本発明はその実施形態に限定されるものではない。 Although one embodiment has been described above, the present invention is not limited to that embodiment.
　例えば、図４は、説明を分かり易くするために、サーバモジュール２００－１とストレージモジュール３００－１のケース（サーバモジュールとストレージモジュールが１対１であるケース）を例に取ったが、ストレージモジュール３００－１に複数のサーバモジュール２００－１及び２００－２が接続されている場合、ストレージＣＭ３３１には、共有領域４１３Ｐが、サーバモジュール２００－１及び２００－２の各々について存在し得る。第１～第３管理テーブル４２１～４２３も、サーバモジュール２００－１及び２００－２の各々について存在し得る。サーバモジュール２００－１及び２００－２の各々の共有領域４１３Ｐのサイズが可変である。ストレージプロセッサ３２０は、複数のサーバモジュール２００－１及び２００－２にそれぞれ対応した複数のサーバモジュール負荷及び複数の優先度（サーバモジュール２００の優先度）のうちの少なくとも一方を基に、対象のサーバモジュールに対応した共有領域４１３Ｐのサイズを決定することができる。例えば、ストレージプロセッサ３２０は、対象負荷比率（複数のサーバモジュール負荷の合計に対する、対象のサーバモジュールの負荷の比率）と他の各サーバモジュールの負荷比率との相対的な関係（典型的には大小関係）に応じて、対象サーバモジュール用の共有領域のサイズを決定してもよいし、対象のサーバモジュールの優先度と他の各サーバモジュールの優先度との相対的な関係に応じて、対象サーバモジュール用の共有領域のサイズを決定してもよい。対象のサーバモジュールの負荷は、上述したように、対象のサーバモジュールでのキャッシュヒットミス割合を含んでもよい。 For example, FIG. 4 shows the case of the server module 200-1 and the storage module 300-1 (case where the server module and the storage module are one-to-one) for the sake of clarity. When a plurality of server modules 200-1 and 200-2 are connected to 300-1, a shared area 413P may exist for each of the server modules 200-1 and 200-2 in the storage CM 331. The first to third management tables 421 to 423 may also exist for each of the server modules 200-1 and 200-2. The size of the shared area 413P of each of the server modules 200-1 and 200-2 is variable. The storage processor 320 uses the target server based on at least one of a plurality of server module loads and a plurality of priorities (priorities of the server modules 200) respectively corresponding to the plurality of server modules 200-1 and 200-2. The size of the shared area 413P corresponding to the module can be determined. For example, the storage processor 320 has a relative relationship (typically large and small) between the target load ratio (the ratio of the load of the target server module to the total of the plurality of server module loads) and the load ratio of each of the other server modules. The size of the shared area for the target server module may be determined according to the relationship), and the target may be determined according to the relative relationship between the priority of the target server module and the priority of each of the other server modules. The size of the shared area for the server module may be determined. As described above, the load of the target server module may include a cache hit miss ratio in the target server module.
　また、論理アドレス空間には、サーバプロセッサ２１０からアクセス可能な物理メモリ領域のみが割り当てられてもよい。 Further, only a physical memory area accessible from the server processor 210 may be allocated to the logical address space.
　また、論理メモリは、論理キャッシュメモリ以外の論理メモリでもよく、論理メモリのアドレス空間に割り当てられる領域は、キャッシュメモリ内の領域に代えて又は加えて、キャッシュメモリ以外のメモリの領域であってもよい。 The logical memory may be a logical memory other than the logical cache memory, and the area allocated to the address space of the logical memory may be an area of a memory other than the cache memory instead of or in addition to the area in the cache memory. Good.
１００：計算機システム　２００：サーバモジュール　３００：ストレージモジュール

  100: Computer system 200: Server module 300: Storage module

Claims (12)

  1. 　第１キャッシュメモリを有する計算機に接続されるストレージ装置であって、
    　記憶デバイスと、
    　前記記憶デバイスに入出力されるデータが一時的に格納される第２キャッシュメモリを有し前記記憶デバイスに対するデータのＩ／Ｏ（Input/Output）を制御するストレージコントローラと
    を有し、
    　前記ストレージコントローラは、前記計算機の論理キャッシュメモリのアドレス空間であり前記第１キャッシュメモリの少なくとも一部が割り当てられるアドレス空間である論理アドレス空間に、前記第２キャッシュメモリの少なくとも一部を割り当て、
    　前記第２キャッシュメモリにおける、前記論理アドレス空間に割り当てられた１以上の領域の集合が、前記計算機と前記ストレージコントローラの両方がアクセス可能な共有領域である、
    ストレージ装置。     A storage device connected to a computer having a first cache memory,
    A storage device;
    A storage controller that has a second cache memory for temporarily storing data to be input / output to / from the storage device and controls I / O (Input / Output) of data to the storage device;
    The storage controller assigns at least a part of the second cache memory to a logical address space that is an address space of the logical cache memory of the computer and to which at least a part of the first cache memory is assigned,
    A set of one or more areas assigned to the logical address space in the second cache memory is a shared area accessible by both the computer and the storage controller.
    Storage device.
  2. 　前記ストレージコントローラが、前記計算機の負荷を表す負荷情報に基づいて、前記共有領域のサイズを変更する、
    請求項１記載のストレージ装置。     The storage controller changes the size of the shared area based on load information representing the load of the computer;
    The storage apparatus according to claim 1.
  3. 　前記ストレージコントローラが、前記論理アドレス空間に割り当てられている、前記第２キャッシュメモリの一部領域、を確保し、前記一部領域のアドレスを前記計算機に通知し、
    　前記ストレージコントローラが、前記一部領域から、前記計算機により書き込まれた前記負荷情報を取得する、
    請求項２記載のストレージ装置。     The storage controller allocates a partial area of the second cache memory allocated to the logical address space, and notifies the computer of the address of the partial area;
    The storage controller acquires the load information written by the computer from the partial area.
    The storage apparatus according to claim 2.
  4. 　前記論理アドレス空間には、前記第２キャッシュメモリのうちの少なくとも一部であり前記計算機からアクセス不可能な領域である専用領域が割り当てられており、
    　前記ストレージコントローラが、
    　　前記共有領域のサイズを拡張する場合、前記計算機から新たにアクセス可能となるアドレス範囲である割当てアドレス範囲を前記計算機に通知し、前記割当てアドレス範囲は、前記論理アドレス空間のうち前記専用領域内の領域が割り当てられているアドレス範囲であり、
    　　前記共有領域のサイズを縮小する場合、前記計算機から新たにアクセス不可能となるアドレス範囲である解放アドレス範囲を前記計算機に通知し、前記解放アドレス範囲は、前記論理アドレス空間のうち前記共有領域内の領域が割り当てられているアドレス範囲である、
    請求項２記載のストレージ装置。     In the logical address space, a dedicated area that is at least a part of the second cache memory and is inaccessible from the computer is allocated,
    The storage controller is
    When expanding the size of the shared area, the computer notifies the computer of an allocated address range that is a newly accessible address range from the computer, and the allocated address range is within the dedicated area of the logical address space. The address range to which the region is assigned,
    When reducing the size of the shared area, the computer notifies the computer of a release address range that is a new address range that cannot be accessed, and the release address range is within the shared area of the logical address space. Is the address range to which the area is assigned,
    The storage apparatus according to claim 2.
  5. 　前記ストレージコントローラが、前記共有領域のサイズを拡張する場合、新たに前記共有領域の一部とされる領域として、ダーティ領域よりも空き領域及びクリーン領域のうちの少なくとも一方を優先的に選択する、
    請求項４記載のストレージ装置。     When the storage controller expands the size of the shared area, as an area that is newly made a part of the shared area, at least one of a free area and a clean area is preferentially selected over a dirty area.
    The storage apparatus according to claim 4.
  6. 　前記Ｉ／Ｏが読出しの場合、前記ストレージコントローラが、前記共有領域よりも前記第１キャッシュメモリから前記計算機により優先的に確保された第１キャッシュ領域のアドレスの通知を、前記計算機から受信し、読出し対象のデータを、前記第１キャッシュ領域へ転送する処理を行う、
    請求項１記載のストレージ装置。     When the I / O is read, the storage controller receives from the computer a notification of the address of the first cache area secured by the computer from the first cache memory over the shared area. A process of transferring data to be read to the first cache area;
    The storage apparatus according to claim 1.
  7. 　前記Ｉ／Ｏが書込みの場合、前記ストレージコントローラが、前記第１キャッシュメモリよりも前記共有領域から前記計算機により優先的に確保された第２キャッシュ領域のアドレスの通知を、前記計算機から受信し、書込み対象のデータを、前記第２キャッシュ領域から前記第２キャッシュメモリにおける第３キャッシュ領域にコピーし、前記第３キャッシュ領域は、前記共有領域以外の領域から前記ストレージコントローラにより確保されたキャッシュ領域である、
    請求項１記載のストレージ装置。     When the I / O is a write, the storage controller receives a notification of the address of the second cache area preferentially secured by the computer from the shared area rather than the first cache memory from the computer, Data to be written is copied from the second cache area to the third cache area in the second cache memory, and the third cache area is a cache area secured by the storage controller from an area other than the shared area. is there,
    The storage apparatus according to claim 1.
  8. 　ストレージ装置に対してデータのＩ／Ｏを行う計算機であって、
    　第１キャッシュメモリと、
    　プロセッサと
    を有し、
    　前記プロセッサが、論理アドレス空間に割り当てられたサーバ領域と共有領域とのうちのいずれかからキャッシュ領域を確保し、
    　前記論理アドレス空間は、論理キャッシュメモリのアドレス空間であり
    　前記サーバ領域は、前記第１キャッシュメモリの少なくとも一部であり前記論理アドレス空間に割り当てられた領域であり、
    　前記共有領域は、前記ストレージ装置が有する第２キャッシュメモリのうち前記論理アドレス空間に割り当てられた領域であり、前記プロセッサと前記ストレージ装置の両方がアクセス可能な領域である、
    計算機。     A computer that performs data I / O to a storage device,
    A first cache memory;
    A processor,
    The processor secures a cache area from either the server area or the shared area allocated to the logical address space;
    The logical address space is an address space of a logical cache memory, and the server area is an area that is at least a part of the first cache memory and is allocated to the logical address space,
    The shared area is an area allocated to the logical address space in the second cache memory of the storage device, and is an area accessible to both the processor and the storage device.
    calculator.
  9. 　前記論理アドレス空間には、前記第２キャッシュメモリのうちの少なくとも一部であり前記プロセッサからアクセス不可能な領域である専用領域が割り当てられており、
    　前記プロセッサが、
    　　新たにアクセス可能となるアドレス範囲である割当てアドレス範囲の通知を前記ストレージ装置から受信した場合、前記割当てアドレス範囲を、新たにアクセス可能なアドレス範囲として認識し、前記割当てアドレス範囲に割り当てられている領域は、前記専用領域から共有領域の少なくとも一部とされた領域であり、
    　　新たにアクセス不可能となるアドレス範囲である解放アドレス範囲の通知を前記ストレージ装置から受信した場合、前記解放アドレス範囲を、新たにアクセス不可能なアドレス範囲として認識し、前記解放アドレス範囲に割り当てられている領域は、前記共有領域から前記専用領域の一部とされた領域である、
    請求項８記載の計算機。     In the logical address space, a dedicated area which is at least a part of the second cache memory and is inaccessible from the processor is allocated,
    The processor is
    When a notification of an allocated address range that is a newly accessible address range is received from the storage device, the allocated address range is recognized as a newly accessible address range and assigned to the allocated address range. The area is an area that is at least part of the shared area from the dedicated area,
    When a notification of a release address range that is a new inaccessible address range is received from the storage device, the release address range is recognized as a newly inaccessible address range and assigned to the release address range. The area that is a part of the dedicated area from the shared area,
    The computer according to claim 8.
  10. 　前記Ｉ／Ｏが読出しの場合、前記プロセッサが、
    　　前記共有領域よりも前記サーバ領域から優先的にキャッシュ領域を確保し、
    　　前記確保したキャッシュ領域に前記ストレージ装置からの読出し対象データが格納されるよう、前記確保したキャッシュ領域のアドレスを、前記ストレージ装置に通知する、
    請求項８記載の計算機。     When the I / O is read, the processor
    Secure the cache area preferentially from the server area over the shared area,
    Notifying the storage device of the address of the reserved cache area so that data to be read from the storage apparatus is stored in the reserved cache area;
    The computer according to claim 8.
  11. 　前記Ｉ／Ｏが書込みの場合、前記プロセッサが、
    　　前記サーバ領域よりも前記共有領域から優先的にキャッシュ領域を確保し、
    　　書込み対象のデータを、前記確保したキャッシュ領域に書き込み、
    　　前記確保したキャッシュ領域内の書込み対象のデータの書込みのために、前記確保したキャッシュ領域のアドレスを含んだ書込み要求を前記ストレージ装置に送信する、
    請求項８記載の計算機。     If the I / O is a write, the processor
    Secure the cache area preferentially from the shared area over the server area,
    Write the data to be written to the secured cache area,
    Sending a write request including the address of the reserved cache area to the storage device for writing the data to be written in the reserved cache area;
    The computer according to claim 8.
  12. 　第１キャッシュメモリを有する計算機と、
    　第２キャッシュメモリを有しデータのＩ／Ｏ（Input/Output）を制御するストレージ装置と
    を有し、
    　前記ストレージ装置は、前記計算機の論理キャッシュメモリのアドレス空間であり前記第１キャッシュメモリの少なくとも一部が割り当てられるアドレス空間である論理アドレス空間に、前記第２キャッシュメモリの少なくとも一部を割り当て、
    　前記第２キャッシュメモリにおける、前記論理アドレス空間に割り当てられた１以上の領域の集合が、前記計算機と前記ストレージ装置の両方がアクセス可能な共有領域である、
    計算機システム。     A computer having a first cache memory;
    A storage device having a second cache memory and controlling data input / output (I / O);
    The storage device allocates at least a part of the second cache memory to a logical address space that is an address space of the logical cache memory of the computer and to which at least a part of the first cache memory is allocated,
    A set of one or more areas assigned to the logical address space in the second cache memory is a shared area accessible by both the computer and the storage device.
    Computer system.
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Citations (3)

* Cited by examiner, † Cited by third party
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JP2002007304A (en) * 2000-06-23 2002-01-11 Hitachi Ltd Computer system using storage area network and data handling method therefor
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JP2009098887A (en) * 2007-10-16 2009-05-07 Hitachi Ltd Storage system and data erasing method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002007304A (en) * 2000-06-23 2002-01-11 Hitachi Ltd Computer system using storage area network and data handling method therefor
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